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@philandstuff
philandstuff / codemesh2014.org
Last active July 5, 2022 13:29
Code Mesh 2014

Codemesh 2014, London

keynote: complexity is outside the code

when I started programming:

  • architecture was always:
    • box - box - cylinder
  • then layers:
    • ideally:
@staltz
staltz / introrx.md
Last active May 4, 2025 15:01
The introduction to Reactive Programming you've been missing
@bitemyapp
bitemyapp / gist:8739525
Last active May 7, 2021 23:22
Learning Haskell
set nocompatible " We're running Vim, not Vi!
set guifont=Bitstream\ Vera\ Sans\ Mono:h24
let g:molokai_original = 1
colorscheme molokai
syntax on " Enable syntax highlighting
filetype on " Enable filetype detection
filetype indent on " Enable filetype-specific indenting
@JakeWharton
JakeWharton / BaseActivity.java
Created July 6, 2012 01:17
Scoped event bus which automatically registers and unregisters with the lifecycle.
package com.squareup.example;
public abstract BaseActivity extends SherlockActivity {
private final ScopedBus scopedBus = new ScopedBus();
protected ScopedBus getBus() {
return scopedBus;
}
@Override public void onPause() {
@hellerbarde
hellerbarde / latency.markdown
Created May 31, 2012 13:16 — forked from jboner/latency.txt
Latency numbers every programmer should know

Latency numbers every programmer should know

L1 cache reference ......................... 0.5 ns
Branch mispredict ............................ 5 ns
L2 cache reference ........................... 7 ns
Mutex lock/unlock ........................... 25 ns
Main memory reference ...................... 100 ns             
Compress 1K bytes with Zippy ............. 3,000 ns  =   3 µs
Send 2K bytes over 1 Gbps network ....... 20,000 ns  =  20 µs
SSD random read ........................ 150,000 ns  = 150 µs

Read 1 MB sequentially from memory ..... 250,000 ns = 250 µs

@jboner
jboner / latency.txt
Last active May 4, 2025 09:35
Latency Numbers Every Programmer Should Know
Latency Comparison Numbers (~2012)
----------------------------------
L1 cache reference 0.5 ns
Branch mispredict 5 ns
L2 cache reference 7 ns 14x L1 cache
Mutex lock/unlock 25 ns
Main memory reference 100 ns 20x L2 cache, 200x L1 cache
Compress 1K bytes with Zippy 3,000 ns 3 us
Send 1K bytes over 1 Gbps network 10,000 ns 10 us
Read 4K randomly from SSD* 150,000 ns 150 us ~1GB/sec SSD