Removed clang-specific branch for x86 DCAS-based loads.

6e14ca24.patch

diff --git a/boost/atomic/detail/ops_gcc_x86_dcas.hpp_origin b/boost/atomic/detail/ops_gcc_x86_dcas.hpp_patched
index 4dacc66..2c3cde2 100644
--- a/boost/atomic/detail/ops_gcc_x86_dcas.hpp_origin
+++ b/boost/atomic/detail/ops_gcc_x86_dcas.hpp_patched
@@ -158,10 +158,7 @@ struct gcc_dcas_x86
         }
         else
         {
-#if defined(__clang__)
-            // Clang cannot allocate eax:edx register pairs but it has sync intrinsics
-            value = __sync_val_compare_and_swap(&storage, (storage_type)0, (storage_type)0);
-#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
+#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
             uint32_t value_bits[2];
             // We don't care for comparison result here; the previous value will be stored into value anyway.
             // Also we don't care for ebx and ecx values, they just have to be equal to eax and edx before cmpxchg8b.
@@ -401,13 +398,7 @@ struct gcc_dcas_x86_64
 
     static BOOST_FORCEINLINE storage_type load(storage_type const volatile& storage, memory_order) BOOST_NOEXCEPT
     {
-#if defined(__clang__)
-
-        // Clang cannot allocate rax:rdx register pairs but it has sync intrinsics
-        storage_type value = storage_type();
-        return __sync_val_compare_and_swap(&storage, value, value);
-
-#elif defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
+#if defined(BOOST_ATOMIC_DETAIL_X86_NO_ASM_AX_DX_PAIRS)
 
         // Some compilers can't allocate rax:rdx register pair either and also don't support 128-bit __sync_val_compare_and_swap
         uint64_t value_bits[2];