LX2160a support for Nvidia open-gpu-kernel-modules

0001-Add-support-for-NXP-LX2160a.patch

From c99b1d78d79e9f8fb9bf1995fc20138397996836 Mon Sep 17 00:00:00 2001
From: Jon Nettleton <[email protected]>
Date: Fri, 5 Aug 2022 12:00:07 +0200
Subject: [PATCH] Add support for NXP LX2160a

Signed-off-by: Jon Nettleton <[email protected]>
---
 src/nvidia/arch/nvalloc/common/inc/nvcst.h            |  4 ++++
 src/nvidia/arch/nvalloc/common/inc/nvdevid.h          |  2 ++
 src/nvidia/src/kernel/platform/chipset/chipset_info.c | 11 +++++++++++
 3 files changed, 17 insertions(+)

diff --git a/src/nvidia/arch/nvalloc/common/inc/nvcst.h b/src/nvidia/arch/nvalloc/common/inc/nvcst.h
index 66a1c26..5dbbd86 100644
--- a/src/nvidia/arch/nvalloc/common/inc/nvcst.h
+++ b/src/nvidia/arch/nvalloc/common/inc/nvcst.h
@@ -90,6 +90,7 @@ CHIPSET_SETUP_FUNC(Ampere_Altra_setupFunc)
 CHIPSET_SETUP_FUNC(Arm_NeoverseN1_setupFunc)
 CHIPSET_SETUP_FUNC(Nvidia_T210_setupFunc)
 CHIPSET_SETUP_FUNC(Nvidia_T194_setupFunc)
+CHIPSET_SETUP_FUNC(Freescale_LX2160a_setupFunc)
 
 
 // Keep string length <=32 (including termination) to avoid string copy overflow
@@ -259,6 +260,7 @@ CSINFO chipsetInfo[] =
     {PCI_VENDOR_ID_HYGON,       0x790E, CS_HYGON_C86,      "Hygon-C86-7151",   NULL},
     {PCI_VENDOR_ID_MARVELL,     0xA02D, CS_MARVELL_OCTEON_CN96XX, "Marvell Octeon CN96xx", ARMV8_generic_setupFunc},
     {PCI_VENDOR_ID_MARVELL,     0xA02D, CS_MARVELL_OCTEON_CN98XX, "Marvell Octeon CN98xx", ARMV8_generic_setupFunc},
+    {PCI_VENDOR_ID_FREESCALE,   0x8D90, CS_FREESCALE_LX2160A, "Freescale Layerscape LX2160a", Freescale_LX2160a_setupFunc},
 
 ///////////////////////////////////////////////////////////////////////////////////////////////////
 
@@ -293,6 +295,7 @@ VENDORNAME vendorName[] =
     {PCI_VENDOR_ID_FUJITSU,     "Fujitsu"},
     {PCI_VENDOR_ID_CADENCE,     "Cadence"},
     {PCI_VENDOR_ID_ARM,         "ARM"},
+    {PCI_VENDOR_ID_FREESCALE,   "Freescale"},
     {0,                         "Unknown"} // Indicates end of the table
 };
 
@@ -352,6 +355,7 @@ ARMCSALLOWLISTINFO armChipsetAllowListInfo[] =
     {PCI_VENDOR_ID_ARM,         0x0100, CS_ARM_NEOVERSEN1},     // Arm Neoverse N1
     {PCI_VENDOR_ID_MARVELL,     0xA02D, CS_MARVELL_OCTEON_CN96XX}, // Marvell OCTEON CN96xx
     {PCI_VENDOR_ID_MARVELL,     0xA02D, CS_MARVELL_OCTEON_CN98XX}, // Marvell OCTEON CN98xx
+    {PCI_VENDOR_ID_FREESCALE,   0x8D90, CS_FREESCALE_LX2160A},  // Freescale LX2160a
 
     // last element must have chipset CS_UNKNOWN (zero)
     {0,                         0,      CS_UNKNOWN}
diff --git a/src/nvidia/arch/nvalloc/common/inc/nvdevid.h b/src/nvidia/arch/nvalloc/common/inc/nvdevid.h
index b4b65ed..154e485 100644
--- a/src/nvidia/arch/nvalloc/common/inc/nvdevid.h
+++ b/src/nvidia/arch/nvalloc/common/inc/nvdevid.h
@@ -145,6 +145,7 @@
 #define PCI_VENDOR_ID_CADENCE       0x17CD
 #define PCI_VENDOR_ID_ARM           0x13B5
 #define PCI_VENDOR_ID_HYGON         0x1D94
+#define PCI_VENDOR_ID_FREESCALE     0x1957
 
 #define NV_PCI_DEVID_DEVICE                    31:16  /* RW--F */
 #define NV_PCI_SUBID_DEVICE                    31:16  /* RW--F */
@@ -644,6 +645,7 @@ enum {
 ,     CS_INTEL_1B81
 ,     CS_INTEL_18DC
 ,     CS_INTEL_7A04
+,     CS_FREESCALE_LX2160A
 ,     CS_MAX_PCIE
 };
 
diff --git a/src/nvidia/src/kernel/platform/chipset/chipset_info.c b/src/nvidia/src/kernel/platform/chipset/chipset_info.c
index f75f494..6b16b1d 100644
--- a/src/nvidia/src/kernel/platform/chipset/chipset_info.c
+++ b/src/nvidia/src/kernel/platform/chipset/chipset_info.c
@@ -1264,6 +1264,17 @@ Arm_NeoverseN1_setupFunc
     return NV_OK;
 }
 
+static NV_STATUS
+Freescale_LX2160a_setupFunc
+(
+    OBJCL *pCl
+)
+{
+    // TODO Need to check if any more PDB properties should be set
+    pCl->setProperty(pCl, PDB_PROP_CL_IS_CHIPSET_IO_COHERENT, NV_TRUE);
+    return NV_OK;
+}
+
 void
 csGetInfoStrings
 (
-- 
2.38.0.rc1