Op | Signature |
---|---|
i64.eqz |
[i64] -> i32 |
i64.eq |
[i64,i64] -> i32 |
i64.ne |
[i64,i64] -> i32 |
i64.lt_s |
[i64,i64] -> i32 |
i64.lt_u |
[i64,i64] -> i32 |
i64.gt_s |
[i64,i64] -> i32 |
i64.gt_u |
[i64,i64] -> i32 |
i64.le_s |
[i64,i64] -> i32 |
i64.le_u |
[i64,i64] -> i32 |
i64.ge_s |
[i64,i64] -> i32 |
i64.ge_u |
[i64,i64] -> i32 |
i64.clz |
[i64] -> i32 |
i64.ctz |
[i64] -> i32 |
i64.popcnt |
[i64] -> i32 |
i64.add |
[i64,i64] -> i64 |
i64.sub |
[i64,i64] -> i64 |
i64.mul |
[i64,i64] -> i64 |
i64.div_s |
[i64,i64] -> i64 |
i64.div_u |
[i64,i64] -> i64 |
i64.rem_s |
[i64,i64] -> i64 |
i64.rem_u |
[i64,i64] -> i64 |
i64.and |
[i64,i64] -> i64 |
i64.or |
[i64,i64] -> i64 |
i64.xor |
[i64,i64] -> i64 |
i64.shl |
[i64,i64] -> i64 |
i64.shr_s |
[i64,i64] -> i64 |
i64.shr_u |
[i64,i64] -> i64 |
i64.rotl |
[i64,i64] -> i64 |
i64.rotr |
[i64,i64] -> i64 |
Op | Signature |
---|---|
f64.eq |
[f64,f64] -> i32 |
f64.ne |
[f64,f64] -> i32 |
f64.lt |
[f64,f64] -> i32 |
f64.gt |
[f64,f64] -> i32 |
f64.le |
[f64,f64] -> i32 |
f64.ge |
[f64,f64] -> i32 |
f64.abs |
[f64] -> f64 |
f64.neg |
[f64] -> f64 |
f64.ceil |
[f64] -> f64 |
f64.floor |
[f64] -> f64 |
f64.trunc |
[f64] -> f64 |
f64.nearest |
[f64] -> f64 |
f64.sqrt |
[f64] -> f64 |
f64.add |
[f64,f64] -> f64 |
f64.sub |
[f64,f64] -> f64 |
f64.mul |
[f64,f64] -> f64 |
f64.div |
[f64,f64] -> f64 |
f64.min |
[f64,f64] -> f64 |
f64.max |
[f64,f64] -> f64 |
f64.copysign |
[f64,f64] -> f64 |
Op | Signature |
---|---|
i64.trunc_f64_s |
[f64] -> i64 |
i64.trunc_f64_u |
[f64] -> i64 |
f64.convert_i64_s |
[i64] -> f64 |
f64.convert_i64_u |
[i64] -> f64 |
f64.reinterpret_i64 |
[i64] -> f64 |
i64.reinterpret_f64 |
[f64] -> i64 |
wasm minimal
unary, 8 ops
i64.eqz
i64.clz
i64.ctz
i64.popcnt
f64.abs
f64.neg
f64.convert_i64_s
i64.trunc_f64_u
f64.reinterpret_i64
i64.reinterpret_f64
Binary ops, 22 ops
EQL
i64.eq
f64.eq
NEQ
i64.ne
f64.ne
LTH
i64.lt_u
f64.lt
LTE
i64.le_u
f64.le
GTH
i64.gt_u
f64.ge
GTE
i64.ge_u
f64.gt
ADD
i64.add
f64.add
SUB
i64.sub
f64.sub
MUL
i64.mul
f64.mul
DIV
i64.div_u
f64.div
REM
i64.rem_u
AND
i64.add
ORR
i64.or
XOR
i64.xor
SHL
i64.shl_u
SHR
i64.shr
ROR
i64.rotr
ROL
i64.rotl
MIN
f64.min
MAX
f64.max
SGN
f64.copysign
RND