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Raw
a
nir_opt_move
shader: MESA_SHADER_FRAGMENT
source_blake3: {0x748ac0b0, 0x8ea552e2, 0xee8e5421, 0x98ab53fb, 0xe7aeb20a, 0xde80bdc3, 0x3213cbfa, 0xd1897db0}
num_ubos: 1
outputs_written: 4
system_values_read: 0x00000000'00000000'00000000'00080000
api_subgroup_size: 32
max_subgroup_size: 32
min_subgroup_size: 32
bit_sizes_float: 0x20
bit_sizes_int: 0x21
known_interpolation_qualifiers: true
flrp_lowered: true
origin_upper_left: true
scratch: 512
decl_var shader_out INTERP_MODE_NONE none vec4 _GLF_color (FRAG_RESULT_DATA0.xyzw, 0, 0)
decl_var ubo INTERP_MODE_NONE none buf0 #0 (~0, 0, 0)
decl_function main () (entrypoint)
impl main {
con block b0: // preds:
con 32 %0 = load_const (0x00000001)
con 32 %1 = load_const (0x00000000 = 0.000000)
con 32 %2 = load_const (0x00000002)
con 32 %3 = load_const (0x00000008)
con 32x4 %4 = load_const (0x00000001, 0x00000001, 0x00000001, 0x00000001) = (0.000000, 0.000000, 0.000000, 0.000000)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=0, align_mul=1073741824, align_offset=0)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=16, align_mul=1073741824, align_offset=16)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=32, align_mul=1073741824, align_offset=32)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=48, align_mul=1073741824, align_offset=48)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=64, align_mul=1073741824, align_offset=64)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=80, align_mul=1073741824, align_offset=80)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=96, align_mul=1073741824, align_offset=96)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=112, align_mul=1073741824, align_offset=112)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=128, align_mul=1073741824, align_offset=128)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=144, align_mul=1073741824, align_offset=144)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=160, align_mul=1073741824, align_offset=160)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=176, align_mul=1073741824, align_offset=176)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=192, align_mul=1073741824, align_offset=192)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=208, align_mul=1073741824, align_offset=208)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=224, align_mul=1073741824, align_offset=224)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=240, align_mul=1073741824, align_offset=240)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=256, align_mul=1073741824, align_offset=256)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=272, align_mul=1073741824, align_offset=272)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=288, align_mul=1073741824, align_offset=288)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=304, align_mul=1073741824, align_offset=304)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=320, align_mul=1073741824, align_offset=320)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=336, align_mul=1073741824, align_offset=336)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=352, align_mul=1073741824, align_offset=352)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=368, align_mul=1073741824, align_offset=368)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=384, align_mul=1073741824, align_offset=384)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=400, align_mul=1073741824, align_offset=400)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=416, align_mul=1073741824, align_offset=416)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=432, align_mul=1073741824, align_offset=432)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=448, align_mul=1073741824, align_offset=448)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=464, align_mul=1073741824, align_offset=464)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=480, align_mul=1073741824, align_offset=480)
@store_scratch_nv (%4 (0x1, 0x1, 0x1, 0x1), %1 (0x0)) (base=496, align_mul=1073741824, align_offset=496)
con 1 %5 = load_const (true)
con 1 %6 = load_const (false)
// succs: b1
con loop {
con block b1: // preds: b0 b18
con 32 %7 = phi b0: %0 (0x1), b18: %21
div 32 %8 = phi b0: %0 (0x1), b18: %11
// succs: b2
con loop {
con block b2: // preds: b1 b10 b14
con 1 %9 = phi b1: %6 (false), b10: %5 (true), b14: %5 (true)
con 32 %10 = phi b1: %0 (0x1), b10: %13, b14: %13
div 32 %11 = phi b1: %8, b10: %11, b14: %20
// succs: b3 b4
if %9 {
con block b3: // preds: b2
con 32 %12 = iadd %10, %0 (0x1)
// succs: b5
} else {
con block b4: // preds: b2, succs: b5
}
con block b5: // preds: b3 b4
con 32 %13 = phi b3: %12, b4: %10
con 1 %14 = ige %13, %3 (0x8)
// succs: b6 b7
if %14 {
con block b6:// preds: b5
break
// succs: b15
} else {
con block b7: // preds: b5, succs: b8
}
con block b8: // preds: b7
con 32 %15 = ishl %13, %2 (0x2)
div 32 %16 = @load_scratch_nv (%15) (base=0, access=none, align_mul=4, align_offset=0)
div 1 %17 = ieq %16, %0 (0x1)
// succs: b9 b13
if %17 {
div block b9: // preds: b8
div 32 %18 = @ipa_nv (%1 (0x0), %1 (0x0)) (base=112, flags=1)
div 1 %19 = flt %18, %1 (0.000000) // preserve:inf,nan
// succs: b10 b11
if %19 {
div block b10:// preds: b9
continue
// succs: b2
} else {
div block b11: // preds: b9, succs: b12
}
div block b12: // preds: b11, succs: b14
} else {
div block b13: // preds: b8, succs: b14
}
div block b14: // preds: b12 b13
div 32 %20 = phi b12: %7, b13: %11
// succs: b2
}
con block b15: // preds: b6
con 32 %21 = iadd %7, %0 (0x1)
con 1 %22 = ige %21, %3 (0x8)
// succs: b16 b17
if %22 {
con block b16:// preds: b15
break
// succs: b19
} else {
con block b17: // preds: b15, succs: b18
}
con block b18: // preds: b17, succs: b1
}
con block b19: // preds: b16
div 32 %23 = ishl %11, %2 (0x2)
@store_scratch_nv (%1 (0x0), %23) (base=4, align_mul=4, align_offset=0)
div 32 %24 = @load_scratch_nv (%1 (0x0)) (base=32, access=none, align_mul=1073741824, align_offset=32)
con 32 %25 = @ldc_nv (%0 (0x1), %1 (0x0)) (base=0, access=none, align_mul=64, align_offset=0)
con 32 %26 = i2f32 %25
div 1 %27 = ieq %24, %1 (0x0)
// succs: b20 b21
if %27 {
div block b20: // preds: b19
con 32 %28 = @ldc_nv (%0 (0x1), %1 (0x0)) (base=16, access=none, align_mul=64, align_offset=16)
con 32 %29 = i2f32 %28
con 32 %30 = load_const (0x3f800000 = 1.000000)
// succs: b22
} else {
div block b21: // preds: b19, succs: b22
}
con block b22: // preds: b20 b21
div 32 %31 = phi b20: %30 (1.000000), b21: %26
div 32 %32 = phi b20: %29, b21: %26
@fs_out_nv (%31) (base=0)
@fs_out_nv (%26) (base=4)
@fs_out_nv (%26) (base=8)
@fs_out_nv (%32) (base=12)
@copy_fs_outputs_nv
// succs: b23
block b23:
}
Raw
b
nak_nir_rematerialize_load_const
shader: MESA_SHADER_FRAGMENT
source_blake3: {0x748ac0b0, 0x8ea552e2, 0xee8e5421, 0x98ab53fb, 0xe7aeb20a, 0xde80bdc3, 0x3213cbfa, 0xd1897db0}
num_ubos: 1
outputs_written: 4
system_values_read: 0x00000000'00000000'00000000'00080000
api_subgroup_size: 32
max_subgroup_size: 32
min_subgroup_size: 32
bit_sizes_float: 0x20
bit_sizes_int: 0x21
known_interpolation_qualifiers: true
flrp_lowered: true
origin_upper_left: true
scratch: 512
decl_var shader_out INTERP_MODE_NONE none vec4 _GLF_color (FRAG_RESULT_DATA0.xyzw, 0, 0)
decl_var ubo INTERP_MODE_NONE none buf0 #0 (~0, 0, 0)
decl_function main () (entrypoint)
impl main {
con block b0: // preds:
con 32 %0 = load_const (0x00000001 = 0.000000)
con 32 %1 = load_const (0x00000000 = 0.000000)
con 32 %2 = load_const (0x00000002 = 0.000000)
con 32 %3 = load_const (0x00000008 = 0.000000)
con 32x4 %4 = load_const (0x00000001, 0x00000001, 0x00000001, 0x00000001) = (0.000000, 0.000000, 0.000000, 0.000000)
con 32x4 %5 = load_const (0x00000001, 0x00000001, 0x00000001, 0x00000001) = (0.000000, 0.000000, 0.000000, 0.000000)
con 32 %6 = load_const (0x00000000)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=0, align_mul=1073741824, align_offset=0)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=16, align_mul=1073741824, align_offset=16)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=32, align_mul=1073741824, align_offset=32)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=48, align_mul=1073741824, align_offset=48)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=64, align_mul=1073741824, align_offset=64)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=80, align_mul=1073741824, align_offset=80)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=96, align_mul=1073741824, align_offset=96)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=112, align_mul=1073741824, align_offset=112)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=128, align_mul=1073741824, align_offset=128)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=144, align_mul=1073741824, align_offset=144)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=160, align_mul=1073741824, align_offset=160)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=176, align_mul=1073741824, align_offset=176)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=192, align_mul=1073741824, align_offset=192)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=208, align_mul=1073741824, align_offset=208)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=224, align_mul=1073741824, align_offset=224)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=240, align_mul=1073741824, align_offset=240)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=256, align_mul=1073741824, align_offset=256)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=272, align_mul=1073741824, align_offset=272)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=288, align_mul=1073741824, align_offset=288)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=304, align_mul=1073741824, align_offset=304)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=320, align_mul=1073741824, align_offset=320)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=336, align_mul=1073741824, align_offset=336)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=352, align_mul=1073741824, align_offset=352)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=368, align_mul=1073741824, align_offset=368)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=384, align_mul=1073741824, align_offset=384)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=400, align_mul=1073741824, align_offset=400)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=416, align_mul=1073741824, align_offset=416)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=432, align_mul=1073741824, align_offset=432)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=448, align_mul=1073741824, align_offset=448)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=464, align_mul=1073741824, align_offset=464)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=480, align_mul=1073741824, align_offset=480)
@store_scratch_nv (%5 (0x1, 0x1, 0x1, 0x1), %6 (0x0)) (base=496, align_mul=1073741824, align_offset=496)
con 1 %7 = load_const (true)
con 1 %8 = load_const (false)
con 32 %9 = load_const (0x00000001)
// succs: b1
con loop {
con block b1: // preds: b0 b18
con 32 %10 = phi b0: %9 (0x1), b18: %34
div 32 %11 = phi b0: %9 (0x1), b18: %16
con 1 %12 = load_const (false)
con 32 %13 = load_const (0x00000001)
// succs: b2
div loop {
div block b2: // preds: b1 b10 b14
div 1 %14 = phi b1: %12 (false), b10: %30 (true), b14: %32 (true)
div 32 %15 = phi b1: %13 (0x1), b10: %19, b14: %19
div 32 %16 = phi b1: %11, b10: %16, b14: %31
// succs: b3 b4
if %14 {
div block b3: // preds: b2
con 32 %17 = load_const (0x00000001)
div 32 %18 = iadd %15, %17 (0x1)
// succs: b5
} else {
div block b4: // preds: b2, succs: b5
}
div block b5: // preds: b3 b4
div 32 %19 = phi b3: %18, b4: %15
con 32 %20 = load_const (0x00000008)
div 1 %21 = ige %19, %20 (0x8)
// succs: b6 b7
if %21 {
div block b6:// preds: b5
break
// succs: b15
} else {
div block b7: // preds: b5, succs: b8
}
div block b8: // preds: b7
con 32 %22 = load_const (0x00000002)
div 32 %23 = ishl %19, %22 (0x2)
div 32 %24 = @load_scratch_nv (%23) (base=0, access=none, align_mul=4, align_offset=0)
con 32 %25 = load_const (0x00000001)
div 1 %26 = ieq %24, %25 (0x1)
// succs: b9 b13
if %26 {
div block b9: // preds: b8
con 32 %27 = load_const (0x00000000 = 0.000000)
div 32 %28 = @ipa_nv (%27 (0.000000), %27 (0.000000)) (base=112, flags=1)
div 1 %29 = flt %28, %27 (0.000000) // preserve:inf,nan
// succs: b10 b11
if %29 {
div block b10: // preds: b9
con 1 %30 = load_const (true)
continue
// succs: b2
} else {
div block b11: // preds: b9, succs: b12
}
div block b12: // preds: b11, succs: b14
} else {
div block b13: // preds: b8, succs: b14
}
div block b14: // preds: b12 b13
div 32 %31 = phi b12: %10, b13: %16
con 1 %32 = load_const (true)
// succs: b2
}
con block b15: // preds: b6
con 32 %33 = load_const (0x00000001)
con 32 %34 = iadd %10, %33 (0x1)
con 32 %35 = load_const (0x00000008)
con 1 %36 = ige %34, %35 (0x8)
// succs: b16 b17
if %36 {
con block b16:// preds: b15
break
// succs: b19
} else {
con block b17: // preds: b15, succs: b18
}
con block b18: // preds: b17, succs: b1
}
con block b19: // preds: b16
con 32 %37 = load_const (0x00000002)
div 32 %38 = ishl %16, %37 (0x2)
con 32 %39 = load_const (0x00000000)
@store_scratch_nv (%39 (0x0), %38) (base=4, align_mul=4, align_offset=0)
div 32 %40 = @load_scratch_nv (%39 (0x0)) (base=32, access=none, align_mul=1073741824, align_offset=32)
con 32 %41 = load_const (0x00000001 = 0.000000)
con 32 %42 = @ldc_nv (%41 (0x1), %39 (0x0)) (base=0, access=none, align_mul=64, align_offset=0)
con 32 %43 = i2f32 %42
div 1 %44 = ieq %40, %39 (0x0)
// succs: b20 b21
if %44 {
div block b20: // preds: b19
con 32 %45 = load_const (0x00000001 = 0.000000)
con 32 %46 = load_const (0x00000000)
con 32 %47 = @ldc_nv (%45 (0x1), %46 (0x0)) (base=16, access=none, align_mul=64, align_offset=16)
con 32 %48 = i2f32 %47
con 32 %49 = load_const (0x3f800000 = 1.000000 = 1065353216)
con 32 %50 = load_const (0x3f800000 = 1.000000)
// succs: b22
} else {
div block b21: // preds: b19, succs: b22
}
con block b22: // preds: b20 b21
div 32 %51 = phi b20: %50 (1.000000), b21: %43
div 32 %52 = phi b20: %48, b21: %43
@fs_out_nv (%51) (base=0)
@fs_out_nv (%43) (base=4)
@fs_out_nv (%43) (base=8)
@fs_out_nv (%52) (base=12)
@copy_fs_outputs_nv
// succs: b23
block b23:
}
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