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kategray/ghettio.v

Created October 14, 2017 16:44
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GHETT-iO Verilog
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ghettio.v
// ======================================================================
// GHETT-iO.v generated from TopDesign.cysch
// 10/13/2017 at 21:35
// This file is auto generated. ANY EDITS YOU MAKE MAY BE LOST WHEN THIS FILE IS REGENERATED!!!
// ======================================================================
/* -- WARNING: The following section of defines are deprecated and will be removed in a future release -- */
`define CYDEV_CHIP_DIE_LEOPARD 1
`define CYDEV_CHIP_REV_LEOPARD_PRODUCTION 3
`define CYDEV_CHIP_REV_LEOPARD_ES3 3
`define CYDEV_CHIP_REV_LEOPARD_ES2 1
`define CYDEV_CHIP_REV_LEOPARD_ES1 0
`define CYDEV_CHIP_DIE_PSOC5LP 2
`define CYDEV_CHIP_REV_PSOC5LP_PRODUCTION 0
`define CYDEV_CHIP_REV_PSOC5LP_ES0 0
`define CYDEV_CHIP_DIE_PSOC5TM 3
`define CYDEV_CHIP_REV_PSOC5TM_PRODUCTION 1
`define CYDEV_CHIP_REV_PSOC5TM_ES1 1
`define CYDEV_CHIP_REV_PSOC5TM_ES0 0
`define CYDEV_CHIP_DIE_TMA4 4
`define CYDEV_CHIP_REV_TMA4_PRODUCTION 17
`define CYDEV_CHIP_REV_TMA4_ES 17
`define CYDEV_CHIP_REV_TMA4_ES2 33
`define CYDEV_CHIP_DIE_PSOC4A 5
`define CYDEV_CHIP_REV_PSOC4A_PRODUCTION 17
`define CYDEV_CHIP_REV_PSOC4A_ES0 17
`define CYDEV_CHIP_DIE_PSOC6ABLE2 6
`define CYDEV_CHIP_REV_PSOC6ABLE2_PRODUCTION 0
`define CYDEV_CHIP_REV_PSOC6ABLE2_NO_UDB 0
`define CYDEV_CHIP_DIE_VOLANS 7
`define CYDEV_CHIP_REV_VOLANS_PRODUCTION 0
`define CYDEV_CHIP_DIE_BERRYPECKER 8
`define CYDEV_CHIP_REV_BERRYPECKER_PRODUCTION 0
`define CYDEV_CHIP_DIE_CRANE 9
`define CYDEV_CHIP_REV_CRANE_PRODUCTION 0
`define CYDEV_CHIP_DIE_FM3 10
`define CYDEV_CHIP_REV_FM3_PRODUCTION 0
`define CYDEV_CHIP_DIE_FM4 11
`define CYDEV_CHIP_REV_FM4_PRODUCTION 0
`define CYDEV_CHIP_DIE_EXPECT 2
`define CYDEV_CHIP_REV_EXPECT 0
`define CYDEV_CHIP_DIE_ACTUAL 2
/* -- WARNING: The previous section of defines are deprecated and will be removed in a future release -- */
`define CYDEV_CHIP_FAMILY_PSOC3 1
`define CYDEV_CHIP_FAMILY_PSOC4 2
`define CYDEV_CHIP_FAMILY_PSOC5 3
`define CYDEV_CHIP_FAMILY_PSOC6 4
`define CYDEV_CHIP_FAMILY_FM0P 5
`define CYDEV_CHIP_FAMILY_FM3 6
`define CYDEV_CHIP_FAMILY_FM4 7
`define CYDEV_CHIP_FAMILY_UNKNOWN 0
`define CYDEV_CHIP_MEMBER_UNKNOWN 0
`define CYDEV_CHIP_MEMBER_3A 1
`define CYDEV_CHIP_REVISION_3A_PRODUCTION 3
`define CYDEV_CHIP_REVISION_3A_ES3 3
`define CYDEV_CHIP_REVISION_3A_ES2 1
`define CYDEV_CHIP_REVISION_3A_ES1 0
`define CYDEV_CHIP_MEMBER_5B 2
`define CYDEV_CHIP_REVISION_5B_PRODUCTION 0
`define CYDEV_CHIP_REVISION_5B_ES0 0
`define CYDEV_CHIP_MEMBER_5A 3
`define CYDEV_CHIP_REVISION_5A_PRODUCTION 1
`define CYDEV_CHIP_REVISION_5A_ES1 1
`define CYDEV_CHIP_REVISION_5A_ES0 0
`define CYDEV_CHIP_MEMBER_4G 4
`define CYDEV_CHIP_REVISION_4G_PRODUCTION 17
`define CYDEV_CHIP_REVISION_4G_ES 17
`define CYDEV_CHIP_REVISION_4G_ES2 33
`define CYDEV_CHIP_MEMBER_4U 5
`define CYDEV_CHIP_REVISION_4U_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4E 6
`define CYDEV_CHIP_REVISION_4E_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4O 7
`define CYDEV_CHIP_REVISION_4O_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4R 8
`define CYDEV_CHIP_REVISION_4R_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4N 9
`define CYDEV_CHIP_REVISION_4N_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4S 10
`define CYDEV_CHIP_REVISION_4S_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4Q 11
`define CYDEV_CHIP_REVISION_4Q_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4D 12
`define CYDEV_CHIP_REVISION_4D_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4J 13
`define CYDEV_CHIP_REVISION_4J_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4K 14
`define CYDEV_CHIP_REVISION_4K_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4H 15
`define CYDEV_CHIP_REVISION_4H_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4A 16
`define CYDEV_CHIP_REVISION_4A_PRODUCTION 17
`define CYDEV_CHIP_REVISION_4A_ES0 17
`define CYDEV_CHIP_MEMBER_4F 17
`define CYDEV_CHIP_REVISION_4F_PRODUCTION 0
`define CYDEV_CHIP_REVISION_4F_PRODUCTION_256K 0
`define CYDEV_CHIP_REVISION_4F_PRODUCTION_256DMA 0
`define CYDEV_CHIP_MEMBER_4P 18
`define CYDEV_CHIP_REVISION_4P_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4M 19
`define CYDEV_CHIP_REVISION_4M_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4L 20
`define CYDEV_CHIP_REVISION_4L_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_4I 21
`define CYDEV_CHIP_REVISION_4I_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_6A 22
`define CYDEV_CHIP_REVISION_6A_PRODUCTION 0
`define CYDEV_CHIP_REVISION_6A_NO_UDB 0
`define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE1 23
`define CYDEV_CHIP_REVISION_PDL_FM0P_TYPE1_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE2 24
`define CYDEV_CHIP_REVISION_PDL_FM0P_TYPE2_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_PDL_FM0P_TYPE3 25
`define CYDEV_CHIP_REVISION_PDL_FM0P_TYPE3_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_FM3 26
`define CYDEV_CHIP_REVISION_FM3_PRODUCTION 0
`define CYDEV_CHIP_MEMBER_FM4 27
`define CYDEV_CHIP_REVISION_FM4_PRODUCTION 0
`define CYDEV_CHIP_FAMILY_USED 3
`define CYDEV_CHIP_MEMBER_USED 2
`define CYDEV_CHIP_REVISION_USED 0
// Component: Debouncer_v1_0
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\Debouncer_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\Debouncer_v1_0\Debouncer_v1_0.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\Debouncer_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyComponentLibrary\CyComponentLibrary.cylib\Debouncer_v1_0\Debouncer_v1_0.v"
`endif
// Component: nand_v1_0
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\nand_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\nand_v1_0\nand_v1_0.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\nand_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\nand_v1_0\nand_v1_0.v"
`endif
// Component: CyStatusReg_v1_90
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyStatusReg_v1_90"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyStatusReg_v1_90\CyStatusReg_v1_90.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyStatusReg_v1_90"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyStatusReg_v1_90\CyStatusReg_v1_90.v"
`endif
// Component: cy_constant_v1_0
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_constant_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_constant_v1_0\cy_constant_v1_0.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_constant_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_constant_v1_0\cy_constant_v1_0.v"
`endif
// Component: cy_virtualmux_v1_0
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_virtualmux_v1_0\cy_virtualmux_v1_0.v"
`endif
// Component: ZeroTerminal
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\ZeroTerminal\ZeroTerminal.v"
`endif
// Component: cy_sync_v1_0
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_sync_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_sync_v1_0\cy_sync_v1_0.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_sync_v1_0"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\cy_sync_v1_0\cy_sync_v1_0.v"
`endif
// USBFS_v3_10(AudioDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="Audio">\r\n <Nodes />\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, CDCDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="CDC">\r\n <Nodes />\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, DeviceDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="Device">\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor490">\r\n <m_value d6p1:type="DeviceDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>DEVICE</bDescriptorType>\r\n <bLength>18</bLength>\r\n <iwManufacturer>488</iwManufacturer>\r\n <iwProduct>489</iwProduct>\r\n <sManufacturer>Kate Gray</sManufacturer>\r\n <sProduct>GHETT-iO</sProduct>\r\n <sSerialNumber />\r\n <bDeviceClass>0</bDeviceClass>\r\n <bDeviceSubClass>0</bDeviceSubClass>\r\n <bDeviceProtocol>0</bDeviceProtocol>\r\n <bMaxPacketSize0>0</bMaxPacketSize0>\r\n <idVendor>5840</idVendor>\r\n <idProduct>3330</idProduct>\r\n <bcdDevice>528</bcdDevice>\r\n <bcdUSB>512</bcdUSB>\r\n <iManufacturer>1</iManufacturer>\r\n <iProduct>2</iProduct>\r\n <iSerialNumber>0</iSerialNumber>\r\n <bNumConfigurations>1</bNumConfigurations>\r\n <bMemoryMgmt>0</bMemoryMgmt>\r\n <bMemoryAlloc>0</bMemoryAlloc>\r\n </m_value>\r\n <Value d6p1:type="DeviceDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>DEVICE</bDescriptorType>\r\n <bLength>18</bLength>\r\n <iwManufacturer>488</iwManufacturer>\r\n <iwProduct>489</iwProduct>\r\n <sManufacturer>Kate Gray</sManufacturer>\r\n <sProduct>GHETT-iO</sProduct>\r\n <sSerialNumber />\r\n <bDeviceClass>0</bDeviceClass>\r\n <bDeviceSubClass>0</bDeviceSubClass>\r\n <bDeviceProtocol>0</bDeviceProtocol>\r\n <bMaxPacketSize0>0</bMaxPacketSize0>\r\n <idVendor>5840</idVendor>\r\n <idProduct>3330</idProduct>\r\n <bcdDevice>528</bcdDevice>\r\n <bcdUSB>512</bcdUSB>\r\n <iManufacturer>1</iManufacturer>\r\n <iProduct>2</iProduct>\r\n <iSerialNumber>0</iSerialNumber>\r\n <bNumConfigurations>1</bNumConfigurations>\r\n <bMemoryMgmt>0</bMemoryMgmt>\r\n <bMemoryAlloc>0</bMemoryAlloc>\r\n </Value>\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor495">\r\n <m_value d8p1:type="ConfigDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>CONFIGURATION</bDescriptorType>\r\n <bLength>9</bLength>\r\n <iwConfiguration>542</iwConfiguration>\r\n <sConfiguration>v2.10</sConfiguration>\r\n <wTotalLength>34</wTotalLength>\r\n <bNumInterfaces>1</bNumInterfaces>\r\n <bConfigurationValue>0</bConfigurationValue>\r\n <iConfiguration>3</iConfiguration>\r\n <bmAttributes>128</bmAttributes>\r\n <bMaxPower>250</bMaxPower>\r\n </m_value>\r\n <Value d8p1:type="ConfigDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>CONFIGURATION</bDescriptorType>\r\n <bLength>9</bLength>\r\n <iwConfiguration>542</iwConfiguration>\r\n <sConfiguration>v2.10</sConfiguration>\r\n <wTotalLength>34</wTotalLength>\r\n <bNumInterfaces>1</bNumInterfaces>\r\n <bConfigurationValue>0</bConfigurationValue>\r\n <iConfiguration>3</iConfiguration>\r\n <bmAttributes>128</bmAttributes>\r\n <bMaxPower>250</bMaxPower>\r\n </Value>\r\n <Nodes>\r\n <DescriptorNode Key="Interface499">\r\n <m_value d10p1:type="InterfaceGeneralDescriptor" xmlns:d10p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>ALTERNATE</bDescriptorType>\r\n <bLength>0</bLength>\r\n <DisplayName />\r\n </m_value>\r\n <Value d10p1:type="InterfaceGeneralDescriptor" xmlns:d10p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>ALTERNATE</bDescriptorType>\r\n <bLength>0</bLength>\r\n <DisplayName />\r\n </Value>\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor500">\r\n <m_value d12p1:type="InterfaceDescriptor" xmlns:d12p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>INTERFACE</bDescriptorType>\r\n <bLength>9</bLength>\r\n <iwInterface>0</iwInterface>\r\n <bInterfaceClass>3</bInterfaceClass>\r\n <bAlternateSetting>0</bAlternateSetting>\r\n <bInterfaceNumber>0</bInterfaceNumber>\r\n <bNumEndpoints>1</bNumEndpoints>\r\n <bInterfaceSubClass>0</bInterfaceSubClass>\r\n <bInterfaceProtocol>0</bInterfaceProtocol>\r\n <iInterface>0</iInterface>\r\n </m_value>\r\n <Value d12p1:type="InterfaceDescriptor" xmlns:d12p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>INTERFACE</bDescriptorType>\r\n <bLength>9</bLength>\r\n <iwInterface>0</iwInterface>\r\n <bInterfaceClass>3</bInterfaceClass>\r\n <bAlternateSetting>0</bAlternateSetting>\r\n <bInterfaceNumber>0</bInterfaceNumber>\r\n <bNumEndpoints>1</bNumEndpoints>\r\n <bInterfaceSubClass>0</bInterfaceSubClass>\r\n <bInterfaceProtocol>0</bInterfaceProtocol>\r\n <iInterface>0</iInterface>\r\n </Value>\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor502">\r\n <m_value d14p1:type="HIDDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID</bDescriptorType>\r\n <bLength>9</bLength>\r\n <bReportIndex>1</bReportIndex>\r\n <wReportIndex>517</wReportIndex>\r\n <bcdHID>0</bcdHID>\r\n <bCountryCode>33</bCountryCode>\r\n <bNumDescriptors>1</bNumDescriptors>\r\n <bDescriptorType1>34</bDescriptorType1>\r\n <wDescriptorLength>47</wDescriptorLength>\r\n </m_value>\r\n <Value d14p1:type="HIDDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID</bDescriptorType>\r\n <bLength>9</bLength>\r\n <bReportIndex>1</bReportIndex>\r\n <wReportIndex>517</wReportIndex>\r\n <bcdHID>0</bcdHID>\r\n <bCountryCode>33</bCountryCode>\r\n <bNumDescriptors>1</bNumDescriptors>\r\n <bDescriptorType1>34</bDescriptorType1>\r\n <wDescriptorLength>47</wDescriptorLength>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor503">\r\n <m_value d14p1:type="EndpointDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>ENDPOINT</bDescriptorType>\r\n <bLength>7</bLength>\r\n <DoubleBuffer>false</DoubleBuffer>\r\n <bInterval>1</bInterval>\r\n <bEndpointAddress>129</bEndpointAddress>\r\n <bmAttributes>3</bmAttributes>\r\n <wMaxPacketSize>1</wMaxPacketSize>\r\n </m_value>\r\n <Value d14p1:type="EndpointDescriptor" xmlns:d14p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>ENDPOINT</bDescriptorType>\r\n <bLength>7</bLength>\r\n <DoubleBuffer>false</DoubleBuffer>\r\n <bInterval>1</bInterval>\r\n <bEndpointAddress>129</bEndpointAddress>\r\n <bmAttributes>3</bmAttributes>\r\n <wMaxPacketSize>1</wMaxPacketSize>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, DmaChannelPriority=0, DW_Hide_DmaAuto=false, DW_Hide_Usbv2Regs=true, DW_RegSize=8, DW_USB_CHGDET_CTRL=CR0, DW_USB_INTR_CAUSE_HI=CR0, DW_USB_INTR_CAUSE_LO=CR0, DW_USB_INTR_CAUSE_MED=CR0, DW_USB_INTR_LVL_SEL=CR0, DW_USB_INTR_SIE=CR0, DW_USB_INTR_SIE_MASK=CR0, DW_USB_LPM_CTRL=CR0, DW_USB_LPM_STAT=CR0, DW_USB_POWER_CTRL=CR0, EnableBatteryChargDetect=false, EnableCDCApi=true, EnableMidiApi=true, endpointMA=0, endpointMM=2, epDMAautoOptimization=false, extern_cls=false, extern_vbus=true, extern_vnd=false, extJackCount=0, Gen16bitEpAccessApi=false, HandleMscRequests=true, HIDReportDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="HIDReport">\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor517">\r\n <m_value d6p1:type="HIDReportDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT</bDescriptorType>\r\n <bLength>2</bLength>\r\n <Name>ITGIO</Name>\r\n <wLength>47</wLength>\r\n </m_value>\r\n <Value d6p1:type="HIDReportDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT</bDescriptorType>\r\n <bLength>2</bLength>\r\n <Name>ITGIO</Name>\r\n <wLength>47</wLength>\r\n </Value>\r\n <Nodes>\r\n <DescriptorNode Key="USBDescriptor518">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="4" Type="USAGE_PAGE">\r\n <Description>(Generic Desktop Controls)</Description>\r\n <Value>\r\n <unsignedByte>5</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>List</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" 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<bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="8" Type="USAGE">\r\n <Description>(Game Pad)</Description>\r\n <Value>\r\n <unsignedByte>9</unsignedByte>\r\n <unsignedByte>5</unsignedByte>\r\n </Value>\r\n <Kind>List</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor520">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="160" Type="COLLECTION">\r\n <Description>(Application)</Description>\r\n <Value>\r\n <unsignedByte>161</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>List</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="160" 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<unsignedByte>5</unsignedByte>\r\n <unsignedByte>9</unsignedByte>\r\n </Value>\r\n <Kind>List</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor522">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="24" Type="USAGE_MINIMUM">\r\n <Description>(1)</Description>\r\n <Value>\r\n <unsignedByte>25</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="24" Type="USAGE_MINIMUM">\r\n <Description>(1)</Description>\r\n <Value>\r\n <unsignedByte>25</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor523">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="40" Type="USAGE_MAXIMUM">\r\n <Description>(4)</Description>\r\n <Value>\r\n <unsignedByte>41</unsignedByte>\r\n <unsignedByte>4</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="40" Type="USAGE_MAXIMUM">\r\n <Description>(4)</Description>\r\n <Value>\r\n <unsignedByte>41</unsignedByte>\r\n <unsignedByte>4</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor524">\r\n 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/>\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor535">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="36" Type="LOGICAL_MAXIMUM">\r\n <Description>(255)</Description>\r\n <Value>\r\n <unsignedByte>38</unsignedByte>\r\n <unsignedByte>255</unsignedByte>\r\n <unsignedByte>0</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="36" Type="LOGICAL_MAXIMUM">\r\n <Description>(255)</Description>\r\n <Value>\r\n <unsignedByte>38</unsignedByte>\r\n <unsignedByte>255</unsignedByte>\r\n <unsignedByte>0</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n 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xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="116" Type="REPORT_SIZE">\r\n <Description>(8)</Description>\r\n <Value>\r\n <unsignedByte>117</unsignedByte>\r\n <unsignedByte>8</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="116" Type="REPORT_SIZE">\r\n <Description>(8)</Description>\r\n <Value>\r\n <unsignedByte>117</unsignedByte>\r\n <unsignedByte>8</unsignedByte>\r\n </Value>\r\n <Kind>Int</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor538">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="176" Type="FEATURE">\r\n <Description>(Var, Buf)</Description>\r\n <Value>\r\n <unsignedByte>178</unsignedByte>\r\n <unsignedByte>2</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>Bits</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="176" Type="FEATURE">\r\n <Description>(Var, Buf)</Description>\r\n <Value>\r\n <unsignedByte>178</unsignedByte>\r\n <unsignedByte>2</unsignedByte>\r\n <unsignedByte>1</unsignedByte>\r\n </Value>\r\n <Kind>Bits</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor539">\r\n <m_value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="192" Type="END_COLLECTION">\r\n <Description />\r\n <Value>\r\n <unsignedByte>192</unsignedByte>\r\n </Value>\r\n <Kind>None</Kind>\r\n </Item>\r\n </m_value>\r\n <Value d8p1:type="HIDReportItemDescriptor" xmlns:d8p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>HID_REPORT_ITEM</bDescriptorType>\r\n <bLength>1</bLength>\r\n <Item Code="192" Type="END_COLLECTION">\r\n <Description />\r\n <Value>\r\n <unsignedByte>192</unsignedByte>\r\n </Value>\r\n <Kind>None</Kind>\r\n </Item>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, isrGroupArbiter=0, isrGroupBusReset=2, isrGroupEp0=1, isrGroupEp1=1, isrGroupEp2=1, isrGroupEp3=1, isrGroupEp4=1, isrGroupEp5=1, isrGroupEp6=1, isrGroupEp7=1, isrGroupEp8=1, isrGroupLpm=0, isrGroupSof=2, M0S8USBDSS_BLOCK_COUNT_1=0, max_interfaces_num=1, MidiDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="Midi">\r\n <Nodes />\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, Mode=false, mon_vbus=false, MscDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="MSC">\r\n <Nodes />\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, MscLogicalUnitsNum=1, out_sof=false, Pid=F232, powerpad_vbus=false, PRIMITIVE_INSTANCE=USB, ProdactName=, ProdactRevision=, REG_SIZE=reg8, RemoveDmaAutoOpt=false, RemoveVbusPin=true, rm_arb_int=false, rm_dma_1=false, rm_dma_2=true, rm_dma_3=true, rm_dma_4=true, rm_dma_5=true, rm_dma_6=true, rm_dma_7=true, rm_dma_8=true, rm_dp_int=false, rm_ep_isr_0=false, rm_ep_isr_1=false, rm_ep_isr_2=true, rm_ep_isr_3=true, rm_ep_isr_4=true, rm_ep_isr_5=true, rm_ep_isr_6=true, rm_ep_isr_7=true, rm_ep_isr_8=true, rm_lpm_int=true, rm_ord_int=true, rm_sof_int=true, rm_usb_int=false, SofTermEnable=false, StringDescriptors=<?xml version="1.0" encoding="utf-16"?>\r\n<Tree xmlns:CustomizerVersion="3_10">\r\n <Tree_x0020_Descriptors>\r\n <DescriptorNode Key="String">\r\n <Nodes>\r\n <DescriptorNode Key="LANGID">\r\n <m_value d6p1:type="StringZeroDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>4</bLength>\r\n <wLANGID>1033</wLANGID>\r\n </m_value>\r\n <Value d6p1:type="StringZeroDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>4</bLength>\r\n <wLANGID>1033</wLANGID>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor488">\r\n <m_value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>20</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>Kate Gray</bString>\r\n <bUsed>false</bUsed>\r\n </m_value>\r\n <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>20</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>Kate Gray</bString>\r\n <bUsed>false</bUsed>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor489">\r\n <m_value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>18</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>GHETT-iO</bString>\r\n <bUsed>false</bUsed>\r\n </m_value>\r\n <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>18</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>GHETT-iO</bString>\r\n <bUsed>false</bUsed>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="USBDescriptor542">\r\n <m_value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>12</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>v2.10</bString>\r\n <bUsed>false</bUsed>\r\n </m_value>\r\n <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>12</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>v2.10</bString>\r\n <bUsed>false</bUsed>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n <DescriptorNode Key="SpecialString">\r\n <Nodes>\r\n <DescriptorNode Key="Serial">\r\n <m_value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>2</bLength>\r\n <snType>SILICON_NUMBER</snType>\r\n <bString />\r\n <bUsed>true</bUsed>\r\n </m_value>\r\n <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>2</bLength>\r\n <snType>SILICON_NUMBER</snType>\r\n <bString />\r\n <bUsed>true</bUsed>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n <DescriptorNode Key="EE">\r\n <m_value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>16</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>MSFT100</bString>\r\n <bUsed>true</bUsed>\r\n </m_value>\r\n <Value d6p1:type="StringDescriptor" xmlns:d6p1="http://www.w3.org/2001/XMLSchema-instance">\r\n <bDescriptorType>STRING</bDescriptorType>\r\n <bLength>16</bLength>\r\n <snType>USER_ENTERED_TEXT</snType>\r\n <bString>MSFT100</bString>\r\n <bUsed>true</bUsed>\r\n </Value>\r\n <Nodes />\r\n </DescriptorNode>\r\n </Nodes>\r\n </DescriptorNode>\r\n </Tree_x0020_Descriptors>\r\n</Tree>, UINT_TYPE=uint8, VbusDetectTermEnable=false, VendorName=, Vid=04B4, CY_API_CALLBACK_HEADER_INCLUDE=#include "cyapicallbacks.h", CY_COMMENT=, CY_COMPONENT_NAME=USBFS_v3_10, CY_CONST_CONFIG=true, CY_CONTROL_FILE=<:default:>, CY_DATASHEET_FILE=<:default:>, CY_FITTER_NAME=USBFS, CY_INSTANCE_SHORT_NAME=USBFS, CY_MAJOR_VERSION=3, CY_MINOR_VERSION=10, CY_PDL_DRIVER_NAME=, CY_PDL_DRIVER_REQ_VERSION=, CY_PDL_DRIVER_SUBGROUP=, CY_PDL_DRIVER_VARIANT=, CY_REMOVE=false, CY_SUPPRESS_API_GEN=false, CY_VERSION=PSoC Creator 4.1 Update 1, INSTANCE_NAME=USBFS, )
module USBFS_v3_10_0 (
sof,
vbusdet);
output sof;
input vbusdet;
parameter epDMAautoOptimization = 0;
wire Net_1914;
wire Net_1915;
wire Net_1916;
wire Net_1917;
wire Net_1918;
wire Net_1919;
wire [7:0] dma_request;
wire Net_1920;
wire Net_1921;
wire Net_1922;
wire [7:0] Net_2039;
wire Net_2038;
wire Net_2037;
wire EPs_1_to_7_dma_complete;
wire Net_2036;
wire Net_2035;
wire Net_2034;
wire Net_2033;
wire Net_2032;
wire Net_2031;
wire Net_2030;
wire Net_2029;
wire Net_2028;
wire Net_2027;
wire Net_2026;
wire Net_2025;
wire Net_2024;
wire [7:0] Net_1940;
wire Net_1939;
wire Net_1938;
wire Net_1937;
wire Net_1936;
wire Net_1935;
wire Net_1934;
wire Net_1933;
wire Net_1932;
wire Net_2047;
wire Net_1202;
wire dma_terminate;
wire [7:0] Net_2040;
wire Net_1010;
electrical Net_1000;
electrical Net_597;
wire Net_1495;
wire Net_1498;
wire Net_1559;
wire Net_1567;
wire Net_1576;
wire Net_1579;
wire Net_1591;
wire [7:0] dma_complete;
wire Net_1588;
wire Net_1876;
wire [8:0] ep_int;
wire Net_1889;
wire busClk;
wire Net_95;
CyStatusReg_v1_90 EP17_DMA_Done_SR (
.status_0(1'b0),
.status_1(1'b0),
.status_2(1'b0),
.status_3(1'b0),
.clock(busClk),
.status_4(1'b0),
.status_5(1'b0),
.status_6(1'b0),
.status_7(1'b0),
.intr(EPs_1_to_7_dma_complete),
.status_bus(Net_2040[6:0]));
defparam EP17_DMA_Done_SR.Bit0Mode = 1;
defparam EP17_DMA_Done_SR.Bit1Mode = 1;
defparam EP17_DMA_Done_SR.Bit2Mode = 1;
defparam EP17_DMA_Done_SR.Bit3Mode = 1;
defparam EP17_DMA_Done_SR.Bit4Mode = 1;
defparam EP17_DMA_Done_SR.Bit5Mode = 1;
defparam EP17_DMA_Done_SR.Bit6Mode = 1;
defparam EP17_DMA_Done_SR.Bit7Mode = 1;
defparam EP17_DMA_Done_SR.BusDisplay = 1;
defparam EP17_DMA_Done_SR.Interrupt = 1;
defparam EP17_DMA_Done_SR.MaskValue = 127;
defparam EP17_DMA_Done_SR.NumInputs = 7;
cy_dma_v1_0
#(.drq_type(2'b10))
ep1
(.drq(dma_request[0]),
.trq(dma_terminate),
.nrq(Net_1495));
cy_isr_v1_0
#(.int_type(2'b10))
dp_int
(.int_signal(Net_1010));
wire [0:0] tmpOE__Dm_net;
wire [0:0] tmpFB_0__Dm_net;
wire [0:0] tmpIO_0__Dm_net;
wire [0:0] tmpINTERRUPT_0__Dm_net;
electrical [0:0] tmpSIOVREF__Dm_net;
cy_psoc3_pins_v1_10
#(.id("ba0cbc03-76d7-4965-9772-0d821a2a8408/8b77a6c4-10a0-4390-971c-672353e2a49c"),
.drive_mode(3'b000),
.ibuf_enabled(1'b0),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("NONCONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b0),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("A"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(1),
.use_annotation(1'b0),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Dm
(.oe(tmpOE__Dm_net),
.y({1'b0}),
.fb({tmpFB_0__Dm_net[0:0]}),
.analog({Net_597}),
.io({tmpIO_0__Dm_net[0:0]}),
.siovref(tmpSIOVREF__Dm_net),
.interrupt({tmpINTERRUPT_0__Dm_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Dm_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
wire [0:0] tmpOE__Dp_net;
wire [0:0] tmpFB_0__Dp_net;
wire [0:0] tmpIO_0__Dp_net;
electrical [0:0] tmpSIOVREF__Dp_net;
cy_psoc3_pins_v1_10
#(.id("ba0cbc03-76d7-4965-9772-0d821a2a8408/618a72fc-5ddd-4df5-958f-a3d55102db42"),
.drive_mode(3'b000),
.ibuf_enabled(1'b0),
.init_dr_st(1'b1),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b10),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b0),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("I"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b0),
.vtrip(2'b00),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Dp
(.oe(tmpOE__Dp_net),
.y({1'b0}),
.fb({tmpFB_0__Dp_net[0:0]}),
.analog({Net_1000}),
.io({tmpIO_0__Dp_net[0:0]}),
.siovref(tmpSIOVREF__Dp_net),
.interrupt({Net_1010}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Dp_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
cy_psoc3_usb_v1_0 USB (
.dp(Net_1000),
.dm(Net_597),
.sof_int(sof),
.arb_int(Net_1889),
.usb_int(Net_1876),
.ept_int(ep_int[8:0]),
.ord_int(Net_95),
.dma_req(dma_request[7:0]),
.dma_termin(dma_terminate));
cy_isr_v1_0
#(.int_type(2'b10))
EP_DMA_Done_isr
(.int_signal(Net_2032));
CyStatusReg_v1_90 EP8_DMA_Done_SR (
.status_0(EPs_1_to_7_dma_complete),
.status_1(Net_2040[7]),
.status_2(1'b0),
.status_3(1'b0),
.clock(busClk),
.status_4(1'b0),
.status_5(1'b0),
.status_6(1'b0),
.status_7(1'b0),
.intr(Net_2032),
.status_bus(8'b0));
defparam EP8_DMA_Done_SR.Bit0Mode = 1;
defparam EP8_DMA_Done_SR.Bit1Mode = 1;
defparam EP8_DMA_Done_SR.Bit2Mode = 1;
defparam EP8_DMA_Done_SR.Bit3Mode = 1;
defparam EP8_DMA_Done_SR.Bit4Mode = 1;
defparam EP8_DMA_Done_SR.Bit5Mode = 1;
defparam EP8_DMA_Done_SR.Bit6Mode = 1;
defparam EP8_DMA_Done_SR.Bit7Mode = 1;
defparam EP8_DMA_Done_SR.BusDisplay = 0;
defparam EP8_DMA_Done_SR.Interrupt = 1;
defparam EP8_DMA_Done_SR.MaskValue = 127;
defparam EP8_DMA_Done_SR.NumInputs = 2;
cy_isr_v1_0
#(.int_type(2'b10))
ep_1
(.int_signal(ep_int[1]));
cy_isr_v1_0
#(.int_type(2'b10))
ep_0
(.int_signal(ep_int[0]));
cy_isr_v1_0
#(.int_type(2'b10))
bus_reset
(.int_signal(Net_1876));
cy_isr_v1_0
#(.int_type(2'b10))
arb_int
(.int_signal(Net_1889));
// VirtualMux_1 (cy_virtualmux_v1_0)
assign dma_complete[0] = Net_1495;
ZeroTerminal ZeroTerminal_1 (
.z(Net_1922));
// VirtualMux_2 (cy_virtualmux_v1_0)
assign dma_complete[1] = Net_1921;
ZeroTerminal ZeroTerminal_2 (
.z(Net_1921));
// VirtualMux_3 (cy_virtualmux_v1_0)
assign dma_complete[2] = Net_1920;
ZeroTerminal ZeroTerminal_3 (
.z(Net_1920));
// VirtualMux_4 (cy_virtualmux_v1_0)
assign dma_complete[3] = Net_1919;
ZeroTerminal ZeroTerminal_4 (
.z(Net_1919));
// VirtualMux_5 (cy_virtualmux_v1_0)
assign dma_complete[4] = Net_1918;
// VirtualMux_6 (cy_virtualmux_v1_0)
assign dma_complete[5] = Net_1917;
ZeroTerminal ZeroTerminal_5 (
.z(Net_1918));
ZeroTerminal ZeroTerminal_6 (
.z(Net_1917));
// VirtualMux_7 (cy_virtualmux_v1_0)
assign dma_complete[6] = Net_1916;
// VirtualMux_8 (cy_virtualmux_v1_0)
assign dma_complete[7] = Net_1915;
ZeroTerminal ZeroTerminal_7 (
.z(Net_1916));
ZeroTerminal ZeroTerminal_8 (
.z(Net_1915));
cy_sync_v1_0 nrqSync (
.s_in(dma_complete[7:0]),
.clock(busClk),
.s_out(Net_2040[7:0]));
defparam nrqSync.SignalWidth = 8;
cy_clock_v1_0
#(.id("ba0cbc03-76d7-4965-9772-0d821a2a8408/05cf1099-aac9-4226-a133-1bc328368208"),
.source_clock_id("75C2148C-3656-4d8a-846D-0CAE99AB6FF7"),
.divisor(0),
.period("0"),
.is_direct(1),
.is_digital(1))
USB_BUS_CLOCK
(.clock_out(busClk));
endmodule
// Component: CyControlReg_v1_80
`ifdef CY_BLK_DIR
`undef CY_BLK_DIR
`endif
`ifdef WARP
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyControlReg_v1_80"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyControlReg_v1_80\CyControlReg_v1_80.v"
`else
`define CY_BLK_DIR "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyControlReg_v1_80"
`include "C:\Program Files (x86)\Cypress\PSoC Creator\4.1\PSoC Creator\psoc\content\CyPrimitives\cyprimitives.cylib\CyControlReg_v1_80\CyControlReg_v1_80.v"
`endif
// top
module top ;
wire Net_482;
wire Net_481;
wire Net_475;
wire Net_474;
wire Net_473;
wire Net_472;
wire Net_471;
wire Net_470;
wire Net_476;
wire Net_479;
wire Net_478;
wire Net_477;
wire Net_434;
electrical Net_104;
wire Net_190;
wire Net_189;
electrical Net_103;
wire Net_465;
wire Net_421;
wire Net_420;
wire Net_419;
wire Net_418;
wire Net_416;
wire Net_415;
wire Net_414;
wire Net_413;
wire Net_119;
wire [3:0] Net_146;
wire [3:0] Net_401;
wire [3:0] Net_144;
wire [3:0] Net_48;
wire [3:0] Net_403;
wire [3:0] Net_46;
wire [3:0] Net_42;
wire [3:0] Net_402;
wire [3:0] Net_40;
wire [3:0] Net_32;
wire [3:0] Net_400;
wire [3:0] Net_30;
wire Net_447;
wire Net_427;
wire [3:0] Net_43;
wire [3:0] Net_336;
wire Net_446;
wire [3:0] Net_37;
wire [3:0] Net_162;
wire [3:0] Net_165;
wire [3:0] Net_168;
wire [3:0] Net_62;
wire [3:0] Net_161;
wire Net_120;
wire Net_99;
wire [3:0] Net_71;
wire [3:0] tmpOE__Up_net;
wire [3:0] tmpIO_3__Up_net;
wire [0:0] tmpINTERRUPT_0__Up_net;
electrical [0:0] tmpSIOVREF__Up_net;
cy_psoc3_pins_v1_10
#(.id("8d318d8b-cf7b-4b6b-b02c-ab1c5c49d0ba"),
.drive_mode(12'b010_010_010_010),
.ibuf_enabled(4'b1_1_1_1),
.init_dr_st(4'b1_1_1_1),
.input_clk_en(0),
.input_sync(4'b0_0_0_0),
.input_sync_mode(4'b0_0_0_0),
.intr_mode(8'b00_00_00_00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(",,,"),
.layout_mode("CONTIGUOUS"),
.oe_conn(4'b0_0_0_0),
.oe_reset(0),
.oe_sync(4'b0_0_0_0),
.output_clk_en(0),
.output_clock_mode(4'b0_0_0_0),
.output_conn(4'b0_0_0_0),
.output_mode(4'b0_0_0_0),
.output_reset(0),
.output_sync(4'b0_0_0_0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(",,,"),
.pin_mode("IIII"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(4'b1_1_1_1),
.sio_ibuf(""),
.sio_info(8'b00_00_00_00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(4'b0_0_0_0),
.spanning(0),
.use_annotation(4'b0_0_0_0),
.vtrip(8'b00_00_00_00),
.width(4),
.ovt_hyst_trim(4'b0_0_0_0),
.ovt_needed(4'b0_0_0_0),
.ovt_slew_control(8'b00_00_00_00),
.input_buffer_sel(8'b00_00_00_00))
Up
(.oe(tmpOE__Up_net),
.y({4'b0}),
.fb({Net_165[3:0]}),
.io({tmpIO_3__Up_net[3:0]}),
.siovref(tmpSIOVREF__Up_net),
.interrupt({tmpINTERRUPT_0__Up_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Up_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{4'b1111} : {4'b1111};
wire [3:0] tmpOE__Left_net;
wire [3:0] tmpIO_3__Left_net;
wire [0:0] tmpINTERRUPT_0__Left_net;
electrical [0:0] tmpSIOVREF__Left_net;
cy_psoc3_pins_v1_10
#(.id("8dacd0b7-e39e-4682-8889-554b2b84e0ca"),
.drive_mode(12'b010_010_010_010),
.ibuf_enabled(4'b1_1_1_1),
.init_dr_st(4'b1_1_1_1),
.input_clk_en(0),
.input_sync(4'b0_0_0_0),
.input_sync_mode(4'b0_0_0_0),
.intr_mode(8'b00_00_00_00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(",,,"),
.layout_mode("CONTIGUOUS"),
.oe_conn(4'b0_0_0_0),
.oe_reset(0),
.oe_sync(4'b0_0_0_0),
.output_clk_en(0),
.output_clock_mode(4'b0_0_0_0),
.output_conn(4'b0_0_0_0),
.output_mode(4'b0_0_0_0),
.output_reset(0),
.output_sync(4'b0_0_0_0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(",,,"),
.pin_mode("IIII"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(4'b1_1_1_1),
.sio_ibuf(""),
.sio_info(8'b00_00_00_00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(4'b0_0_0_0),
.spanning(0),
.use_annotation(4'b0_0_0_0),
.vtrip(8'b00_00_00_00),
.width(4),
.ovt_hyst_trim(4'b0_0_0_0),
.ovt_needed(4'b0_0_0_0),
.ovt_slew_control(8'b00_00_00_00),
.input_buffer_sel(8'b00_00_00_00))
Left
(.oe(tmpOE__Left_net),
.y({4'b0}),
.fb({Net_37[3:0]}),
.io({tmpIO_3__Left_net[3:0]}),
.siovref(tmpSIOVREF__Left_net),
.interrupt({tmpINTERRUPT_0__Left_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Left_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{4'b1111} : {4'b1111};
cy_clock_v1_0
#(.id("8af271b8-02da-491e-b5e2-d2dec387f26d"),
.source_clock_id(""),
.divisor(0),
.period("200000000000"),
.is_direct(0),
.is_digital(1))
CLK_Inputs
(.clock_out(Net_446));
Debouncer_v1_0 Debouncer_Up (
.d(Net_165[3:0]),
.clock(Net_446),
.q(Net_71[3:0]),
.neg(Net_30[3:0]),
.either(Net_400[3:0]),
.pos(Net_32[3:0]));
defparam Debouncer_Up.EitherEdgeDetect = 0;
defparam Debouncer_Up.NegEdgeDetect = 0;
defparam Debouncer_Up.PosEdgeDetect = 0;
defparam Debouncer_Up.SignalWidth = 4;
Debouncer_v1_0 Debouncer_Left (
.d(Net_37[3:0]),
.clock(Net_446),
.q(Net_62[3:0]),
.neg(Net_40[3:0]),
.either(Net_402[3:0]),
.pos(Net_42[3:0]));
defparam Debouncer_Left.EitherEdgeDetect = 0;
defparam Debouncer_Left.NegEdgeDetect = 0;
defparam Debouncer_Left.PosEdgeDetect = 0;
defparam Debouncer_Left.SignalWidth = 4;
wire [3:0] tmpOE__Right_net;
wire [3:0] tmpIO_3__Right_net;
wire [0:0] tmpINTERRUPT_0__Right_net;
electrical [0:0] tmpSIOVREF__Right_net;
cy_psoc3_pins_v1_10
#(.id("c84917d8-dd32-400b-a421-4a08049a4cd4"),
.drive_mode(12'b010_010_010_010),
.ibuf_enabled(4'b1_1_1_1),
.init_dr_st(4'b1_1_1_1),
.input_clk_en(0),
.input_sync(4'b0_0_0_0),
.input_sync_mode(4'b0_0_0_0),
.intr_mode(8'b00_00_00_00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(",,,"),
.layout_mode("CONTIGUOUS"),
.oe_conn(4'b0_0_0_0),
.oe_reset(0),
.oe_sync(4'b0_0_0_0),
.output_clk_en(0),
.output_clock_mode(4'b0_0_0_0),
.output_conn(4'b0_0_0_0),
.output_mode(4'b0_0_0_0),
.output_reset(0),
.output_sync(4'b0_0_0_0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(",,,"),
.pin_mode("IIII"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(4'b1_1_1_1),
.sio_ibuf(""),
.sio_info(8'b00_00_00_00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(4'b0_0_0_0),
.spanning(0),
.use_annotation(4'b0_0_0_0),
.vtrip(8'b00_00_00_00),
.width(4),
.ovt_hyst_trim(4'b0_0_0_0),
.ovt_needed(4'b0_0_0_0),
.ovt_slew_control(8'b00_00_00_00),
.input_buffer_sel(8'b00_00_00_00))
Right
(.oe(tmpOE__Right_net),
.y({4'b0}),
.fb({Net_43[3:0]}),
.io({tmpIO_3__Right_net[3:0]}),
.siovref(tmpSIOVREF__Right_net),
.interrupt({tmpINTERRUPT_0__Right_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Right_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{4'b1111} : {4'b1111};
Debouncer_v1_0 Debouncer_Right (
.d(Net_43[3:0]),
.clock(Net_446),
.q(Net_168[3:0]),
.neg(Net_46[3:0]),
.either(Net_403[3:0]),
.pos(Net_48[3:0]));
defparam Debouncer_Right.EitherEdgeDetect = 0;
defparam Debouncer_Right.NegEdgeDetect = 0;
defparam Debouncer_Right.PosEdgeDetect = 0;
defparam Debouncer_Right.SignalWidth = 4;
wire [3:0] tmpOE__Down_net;
wire [3:0] tmpIO_3__Down_net;
wire [0:0] tmpINTERRUPT_0__Down_net;
electrical [0:0] tmpSIOVREF__Down_net;
cy_psoc3_pins_v1_10
#(.id("47700890-8c9d-43db-9b38-806a525d95c1"),
.drive_mode(12'b010_010_010_010),
.ibuf_enabled(4'b1_1_1_1),
.init_dr_st(4'b1_1_1_1),
.input_clk_en(0),
.input_sync(4'b0_0_0_0),
.input_sync_mode(4'b0_0_0_0),
.intr_mode(8'b00_00_00_00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(",,,"),
.layout_mode("CONTIGUOUS"),
.oe_conn(4'b0_0_0_0),
.oe_reset(0),
.oe_sync(4'b0_0_0_0),
.output_clk_en(0),
.output_clock_mode(4'b0_0_0_0),
.output_conn(4'b0_0_0_0),
.output_mode(4'b0_0_0_0),
.output_reset(0),
.output_sync(4'b0_0_0_0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(",,,"),
.pin_mode("IIII"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(4'b1_1_1_1),
.sio_ibuf(""),
.sio_info(8'b00_00_00_00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(4'b0_0_0_0),
.spanning(0),
.use_annotation(4'b0_0_0_0),
.vtrip(8'b00_00_00_00),
.width(4),
.ovt_hyst_trim(4'b0_0_0_0),
.ovt_needed(4'b0_0_0_0),
.ovt_slew_control(8'b00_00_00_00),
.input_buffer_sel(8'b00_00_00_00))
Down
(.oe(tmpOE__Down_net),
.y({4'b0}),
.fb({Net_162[3:0]}),
.io({tmpIO_3__Down_net[3:0]}),
.siovref(tmpSIOVREF__Down_net),
.interrupt({tmpINTERRUPT_0__Down_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Down_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{4'b1111} : {4'b1111};
Debouncer_v1_0 Debouncer_Down (
.d(Net_162[3:0]),
.clock(Net_446),
.q(Net_161[3:0]),
.neg(Net_144[3:0]),
.either(Net_401[3:0]),
.pos(Net_146[3:0]));
defparam Debouncer_Down.EitherEdgeDetect = 0;
defparam Debouncer_Down.NegEdgeDetect = 0;
defparam Debouncer_Down.PosEdgeDetect = 0;
defparam Debouncer_Down.SignalWidth = 4;
cy_clock_v1_0
#(.id("ca12b1c2-b690-48ef-b285-4eafa09a677d"),
.source_clock_id("315365C3-2E3E-4f04-84A2-BB564A173261"),
.divisor(10000),
.period("0"),
.is_direct(0),
.is_digital(1))
Clock_BL
(.clock_out(Net_120));
assign Net_336[2] = ~(Net_62[0] & Net_62[1] & Net_62[2] & Net_62[3]);
assign Net_336[0] = ~(Net_71[0] & Net_71[1] & Net_71[2] & Net_71[3]);
assign Net_336[1] = ~(Net_161[0] & Net_161[1] & Net_161[2] & Net_161[3]);
CyStatusReg_v1_90 SR_Inputs (
.status_0(1'b0),
.status_1(1'b0),
.status_2(1'b0),
.status_3(1'b0),
.clock(Net_446),
.status_4(1'b0),
.status_5(1'b0),
.status_6(1'b0),
.status_7(1'b0),
.intr(Net_465),
.status_bus(Net_336[3:0]));
defparam SR_Inputs.Bit0Mode = 0;
defparam SR_Inputs.Bit1Mode = 0;
defparam SR_Inputs.Bit2Mode = 0;
defparam SR_Inputs.Bit3Mode = 0;
defparam SR_Inputs.Bit4Mode = 0;
defparam SR_Inputs.Bit5Mode = 0;
defparam SR_Inputs.Bit6Mode = 0;
defparam SR_Inputs.Bit7Mode = 0;
defparam SR_Inputs.BusDisplay = 1;
defparam SR_Inputs.Interrupt = 0;
defparam SR_Inputs.MaskValue = 15;
defparam SR_Inputs.NumInputs = 4;
assign Net_99 = 1'h0;
wire [0:0] tmpOE__Down_VSS_net;
wire [0:0] tmpFB_0__Down_VSS_net;
wire [0:0] tmpIO_0__Down_VSS_net;
wire [0:0] tmpINTERRUPT_0__Down_VSS_net;
electrical [0:0] tmpSIOVREF__Down_VSS_net;
cy_psoc3_pins_v1_10
#(.id("e851a3b9-efb8-48be-bbb8-b303b216c393"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b1),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Down_VSS
(.oe(tmpOE__Down_VSS_net),
.y({Net_99}),
.fb({tmpFB_0__Down_VSS_net[0:0]}),
.io({tmpIO_0__Down_VSS_net[0:0]}),
.siovref(tmpSIOVREF__Down_VSS_net),
.interrupt({tmpINTERRUPT_0__Down_VSS_net[0:0]}),
.annotation({Net_103}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Down_VSS_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
USBFS_v3_10_0 USBFS (
.sof(Net_189),
.vbusdet(1'b0));
defparam USBFS.epDMAautoOptimization = 0;
wire [0:0] tmpOE__Right_VSS_net;
wire [0:0] tmpFB_0__Right_VSS_net;
wire [0:0] tmpIO_0__Right_VSS_net;
wire [0:0] tmpINTERRUPT_0__Right_VSS_net;
electrical [0:0] tmpSIOVREF__Right_VSS_net;
cy_psoc3_pins_v1_10
#(.id("d99c484c-a203-4eb6-86b9-0409384e58a1"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b1),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Right_VSS
(.oe(tmpOE__Right_VSS_net),
.y({Net_99}),
.fb({tmpFB_0__Right_VSS_net[0:0]}),
.io({tmpIO_0__Right_VSS_net[0:0]}),
.siovref(tmpSIOVREF__Right_VSS_net),
.interrupt({tmpINTERRUPT_0__Right_VSS_net[0:0]}),
.annotation({Net_104}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Right_VSS_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
assign Net_336[3] = ~(Net_168[0] & Net_168[1] & Net_168[2] & Net_168[3]);
cy_isr_v1_0
#(.int_type(2'b10))
isr_BL
(.int_signal(Net_120));
cy_dma_v1_0
#(.drq_type(2'b00))
DMA_Inputs
(.drq(Net_446),
.trq(1'b0),
.nrq(Net_427));
CyControlReg_v1_80 CR_Lights (
.control_1(Net_477),
.control_2(Net_478),
.control_3(Net_479),
.control_0(Net_476),
.control_4(Net_470),
.control_5(Net_471),
.control_6(Net_472),
.control_7(Net_473),
.clock(1'b0),
.reset(1'b0));
defparam CR_Lights.Bit0Mode = 0;
defparam CR_Lights.Bit1Mode = 0;
defparam CR_Lights.Bit2Mode = 0;
defparam CR_Lights.Bit3Mode = 0;
defparam CR_Lights.Bit4Mode = 0;
defparam CR_Lights.Bit5Mode = 0;
defparam CR_Lights.Bit6Mode = 0;
defparam CR_Lights.Bit7Mode = 0;
defparam CR_Lights.BitValue = 0;
defparam CR_Lights.BusDisplay = 0;
defparam CR_Lights.ExtrReset = 0;
defparam CR_Lights.NumOutputs = 4;
wire [0:0] tmpOE__Pin_Up_net;
wire [0:0] tmpFB_0__Pin_Up_net;
wire [0:0] tmpIO_0__Pin_Up_net;
wire [0:0] tmpINTERRUPT_0__Pin_Up_net;
electrical [0:0] tmpSIOVREF__Pin_Up_net;
cy_psoc3_pins_v1_10
#(.id("0c3ab45f-320c-4718-8cee-7631bf96ade2"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b0),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Pin_Up
(.oe(tmpOE__Pin_Up_net),
.y({Net_476}),
.fb({tmpFB_0__Pin_Up_net[0:0]}),
.io({tmpIO_0__Pin_Up_net[0:0]}),
.siovref(tmpSIOVREF__Pin_Up_net),
.interrupt({tmpINTERRUPT_0__Pin_Up_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Pin_Up_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
wire [0:0] tmpOE__Pin_Down_net;
wire [0:0] tmpFB_0__Pin_Down_net;
wire [0:0] tmpIO_0__Pin_Down_net;
wire [0:0] tmpINTERRUPT_0__Pin_Down_net;
electrical [0:0] tmpSIOVREF__Pin_Down_net;
cy_psoc3_pins_v1_10
#(.id("97eefe32-e0ca-45d8-a715-b0f2b11cc5e8"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b0),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Pin_Down
(.oe(tmpOE__Pin_Down_net),
.y({Net_477}),
.fb({tmpFB_0__Pin_Down_net[0:0]}),
.io({tmpIO_0__Pin_Down_net[0:0]}),
.siovref(tmpSIOVREF__Pin_Down_net),
.interrupt({tmpINTERRUPT_0__Pin_Down_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Pin_Down_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
wire [0:0] tmpOE__Pin_Left_net;
wire [0:0] tmpFB_0__Pin_Left_net;
wire [0:0] tmpIO_0__Pin_Left_net;
wire [0:0] tmpINTERRUPT_0__Pin_Left_net;
electrical [0:0] tmpSIOVREF__Pin_Left_net;
cy_psoc3_pins_v1_10
#(.id("f05ff8e0-3a54-41b1-a963-fd12f4ddc80e"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b0),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Pin_Left
(.oe(tmpOE__Pin_Left_net),
.y({Net_478}),
.fb({tmpFB_0__Pin_Left_net[0:0]}),
.io({tmpIO_0__Pin_Left_net[0:0]}),
.siovref(tmpSIOVREF__Pin_Left_net),
.interrupt({tmpINTERRUPT_0__Pin_Left_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Pin_Left_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
wire [0:0] tmpOE__Pin_Right_net;
wire [0:0] tmpFB_0__Pin_Right_net;
wire [0:0] tmpIO_0__Pin_Right_net;
wire [0:0] tmpINTERRUPT_0__Pin_Right_net;
electrical [0:0] tmpSIOVREF__Pin_Right_net;
cy_psoc3_pins_v1_10
#(.id("6b14f610-0203-496f-ba83-ed46e801d2c5"),
.drive_mode(3'b100),
.ibuf_enabled(1'b1),
.init_dr_st(1'b0),
.input_clk_en(0),
.input_sync(1'b1),
.input_sync_mode(1'b0),
.intr_mode(2'b00),
.invert_in_clock(0),
.invert_in_clock_en(0),
.invert_in_reset(0),
.invert_out_clock(0),
.invert_out_clock_en(0),
.invert_out_reset(0),
.io_voltage(""),
.layout_mode("CONTIGUOUS"),
.oe_conn(1'b0),
.oe_reset(0),
.oe_sync(1'b0),
.output_clk_en(0),
.output_clock_mode(1'b0),
.output_conn(1'b1),
.output_mode(1'b0),
.output_reset(0),
.output_sync(1'b0),
.pa_in_clock(-1),
.pa_in_clock_en(-1),
.pa_in_reset(-1),
.pa_out_clock(-1),
.pa_out_clock_en(-1),
.pa_out_reset(-1),
.pin_aliases(""),
.pin_mode("O"),
.por_state(4),
.sio_group_cnt(0),
.sio_hyst(1'b1),
.sio_ibuf(""),
.sio_info(2'b00),
.sio_obuf(""),
.sio_refsel(""),
.sio_vtrip(""),
.sio_hifreq(""),
.sio_vohsel(""),
.slew_rate(1'b0),
.spanning(0),
.use_annotation(1'b0),
.vtrip(2'b10),
.width(1),
.ovt_hyst_trim(1'b0),
.ovt_needed(1'b0),
.ovt_slew_control(2'b00),
.input_buffer_sel(2'b00))
Pin_Right
(.oe(tmpOE__Pin_Right_net),
.y({Net_479}),
.fb({tmpFB_0__Pin_Right_net[0:0]}),
.io({tmpIO_0__Pin_Right_net[0:0]}),
.siovref(tmpSIOVREF__Pin_Right_net),
.interrupt({tmpINTERRUPT_0__Pin_Right_net[0:0]}),
.in_clock({1'b0}),
.in_clock_en({1'b1}),
.in_reset({1'b0}),
.out_clock({1'b0}),
.out_clock_en({1'b1}),
.out_reset({1'b0}));
assign tmpOE__Pin_Right_net = (`CYDEV_CHIP_MEMBER_USED == `CYDEV_CHIP_MEMBER_3A && `CYDEV_CHIP_REVISION_USED < `CYDEV_CHIP_REVISION_3A_ES3) ? ~{1'b1} : {1'b1};
cy_dma_v1_0
#(.drq_type(2'b00))
DMA_Outputs
(.drq(Net_446),
.trq(1'b0),
.nrq(Net_482));
endmodule
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