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| //Master device SPI code | |
| #include <msp430.h> | |
| unsigned char MST_Data, SLV_Data; | |
| int main(void) | |
| { | |
| volatile unsigned int i; | |
| WDTCTL = WDTPW + WDTHOLD; // Stop watchdog timer | |
| P1OUT = 0x00; // P1 setup for LED & reset output | |
| P1DIR |= BIT0 + BIT5; // | |
| P1SEL = BIT1 + BIT2 + BIT4; | |
| P1SEL2 = BIT1 + BIT2 + BIT4; | |
| UCA0CTL0 |= UCCKPL + UCMSB + UCMST + UCSYNC; // 3-pin, 8-bit SPI master | |
| UCA0CTL1 |= UCSSEL_2; // SMCLK | |
| UCA0BR0 |= 0x02; // /2 | |
| UCA0BR1 = 0; // | |
| UCA0MCTL = 0; | |
| UCA0CTL1 &= ~UCSWRST; // **Initialize USCI state machine** | |
| IE2 |= UCA0RXIE; // Enable USCI0 RX interrupt | |
| P1OUT &= ~BIT5; // Now with SPI signals initialized, | |
| P1OUT |= BIT5; // reset slave | |
| __delay_cycles(75); // Wait for slave to initialize | |
| MST_Data = 0x01; // Initialize data values | |
| SLV_Data = 0x00; | |
| UCA0TXBUF = MST_Data; // Transmit first character | |
| __bis_SR_register(LPM0_bits + GIE); // CPU off, enable interrupts | |
| } | |
| // Master RX ISR | |
| #pragma vector=USCIAB0RX_VECTOR | |
| __interrupt void USCIA0RX_ISR(void) | |
| { | |
| while (!(IFG2 & UCA0TXIFG)); // USCI_A0 TX buffer ready for next transmission? | |
| //Code for Master TX goes here | |
| __delay_cycles(50); // Add time between transmissions to make sure slave can keep up | |
| } |
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