kortschak

ARM: HK32F030MF4P6 (TSSOP20)

Appears to have USART and SPI.


RJ45 pinout:
0 - black  - +5V
3 - white  - GND
4 - yellow - button pressed or start memory movement (do action) also required during initialisation 16ms pulse to start communication; UI queries, but no correct response from controller[2]
5 - green  - data ready? (always spikes during a motor controller transmit - though not for all, never when UI Tx is not connected from [1]) does not appear to be necessary[3]

kortschak

/*
	Upside-down approach for a devkit case: The devkit is put
	in from behind, display first. So all components
	(batteryholder, cam, ...) are freely reachable and
	sensitive parts (like TS-connector) are covered. And the
	processor heat can be taken care of as it's just open - a
	fan can be mounted.

	The idea is to plug the devkit in and put some hot glue
	to the corners to fix it or screw it to the risers.

kortschak

%YAML 1.2
---
name: "Go Semantic"
comment: Based on work from github.com/frou/GoFeather and github.com/DisposaBoy/GoSublime
hidden: false
first_line_match: "-[*]-( Mode:)? Go -[*]-"
scope: source.sem.go
contexts:
  main:
    - match: /\*

kortschak

# git prompt
function parse_git_dirty {
  [[ $(git status 2> /dev/null | tail -n1) != "nothing to commit, working directory clean" ]] && echo "*"
  }
   
  function parse_git_branch {
    git branch --no-color 2> /dev/null | sed -e '/^[^*]/d' -e "s/* \(.*\)/[\1$(parse_git_dirty)]/"
}
 
export PS1='\[\]\w\[\e[0m\] $(__git_ps1 "[\[\e[0;32m\]%s\[\e[0m\]\[\e[1;33m\]$(parse_git_dirty)\[\e[0m\]]")\$ \[\e[0m\]'

kortschak

~/Development/vg [master]$ source source_me.sh 
~/Development/vg [master]$ make -j 4
rm -rf lib/libprotobuf* lib/libprotoc*
rm -Rf include/google/protobuf/
. ./source_me.sh && cd deps/sdsl-lite && BUILD_PORTABLE=1 ./install.sh /home/xxxxx/Development/vg 
. ./source_me.sh && cd deps/ssw/src && make  && ar rs /home/xxxxx/Development/vg/lib/libssw.a ssw.o ssw_cpp.o && cp ssw_cpp.h ssw.h /home/xxxxx/Development/vg/lib
. ./source_me.sh && cd deps/snappy && ./autogen.sh && ./configure --prefix=/home/xxxxx/Development/vg  && make  && make install
. ./source_me.sh && cd deps/protobuf && ./autogen.sh && export DIST_LANG=cpp && ./configure --prefix="/home/xxxxx/Development/vg"  && make  && make install && export PATH=/home/xxxxx/Development/vg/bin:$PATH
/home/xxxxx/Development/vg/deps/ssw/src
/home/xxxxx/Development/vg/deps/snappy

kortschak

~/Development/3d/Slic3r [(version_1.40.0-alpha)]$ export LDLOADLIBS=-lstdc++ 
~/Development/3d/Slic3r [(version_1.40.0-alpha)]$ perl Build.PL 
Attempting to create directory /home/xxxx/Development/3d/Slic3r/local-lib
--> Working on App::cpanminus
Fetching http://www.cpan.org/authors/id/M/MI/MIYAGAWA/App-cpanminus-1.7044.tar.gz ... OK
Configuring App-cpanminus-1.7044 ... OK
Building and testing App-cpanminus-1.7044 ... OK
Successfully installed App-cpanminus-1.7044 (upgraded from 1.7040)
1 distribution installed
Class::XSAccessor is up to date. (1.19)

kortschak

; generated by Slic3r Prusa Edition 1.39.1-prusa3d-linux64 on 2018-05-10 at 07:33:21

; 

; external perimeters extrusion width = 0.45mm
; perimeters extrusion width = 0.45mm
; infill extrusion width = 0.45mm
; solid infill extrusion width = 0.45mm
; top infill extrusion width = 0.40mm
; first layer extrusion width = 0.42mm

kortschak

kortschak

// Copyright ©2013 The bíogo Authors. All rights reserved.
// Use of this source code is governed by a BSD-style
// license that can be found in the LICENSE file.

package rings_test

import (
	"flag"
	"fmt"
	"image/color"

kortschak

func Zseri(z complex128, fnu float64, kode, n int, y []complex128, tol, elim, alim float64) (nz int) {
	var AA, AK, ATOL,
		DFNU, FNUP, RS, S, SS float64
	var I, IB, IDUM, IFLAG, IL, L, M, NN, NW int
	var w [2]complex128
	var sin, cos float64
	var first bool

	var scale float64
	var ak1, coef, rz, s1, s2, st complex128