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kriegsman/Teensy30asm.txt

Created March 13, 2017 20:25
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Teensy30
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Teensy30asm.txt
PaulTeensyLCPaletteBugTest.ino.elf: file format elf32-littlearm
Disassembly of section .text:
00000000 <_VectorsFlash>:
0: 00 20 00 20 f9 00 00 00 59 15 00 00 25 15 00 00 . . ....Y...%...
10: 25 15 00 00 25 15 00 00 25 15 00 00 25 15 00 00 %...%...%...%...
20: 25 15 00 00 25 15 00 00 25 15 00 00 59 15 00 00 %...%...%...Y...
30: 59 15 00 00 25 15 00 00 59 15 00 00 15 15 00 00 Y...%...Y.......
40: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
50: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
60: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
70: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
80: 61 1b 00 00 59 15 00 00 05 21 00 00 59 15 00 00 a...Y....!..Y...
90: a5 25 00 00 59 15 00 00 59 15 00 00 59 15 00 00 .%..Y...Y...Y...
a0: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
b0: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
c0: 59 15 00 00 59 15 00 00 59 15 00 00 0d 0a 00 00 Y...Y...Y.......
d0: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
e0: 59 15 00 00 59 15 00 00 59 15 00 00 59 15 00 00 Y...Y...Y...Y...
f0: 59 15 00 00 59 15 00 00 Y...Y...
000000f8 <ResetHandler>:
volatile int n;
#endif
//volatile int count;
#ifdef KINETISK
WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
f8: 4b54 ldr r3, [pc, #336] ; (24c <ResetHandler+0x154>)
fa: f24c 5220 movw r2, #50464 ; 0xc520
__attribute__ ((optimize("-Os")))
#else
__attribute__ ((section(".startup"),optimize("-Os")))
#endif
void ResetHandler(void)
{
fe: b510 push {r4, lr}
volatile int n;
#endif
//volatile int count;
#ifdef KINETISK
WDOG_UNLOCK = WDOG_UNLOCK_SEQ1;
100: 801a strh r2, [r3, #0]
WDOG_UNLOCK = WDOG_UNLOCK_SEQ2;
102: f64d 1228 movw r2, #55592 ; 0xd928
106: 801a strh r2, [r3, #0]
__asm__ volatile ("nop");
108: bf00 nop
__asm__ volatile ("nop");
10a: bf00 nop
#endif
// programs using the watchdog timer or needing to initialize hardware as
// early as possible can implement startup_early_hook()
startup_early_hook();
10c: f001 fa28 bl 1560 <startup_early_hook>
// enable clocks to always-used peripherals
#if defined(__MK20DX128__)
SIM_SCGC5 = 0x00043F82; // clocks active to all GPIO
110: 4b4f ldr r3, [pc, #316] ; (250 <ResetHandler+0x158>)
112: 4a50 ldr r2, [pc, #320] ; (254 <ResetHandler+0x15c>)
114: 601a str r2, [r3, #0]
SIM_SCGC6 = SIM_SCGC6_RTC | SIM_SCGC6_FTM0 | SIM_SCGC6_FTM1 | SIM_SCGC6_ADC0 | SIM_SCGC6_FTFL;
116: 4a50 ldr r2, [pc, #320] ; (258 <ResetHandler+0x160>)
118: 605a str r2, [r3, #4]
UART0_C2 = UART_C2_TE;
PORTB_PCR17 = PORT_PCR_MUX(3);
#endif
#ifdef KINETISK
// if the RTC oscillator isn't enabled, get it started early
if (!(RTC_CR & RTC_CR_OSCE)) {
11a: f5a3 4330 sub.w r3, r3, #45056 ; 0xb000
11e: 3b28 subs r3, #40 ; 0x28
120: 681a ldr r2, [r3, #0]
122: f412 7280 ands.w r2, r2, #256 ; 0x100
126: d104 bne.n 132 <ResetHandler+0x3a>
RTC_SR = 0;
128: 494c ldr r1, [pc, #304] ; (25c <ResetHandler+0x164>)
12a: 600a str r2, [r1, #0]
RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE;
12c: f44f 52a8 mov.w r2, #5376 ; 0x1500
130: 601a str r2, [r3, #0]
}
#endif
// release I/O pins hold, if we woke up from VLLS mode
if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO;
132: 4b4b ldr r3, [pc, #300] ; (260 <ResetHandler+0x168>)
134: 781a ldrb r2, [r3, #0]
136: 0711 lsls r1, r2, #28
138: d503 bpl.n 142 <ResetHandler+0x4a>
13a: 781a ldrb r2, [r3, #0]
13c: f042 0208 orr.w r2, r2, #8
140: 701a strb r2, [r3, #0]
// since this is a write once register, make it visible to all F_CPU's
// so we can into other sleep modes in the future at any speed
#if defined(__MK66FX1M0__)
SMC_PMPROT = SMC_PMPROT_AHSRUN | SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS;
#else
SMC_PMPROT = SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS;
142: 4b48 ldr r3, [pc, #288] ; (264 <ResetHandler+0x16c>)
144: 222a movs r2, #42 ; 0x2a
146: 701a strb r2, [r3, #0]
#endif
// TODO: do this while the PLL is waiting to lock....
while (dest < &_edata) *dest++ = *src++;
148: 2300 movs r3, #0
14a: 4a47 ldr r2, [pc, #284] ; (268 <ResetHandler+0x170>)
14c: 4947 ldr r1, [pc, #284] ; (26c <ResetHandler+0x174>)
14e: 1898 adds r0, r3, r2
150: 4288 cmp r0, r1
152: d204 bcs.n 15e <ResetHandler+0x66>
154: 4946 ldr r1, [pc, #280] ; (270 <ResetHandler+0x178>)
156: 5859 ldr r1, [r3, r1]
158: 5099 str r1, [r3, r2]
15a: 3304 adds r3, #4
15c: e7f5 b.n 14a <ResetHandler+0x52>
15e: 4a45 ldr r2, [pc, #276] ; (274 <ResetHandler+0x17c>)
dest = &_sbss;
while (dest < &_ebss) *dest++ = 0;
160: 4b45 ldr r3, [pc, #276] ; (278 <ResetHandler+0x180>)
162: 429a cmp r2, r3
164: f04f 0300 mov.w r3, #0
168: d202 bcs.n 170 <ResetHandler+0x78>
16a: f842 3b04 str.w r3, [r2], #4
16e: e7f7 b.n 160 <ResetHandler+0x68>
// default all interrupts to medium priority level
for (i=0; i < NVIC_NUM_INTERRUPTS + 16; i++) _VectorsRam[i] = _VectorsFlash[i];
170: 4942 ldr r1, [pc, #264] ; (27c <ResetHandler+0x184>)
172: 4a43 ldr r2, [pc, #268] ; (280 <ResetHandler+0x188>)
174: 5859 ldr r1, [r3, r1]
176: 5099 str r1, [r3, r2]
178: 3304 adds r3, #4
17a: 2bf8 cmp r3, #248 ; 0xf8
17c: d1f8 bne.n 170 <ResetHandler+0x78>
17e: 4b41 ldr r3, [pc, #260] ; (284 <ResetHandler+0x18c>)
for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128);
180: 2180 movs r1, #128 ; 0x80
182: f803 1b01 strb.w r1, [r3], #1
186: 4940 ldr r1, [pc, #256] ; (288 <ResetHandler+0x190>)
188: 428b cmp r3, r1
18a: d1f9 bne.n 180 <ResetHandler+0x88>
SCB_VTOR = (uint32_t)_VectorsRam; // use vector table in RAM
18c: 4b3f ldr r3, [pc, #252] ; (28c <ResetHandler+0x194>)
18e: 601a str r2, [r3, #0]
// C6[PLLS] bit is written to 0
// C2[LP] bit is written to 1
#else
#if defined(KINETISK)
// enable capacitors for crystal
OSC0_CR = OSC_SC8P | OSC_SC2P;
190: 4b3f ldr r3, [pc, #252] ; (290 <ResetHandler+0x198>)
192: 220a movs r2, #10
194: 701a strb r2, [r3, #0]
#elif defined(KINETISL)
// enable capacitors for crystal
OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN;
#endif
// enable osc, 8-32 MHz range, low power mode
MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS;
196: f5a3 5380 sub.w r3, r3, #4096 ; 0x1000
19a: 2224 movs r2, #36 ; 0x24
19c: 705a strb r2, [r3, #1]
// switch to crystal as clock source, FLL input = 16 MHz / 512
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4);
19e: 22a0 movs r2, #160 ; 0xa0
1a0: 701a strb r2, [r3, #0]
// wait for crystal oscillator to begin
while ((MCG_S & MCG_S_OSCINIT0) == 0) ;
1a2: 799a ldrb r2, [r3, #6]
1a4: 0792 lsls r2, r2, #30
1a6: d5fc bpl.n 1a2 <ResetHandler+0xaa>
// wait for FLL to use oscillator
while ((MCG_S & MCG_S_IREFST) != 0) ;
1a8: 799a ldrb r2, [r3, #6]
1aa: 06d4 lsls r4, r2, #27
1ac: d4fc bmi.n 1a8 <ResetHandler+0xb0>
// wait for MCGOUT to use oscillator
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ;
1ae: 4b39 ldr r3, [pc, #228] ; (294 <ResetHandler+0x19c>)
1b0: 799a ldrb r2, [r3, #6]
1b2: f002 020c and.w r2, r2, #12
1b6: 2a08 cmp r2, #8
1b8: d1f9 bne.n 1ae <ResetHandler+0xb6>
#endif
#else
#if F_CPU == 72000000
MCG_C5 = MCG_C5_PRDIV0(5); // config PLL input for 16 MHz Crystal / 6 = 2.667 Hz
#else
MCG_C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz
1ba: 2203 movs r2, #3
1bc: 711a strb r2, [r3, #4]
#elif F_CPU == 120000000
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output
#elif F_CPU == 72000000
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(3); // config PLL for 72 MHz output
#elif F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output
1be: 2240 movs r2, #64 ; 0x40
1c0: 715a strb r2, [r3, #5]
#error "This clock speed isn't supported..."
#endif
#endif
// wait for PLL to start using xtal as its input
while (!(MCG_S & MCG_S_PLLST)) ;
1c2: 799a ldrb r2, [r3, #6]
1c4: 0690 lsls r0, r2, #26
1c6: d5fc bpl.n 1c2 <ResetHandler+0xca>
// wait for PLL to lock
while (!(MCG_S & MCG_S_LOCK0)) ;
1c8: 4b32 ldr r3, [pc, #200] ; (294 <ResetHandler+0x19c>)
1ca: 799a ldrb r2, [r3, #6]
1cc: 0651 lsls r1, r2, #25
1ce: d5fb bpl.n 1c8 <ResetHandler+0xd0>
#endif
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(4) | SIM_CLKDIV2_USBFRAC;
#elif F_CPU == 96000000
// config divisors: 96 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2
#if F_BUS == 48000000
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV4(3);
1d0: 4a31 ldr r2, [pc, #196] ; (298 <ResetHandler+0x1a0>)
1d2: 4932 ldr r1, [pc, #200] ; (29c <ResetHandler+0x1a4>)
1d4: 6011 str r1, [r2, #0]
#elif F_BUS == 96000000
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV4(3);
#else
#error "This F_CPU & F_BUS combination is not supported"
#endif
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1);
1d6: 2102 movs r1, #2
1d8: 6051 str r1, [r2, #4]
#error "Error, F_CPU must be 192, 180, 168, 144, 120, 96, 72, 48, 24, 16, 8, 4, or 2 MHz"
#endif
#if F_CPU > 16000000
// switch to PLL as clock source, FLL input = 16 MHz / 512
MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4);
1da: 2220 movs r2, #32
1dc: 701a strb r2, [r3, #0]
// wait for PLL clock to be used
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ;
1de: 4b2d ldr r3, [pc, #180] ; (294 <ResetHandler+0x19c>)
1e0: 799b ldrb r3, [r3, #6]
1e2: f003 030c and.w r3, r3, #12
1e6: 2b0c cmp r3, #12
1e8: d1f9 bne.n 1de <ResetHandler+0xe6>
// USB uses PLL clock, trace is CPU clock, CLKOUT=OSCERCLK0
#if defined(KINETISK)
#if F_CPU == 216000000 || F_CPU == 180000000
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_IRC48SEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
#else
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6);
1ea: 4b2d ldr r3, [pc, #180] ; (2a0 <ResetHandler+0x1a8>)
1ec: 4a2d ldr r2, [pc, #180] ; (2a4 <ResetHandler+0x1ac>)
1ee: 601a str r2, [r3, #0]
// since we are not going into "stop mode" i removed it
SMC_PMCTRL = SMC_PMCTRL_RUNM(2); // VLPR mode :-)
#endif
// initialize the SysTick counter
SYST_RVR = (F_CPU / 1000) - 1;
1f0: 4b2d ldr r3, [pc, #180] ; (2a8 <ResetHandler+0x1b0>)
1f2: 4a2e ldr r2, [pc, #184] ; (2ac <ResetHandler+0x1b4>)
1f4: 601a str r2, [r3, #0]
SYST_CVR = 0;
1f6: 2200 movs r2, #0
1f8: 605a str r2, [r3, #4]
SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE;
1fa: 2207 movs r2, #7
1fc: f843 2c04 str.w r2, [r3, #-4]
SCB_SHPR3 = 0x20200000; // Systick = priority 32
200: 4a2b ldr r2, [pc, #172] ; (2b0 <ResetHandler+0x1b8>)
202: f8c3 2d0c str.w r2, [r3, #3340] ; 0xd0c
//init_pins();
__enable_irq();
206: b662 cpsie i
_init_Teensyduino_internal_();
208: f000 faf0 bl 7ec <_init_Teensyduino_internal_>
#if defined(KINETISK)
// RTC initialization
if (RTC_SR & RTC_SR_TIF) {
20c: 4b13 ldr r3, [pc, #76] ; (25c <ResetHandler+0x164>)
20e: 681b ldr r3, [r3, #0]
210: 07da lsls r2, r3, #31
212: d505 bpl.n 220 <ResetHandler+0x128>
// compiled-in time will be stale. Write a special
// flag into the VBAT register file indicating the
// RTC is set with known-stale time and should be
// updated when fresh time is known.
#if ARDUINO >= 10600
rtc_set((uint32_t)&__rtc_localtime);
214: 4827 ldr r0, [pc, #156] ; (2b4 <ResetHandler+0x1bc>)
216: f000 fa47 bl 6a8 <rtc_set>
#else
rtc_set(TIME_T);
#endif
*(uint32_t *)0x4003E01C = 0x5A94C3A5;
21a: 4b27 ldr r3, [pc, #156] ; (2b8 <ResetHandler+0x1c0>)
21c: 4a27 ldr r2, [pc, #156] ; (2bc <ResetHandler+0x1c4>)
21e: 601a str r2, [r3, #0]
}
if ((RCM_SRS0 & RCM_SRS0_PIN) && (*(uint32_t *)0x4003E01C == 0x5A94C3A5)) {
220: 4b27 ldr r3, [pc, #156] ; (2c0 <ResetHandler+0x1c8>)
222: 781b ldrb r3, [r3, #0]
224: 065b lsls r3, r3, #25
226: d509 bpl.n 23c <ResetHandler+0x144>
228: 4c23 ldr r4, [pc, #140] ; (2b8 <ResetHandler+0x1c0>)
22a: 4a24 ldr r2, [pc, #144] ; (2bc <ResetHandler+0x1c4>)
22c: 6823 ldr r3, [r4, #0]
22e: 4293 cmp r3, r2
230: d104 bne.n 23c <ResetHandler+0x144>
// Our compiled-in time will be very fresh, so set
// the RTC with this, and clear the VBAT resister file
// data so we don't mess with the time after it's been
// set well.
#if ARDUINO >= 10600
rtc_set((uint32_t)&__rtc_localtime);
232: 4820 ldr r0, [pc, #128] ; (2b4 <ResetHandler+0x1bc>)
234: f000 fa38 bl 6a8 <rtc_set>
#else
rtc_set(TIME_T);
#endif
*(uint32_t *)0x4003E01C = 0;
238: 2300 movs r3, #0
23a: 6023 str r3, [r4, #0]
}
#endif
__libc_init_array();
23c: f002 fbea bl 2a14 <__libc_init_array>
startup_late_hook();
240: f001 f994 bl 156c <startup_late_hook>
main();
244: f001 f8d4 bl 13f0 <main>
248: e7fe b.n 248 <ResetHandler+0x150>
24a: bf00 nop
24c: 4005200e .word 0x4005200e
250: 40048038 .word 0x40048038
254: 00043f82 .word 0x00043f82
258: 2b000001 .word 0x2b000001
25c: 4003d014 .word 0x4003d014
260: 4007d002 .word 0x4007d002
264: 4007e000 .word 0x4007e000
268: 1fffe560 .word 0x1fffe560
26c: 1fffe608 .word 0x1fffe608
270: 00002d70 .word 0x00002d70
274: 1fffe608 .word 0x1fffe608
278: 1fffe938 .word 0x1fffe938
27c: 00000000 .word 0x00000000
280: 1fffe100 .word 0x1fffe100
284: e000e400 .word 0xe000e400
288: e000e42e .word 0xe000e42e
28c: e000ed08 .word 0xe000ed08
290: 40065000 .word 0x40065000
294: 40064000 .word 0x40064000
298: 40048044 .word 0x40048044
29c: 01030000 .word 0x01030000
2a0: 40048004 .word 0x40048004
2a4: 000510c0 .word 0x000510c0
2a8: e000e014 .word 0xe000e014
2ac: 000176ff .word 0x000176ff
2b0: 20200000 .word 0x20200000
2b4: 58c6c6a9 .word 0x58c6c6a9
2b8: 4003e01c .word 0x4003e01c
2bc: 5a94c3a5 .word 0x5a94c3a5
2c0: 4007f000 .word 0x4007f000
2c4: ffffffff .word 0xffffffff
2c8: ffffffff .word 0xffffffff
2cc: ffffffff .word 0xffffffff
2d0: ffffffff .word 0xffffffff
2d4: ffffffff .word 0xffffffff
2d8: ffffffff .word 0xffffffff
2dc: ffffffff .word 0xffffffff
2e0: ffffffff .word 0xffffffff
2e4: ffffffff .word 0xffffffff
2e8: ffffffff .word 0xffffffff
2ec: ffffffff .word 0xffffffff
2f0: ffffffff .word 0xffffffff
2f4: ffffffff .word 0xffffffff
2f8: ffffffff .word 0xffffffff
2fc: ffffffff .word 0xffffffff
300: ffffffff .word 0xffffffff
304: ffffffff .word 0xffffffff
308: ffffffff .word 0xffffffff
30c: ffffffff .word 0xffffffff
310: ffffffff .word 0xffffffff
314: ffffffff .word 0xffffffff
318: ffffffff .word 0xffffffff
31c: ffffffff .word 0xffffffff
320: ffffffff .word 0xffffffff
324: ffffffff .word 0xffffffff
328: ffffffff .word 0xffffffff
32c: ffffffff .word 0xffffffff
330: ffffffff .word 0xffffffff
334: ffffffff .word 0xffffffff
338: ffffffff .word 0xffffffff
33c: ffffffff .word 0xffffffff
340: ffffffff .word 0xffffffff
344: ffffffff .word 0xffffffff
348: ffffffff .word 0xffffffff
34c: ffffffff .word 0xffffffff
350: ffffffff .word 0xffffffff
354: ffffffff .word 0xffffffff
358: ffffffff .word 0xffffffff
35c: ffffffff .word 0xffffffff
360: ffffffff .word 0xffffffff
364: ffffffff .word 0xffffffff
368: ffffffff .word 0xffffffff
36c: ffffffff .word 0xffffffff
370: ffffffff .word 0xffffffff
374: ffffffff .word 0xffffffff
378: ffffffff .word 0xffffffff
37c: ffffffff .word 0xffffffff
380: ffffffff .word 0xffffffff
384: ffffffff .word 0xffffffff
388: ffffffff .word 0xffffffff
38c: ffffffff .word 0xffffffff
390: ffffffff .word 0xffffffff
394: ffffffff .word 0xffffffff
398: ffffffff .word 0xffffffff
39c: ffffffff .word 0xffffffff
3a0: ffffffff .word 0xffffffff
3a4: ffffffff .word 0xffffffff
3a8: ffffffff .word 0xffffffff
3ac: ffffffff .word 0xffffffff
3b0: ffffffff .word 0xffffffff
3b4: ffffffff .word 0xffffffff
3b8: ffffffff .word 0xffffffff
3bc: ffffffff .word 0xffffffff
3c0: ffffffff .word 0xffffffff
3c4: ffffffff .word 0xffffffff
3c8: ffffffff .word 0xffffffff
3cc: ffffffff .word 0xffffffff
3d0: ffffffff .word 0xffffffff
3d4: ffffffff .word 0xffffffff
3d8: ffffffff .word 0xffffffff
3dc: ffffffff .word 0xffffffff
3e0: ffffffff .word 0xffffffff
3e4: ffffffff .word 0xffffffff
3e8: ffffffff .word 0xffffffff
3ec: ffffffff .word 0xffffffff
3f0: ffffffff .word 0xffffffff
3f4: ffffffff .word 0xffffffff
3f8: ffffffff .word 0xffffffff
3fc: ffffffff .word 0xffffffff
00000400 <flashconfigbytes>:
400: ffffffff ffffffff ffffffff fffffffe ................
00000410 <__do_global_dtors_aux>:
410: b510 push {r4, lr}
412: 4c05 ldr r4, [pc, #20] ; (428 <__do_global_dtors_aux+0x18>)
414: 7823 ldrb r3, [r4, #0]
416: b933 cbnz r3, 426 <__do_global_dtors_aux+0x16>
418: 4b04 ldr r3, [pc, #16] ; (42c <__do_global_dtors_aux+0x1c>)
41a: b113 cbz r3, 422 <__do_global_dtors_aux+0x12>
41c: 4804 ldr r0, [pc, #16] ; (430 <__do_global_dtors_aux+0x20>)
41e: f3af 8000 nop.w
422: 2301 movs r3, #1
424: 7023 strb r3, [r4, #0]
426: bd10 pop {r4, pc}
428: 1fffe608 .word 0x1fffe608
42c: 00000000 .word 0x00000000
430: 00002d70 .word 0x00002d70
00000434 <frame_dummy>:
434: b508 push {r3, lr}
436: 4b06 ldr r3, [pc, #24] ; (450 <frame_dummy+0x1c>)
438: b11b cbz r3, 442 <frame_dummy+0xe>
43a: 4806 ldr r0, [pc, #24] ; (454 <frame_dummy+0x20>)
43c: 4906 ldr r1, [pc, #24] ; (458 <frame_dummy+0x24>)
43e: f3af 8000 nop.w
442: 4806 ldr r0, [pc, #24] ; (45c <frame_dummy+0x28>)
444: 6803 ldr r3, [r0, #0]
446: b113 cbz r3, 44e <frame_dummy+0x1a>
448: 4b05 ldr r3, [pc, #20] ; (460 <frame_dummy+0x2c>)
44a: b103 cbz r3, 44e <frame_dummy+0x1a>
44c: 4798 blx r3
44e: bd08 pop {r3, pc}
450: 00000000 .word 0x00000000
454: 00002d70 .word 0x00002d70
458: 1fffe60c .word 0x1fffe60c
45c: 1fffe608 .word 0x1fffe608
460: 00000000 .word 0x00000000
00000464 <_ZN5Print7printlnEPKc>:
size_t print(double n, int digits = 2) { return printFloat(n, digits); }
size_t print(const Printable &obj) { return obj.printTo(*this); }
size_t println(void);
size_t println(const String &s) { return print(s) + println(); }
size_t println(char c) { return print(c) + println(); }
size_t println(const char s[]) { return print(s) + println(); }
464: b538 push {r3, r4, r5, lr}
466: 4604 mov r4, r0
class Print
{
public:
Print() : write_error(0) {}
virtual size_t write(uint8_t b) = 0;
size_t write(const char *str) { return write((const uint8_t *)str, strlen(str)); }
468: 4608 mov r0, r1
size_t print(double n, int digits = 2) { return printFloat(n, digits); }
size_t print(const Printable &obj) { return obj.printTo(*this); }
size_t println(void);
size_t println(const String &s) { return print(s) + println(); }
size_t println(char c) { return print(c) + println(); }
size_t println(const char s[]) { return print(s) + println(); }
46a: 460d mov r5, r1
class Print
{
public:
Print() : write_error(0) {}
virtual size_t write(uint8_t b) = 0;
size_t write(const char *str) { return write((const uint8_t *)str, strlen(str)); }
46c: f002 faf8 bl 2a60 <strlen>
470: 6823 ldr r3, [r4, #0]
472: 4602 mov r2, r0
474: 4629 mov r1, r5
476: 685b ldr r3, [r3, #4]
478: 4620 mov r0, r4
47a: 4798 blx r3
47c: 4605 mov r5, r0
size_t print(double n, int digits = 2) { return printFloat(n, digits); }
size_t print(const Printable &obj) { return obj.printTo(*this); }
size_t println(void);
size_t println(const String &s) { return print(s) + println(); }
size_t println(char c) { return print(c) + println(); }
size_t println(const char s[]) { return print(s) + println(); }
47e: 4620 mov r0, r4
480: f000 ff6e bl 1360 <_ZN5Print7printlnEv>
484: 4428 add r0, r5
486: bd38 pop {r3, r4, r5, pc}
00000488 <_ZN13CRGBPalette16aSEPKh>:
// the exact stripe widths at the expense of dropping some colors.
CRGBPalette16( TProgmemRGBGradientPalette_bytes progpal )
{
*this = progpal;
}
CRGBPalette16& operator=( TProgmemRGBGradientPalette_bytes progpal )
488: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr}
48c: 4607 mov r7, r0
48e: b089 sub sp, #36 ; 0x24
{
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal);
TRGBGradientPaletteEntryUnion u;
// Count entries
uint16_t count = 0;
490: 2400 movs r4, #0
do {
u.dword = FL_PGM_READ_DWORD_NEAR(progent + count);
492: f851 3024 ldr.w r3, [r1, r4, lsl #2]
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal);
TRGBGradientPaletteEntryUnion u;
// Count entries
uint16_t count = 0;
do {
496: b2de uxtb r6, r3
u.dword = FL_PGM_READ_DWORD_NEAR(progent + count);
count++;;
498: 3401 adds r4, #1
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal);
TRGBGradientPaletteEntryUnion u;
// Count entries
uint16_t count = 0;
do {
49a: 2eff cmp r6, #255 ; 0xff
u.dword = FL_PGM_READ_DWORD_NEAR(progent + count);
count++;;
49c: b2a4 uxth r4, r4
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal);
TRGBGradientPaletteEntryUnion u;
// Count entries
uint16_t count = 0;
do {
49e: d1f8 bne.n 492 <_ZN13CRGBPalette16aSEPKh+0xa>
count++;;
} while ( u.index != 255);
int8_t lastSlotUsed = -1;
u.dword = FL_PGM_READ_DWORD_NEAR( progent);
4a0: 680b ldr r3, [r1, #0]
4a2: 9102 str r1, [sp, #8]
CRGB rgbstart( u.r, u.g, u.b);
4a4: f3c3 2007 ubfx r0, r3, #8, #8
4a8: f3c3 4207 ubfx r2, r3, #16, #8
4ac: ea4f 6813 mov.w r8, r3, lsr #24
int indexstart = 0;
4b0: f04f 0b00 mov.w fp, #0
uint8_t istart8 = 0;
uint8_t iend8 = 0;
while( indexstart < 255) {
progent++;
u.dword = FL_PGM_READ_DWORD_NEAR( progent);
4b4: 9902 ldr r1, [sp, #8]
4b6: f851 3f04 ldr.w r3, [r1, #4]!
4ba: 9102 str r1, [sp, #8]
int indexend = u.index;
CRGB rgbend( u.r, u.g, u.b);
4bc: f3c3 2907 ubfx r9, r3, #8, #8
4c0: fa5f f189 uxtb.w r1, r9
4c4: f3c3 4c07 ubfx ip, r3, #16, #8
4c8: f3c3 6e07 ubfx lr, r3, #24, #8
uint8_t istart8 = 0;
uint8_t iend8 = 0;
while( indexstart < 255) {
progent++;
u.dword = FL_PGM_READ_DWORD_NEAR( progent);
int indexend = u.index;
4cc: b2dd uxtb r5, r3
CRGB rgbend( u.r, u.g, u.b);
4ce: 9103 str r1, [sp, #12]
4d0: fa5f f38e uxtb.w r3, lr
4d4: fa5f f18c uxtb.w r1, ip
istart8 = indexstart / 16;
4d8: ea4f 1b2b mov.w fp, fp, asr #4
iend8 = indexend / 16;
if( count < 16) {
4dc: 2c0f cmp r4, #15
uint8_t iend8 = 0;
while( indexstart < 255) {
progent++;
u.dword = FL_PGM_READ_DWORD_NEAR( progent);
int indexend = u.index;
CRGB rgbend( u.r, u.g, u.b);
4de: 9105 str r1, [sp, #20]
4e0: 9304 str r3, [sp, #16]
istart8 = indexstart / 16;
4e2: fa5f f18b uxtb.w r1, fp
iend8 = indexend / 16;
4e6: ea4f 1315 mov.w r3, r5, lsr #4
if( count < 16) {
4ea: d80c bhi.n 506 <_ZN13CRGBPalette16aSEPKh+0x7e>
if( (istart8 <= lastSlotUsed) && (lastSlotUsed < 15)) {
4ec: fa4f fa86 sxtb.w sl, r6
4f0: 45d3 cmp fp, sl
4f2: dc07 bgt.n 504 <_ZN13CRGBPalette16aSEPKh+0x7c>
4f4: f1ba 0f0e cmp.w sl, #14
4f8: dc04 bgt.n 504 <_ZN13CRGBPalette16aSEPKh+0x7c>
istart8 = lastSlotUsed + 1;
4fa: 3601 adds r6, #1
4fc: b2f1 uxtb r1, r6
4fe: 4299 cmp r1, r3
500: bf28 it cs
502: 460b movcs r3, r1
if( iend8 < istart8) {
iend8 = istart8;
}
}
lastSlotUsed = iend8;
504: b2de uxtb r6, r3
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
g = rhs.g;
506: f88d 2019 strb.w r2, [sp, #25]
}
fill_gradient_RGB( &(entries[0]), istart8, rgbstart, iend8, rgbend);
50a: aa07 add r2, sp, #28
}
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
50c: f88d 0018 strb.w r0, [sp, #24]
510: 9200 str r2, [sp, #0]
512: 4638 mov r0, r7
514: aa06 add r2, sp, #24
g = rhs.g;
b = rhs.b;
516: f88d 801a strb.w r8, [sp, #26]
}
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
51a: f88d 901c strb.w r9, [sp, #28]
g = rhs.g;
51e: f88d c01d strb.w ip, [sp, #29]
b = rhs.b;
522: f88d e01e strb.w lr, [sp, #30]
526: f000 f859 bl 5dc <_Z17fill_gradient_RGBP4CRGBtS_tS_>
CRGB rgbstart( u.r, u.g, u.b);
int indexstart = 0;
uint8_t istart8 = 0;
uint8_t iend8 = 0;
while( indexstart < 255) {
52a: 2dff cmp r5, #255 ; 0xff
52c: d005 beq.n 53a <_ZN13CRGBPalette16aSEPKh+0xb2>
}
/// allow assignment from one RGB struct to another
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
52e: 9803 ldr r0, [sp, #12]
g = rhs.g;
530: 9a05 ldr r2, [sp, #20]
b = rhs.b;
532: f8dd 8010 ldr.w r8, [sp, #16]
}
}
lastSlotUsed = iend8;
}
fill_gradient_RGB( &(entries[0]), istart8, rgbstart, iend8, rgbend);
indexstart = indexend;
536: 46ab mov fp, r5
538: e7bc b.n 4b4 <_ZN13CRGBPalette16aSEPKh+0x2c>
rgbstart = rgbend;
}
return *this;
}
53a: 4638 mov r0, r7
53c: b009 add sp, #36 ; 0x24
53e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc}
542: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8
00000544 <setup>:
// merely having this object created causes the program to crash
// comment out this line to get see the 3 Serial.print() output
LedsMultitask Bordlys;
void setup() {
544: b508 push {r3, lr}
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; }
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; }
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; }
operator bool() { return usb_configuration &&
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) &&
546: 4b12 ldr r3, [pc, #72] ; (590 <setup+0x4c>)
548: 781b ldrb r3, [r3, #0]
54a: 2b00 cmp r3, #0
54c: d0fb beq.n 546 <setup+0x2>
54e: 4b11 ldr r3, [pc, #68] ; (594 <setup+0x50>)
550: 781b ldrb r3, [r3, #0]
uint8_t stopbits(void) { uint8_t b = usb_cdc_line_coding[1]; if (!b) b = 1; return b; }
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; }
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; }
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; }
operator bool() { return usb_configuration &&
552: 079b lsls r3, r3, #30
554: d0f7 beq.n 546 <setup+0x2>
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) &&
((uint32_t)(systick_millis_count - usb_cdc_line_rtsdtr_millis) >= 25);
556: 4b10 ldr r3, [pc, #64] ; (598 <setup+0x54>)
558: 681a ldr r2, [r3, #0]
55a: 4b10 ldr r3, [pc, #64] ; (59c <setup+0x58>)
55c: 681b ldr r3, [r3, #0]
55e: 1ad3 subs r3, r2, r3
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; }
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; }
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; }
operator bool() { return usb_configuration &&
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) &&
560: 2b18 cmp r3, #24
562: d9f0 bls.n 546 <setup+0x2>
while (!Serial) ; // wait for Arduino Serial Monitor
delay(10);
564: 200a movs r0, #10
566: f000 f92b bl 7c0 <delay>
Serial.println("setup begin");
56a: 490d ldr r1, [pc, #52] ; (5a0 <setup+0x5c>)
56c: 480d ldr r0, [pc, #52] ; (5a4 <setup+0x60>)
56e: f7ff ff79 bl 464 <_ZN5Print7printlnEPKc>
Serial.println("setup2"); // must print 2+ strings to reproduce problem
572: 490d ldr r1, [pc, #52] ; (5a8 <setup+0x64>)
574: 480b ldr r0, [pc, #44] ; (5a4 <setup+0x60>)
576: f7ff ff75 bl 464 <_ZN5Print7printlnEPKc>
size_t print(const char s[]) { return write(s); }
size_t print(const __FlashStringHelper *f) { return write((const char *)f); }
size_t print(uint8_t b) { return printNumber(b, 10, 0); }
size_t print(int n) { return print((long)n); }
size_t print(unsigned int n) { return printNumber(n, 10, 0); }
57a: 2300 movs r3, #0
57c: 4809 ldr r0, [pc, #36] ; (5a4 <setup+0x60>)
57e: 2130 movs r1, #48 ; 0x30
580: 220a movs r2, #10
582: f000 fefd bl 1380 <_ZN5Print11printNumberEmhh>
size_t println(const char s[]) { return print(s) + println(); }
size_t println(const __FlashStringHelper *f) { return print(f) + println(); }
size_t println(uint8_t b) { return print(b) + println(); }
size_t println(int n) { return print(n) + println(); }
size_t println(unsigned int n) { return print(n) + println(); }
586: 4807 ldr r0, [pc, #28] ; (5a4 <setup+0x60>)
Serial.println(sizeof(LedsMultitask));
}
588: e8bd 4008 ldmia.w sp!, {r3, lr}
58c: f000 bee8 b.w 1360 <_ZN5Print7printlnEv>
590: 1fffe747 .word 0x1fffe747
594: 1fffe758 .word 0x1fffe758
598: 1fffe664 .word 0x1fffe664
59c: 1fffe934 .word 0x1fffe934
5a0: 00002a70 .word 0x00002a70
5a4: 1fffe75c .word 0x1fffe75c
5a8: 00002a7c .word 0x00002a7c
000005ac <loop>:
void loop() {}
5ac: 4770 bx lr
5ae: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8
000005b0 <_GLOBAL__sub_I_heatmap_gp>:
5b0: b508 push {r3, lr}
// will be, by definition, different from the widths in the gradient
// palette. This code attempts to preserve "all the colors", rather than
// the exact stripe widths at the expense of dropping some colors.
CRGBPalette16( TProgmemRGBGradientPalette_bytes progpal )
{
*this = progpal;
5b2: 4902 ldr r1, [pc, #8] ; (5bc <_GLOBAL__sub_I_heatmap_gp+0xc>)
5b4: 4802 ldr r0, [pc, #8] ; (5c0 <_GLOBAL__sub_I_heatmap_gp+0x10>)
5b6: f7ff ff67 bl 488 <_ZN13CRGBPalette16aSEPKh>
5ba: bd08 pop {r3, pc}
5bc: 00002a83 .word 0x00002a83
5c0: 1fffe624 .word 0x1fffe624
000005c4 <_GLOBAL__sub_I_pSmartMatrix>:
// uint32_t CRGB::Squant = ((uint32_t)((__TIME__[4]-'0') * 28))<<16 | ((__TIME__[6]-'0')*50)<<8 | ((__TIME__[7]-'0')*28);
CFastLED::CFastLED() {
// clear out the array of led controllers
// m_nControllers = 0;
m_Scale = 255;
5c4: 4b04 ldr r3, [pc, #16] ; (5d8 <_GLOBAL__sub_I_pSmartMatrix+0x14>)
5c6: 22ff movs r2, #255 ; 0xff
5c8: 701a strb r2, [r3, #0]
m_nFPS = 0;
5ca: 2200 movs r2, #0
5cc: 805a strh r2, [r3, #2]
m_pPowerFunc = NULL;
5ce: 60da str r2, [r3, #12]
m_nPowerData = 0xFFFFFFFF;
5d0: f04f 32ff mov.w r2, #4294967295 ; 0xffffffff
5d4: 609a str r2, [r3, #8]
5d6: 4770 bx lr
5d8: 1fffe654 .word 0x1fffe654
000005dc <_Z17fill_gradient_RGBP4CRGBtS_tS_>:
void fill_gradient_RGB( CRGB* leds,
uint16_t startpos, CRGB startcolor,
uint16_t endpos, CRGB endcolor )
{
5dc: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
// if the points are in the wrong order, straighten them
if( endpos < startpos ) {
5e0: 428b cmp r3, r1
void fill_gradient_RGB( CRGB* leds,
uint16_t startpos, CRGB startcolor,
uint16_t endpos, CRGB endcolor )
{
5e2: 9c08 ldr r4, [sp, #32]
// if the points are in the wrong order, straighten them
if( endpos < startpos ) {
5e4: d214 bcs.n 610 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x34>
}
/// allow assignment from one RGB struct to another
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
5e6: f892 c000 ldrb.w ip, [r2]
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
g = rhs.g;
b = rhs.b;
5ea: 78a5 ldrb r5, [r4, #2]
}
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
5ec: 7827 ldrb r7, [r4, #0]
}
/// allow assignment from one RGB struct to another
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
5ee: f884 c000 strb.w ip, [r4]
g = rhs.g;
5f2: f892 c001 ldrb.w ip, [r2, #1]
/// allow copy construction
inline CRGB(const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
g = rhs.g;
5f6: 7866 ldrb r6, [r4, #1]
/// allow assignment from one RGB struct to another
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
g = rhs.g;
5f8: f884 c001 strb.w ip, [r4, #1]
b = rhs.b;
5fc: f892 c002 ldrb.w ip, [r2, #2]
600: 7095 strb r5, [r2, #2]
602: 460d mov r5, r1
604: f884 c002 strb.w ip, [r4, #2]
608: 4619 mov r1, r3
}
/// allow assignment from one RGB struct to another
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline))
{
r = rhs.r;
60a: 7017 strb r7, [r2, #0]
g = rhs.g;
60c: 7056 strb r6, [r2, #1]
60e: 462b mov r3, r5
saccum87 rdistance87;
saccum87 gdistance87;
saccum87 bdistance87;
rdistance87 = (endcolor.r - startcolor.r) << 7;
610: f892 c000 ldrb.w ip, [r2]
gdistance87 = (endcolor.g - startcolor.g) << 7;
614: 7857 ldrb r7, [r2, #1]
bdistance87 = (endcolor.b - startcolor.b) << 7;
616: 7895 ldrb r5, [r2, #2]
saccum87 rdistance87;
saccum87 gdistance87;
saccum87 bdistance87;
rdistance87 = (endcolor.r - startcolor.r) << 7;
618: f894 8000 ldrb.w r8, [r4]
gdistance87 = (endcolor.g - startcolor.g) << 7;
61c: f894 9001 ldrb.w r9, [r4, #1]
bdistance87 = (endcolor.b - startcolor.b) << 7;
620: 78a2 ldrb r2, [r4, #2]
uint16_t pixeldistance = endpos - startpos;
622: 1a5e subs r6, r3, r1
saccum87 rdistance87;
saccum87 gdistance87;
saccum87 bdistance87;
rdistance87 = (endcolor.r - startcolor.r) << 7;
624: ebcc 0808 rsb r8, ip, r8
gdistance87 = (endcolor.g - startcolor.g) << 7;
628: ebc7 0909 rsb r9, r7, r9
bdistance87 = (endcolor.b - startcolor.b) << 7;
62c: 1b52 subs r2, r2, r5
uint16_t pixeldistance = endpos - startpos;
62e: b2b6 uxth r6, r6
saccum87 rdistance87;
saccum87 gdistance87;
saccum87 bdistance87;
rdistance87 = (endcolor.r - startcolor.r) << 7;
630: ea4f 18c8 mov.w r8, r8, lsl #7
gdistance87 = (endcolor.g - startcolor.g) << 7;
634: ea4f 19c9 mov.w r9, r9, lsl #7
bdistance87 = (endcolor.b - startcolor.b) << 7;
638: 01d2 lsls r2, r2, #7
uint16_t pixeldistance = endpos - startpos;
int16_t divisor = pixeldistance ? pixeldistance : 1;
63a: b10e cbz r6, 640 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x64>
63c: b2b6 uxth r6, r6
63e: e000 b.n 642 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x66>
640: 2601 movs r6, #1
saccum87 rdelta87 = rdistance87 / divisor;
642: b236 sxth r6, r6
644: fb98 f8f6 sdiv r8, r8, r6
saccum87 gdelta87 = gdistance87 / divisor;
648: fb99 f9f6 sdiv r9, r9, r6
saccum87 bdelta87 = bdistance87 / divisor;
64c: fb92 f6f6 sdiv r6, r2, r6
rdelta87 *= 2;
650: ea4f 0848 mov.w r8, r8, lsl #1
gdelta87 *= 2;
654: ea4f 0949 mov.w r9, r9, lsl #1
bdelta87 *= 2;
658: 0076 lsls r6, r6, #1
saccum87 rdelta87 = rdistance87 / divisor;
saccum87 gdelta87 = gdistance87 / divisor;
saccum87 bdelta87 = bdistance87 / divisor;
rdelta87 *= 2;
65a: fa1f f888 uxth.w r8, r8
gdelta87 *= 2;
65e: fa1f f989 uxth.w r9, r9
bdelta87 *= 2;
662: b2b6 uxth r6, r6
accum88 r88 = startcolor.r << 8;
664: ea4f 220c mov.w r2, ip, lsl #8
accum88 g88 = startcolor.g << 8;
668: 023c lsls r4, r7, #8
accum88 b88 = startcolor.b << 8;
66a: 022d lsls r5, r5, #8
for( uint16_t i = startpos; i <= endpos; i++) {
66c: 4299 cmp r1, r3
66e: d818 bhi.n 6a2 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0xc6>
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8);
670: eb01 0c41 add.w ip, r1, r1, lsl #1
674: eb00 070c add.w r7, r0, ip
678: ea4f 2a22 mov.w sl, r2, asr #8
67c: f800 a00c strb.w sl, [r0, ip]
680: ea4f 2c24 mov.w ip, r4, asr #8
684: f887 c001 strb.w ip, [r7, #1]
r88 += rdelta87;
688: 4442 add r2, r8
accum88 r88 = startcolor.r << 8;
accum88 g88 = startcolor.g << 8;
accum88 b88 = startcolor.b << 8;
for( uint16_t i = startpos; i <= endpos; i++) {
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8);
68a: ea4f 2c25 mov.w ip, r5, asr #8
r88 += rdelta87;
g88 += gdelta87;
68e: 444c add r4, r9
b88 += bdelta87;
690: 4435 add r5, r6
bdelta87 *= 2;
accum88 r88 = startcolor.r << 8;
accum88 g88 = startcolor.g << 8;
accum88 b88 = startcolor.b << 8;
for( uint16_t i = startpos; i <= endpos; i++) {
692: 3101 adds r1, #1
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8);
694: f887 c002 strb.w ip, [r7, #2]
r88 += rdelta87;
698: b292 uxth r2, r2
g88 += gdelta87;
69a: b2a4 uxth r4, r4
b88 += bdelta87;
69c: b2ad uxth r5, r5
bdelta87 *= 2;
accum88 r88 = startcolor.r << 8;
accum88 g88 = startcolor.g << 8;
accum88 b88 = startcolor.b << 8;
for( uint16_t i = startpos; i <= endpos; i++) {
69e: b289 uxth r1, r1
6a0: e7e4 b.n 66c <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x90>
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8);
r88 += rdelta87;
g88 += gdelta87;
b88 += bdelta87;
}
}
6a2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
6a6: ffff 4b04 vtbl.8 d20, {d15-d18}, d4
000006a8 <rtc_set>:
return RTC_TSR;
}
void rtc_set(unsigned long t)
{
RTC_SR = 0;
6a8: 4b04 ldr r3, [pc, #16] ; (6bc <rtc_set+0x14>)
RTC_TPR = 0;
6aa: 4905 ldr r1, [pc, #20] ; (6c0 <rtc_set+0x18>)
return RTC_TSR;
}
void rtc_set(unsigned long t)
{
RTC_SR = 0;
6ac: 2200 movs r2, #0
6ae: 601a str r2, [r3, #0]
RTC_TPR = 0;
6b0: 600a str r2, [r1, #0]
RTC_TSR = t;
6b2: 4a04 ldr r2, [pc, #16] ; (6c4 <rtc_set+0x1c>)
6b4: 6010 str r0, [r2, #0]
RTC_SR = RTC_SR_TCE;
6b6: 2210 movs r2, #16
6b8: 601a str r2, [r3, #0]
6ba: 4770 bx lr
6bc: 4003d014 .word 0x4003d014
6c0: 4003d004 .word 0x4003d004
6c4: 4003d000 .word 0x4003d000
000006c8 <digitalWrite>:
// TODO: startup code needs to initialize all pins to GPIO mode, input by default
void digitalWrite(uint8_t pin, uint8_t val)
{
if (pin >= CORE_NUM_DIGITAL) return;
6c8: 2821 cmp r0, #33 ; 0x21
// TODO: startup code needs to initialize all pins to GPIO mode, input by default
void digitalWrite(uint8_t pin, uint8_t val)
{
6ca: b510 push {r4, lr}
if (pin >= CORE_NUM_DIGITAL) return;
6cc: d818 bhi.n 700 <digitalWrite+0x38>
#ifdef KINETISK
if (*portModeRegister(pin)) {
6ce: 4a0d ldr r2, [pc, #52] ; (704 <digitalWrite+0x3c>)
6d0: f852 3030 ldr.w r3, [r2, r0, lsl #3]
6d4: f893 4280 ldrb.w r4, [r3, #640] ; 0x280
6d8: b13c cbz r4, 6ea <digitalWrite+0x22>
6da: 2201 movs r2, #1
if (val) {
6dc: b111 cbz r1, 6e4 <digitalWrite+0x1c>
*portSetRegister(pin) = 1;
6de: f883 2080 strb.w r2, [r3, #128] ; 0x80
6e2: bd10 pop {r4, pc}
} else {
*portClearRegister(pin) = 1;
6e4: f883 2100 strb.w r2, [r3, #256] ; 0x100
6e8: bd10 pop {r4, pc}
} else {
*portClearRegister(pin) = digitalPinToBitMask(pin);
}
#endif
} else {
volatile uint32_t *config = portConfigRegister(pin);
6ea: eb02 00c0 add.w r0, r2, r0, lsl #3
6ee: 6843 ldr r3, [r0, #4]
if (val) {
// TODO use bitband for atomic read-mod-write
*config |= (PORT_PCR_PE | PORT_PCR_PS);
6f0: 681a ldr r2, [r3, #0]
*portClearRegister(pin) = digitalPinToBitMask(pin);
}
#endif
} else {
volatile uint32_t *config = portConfigRegister(pin);
if (val) {
6f2: b111 cbz r1, 6fa <digitalWrite+0x32>
// TODO use bitband for atomic read-mod-write
*config |= (PORT_PCR_PE | PORT_PCR_PS);
6f4: f042 0203 orr.w r2, r2, #3
6f8: e001 b.n 6fe <digitalWrite+0x36>
//*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS;
} else {
// TODO use bitband for atomic read-mod-write
*config &= ~(PORT_PCR_PE);
6fa: f022 0202 bic.w r2, r2, #2
6fe: 601a str r2, [r3, #0]
700: bd10 pop {r4, pc}
702: bf00 nop
704: 00002a94 .word 0x00002a94
00000708 <pinMode>:
void pinMode(uint8_t pin, uint8_t mode)
{
volatile uint32_t *config;
if (pin >= CORE_NUM_DIGITAL) return;
708: 2821 cmp r0, #33 ; 0x21
}
void pinMode(uint8_t pin, uint8_t mode)
{
70a: b510 push {r4, lr}
volatile uint32_t *config;
if (pin >= CORE_NUM_DIGITAL) return;
70c: d837 bhi.n 77e <pinMode+0x76>
config = portConfigRegister(pin);
70e: 4a1c ldr r2, [pc, #112] ; (780 <pinMode+0x78>)
710: eb02 03c0 add.w r3, r2, r0, lsl #3
if (mode == OUTPUT || mode == OUTPUT_OPENDRAIN) {
714: 2901 cmp r1, #1
void pinMode(uint8_t pin, uint8_t mode)
{
volatile uint32_t *config;
if (pin >= CORE_NUM_DIGITAL) return;
config = portConfigRegister(pin);
716: 685b ldr r3, [r3, #4]
718: 4614 mov r4, r2
if (mode == OUTPUT || mode == OUTPUT_OPENDRAIN) {
71a: d001 beq.n 720 <pinMode+0x18>
71c: 2904 cmp r1, #4
71e: d10f bne.n 740 <pinMode+0x38>
#ifdef KINETISK
*portModeRegister(pin) = 1;
720: f854 2030 ldr.w r2, [r4, r0, lsl #3]
724: 2001 movs r0, #1
726: f882 0280 strb.w r0, [r2, #640] ; 0x280
#else
*portModeRegister(pin) |= digitalPinToBitMask(pin); // TODO: atomic
#endif
*config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
72a: f44f 72a2 mov.w r2, #324 ; 0x144
72e: 601a str r2, [r3, #0]
if (mode == OUTPUT_OPENDRAIN) {
*config |= PORT_PCR_ODE;
730: 681a ldr r2, [r3, #0]
*portModeRegister(pin) = 1;
#else
*portModeRegister(pin) |= digitalPinToBitMask(pin); // TODO: atomic
#endif
*config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1);
if (mode == OUTPUT_OPENDRAIN) {
732: 2904 cmp r1, #4
*config |= PORT_PCR_ODE;
734: bf0c ite eq
736: f042 0220 orreq.w r2, r2, #32
} else {
*config &= ~PORT_PCR_ODE;
73a: f022 0220 bicne.w r2, r2, #32
73e: e01d b.n 77c <pinMode+0x74>
}
} else {
#ifdef KINETISK
*portModeRegister(pin) = 0;
740: f852 2030 ldr.w r2, [r2, r0, lsl #3]
744: 2000 movs r0, #0
746: f882 0280 strb.w r0, [r2, #640] ; 0x280
#else
*portModeRegister(pin) &= ~digitalPinToBitMask(pin);
#endif
if (mode == INPUT || mode == INPUT_PULLUP || mode == INPUT_PULLDOWN) {
74a: b111 cbz r1, 752 <pinMode+0x4a>
74c: 1e8a subs r2, r1, #2
74e: 2a01 cmp r2, #1
750: d812 bhi.n 778 <pinMode+0x70>
*config = PORT_PCR_MUX(1);
752: f44f 7280 mov.w r2, #256 ; 0x100
if (mode == INPUT_PULLUP) {
756: 2902 cmp r1, #2
*portModeRegister(pin) = 0;
#else
*portModeRegister(pin) &= ~digitalPinToBitMask(pin);
#endif
if (mode == INPUT || mode == INPUT_PULLUP || mode == INPUT_PULLDOWN) {
*config = PORT_PCR_MUX(1);
758: 601a str r2, [r3, #0]
if (mode == INPUT_PULLUP) {
75a: d103 bne.n 764 <pinMode+0x5c>
*config |= (PORT_PCR_PE | PORT_PCR_PS); // pullup
75c: 681a ldr r2, [r3, #0]
75e: f042 0203 orr.w r2, r2, #3
762: e00b b.n 77c <pinMode+0x74>
} else if (mode == INPUT_PULLDOWN) {
764: 2903 cmp r1, #3
766: d10a bne.n 77e <pinMode+0x76>
*config |= (PORT_PCR_PE); // pulldown
768: 681a ldr r2, [r3, #0]
76a: f042 0202 orr.w r2, r2, #2
76e: 601a str r2, [r3, #0]
*config &= ~(PORT_PCR_PS);
770: 681a ldr r2, [r3, #0]
772: f022 0201 bic.w r2, r2, #1
776: e001 b.n 77c <pinMode+0x74>
}
} else {
*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup
778: f240 1203 movw r2, #259 ; 0x103
77c: 601a str r2, [r3, #0]
77e: bd10 pop {r4, pc}
780: 00002a94 .word 0x00002a94
00000784 <micros>:
uint32_t micros(void)
{
uint32_t count, current, istatus;
__disable_irq();
784: b672 cpsid i
current = SYST_CVR;
786: 4b0b ldr r3, [pc, #44] ; (7b4 <micros+0x30>)
count = systick_millis_count;
istatus = SCB_ICSR; // bit 26 indicates if systick exception pending
788: 490b ldr r1, [pc, #44] ; (7b8 <micros+0x34>)
uint32_t micros(void)
{
uint32_t count, current, istatus;
__disable_irq();
current = SYST_CVR;
78a: 681a ldr r2, [r3, #0]
count = systick_millis_count;
78c: 4b0b ldr r3, [pc, #44] ; (7bc <micros+0x38>)
78e: 681b ldr r3, [r3, #0]
istatus = SCB_ICSR; // bit 26 indicates if systick exception pending
790: 6809 ldr r1, [r1, #0]
__enable_irq();
792: b662 cpsie i
//systick_current = current;
//systick_count = count;
//systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0;
if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++;
794: 0149 lsls r1, r1, #5
796: d502 bpl.n 79e <micros+0x1a>
798: 2a32 cmp r2, #50 ; 0x32
79a: bf88 it hi
79c: 3301 addhi r3, #1
current = ((F_CPU / 1000) - 1) - current;
79e: f5c2 32bb rsb r2, r2, #95744 ; 0x17600
#if defined(KINETISL) && F_CPU == 48000000
return count * 1000 + ((current * (uint32_t)87381) >> 22);
#elif defined(KINETISL) && F_CPU == 24000000
return count * 1000 + ((current * (uint32_t)174763) >> 22);
#endif
return count * 1000 + current / (F_CPU / 1000000);
7a2: 2160 movs r1, #96 ; 0x60
__enable_irq();
//systick_current = current;
//systick_count = count;
//systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0;
if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++;
current = ((F_CPU / 1000) - 1) - current;
7a4: 32ff adds r2, #255 ; 0xff
#if defined(KINETISL) && F_CPU == 48000000
return count * 1000 + ((current * (uint32_t)87381) >> 22);
#elif defined(KINETISL) && F_CPU == 24000000
return count * 1000 + ((current * (uint32_t)174763) >> 22);
#endif
return count * 1000 + current / (F_CPU / 1000000);
7a6: fbb2 f2f1 udiv r2, r2, r1
}
7aa: f44f 707a mov.w r0, #1000 ; 0x3e8
7ae: fb00 2003 mla r0, r0, r3, r2
7b2: 4770 bx lr
7b4: e000e018 .word 0xe000e018
7b8: e000ed04 .word 0xe000ed04
7bc: 1fffe664 .word 0x1fffe664
000007c0 <delay>:
void delay(uint32_t ms)
{
7c0: b538 push {r3, r4, r5, lr}
7c2: 4604 mov r4, r0
uint32_t start = micros();
7c4: f7ff ffde bl 784 <micros>
7c8: 4605 mov r5, r0
if (ms > 0) {
7ca: b924 cbnz r4, 7d6 <delay+0x16>
7cc: bd38 pop {r3, r4, r5, pc}
while (1) {
while ((micros() - start) >= 1000) {
ms--;
if (ms == 0) return;
7ce: 3c01 subs r4, #1
7d0: d00a beq.n 7e8 <delay+0x28>
start += 1000;
7d2: f505 757a add.w r5, r5, #1000 ; 0x3e8
{
uint32_t start = micros();
if (ms > 0) {
while (1) {
while ((micros() - start) >= 1000) {
7d6: f7ff ffd5 bl 784 <micros>
7da: 1b40 subs r0, r0, r5
7dc: f5b0 7f7a cmp.w r0, #1000 ; 0x3e8
7e0: d2f5 bcs.n 7ce <delay+0xe>
ms--;
if (ms == 0) return;
start += 1000;
}
yield();
7e2: f000 fe2d bl 1440 <yield>
}
7e6: e7f6 b.n 7d6 <delay+0x16>
7e8: bd38 pop {r3, r4, r5, pc}
7ea: ffff 4b1b ; <UNDEFINED> instruction: 0xffff4b1b
000007ec <_init_Teensyduino_internal_>:
//void init_pins(void)
void _init_Teensyduino_internal_(void)
{
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
NVIC_ENABLE_IRQ(IRQ_PORTA);
7ec: 4b1b ldr r3, [pc, #108] ; (85c <_init_Teensyduino_internal_+0x70>)
7ee: f44f 7280 mov.w r2, #256 ; 0x100
#define DEFAULT_FTM_PRESCALE 0
#endif
//void init_pins(void)
void _init_Teensyduino_internal_(void)
{
7f2: b510 push {r4, lr}
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
NVIC_ENABLE_IRQ(IRQ_PORTA);
7f4: 601a str r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_PORTB);
7f6: f44f 7200 mov.w r2, #512 ; 0x200
7fa: 601a str r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_PORTC);
7fc: f44f 6280 mov.w r2, #1024 ; 0x400
800: 601a str r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_PORTD);
802: f44f 6200 mov.w r2, #2048 ; 0x800
806: 601a str r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_PORTE);
808: f44f 5280 mov.w r2, #4096 ; 0x1000
80c: 601a str r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_PORTA);
NVIC_ENABLE_IRQ(IRQ_PORTCD);
#endif
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write
//SIM_SCGC6 |= SIM_SCGC6_FTM1;
FTM0_CNT = 0;
80e: 4b14 ldr r3, [pc, #80] ; (860 <_init_Teensyduino_internal_+0x74>)
FTM0_MOD = DEFAULT_FTM_MOD;
FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10
810: 4a14 ldr r2, [pc, #80] ; (864 <_init_Teensyduino_internal_+0x78>)
FTM3_C4SC = 0x28;
FTM3_C5SC = 0x28;
FTM3_C6SC = 0x28;
FTM3_C7SC = 0x28;
#endif
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
812: 4c15 ldr r4, [pc, #84] ; (868 <_init_Teensyduino_internal_+0x7c>)
NVIC_ENABLE_IRQ(IRQ_PORTA);
NVIC_ENABLE_IRQ(IRQ_PORTCD);
#endif
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write
//SIM_SCGC6 |= SIM_SCGC6_FTM1;
FTM0_CNT = 0;
814: 2000 movs r0, #0
FTM0_MOD = DEFAULT_FTM_MOD;
816: f64b 71ff movw r1, #49151 ; 0xbfff
NVIC_ENABLE_IRQ(IRQ_PORTA);
NVIC_ENABLE_IRQ(IRQ_PORTCD);
#endif
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write
//SIM_SCGC6 |= SIM_SCGC6_FTM1;
FTM0_CNT = 0;
81a: 6018 str r0, [r3, #0]
FTM0_MOD = DEFAULT_FTM_MOD;
81c: 6059 str r1, [r3, #4]
FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10
81e: 2328 movs r3, #40 ; 0x28
820: 6013 str r3, [r2, #0]
FTM0_C1SC = 0x28;
822: 6093 str r3, [r2, #8]
FTM0_C2SC = 0x28;
824: 6113 str r3, [r2, #16]
FTM0_C3SC = 0x28;
826: 6193 str r3, [r2, #24]
FTM0_C4SC = 0x28;
828: 6213 str r3, [r2, #32]
FTM0_C5SC = 0x28;
82a: 6293 str r3, [r2, #40] ; 0x28
#if defined(__MK20DX128__) || defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__)
FTM0_C6SC = 0x28;
82c: 6313 str r3, [r2, #48] ; 0x30
FTM0_C7SC = 0x28;
82e: 6393 str r3, [r2, #56] ; 0x38
FTM3_C4SC = 0x28;
FTM3_C5SC = 0x28;
FTM3_C6SC = 0x28;
FTM3_C7SC = 0x28;
#endif
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
830: 2209 movs r2, #9
832: 6022 str r2, [r4, #0]
FTM1_CNT = 0;
834: f504 5480 add.w r4, r4, #4096 ; 0x1000
838: 3404 adds r4, #4
83a: 6020 str r0, [r4, #0]
FTM1_MOD = DEFAULT_FTM_MOD;
83c: 480b ldr r0, [pc, #44] ; (86c <_init_Teensyduino_internal_+0x80>)
83e: 6001 str r1, [r0, #0]
FTM1_C0SC = 0x28;
840: 490b ldr r1, [pc, #44] ; (870 <_init_Teensyduino_internal_+0x84>)
842: 600b str r3, [r1, #0]
FTM1_C1SC = 0x28;
844: 608b str r3, [r1, #8]
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
846: 4b0b ldr r3, [pc, #44] ; (874 <_init_Teensyduino_internal_+0x88>)
848: 601a str r2, [r3, #0]
FTM3_MOD = DEFAULT_FTM_MOD;
FTM3_C0SC = 0x28;
FTM3_C1SC = 0x28;
FTM3_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE);
#endif
analog_init();
84a: f000 fe19 bl 1480 <analog_init>
// for background about this startup delay, please see this conversation
// https://forum.pjrc.com/threads/31290-Teensey-3-2-Teensey-Loader-1-24-Issues?p=87273&viewfull=1#post87273
delay(250);
84e: 20fa movs r0, #250 ; 0xfa
850: f7ff ffb6 bl 7c0 <delay>
usb_init();
}
854: e8bd 4010 ldmia.w sp!, {r4, lr}
#endif
analog_init();
// for background about this startup delay, please see this conversation
// https://forum.pjrc.com/threads/31290-Teensey-3-2-Teensey-Loader-1-24-Issues?p=87273&viewfull=1#post87273
delay(250);
usb_init();
858: f000 bbd6 b.w 1008 <usb_init>
85c: e000e104 .word 0xe000e104
860: 40038004 .word 0x40038004
864: 4003800c .word 0x4003800c
868: 40038000 .word 0x40038000
86c: 40039008 .word 0x40039008
870: 4003900c .word 0x4003900c
874: 40039000 .word 0x40039000
00000878 <endpoint0_transmit>:
USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
}
static void endpoint0_transmit(const void *data, uint32_t len)
{
878: b5f0 push {r4, r5, r6, r7, lr}
serial_print(",");
serial_phex16(len);
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
#endif
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
87a: 4b0c ldr r3, [pc, #48] ; (8ac <endpoint0_transmit+0x34>)
87c: 4c0c ldr r4, [pc, #48] ; (8b0 <endpoint0_transmit+0x38>)
87e: 781a ldrb r2, [r3, #0]
880: f042 0502 orr.w r5, r2, #2
884: eb04 06c5 add.w r6, r4, r5, lsl #3
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
ep0_tx_data_toggle ^= 1;
ep0_tx_bdt_bank ^= 1;
888: f082 0201 eor.w r2, r2, #1
serial_print(",");
serial_phex16(len);
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
#endif
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
88c: 6070 str r0, [r6, #4]
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
88e: 4809 ldr r0, [pc, #36] ; (8b4 <endpoint0_transmit+0x3c>)
ep0_tx_data_toggle ^= 1;
ep0_tx_bdt_bank ^= 1;
890: 701a strb r2, [r3, #0]
serial_phex16(len);
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
#endif
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
892: 7806 ldrb r6, [r0, #0]
894: 2e00 cmp r6, #0
896: bf0c ite eq
898: 2788 moveq r7, #136 ; 0x88
89a: 27c8 movne r7, #200 ; 0xc8
ep0_tx_data_toggle ^= 1;
89c: f086 0601 eor.w r6, r6, #1
serial_phex16(len);
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
#endif
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
8a0: ea47 4101 orr.w r1, r7, r1, lsl #16
ep0_tx_data_toggle ^= 1;
8a4: 7006 strb r6, [r0, #0]
serial_phex16(len);
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even");
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n");
#endif
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data;
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle);
8a6: f844 1035 str.w r1, [r4, r5, lsl #3]
ep0_tx_data_toggle ^= 1;
ep0_tx_bdt_bank ^= 1;
8aa: bdf0 pop {r4, r5, r6, r7, pc}
8ac: 1fffe6d0 .word 0x1fffe6d0
8b0: 1fffe000 .word 0x1fffe000
8b4: 1fffe748 .word 0x1fffe748
000008b8 <usb_rx>:
usb_packet_t *usb_rx(uint32_t endpoint)
{
usb_packet_t *ret;
endpoint--;
8b8: 1e43 subs r3, r0, #1
if (endpoint >= NUM_ENDPOINTS) return NULL;
8ba: 2b03 cmp r3, #3
usb_packet_t *usb_rx(uint32_t endpoint)
{
8bc: b510 push {r4, lr}
usb_packet_t *ret;
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return NULL;
8be: d810 bhi.n 8e2 <usb_rx+0x2a>
__disable_irq();
8c0: b672 cpsid i
ret = rx_first[endpoint];
8c2: 4a09 ldr r2, [pc, #36] ; (8e8 <usb_rx+0x30>)
8c4: f852 0023 ldr.w r0, [r2, r3, lsl #2]
if (ret) {
8c8: b148 cbz r0, 8de <usb_rx+0x26>
rx_first[endpoint] = ret->next;
8ca: 6841 ldr r1, [r0, #4]
8cc: f842 1023 str.w r1, [r2, r3, lsl #2]
usb_rx_byte_count_data[endpoint] -= ret->len;
8d0: 4a06 ldr r2, [pc, #24] ; (8ec <usb_rx+0x34>)
8d2: 8801 ldrh r1, [r0, #0]
8d4: f832 4013 ldrh.w r4, [r2, r3, lsl #1]
8d8: 1a61 subs r1, r4, r1
8da: f822 1013 strh.w r1, [r2, r3, lsl #1]
}
__enable_irq();
8de: b662 cpsie i
//serial_print("rx, epidx=");
//serial_phex(endpoint);
//serial_print(", packet=");
//serial_phex32(ret);
//serial_print("\n");
return ret;
8e0: bd10 pop {r4, pc}
usb_packet_t *usb_rx(uint32_t endpoint)
{
usb_packet_t *ret;
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return NULL;
8e2: 2000 movs r0, #0
//serial_phex(endpoint);
//serial_print(", packet=");
//serial_phex32(ret);
//serial_print("\n");
return ret;
}
8e4: bd10 pop {r4, pc}
8e6: bf00 nop
8e8: 1fffe6c0 .word 0x1fffe6c0
8ec: 1fffe924 .word 0x1fffe924
000008f0 <usb_tx_packet_count>:
uint32_t usb_tx_packet_count(uint32_t endpoint)
{
const usb_packet_t *p;
uint32_t count=0;
endpoint--;
8f0: 3801 subs r0, #1
if (endpoint >= NUM_ENDPOINTS) return 0;
8f2: 2803 cmp r0, #3
8f4: d80a bhi.n 90c <usb_tx_packet_count+0x1c>
__disable_irq();
8f6: b672 cpsid i
for (p = tx_first[endpoint]; p; p = p->next) count++;
8f8: 4b05 ldr r3, [pc, #20] ; (910 <usb_tx_packet_count+0x20>)
8fa: f853 3020 ldr.w r3, [r3, r0, lsl #2]
}
uint32_t usb_tx_packet_count(uint32_t endpoint)
{
const usb_packet_t *p;
uint32_t count=0;
8fe: 2000 movs r0, #0
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return 0;
__disable_irq();
for (p = tx_first[endpoint]; p; p = p->next) count++;
900: b113 cbz r3, 908 <usb_tx_packet_count+0x18>
902: 3001 adds r0, #1
904: 685b ldr r3, [r3, #4]
906: e7fb b.n 900 <usb_tx_packet_count+0x10>
__enable_irq();
908: b662 cpsie i
return count;
90a: 4770 bx lr
{
const usb_packet_t *p;
uint32_t count=0;
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return 0;
90c: 2000 movs r0, #0
__disable_irq();
for (p = tx_first[endpoint]; p; p = p->next) count++;
__enable_irq();
return count;
}
90e: 4770 bx lr
910: 1fffe714 .word 0x1fffe714
00000914 <usb_rx_memory>:
// user is creating data very quickly, their consumption could starve reception
// without this prioritization. The packet buffer (input) is assigned to the
// first endpoint needing memory.
//
void usb_rx_memory(usb_packet_t *packet)
{
914: b510 push {r4, lr}
unsigned int i;
const uint8_t *cfg;
cfg = usb_endpoint_config_table;
//serial_print("rx_mem:");
__disable_irq();
916: b672 cpsid i
for (i=1; i <= NUM_ENDPOINTS; i++) {
918: 2301 movs r3, #1
91a: 4a17 ldr r2, [pc, #92] ; (978 <usb_rx_memory+0x64>)
91c: 441a add r2, r3
#ifdef AUDIO_INTERFACE
if (i == AUDIO_RX_ENDPOINT) continue;
#endif
if (*cfg++ & USB_ENDPT_EPRXEN) {
91e: f812 2c01 ldrb.w r2, [r2, #-1]
922: 0712 lsls r2, r2, #28
924: d51c bpl.n 960 <usb_rx_memory+0x4c>
if (table[index(i, RX, EVEN)].desc == 0) {
926: 0099 lsls r1, r3, #2
928: 4a14 ldr r2, [pc, #80] ; (97c <usb_rx_memory+0x68>)
92a: f852 4031 ldr.w r4, [r2, r1, lsl #3]
92e: b92c cbnz r4, 93c <usb_rx_memory+0x28>
table[index(i, RX, EVEN)].addr = packet->buf;
930: eb02 1343 add.w r3, r2, r3, lsl #5
934: 3008 adds r0, #8
936: 6058 str r0, [r3, #4]
table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0);
938: 4b11 ldr r3, [pc, #68] ; (980 <usb_rx_memory+0x6c>)
93a: e009 b.n 950 <usb_rx_memory+0x3c>
__enable_irq();
//serial_phex(i);
//serial_print(",even\n");
return;
}
if (table[index(i, RX, ODD)].desc == 0) {
93c: f041 0101 orr.w r1, r1, #1
940: f852 4031 ldr.w r4, [r2, r1, lsl #3]
944: b964 cbnz r4, 960 <usb_rx_memory+0x4c>
table[index(i, RX, ODD)].addr = packet->buf;
946: eb02 03c1 add.w r3, r2, r1, lsl #3
94a: 3008 adds r0, #8
94c: 6058 str r0, [r3, #4]
table[index(i, RX, ODD)].desc = BDT_DESC(64, 1);
94e: 4b0d ldr r3, [pc, #52] ; (984 <usb_rx_memory+0x70>)
950: f842 3031 str.w r3, [r2, r1, lsl #3]
usb_rx_memory_needed--;
954: 4b0c ldr r3, [pc, #48] ; (988 <usb_rx_memory+0x74>)
956: 781a ldrb r2, [r3, #0]
958: 3a01 subs r2, #1
95a: 701a strb r2, [r3, #0]
__enable_irq();
95c: b662 cpsie i
//serial_phex(i);
//serial_print(",odd\n");
return;
95e: bd10 pop {r4, pc}
const uint8_t *cfg;
cfg = usb_endpoint_config_table;
//serial_print("rx_mem:");
__disable_irq();
for (i=1; i <= NUM_ENDPOINTS; i++) {
960: 3301 adds r3, #1
962: 2b05 cmp r3, #5
964: d1d9 bne.n 91a <usb_rx_memory+0x6>
//serial_print(",odd\n");
return;
}
}
}
__enable_irq();
966: b662 cpsie i
// we should never reach this point. If we get here, it means
// usb_rx_memory_needed was set greater than zero, but no memory
// was actually needed.
usb_rx_memory_needed = 0;
968: 4b07 ldr r3, [pc, #28] ; (988 <usb_rx_memory+0x74>)
96a: 2200 movs r2, #0
96c: 701a strb r2, [r3, #0]
usb_free(packet);
return;
}
96e: e8bd 4010 ldmia.w sp!, {r4, lr}
__enable_irq();
// we should never reach this point. If we get here, it means
// usb_rx_memory_needed was set greater than zero, but no memory
// was actually needed.
usb_rx_memory_needed = 0;
usb_free(packet);
972: f000 bba5 b.w 10c0 <usb_free>
976: bf00 nop
978: 00002bd0 .word 0x00002bd0
97c: 1fffe000 .word 0x1fffe000
980: 00400088 .word 0x00400088
984: 004000c8 .word 0x004000c8
988: 1fffe73e .word 0x1fffe73e
0000098c <usb_tx>:
void usb_tx(uint32_t endpoint, usb_packet_t *packet)
{
bdt_t *b = &table[index(endpoint, TX, EVEN)];
uint8_t next;
endpoint--;
98c: 1e43 subs r3, r0, #1
if (endpoint >= NUM_ENDPOINTS) return;
98e: 2b03 cmp r3, #3
//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd))
//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2))
void usb_tx(uint32_t endpoint, usb_packet_t *packet)
{
990: b530 push {r4, r5, lr}
bdt_t *b = &table[index(endpoint, TX, EVEN)];
uint8_t next;
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return;
992: d832 bhi.n 9fa <usb_tx+0x6e>
//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd))
//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2))
void usb_tx(uint32_t endpoint, usb_packet_t *packet)
{
bdt_t *b = &table[index(endpoint, TX, EVEN)];
994: 4a19 ldr r2, [pc, #100] ; (9fc <usb_tx+0x70>)
996: 0140 lsls r0, r0, #5
998: f040 0010 orr.w r0, r0, #16
99c: 4410 add r0, r2
uint8_t next;
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return;
__disable_irq();
99e: b672 cpsid i
//serial_print("txstate=");
//serial_phex(tx_state[endpoint]);
//serial_print("\n");
switch (tx_state[endpoint]) {
9a0: 4c17 ldr r4, [pc, #92] ; (a00 <usb_tx+0x74>)
9a2: 5ce2 ldrb r2, [r4, r3]
9a4: 2a03 cmp r2, #3
9a6: d809 bhi.n 9bc <usb_tx+0x30>
9a8: e8df f002 tbb [pc, r2]
9ac: 05180216 .word 0x05180216
case TX_STATE_BOTH_FREE_EVEN_FIRST:
next = TX_STATE_ODD_FREE;
break;
case TX_STATE_BOTH_FREE_ODD_FIRST:
b++;
9b0: 3008 adds r0, #8
next = TX_STATE_EVEN_FREE;
9b2: 2202 movs r2, #2
break;
9b4: e013 b.n 9de <usb_tx+0x52>
case TX_STATE_EVEN_FREE:
next = TX_STATE_NONE_FREE_ODD_FIRST;
break;
case TX_STATE_ODD_FREE:
b++;
9b6: 3008 adds r0, #8
next = TX_STATE_NONE_FREE_EVEN_FIRST;
9b8: 2204 movs r2, #4
break;
9ba: e010 b.n 9de <usb_tx+0x52>
default:
if (tx_first[endpoint] == NULL) {
9bc: 4811 ldr r0, [pc, #68] ; (a04 <usb_tx+0x78>)
9be: 4a12 ldr r2, [pc, #72] ; (a08 <usb_tx+0x7c>)
9c0: f850 4023 ldr.w r4, [r0, r3, lsl #2]
9c4: b914 cbnz r4, 9cc <usb_tx+0x40>
tx_first[endpoint] = packet;
9c6: f840 1023 str.w r1, [r0, r3, lsl #2]
9ca: e002 b.n 9d2 <usb_tx+0x46>
} else {
tx_last[endpoint]->next = packet;
9cc: f852 0023 ldr.w r0, [r2, r3, lsl #2]
9d0: 6041 str r1, [r0, #4]
}
tx_last[endpoint] = packet;
9d2: f842 1023 str.w r1, [r2, r3, lsl #2]
9d6: e00f b.n 9f8 <usb_tx+0x6c>
//serial_print("txstate=");
//serial_phex(tx_state[endpoint]);
//serial_print("\n");
switch (tx_state[endpoint]) {
case TX_STATE_BOTH_FREE_EVEN_FIRST:
next = TX_STATE_ODD_FREE;
9d8: 2203 movs r2, #3
9da: e000 b.n 9de <usb_tx+0x52>
case TX_STATE_BOTH_FREE_ODD_FIRST:
b++;
next = TX_STATE_EVEN_FREE;
break;
case TX_STATE_EVEN_FREE:
next = TX_STATE_NONE_FREE_ODD_FIRST;
9dc: 2205 movs r2, #5
}
tx_last[endpoint] = packet;
__enable_irq();
return;
}
tx_state[endpoint] = next;
9de: 54e2 strb r2, [r4, r3]
b->addr = packet->buf;
b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0);
9e0: f010 0f08 tst.w r0, #8
tx_last[endpoint] = packet;
__enable_irq();
return;
}
tx_state[endpoint] = next;
b->addr = packet->buf;
9e4: f101 0308 add.w r3, r1, #8
b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0);
9e8: 880a ldrh r2, [r1, #0]
tx_last[endpoint] = packet;
__enable_irq();
return;
}
tx_state[endpoint] = next;
b->addr = packet->buf;
9ea: 6043 str r3, [r0, #4]
b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0);
9ec: bf0c ite eq
9ee: 2388 moveq r3, #136 ; 0x88
9f0: 23c8 movne r3, #200 ; 0xc8
9f2: ea43 4302 orr.w r3, r3, r2, lsl #16
9f6: 6003 str r3, [r0, #0]
__enable_irq();
9f8: b662 cpsie i
9fa: bd30 pop {r4, r5, pc}
9fc: 1fffe000 .word 0x1fffe000
a00: 1fffe67c .word 0x1fffe67c
a04: 1fffe714 .word 0x1fffe714
a08: 1fffe724 .word 0x1fffe724
00000a0c <usb_isr>:
}
void usb_isr(void)
{
a0c: e92d 4ff8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, lr}
//serial_print("isr");
//status = USB0_ISTAT;
//serial_phex(status);
//serial_print("\n");
restart:
status = USB0_ISTAT;
a10: 4fab ldr r7, [pc, #684] ; (cc0 <usb_isr+0x2b4>)
a12: 783c ldrb r4, [r7, #0]
a14: b2e4 uxtb r4, r4
if ((status & USB_ISTAT_SOFTOK /* 04 */ )) {
a16: f014 0f04 tst.w r4, #4
a1a: 463d mov r5, r7
a1c: d019 beq.n a52 <usb_isr+0x46>
if (usb_configuration) {
a1e: 4ba9 ldr r3, [pc, #676] ; (cc4 <usb_isr+0x2b8>)
a20: 781b ldrb r3, [r3, #0]
a22: b1a3 cbz r3, a4e <usb_isr+0x42>
t = usb_reboot_timer;
a24: 4aa8 ldr r2, [pc, #672] ; (cc8 <usb_isr+0x2bc>)
a26: 7811 ldrb r1, [r2, #0]
if (t) {
a28: f001 03ff and.w r3, r1, #255 ; 0xff
a2c: b121 cbz r1, a38 <usb_isr+0x2c>
usb_reboot_timer = --t;
a2e: 3b01 subs r3, #1
a30: b2db uxtb r3, r3
a32: 7013 strb r3, [r2, #0]
if (!t) _reboot_Teensyduino_();
a34: b903 cbnz r3, a38 <usb_isr+0x2c>
void _reboot_Teensyduino_(void)
{
// TODO: initialize R0 with a code....
__asm__ volatile("bkpt");
a36: be00 bkpt 0x0000
if (t) {
usb_reboot_timer = --t;
if (!t) _reboot_Teensyduino_();
}
#ifdef CDC_DATA_INTERFACE
t = usb_cdc_transmit_flush_timer;
a38: 4aa4 ldr r2, [pc, #656] ; (ccc <usb_isr+0x2c0>)
a3a: 7811 ldrb r1, [r2, #0]
if (t) {
a3c: f001 03ff and.w r3, r1, #255 ; 0xff
a40: b129 cbz r1, a4e <usb_isr+0x42>
usb_cdc_transmit_flush_timer = --t;
a42: 3b01 subs r3, #1
a44: b2db uxtb r3, r3
a46: 7013 strb r3, [r2, #0]
if (t == 0) usb_serial_flush_callback();
a48: b90b cbnz r3, a4e <usb_isr+0x42>
a4a: f000 fc65 bl 1318 <usb_serial_flush_callback>
#endif
#ifdef MULTITOUCH_INTERFACE
usb_touchscreen_update_callback();
#endif
}
USB0_ISTAT = USB_ISTAT_SOFTOK;
a4e: 2304 movs r3, #4
a50: 703b strb r3, [r7, #0]
}
if ((status & USB_ISTAT_TOKDNE /* 08 */ )) {
a52: f004 0308 and.w r3, r4, #8
a56: f003 02ff and.w r2, r3, #255 ; 0xff
a5a: 2b00 cmp r3, #0
a5c: f000 8267 beq.w f2e <usb_isr+0x522>
uint8_t endpoint;
stat = USB0_STAT;
a60: 4b9b ldr r3, [pc, #620] ; (cd0 <usb_isr+0x2c4>)
a62: 4c9c ldr r4, [pc, #624] ; (cd4 <usb_isr+0x2c8>)
a64: 781a ldrb r2, [r3, #0]
a66: b2d2 uxtb r2, r2
//serial_print("token: ep=");
//serial_phex(stat >> 4);
//serial_print(stat & 0x08 ? ",tx" : ",rx");
//serial_print(stat & 0x04 ? ",odd\n" : ",even\n");
endpoint = stat >> 4;
if (endpoint == 0) {
a68: 0915 lsrs r5, r2, #4
a6a: ea4f 0892 mov.w r8, r2, lsr #2
a6e: f040 81e4 bne.w e3a <usb_isr+0x42e>
bdt_t *b;
uint32_t pid, size;
uint8_t *buf;
const uint8_t *data;
b = stat2bufferdescriptor(stat);
a72: eb04 03c8 add.w r3, r4, r8, lsl #3
pid = BDT_PID(b->desc);
//count = b->desc >> 16;
buf = b->addr;
a76: 6859 ldr r1, [r3, #4]
uint32_t pid, size;
uint8_t *buf;
const uint8_t *data;
b = stat2bufferdescriptor(stat);
pid = BDT_PID(b->desc);
a78: f854 3038 ldr.w r3, [r4, r8, lsl #3]
a7c: f3c3 0383 ubfx r3, r3, #2, #4
//serial_phex(pid);
//serial_print(", count:");
//serial_phex(count);
//serial_print("\n");
switch (pid) {
a80: 3b01 subs r3, #1
a82: 2b0c cmp r3, #12
a84: f200 81d6 bhi.w e34 <usb_isr+0x428>
a88: e8df f013 tbh [pc, r3, lsl #1]
a8c: 01950195 .word 0x01950195
a90: 01d401d4 .word 0x01d401d4
a94: 01d401d4 .word 0x01d401d4
a98: 01d401d4 .word 0x01d401d4
a9c: 01d401b0 .word 0x01d401b0
aa0: 01d401d4 .word 0x01d401d4
aa4: 000d .short 0x000d
case 0x0D: // Setup received from host
//serial_print("PID=Setup\n");
//if (count != 8) ; // panic?
// grab the 8 byte setup info
setup.word1 = *(uint32_t *)(buf);
aa6: 4d8c ldr r5, [pc, #560] ; (cd8 <usb_isr+0x2cc>)
aa8: 680a ldr r2, [r1, #0]
setup.word2 = *(uint32_t *)(buf + 4);
aaa: 684b ldr r3, [r1, #4]
//serial_print("leftover tx odd\n");
//}
table[index(0, TX, EVEN)].desc = 0;
table[index(0, TX, ODD)].desc = 0;
// first IN after Setup is always DATA1
ep0_tx_data_toggle = 1;
aac: 488b ldr r0, [pc, #556] ; (cdc <usb_isr+0x2d0>)
case 0x0D: // Setup received from host
//serial_print("PID=Setup\n");
//if (count != 8) ; // panic?
// grab the 8 byte setup info
setup.word1 = *(uint32_t *)(buf);
setup.word2 = *(uint32_t *)(buf + 4);
aae: 606b str r3, [r5, #4]
//serial_print("leftover tx odd\n");
//}
table[index(0, TX, EVEN)].desc = 0;
table[index(0, TX, ODD)].desc = 0;
// first IN after Setup is always DATA1
ep0_tx_data_toggle = 1;
ab0: 2101 movs r1, #1
// grab the 8 byte setup info
setup.word1 = *(uint32_t *)(buf);
setup.word2 = *(uint32_t *)(buf + 4);
// give the buffer back
b->desc = BDT_DESC(EP0_SIZE, DATA1);
ab2: 4b8b ldr r3, [pc, #556] ; (ce0 <usb_isr+0x2d4>)
ab4: f844 3038 str.w r3, [r4, r8, lsl #3]
switch (pid) {
case 0x0D: // Setup received from host
//serial_print("PID=Setup\n");
//if (count != 8) ; // panic?
// grab the 8 byte setup info
setup.word1 = *(uint32_t *)(buf);
ab8: 602a str r2, [r5, #0]
b->desc = BDT_DESC(EP0_SIZE, DATA1);
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1);
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1);
// clear any leftover pending IN transactions
ep0_tx_ptr = NULL;
aba: f8df 8250 ldr.w r8, [pc, #592] ; d0c <usb_isr+0x300>
//serial_print("leftover tx odd\n");
//}
table[index(0, TX, EVEN)].desc = 0;
table[index(0, TX, ODD)].desc = 0;
// first IN after Setup is always DATA1
ep0_tx_data_toggle = 1;
abe: 7001 strb r1, [r0, #0]
volatile uint8_t *reg;
uint8_t epconf;
const uint8_t *cfg;
int i;
switch (setup.wRequestAndType) {
ac0: b292 uxth r2, r2
ac2: f240 6081 movw r0, #1665 ; 0x681
b->desc = BDT_DESC(EP0_SIZE, DATA1);
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1);
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1);
// clear any leftover pending IN transactions
ep0_tx_ptr = NULL;
ac6: 2300 movs r3, #0
volatile uint8_t *reg;
uint8_t epconf;
const uint8_t *cfg;
int i;
switch (setup.wRequestAndType) {
ac8: 4282 cmp r2, r0
b->desc = BDT_DESC(EP0_SIZE, DATA1);
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1);
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1);
// clear any leftover pending IN transactions
ep0_tx_ptr = NULL;
aca: f8c8 3000 str.w r3, [r8]
//serial_print("leftover tx even\n");
//}
//if (table[index(0, TX, ODD)].desc & 0x80) {
//serial_print("leftover tx odd\n");
//}
table[index(0, TX, EVEN)].desc = 0;
ace: 6123 str r3, [r4, #16]
table[index(0, TX, ODD)].desc = 0;
ad0: 61a3 str r3, [r4, #24]
volatile uint8_t *reg;
uint8_t epconf;
const uint8_t *cfg;
int i;
switch (setup.wRequestAndType) {
ad2: d817 bhi.n b04 <usb_isr+0xf8>
ad4: f5b2 6fd0 cmp.w r2, #1664 ; 0x680
ad8: f080 811e bcs.w d18 <usb_isr+0x30c>
adc: f5b2 7f81 cmp.w r2, #258 ; 0x102
ae0: f000 80cf beq.w c82 <usb_isr+0x276>
ae4: d806 bhi.n af4 <usb_isr+0xe8>
ae6: 2a80 cmp r2, #128 ; 0x80
ae8: f000 80ba beq.w c60 <usb_isr+0x254>
aec: 2a82 cmp r2, #130 ; 0x82
aee: f000 80bb beq.w c68 <usb_isr+0x25c>
af2: e131 b.n d58 <usb_isr+0x34c>
af4: f240 3302 movw r3, #770 ; 0x302
af8: 429a cmp r2, r3
afa: f000 80d1 beq.w ca0 <usb_isr+0x294>
afe: f5b2 6fa0 cmp.w r2, #1280 ; 0x500
b02: e01c b.n b3e <usb_isr+0x132>
b04: f242 0021 movw r0, #8225 ; 0x2021
b08: 4282 cmp r2, r0
b0a: f000 8151 beq.w db0 <usb_isr+0x3a4>
b0e: d80e bhi.n b2e <usb_isr+0x122>
b10: f5b2 6f08 cmp.w r2, #2176 ; 0x880
b14: f000 809e beq.w c54 <usb_isr+0x248>
b18: f5b2 6f10 cmp.w r2, #2304 ; 0x900
b1c: f040 811c bne.w d58 <usb_isr+0x34c>
case 0x0500: // SET_ADDRESS
break;
case 0x0900: // SET_CONFIGURATION
//serial_print("configure\n");
usb_configuration = setup.wValue;
b20: 4b68 ldr r3, [pc, #416] ; (cc4 <usb_isr+0x2b8>)
b22: 4e6c ldr r6, [pc, #432] ; (cd4 <usb_isr+0x2c8>)
b24: 78aa ldrb r2, [r5, #2]
b26: 701a strb r2, [r3, #0]
b28: f106 0980 add.w r9, r6, #128 ; 0x80
b2c: e00a b.n b44 <usb_isr+0x138>
volatile uint8_t *reg;
uint8_t epconf;
const uint8_t *cfg;
int i;
switch (setup.wRequestAndType) {
b2e: f242 2121 movw r1, #8737 ; 0x2221
b32: 428a cmp r2, r1
b34: f000 8108 beq.w d48 <usb_isr+0x33c>
b38: f242 3321 movw r3, #8993 ; 0x2321
b3c: 429a cmp r2, r3
b3e: f000 810f beq.w d60 <usb_isr+0x354>
b42: e109 b.n d58 <usb_isr+0x34c>
usb_configuration = setup.wValue;
reg = &USB0_ENDPT1;
cfg = usb_endpoint_config_table;
// clear all BDT entries, free any allocated memory...
for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) {
if (table[i].desc & BDT_OWN) {
b44: 6a33 ldr r3, [r6, #32]
b46: 061b lsls r3, r3, #24
b48: d503 bpl.n b52 <usb_isr+0x146>
usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8));
b4a: 6a70 ldr r0, [r6, #36] ; 0x24
b4c: 3808 subs r0, #8
b4e: f000 fab7 bl 10c0 <usb_free>
b52: 3608 adds r6, #8
//serial_print("configure\n");
usb_configuration = setup.wValue;
reg = &USB0_ENDPT1;
cfg = usb_endpoint_config_table;
// clear all BDT entries, free any allocated memory...
for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) {
b54: 454e cmp r6, r9
b56: d1f5 bne.n b44 <usb_isr+0x138>
b58: 2600 movs r6, #0
b5a: 46b1 mov r9, r6
}
}
// free all queued packets
for (i=0; i < NUM_ENDPOINTS; i++) {
usb_packet_t *p, *n;
p = rx_first[i];
b5c: f8df a1b0 ldr.w sl, [pc, #432] ; d10 <usb_isr+0x304>
b60: f856 000a ldr.w r0, [r6, sl]
while (p) {
b64: b128 cbz r0, b72 <usb_isr+0x166>
n = p->next;
b66: f8d0 b004 ldr.w fp, [r0, #4]
usb_free(p);
b6a: f000 faa9 bl 10c0 <usb_free>
p = n;
b6e: 4658 mov r0, fp
b70: e7f8 b.n b64 <usb_isr+0x158>
}
rx_first[i] = NULL;
b72: f84a 0006 str.w r0, [sl, r6]
rx_last[i] = NULL;
b76: 4b5b ldr r3, [pc, #364] ; (ce4 <usb_isr+0x2d8>)
p = tx_first[i];
b78: f8df a198 ldr.w sl, [pc, #408] ; d14 <usb_isr+0x308>
n = p->next;
usb_free(p);
p = n;
}
rx_first[i] = NULL;
rx_last[i] = NULL;
b7c: 50f0 str r0, [r6, r3]
p = tx_first[i];
b7e: f856 000a ldr.w r0, [r6, sl]
while (p) {
b82: b128 cbz r0, b90 <usb_isr+0x184>
n = p->next;
b84: f8d0 b004 ldr.w fp, [r0, #4]
usb_free(p);
b88: f000 fa9a bl 10c0 <usb_free>
p = n;
b8c: 4658 mov r0, fp
b8e: e7f8 b.n b82 <usb_isr+0x176>
}
tx_first[i] = NULL;
tx_last[i] = NULL;
b90: 4b55 ldr r3, [pc, #340] ; (ce8 <usb_isr+0x2dc>)
while (p) {
n = p->next;
usb_free(p);
p = n;
}
tx_first[i] = NULL;
b92: f84a 0006 str.w r0, [sl, r6]
tx_last[i] = NULL;
b96: 50f0 str r0, [r6, r3]
usb_rx_byte_count_data[i] = 0;
b98: 4b54 ldr r3, [pc, #336] ; (cec <usb_isr+0x2e0>)
b9a: f823 0019 strh.w r0, [r3, r9, lsl #1]
switch (tx_state[i]) {
b9e: 4b54 ldr r3, [pc, #336] ; (cf0 <usb_isr+0x2e4>)
ba0: f819 2003 ldrb.w r2, [r9, r3]
ba4: 3a02 subs r2, #2
ba6: 2a03 cmp r2, #3
ba8: d808 bhi.n bbc <usb_isr+0x1b0>
baa: e8df f002 tbb [pc, r2]
bae: 0402 .short 0x0402
bb0: 0402 .short 0x0402
case TX_STATE_EVEN_FREE:
case TX_STATE_NONE_FREE_EVEN_FIRST:
tx_state[i] = TX_STATE_BOTH_FREE_EVEN_FIRST;
bb2: 2200 movs r2, #0
bb4: e000 b.n bb8 <usb_isr+0x1ac>
break;
case TX_STATE_ODD_FREE:
case TX_STATE_NONE_FREE_ODD_FIRST:
tx_state[i] = TX_STATE_BOTH_FREE_ODD_FIRST;
bb6: 2201 movs r2, #1
bb8: f803 2009 strb.w r2, [r3, r9]
if (table[i].desc & BDT_OWN) {
usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8));
}
}
// free all queued packets
for (i=0; i < NUM_ENDPOINTS; i++) {
bbc: f109 0901 add.w r9, r9, #1
bc0: f1b9 0f04 cmp.w r9, #4
bc4: f106 0604 add.w r6, r6, #4
bc8: d1c8 bne.n b5c <usb_isr+0x150>
break;
default:
break;
}
}
usb_rx_memory_needed = 0;
bca: 4b4a ldr r3, [pc, #296] ; (cf4 <usb_isr+0x2e8>)
bcc: 2200 movs r2, #0
bce: 701a strb r2, [r3, #0]
for (i=1; i <= NUM_ENDPOINTS; i++) {
bd0: 2601 movs r6, #1
bd2: 469a mov sl, r3
bd4: 4a48 ldr r2, [pc, #288] ; (cf8 <usb_isr+0x2ec>)
bd6: 4b49 ldr r3, [pc, #292] ; (cfc <usb_isr+0x2f0>)
bd8: 4432 add r2, r6
bda: 4433 add r3, r6
epconf = *cfg++;
bdc: f812 2c01 ldrb.w r2, [r2, #-1]
be0: 009b lsls r3, r3, #2
table[index(i, RX, EVEN)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN;
table[index(i, RX, ODD)].addr = usb_audio_receive_buffer;
table[index(i, RX, ODD)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN;
} else
#endif
if (epconf & USB_ENDPT_EPRXEN) {
be2: f012 0f08 tst.w r2, #8
}
}
usb_rx_memory_needed = 0;
for (i=1; i <= NUM_ENDPOINTS; i++) {
epconf = *cfg++;
*reg = epconf;
be6: 701a strb r2, [r3, #0]
be8: ea4f 0986 mov.w r9, r6, lsl #2
table[index(i, RX, EVEN)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN;
table[index(i, RX, ODD)].addr = usb_audio_receive_buffer;
table[index(i, RX, ODD)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN;
} else
#endif
if (epconf & USB_ENDPT_EPRXEN) {
bec: d025 beq.n c3a <usb_isr+0x22e>
usb_packet_t *p;
p = usb_malloc();
bee: f000 fa49 bl 1084 <usb_malloc>
if (p) {
bf2: b138 cbz r0, c04 <usb_isr+0x1f8>
table[index(i, RX, EVEN)].addr = p->buf;
bf4: eb04 1346 add.w r3, r4, r6, lsl #5
bf8: 3008 adds r0, #8
bfa: 6058 str r0, [r3, #4]
table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0);
bfc: 4b40 ldr r3, [pc, #256] ; (d00 <usb_isr+0x2f4>)
bfe: f844 3039 str.w r3, [r4, r9, lsl #3]
c02: e006 b.n c12 <usb_isr+0x206>
} else {
table[index(i, RX, EVEN)].desc = 0;
usb_rx_memory_needed++;
c04: f89a 3000 ldrb.w r3, [sl]
p = usb_malloc();
if (p) {
table[index(i, RX, EVEN)].addr = p->buf;
table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0);
} else {
table[index(i, RX, EVEN)].desc = 0;
c08: f844 0039 str.w r0, [r4, r9, lsl #3]
usb_rx_memory_needed++;
c0c: 3301 adds r3, #1
c0e: f88a 3000 strb.w r3, [sl]
}
p = usb_malloc();
c12: f000 fa37 bl 1084 <usb_malloc>
if (p) {
table[index(i, RX, ODD)].addr = p->buf;
c16: f049 0301 orr.w r3, r9, #1
} else {
table[index(i, RX, EVEN)].desc = 0;
usb_rx_memory_needed++;
}
p = usb_malloc();
if (p) {
c1a: b138 cbz r0, c2c <usb_isr+0x220>
table[index(i, RX, ODD)].addr = p->buf;
c1c: eb04 02c3 add.w r2, r4, r3, lsl #3
c20: 3008 adds r0, #8
c22: 6050 str r0, [r2, #4]
table[index(i, RX, ODD)].desc = BDT_DESC(64, 1);
c24: 4a2e ldr r2, [pc, #184] ; (ce0 <usb_isr+0x2d4>)
c26: f844 2033 str.w r2, [r4, r3, lsl #3]
c2a: e006 b.n c3a <usb_isr+0x22e>
} else {
table[index(i, RX, ODD)].desc = 0;
c2c: f844 0033 str.w r0, [r4, r3, lsl #3]
usb_rx_memory_needed++;
c30: f89a 3000 ldrb.w r3, [sl]
c34: 3301 adds r3, #1
c36: f88a 3000 strb.w r3, [sl]
}
}
table[index(i, TX, EVEN)].desc = 0;
c3a: f049 0202 orr.w r2, r9, #2
default:
break;
}
}
usb_rx_memory_needed = 0;
for (i=1; i <= NUM_ENDPOINTS; i++) {
c3e: 3601 adds r6, #1
table[index(i, RX, ODD)].desc = 0;
usb_rx_memory_needed++;
}
}
table[index(i, TX, EVEN)].desc = 0;
table[index(i, TX, ODD)].desc = 0;
c40: f049 0903 orr.w r9, r9, #3
} else {
table[index(i, RX, ODD)].desc = 0;
usb_rx_memory_needed++;
}
}
table[index(i, TX, EVEN)].desc = 0;
c44: 2300 movs r3, #0
default:
break;
}
}
usb_rx_memory_needed = 0;
for (i=1; i <= NUM_ENDPOINTS; i++) {
c46: 2e05 cmp r6, #5
} else {
table[index(i, RX, ODD)].desc = 0;
usb_rx_memory_needed++;
}
}
table[index(i, TX, EVEN)].desc = 0;
c48: f844 3032 str.w r3, [r4, r2, lsl #3]
table[index(i, TX, ODD)].desc = 0;
c4c: f844 3039 str.w r3, [r4, r9, lsl #3]
default:
break;
}
}
usb_rx_memory_needed = 0;
for (i=1; i <= NUM_ENDPOINTS; i++) {
c50: d1c0 bne.n bd4 <usb_isr+0x1c8>
c52: e086 b.n d62 <usb_isr+0x356>
}
#endif
}
break;
case 0x0880: // GET_CONFIGURATION
reply_buffer[0] = usb_configuration;
c54: 4b1b ldr r3, [pc, #108] ; (cc4 <usb_isr+0x2b8>)
c56: 4c2b ldr r4, [pc, #172] ; (d04 <usb_isr+0x2f8>)
c58: 781b ldrb r3, [r3, #0]
c5a: 7023 strb r3, [r4, #0]
datalen = 1;
c5c: 460b mov r3, r1
c5e: e083 b.n d68 <usb_isr+0x35c>
data = reply_buffer;
break;
case 0x0080: // GET_STATUS (device)
reply_buffer[0] = 0;
c60: 4c28 ldr r4, [pc, #160] ; (d04 <usb_isr+0x2f8>)
c62: 7023 strb r3, [r4, #0]
reply_buffer[1] = 0;
c64: 7063 strb r3, [r4, #1]
c66: e07e b.n d66 <usb_isr+0x35a>
datalen = 2;
data = reply_buffer;
break;
case 0x0082: // GET_STATUS (endpoint)
if (setup.wIndex > NUM_ENDPOINTS) {
c68: 88aa ldrh r2, [r5, #4]
c6a: 2a04 cmp r2, #4
c6c: d874 bhi.n d58 <usb_isr+0x34c>
// TODO: do we need to handle IN vs OUT here?
endpoint0_stall();
return;
}
reply_buffer[0] = 0;
c6e: 4c25 ldr r4, [pc, #148] ; (d04 <usb_isr+0x2f8>)
reply_buffer[1] = 0;
if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1;
c70: 0092 lsls r2, r2, #2
if (setup.wIndex > NUM_ENDPOINTS) {
// TODO: do we need to handle IN vs OUT here?
endpoint0_stall();
return;
}
reply_buffer[0] = 0;
c72: 7023 strb r3, [r4, #0]
reply_buffer[1] = 0;
c74: 7063 strb r3, [r4, #1]
if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1;
c76: 4b24 ldr r3, [pc, #144] ; (d08 <usb_isr+0x2fc>)
c78: 5c9b ldrb r3, [r3, r2]
c7a: 079e lsls r6, r3, #30
c7c: d573 bpl.n d66 <usb_isr+0x35a>
c7e: 7021 strb r1, [r4, #0]
c80: e071 b.n d66 <usb_isr+0x35a>
data = reply_buffer;
datalen = 2;
break;
case 0x0102: // CLEAR_FEATURE (endpoint)
i = setup.wIndex & 0x7F;
c82: 88aa ldrh r2, [r5, #4]
c84: f002 027f and.w r2, r2, #127 ; 0x7f
if (i > NUM_ENDPOINTS || setup.wValue != 0) {
c88: 2a04 cmp r2, #4
c8a: dc65 bgt.n d58 <usb_isr+0x34c>
c8c: 886b ldrh r3, [r5, #2]
c8e: 2b00 cmp r3, #0
c90: d162 bne.n d58 <usb_isr+0x34c>
// TODO: do we need to handle IN vs OUT here?
endpoint0_stall();
return;
}
(*(uint8_t *)(&USB0_ENDPT0 + i * 4)) &= ~0x02;
c92: 0091 lsls r1, r2, #2
c94: 4a1c ldr r2, [pc, #112] ; (d08 <usb_isr+0x2fc>)
c96: 440a add r2, r1
c98: 7811 ldrb r1, [r2, #0]
c9a: f021 0102 bic.w r1, r1, #2
c9e: e059 b.n d54 <usb_isr+0x348>
// TODO: do we need to clear the data toggle here?
break;
case 0x0302: // SET_FEATURE (endpoint)
i = setup.wIndex & 0x7F;
ca0: 88aa ldrh r2, [r5, #4]
ca2: f002 027f and.w r2, r2, #127 ; 0x7f
if (i > NUM_ENDPOINTS || setup.wValue != 0) {
ca6: 2a04 cmp r2, #4
ca8: dc56 bgt.n d58 <usb_isr+0x34c>
caa: 886b ldrh r3, [r5, #2]
cac: 2b00 cmp r3, #0
cae: d153 bne.n d58 <usb_isr+0x34c>
// TODO: do we need to handle IN vs OUT here?
endpoint0_stall();
return;
}
(*(uint8_t *)(&USB0_ENDPT0 + i * 4)) |= 0x02;
cb0: 0091 lsls r1, r2, #2
cb2: 4a15 ldr r2, [pc, #84] ; (d08 <usb_isr+0x2fc>)
cb4: 440a add r2, r1
cb6: 7811 ldrb r1, [r2, #0]
cb8: f041 0102 orr.w r1, r1, #2
cbc: e04a b.n d54 <usb_isr+0x348>
cbe: bf00 nop
cc0: 40072080 .word 0x40072080
cc4: 1fffe747 .word 0x1fffe747
cc8: 1fffe6d1 .word 0x1fffe6d1
ccc: 1fffe749 .word 0x1fffe749
cd0: 40072090 .word 0x40072090
cd4: 1fffe000 .word 0x1fffe000
cd8: 1fffe734 .word 0x1fffe734
cdc: 1fffe748 .word 0x1fffe748
ce0: 004000c8 .word 0x004000c8
ce4: 1fffe66c .word 0x1fffe66c
ce8: 1fffe724 .word 0x1fffe724
cec: 1fffe924 .word 0x1fffe924
cf0: 1fffe67c .word 0x1fffe67c
cf4: 1fffe73e .word 0x1fffe73e
cf8: 00002bd0 .word 0x00002bd0
cfc: 1001c830 .word 0x1001c830
d00: 00400088 .word 0x00400088
d04: 1fffe73f .word 0x1fffe73f
d08: 400720c0 .word 0x400720c0
d0c: 1fffe668 .word 0x1fffe668
d10: 1fffe6c0 .word 0x1fffe6c0
d14: 1fffe714 .word 0x1fffe714
//serial_print("\n");
for (list = usb_descriptor_list; 1; list++) {
if (list->addr == NULL) break;
//if (setup.wValue == list->wValue &&
//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) {
if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) {
d18: 886a ldrh r2, [r5, #2]
d1a: 88a9 ldrh r1, [r5, #4]
d1c: 4b9f ldr r3, [pc, #636] ; (f9c <usb_isr+0x590>)
case 0x0681:
//serial_print("desc:");
//serial_phex16(setup.wValue);
//serial_print("\n");
for (list = usb_descriptor_list; 1; list++) {
if (list->addr == NULL) break;
d1e: f853 4c08 ldr.w r4, [r3, #-8]
d22: f1a3 000c sub.w r0, r3, #12
d26: b1bc cbz r4, d58 <usb_isr+0x34c>
//if (setup.wValue == list->wValue &&
//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) {
if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) {
d28: f833 6c0c ldrh.w r6, [r3, #-12]
d2c: 4296 cmp r6, r2
d2e: d109 bne.n d44 <usb_isr+0x338>
d30: f833 6c0a ldrh.w r6, [r3, #-10]
d34: 428e cmp r6, r1
d36: d105 bne.n d44 <usb_isr+0x338>
data = list->addr;
if ((setup.wValue >> 8) == 3) {
d38: 0a12 lsrs r2, r2, #8
d3a: 2a03 cmp r2, #3
// for string descriptors, use the descriptor's
// length field, allowing runtime configured
// length.
datalen = *(list->addr);
d3c: bf0c ite eq
d3e: 7823 ldrbeq r3, [r4, #0]
} else {
datalen = list->length;
d40: 8903 ldrhne r3, [r0, #8]
d42: e011 b.n d68 <usb_isr+0x35c>
d44: 330c adds r3, #12
d46: e7ea b.n d1e <usb_isr+0x312>
//serial_print("desc: not found\n");
endpoint0_stall();
return;
#if defined(CDC_STATUS_INTERFACE)
case 0x2221: // CDC_SET_CONTROL_LINE_STATE
usb_cdc_line_rtsdtr_millis = systick_millis_count;
d48: 4a95 ldr r2, [pc, #596] ; (fa0 <usb_isr+0x594>)
d4a: 6811 ldr r1, [r2, #0]
d4c: 4a95 ldr r2, [pc, #596] ; (fa4 <usb_isr+0x598>)
d4e: 6011 str r1, [r2, #0]
usb_cdc_line_rtsdtr = setup.wValue;
d50: 78a9 ldrb r1, [r5, #2]
d52: 4a95 ldr r2, [pc, #596] ; (fa8 <usb_isr+0x59c>)
d54: 7011 strb r1, [r2, #0]
d56: e004 b.n d62 <usb_isr+0x356>
volatile uint8_t usb_reboot_timer = 0;
static void endpoint0_stall(void)
{
USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
d58: 4b94 ldr r3, [pc, #592] ; (fac <usb_isr+0x5a0>)
d5a: 220f movs r2, #15
d5c: 701a strb r2, [r3, #0]
d5e: e027 b.n db0 <usb_isr+0x3a4>
static uint8_t reply_buffer[8];
static void usb_setup(void)
{
const uint8_t *data = NULL;
uint32_t datalen = 0;
d60: 2300 movs r3, #0
static uint8_t reply_buffer[8];
static void usb_setup(void)
{
const uint8_t *data = NULL;
d62: 461c mov r4, r3
d64: e000 b.n d68 <usb_isr+0x35c>
}
reply_buffer[0] = 0;
reply_buffer[1] = 0;
if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1;
data = reply_buffer;
datalen = 2;
d66: 2302 movs r3, #2
//serial_phex32(data);
//serial_print(",");
//serial_phex16(datalen);
//serial_print("\n");
if (datalen > setup.wLength) datalen = setup.wLength;
d68: 88ee ldrh r6, [r5, #6]
d6a: 42b3 cmp r3, r6
d6c: bf38 it cc
d6e: 461e movcc r6, r3
d70: 2e40 cmp r6, #64 ; 0x40
d72: bf34 ite cc
d74: 4635 movcc r5, r6
d76: 2540 movcs r5, #64 ; 0x40
size = datalen;
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
d78: 4620 mov r0, r4
d7a: 4629 mov r1, r5
d7c: f7ff fd7c bl 878 <endpoint0_transmit>
data += size;
datalen -= size;
if (datalen == 0 && size < EP0_SIZE) return;
d80: 1b76 subs r6, r6, r5
if (datalen > setup.wLength) datalen = setup.wLength;
size = datalen;
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
data += size;
d82: 442c add r4, r5
datalen -= size;
if (datalen == 0 && size < EP0_SIZE) return;
d84: d103 bne.n d8e <usb_isr+0x382>
d86: 2d40 cmp r5, #64 ; 0x40
d88: d112 bne.n db0 <usb_isr+0x3a4>
d8a: 4635 mov r5, r6
d8c: e003 b.n d96 <usb_isr+0x38a>
d8e: 2e40 cmp r6, #64 ; 0x40
d90: bf34 ite cc
d92: 4635 movcc r5, r6
d94: 2540 movcs r5, #64 ; 0x40
size = datalen;
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
d96: 4620 mov r0, r4
d98: 4629 mov r1, r5
d9a: f7ff fd6d bl 878 <endpoint0_transmit>
data += size;
datalen -= size;
if (datalen == 0 && size < EP0_SIZE) return;
d9e: 1b76 subs r6, r6, r5
if (datalen == 0 && size < EP0_SIZE) return;
size = datalen;
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
data += size;
da0: 442c add r4, r5
datalen -= size;
if (datalen == 0 && size < EP0_SIZE) return;
da2: d101 bne.n da8 <usb_isr+0x39c>
da4: 2d40 cmp r5, #64 ; 0x40
da6: d103 bne.n db0 <usb_isr+0x3a4>
ep0_tx_ptr = data;
ep0_tx_len = datalen;
da8: 4a81 ldr r2, [pc, #516] ; (fb0 <usb_isr+0x5a4>)
endpoint0_transmit(data, size);
data += size;
datalen -= size;
if (datalen == 0 && size < EP0_SIZE) return;
ep0_tx_ptr = data;
daa: f8c8 4000 str.w r4, [r8]
ep0_tx_len = datalen;
dae: 8016 strh r6, [r2, #0]
serial_print("\n");
#endif
// actually "do" the setup request
usb_setup();
// unfreeze the USB, now that we're ready
USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit
db0: 2201 movs r2, #1
db2: 4b80 ldr r3, [pc, #512] ; (fb4 <usb_isr+0x5a8>)
db4: e03d b.n e32 <usb_isr+0x426>
break;
case 0x01: // OUT transaction received from host
case 0x02:
//serial_print("PID=OUT\n");
#ifdef CDC_STATUS_INTERFACE
if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) {
db6: 4b80 ldr r3, [pc, #512] ; (fb8 <usb_isr+0x5ac>)
db8: 881a ldrh r2, [r3, #0]
dba: f242 0321 movw r3, #8225 ; 0x2021
dbe: 429a cmp r2, r3
dc0: d110 bne.n de4 <usb_isr+0x3d8>
dc2: 2300 movs r3, #0
int i;
uint8_t *dst = (uint8_t *)usb_cdc_line_coding;
//serial_print("set line coding ");
for (i=0; i<7; i++) {
//serial_phex(*buf);
*dst++ = *buf++;
dc4: 4a7d ldr r2, [pc, #500] ; (fbc <usb_isr+0x5b0>)
dc6: 5cc8 ldrb r0, [r1, r3]
dc8: 5498 strb r0, [r3, r2]
#ifdef CDC_STATUS_INTERFACE
if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) {
int i;
uint8_t *dst = (uint8_t *)usb_cdc_line_coding;
//serial_print("set line coding ");
for (i=0; i<7; i++) {
dca: 3301 adds r3, #1
dcc: 2b07 cmp r3, #7
dce: d1f9 bne.n dc4 <usb_isr+0x3b8>
//serial_phex(*buf);
*dst++ = *buf++;
}
//serial_phex32(usb_cdc_line_coding[0]);
//serial_print("\n");
if (usb_cdc_line_coding[0] == 134) usb_reboot_timer = 15;
dd0: 6813 ldr r3, [r2, #0]
dd2: 2b86 cmp r3, #134 ; 0x86
dd4: d102 bne.n ddc <usb_isr+0x3d0>
dd6: 4b7a ldr r3, [pc, #488] ; (fc0 <usb_isr+0x5b4>)
dd8: 220f movs r2, #15
dda: 701a strb r2, [r3, #0]
endpoint0_transmit(NULL, 0);
ddc: 2000 movs r0, #0
dde: 4601 mov r1, r0
de0: f7ff fd4a bl 878 <endpoint0_transmit>
if (usb_audio_set_feature(&setup, buf)) {
endpoint0_transmit(NULL, 0);
}
#endif
// give the buffer back
b->desc = BDT_DESC(EP0_SIZE, DATA1);
de4: 4b77 ldr r3, [pc, #476] ; (fc4 <usb_isr+0x5b8>)
de6: f844 3038 str.w r3, [r4, r8, lsl #3]
dea: e023 b.n e34 <usb_isr+0x428>
//serial_print("PID=IN:");
//serial_phex(stat);
//serial_print("\n");
// send remaining data, if any...
data = ep0_tx_ptr;
dec: 4e76 ldr r6, [pc, #472] ; (fc8 <usb_isr+0x5bc>)
dee: 6835 ldr r5, [r6, #0]
if (data) {
df0: b1b5 cbz r5, e20 <usb_isr+0x414>
size = ep0_tx_len;
df2: f8df 81bc ldr.w r8, [pc, #444] ; fb0 <usb_isr+0x5a4>
df6: f8b8 9000 ldrh.w r9, [r8]
dfa: f1b9 0f40 cmp.w r9, #64 ; 0x40
dfe: bf34 ite cc
e00: 464c movcc r4, r9
e02: 2440 movcs r4, #64 ; 0x40
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
e04: 4628 mov r0, r5
e06: 4621 mov r1, r4
e08: f7ff fd36 bl 878 <endpoint0_transmit>
data += size;
ep0_tx_len -= size;
e0c: ebc4 0309 rsb r3, r4, r9
e10: b29b uxth r3, r3
e12: f8a8 3000 strh.w r3, [r8]
ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL;
e16: b90b cbnz r3, e1c <usb_isr+0x410>
e18: 2c40 cmp r4, #64 ; 0x40
e1a: d100 bne.n e1e <usb_isr+0x412>
data = ep0_tx_ptr;
if (data) {
size = ep0_tx_len;
if (size > EP0_SIZE) size = EP0_SIZE;
endpoint0_transmit(data, size);
data += size;
e1c: 192b adds r3, r5, r4
ep0_tx_len -= size;
ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL;
e1e: 6033 str r3, [r6, #0]
}
if (setup.bRequest == 5 && setup.bmRequestType == 0) {
e20: 4b65 ldr r3, [pc, #404] ; (fb8 <usb_isr+0x5ac>)
e22: 881a ldrh r2, [r3, #0]
e24: f5b2 6fa0 cmp.w r2, #1280 ; 0x500
e28: d104 bne.n e34 <usb_isr+0x428>
setup.bRequest = 0;
e2a: 2200 movs r2, #0
e2c: 705a strb r2, [r3, #1]
//serial_print("set address: ");
//serial_phex16(setup.wValue);
//serial_print("\n");
USB0_ADDR = setup.wValue;
e2e: 789a ldrb r2, [r3, #2]
e30: 4b66 ldr r3, [pc, #408] ; (fcc <usb_isr+0x5c0>)
e32: 701a strb r2, [r3, #0]
//default:
//serial_print("PID=unknown:");
//serial_phex(pid);
//serial_print("\n");
}
USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit
e34: 2201 movs r2, #1
e36: 4b5f ldr r3, [pc, #380] ; (fb4 <usb_isr+0x5a8>)
e38: e06c b.n f14 <usb_isr+0x508>
//serial_print(stat & 0x04 ? ",odd\n" : ",even\n");
endpoint = stat >> 4;
if (endpoint == 0) {
usb_control(stat);
} else {
bdt_t *b = stat2bufferdescriptor(stat);
e3a: eb04 06c8 add.w r6, r4, r8, lsl #3
serial_print(((uint32_t)b & 8) ? ", odd" : ", even");
serial_print(", count:");
serial_phex(b->desc >> 16);
serial_print("\n");
#endif
endpoint--; // endpoint is index to zero-based arrays
e3e: 3d01 subs r5, #1
endpoint = stat >> 4;
if (endpoint == 0) {
usb_control(stat);
} else {
bdt_t *b = stat2bufferdescriptor(stat);
usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8);
e40: 6873 ldr r3, [r6, #4]
b->addr = &usb_audio_sync_feedback;
b->desc = (3 << 16) | BDT_OWN;
tx_state[endpoint] ^= 1;
} else
#endif
if (stat & 0x08) { // transmit
e42: f002 0208 and.w r2, r2, #8
endpoint = stat >> 4;
if (endpoint == 0) {
usb_control(stat);
} else {
bdt_t *b = stat2bufferdescriptor(stat);
usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8);
e46: f1a3 0008 sub.w r0, r3, #8
serial_print(((uint32_t)b & 8) ? ", odd" : ", even");
serial_print(", count:");
serial_phex(b->desc >> 16);
serial_print("\n");
#endif
endpoint--; // endpoint is index to zero-based arrays
e4a: b2ed uxtb r5, r5
b->addr = &usb_audio_sync_feedback;
b->desc = (3 << 16) | BDT_OWN;
tx_state[endpoint] ^= 1;
} else
#endif
if (stat & 0x08) { // transmit
e4c: f002 01ff and.w r1, r2, #255 ; 0xff
e50: 2a00 cmp r2, #0
e52: d036 beq.n ec2 <usb_isr+0x4b6>
usb_free(packet);
e54: f000 f934 bl 10c0 <usb_free>
packet = tx_first[endpoint];
e58: 485d ldr r0, [pc, #372] ; (fd0 <usb_isr+0x5c4>)
e5a: 4b5e ldr r3, [pc, #376] ; (fd4 <usb_isr+0x5c8>)
e5c: f850 2025 ldr.w r2, [r0, r5, lsl #2]
if (packet) {
e60: b1ea cbz r2, e9e <usb_isr+0x492>
//serial_print("tx packet\n");
tx_first[endpoint] = packet->next;
e62: 6851 ldr r1, [r2, #4]
e64: f840 1025 str.w r1, [r0, r5, lsl #2]
b->addr = packet->buf;
e68: f102 0108 add.w r1, r2, #8
e6c: 6071 str r1, [r6, #4]
switch (tx_state[endpoint]) {
e6e: 5d59 ldrb r1, [r3, r5]
e70: 2903 cmp r1, #3
e72: d80b bhi.n e8c <usb_isr+0x480>
e74: e8df f001 tbb [pc, r1]
e78: 08060402 .word 0x08060402
case TX_STATE_BOTH_FREE_EVEN_FIRST:
tx_state[endpoint] = TX_STATE_ODD_FREE;
e7c: 2103 movs r1, #3
e7e: e004 b.n e8a <usb_isr+0x47e>
break;
case TX_STATE_BOTH_FREE_ODD_FIRST:
tx_state[endpoint] = TX_STATE_EVEN_FREE;
e80: 2102 movs r1, #2
e82: e002 b.n e8a <usb_isr+0x47e>
break;
case TX_STATE_EVEN_FREE:
tx_state[endpoint] = TX_STATE_NONE_FREE_ODD_FIRST;
e84: 2105 movs r1, #5
e86: e000 b.n e8a <usb_isr+0x47e>
break;
case TX_STATE_ODD_FREE:
tx_state[endpoint] = TX_STATE_NONE_FREE_EVEN_FIRST;
e88: 2104 movs r1, #4
e8a: 5559 strb r1, [r3, r5]
break;
default:
break;
}
b->desc = BDT_DESC(packet->len,
e8c: f016 0f08 tst.w r6, #8
e90: 8812 ldrh r2, [r2, #0]
e92: bf0c ite eq
e94: 2388 moveq r3, #136 ; 0x88
e96: 23c8 movne r3, #200 ; 0xc8
e98: ea43 4302 orr.w r3, r3, r2, lsl #16
e9c: e042 b.n f24 <usb_isr+0x518>
((uint32_t)b & 8) ? DATA1 : DATA0);
} else {
//serial_print("tx no packet\n");
switch (tx_state[endpoint]) {
e9e: 5d5a ldrb r2, [r3, r5]
ea0: 2a03 cmp r2, #3
ea2: d807 bhi.n eb4 <usb_isr+0x4a8>
ea4: e8df f002 tbb [pc, r2]
ea8: 04024040 .word 0x04024040
case TX_STATE_BOTH_FREE_EVEN_FIRST:
case TX_STATE_BOTH_FREE_ODD_FIRST:
break;
case TX_STATE_EVEN_FREE:
tx_state[endpoint] = TX_STATE_BOTH_FREE_EVEN_FIRST;
eac: 2200 movs r2, #0
eae: e006 b.n ebe <usb_isr+0x4b2>
break;
case TX_STATE_ODD_FREE:
tx_state[endpoint] = TX_STATE_BOTH_FREE_ODD_FIRST;
eb0: 2201 movs r2, #1
eb2: e004 b.n ebe <usb_isr+0x4b2>
break;
default:
tx_state[endpoint] = ((uint32_t)b & 8) ?
eb4: f016 0f08 tst.w r6, #8
eb8: bf0c ite eq
eba: 2202 moveq r2, #2
ebc: 2203 movne r2, #3
ebe: 555a strb r2, [r3, r5]
TX_STATE_ODD_FREE : TX_STATE_EVEN_FREE;
break;
ec0: e032 b.n f28 <usb_isr+0x51c>
}
}
} else { // receive
packet->len = b->desc >> 16;
ec2: f854 2038 ldr.w r2, [r4, r8, lsl #3]
ec6: 0c12 lsrs r2, r2, #16
ec8: f823 2c08 strh.w r2, [r3, #-8]
if (packet->len > 0) {
ecc: b322 cbz r2, f18 <usb_isr+0x50c>
packet->index = 0;
packet->next = NULL;
if (rx_first[endpoint] == NULL) {
ece: f8df e134 ldr.w lr, [pc, #308] ; 1004 <usb_isr+0x5f8>
}
}
} else { // receive
packet->len = b->desc >> 16;
if (packet->len > 0) {
packet->index = 0;
ed2: f823 1c06 strh.w r1, [r3, #-6]
packet->next = NULL;
ed6: f843 1c04 str.w r1, [r3, #-4]
if (rx_first[endpoint] == NULL) {
eda: f85e 3025 ldr.w r3, [lr, r5, lsl #2]
ede: 493e ldr r1, [pc, #248] ; (fd8 <usb_isr+0x5cc>)
ee0: b913 cbnz r3, ee8 <usb_isr+0x4dc>
//serial_print("rx 1st, epidx=");
//serial_phex(endpoint);
//serial_print(", packet=");
//serial_phex32((uint32_t)packet);
//serial_print("\n");
rx_first[endpoint] = packet;
ee2: f84e 0025 str.w r0, [lr, r5, lsl #2]
ee6: e002 b.n eee <usb_isr+0x4e2>
//serial_print("rx Nth, epidx=");
//serial_phex(endpoint);
//serial_print(", packet=");
//serial_phex32((uint32_t)packet);
//serial_print("\n");
rx_last[endpoint]->next = packet;
ee8: f851 3025 ldr.w r3, [r1, r5, lsl #2]
eec: 6058 str r0, [r3, #4]
}
rx_last[endpoint] = packet;
usb_rx_byte_count_data[endpoint] += packet->len;
eee: 4b3b ldr r3, [pc, #236] ; (fdc <usb_isr+0x5d0>)
//serial_print(", packet=");
//serial_phex32((uint32_t)packet);
//serial_print("\n");
rx_last[endpoint]->next = packet;
}
rx_last[endpoint] = packet;
ef0: f841 0025 str.w r0, [r1, r5, lsl #2]
usb_rx_byte_count_data[endpoint] += packet->len;
ef4: f833 1015 ldrh.w r1, [r3, r5, lsl #1]
ef8: 440a add r2, r1
efa: f823 2015 strh.w r2, [r3, r5, lsl #1]
// TODO: implement a per-endpoint maximum # of allocated
// packets, so a flood of incoming data on 1 endpoint
// doesn't starve the others if the user isn't reading
// it regularly
packet = usb_malloc();
efe: f000 f8c1 bl 1084 <usb_malloc>
if (packet) {
f02: b110 cbz r0, f0a <usb_isr+0x4fe>
b->addr = packet->buf;
f04: 3008 adds r0, #8
f06: 6070 str r0, [r6, #4]
f08: e006 b.n f18 <usb_isr+0x50c>
((uint32_t)b & 8) ? DATA1 : DATA0);
} else {
//serial_print("starving ");
//serial_phex(endpoint + 1);
b->desc = 0;
usb_rx_memory_needed++;
f0a: 4b35 ldr r3, [pc, #212] ; (fe0 <usb_isr+0x5d4>)
b->desc = BDT_DESC(64,
((uint32_t)b & 8) ? DATA1 : DATA0);
} else {
//serial_print("starving ");
//serial_phex(endpoint + 1);
b->desc = 0;
f0c: f844 0038 str.w r0, [r4, r8, lsl #3]
usb_rx_memory_needed++;
f10: 781a ldrb r2, [r3, #0]
f12: 3201 adds r2, #1
f14: 701a strb r2, [r3, #0]
f16: e007 b.n f28 <usb_isr+0x51c>
}
} else {
b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0);
f18: 4b2a ldr r3, [pc, #168] ; (fc4 <usb_isr+0x5b8>)
f1a: 4a32 ldr r2, [pc, #200] ; (fe4 <usb_isr+0x5d8>)
f1c: f016 0f08 tst.w r6, #8
f20: bf08 it eq
f22: 4613 moveq r3, r2
f24: f844 3038 str.w r3, [r4, r8, lsl #3]
}
}
}
USB0_ISTAT = USB_ISTAT_TOKDNE;
f28: 2308 movs r3, #8
f2a: 703b strb r3, [r7, #0]
goto restart;
f2c: e570 b.n a10 <usb_isr+0x4>
}
if (status & USB_ISTAT_USBRST /* 01 */ ) {
f2e: 07e0 lsls r0, r4, #31
f30: d51f bpl.n f72 <usb_isr+0x566>
//serial_print("reset\n");
// initialize BDT toggle bits
USB0_CTL = USB_CTL_ODDRST;
f32: 4920 ldr r1, [pc, #128] ; (fb4 <usb_isr+0x5a8>)
ep0_tx_bdt_bank = 0;
// set up buffers to receive Setup and OUT packets
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0);
f34: 482b ldr r0, [pc, #172] ; (fe4 <usb_isr+0x5d8>)
table[index(0, RX, EVEN)].addr = ep0_rx0_buf;
f36: 4c2c ldr r4, [pc, #176] ; (fe8 <usb_isr+0x5dc>)
if (status & USB_ISTAT_USBRST /* 01 */ ) {
//serial_print("reset\n");
// initialize BDT toggle bits
USB0_CTL = USB_CTL_ODDRST;
f38: 2302 movs r3, #2
f3a: 700b strb r3, [r1, #0]
ep0_tx_bdt_bank = 0;
f3c: 4b2b ldr r3, [pc, #172] ; (fec <usb_isr+0x5e0>)
f3e: 701a strb r2, [r3, #0]
// set up buffers to receive Setup and OUT packets
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0);
f40: 4b2b ldr r3, [pc, #172] ; (ff0 <usb_isr+0x5e4>)
f42: 6018 str r0, [r3, #0]
table[index(0, RX, EVEN)].addr = ep0_rx0_buf;
table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0);
f44: 6098 str r0, [r3, #8]
table[index(0, RX, ODD)].addr = ep0_rx1_buf;
f46: 482b ldr r0, [pc, #172] ; (ff4 <usb_isr+0x5e8>)
f48: 60d8 str r0, [r3, #12]
table[index(0, TX, EVEN)].desc = 0;
f4a: 611a str r2, [r3, #16]
table[index(0, TX, ODD)].desc = 0;
f4c: 619a str r2, [r3, #24]
USB0_CTL = USB_CTL_ODDRST;
ep0_tx_bdt_bank = 0;
// set up buffers to receive Setup and OUT packets
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0);
table[index(0, RX, EVEN)].addr = ep0_rx0_buf;
f4e: 605c str r4, [r3, #4]
table[index(0, RX, ODD)].addr = ep0_rx1_buf;
table[index(0, TX, EVEN)].desc = 0;
table[index(0, TX, ODD)].desc = 0;
// activate endpoint 0
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
f50: 4b16 ldr r3, [pc, #88] ; (fac <usb_isr+0x5a0>)
f52: 200d movs r0, #13
f54: 7018 strb r0, [r3, #0]
// clear all ending interrupts
USB0_ERRSTAT = 0xFF;
f56: 4828 ldr r0, [pc, #160] ; (ff8 <usb_isr+0x5ec>)
f58: 23ff movs r3, #255 ; 0xff
f5a: 7003 strb r3, [r0, #0]
USB0_ISTAT = 0xFF;
f5c: 702b strb r3, [r5, #0]
// set the address to zero during enumeration
USB0_ADDR = 0;
f5e: 7402 strb r2, [r0, #16]
// enable other interrupts
USB0_ERREN = 0xFF;
f60: 4a26 ldr r2, [pc, #152] ; (ffc <usb_isr+0x5f0>)
f62: 7013 strb r3, [r2, #0]
USB0_INTEN = USB_INTEN_TOKDNEEN |
f64: 4b26 ldr r3, [pc, #152] ; (1000 <usb_isr+0x5f4>)
f66: 229f movs r2, #159 ; 0x9f
f68: 701a strb r2, [r3, #0]
USB_INTEN_ERROREN |
USB_INTEN_USBRSTEN |
USB_INTEN_SLEEPEN;
// is this necessary?
USB0_CTL = USB_CTL_USBENSOFEN;
f6a: 2301 movs r3, #1
f6c: 700b strb r3, [r1, #0]
return;
f6e: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
}
if ((status & USB_ISTAT_STALL /* 80 */ )) {
f72: 0621 lsls r1, r4, #24
f74: d504 bpl.n f80 <usb_isr+0x574>
//serial_print("stall:\n");
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK;
f76: 4b0d ldr r3, [pc, #52] ; (fac <usb_isr+0x5a0>)
f78: 220d movs r2, #13
f7a: 701a strb r2, [r3, #0]
USB0_ISTAT = USB_ISTAT_STALL;
f7c: 2380 movs r3, #128 ; 0x80
f7e: 702b strb r3, [r5, #0]
}
if ((status & USB_ISTAT_ERROR /* 02 */ )) {
f80: 07a2 lsls r2, r4, #30
f82: d505 bpl.n f90 <usb_isr+0x584>
uint8_t err = USB0_ERRSTAT;
f84: 4b1c ldr r3, [pc, #112] ; (ff8 <usb_isr+0x5ec>)
f86: 781a ldrb r2, [r3, #0]
f88: b2d2 uxtb r2, r2
USB0_ERRSTAT = err;
f8a: 701a strb r2, [r3, #0]
//serial_print("err:");
//serial_phex(err);
//serial_print("\n");
USB0_ISTAT = USB_ISTAT_ERROR;
f8c: 2302 movs r3, #2
f8e: 702b strb r3, [r5, #0]
}
if ((status & USB_ISTAT_SLEEP /* 10 */ )) {
f90: 06e3 lsls r3, r4, #27
//serial_print("sleep\n");
USB0_ISTAT = USB_ISTAT_SLEEP;
f92: bf44 itt mi
f94: 2310 movmi r3, #16
f96: 702b strbmi r3, [r5, #0]
f98: e8bd 8ff8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, sl, fp, pc}
f9c: 00002be0 .word 0x00002be0
fa0: 1fffe664 .word 0x1fffe664
fa4: 1fffe934 .word 0x1fffe934
fa8: 1fffe758 .word 0x1fffe758
fac: 400720c0 .word 0x400720c0
fb0: 1fffe73c .word 0x1fffe73c
fb4: 40072094 .word 0x40072094
fb8: 1fffe734 .word 0x1fffe734
fbc: 1fffe92c .word 0x1fffe92c
fc0: 1fffe6d1 .word 0x1fffe6d1
fc4: 004000c8 .word 0x004000c8
fc8: 1fffe668 .word 0x1fffe668
fcc: 40072098 .word 0x40072098
fd0: 1fffe714 .word 0x1fffe714
fd4: 1fffe67c .word 0x1fffe67c
fd8: 1fffe66c .word 0x1fffe66c
fdc: 1fffe924 .word 0x1fffe924
fe0: 1fffe73e .word 0x1fffe73e
fe4: 00400088 .word 0x00400088
fe8: 1fffe680 .word 0x1fffe680
fec: 1fffe6d0 .word 0x1fffe6d0
ff0: 1fffe000 .word 0x1fffe000
ff4: 1fffe6d4 .word 0x1fffe6d4
ff8: 40072088 .word 0x40072088
ffc: 4007208c .word 0x4007208c
1000: 40072084 .word 0x40072084
1004: 1fffe6c0 .word 0x1fffe6c0
00001008 <usb_init>:
}
void usb_init(void)
{
1008: b508 push {r3, lr}
int i;
//serial_begin(BAUD2DIV(115200));
//serial_print("usb_init\n");
usb_init_serialnumber();
100a: f001 fb33 bl 2674 <usb_init_serialnumber>
100e: 2200 movs r2, #0
for (i=0; i <= NUM_ENDPOINTS*4; i++) {
table[i].desc = 0;
1010: 4b18 ldr r3, [pc, #96] ; (1074 <usb_init+0x6c>)
1012: 2100 movs r1, #0
1014: 50d1 str r1, [r2, r3]
1016: 1898 adds r0, r3, r2
1018: 3208 adds r2, #8
//serial_begin(BAUD2DIV(115200));
//serial_print("usb_init\n");
usb_init_serialnumber();
for (i=0; i <= NUM_ENDPOINTS*4; i++) {
101a: 2a88 cmp r2, #136 ; 0x88
table[i].desc = 0;
table[i].addr = 0;
101c: 6041 str r1, [r0, #4]
//serial_begin(BAUD2DIV(115200));
//serial_print("usb_init\n");
usb_init_serialnumber();
for (i=0; i <= NUM_ENDPOINTS*4; i++) {
101e: d1f7 bne.n 1010 <usb_init+0x8>
// this basically follows the flowchart in the Kinetis
// Quick Reference User Guide, Rev. 1, 03/2012, page 141
// assume 48 MHz clock already running
// SIM - enable clock
SIM_SCGC4 |= SIM_SCGC4_USBOTG;
1020: 4a15 ldr r2, [pc, #84] ; (1078 <usb_init+0x70>)
1022: 6810 ldr r0, [r2, #0]
1024: f440 2080 orr.w r0, r0, #262144 ; 0x40000
1028: 6010 str r0, [r2, #0]
// reset USB module
//USB0_USBTRC0 = USB_USBTRC_USBRESET;
//while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end
// set desc table base addr
USB0_BDTPAGE1 = ((uint32_t)table) >> 8;
102a: f502 3228 add.w r2, r2, #172032 ; 0x2a000
102e: 3268 adds r2, #104 ; 0x68
1030: f3c3 2007 ubfx r0, r3, #8, #8
1034: 7010 strb r0, [r2, #0]
USB0_BDTPAGE2 = ((uint32_t)table) >> 16;
1036: f3c3 4007 ubfx r0, r3, #16, #8
USB0_BDTPAGE3 = ((uint32_t)table) >> 24;
103a: 0e1b lsrs r3, r3, #24
//USB0_USBTRC0 = USB_USBTRC_USBRESET;
//while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end
// set desc table base addr
USB0_BDTPAGE1 = ((uint32_t)table) >> 8;
USB0_BDTPAGE2 = ((uint32_t)table) >> 16;
103c: 7510 strb r0, [r2, #20]
USB0_BDTPAGE3 = ((uint32_t)table) >> 24;
103e: 7613 strb r3, [r2, #24]
// clear all ISR flags
USB0_ISTAT = 0xFF;
1040: 23ff movs r3, #255 ; 0xff
1042: f802 3c1c strb.w r3, [r2, #-28]
USB0_ERRSTAT = 0xFF;
1046: f802 3c14 strb.w r3, [r2, #-20]
USB0_OTGISTAT = 0xFF;
104a: f802 3c8c strb.w r3, [r2, #-140]
//USB0_USBTRC0 |= 0x40; // undocumented bit
// enable USB
USB0_CTL = USB_CTL_USBENSOFEN;
104e: 2301 movs r3, #1
1050: f802 3c08 strb.w r3, [r2, #-8]
USB0_USBCTRL = 0;
1054: f882 1064 strb.w r1, [r2, #100] ; 0x64
// enable reset interrupt
USB0_INTEN = USB_INTEN_USBRSTEN;
1058: f802 3c18 strb.w r3, [r2, #-24]
// enable interrupt in NVIC...
NVIC_SET_PRIORITY(IRQ_USBOTG, 112);
105c: 4b07 ldr r3, [pc, #28] ; (107c <usb_init+0x74>)
105e: 2270 movs r2, #112 ; 0x70
1060: 701a strb r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_USBOTG);
1062: f2a3 331f subw r3, r3, #799 ; 0x31f
1066: 2208 movs r2, #8
1068: 601a str r2, [r3, #0]
// enable d+ pullup
USB0_CONTROL = USB_CONTROL_DPPULLUPNONOTG;
106a: 4b05 ldr r3, [pc, #20] ; (1080 <usb_init+0x78>)
106c: 2210 movs r2, #16
106e: 701a strb r2, [r3, #0]
1070: bd08 pop {r3, pc}
1072: bf00 nop
1074: 1fffe000 .word 0x1fffe000
1078: 40048034 .word 0x40048034
107c: e000e423 .word 0xe000e423
1080: 40072108 .word 0x40072108
00001084 <usb_malloc>:
usb_packet_t * usb_malloc(void)
{
unsigned int n, avail;
uint8_t *p;
__disable_irq();
1084: b672 cpsid i
avail = usb_buffer_available;
1086: 4a0c ldr r2, [pc, #48] ; (10b8 <usb_malloc+0x34>)
1088: 6811 ldr r1, [r2, #0]
n = __builtin_clz(avail); // clz = count leading zeros
108a: fab1 f381 clz r3, r1
if (n >= NUM_USB_BUFFERS) {
108e: 2b0b cmp r3, #11
1090: d902 bls.n 1098 <usb_malloc+0x14>
__enable_irq();
1092: b662 cpsie i
return NULL;
1094: 2000 movs r0, #0
1096: 4770 bx lr
}
//serial_print("malloc:");
//serial_phex(n);
//serial_print("\n");
usb_buffer_available = avail & ~(0x80000000 >> n);
1098: f04f 4000 mov.w r0, #2147483648 ; 0x80000000
109c: 40d8 lsrs r0, r3
109e: ea21 0100 bic.w r1, r1, r0
10a2: 6011 str r1, [r2, #0]
__enable_irq();
10a4: b662 cpsie i
p = usb_buffer_memory + (n * sizeof(usb_packet_t));
10a6: 4905 ldr r1, [pc, #20] ; (10bc <usb_malloc+0x38>)
10a8: 2248 movs r2, #72 ; 0x48
10aa: 4353 muls r3, r2
10ac: 18c8 adds r0, r1, r3
//serial_print("malloc:");
//serial_phex32((int)p);
//serial_print("\n");
*(uint32_t *)p = 0;
10ae: 2200 movs r2, #0
10b0: 50ca str r2, [r1, r3]
*(uint32_t *)(p + 4) = 0;
10b2: 6042 str r2, [r0, #4]
return (usb_packet_t *)p;
}
10b4: 4770 bx lr
10b6: bf00 nop
10b8: 1fffe560 .word 0x1fffe560
10bc: 1fffe200 .word 0x1fffe200
000010c0 <usb_free>:
void usb_free(usb_packet_t *p)
{
unsigned int n, mask;
//serial_print("free:");
n = ((uint8_t *)p - usb_buffer_memory) / sizeof(usb_packet_t);
10c0: 4b0c ldr r3, [pc, #48] ; (10f4 <usb_free+0x34>)
10c2: 2248 movs r2, #72 ; 0x48
10c4: 1ac3 subs r3, r0, r3
10c6: fbb3 f3f2 udiv r3, r3, r2
if (n >= NUM_USB_BUFFERS) return;
10ca: 2b0b cmp r3, #11
10cc: d811 bhi.n 10f2 <usb_free+0x32>
//serial_phex(n);
//serial_print("\n");
// if any endpoints are starving for memory to receive
// packets, give this memory to them immediately!
if (usb_rx_memory_needed && usb_configuration) {
10ce: 4a0a ldr r2, [pc, #40] ; (10f8 <usb_free+0x38>)
10d0: 7812 ldrb r2, [r2, #0]
10d2: b122 cbz r2, 10de <usb_free+0x1e>
10d4: 4a09 ldr r2, [pc, #36] ; (10fc <usb_free+0x3c>)
10d6: 7812 ldrb r2, [r2, #0]
10d8: b10a cbz r2, 10de <usb_free+0x1e>
//serial_print("give to rx:");
//serial_phex32((int)p);
//serial_print("\n");
usb_rx_memory(p);
10da: f7ff bc1b b.w 914 <usb_rx_memory>
return;
}
mask = (0x80000000 >> n);
__disable_irq();
10de: b672 cpsid i
usb_buffer_available |= mask;
10e0: 4a07 ldr r2, [pc, #28] ; (1100 <usb_free+0x40>)
//serial_print("\n");
usb_rx_memory(p);
return;
}
mask = (0x80000000 >> n);
10e2: f04f 4100 mov.w r1, #2147483648 ; 0x80000000
10e6: fa21 f303 lsr.w r3, r1, r3
__disable_irq();
usb_buffer_available |= mask;
10ea: 6811 ldr r1, [r2, #0]
10ec: 4319 orrs r1, r3
10ee: 6011 str r1, [r2, #0]
__enable_irq();
10f0: b662 cpsie i
10f2: 4770 bx lr
10f4: 1fffe200 .word 0x1fffe200
10f8: 1fffe73e .word 0x1fffe73e
10fc: 1fffe747 .word 0x1fffe747
1100: 1fffe560 .word 0x1fffe560
00001104 <usb_serial_getchar>:
#define TRANSMIT_FLUSH_TIMEOUT 5 /* in milliseconds */
// get the next character, or -1 if nothing received
int usb_serial_getchar(void)
{
1104: b510 push {r4, lr}
unsigned int i;
int c;
if (!rx_packet) {
1106: 4c10 ldr r4, [pc, #64] ; (1148 <usb_serial_getchar+0x44>)
1108: 6823 ldr r3, [r4, #0]
110a: b16b cbz r3, 1128 <usb_serial_getchar+0x24>
if (!usb_configuration) return -1;
rx_packet = usb_rx(CDC_RX_ENDPOINT);
if (!rx_packet) return -1;
}
i = rx_packet->index;
110c: 6820 ldr r0, [r4, #0]
110e: 8842 ldrh r2, [r0, #2]
c = rx_packet->buf[i++];
1110: 1c53 adds r3, r2, #1
1112: 4402 add r2, r0
1114: 7a14 ldrb r4, [r2, #8]
if (i >= rx_packet->len) {
1116: 8802 ldrh r2, [r0, #0]
1118: 4293 cmp r3, r2
111a: d312 bcc.n 1142 <usb_serial_getchar+0x3e>
usb_free(rx_packet);
111c: f7ff ffd0 bl 10c0 <usb_free>
rx_packet = NULL;
1120: 4b09 ldr r3, [pc, #36] ; (1148 <usb_serial_getchar+0x44>)
1122: 2200 movs r2, #0
1124: 601a str r2, [r3, #0]
1126: e00d b.n 1144 <usb_serial_getchar+0x40>
{
unsigned int i;
int c;
if (!rx_packet) {
if (!usb_configuration) return -1;
1128: 4b08 ldr r3, [pc, #32] ; (114c <usb_serial_getchar+0x48>)
112a: 781b ldrb r3, [r3, #0]
112c: b913 cbnz r3, 1134 <usb_serial_getchar+0x30>
112e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
1132: bd10 pop {r4, pc}
rx_packet = usb_rx(CDC_RX_ENDPOINT);
1134: 2003 movs r0, #3
1136: f7ff fbbf bl 8b8 <usb_rx>
113a: 6020 str r0, [r4, #0]
if (!rx_packet) return -1;
113c: 2800 cmp r0, #0
113e: d1e5 bne.n 110c <usb_serial_getchar+0x8>
1140: e7f5 b.n 112e <usb_serial_getchar+0x2a>
c = rx_packet->buf[i++];
if (i >= rx_packet->len) {
usb_free(rx_packet);
rx_packet = NULL;
} else {
rx_packet->index = i;
1142: 8043 strh r3, [r0, #2]
}
return c;
1144: 4620 mov r0, r4
}
1146: bd10 pop {r4, pc}
1148: 1fffe754 .word 0x1fffe754
114c: 1fffe747 .word 0x1fffe747
00001150 <usb_serial_peekchar>:
// peek at the next character, or -1 if nothing received
int usb_serial_peekchar(void)
{
1150: b510 push {r4, lr}
if (!rx_packet) {
1152: 4c0b ldr r4, [pc, #44] ; (1180 <usb_serial_peekchar+0x30>)
1154: 6823 ldr r3, [r4, #0]
1156: b113 cbz r3, 115e <usb_serial_peekchar+0xe>
if (!usb_configuration) return -1;
rx_packet = usb_rx(CDC_RX_ENDPOINT);
if (!rx_packet) return -1;
}
if (!rx_packet) return -1;
1158: 6823 ldr r3, [r4, #0]
115a: b96b cbnz r3, 1178 <usb_serial_peekchar+0x28>
115c: e002 b.n 1164 <usb_serial_peekchar+0x14>
// peek at the next character, or -1 if nothing received
int usb_serial_peekchar(void)
{
if (!rx_packet) {
if (!usb_configuration) return -1;
115e: 4b09 ldr r3, [pc, #36] ; (1184 <usb_serial_peekchar+0x34>)
1160: 781b ldrb r3, [r3, #0]
1162: b913 cbnz r3, 116a <usb_serial_peekchar+0x1a>
1164: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
1168: bd10 pop {r4, pc}
rx_packet = usb_rx(CDC_RX_ENDPOINT);
116a: 2003 movs r0, #3
116c: f7ff fba4 bl 8b8 <usb_rx>
1170: 6020 str r0, [r4, #0]
if (!rx_packet) return -1;
1172: 2800 cmp r0, #0
1174: d1f0 bne.n 1158 <usb_serial_peekchar+0x8>
1176: e7f5 b.n 1164 <usb_serial_peekchar+0x14>
}
if (!rx_packet) return -1;
return rx_packet->buf[rx_packet->index];
1178: 885a ldrh r2, [r3, #2]
117a: 4413 add r3, r2
117c: 7a18 ldrb r0, [r3, #8]
}
117e: bd10 pop {r4, pc}
1180: 1fffe754 .word 0x1fffe754
1184: 1fffe747 .word 0x1fffe747
00001188 <usb_serial_available>:
static inline uint32_t usb_rx_byte_count(uint32_t endpoint) __attribute__((always_inline));
static inline uint32_t usb_rx_byte_count(uint32_t endpoint)
{
endpoint--;
if (endpoint >= NUM_ENDPOINTS) return 0;
return usb_rx_byte_count_data[endpoint];
1188: 4b04 ldr r3, [pc, #16] ; (119c <usb_serial_available+0x14>)
// number of bytes available in the receive buffer
int usb_serial_available(void)
{
int count;
count = usb_rx_byte_count(CDC_RX_ENDPOINT);
118a: 8898 ldrh r0, [r3, #4]
if (rx_packet) count += rx_packet->len - rx_packet->index;
118c: 4b04 ldr r3, [pc, #16] ; (11a0 <usb_serial_available+0x18>)
118e: 681b ldr r3, [r3, #0]
1190: b11b cbz r3, 119a <usb_serial_available+0x12>
1192: 881a ldrh r2, [r3, #0]
1194: 885b ldrh r3, [r3, #2]
1196: 1ad3 subs r3, r2, r3
1198: 4418 add r0, r3
return count;
}
119a: 4770 bx lr
119c: 1fffe924 .word 0x1fffe924
11a0: 1fffe754 .word 0x1fffe754
000011a4 <usb_serial_flush_input>:
return count;
}
// discard any buffered input
void usb_serial_flush_input(void)
{
11a4: b510 push {r4, lr}
usb_packet_t *rx;
if (!usb_configuration) return;
11a6: 4b09 ldr r3, [pc, #36] ; (11cc <usb_serial_flush_input+0x28>)
11a8: 781b ldrb r3, [r3, #0]
11aa: b16b cbz r3, 11c8 <usb_serial_flush_input+0x24>
if (rx_packet) {
11ac: 4c08 ldr r4, [pc, #32] ; (11d0 <usb_serial_flush_input+0x2c>)
11ae: 6820 ldr r0, [r4, #0]
11b0: b118 cbz r0, 11ba <usb_serial_flush_input+0x16>
usb_free(rx_packet);
11b2: f7ff ff85 bl 10c0 <usb_free>
rx_packet = NULL;
11b6: 2300 movs r3, #0
11b8: 6023 str r3, [r4, #0]
}
while (1) {
rx = usb_rx(CDC_RX_ENDPOINT);
11ba: 2003 movs r0, #3
11bc: f7ff fb7c bl 8b8 <usb_rx>
if (!rx) break;
11c0: b110 cbz r0, 11c8 <usb_serial_flush_input+0x24>
usb_free(rx);
11c2: f7ff ff7d bl 10c0 <usb_free>
}
11c6: e7f8 b.n 11ba <usb_serial_flush_input+0x16>
11c8: bd10 pop {r4, pc}
11ca: bf00 nop
11cc: 1fffe747 .word 0x1fffe747
11d0: 1fffe754 .word 0x1fffe754
000011d4 <usb_serial_write>:
return usb_serial_write(&c, 1);
}
int usb_serial_write(const void *buffer, uint32_t size)
{
11d4: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr}
uint32_t len;
uint32_t wait_count;
const uint8_t *src = (const uint8_t *)buffer;
uint8_t *dest;
tx_noautoflush = 1;
11d8: 4e2d ldr r6, [pc, #180] ; (1290 <usb_serial_write+0xbc>)
11da: 2301 movs r3, #1
return usb_serial_write(&c, 1);
}
int usb_serial_write(const void *buffer, uint32_t size)
{
11dc: 4607 mov r7, r0
11de: 460c mov r4, r1
uint32_t len;
uint32_t wait_count;
const uint8_t *src = (const uint8_t *)buffer;
uint8_t *dest;
tx_noautoflush = 1;
11e0: 7033 strb r3, [r6, #0]
while (size > 0) {
11e2: 2c00 cmp r4, #0
11e4: d04f beq.n 1286 <usb_serial_write+0xb2>
if (!tx_packet) {
11e6: 4d2b ldr r5, [pc, #172] ; (1294 <usb_serial_write+0xc0>)
11e8: 682b ldr r3, [r5, #0]
11ea: 46a9 mov r9, r5
11ec: bb2b cbnz r3, 123a <usb_serial_write+0x66>
11ee: f24a 28f9 movw r8, #41721 ; 0xa2f9
wait_count = 0;
while (1) {
if (!usb_configuration) {
11f2: 4b29 ldr r3, [pc, #164] ; (1298 <usb_serial_write+0xc4>)
11f4: 781b ldrb r3, [r3, #0]
11f6: f003 02ff and.w r2, r3, #255 ; 0xff
11fa: b90b cbnz r3, 1200 <usb_serial_write+0x2c>
tx_noautoflush = 0;
11fc: 7032 strb r2, [r6, #0]
11fe: e015 b.n 122c <usb_serial_write+0x58>
return -1;
}
if (usb_tx_packet_count(CDC_TX_ENDPOINT) < TX_PACKET_LIMIT) {
1200: 2004 movs r0, #4
1202: f7ff fb75 bl 8f0 <usb_tx_packet_count>
1206: 2807 cmp r0, #7
1208: d808 bhi.n 121c <usb_serial_write+0x48>
tx_noautoflush = 1;
120a: 2301 movs r3, #1
120c: 7033 strb r3, [r6, #0]
tx_packet = usb_malloc();
120e: f7ff ff39 bl 1084 <usb_malloc>
1212: f8c9 0000 str.w r0, [r9]
if (tx_packet) break;
1216: b980 cbnz r0, 123a <usb_serial_write+0x66>
tx_noautoflush = 0;
1218: 4b1d ldr r3, [pc, #116] ; (1290 <usb_serial_write+0xbc>)
121a: 7018 strb r0, [r3, #0]
}
if (++wait_count > TX_TIMEOUT || transmit_previous_timeout) {
121c: f1b8 0801 subs.w r8, r8, #1
1220: 4b1e ldr r3, [pc, #120] ; (129c <usb_serial_write+0xc8>)
1222: d001 beq.n 1228 <usb_serial_write+0x54>
1224: 781a ldrb r2, [r3, #0]
1226: b12a cbz r2, 1234 <usb_serial_write+0x60>
transmit_previous_timeout = 1;
1228: 2201 movs r2, #1
122a: 701a strb r2, [r3, #0]
return -1;
122c: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
1230: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
}
yield();
1234: f000 f904 bl 1440 <yield>
}
1238: e7db b.n 11f2 <usb_serial_write+0x1e>
}
transmit_previous_timeout = 0;
len = CDC_TX_SIZE - tx_packet->index;
123a: 6829 ldr r1, [r5, #0]
return -1;
}
yield();
}
}
transmit_previous_timeout = 0;
123c: 4a17 ldr r2, [pc, #92] ; (129c <usb_serial_write+0xc8>)
len = CDC_TX_SIZE - tx_packet->index;
123e: 8848 ldrh r0, [r1, #2]
return -1;
}
yield();
}
}
transmit_previous_timeout = 0;
1240: 2300 movs r3, #0
1242: 7013 strb r3, [r2, #0]
len = CDC_TX_SIZE - tx_packet->index;
1244: f1c0 0240 rsb r2, r0, #64 ; 0x40
1248: 4294 cmp r4, r2
124a: bf38 it cc
124c: 4622 movcc r2, r4
if (len > size) len = size;
dest = tx_packet->buf + tx_packet->index;
124e: f100 0c08 add.w ip, r0, #8
tx_packet->index += len;
1252: 4410 add r0, r2
}
}
transmit_previous_timeout = 0;
len = CDC_TX_SIZE - tx_packet->index;
if (len > size) len = size;
dest = tx_packet->buf + tx_packet->index;
1254: 448c add ip, r1
tx_packet->index += len;
1256: 8048 strh r0, [r1, #2]
size -= len;
1258: 1aa4 subs r4, r4, r2
while (len-- > 0) *dest++ = *src++;
125a: 4293 cmp r3, r2
125c: d004 beq.n 1268 <usb_serial_write+0x94>
125e: 5cf8 ldrb r0, [r7, r3]
1260: f80c 0003 strb.w r0, [ip, r3]
1264: 3301 adds r3, #1
1266: e7f8 b.n 125a <usb_serial_write+0x86>
1268: 441f add r7, r3
if (tx_packet->index >= CDC_TX_SIZE) {
126a: 884b ldrh r3, [r1, #2]
126c: 2b3f cmp r3, #63 ; 0x3f
126e: d906 bls.n 127e <usb_serial_write+0xaa>
tx_packet->len = CDC_TX_SIZE;
1270: 2340 movs r3, #64 ; 0x40
1272: 800b strh r3, [r1, #0]
usb_tx(CDC_TX_ENDPOINT, tx_packet);
1274: 2004 movs r0, #4
1276: f7ff fb89 bl 98c <usb_tx>
tx_packet = NULL;
127a: 2300 movs r3, #0
127c: 602b str r3, [r5, #0]
}
usb_cdc_transmit_flush_timer = TRANSMIT_FLUSH_TIMEOUT;
127e: 4b08 ldr r3, [pc, #32] ; (12a0 <usb_serial_write+0xcc>)
1280: 2205 movs r2, #5
1282: 701a strb r2, [r3, #0]
1284: e7ad b.n 11e2 <usb_serial_write+0xe>
}
tx_noautoflush = 0;
1286: 7034 strb r4, [r6, #0]
return 0;
1288: 4620 mov r0, r4
}
128a: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc}
128e: bf00 nop
1290: 1fffe74a .word 0x1fffe74a
1294: 1fffe74c .word 0x1fffe74c
1298: 1fffe747 .word 0x1fffe747
129c: 1fffe750 .word 0x1fffe750
12a0: 1fffe749 .word 0x1fffe749
000012a4 <usb_serial_putchar>:
static uint8_t transmit_previous_timeout=0;
// transmit a character. 0 returned on success, -1 on error
int usb_serial_putchar(uint8_t c)
{
12a4: b507 push {r0, r1, r2, lr}
12a6: ab02 add r3, sp, #8
return usb_serial_write(&c, 1);
12a8: 2101 movs r1, #1
static uint8_t transmit_previous_timeout=0;
// transmit a character. 0 returned on success, -1 on error
int usb_serial_putchar(uint8_t c)
{
12aa: f803 0d01 strb.w r0, [r3, #-1]!
return usb_serial_write(&c, 1);
12ae: 4618 mov r0, r3
12b0: f7ff ff90 bl 11d4 <usb_serial_write>
}
12b4: b003 add sp, #12
12b6: f85d fb04 ldr.w pc, [sp], #4
12ba: ffff e92d vtbl.8 d30, {d15-d16}, d29
000012bc <usb_serial_flush_output>:
tx_noautoflush = 0;
return len;
}
void usb_serial_flush_output(void)
{
12bc: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr}
if (!usb_configuration) return;
12c0: 4b11 ldr r3, [pc, #68] ; (1308 <usb_serial_flush_output+0x4c>)
12c2: 781b ldrb r3, [r3, #0]
12c4: b1f3 cbz r3, 1304 <usb_serial_flush_output+0x48>
tx_noautoflush = 1;
if (tx_packet) {
12c6: 4e11 ldr r6, [pc, #68] ; (130c <usb_serial_flush_output+0x50>)
}
void usb_serial_flush_output(void)
{
if (!usb_configuration) return;
tx_noautoflush = 1;
12c8: 4b11 ldr r3, [pc, #68] ; (1310 <usb_serial_flush_output+0x54>)
if (tx_packet) {
12ca: 6834 ldr r4, [r6, #0]
12cc: 4d11 ldr r5, [pc, #68] ; (1314 <usb_serial_flush_output+0x58>)
}
void usb_serial_flush_output(void)
{
if (!usb_configuration) return;
tx_noautoflush = 1;
12ce: 2701 movs r7, #1
12d0: 701f strb r7, [r3, #0]
12d2: 4698 mov r8, r3
if (tx_packet) {
12d4: b14c cbz r4, 12ea <usb_serial_flush_output+0x2e>
usb_cdc_transmit_flush_timer = 0;
12d6: 2700 movs r7, #0
tx_packet->len = tx_packet->index;
12d8: 8863 ldrh r3, [r4, #2]
void usb_serial_flush_output(void)
{
if (!usb_configuration) return;
tx_noautoflush = 1;
if (tx_packet) {
usb_cdc_transmit_flush_timer = 0;
12da: 702f strb r7, [r5, #0]
tx_packet->len = tx_packet->index;
usb_tx(CDC_TX_ENDPOINT, tx_packet);
12dc: 2004 movs r0, #4
{
if (!usb_configuration) return;
tx_noautoflush = 1;
if (tx_packet) {
usb_cdc_transmit_flush_timer = 0;
tx_packet->len = tx_packet->index;
12de: 8023 strh r3, [r4, #0]
usb_tx(CDC_TX_ENDPOINT, tx_packet);
12e0: 4621 mov r1, r4
12e2: f7ff fb53 bl 98c <usb_tx>
tx_packet = NULL;
12e6: 6037 str r7, [r6, #0]
12e8: e009 b.n 12fe <usb_serial_flush_output+0x42>
} else {
usb_packet_t *tx = usb_malloc();
12ea: f7ff fecb bl 1084 <usb_malloc>
if (tx) {
12ee: 4601 mov r1, r0
12f0: b120 cbz r0, 12fc <usb_serial_flush_output+0x40>
usb_cdc_transmit_flush_timer = 0;
usb_tx(CDC_TX_ENDPOINT, tx);
12f2: 2004 movs r0, #4
usb_tx(CDC_TX_ENDPOINT, tx_packet);
tx_packet = NULL;
} else {
usb_packet_t *tx = usb_malloc();
if (tx) {
usb_cdc_transmit_flush_timer = 0;
12f4: 702c strb r4, [r5, #0]
usb_tx(CDC_TX_ENDPOINT, tx);
12f6: f7ff fb49 bl 98c <usb_tx>
12fa: e000 b.n 12fe <usb_serial_flush_output+0x42>
} else {
usb_cdc_transmit_flush_timer = 1;
12fc: 702f strb r7, [r5, #0]
}
}
tx_noautoflush = 0;
12fe: 2300 movs r3, #0
1300: f888 3000 strb.w r3, [r8]
1304: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc}
1308: 1fffe747 .word 0x1fffe747
130c: 1fffe74c .word 0x1fffe74c
1310: 1fffe74a .word 0x1fffe74a
1314: 1fffe749 .word 0x1fffe749
00001318 <usb_serial_flush_callback>:
}
void usb_serial_flush_callback(void)
{
1318: b538 push {r3, r4, r5, lr}
if (tx_noautoflush) return;
131a: 4b0e ldr r3, [pc, #56] ; (1354 <usb_serial_flush_callback+0x3c>)
131c: 781b ldrb r3, [r3, #0]
131e: f003 05ff and.w r5, r3, #255 ; 0xff
1322: b9ab cbnz r3, 1350 <usb_serial_flush_callback+0x38>
if (tx_packet) {
1324: 4c0c ldr r4, [pc, #48] ; (1358 <usb_serial_flush_callback+0x40>)
1326: 6821 ldr r1, [r4, #0]
1328: b131 cbz r1, 1338 <usb_serial_flush_callback+0x20>
tx_packet->len = tx_packet->index;
132a: 884b ldrh r3, [r1, #2]
132c: 800b strh r3, [r1, #0]
usb_tx(CDC_TX_ENDPOINT, tx_packet);
132e: 2004 movs r0, #4
1330: f7ff fb2c bl 98c <usb_tx>
tx_packet = NULL;
1334: 6025 str r5, [r4, #0]
1336: bd38 pop {r3, r4, r5, pc}
} else {
usb_packet_t *tx = usb_malloc();
1338: f7ff fea4 bl 1084 <usb_malloc>
if (tx) {
133c: 4601 mov r1, r0
133e: b120 cbz r0, 134a <usb_serial_flush_callback+0x32>
usb_tx(CDC_TX_ENDPOINT, tx);
1340: 2004 movs r0, #4
} else {
usb_cdc_transmit_flush_timer = 1;
}
}
}
1342: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr}
usb_tx(CDC_TX_ENDPOINT, tx_packet);
tx_packet = NULL;
} else {
usb_packet_t *tx = usb_malloc();
if (tx) {
usb_tx(CDC_TX_ENDPOINT, tx);
1346: f7ff bb21 b.w 98c <usb_tx>
} else {
usb_cdc_transmit_flush_timer = 1;
134a: 4b04 ldr r3, [pc, #16] ; (135c <usb_serial_flush_callback+0x44>)
134c: 2201 movs r2, #1
134e: 701a strb r2, [r3, #0]
1350: bd38 pop {r3, r4, r5, pc}
1352: bf00 nop
1354: 1fffe74a .word 0x1fffe74a
1358: 1fffe74c .word 0x1fffe74c
135c: 1fffe749 .word 0x1fffe749
00001360 <_ZN5Print7printlnEv>:
return printNumber(n, 10, sign);
}
size_t Print::println(void)
{
1360: b507 push {r0, r1, r2, lr}
uint8_t buf[2]={'\r', '\n'};
1362: 4b06 ldr r3, [pc, #24] ; (137c <_ZN5Print7printlnEv+0x1c>)
1364: 881b ldrh r3, [r3, #0]
1366: f8ad 3004 strh.w r3, [sp, #4]
return write(buf, 2);
136a: 6803 ldr r3, [r0, #0]
136c: a901 add r1, sp, #4
136e: 685b ldr r3, [r3, #4]
1370: 2202 movs r2, #2
1372: 4798 blx r3
}
1374: b003 add sp, #12
1376: f85d fb04 ldr.w pc, [sp], #4
137a: bf00 nop
137c: 00002ba4 .word 0x00002ba4
00001380 <_ZN5Print11printNumberEmhh>:
}
#else
size_t Print::printNumber(unsigned long n, uint8_t base, uint8_t sign)
{
1380: b570 push {r4, r5, r6, lr}
1382: 4605 mov r5, r0
1384: b08a sub sp, #40 ; 0x28
uint8_t digit, i;
// TODO: make these checks as inline, since base is
// almost always a constant. base = 0 (BYTE) should
// inline as a call directly to write()
if (base == 0) {
1386: b922 cbnz r2, 1392 <_ZN5Print11printNumberEmhh+0x12>
return write((uint8_t)n);
1388: 6803 ldr r3, [r0, #0]
138a: b2c9 uxtb r1, r1
138c: 681b ldr r3, [r3, #0]
138e: 4798 blx r3
1390: e02c b.n 13ec <_ZN5Print11printNumberEmhh+0x6c>
} else if (base == 1) {
base = 10;
1392: 2a01 cmp r2, #1
1394: bf08 it eq
1396: 220a moveq r2, #10
}
if (n == 0) {
1398: b921 cbnz r1, 13a4 <_ZN5Print11printNumberEmhh+0x24>
buf[sizeof(buf) - 1] = '0';
139a: 2230 movs r2, #48 ; 0x30
139c: f88d 2025 strb.w r2, [sp, #37] ; 0x25
i = sizeof(buf) - 1;
13a0: 2421 movs r4, #33 ; 0x21
13a2: e013 b.n 13cc <_ZN5Print11printNumberEmhh+0x4c>
} else if (base == 1) {
base = 10;
}
if (n == 0) {
13a4: 2421 movs r4, #33 ; 0x21
buf[sizeof(buf) - 1] = '0';
i = sizeof(buf) - 1;
} else {
i = sizeof(buf) - 1;
while (1) {
digit = n % base;
13a6: fbb1 f0f2 udiv r0, r1, r2
13aa: fb02 1110 mls r1, r2, r0, r1
13ae: b2c9 uxtb r1, r1
buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10);
13b0: 2909 cmp r1, #9
13b2: ae0a add r6, sp, #40 ; 0x28
13b4: bf94 ite ls
13b6: 3130 addls r1, #48 ; 0x30
13b8: 3137 addhi r1, #55 ; 0x37
13ba: 4426 add r6, r4
13bc: b2c9 uxtb r1, r1
13be: f806 1c24 strb.w r1, [r6, #-36]
n /= base;
if (n == 0) break;
13c2: 4601 mov r1, r0
13c4: b110 cbz r0, 13cc <_ZN5Print11printNumberEmhh+0x4c>
i--;
13c6: 3c01 subs r4, #1
13c8: b2e4 uxtb r4, r4
} else if (base == 1) {
base = 10;
}
if (n == 0) {
13ca: e7ec b.n 13a6 <_ZN5Print11printNumberEmhh+0x26>
n /= base;
if (n == 0) break;
i--;
}
}
if (sign) {
13cc: b133 cbz r3, 13dc <_ZN5Print11printNumberEmhh+0x5c>
i--;
13ce: 3c01 subs r4, #1
13d0: b2e4 uxtb r4, r4
buf[i] = '-';
13d2: ab0a add r3, sp, #40 ; 0x28
13d4: 4423 add r3, r4
13d6: 222d movs r2, #45 ; 0x2d
13d8: f803 2c24 strb.w r2, [r3, #-36]
}
return write(buf + i, sizeof(buf) - i);
13dc: 682b ldr r3, [r5, #0]
13de: a901 add r1, sp, #4
13e0: 685b ldr r3, [r3, #4]
13e2: 4628 mov r0, r5
13e4: 4421 add r1, r4
13e6: f1c4 0222 rsb r2, r4, #34 ; 0x22
13ea: 4798 blx r3
}
13ec: b00a add sp, #40 ; 0x28
13ee: bd70 pop {r4, r5, r6, pc}
000013f0 <main>:
#include "WProgram.h"
extern "C" int main(void)
{
13f0: b508 push {r3, lr}
}
#else
// Arduino's main() function just calls setup() and loop()....
setup();
13f2: f7ff f8a7 bl 544 <setup>
while (1) {
loop();
13f6: f7ff f8d9 bl 5ac <loop>
yield();
13fa: f000 f821 bl 1440 <yield>
13fe: e7fa b.n 13f6 <main+0x6>
00001400 <_ZN16usb_serial_class9availableEv>:
class usb_serial_class : public Stream
{
public:
void begin(long) { /* TODO: call a function that tries to wait for enumeration */ };
void end() { /* TODO: flush output and shut down USB port */ };
virtual int available() { return usb_serial_available(); }
1400: f7ff bec2 b.w 1188 <usb_serial_available>
00001404 <_ZN16usb_serial_class4readEv>:
virtual int read() { return usb_serial_getchar(); }
1404: f7ff be7e b.w 1104 <usb_serial_getchar>
00001408 <_ZN16usb_serial_class4peekEv>:
virtual int peek() { return usb_serial_peekchar(); }
1408: f7ff bea2 b.w 1150 <usb_serial_peekchar>
0000140c <_ZN16usb_serial_class5flushEv>:
virtual void flush() { usb_serial_flush_output(); } // TODO: actually wait for data to leave USB...
140c: f7ff bf56 b.w 12bc <usb_serial_flush_output>
00001410 <_ZN16usb_serial_class5clearEv>:
virtual void clear(void) { usb_serial_flush_input(); }
1410: f7ff bec8 b.w 11a4 <usb_serial_flush_input>
00001414 <_ZN16usb_serial_class5writeEh>:
virtual size_t write(uint8_t c) { return usb_serial_putchar(c); }
1414: 4608 mov r0, r1
1416: f7ff bf45 b.w 12a4 <usb_serial_putchar>
0000141a <_ZN16usb_serial_class5writeEPKhj>:
virtual size_t write(const uint8_t *buffer, size_t size) { return usb_serial_write(buffer, size); }
141a: 4608 mov r0, r1
141c: 4611 mov r1, r2
141e: f7ff bed9 b.w 11d4 <usb_serial_write>
00001422 <_Z11serialEventv>:
#endif
#endif // F_CPU
void serialEvent() __attribute__((weak));
void serialEvent() {}
1422: 4770 bx lr
00001424 <_GLOBAL__sub_I_Serial>:
class __FlashStringHelper;
class Print
{
public:
Print() : write_error(0) {}
1424: 4b04 ldr r3, [pc, #16] ; (1438 <_GLOBAL__sub_I_Serial+0x14>)
1426: 2200 movs r2, #0
1428: 711a strb r2, [r3, #4]
#include "Print.h"
class Stream : public Print
{
public:
Stream() : _timeout(1000), read_error(0) {}
142a: f44f 717a mov.w r1, #1000 ; 0x3e8
142e: 731a strb r2, [r3, #12]
#define USB_SERIAL_RTS 0x02
// C++ interface
#ifdef __cplusplus
#include "Stream.h"
class usb_serial_class : public Stream
1430: 4a02 ldr r2, [pc, #8] ; (143c <_GLOBAL__sub_I_Serial+0x18>)
1432: 6099 str r1, [r3, #8]
1434: 601a str r2, [r3, #0]
1436: 4770 bx lr
1438: 1fffe75c .word 0x1fffe75c
143c: 00002bb0 .word 0x00002bb0
00001440 <yield>:
#include "usb_serial.h"
#include "usb_seremu.h"
void yield(void) __attribute__ ((weak));
void yield(void)
{
1440: b510 push {r4, lr}
static uint8_t running=0;
if (running) return; // TODO: does this need to be atomic?
1442: 4c0e ldr r4, [pc, #56] ; (147c <yield+0x3c>)
1444: 7823 ldrb r3, [r4, #0]
1446: b9bb cbnz r3, 1478 <yield+0x38>
running = 1;
1448: 2301 movs r3, #1
144a: 7023 strb r3, [r4, #0]
{
public:
void begin(long) { /* TODO: call a function that tries to wait for enumeration */ };
void end() { /* TODO: flush output and shut down USB port */ };
virtual int available() { return usb_serial_available(); }
144c: f7ff fe9c bl 1188 <usb_serial_available>
if (Serial.available()) serialEvent();
1450: b108 cbz r0, 1456 <yield+0x16>
1452: f7ff ffe6 bl 1422 <_Z11serialEventv>
virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); }
virtual void setRX(uint8_t pin) { serial_set_rx(pin); }
virtual void setTX(uint8_t pin, bool opendrain=false) { serial_set_tx(pin, opendrain); }
virtual bool attachRts(uint8_t pin) { return serial_set_rts(pin); }
virtual bool attachCts(uint8_t pin) { return serial_set_cts(pin); }
virtual int available(void) { return serial_available(); }
1456: f000 fb0d bl 1a74 <serial_available>
if (Serial1.available()) serialEvent1();
145a: b108 cbz r0, 1460 <yield+0x20>
145c: f001 f9bb bl 27d6 <_Z12serialEvent1v>
virtual void transmitterEnable(uint8_t pin) { serial2_set_transmit_pin(pin); }
virtual void setRX(uint8_t pin) { serial2_set_rx(pin); }
virtual void setTX(uint8_t pin, bool opendrain=false) { serial2_set_tx(pin, opendrain); }
virtual bool attachRts(uint8_t pin) { return serial2_set_rts(pin); }
virtual bool attachCts(uint8_t pin) { return serial2_set_cts(pin); }
virtual int available(void) { return serial2_available(); }
1460: f000 fdec bl 203c <serial2_available>
if (Serial2.available()) serialEvent2();
1464: b108 cbz r0, 146a <yield+0x2a>
1466: f001 fa3e bl 28e6 <_Z12serialEvent2v>
virtual void transmitterEnable(uint8_t pin) { serial3_set_transmit_pin(pin); }
virtual void setRX(uint8_t pin) { serial3_set_rx(pin); }
virtual void setTX(uint8_t pin, bool opendrain=false) { serial3_set_tx(pin, opendrain); }
virtual bool attachRts(uint8_t pin) { return serial3_set_rts(pin); }
virtual bool attachCts(uint8_t pin) { return serial3_set_cts(pin); }
virtual int available(void) { return serial3_available(); }
146a: f001 f837 bl 24dc <serial3_available>
if (Serial3.available()) serialEvent3();
146e: b108 cbz r0, 1474 <yield+0x34>
1470: f001 fac1 bl 29f6 <_Z12serialEvent3v>
if (Serial4.available()) serialEvent4();
#endif
#ifdef HAS_KINETISK_UART4
if (Serial5.available()) serialEvent5();
#endif
running = 0;
1474: 2300 movs r3, #0
1476: 7023 strb r3, [r4, #0]
1478: bd10 pop {r4, pc}
147a: bf00 nop
147c: 1fffe76c .word 0x1fffe76c
00001480 <analog_init>:
void analog_init(void)
{
uint32_t num;
#if defined(__MK20DX128__) || defined(__MK20DX256__)
VREF_TRM = 0x60;
1480: 4b1b ldr r3, [pc, #108] ; (14f0 <analog_init+0x70>)
1482: 2260 movs r2, #96 ; 0x60
1484: 701a strb r2, [r3, #0]
VREF_SC = 0xE1; // enable 1.2 volt ref
1486: 22e1 movs r2, #225 ; 0xe1
1488: 705a strb r2, [r3, #1]
#endif
if (analog_config_bits == 8) {
148a: 4b1a ldr r3, [pc, #104] ; (14f4 <analog_init+0x74>)
148c: 4a1a ldr r2, [pc, #104] ; (14f8 <analog_init+0x78>)
148e: 7819 ldrb r1, [r3, #0]
1490: 4b1a ldr r3, [pc, #104] ; (14fc <analog_init+0x7c>)
1492: 2908 cmp r1, #8
1494: d101 bne.n 149a <analog_init+0x1a>
ADC0_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0);
1496: 2101 movs r1, #1
1498: e002 b.n 14a0 <analog_init+0x20>
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
#ifdef HAS_KINETIS_ADC1
ADC1_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0);
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
#endif
} else if (analog_config_bits == 10) {
149a: 290a cmp r1, #10
149c: d103 bne.n 14a6 <analog_init+0x26>
ADC0_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP;
149e: 2139 movs r1, #57 ; 0x39
14a0: 6011 str r1, [r2, #0]
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
14a2: 2213 movs r2, #19
14a4: e005 b.n 14b2 <analog_init+0x32>
#ifdef HAS_KINETIS_ADC1
ADC1_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP;
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3);
#endif
} else if (analog_config_bits == 12) {
14a6: 290c cmp r1, #12
ADC0_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP;
14a8: bf0c ite eq
14aa: 2135 moveq r1, #53 ; 0x35
#ifdef HAS_KINETIS_ADC1
ADC1_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP;
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
#endif
} else {
ADC0_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP;
14ac: 213d movne r1, #61 ; 0x3d
14ae: 6011 str r1, [r2, #0]
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
14b0: 2212 movs r2, #18
14b2: 601a str r2, [r3, #0]
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2);
#endif
}
#if defined(__MK20DX128__)
if (analog_reference_internal) {
14b4: 4b12 ldr r3, [pc, #72] ; (1500 <analog_init+0x80>)
14b6: 781a ldrb r2, [r3, #0]
14b8: 4b12 ldr r3, [pc, #72] ; (1504 <analog_init+0x84>)
14ba: b102 cbz r2, 14be <analog_init+0x3e>
ADC0_SC2 = ADC_SC2_REFSEL(1); // 1.2V ref
14bc: 2201 movs r2, #1
} else {
ADC0_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref
14be: 601a str r2, [r3, #0]
} else {
ADC0_SC2 = ADC_SC2_REFSEL(1); // vcc
}
#endif
num = analog_num_average;
14c0: 4b11 ldr r3, [pc, #68] ; (1508 <analog_init+0x88>)
14c2: 781a ldrb r2, [r3, #0]
14c4: 4b11 ldr r3, [pc, #68] ; (150c <analog_init+0x8c>)
if (num <= 1) {
14c6: 2a01 cmp r2, #1
14c8: d801 bhi.n 14ce <analog_init+0x4e>
ADC0_SC3 = ADC_SC3_CAL; // begin cal
14ca: 2280 movs r2, #128 ; 0x80
14cc: e00b b.n 14e6 <analog_init+0x66>
#ifdef HAS_KINETIS_ADC1
ADC1_SC3 = ADC_SC3_CAL; // begin cal
#endif
} else if (num <= 4) {
14ce: 2a04 cmp r2, #4
14d0: d801 bhi.n 14d6 <analog_init+0x56>
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0);
14d2: 2284 movs r2, #132 ; 0x84
14d4: e007 b.n 14e6 <analog_init+0x66>
#ifdef HAS_KINETIS_ADC1
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0);
#endif
} else if (num <= 8) {
14d6: 2a08 cmp r2, #8
14d8: d801 bhi.n 14de <analog_init+0x5e>
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1);
14da: 2285 movs r2, #133 ; 0x85
14dc: e003 b.n 14e6 <analog_init+0x66>
#ifdef HAS_KINETIS_ADC1
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1);
#endif
} else if (num <= 16) {
14de: 2a10 cmp r2, #16
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2);
14e0: bf94 ite ls
14e2: 2286 movls r2, #134 ; 0x86
#ifdef HAS_KINETIS_ADC1
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2);
#endif
} else {
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3);
14e4: 2287 movhi r2, #135 ; 0x87
14e6: 601a str r2, [r3, #0]
#ifdef HAS_KINETIS_ADC1
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3);
#endif
}
calibrating = 1;
14e8: 4b09 ldr r3, [pc, #36] ; (1510 <analog_init+0x90>)
14ea: 2201 movs r2, #1
14ec: 701a strb r2, [r3, #0]
14ee: 4770 bx lr
14f0: 40074000 .word 0x40074000
14f4: 1fffe564 .word 0x1fffe564
14f8: 4003b008 .word 0x4003b008
14fc: 4003b00c .word 0x4003b00c
1500: 1fffe76e .word 0x1fffe76e
1504: 4003b020 .word 0x4003b020
1508: 1fffe565 .word 0x1fffe565
150c: 4003b024 .word 0x4003b024
1510: 1fffe76d .word 0x1fffe76d
00001514 <systick_default_isr>:
}
extern volatile uint32_t systick_millis_count;
void systick_default_isr(void)
{
systick_millis_count++;
1514: 4b02 ldr r3, [pc, #8] ; (1520 <systick_default_isr+0xc>)
1516: 681a ldr r2, [r3, #0]
1518: 3201 adds r2, #1
151a: 601a str r2, [r3, #0]
151c: 4770 bx lr
151e: bf00 nop
1520: 1fffe664 .word 0x1fffe664
00001524 <fault_isr>:
void _init_Teensyduino_internal_(void);
void __libc_init_array(void);
void fault_isr(void)
{
1524: b508 push {r3, lr}
asm("ldr %0, [sp, #0]" : "=r" (addr) ::);
#endif
while (1) {
// keep polling some communication while in fault
// mode, so we don't completely die.
if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr();
1526: 4c0b ldr r4, [pc, #44] ; (1554 <fault_isr+0x30>)
1528: 6823 ldr r3, [r4, #0]
152a: 0358 lsls r0, r3, #13
152c: d501 bpl.n 1532 <fault_isr+0xe>
152e: f7ff fa6d bl a0c <usb_isr>
if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr();
1532: 6823 ldr r3, [r4, #0]
1534: 0559 lsls r1, r3, #21
1536: d501 bpl.n 153c <fault_isr+0x18>
1538: f000 fb12 bl 1b60 <uart0_status_isr>
if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr();
153c: 6823 ldr r3, [r4, #0]
153e: 051a lsls r2, r3, #20
1540: d501 bpl.n 1546 <fault_isr+0x22>
1542: f000 fddf bl 2104 <uart1_status_isr>
if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr();
1546: 6823 ldr r3, [r4, #0]
1548: 04db lsls r3, r3, #19
154a: d5ec bpl.n 1526 <fault_isr+0x2>
154c: f001 f82a bl 25a4 <uart2_status_isr>
1550: e7e9 b.n 1526 <fault_isr+0x2>
1552: bf00 nop
1554: 40048034 .word 0x40048034
00001558 <unused_isr>:
}
}
void unused_isr(void)
{
1558: b508 push {r3, lr}
fault_isr();
155a: f7ff ffe3 bl 1524 <fault_isr>
155e: ffff 4b01 vtbl.8 d20, {d15-d18}, d1
00001560 <startup_early_hook>:
extern void rtc_set(unsigned long t);
static void startup_default_early_hook(void) {
#if defined(KINETISK)
WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE;
1560: 4b01 ldr r3, [pc, #4] ; (1568 <startup_early_hook+0x8>)
1562: 2210 movs r2, #16
1564: 801a strh r2, [r3, #0]
1566: 4770 bx lr
1568: 40052000 .word 0x40052000
0000156c <startup_late_hook>:
#elif defined(KINETISL)
SIM_COPC = 0; // disable the watchdog
#endif
}
static void startup_default_late_hook(void) {}
156c: 4770 bx lr
156e: ffff f3ef ; <UNDEFINED> instruction: 0xfffff3ef
00001570 <nvic_execution_priority>:
int priority=256;
uint32_t primask, faultmask, basepri, ipsr;
// full algorithm in ARM DDI0403D, page B1-639
// this isn't quite complete, but hopefully good enough
__asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);
1570: f3ef 8313 mrs r3, FAULTMASK
if (faultmask) return -1;
1574: b99b cbnz r3, 159e <nvic_execution_priority+0x2e>
__asm__ volatile("mrs %0, primask\n" : "=r" (primask)::);
1576: f3ef 8010 mrs r0, PRIMASK
if (primask) return 0;
157a: b998 cbnz r0, 15a4 <nvic_execution_priority+0x34>
__asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);
157c: f3ef 8305 mrs r3, IPSR
if (ipsr) {
1580: b123 cbz r3, 158c <nvic_execution_priority+0x1c>
if (ipsr < 16) priority = 0; // could be non-zero
1582: 2b0f cmp r3, #15
1584: d904 bls.n 1590 <nvic_execution_priority+0x20>
else priority = NVIC_GET_PRIORITY(ipsr - 16);
1586: 4a08 ldr r2, [pc, #32] ; (15a8 <nvic_execution_priority+0x38>)
1588: 5c98 ldrb r0, [r3, r2]
158a: e001 b.n 1590 <nvic_execution_priority+0x20>
*g = 1;
}
int nvic_execution_priority(void)
{
int priority=256;
158c: f44f 7080 mov.w r0, #256 ; 0x100
__asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::);
if (ipsr) {
if (ipsr < 16) priority = 0; // could be non-zero
else priority = NVIC_GET_PRIORITY(ipsr - 16);
}
__asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::);
1590: f3ef 8311 mrs r3, BASEPRI
if (basepri > 0 && basepri < priority) priority = basepri;
1594: b13b cbz r3, 15a6 <nvic_execution_priority+0x36>
1596: 4283 cmp r3, r0
1598: bf38 it cc
159a: 4618 movcc r0, r3
159c: 4770 bx lr
uint32_t primask, faultmask, basepri, ipsr;
// full algorithm in ARM DDI0403D, page B1-639
// this isn't quite complete, but hopefully good enough
__asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::);
if (faultmask) return -1;
159e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
15a2: 4770 bx lr
__asm__ volatile("mrs %0, primask\n" : "=r" (primask)::);
if (primask) return 0;
15a4: 4618 mov r0, r3
else priority = NVIC_GET_PRIORITY(ipsr - 16);
}
__asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::);
if (basepri > 0 && basepri < priority) priority = basepri;
return priority;
}
15a6: 4770 bx lr
15a8: e000e3f0 .word 0xe000e3f0
000015ac <ultoa>:
#include <string.h>
#include <stdlib.h>
char * ultoa(unsigned long val, char *buf, int radix)
{
15ac: b510 push {r4, lr}
unsigned digit;
int i=0, j;
15ae: 2300 movs r3, #0
char t;
while (1) {
digit = val % radix;
15b0: fbb0 f4f2 udiv r4, r0, r2
15b4: fb02 0014 mls r0, r2, r4, r0
buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10);
15b8: 2809 cmp r0, #9
15ba: bf94 ite ls
15bc: 3030 addls r0, #48 ; 0x30
15be: 3037 addhi r0, #55 ; 0x37
15c0: b2c0 uxtb r0, r0
15c2: 54c8 strb r0, [r1, r3]
val /= radix;
if (val == 0) break;
15c4: 4620 mov r0, r4
15c6: b10c cbz r4, 15cc <ultoa+0x20>
i++;
15c8: 3301 adds r3, #1
}
15ca: e7f1 b.n 15b0 <ultoa+0x4>
buf[i + 1] = 0;
15cc: 18ca adds r2, r1, r3
15ce: 7054 strb r4, [r2, #1]
for (j=0; j < i; j++, i--) {
15d0: 4622 mov r2, r4
15d2: 429a cmp r2, r3
15d4: da06 bge.n 15e4 <ultoa+0x38>
t = buf[j];
15d6: 5c88 ldrb r0, [r1, r2]
buf[j] = buf[i];
15d8: 5ccc ldrb r4, [r1, r3]
15da: 548c strb r4, [r1, r2]
buf[i] = t;
15dc: 54c8 strb r0, [r1, r3]
val /= radix;
if (val == 0) break;
i++;
}
buf[i + 1] = 0;
for (j=0; j < i; j++, i--) {
15de: 3201 adds r2, #1
15e0: 3b01 subs r3, #1
15e2: e7f6 b.n 15d2 <ultoa+0x26>
t = buf[j];
buf[j] = buf[i];
buf[i] = t;
}
return buf;
}
15e4: 4608 mov r0, r1
15e6: bd10 pop {r4, pc}
000015e8 <serial_begin>:
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
#define C2_TX_INACTIVE C2_ENABLE
void serial_begin(uint32_t divisor)
{
SIM_SCGC4 |= SIM_SCGC4_UART0; // turn on clock, TODO: use bitband
15e8: 4b23 ldr r3, [pc, #140] ; (1678 <serial_begin+0x90>)
15ea: 681a ldr r2, [r3, #0]
15ec: f442 6280 orr.w r2, r2, #1024 ; 0x400
15f0: 601a str r2, [r3, #0]
rx_buffer_head = 0;
15f2: 4a22 ldr r2, [pc, #136] ; (167c <serial_begin+0x94>)
15f4: 2300 movs r3, #0
15f6: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
15f8: 4a21 ldr r2, [pc, #132] ; (1680 <serial_begin+0x98>)
15fa: 7013 strb r3, [r2, #0]
tx_buffer_head = 0;
15fc: 4a21 ldr r2, [pc, #132] ; (1684 <serial_begin+0x9c>)
15fe: 7013 strb r3, [r2, #0]
tx_buffer_tail = 0;
1600: 4a21 ldr r2, [pc, #132] ; (1688 <serial_begin+0xa0>)
1602: 7013 strb r3, [r2, #0]
transmitting = 0;
1604: 4a21 ldr r2, [pc, #132] ; (168c <serial_begin+0xa4>)
1606: 7013 strb r3, [r2, #0]
switch (rx_pin_num) {
1608: 4b21 ldr r3, [pc, #132] ; (1690 <serial_begin+0xa8>)
160a: 781b ldrb r3, [r3, #0]
160c: b12b cbz r3, 161a <serial_begin+0x32>
160e: 2b15 cmp r3, #21
1610: d107 bne.n 1622 <serial_begin+0x3a>
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1612: f240 3213 movw r2, #787 ; 0x313
1616: 4b1f ldr r3, [pc, #124] ; (1694 <serial_begin+0xac>)
1618: e002 b.n 1620 <serial_begin+0x38>
rx_buffer_tail = 0;
tx_buffer_head = 0;
tx_buffer_tail = 0;
transmitting = 0;
switch (rx_pin_num) {
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
161a: 4b1f ldr r3, [pc, #124] ; (1698 <serial_begin+0xb0>)
161c: f240 3213 movw r2, #787 ; 0x313
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1620: 601a str r2, [r3, #0]
#if defined(KINETISL)
case 3: CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break;
#endif
}
switch (tx_pin_num) {
1622: 4b1e ldr r3, [pc, #120] ; (169c <serial_begin+0xb4>)
1624: 781b ldrb r3, [r3, #0]
1626: 2b01 cmp r3, #1
1628: d005 beq.n 1636 <serial_begin+0x4e>
162a: 2b05 cmp r3, #5
162c: d107 bne.n 163e <serial_begin+0x56>
case 1: CORE_PIN1_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 5: CORE_PIN5_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
162e: f44f 7251 mov.w r2, #836 ; 0x344
1632: 4b1b ldr r3, [pc, #108] ; (16a0 <serial_begin+0xb8>)
1634: e002 b.n 163c <serial_begin+0x54>
#if defined(KINETISL)
case 3: CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break;
#endif
}
switch (tx_pin_num) {
case 1: CORE_PIN1_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
1636: 4b1b ldr r3, [pc, #108] ; (16a4 <serial_begin+0xbc>)
1638: f44f 7251 mov.w r2, #836 ; 0x344
case 5: CORE_PIN5_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
163c: 601a str r2, [r3, #0]
#if defined(KINETISL)
case 4: CORE_PIN4_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); break;
#endif
}
#if defined(HAS_KINETISK_UART0)
UART0_BDH = (divisor >> 13) & 0x1F;
163e: 4b1a ldr r3, [pc, #104] ; (16a8 <serial_begin+0xc0>)
1640: f3c0 3244 ubfx r2, r0, #13, #5
1644: 701a strb r2, [r3, #0]
UART0_BDL = (divisor >> 5) & 0xFF;
1646: f3c0 1247 ubfx r2, r0, #5, #8
164a: 705a strb r2, [r3, #1]
UART0_C4 = divisor & 0x1F;
164c: f000 001f and.w r0, r0, #31
#ifdef HAS_KINETISK_UART0_FIFO
UART0_C1 = UART_C1_ILT;
1650: 2204 movs r2, #4
UART0_TWFIFO = 2; // tx watermark, causes S1_TDRE to set
1652: 2102 movs r1, #2
#endif
}
#if defined(HAS_KINETISK_UART0)
UART0_BDH = (divisor >> 13) & 0x1F;
UART0_BDL = (divisor >> 5) & 0xFF;
UART0_C4 = divisor & 0x1F;
1654: 7298 strb r0, [r3, #10]
#ifdef HAS_KINETISK_UART0_FIFO
UART0_C1 = UART_C1_ILT;
1656: 709a strb r2, [r3, #2]
UART0_TWFIFO = 2; // tx watermark, causes S1_TDRE to set
1658: 74d9 strb r1, [r3, #19]
UART0_RWFIFO = 4; // rx watermark, causes S1_RDRF to set
165a: 755a strb r2, [r3, #21]
UART0_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
165c: 2288 movs r2, #136 ; 0x88
165e: 741a strb r2, [r3, #16]
#elif defined(HAS_KINETISL_UART0)
UART0_BDH = (divisor >> 8) & 0x1F;
UART0_BDL = divisor & 0xFF;
UART0_C1 = 0;
#endif
UART0_C2 = C2_TX_INACTIVE;
1660: 223c movs r2, #60 ; 0x3c
1662: 70da strb r2, [r3, #3]
NVIC_SET_PRIORITY(IRQ_UART0_STATUS, IRQ_PRIORITY);
1664: 4b11 ldr r3, [pc, #68] ; (16ac <serial_begin+0xc4>)
1666: 2240 movs r2, #64 ; 0x40
1668: 701a strb r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_UART0_STATUS);
166a: f5a3 7344 sub.w r3, r3, #784 ; 0x310
166e: f44f 3280 mov.w r2, #65536 ; 0x10000
1672: 601a str r2, [r3, #0]
1674: 4770 bx lr
1676: bf00 nop
1678: 40048034 .word 0x40048034
167c: 1fffe7f7 .word 0x1fffe7f7
1680: 1fffe775 .word 0x1fffe775
1684: 1fffe800 .word 0x1fffe800
1688: 1fffe7f8 .word 0x1fffe7f8
168c: 1fffe774 .word 0x1fffe774
1690: 1fffe7b6 .word 0x1fffe7b6
1694: 4004c018 .word 0x4004c018
1698: 4004a040 .word 0x4004a040
169c: 1fffe566 .word 0x1fffe566
16a0: 4004c01c .word 0x4004c01c
16a4: 4004a044 .word 0x4004a044
16a8: 4006a000 .word 0x4006a000
16ac: e000e410 .word 0xe000e410
000016b0 <serial_format>:
void serial_format(uint32_t format)
{
uint8_t c;
c = UART0_C1;
16b0: 4a13 ldr r2, [pc, #76] ; (1700 <serial_format+0x50>)
16b2: 7893 ldrb r3, [r2, #2]
c = (c & ~0x13) | (format & 0x03); // configure parity
16b4: f000 0103 and.w r1, r0, #3
16b8: f003 03ec and.w r3, r3, #236 ; 0xec
16bc: 430b orrs r3, r1
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
16be: 0741 lsls r1, r0, #29
16c0: bf48 it mi
16c2: f043 0310 orrmi.w r3, r3, #16
UART0_C1 = c;
16c6: 7093 strb r3, [r2, #2]
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
16c8: f000 030f and.w r3, r0, #15
16cc: 2b04 cmp r3, #4
uint8_t c;
c = UART0_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART0_C1 = c;
16ce: 490c ldr r1, [pc, #48] ; (1700 <serial_format+0x50>)
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
16d0: d103 bne.n 16da <serial_format+0x2a>
16d2: 798b ldrb r3, [r1, #6]
16d4: f043 0340 orr.w r3, r3, #64 ; 0x40
16d8: 718b strb r3, [r1, #6]
c = UART0_S2 & ~0x10;
16da: 7953 ldrb r3, [r2, #5]
if (format & 0x10) c |= 0x10; // rx invert
16dc: 06c2 lsls r2, r0, #27
c = UART0_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART0_C1 = c;
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART0_S2 & ~0x10;
16de: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x10) c |= 0x10; // rx invert
UART0_S2 = c;
16e2: 4a07 ldr r2, [pc, #28] ; (1700 <serial_format+0x50>)
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART0_C1 = c;
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART0_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
16e4: bf48 it mi
16e6: f043 0310 orrmi.w r3, r3, #16
UART0_S2 = c;
16ea: 7153 strb r3, [r2, #5]
c = UART0_C3 & ~0x10;
16ec: 7993 ldrb r3, [r2, #6]
if (format & 0x20) c |= 0x10; // tx invert
16ee: 0681 lsls r1, r0, #26
UART0_C1 = c;
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART0_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
UART0_S2 = c;
c = UART0_C3 & ~0x10;
16f0: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x20) c |= 0x10; // tx invert
16f4: bf48 it mi
16f6: f043 0310 orrmi.w r3, r3, #16
UART0_C3 = c;
16fa: 7193 strb r3, [r2, #6]
16fc: 4770 bx lr
16fe: bf00 nop
1700: 4006a000 .word 0x4006a000
00001704 <serial_end>:
use9Bits = format & 0x80;
#endif
}
void serial_end(void)
{
1704: b508 push {r3, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
1706: 4b11 ldr r3, [pc, #68] ; (174c <serial_end+0x48>)
1708: 681b ldr r3, [r3, #0]
170a: 055b lsls r3, r3, #21
170c: d400 bmi.n 1710 <serial_end+0xc>
170e: bd08 pop {r3, pc}
while (transmitting) yield(); // wait for buffered data to send
1710: 4b0f ldr r3, [pc, #60] ; (1750 <serial_end+0x4c>)
1712: 781a ldrb r2, [r3, #0]
1714: f002 03ff and.w r3, r2, #255 ; 0xff
1718: b112 cbz r2, 1720 <serial_end+0x1c>
171a: f7ff fe91 bl 1440 <yield>
171e: e7f7 b.n 1710 <serial_end+0xc>
NVIC_DISABLE_IRQ(IRQ_UART0_STATUS);
1720: 4a0c ldr r2, [pc, #48] ; (1754 <serial_end+0x50>)
1722: f44f 3180 mov.w r1, #65536 ; 0x10000
1726: 6011 str r1, [r2, #0]
UART0_C2 = 0;
1728: 4a0b ldr r2, [pc, #44] ; (1758 <serial_end+0x54>)
CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
172a: 490c ldr r1, [pc, #48] ; (175c <serial_end+0x58>)
void serial_end(void)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
while (transmitting) yield(); // wait for buffered data to send
NVIC_DISABLE_IRQ(IRQ_UART0_STATUS);
UART0_C2 = 0;
172c: 70d3 strb r3, [r2, #3]
CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
172e: f240 1203 movw r2, #259 ; 0x103
1732: 600a str r2, [r1, #0]
CORE_PIN1_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
1734: 604a str r2, [r1, #4]
rx_buffer_head = 0;
1736: 4a0a ldr r2, [pc, #40] ; (1760 <serial_end+0x5c>)
1738: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
173a: 4a0a ldr r2, [pc, #40] ; (1764 <serial_end+0x60>)
173c: 7013 strb r3, [r2, #0]
if (rts_pin) rts_deassert();
173e: 4b0a ldr r3, [pc, #40] ; (1768 <serial_end+0x64>)
1740: 681b ldr r3, [r3, #0]
1742: b10b cbz r3, 1748 <serial_end+0x44>
1744: 2201 movs r2, #1
1746: 701a strb r2, [r3, #0]
1748: bd08 pop {r3, pc}
174a: bf00 nop
174c: 40048034 .word 0x40048034
1750: 1fffe774 .word 0x1fffe774
1754: e000e180 .word 0xe000e180
1758: 4006a000 .word 0x4006a000
175c: 4004a040 .word 0x4004a040
1760: 1fffe7f7 .word 0x1fffe7f7
1764: 1fffe775 .word 0x1fffe775
1768: 1fffe770 .word 0x1fffe770
0000176c <serial_set_transmit_pin>:
}
void serial_set_transmit_pin(uint8_t pin)
{
176c: b538 push {r3, r4, r5, lr}
176e: 4604 mov r4, r0
while (transmitting) ;
1770: 4b09 ldr r3, [pc, #36] ; (1798 <serial_set_transmit_pin+0x2c>)
1772: 781b ldrb r3, [r3, #0]
1774: f003 05ff and.w r5, r3, #255 ; 0xff
1778: 2b00 cmp r3, #0
177a: d1f9 bne.n 1770 <serial_set_transmit_pin+0x4>
pinMode(pin, OUTPUT);
177c: 4620 mov r0, r4
177e: 2101 movs r1, #1
1780: f7fe ffc2 bl 708 <pinMode>
digitalWrite(pin, LOW);
1784: 4620 mov r0, r4
1786: 4629 mov r1, r5
1788: f7fe ff9e bl 6c8 <digitalWrite>
transmit_pin = portOutputRegister(pin);
178c: 4b03 ldr r3, [pc, #12] ; (179c <serial_set_transmit_pin+0x30>)
178e: f853 2034 ldr.w r2, [r3, r4, lsl #3]
1792: 4b03 ldr r3, [pc, #12] ; (17a0 <serial_set_transmit_pin+0x34>)
1794: 601a str r2, [r3, #0]
1796: bd38 pop {r3, r4, r5, pc}
1798: 1fffe774 .word 0x1fffe774
179c: 00002a94 .word 0x00002a94
17a0: 1fffe7fc .word 0x1fffe7fc
000017a4 <serial_set_tx>:
transmit_mask = digitalPinToBitMask(pin);
#endif
}
void serial_set_tx(uint8_t pin, uint8_t opendrain)
{
17a4: b510 push {r4, lr}
uint32_t cfg;
if (opendrain) pin |= 128;
17a6: b109 cbz r1, 17ac <serial_set_tx+0x8>
17a8: f040 0080 orr.w r0, r0, #128 ; 0x80
if (pin == tx_pin_num) return;
17ac: 4a14 ldr r2, [pc, #80] ; (1800 <serial_set_tx+0x5c>)
17ae: 7813 ldrb r3, [r2, #0]
17b0: 4298 cmp r0, r3
17b2: 4614 mov r4, r2
17b4: d022 beq.n 17fc <serial_set_tx+0x58>
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) {
17b6: 4a13 ldr r2, [pc, #76] ; (1804 <serial_set_tx+0x60>)
17b8: 6812 ldr r2, [r2, #0]
17ba: 0552 lsls r2, r2, #21
17bc: d51d bpl.n 17fa <serial_set_tx+0x56>
switch (tx_pin_num & 127) {
17be: f003 037f and.w r3, r3, #127 ; 0x7f
17c2: 2b01 cmp r3, #1
17c4: d004 beq.n 17d0 <serial_set_tx+0x2c>
17c6: 2b05 cmp r3, #5
17c8: d105 bne.n 17d6 <serial_set_tx+0x32>
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17
case 5: CORE_PIN5_CONFIG = 0; break; // PTD7
17ca: 2200 movs r2, #0
17cc: 4b0e ldr r3, [pc, #56] ; (1808 <serial_set_tx+0x64>)
17ce: e001 b.n 17d4 <serial_set_tx+0x30>
if (opendrain) pin |= 128;
if (pin == tx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) {
switch (tx_pin_num & 127) {
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17
17d0: 4b0e ldr r3, [pc, #56] ; (180c <serial_set_tx+0x68>)
17d2: 2200 movs r2, #0
case 5: CORE_PIN5_CONFIG = 0; break; // PTD7
17d4: 601a str r2, [r3, #0]
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 26: CORE_PIN26_CONFIG = 0; break; //PTA14
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
17d6: 2900 cmp r1, #0
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
17d8: f000 027f and.w r2, r0, #127 ; 0x7f
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 26: CORE_PIN26_CONFIG = 0; break; //PTA14
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
17dc: bf0c ite eq
17de: 2344 moveq r3, #68 ; 0x44
17e0: 2360 movne r3, #96 ; 0x60
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
17e2: 2a01 cmp r2, #1
17e4: d005 beq.n 17f2 <serial_set_tx+0x4e>
17e6: 2a05 cmp r2, #5
17e8: d107 bne.n 17fa <serial_set_tx+0x56>
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break;
case 5: CORE_PIN5_CONFIG = cfg | PORT_PCR_MUX(3); break;
17ea: f443 7340 orr.w r3, r3, #768 ; 0x300
17ee: 4a06 ldr r2, [pc, #24] ; (1808 <serial_set_tx+0x64>)
17f0: e002 b.n 17f8 <serial_set_tx+0x54>
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break;
17f2: 4a06 ldr r2, [pc, #24] ; (180c <serial_set_tx+0x68>)
17f4: f443 7340 orr.w r3, r3, #768 ; 0x300
case 5: CORE_PIN5_CONFIG = cfg | PORT_PCR_MUX(3); break;
17f8: 6013 str r3, [r2, #0]
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 26: CORE_PIN26_CONFIG = cfg | PORT_PCR_MUX(3); break;
#endif
}
}
tx_pin_num = pin;
17fa: 7020 strb r0, [r4, #0]
17fc: bd10 pop {r4, pc}
17fe: bf00 nop
1800: 1fffe566 .word 0x1fffe566
1804: 40048034 .word 0x40048034
1808: 4004c01c .word 0x4004c01c
180c: 4004a044 .word 0x4004a044
00001810 <serial_set_rx>:
}
void serial_set_rx(uint8_t pin)
{
if (pin == rx_pin_num) return;
1810: 4a0e ldr r2, [pc, #56] ; (184c <serial_set_rx+0x3c>)
1812: 7813 ldrb r3, [r2, #0]
1814: 4298 cmp r0, r3
1816: d018 beq.n 184a <serial_set_rx+0x3a>
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) {
1818: 490d ldr r1, [pc, #52] ; (1850 <serial_set_rx+0x40>)
181a: 6809 ldr r1, [r1, #0]
181c: 0549 lsls r1, r1, #21
181e: d513 bpl.n 1848 <serial_set_rx+0x38>
switch (rx_pin_num) {
1820: b12b cbz r3, 182e <serial_set_rx+0x1e>
1822: 2b15 cmp r3, #21
1824: d105 bne.n 1832 <serial_set_rx+0x22>
case 0: CORE_PIN0_CONFIG = 0; break; // PTB16
case 21: CORE_PIN21_CONFIG = 0; break; // PTD6
1826: 4b0b ldr r3, [pc, #44] ; (1854 <serial_set_rx+0x44>)
1828: 2100 movs r1, #0
182a: 6019 str r1, [r3, #0]
182c: e001 b.n 1832 <serial_set_rx+0x22>
void serial_set_rx(uint8_t pin)
{
if (pin == rx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) {
switch (rx_pin_num) {
case 0: CORE_PIN0_CONFIG = 0; break; // PTB16
182e: 490a ldr r1, [pc, #40] ; (1858 <serial_set_rx+0x48>)
1830: 600b str r3, [r1, #0]
#endif
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 27: CORE_PIN27_CONFIG = 0; break; // PTA15
#endif
}
switch (pin) {
1832: b128 cbz r0, 1840 <serial_set_rx+0x30>
1834: 2815 cmp r0, #21
1836: d107 bne.n 1848 <serial_set_rx+0x38>
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1838: f240 3113 movw r1, #787 ; 0x313
183c: 4b05 ldr r3, [pc, #20] ; (1854 <serial_set_rx+0x44>)
183e: e002 b.n 1846 <serial_set_rx+0x36>
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 27: CORE_PIN27_CONFIG = 0; break; // PTA15
#endif
}
switch (pin) {
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1840: 4b05 ldr r3, [pc, #20] ; (1858 <serial_set_rx+0x48>)
1842: f240 3113 movw r1, #787 ; 0x313
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1846: 6019 str r1, [r3, #0]
#if defined(__MK64FX512__) || defined(__MK66FX1M0__)
case 27: CORE_PIN27_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#endif
}
}
rx_pin_num = pin;
1848: 7010 strb r0, [r2, #0]
184a: 4770 bx lr
184c: 1fffe7b6 .word 0x1fffe7b6
1850: 40048034 .word 0x40048034
1854: 4004c018 .word 0x4004c018
1858: 4004a040 .word 0x4004a040
0000185c <serial_set_rts>:
int serial_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0;
185c: 4a0d ldr r2, [pc, #52] ; (1894 <serial_set_rts+0x38>)
}
int serial_set_rts(uint8_t pin)
{
185e: b538 push {r3, r4, r5, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0;
1860: 6814 ldr r4, [r2, #0]
1862: f414 6280 ands.w r2, r4, #1024 ; 0x400
1866: f04f 0400 mov.w r4, #0
186a: d010 beq.n 188e <serial_set_rts+0x32>
if (pin < CORE_NUM_DIGITAL) {
186c: 2821 cmp r0, #33 ; 0x21
186e: 4d0a ldr r5, [pc, #40] ; (1898 <serial_set_rts+0x3c>)
1870: d80a bhi.n 1888 <serial_set_rts+0x2c>
rts_pin = portOutputRegister(pin);
1872: 4a0a ldr r2, [pc, #40] ; (189c <serial_set_rts+0x40>)
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
1874: 2101 movs r1, #1
int serial_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0;
if (pin < CORE_NUM_DIGITAL) {
rts_pin = portOutputRegister(pin);
1876: f852 3030 ldr.w r3, [r2, r0, lsl #3]
187a: 602b str r3, [r5, #0]
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
187c: f7fe ff44 bl 708 <pinMode>
rts_assert();
1880: 682b ldr r3, [r5, #0]
1882: 701c strb r4, [r3, #0]
UART0_MODEM &= ~UART_MODEM_RXRTSE;
return 0;
}
UART0_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
1884: 2001 movs r0, #1
1886: bd38 pop {r3, r4, r5, pc}
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
rts_assert();
} else {
rts_pin = NULL;
1888: 602c str r4, [r5, #0]
return 0;
188a: 4620 mov r0, r4
188c: bd38 pop {r3, r4, r5, pc}
int serial_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0;
188e: 4610 mov r0, r2
return 0;
}
UART0_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
}
1890: bd38 pop {r3, r4, r5, pc}
1892: bf00 nop
1894: 40048034 .word 0x40048034
1898: 1fffe770 .word 0x1fffe770
189c: 00002a94 .word 0x00002a94
000018a0 <serial_set_cts>:
int serial_set_cts(uint8_t pin)
{
#if defined(KINETISK)
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0;
18a0: 4b0e ldr r3, [pc, #56] ; (18dc <serial_set_cts+0x3c>)
18a2: 681b ldr r3, [r3, #0]
18a4: f413 6380 ands.w r3, r3, #1024 ; 0x400
18a8: d016 beq.n 18d8 <serial_set_cts+0x38>
if (pin == 18) {
18aa: 2812 cmp r0, #18
18ac: 4b0c ldr r3, [pc, #48] ; (18e0 <serial_set_cts+0x40>)
18ae: d103 bne.n 18b8 <serial_set_cts+0x18>
CORE_PIN18_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
18b0: f240 3102 movw r1, #770 ; 0x302
18b4: 4a0b ldr r2, [pc, #44] ; (18e4 <serial_set_cts+0x44>)
18b6: e004 b.n 18c2 <serial_set_cts+0x22>
} else if (pin == 20) {
18b8: 2814 cmp r0, #20
18ba: d109 bne.n 18d0 <serial_set_cts+0x30>
CORE_PIN20_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
18bc: 4a0a ldr r2, [pc, #40] ; (18e8 <serial_set_cts+0x48>)
18be: f240 3102 movw r1, #770 ; 0x302
18c2: 6011 str r1, [r2, #0]
} else {
UART0_MODEM &= ~UART_MODEM_TXCTSE;
return 0;
}
UART0_MODEM |= UART_MODEM_TXCTSE;
18c4: 7b5a ldrb r2, [r3, #13]
18c6: f042 0201 orr.w r2, r2, #1
18ca: 735a strb r2, [r3, #13]
return 1;
18cc: 2001 movs r0, #1
18ce: 4770 bx lr
if (pin == 18) {
CORE_PIN18_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
} else if (pin == 20) {
CORE_PIN20_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
} else {
UART0_MODEM &= ~UART_MODEM_TXCTSE;
18d0: 7b5a ldrb r2, [r3, #13]
18d2: f002 02fe and.w r2, r2, #254 ; 0xfe
18d6: 735a strb r2, [r3, #13]
return 0;
18d8: 2000 movs r0, #0
18da: 4770 bx lr
18dc: 40048034 .word 0x40048034
18e0: 4006a000 .word 0x4006a000
18e4: 4004a00c .word 0x4004a00c
18e8: 4004c014 .word 0x4004c014
000018ec <serial_putchar>:
return 0;
#endif
}
void serial_putchar(uint32_t c)
{
18ec: b5f8 push {r3, r4, r5, r6, r7, lr}
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
18ee: 4b1d ldr r3, [pc, #116] ; (1964 <serial_putchar+0x78>)
18f0: 681b ldr r3, [r3, #0]
18f2: 055a lsls r2, r3, #21
return 0;
#endif
}
void serial_putchar(uint32_t c)
{
18f4: 4606 mov r6, r0
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
18f6: d533 bpl.n 1960 <serial_putchar+0x74>
if (transmit_pin) transmit_assert();
18f8: 4b1b ldr r3, [pc, #108] ; (1968 <serial_putchar+0x7c>)
18fa: 681b ldr r3, [r3, #0]
18fc: b10b cbz r3, 1902 <serial_putchar+0x16>
18fe: 2201 movs r2, #1
1900: 701a strb r2, [r3, #0]
head = tx_buffer_head;
1902: 4b1a ldr r3, [pc, #104] ; (196c <serial_putchar+0x80>)
1904: 781c ldrb r4, [r3, #0]
if (++head >= TX_BUFFER_SIZE) head = 0;
1906: 3401 adds r4, #1
1908: 2c40 cmp r4, #64 ; 0x40
190a: 461f mov r7, r3
190c: bf28 it cs
190e: 2400 movcs r4, #0
while (tx_buffer_tail == head) {
1910: 4d17 ldr r5, [pc, #92] ; (1970 <serial_putchar+0x84>)
1912: 782b ldrb r3, [r5, #0]
1914: 42a3 cmp r3, r4
1916: d118 bne.n 194a <serial_putchar+0x5e>
int priority = nvic_execution_priority();
1918: f7ff fe2a bl 1570 <nvic_execution_priority>
if (priority <= IRQ_PRIORITY) {
191c: 2840 cmp r0, #64 ; 0x40
191e: dc0f bgt.n 1940 <serial_putchar+0x54>
if ((UART0_S1 & UART_S1_TDRE)) {
1920: 4a14 ldr r2, [pc, #80] ; (1974 <serial_putchar+0x88>)
1922: 7913 ldrb r3, [r2, #4]
1924: 061b lsls r3, r3, #24
1926: d5f3 bpl.n 1910 <serial_putchar+0x24>
uint32_t tail = tx_buffer_tail;
1928: 782b ldrb r3, [r5, #0]
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
192a: 4913 ldr r1, [pc, #76] ; (1978 <serial_putchar+0x8c>)
while (tx_buffer_tail == head) {
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART0_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
192c: 3301 adds r3, #1
192e: 2b40 cmp r3, #64 ; 0x40
1930: bf28 it cs
1932: 2300 movcs r3, #0
n = tx_buffer[tail];
1934: 5cc9 ldrb r1, [r1, r3]
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2);
UART0_D = n;
tx_buffer_tail = tail;
1936: b2db uxtb r3, r3
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART0_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
1938: b2c9 uxtb r1, r1
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2);
UART0_D = n;
193a: 71d1 strb r1, [r2, #7]
tx_buffer_tail = tail;
193c: 702b strb r3, [r5, #0]
193e: e7e7 b.n 1910 <serial_putchar+0x24>
}
} else if (priority >= 256) {
1940: 28ff cmp r0, #255 ; 0xff
1942: dde5 ble.n 1910 <serial_putchar+0x24>
yield();
1944: f7ff fd7c bl 1440 <yield>
1948: e7e2 b.n 1910 <serial_putchar+0x24>
}
}
tx_buffer[head] = c;
194a: 4b0b ldr r3, [pc, #44] ; (1978 <serial_putchar+0x8c>)
194c: b2f6 uxtb r6, r6
194e: 551e strb r6, [r3, r4]
transmitting = 1;
1950: 4b0a ldr r3, [pc, #40] ; (197c <serial_putchar+0x90>)
1952: 2201 movs r2, #1
1954: 701a strb r2, [r3, #0]
tx_buffer_head = head;
UART0_C2 = C2_TX_ACTIVE;
1956: 4b07 ldr r3, [pc, #28] ; (1974 <serial_putchar+0x88>)
yield();
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
1958: b2e4 uxtb r4, r4
UART0_C2 = C2_TX_ACTIVE;
195a: 22bc movs r2, #188 ; 0xbc
yield();
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
195c: 703c strb r4, [r7, #0]
UART0_C2 = C2_TX_ACTIVE;
195e: 70da strb r2, [r3, #3]
1960: bdf8 pop {r3, r4, r5, r6, r7, pc}
1962: bf00 nop
1964: 40048034 .word 0x40048034
1968: 1fffe7fc .word 0x1fffe7fc
196c: 1fffe800 .word 0x1fffe800
1970: 1fffe7f8 .word 0x1fffe7f8
1974: 4006a000 .word 0x4006a000
1978: 1fffe776 .word 0x1fffe776
197c: 1fffe774 .word 0x1fffe774
00001980 <serial_write>:
{
const uint8_t *p = (const uint8_t *)buf;
const uint8_t *end = p + count;
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
1980: 4b27 ldr r3, [pc, #156] ; (1a20 <serial_write+0xa0>)
1982: 681b ldr r3, [r3, #0]
1984: 055a lsls r2, r3, #21
UART0_C2 = C2_TX_ACTIVE;
}
#ifdef HAS_KINETISK_UART0_FIFO
void serial_write(const void *buf, unsigned int count)
{
1986: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr}
198a: 4607 mov r7, r0
198c: 468a mov sl, r1
const uint8_t *p = (const uint8_t *)buf;
const uint8_t *end = p + count;
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
198e: d544 bpl.n 1a1a <serial_write+0x9a>
if (transmit_pin) transmit_assert();
1990: 4b24 ldr r3, [pc, #144] ; (1a24 <serial_write+0xa4>)
1992: 681b ldr r3, [r3, #0]
1994: b10b cbz r3, 199a <serial_write+0x1a>
1996: 2201 movs r2, #1
1998: 701a strb r2, [r3, #0]
do {
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART0_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
199a: 463d mov r5, r7
#ifdef HAS_KINETISK_UART0_FIFO
void serial_write(const void *buf, unsigned int count)
{
const uint8_t *p = (const uint8_t *)buf;
const uint8_t *end = p + count;
199c: eb07 030a add.w r3, r7, sl
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
if (transmit_pin) transmit_assert();
while (p < end) {
19a0: 429d cmp r5, r3
19a2: d237 bcs.n 1a14 <serial_write+0x94>
head = tx_buffer_head;
19a4: f8df 8090 ldr.w r8, [pc, #144] ; 1a38 <serial_write+0xb8>
if (++head >= TX_BUFFER_SIZE) head = 0;
if (tx_buffer_tail == head) {
19a8: 4e1f ldr r6, [pc, #124] ; (1a28 <serial_write+0xa8>)
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
if (transmit_pin) transmit_assert();
while (p < end) {
head = tx_buffer_head;
19aa: f898 4000 ldrb.w r4, [r8]
if (++head >= TX_BUFFER_SIZE) head = 0;
if (tx_buffer_tail == head) {
19ae: f896 9000 ldrb.w r9, [r6]
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
if (transmit_pin) transmit_assert();
while (p < end) {
head = tx_buffer_head;
if (++head >= TX_BUFFER_SIZE) head = 0;
19b2: 3401 adds r4, #1
19b4: 2c40 cmp r4, #64 ; 0x40
19b6: bf28 it cs
19b8: 2400 movcs r4, #0
if (tx_buffer_tail == head) {
19ba: fa5f f989 uxtb.w r9, r9
19be: 45a1 cmp r9, r4
19c0: d11d bne.n 19fe <serial_write+0x7e>
UART0_C2 = C2_TX_ACTIVE;
19c2: 4b1a ldr r3, [pc, #104] ; (1a2c <serial_write+0xac>)
19c4: 22bc movs r2, #188 ; 0xbc
19c6: 70da strb r2, [r3, #3]
do {
int priority = nvic_execution_priority();
19c8: f7ff fdd2 bl 1570 <nvic_execution_priority>
if (priority <= IRQ_PRIORITY) {
19cc: 2840 cmp r0, #64 ; 0x40
19ce: dc0f bgt.n 19f0 <serial_write+0x70>
if ((UART0_S1 & UART_S1_TDRE)) {
19d0: 4a16 ldr r2, [pc, #88] ; (1a2c <serial_write+0xac>)
19d2: 7913 ldrb r3, [r2, #4]
19d4: 061b lsls r3, r3, #24
19d6: d50f bpl.n 19f8 <serial_write+0x78>
uint32_t tail = tx_buffer_tail;
19d8: 7833 ldrb r3, [r6, #0]
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
19da: 4915 ldr r1, [pc, #84] ; (1a30 <serial_write+0xb0>)
do {
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART0_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
19dc: 3301 adds r3, #1
19de: 2b40 cmp r3, #64 ; 0x40
19e0: bf28 it cs
19e2: 2300 movcs r3, #0
n = tx_buffer[tail];
19e4: 5cc9 ldrb r1, [r1, r3]
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2);
UART0_D = n;
tx_buffer_tail = tail;
19e6: b2db uxtb r3, r3
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART0_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
19e8: b2c9 uxtb r1, r1
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2);
UART0_D = n;
19ea: 71d1 strb r1, [r2, #7]
tx_buffer_tail = tail;
19ec: 7033 strb r3, [r6, #0]
19ee: e003 b.n 19f8 <serial_write+0x78>
}
} else if (priority >= 256) {
19f0: 28ff cmp r0, #255 ; 0xff
19f2: dd01 ble.n 19f8 <serial_write+0x78>
yield();
19f4: f7ff fd24 bl 1440 <yield>
}
} while (tx_buffer_tail == head);
19f8: 7833 ldrb r3, [r6, #0]
19fa: 454b cmp r3, r9
19fc: d0e4 beq.n 19c8 <serial_write+0x48>
}
tx_buffer[head] = *p++;
19fe: 4b0c ldr r3, [pc, #48] ; (1a30 <serial_write+0xb0>)
1a00: f815 2b01 ldrb.w r2, [r5], #1
1a04: 551a strb r2, [r3, r4]
transmitting = 1;
1a06: 4b0b ldr r3, [pc, #44] ; (1a34 <serial_write+0xb4>)
1a08: 2201 movs r2, #1
tx_buffer_head = head;
1a0a: b2e4 uxtb r4, r4
yield();
}
} while (tx_buffer_tail == head);
}
tx_buffer[head] = *p++;
transmitting = 1;
1a0c: 701a strb r2, [r3, #0]
tx_buffer_head = head;
1a0e: f888 4000 strb.w r4, [r8]
1a12: e7c3 b.n 199c <serial_write+0x1c>
}
UART0_C2 = C2_TX_ACTIVE;
1a14: 4b05 ldr r3, [pc, #20] ; (1a2c <serial_write+0xac>)
1a16: 22bc movs r2, #188 ; 0xbc
1a18: 70da strb r2, [r3, #3]
1a1a: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc}
1a1e: bf00 nop
1a20: 40048034 .word 0x40048034
1a24: 1fffe7fc .word 0x1fffe7fc
1a28: 1fffe7f8 .word 0x1fffe7f8
1a2c: 4006a000 .word 0x4006a000
1a30: 1fffe776 .word 0x1fffe776
1a34: 1fffe774 .word 0x1fffe774
1a38: 1fffe800 .word 0x1fffe800
00001a3c <serial_flush>:
while (count-- > 0) serial_putchar(*p++);
}
#endif
void serial_flush(void)
{
1a3c: b508 push {r3, lr}
while (transmitting) yield(); // wait
1a3e: 4b03 ldr r3, [pc, #12] ; (1a4c <serial_flush+0x10>)
1a40: 781b ldrb r3, [r3, #0]
1a42: b113 cbz r3, 1a4a <serial_flush+0xe>
1a44: f7ff fcfc bl 1440 <yield>
1a48: e7f9 b.n 1a3e <serial_flush+0x2>
}
1a4a: bd08 pop {r3, pc}
1a4c: 1fffe774 .word 0x1fffe774
00001a50 <serial_write_buffer_free>:
int serial_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
tail = tx_buffer_tail;
1a50: 4a06 ldr r2, [pc, #24] ; (1a6c <serial_write_buffer_free+0x1c>)
int serial_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
1a52: 4b07 ldr r3, [pc, #28] ; (1a70 <serial_write_buffer_free+0x20>)
1a54: 781b ldrb r3, [r3, #0]
tail = tx_buffer_tail;
1a56: 7810 ldrb r0, [r2, #0]
int serial_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
1a58: b2db uxtb r3, r3
tail = tx_buffer_tail;
1a5a: b2c0 uxtb r0, r0
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
1a5c: 4283 cmp r3, r0
1a5e: bf2c ite cs
1a60: 303f addcs r0, #63 ; 0x3f
return tail - head - 1;
1a62: f100 30ff addcc.w r0, r0, #4294967295 ; 0xffffffff
1a66: 1ac0 subs r0, r0, r3
}
1a68: 4770 bx lr
1a6a: bf00 nop
1a6c: 1fffe7f8 .word 0x1fffe7f8
1a70: 1fffe800 .word 0x1fffe800
00001a74 <serial_available>:
int serial_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
1a74: 4b05 ldr r3, [pc, #20] ; (1a8c <serial_available+0x18>)
1a76: 7818 ldrb r0, [r3, #0]
tail = rx_buffer_tail;
1a78: 4b05 ldr r3, [pc, #20] ; (1a90 <serial_available+0x1c>)
1a7a: 781b ldrb r3, [r3, #0]
int serial_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
1a7c: b2c0 uxtb r0, r0
tail = rx_buffer_tail;
1a7e: b2db uxtb r3, r3
if (head >= tail) return head - tail;
1a80: 4298 cmp r0, r3
return RX_BUFFER_SIZE + head - tail;
1a82: bf38 it cc
1a84: 3040 addcc r0, #64 ; 0x40
1a86: 1ac0 subs r0, r0, r3
}
1a88: 4770 bx lr
1a8a: bf00 nop
1a8c: 1fffe7f7 .word 0x1fffe7f7
1a90: 1fffe775 .word 0x1fffe775
00001a94 <serial_getchar>:
int serial_getchar(void)
{
1a94: b510 push {r4, lr}
uint32_t head, tail;
int c;
head = rx_buffer_head;
1a96: 4b10 ldr r3, [pc, #64] ; (1ad8 <serial_getchar+0x44>)
tail = rx_buffer_tail;
1a98: 4910 ldr r1, [pc, #64] ; (1adc <serial_getchar+0x48>)
int serial_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
1a9a: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
1a9c: 780b ldrb r3, [r1, #0]
int serial_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
1a9e: b2d2 uxtb r2, r2
tail = rx_buffer_tail;
1aa0: b2db uxtb r3, r3
if (head == tail) return -1;
1aa2: 429a cmp r2, r3
1aa4: d014 beq.n 1ad0 <serial_getchar+0x3c>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
1aa6: 3301 adds r3, #1
1aa8: 2b40 cmp r3, #64 ; 0x40
1aaa: bf28 it cs
1aac: 2300 movcs r3, #0
c = rx_buffer[tail];
1aae: 480c ldr r0, [pc, #48] ; (1ae0 <serial_getchar+0x4c>)
rx_buffer_tail = tail;
1ab0: b2dc uxtb r4, r3
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
1ab2: 5cc0 ldrb r0, [r0, r3]
rx_buffer_tail = tail;
1ab4: 700c strb r4, [r1, #0]
if (rts_pin) {
1ab6: 490b ldr r1, [pc, #44] ; (1ae4 <serial_getchar+0x50>)
1ab8: 6809 ldr r1, [r1, #0]
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
1aba: b2c0 uxtb r0, r0
rx_buffer_tail = tail;
if (rts_pin) {
1abc: b151 cbz r1, 1ad4 <serial_getchar+0x40>
int avail;
if (head >= tail) avail = head - tail;
1abe: 429a cmp r2, r3
else avail = RX_BUFFER_SIZE + head - tail;
1ac0: bf38 it cc
1ac2: 3240 addcc r2, #64 ; 0x40
1ac4: 1ad3 subs r3, r2, r3
if (avail <= RTS_LOW_WATERMARK) rts_assert();
1ac6: 2b1a cmp r3, #26
1ac8: dc04 bgt.n 1ad4 <serial_getchar+0x40>
1aca: 2300 movs r3, #0
1acc: 700b strb r3, [r1, #0]
1ace: bd10 pop {r4, pc}
uint32_t head, tail;
int c;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
1ad0: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (head >= tail) avail = head - tail;
else avail = RX_BUFFER_SIZE + head - tail;
if (avail <= RTS_LOW_WATERMARK) rts_assert();
}
return c;
}
1ad4: bd10 pop {r4, pc}
1ad6: bf00 nop
1ad8: 1fffe7f7 .word 0x1fffe7f7
1adc: 1fffe775 .word 0x1fffe775
1ae0: 1fffe7b7 .word 0x1fffe7b7
1ae4: 1fffe770 .word 0x1fffe770
00001ae8 <serial_peek>:
int serial_peek(void)
{
uint32_t head, tail;
head = rx_buffer_head;
1ae8: 4b08 ldr r3, [pc, #32] ; (1b0c <serial_peek+0x24>)
1aea: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
1aec: 4b08 ldr r3, [pc, #32] ; (1b10 <serial_peek+0x28>)
1aee: 781b ldrb r3, [r3, #0]
1af0: b2db uxtb r3, r3
if (head == tail) return -1;
1af2: 429a cmp r2, r3
1af4: d007 beq.n 1b06 <serial_peek+0x1e>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
1af6: 3301 adds r3, #1
1af8: 2b40 cmp r3, #64 ; 0x40
1afa: bf28 it cs
1afc: 2300 movcs r3, #0
return rx_buffer[tail];
1afe: 4a05 ldr r2, [pc, #20] ; (1b14 <serial_peek+0x2c>)
1b00: 5cd0 ldrb r0, [r2, r3]
1b02: b2c0 uxtb r0, r0
1b04: 4770 bx lr
{
uint32_t head, tail;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
1b06: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (++tail >= RX_BUFFER_SIZE) tail = 0;
return rx_buffer[tail];
}
1b0a: 4770 bx lr
1b0c: 1fffe7f7 .word 0x1fffe7f7
1b10: 1fffe775 .word 0x1fffe775
1b14: 1fffe7b7 .word 0x1fffe7b7
00001b18 <serial_clear>:
void serial_clear(void)
{
#ifdef HAS_KINETISK_UART0_FIFO
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return;
1b18: 4b0c ldr r3, [pc, #48] ; (1b4c <serial_clear+0x34>)
1b1a: 681b ldr r3, [r3, #0]
1b1c: 055b lsls r3, r3, #21
1b1e: d514 bpl.n 1b4a <serial_clear+0x32>
UART0_C2 &= ~(UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
1b20: 4b0b ldr r3, [pc, #44] ; (1b50 <serial_clear+0x38>)
1b22: 78da ldrb r2, [r3, #3]
1b24: f002 02cb and.w r2, r2, #203 ; 0xcb
1b28: 70da strb r2, [r3, #3]
UART0_CFIFO = UART_CFIFO_RXFLUSH;
1b2a: 2240 movs r2, #64 ; 0x40
1b2c: 745a strb r2, [r3, #17]
UART0_C2 |= (UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
1b2e: 78da ldrb r2, [r3, #3]
1b30: f042 0234 orr.w r2, r2, #52 ; 0x34
1b34: 70da strb r2, [r3, #3]
#endif
rx_buffer_head = rx_buffer_tail;
1b36: 4b07 ldr r3, [pc, #28] ; (1b54 <serial_clear+0x3c>)
1b38: 781a ldrb r2, [r3, #0]
1b3a: 4b07 ldr r3, [pc, #28] ; (1b58 <serial_clear+0x40>)
1b3c: b2d2 uxtb r2, r2
1b3e: 701a strb r2, [r3, #0]
if (rts_pin) rts_assert();
1b40: 4b06 ldr r3, [pc, #24] ; (1b5c <serial_clear+0x44>)
1b42: 681b ldr r3, [r3, #0]
1b44: b10b cbz r3, 1b4a <serial_clear+0x32>
1b46: 2200 movs r2, #0
1b48: 701a strb r2, [r3, #0]
1b4a: 4770 bx lr
1b4c: 40048034 .word 0x40048034
1b50: 4006a000 .word 0x4006a000
1b54: 1fffe775 .word 0x1fffe775
1b58: 1fffe7f7 .word 0x1fffe7f7
1b5c: 1fffe770 .word 0x1fffe770
00001b60 <uart0_status_isr>:
// Receive data above watermark UART_S1_RDRF
// LIN break detect UART_S2_LBKDIF
// RxD pin active edge UART_S2_RXEDGIF
void uart0_status_isr(void)
{
1b60: b530 push {r4, r5, lr}
uint8_t c;
#ifdef HAS_KINETISK_UART0_FIFO
uint32_t newhead;
uint8_t avail;
if (UART0_S1 & (UART_S1_RDRF | UART_S1_IDLE)) {
1b62: 4b37 ldr r3, [pc, #220] ; (1c40 <uart0_status_isr+0xe0>)
1b64: 791a ldrb r2, [r3, #4]
1b66: f012 0f30 tst.w r2, #48 ; 0x30
1b6a: d031 beq.n 1bd0 <uart0_status_isr+0x70>
__disable_irq();
1b6c: b672 cpsid i
avail = UART0_RCFIFO;
1b6e: 7d9a ldrb r2, [r3, #22]
if (avail == 0) {
1b70: f002 00ff and.w r0, r2, #255 ; 0xff
1b74: b922 cbnz r2, 1b80 <uart0_status_isr+0x20>
// to read the data register. But reading with no
// data causes a FIFO underrun, which causes the
// FIFO to return corrupted data. If anyone from
// Freescale reads this, what a poor design! There
// write should be a write-1-to-clear for IDLE.
c = UART0_D;
1b76: 79da ldrb r2, [r3, #7]
// the chance, interrupts are disabled so a higher
// priority interrupt (hopefully) doesn't delay.
// TODO: change this to disabling the IDLE interrupt
// which won't be simple, since we already manage
// which transmit interrupts are enabled.
UART0_CFIFO = UART_CFIFO_RXFLUSH;
1b78: 2240 movs r2, #64 ; 0x40
1b7a: 745a strb r2, [r3, #17]
__enable_irq();
1b7c: b662 cpsie i
1b7e: e027 b.n 1bd0 <uart0_status_isr+0x70>
} else {
__enable_irq();
1b80: b662 cpsie i
head = rx_buffer_head;
1b82: 4a30 ldr r2, [pc, #192] ; (1c44 <uart0_status_isr+0xe4>)
tail = rx_buffer_tail;
1b84: 4930 ldr r1, [pc, #192] ; (1c48 <uart0_status_isr+0xe8>)
// which transmit interrupts are enabled.
UART0_CFIFO = UART_CFIFO_RXFLUSH;
__enable_irq();
} else {
__enable_irq();
head = rx_buffer_head;
1b86: 7813 ldrb r3, [r2, #0]
tail = rx_buffer_tail;
1b88: 7809 ldrb r1, [r1, #0]
// which transmit interrupts are enabled.
UART0_CFIFO = UART_CFIFO_RXFLUSH;
__enable_irq();
} else {
__enable_irq();
head = rx_buffer_head;
1b8a: b2db uxtb r3, r3
tail = rx_buffer_tail;
1b8c: b2c9 uxtb r1, r1
1b8e: 4614 mov r4, r2
do {
if (use9Bits && (UART0_C3 & 0x80)) {
n = UART0_D | 0x100;
} else {
n = UART0_D;
1b90: 4a2b ldr r2, [pc, #172] ; (1c40 <uart0_status_isr+0xe0>)
1b92: 79d5 ldrb r5, [r2, #7]
}
newhead = head + 1;
1b94: 1c5a adds r2, r3, #1
if (newhead >= RX_BUFFER_SIZE) newhead = 0;
1b96: 2a40 cmp r2, #64 ; 0x40
1b98: bf28 it cs
1b9a: 2200 movcs r2, #0
if (newhead != tail) {
1b9c: 428a cmp r2, r1
tail = rx_buffer_tail;
do {
if (use9Bits && (UART0_C3 & 0x80)) {
n = UART0_D | 0x100;
} else {
n = UART0_D;
1b9e: b2ed uxtb r5, r5
}
newhead = head + 1;
if (newhead >= RX_BUFFER_SIZE) newhead = 0;
if (newhead != tail) {
1ba0: d002 beq.n 1ba8 <uart0_status_isr+0x48>
head = newhead;
rx_buffer[head] = n;
1ba2: 4b2a ldr r3, [pc, #168] ; (1c4c <uart0_status_isr+0xec>)
1ba4: 549d strb r5, [r3, r2]
1ba6: 4613 mov r3, r2
}
} while (--avail > 0);
1ba8: 1e42 subs r2, r0, #1
1baa: f012 00ff ands.w r0, r2, #255 ; 0xff
1bae: d1ef bne.n 1b90 <uart0_status_isr+0x30>
rx_buffer_head = head;
1bb0: b2da uxtb r2, r3
1bb2: 7022 strb r2, [r4, #0]
if (rts_pin) {
1bb4: 4a26 ldr r2, [pc, #152] ; (1c50 <uart0_status_isr+0xf0>)
1bb6: 6812 ldr r2, [r2, #0]
1bb8: b152 cbz r2, 1bd0 <uart0_status_isr+0x70>
int avail;
if (head >= tail) avail = head - tail;
1bba: 428b cmp r3, r1
else avail = RX_BUFFER_SIZE + head - tail;
1bbc: bf36 itet cc
1bbe: f1c1 0140 rsbcc r1, r1, #64 ; 0x40
}
} while (--avail > 0);
rx_buffer_head = head;
if (rts_pin) {
int avail;
if (head >= tail) avail = head - tail;
1bc2: ebc1 0303 rsbcs r3, r1, r3
else avail = RX_BUFFER_SIZE + head - tail;
1bc6: 185b addcc r3, r3, r1
if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
1bc8: 2b27 cmp r3, #39 ; 0x27
1bca: bfc4 itt gt
1bcc: 2301 movgt r3, #1
1bce: 7013 strbgt r3, [r2, #0]
}
}
}
c = UART0_C2;
1bd0: 4b1b ldr r3, [pc, #108] ; (1c40 <uart0_status_isr+0xe0>)
1bd2: 78d9 ldrb r1, [r3, #3]
1bd4: b2c9 uxtb r1, r1
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) {
1bd6: 060c lsls r4, r1, #24
1bd8: d520 bpl.n 1c1c <uart0_status_isr+0xbc>
1bda: 791b ldrb r3, [r3, #4]
1bdc: 0618 lsls r0, r3, #24
1bde: d51d bpl.n 1c1c <uart0_status_isr+0xbc>
head = tx_buffer_head;
1be0: 4b1c ldr r3, [pc, #112] ; (1c54 <uart0_status_isr+0xf4>)
tail = tx_buffer_tail;
1be2: 4a1d ldr r2, [pc, #116] ; (1c58 <uart0_status_isr+0xf8>)
}
}
}
c = UART0_C2;
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
1be4: 781d ldrb r5, [r3, #0]
tail = tx_buffer_tail;
1be6: 7813 ldrb r3, [r2, #0]
}
}
}
c = UART0_C2;
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
1be8: b2ed uxtb r5, r5
tail = tx_buffer_tail;
1bea: b2db uxtb r3, r3
1bec: 4610 mov r0, r2
do {
if (tail == head) break;
1bee: 42ab cmp r3, r5
1bf0: d00c beq.n 1c0c <uart0_status_isr+0xac>
if (++tail >= TX_BUFFER_SIZE) tail = 0;
avail = UART0_S1;
1bf2: 4a13 ldr r2, [pc, #76] ; (1c40 <uart0_status_isr+0xe0>)
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
tail = tx_buffer_tail;
do {
if (tail == head) break;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
1bf4: 3301 adds r3, #1
1bf6: 2b40 cmp r3, #64 ; 0x40
avail = UART0_S1;
1bf8: 7914 ldrb r4, [r2, #4]
n = tx_buffer[tail];
1bfa: 4c18 ldr r4, [pc, #96] ; (1c5c <uart0_status_isr+0xfc>)
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
tail = tx_buffer_tail;
do {
if (tail == head) break;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
1bfc: bf28 it cs
1bfe: 2300 movcs r3, #0
avail = UART0_S1;
n = tx_buffer[tail];
1c00: 5ce4 ldrb r4, [r4, r3]
1c02: b2e4 uxtb r4, r4
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2);
UART0_D = n;
1c04: 71d4 strb r4, [r2, #7]
} while (UART0_TCFIFO < 8);
1c06: 7d12 ldrb r2, [r2, #20]
1c08: 2a07 cmp r2, #7
1c0a: d9f0 bls.n 1bee <uart0_status_isr+0x8e>
tx_buffer_tail = tail;
1c0c: b2db uxtb r3, r3
1c0e: 7003 strb r3, [r0, #0]
if (UART0_S1 & UART_S1_TDRE) UART0_C2 = C2_TX_COMPLETING;
1c10: 4b0b ldr r3, [pc, #44] ; (1c40 <uart0_status_isr+0xe0>)
1c12: 791a ldrb r2, [r3, #4]
1c14: 0612 lsls r2, r2, #24
1c16: bf44 itt mi
1c18: 227c movmi r2, #124 ; 0x7c
1c1a: 70da strbmi r2, [r3, #3]
UART0_D = n;
tx_buffer_tail = tail;
}
}
#endif
if ((c & UART_C2_TCIE) && (UART0_S1 & UART_S1_TC)) {
1c1c: 064b lsls r3, r1, #25
1c1e: d50e bpl.n 1c3e <uart0_status_isr+0xde>
1c20: 4b07 ldr r3, [pc, #28] ; (1c40 <uart0_status_isr+0xe0>)
1c22: 791a ldrb r2, [r3, #4]
1c24: f012 0f40 tst.w r2, #64 ; 0x40
1c28: 4619 mov r1, r3
1c2a: d008 beq.n 1c3e <uart0_status_isr+0xde>
transmitting = 0;
1c2c: 4b0c ldr r3, [pc, #48] ; (1c60 <uart0_status_isr+0x100>)
1c2e: 2200 movs r2, #0
1c30: 701a strb r2, [r3, #0]
if (transmit_pin) transmit_deassert();
1c32: 4b0c ldr r3, [pc, #48] ; (1c64 <uart0_status_isr+0x104>)
1c34: 681b ldr r3, [r3, #0]
1c36: b103 cbz r3, 1c3a <uart0_status_isr+0xda>
1c38: 701a strb r2, [r3, #0]
UART0_C2 = C2_TX_INACTIVE;
1c3a: 233c movs r3, #60 ; 0x3c
1c3c: 70cb strb r3, [r1, #3]
1c3e: bd30 pop {r4, r5, pc}
1c40: 4006a000 .word 0x4006a000
1c44: 1fffe7f7 .word 0x1fffe7f7
1c48: 1fffe775 .word 0x1fffe775
1c4c: 1fffe7b7 .word 0x1fffe7b7
1c50: 1fffe770 .word 0x1fffe770
1c54: 1fffe800 .word 0x1fffe800
1c58: 1fffe7f8 .word 0x1fffe7f8
1c5c: 1fffe776 .word 0x1fffe776
1c60: 1fffe774 .word 0x1fffe774
1c64: 1fffe7fc .word 0x1fffe7fc
00001c68 <serial2_begin>:
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
#define C2_TX_INACTIVE C2_ENABLE
void serial2_begin(uint32_t divisor)
{
SIM_SCGC4 |= SIM_SCGC4_UART1; // turn on clock, TODO: use bitband
1c68: 4b21 ldr r3, [pc, #132] ; (1cf0 <serial2_begin+0x88>)
1c6a: 681a ldr r2, [r3, #0]
1c6c: f442 6200 orr.w r2, r2, #2048 ; 0x800
1c70: 601a str r2, [r3, #0]
rx_buffer_head = 0;
1c72: 4a20 ldr r2, [pc, #128] ; (1cf4 <serial2_begin+0x8c>)
1c74: 2300 movs r3, #0
1c76: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
1c78: 4a1f ldr r2, [pc, #124] ; (1cf8 <serial2_begin+0x90>)
1c7a: 7013 strb r3, [r2, #0]
tx_buffer_head = 0;
1c7c: 4a1f ldr r2, [pc, #124] ; (1cfc <serial2_begin+0x94>)
1c7e: 7013 strb r3, [r2, #0]
tx_buffer_tail = 0;
1c80: 4a1f ldr r2, [pc, #124] ; (1d00 <serial2_begin+0x98>)
1c82: 7013 strb r3, [r2, #0]
transmitting = 0;
1c84: 4a1f ldr r2, [pc, #124] ; (1d04 <serial2_begin+0x9c>)
1c86: 7013 strb r3, [r2, #0]
#if defined(KINETISK)
switch (rx_pin_num) {
1c88: 4b1f ldr r3, [pc, #124] ; (1d08 <serial2_begin+0xa0>)
1c8a: 781b ldrb r3, [r3, #0]
1c8c: 2b09 cmp r3, #9
1c8e: d005 beq.n 1c9c <serial2_begin+0x34>
1c90: 2b1a cmp r3, #26
1c92: d107 bne.n 1ca4 <serial2_begin+0x3c>
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1c94: f240 3213 movw r2, #787 ; 0x313
1c98: 4b1c ldr r3, [pc, #112] ; (1d0c <serial2_begin+0xa4>)
1c9a: e002 b.n 1ca2 <serial2_begin+0x3a>
tx_buffer_head = 0;
tx_buffer_tail = 0;
transmitting = 0;
#if defined(KINETISK)
switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1c9c: 4b1c ldr r3, [pc, #112] ; (1d10 <serial2_begin+0xa8>)
1c9e: f240 3213 movw r2, #787 ; 0x313
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1ca2: 601a str r2, [r3, #0]
}
switch (tx_pin_num) {
1ca4: 4b1b ldr r3, [pc, #108] ; (1d14 <serial2_begin+0xac>)
1ca6: 781b ldrb r3, [r3, #0]
1ca8: 2b0a cmp r3, #10
1caa: d005 beq.n 1cb8 <serial2_begin+0x50>
1cac: 2b1f cmp r3, #31
1cae: d107 bne.n 1cc0 <serial2_begin+0x58>
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
1cb0: f44f 7251 mov.w r2, #836 ; 0x344
1cb4: 4b18 ldr r3, [pc, #96] ; (1d18 <serial2_begin+0xb0>)
1cb6: e002 b.n 1cbe <serial2_begin+0x56>
switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
}
switch (tx_pin_num) {
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
1cb8: 4b18 ldr r3, [pc, #96] ; (1d1c <serial2_begin+0xb4>)
1cba: f44f 7251 mov.w r2, #836 ; 0x344
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
1cbe: 601a str r2, [r3, #0]
#elif defined(KINETISL)
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
#endif
#if defined(HAS_KINETISK_UART1)
UART1_BDH = (divisor >> 13) & 0x1F;
1cc0: 4b17 ldr r3, [pc, #92] ; (1d20 <serial2_begin+0xb8>)
1cc2: f3c0 3244 ubfx r2, r0, #13, #5
1cc6: 701a strb r2, [r3, #0]
UART1_BDL = (divisor >> 5) & 0xFF;
1cc8: f3c0 1247 ubfx r2, r0, #5, #8
1ccc: 705a strb r2, [r3, #1]
UART1_C4 = divisor & 0x1F;
1cce: f000 001f and.w r0, r0, #31
UART1_C1 = UART_C1_ILT;
UART1_TWFIFO = 2; // tx watermark, causes S1_TDRE to set
UART1_RWFIFO = 4; // rx watermark, causes S1_RDRF to set
UART1_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
#else
UART1_C1 = 0;
1cd2: 2200 movs r2, #0
CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
#endif
#if defined(HAS_KINETISK_UART1)
UART1_BDH = (divisor >> 13) & 0x1F;
UART1_BDL = (divisor >> 5) & 0xFF;
UART1_C4 = divisor & 0x1F;
1cd4: 7298 strb r0, [r3, #10]
UART1_C1 = UART_C1_ILT;
UART1_TWFIFO = 2; // tx watermark, causes S1_TDRE to set
UART1_RWFIFO = 4; // rx watermark, causes S1_RDRF to set
UART1_PFIFO = UART_PFIFO_TXFE | UART_PFIFO_RXFE;
#else
UART1_C1 = 0;
1cd6: 709a strb r2, [r3, #2]
UART1_PFIFO = 0;
1cd8: 741a strb r2, [r3, #16]
#elif defined(HAS_KINETISL_UART1)
UART1_BDH = (divisor >> 8) & 0x1F;
UART1_BDL = divisor & 0xFF;
UART1_C1 = 0;
#endif
UART1_C2 = C2_TX_INACTIVE;
1cda: 222c movs r2, #44 ; 0x2c
1cdc: 70da strb r2, [r3, #3]
NVIC_SET_PRIORITY(IRQ_UART1_STATUS, IRQ_PRIORITY);
1cde: 4b11 ldr r3, [pc, #68] ; (1d24 <serial2_begin+0xbc>)
1ce0: 2240 movs r2, #64 ; 0x40
1ce2: 701a strb r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_UART1_STATUS);
1ce4: f2a3 3312 subw r3, r3, #786 ; 0x312
1ce8: f44f 2280 mov.w r2, #262144 ; 0x40000
1cec: 601a str r2, [r3, #0]
1cee: 4770 bx lr
1cf0: 40048034 .word 0x40048034
1cf4: 1fffe872 .word 0x1fffe872
1cf8: 1fffe809 .word 0x1fffe809
1cfc: 1fffe878 .word 0x1fffe878
1d00: 1fffe873 .word 0x1fffe873
1d04: 1fffe808 .word 0x1fffe808
1d08: 1fffe567 .word 0x1fffe567
1d0c: 4004d004 .word 0x4004d004
1d10: 4004b00c .word 0x4004b00c
1d14: 1fffe568 .word 0x1fffe568
1d18: 4004d000 .word 0x4004d000
1d1c: 4004b010 .word 0x4004b010
1d20: 4006b000 .word 0x4006b000
1d24: e000e412 .word 0xe000e412
00001d28 <serial2_format>:
void serial2_format(uint32_t format)
{
uint8_t c;
c = UART1_C1;
1d28: 4a13 ldr r2, [pc, #76] ; (1d78 <serial2_format+0x50>)
1d2a: 7893 ldrb r3, [r2, #2]
c = (c & ~0x13) | (format & 0x03); // configure parity
1d2c: f000 0103 and.w r1, r0, #3
1d30: f003 03ec and.w r3, r3, #236 ; 0xec
1d34: 430b orrs r3, r1
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
1d36: 0741 lsls r1, r0, #29
1d38: bf48 it mi
1d3a: f043 0310 orrmi.w r3, r3, #16
UART1_C1 = c;
1d3e: 7093 strb r3, [r2, #2]
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
1d40: f000 030f and.w r3, r0, #15
1d44: 2b04 cmp r3, #4
uint8_t c;
c = UART1_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART1_C1 = c;
1d46: 490c ldr r1, [pc, #48] ; (1d78 <serial2_format+0x50>)
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
1d48: d103 bne.n 1d52 <serial2_format+0x2a>
1d4a: 798b ldrb r3, [r1, #6]
1d4c: f043 0340 orr.w r3, r3, #64 ; 0x40
1d50: 718b strb r3, [r1, #6]
c = UART1_S2 & ~0x10;
1d52: 7953 ldrb r3, [r2, #5]
if (format & 0x10) c |= 0x10; // rx invert
1d54: 06c2 lsls r2, r0, #27
c = UART1_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART1_C1 = c;
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART1_S2 & ~0x10;
1d56: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x10) c |= 0x10; // rx invert
UART1_S2 = c;
1d5a: 4a07 ldr r2, [pc, #28] ; (1d78 <serial2_format+0x50>)
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART1_C1 = c;
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART1_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
1d5c: bf48 it mi
1d5e: f043 0310 orrmi.w r3, r3, #16
UART1_S2 = c;
1d62: 7153 strb r3, [r2, #5]
c = UART1_C3 & ~0x10;
1d64: 7993 ldrb r3, [r2, #6]
if (format & 0x20) c |= 0x10; // tx invert
1d66: 0681 lsls r1, r0, #26
UART1_C1 = c;
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART1_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
UART1_S2 = c;
c = UART1_C3 & ~0x10;
1d68: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x20) c |= 0x10; // tx invert
1d6c: bf48 it mi
1d6e: f043 0310 orrmi.w r3, r3, #16
UART1_C3 = c;
1d72: 7193 strb r3, [r2, #6]
1d74: 4770 bx lr
1d76: bf00 nop
1d78: 4006b000 .word 0x4006b000
00001d7c <serial2_end>:
// UART1_C3.4 = txinv, 0=normal, 1=inverted
// UART1_S2.4 = rxinv, 0=normal, 1=inverted
}
void serial2_end(void)
{
1d7c: b508 push {r3, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
1d7e: 4b11 ldr r3, [pc, #68] ; (1dc4 <serial2_end+0x48>)
1d80: 681b ldr r3, [r3, #0]
1d82: 051b lsls r3, r3, #20
1d84: d400 bmi.n 1d88 <serial2_end+0xc>
1d86: bd08 pop {r3, pc}
while (transmitting) yield(); // wait for buffered data to send
1d88: 4b0f ldr r3, [pc, #60] ; (1dc8 <serial2_end+0x4c>)
1d8a: 781a ldrb r2, [r3, #0]
1d8c: f002 03ff and.w r3, r2, #255 ; 0xff
1d90: b112 cbz r2, 1d98 <serial2_end+0x1c>
1d92: f7ff fb55 bl 1440 <yield>
1d96: e7f7 b.n 1d88 <serial2_end+0xc>
NVIC_DISABLE_IRQ(IRQ_UART1_STATUS);
1d98: 4a0c ldr r2, [pc, #48] ; (1dcc <serial2_end+0x50>)
1d9a: f44f 2180 mov.w r1, #262144 ; 0x40000
1d9e: 6011 str r1, [r2, #0]
UART1_C2 = 0;
1da0: 4a0b ldr r2, [pc, #44] ; (1dd0 <serial2_end+0x54>)
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
1da2: 490c ldr r1, [pc, #48] ; (1dd4 <serial2_end+0x58>)
void serial2_end(void)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
while (transmitting) yield(); // wait for buffered data to send
NVIC_DISABLE_IRQ(IRQ_UART1_STATUS);
UART1_C2 = 0;
1da4: 70d3 strb r3, [r2, #3]
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
1da6: f240 1203 movw r2, #259 ; 0x103
1daa: 600a str r2, [r1, #0]
CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
1dac: 604a str r2, [r1, #4]
rx_buffer_head = 0;
1dae: 4a0a ldr r2, [pc, #40] ; (1dd8 <serial2_end+0x5c>)
1db0: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
1db2: 4a0a ldr r2, [pc, #40] ; (1ddc <serial2_end+0x60>)
1db4: 7013 strb r3, [r2, #0]
if (rts_pin) rts_deassert();
1db6: 4b0a ldr r3, [pc, #40] ; (1de0 <serial2_end+0x64>)
1db8: 681b ldr r3, [r3, #0]
1dba: b10b cbz r3, 1dc0 <serial2_end+0x44>
1dbc: 2201 movs r2, #1
1dbe: 701a strb r2, [r3, #0]
1dc0: bd08 pop {r3, pc}
1dc2: bf00 nop
1dc4: 40048034 .word 0x40048034
1dc8: 1fffe808 .word 0x1fffe808
1dcc: e000e180 .word 0xe000e180
1dd0: 4006b000 .word 0x4006b000
1dd4: 4004b00c .word 0x4004b00c
1dd8: 1fffe872 .word 0x1fffe872
1ddc: 1fffe809 .word 0x1fffe809
1de0: 1fffe804 .word 0x1fffe804
00001de4 <serial2_set_transmit_pin>:
}
void serial2_set_transmit_pin(uint8_t pin)
{
1de4: b538 push {r3, r4, r5, lr}
1de6: 4604 mov r4, r0
while (transmitting) ;
1de8: 4b09 ldr r3, [pc, #36] ; (1e10 <serial2_set_transmit_pin+0x2c>)
1dea: 781b ldrb r3, [r3, #0]
1dec: f003 05ff and.w r5, r3, #255 ; 0xff
1df0: 2b00 cmp r3, #0
1df2: d1f9 bne.n 1de8 <serial2_set_transmit_pin+0x4>
pinMode(pin, OUTPUT);
1df4: 4620 mov r0, r4
1df6: 2101 movs r1, #1
1df8: f7fe fc86 bl 708 <pinMode>
digitalWrite(pin, LOW);
1dfc: 4620 mov r0, r4
1dfe: 4629 mov r1, r5
1e00: f7fe fc62 bl 6c8 <digitalWrite>
transmit_pin = portOutputRegister(pin);
1e04: 4b03 ldr r3, [pc, #12] ; (1e14 <serial2_set_transmit_pin+0x30>)
1e06: f853 2034 ldr.w r2, [r3, r4, lsl #3]
1e0a: 4b03 ldr r3, [pc, #12] ; (1e18 <serial2_set_transmit_pin+0x34>)
1e0c: 601a str r2, [r3, #0]
1e0e: bd38 pop {r3, r4, r5, pc}
1e10: 1fffe808 .word 0x1fffe808
1e14: 00002a94 .word 0x00002a94
1e18: 1fffe874 .word 0x1fffe874
00001e1c <serial2_set_tx>:
transmit_mask = digitalPinToBitMask(pin);
#endif
}
void serial2_set_tx(uint8_t pin, uint8_t opendrain)
{
1e1c: b510 push {r4, lr}
#if defined(KINETISK)
uint32_t cfg;
if (opendrain) pin |= 128;
1e1e: b109 cbz r1, 1e24 <serial2_set_tx+0x8>
1e20: f040 0080 orr.w r0, r0, #128 ; 0x80
if (pin == tx_pin_num) return;
1e24: 4a14 ldr r2, [pc, #80] ; (1e78 <serial2_set_tx+0x5c>)
1e26: 7813 ldrb r3, [r2, #0]
1e28: 4298 cmp r0, r3
1e2a: 4614 mov r4, r2
1e2c: d022 beq.n 1e74 <serial2_set_tx+0x58>
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
1e2e: 4a13 ldr r2, [pc, #76] ; (1e7c <serial2_set_tx+0x60>)
1e30: 6812 ldr r2, [r2, #0]
1e32: 04d2 lsls r2, r2, #19
1e34: d51d bpl.n 1e72 <serial2_set_tx+0x56>
switch (tx_pin_num & 127) {
1e36: f003 037f and.w r3, r3, #127 ; 0x7f
1e3a: 2b0a cmp r3, #10
1e3c: d004 beq.n 1e48 <serial2_set_tx+0x2c>
1e3e: 2b1f cmp r3, #31
1e40: d105 bne.n 1e4e <serial2_set_tx+0x32>
case 10: CORE_PIN10_CONFIG = 0; break; // PTC4
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
1e42: 2200 movs r2, #0
1e44: 4b0e ldr r3, [pc, #56] ; (1e80 <serial2_set_tx+0x64>)
1e46: e001 b.n 1e4c <serial2_set_tx+0x30>
if (opendrain) pin |= 128;
if (pin == tx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
switch (tx_pin_num & 127) {
case 10: CORE_PIN10_CONFIG = 0; break; // PTC4
1e48: 4b0e ldr r3, [pc, #56] ; (1e84 <serial2_set_tx+0x68>)
1e4a: 2200 movs r2, #0
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
1e4c: 601a str r2, [r3, #0]
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
1e4e: 2900 cmp r1, #0
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
1e50: f000 027f and.w r2, r0, #127 ; 0x7f
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 31: CORE_PIN31_CONFIG = 0; break; // PTE0
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
1e54: bf0c ite eq
1e56: 2344 moveq r3, #68 ; 0x44
1e58: 2360 movne r3, #96 ; 0x60
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
1e5a: 2a0a cmp r2, #10
1e5c: d005 beq.n 1e6a <serial2_set_tx+0x4e>
1e5e: 2a1f cmp r2, #31
1e60: d107 bne.n 1e72 <serial2_set_tx+0x56>
case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break;
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break;
1e62: f443 7340 orr.w r3, r3, #768 ; 0x300
1e66: 4a06 ldr r2, [pc, #24] ; (1e80 <serial2_set_tx+0x64>)
1e68: e002 b.n 1e70 <serial2_set_tx+0x54>
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
case 10: CORE_PIN10_CONFIG = cfg | PORT_PCR_MUX(3); break;
1e6a: 4a06 ldr r2, [pc, #24] ; (1e84 <serial2_set_tx+0x68>)
1e6c: f443 7340 orr.w r3, r3, #768 ; 0x300
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 31: CORE_PIN31_CONFIG = cfg | PORT_PCR_MUX(3); break;
1e70: 6013 str r3, [r2, #0]
#endif
}
}
tx_pin_num = pin;
1e72: 7020 strb r0, [r4, #0]
1e74: bd10 pop {r4, pc}
1e76: bf00 nop
1e78: 1fffe568 .word 0x1fffe568
1e7c: 40048034 .word 0x40048034
1e80: 4004d000 .word 0x4004d000
1e84: 4004b010 .word 0x4004b010
00001e88 <serial2_set_rx>:
}
void serial2_set_rx(uint8_t pin)
{
#if defined(KINETISK)
if (pin == rx_pin_num) return;
1e88: 4a0f ldr r2, [pc, #60] ; (1ec8 <serial2_set_rx+0x40>)
1e8a: 7813 ldrb r3, [r2, #0]
1e8c: 4298 cmp r0, r3
1e8e: d01a beq.n 1ec6 <serial2_set_rx+0x3e>
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
1e90: 490e ldr r1, [pc, #56] ; (1ecc <serial2_set_rx+0x44>)
1e92: 6809 ldr r1, [r1, #0]
1e94: 04c9 lsls r1, r1, #19
1e96: d515 bpl.n 1ec4 <serial2_set_rx+0x3c>
switch (rx_pin_num) {
1e98: 2b09 cmp r3, #9
1e9a: d004 beq.n 1ea6 <serial2_set_rx+0x1e>
1e9c: 2b1a cmp r3, #26
1e9e: d105 bne.n 1eac <serial2_set_rx+0x24>
case 9: CORE_PIN9_CONFIG = 0; break; // PTC3
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
1ea0: 2100 movs r1, #0
1ea2: 4b0b ldr r3, [pc, #44] ; (1ed0 <serial2_set_rx+0x48>)
1ea4: e001 b.n 1eaa <serial2_set_rx+0x22>
{
#if defined(KINETISK)
if (pin == rx_pin_num) return;
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
switch (rx_pin_num) {
case 9: CORE_PIN9_CONFIG = 0; break; // PTC3
1ea6: 4b0b ldr r3, [pc, #44] ; (1ed4 <serial2_set_rx+0x4c>)
1ea8: 2100 movs r1, #0
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
1eaa: 6019 str r1, [r3, #0]
#endif
}
switch (pin) {
1eac: 2809 cmp r0, #9
1eae: d005 beq.n 1ebc <serial2_set_rx+0x34>
1eb0: 281a cmp r0, #26
1eb2: d107 bne.n 1ec4 <serial2_set_rx+0x3c>
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1eb4: f240 3113 movw r1, #787 ; 0x313
1eb8: 4b05 ldr r3, [pc, #20] ; (1ed0 <serial2_set_rx+0x48>)
1eba: e002 b.n 1ec2 <serial2_set_rx+0x3a>
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 26: CORE_PIN26_CONFIG = 0; break; // PTE1
#endif
}
switch (pin) {
case 9: CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1ebc: 4b05 ldr r3, [pc, #20] ; (1ed4 <serial2_set_rx+0x4c>)
1ebe: f240 3113 movw r1, #787 ; 0x313
#if !(defined(__MK64FX512__) || defined(__MK66FX1M0__)) // not on T3.4 or T3.5
case 26: CORE_PIN26_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break;
1ec2: 6019 str r1, [r3, #0]
#endif
}
}
rx_pin_num = pin;
1ec4: 7010 strb r0, [r2, #0]
1ec6: 4770 bx lr
1ec8: 1fffe567 .word 0x1fffe567
1ecc: 40048034 .word 0x40048034
1ed0: 4004d004 .word 0x4004d004
1ed4: 4004b00c .word 0x4004b00c
00001ed8 <serial2_set_rts>:
#endif
}
int serial2_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
1ed8: 4a0d ldr r2, [pc, #52] ; (1f10 <serial2_set_rts+0x38>)
rx_pin_num = pin;
#endif
}
int serial2_set_rts(uint8_t pin)
{
1eda: b538 push {r3, r4, r5, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
1edc: 6814 ldr r4, [r2, #0]
1ede: f414 6200 ands.w r2, r4, #2048 ; 0x800
1ee2: f04f 0400 mov.w r4, #0
1ee6: d010 beq.n 1f0a <serial2_set_rts+0x32>
if (pin < CORE_NUM_DIGITAL) {
1ee8: 2821 cmp r0, #33 ; 0x21
1eea: 4d0a ldr r5, [pc, #40] ; (1f14 <serial2_set_rts+0x3c>)
1eec: d80a bhi.n 1f04 <serial2_set_rts+0x2c>
rts_pin = portOutputRegister(pin);
1eee: 4a0a ldr r2, [pc, #40] ; (1f18 <serial2_set_rts+0x40>)
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
1ef0: 2101 movs r1, #1
int serial2_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
if (pin < CORE_NUM_DIGITAL) {
rts_pin = portOutputRegister(pin);
1ef2: f852 3030 ldr.w r3, [r2, r0, lsl #3]
1ef6: 602b str r3, [r5, #0]
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
1ef8: f7fe fc06 bl 708 <pinMode>
rts_assert();
1efc: 682b ldr r3, [r5, #0]
1efe: 701c strb r4, [r3, #0]
UART1_MODEM &= ~UART_MODEM_RXRTSE;
return 0;
}
UART1_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
1f00: 2001 movs r0, #1
1f02: bd38 pop {r3, r4, r5, pc}
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
rts_assert();
} else {
rts_pin = NULL;
1f04: 602c str r4, [r5, #0]
return 0;
1f06: 4620 mov r0, r4
1f08: bd38 pop {r3, r4, r5, pc}
#endif
}
int serial2_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
1f0a: 4610 mov r0, r2
return 0;
}
UART1_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
}
1f0c: bd38 pop {r3, r4, r5, pc}
1f0e: bf00 nop
1f10: 40048034 .word 0x40048034
1f14: 1fffe804 .word 0x1fffe804
1f18: 00002a94 .word 0x00002a94
00001f1c <serial2_set_cts>:
int serial2_set_cts(uint8_t pin)
{
#if defined(KINETISK)
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
1f1c: 4b0b ldr r3, [pc, #44] ; (1f4c <serial2_set_cts+0x30>)
1f1e: 681b ldr r3, [r3, #0]
1f20: f413 6300 ands.w r3, r3, #2048 ; 0x800
1f24: d010 beq.n 1f48 <serial2_set_cts+0x2c>
if (pin == 23) {
1f26: 2817 cmp r0, #23
1f28: 4b09 ldr r3, [pc, #36] ; (1f50 <serial2_set_cts+0x34>)
1f2a: d109 bne.n 1f40 <serial2_set_cts+0x24>
CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
1f2c: 4a09 ldr r2, [pc, #36] ; (1f54 <serial2_set_cts+0x38>)
1f2e: f240 3102 movw r1, #770 ; 0x302
1f32: 6011 str r1, [r2, #0]
} else {
UART1_MODEM &= ~UART_MODEM_TXCTSE;
return 0;
}
UART1_MODEM |= UART_MODEM_TXCTSE;
1f34: 7b5a ldrb r2, [r3, #13]
1f36: f042 0201 orr.w r2, r2, #1
1f3a: 735a strb r2, [r3, #13]
return 1;
1f3c: 2001 movs r0, #1
1f3e: 4770 bx lr
#if defined(KINETISK)
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0;
if (pin == 23) {
CORE_PIN23_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
} else {
UART1_MODEM &= ~UART_MODEM_TXCTSE;
1f40: 7b5a ldrb r2, [r3, #13]
1f42: f002 02fe and.w r2, r2, #254 ; 0xfe
1f46: 735a strb r2, [r3, #13]
return 0;
1f48: 2000 movs r0, #0
1f4a: 4770 bx lr
1f4c: 40048034 .word 0x40048034
1f50: 4006b000 .word 0x4006b000
1f54: 4004b008 .word 0x4004b008
00001f58 <serial2_putchar>:
return 0;
#endif
}
void serial2_putchar(uint32_t c)
{
1f58: b5f8 push {r3, r4, r5, r6, r7, lr}
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
1f5a: 4b1d ldr r3, [pc, #116] ; (1fd0 <serial2_putchar+0x78>)
1f5c: 681b ldr r3, [r3, #0]
1f5e: 051a lsls r2, r3, #20
return 0;
#endif
}
void serial2_putchar(uint32_t c)
{
1f60: 4606 mov r6, r0
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
1f62: d533 bpl.n 1fcc <serial2_putchar+0x74>
if (transmit_pin) transmit_assert();
1f64: 4b1b ldr r3, [pc, #108] ; (1fd4 <serial2_putchar+0x7c>)
1f66: 681b ldr r3, [r3, #0]
1f68: b10b cbz r3, 1f6e <serial2_putchar+0x16>
1f6a: 2201 movs r2, #1
1f6c: 701a strb r2, [r3, #0]
head = tx_buffer_head;
1f6e: 4b1a ldr r3, [pc, #104] ; (1fd8 <serial2_putchar+0x80>)
1f70: 781c ldrb r4, [r3, #0]
if (++head >= TX_BUFFER_SIZE) head = 0;
1f72: 3401 adds r4, #1
1f74: 2c28 cmp r4, #40 ; 0x28
1f76: 461f mov r7, r3
1f78: bf28 it cs
1f7a: 2400 movcs r4, #0
while (tx_buffer_tail == head) {
1f7c: 4d17 ldr r5, [pc, #92] ; (1fdc <serial2_putchar+0x84>)
1f7e: 782b ldrb r3, [r5, #0]
1f80: 42a3 cmp r3, r4
1f82: d118 bne.n 1fb6 <serial2_putchar+0x5e>
int priority = nvic_execution_priority();
1f84: f7ff faf4 bl 1570 <nvic_execution_priority>
if (priority <= IRQ_PRIORITY) {
1f88: 2840 cmp r0, #64 ; 0x40
1f8a: dc0f bgt.n 1fac <serial2_putchar+0x54>
if ((UART1_S1 & UART_S1_TDRE)) {
1f8c: 4a14 ldr r2, [pc, #80] ; (1fe0 <serial2_putchar+0x88>)
1f8e: 7913 ldrb r3, [r2, #4]
1f90: 061b lsls r3, r3, #24
1f92: d5f3 bpl.n 1f7c <serial2_putchar+0x24>
uint32_t tail = tx_buffer_tail;
1f94: 782b ldrb r3, [r5, #0]
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
1f96: 4913 ldr r1, [pc, #76] ; (1fe4 <serial2_putchar+0x8c>)
while (tx_buffer_tail == head) {
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART1_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
1f98: 3301 adds r3, #1
1f9a: 2b28 cmp r3, #40 ; 0x28
1f9c: bf28 it cs
1f9e: 2300 movcs r3, #0
n = tx_buffer[tail];
1fa0: 5cc9 ldrb r1, [r1, r3]
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
UART1_D = n;
tx_buffer_tail = tail;
1fa2: b2db uxtb r3, r3
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART1_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
1fa4: b2c9 uxtb r1, r1
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
UART1_D = n;
1fa6: 71d1 strb r1, [r2, #7]
tx_buffer_tail = tail;
1fa8: 702b strb r3, [r5, #0]
1faa: e7e7 b.n 1f7c <serial2_putchar+0x24>
}
} else if (priority >= 256) {
1fac: 28ff cmp r0, #255 ; 0xff
1fae: dde5 ble.n 1f7c <serial2_putchar+0x24>
yield(); // wait
1fb0: f7ff fa46 bl 1440 <yield>
1fb4: e7e2 b.n 1f7c <serial2_putchar+0x24>
}
}
tx_buffer[head] = c;
1fb6: 4b0b ldr r3, [pc, #44] ; (1fe4 <serial2_putchar+0x8c>)
1fb8: b2f6 uxtb r6, r6
1fba: 551e strb r6, [r3, r4]
transmitting = 1;
1fbc: 4b0a ldr r3, [pc, #40] ; (1fe8 <serial2_putchar+0x90>)
1fbe: 2201 movs r2, #1
1fc0: 701a strb r2, [r3, #0]
tx_buffer_head = head;
UART1_C2 = C2_TX_ACTIVE;
1fc2: 4b07 ldr r3, [pc, #28] ; (1fe0 <serial2_putchar+0x88>)
yield(); // wait
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
1fc4: b2e4 uxtb r4, r4
UART1_C2 = C2_TX_ACTIVE;
1fc6: 22ac movs r2, #172 ; 0xac
yield(); // wait
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
1fc8: 703c strb r4, [r7, #0]
UART1_C2 = C2_TX_ACTIVE;
1fca: 70da strb r2, [r3, #3]
1fcc: bdf8 pop {r3, r4, r5, r6, r7, pc}
1fce: bf00 nop
1fd0: 40048034 .word 0x40048034
1fd4: 1fffe874 .word 0x1fffe874
1fd8: 1fffe878 .word 0x1fffe878
1fdc: 1fffe873 .word 0x1fffe873
1fe0: 4006b000 .word 0x4006b000
1fe4: 1fffe80a .word 0x1fffe80a
1fe8: 1fffe808 .word 0x1fffe808
00001fec <serial2_write>:
}
UART1_C2 = C2_TX_ACTIVE;
}
#else
void serial2_write(const void *buf, unsigned int count)
{
1fec: b538 push {r3, r4, r5, lr}
1fee: 4604 mov r4, r0
1ff0: 1845 adds r5, r0, r1
const uint8_t *p = (const uint8_t *)buf;
while (count-- > 0) serial2_putchar(*p++);
1ff2: 42ac cmp r4, r5
1ff4: d004 beq.n 2000 <serial2_write+0x14>
1ff6: f814 0b01 ldrb.w r0, [r4], #1
1ffa: f7ff ffad bl 1f58 <serial2_putchar>
1ffe: e7f8 b.n 1ff2 <serial2_write+0x6>
}
2000: bd38 pop {r3, r4, r5, pc}
2002: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8
00002004 <serial2_flush>:
#endif
void serial2_flush(void)
{
2004: b508 push {r3, lr}
while (transmitting) yield(); // wait
2006: 4b03 ldr r3, [pc, #12] ; (2014 <serial2_flush+0x10>)
2008: 781b ldrb r3, [r3, #0]
200a: b113 cbz r3, 2012 <serial2_flush+0xe>
200c: f7ff fa18 bl 1440 <yield>
2010: e7f9 b.n 2006 <serial2_flush+0x2>
}
2012: bd08 pop {r3, pc}
2014: 1fffe808 .word 0x1fffe808
00002018 <serial2_write_buffer_free>:
int serial2_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
tail = tx_buffer_tail;
2018: 4a06 ldr r2, [pc, #24] ; (2034 <serial2_write_buffer_free+0x1c>)
int serial2_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
201a: 4b07 ldr r3, [pc, #28] ; (2038 <serial2_write_buffer_free+0x20>)
201c: 781b ldrb r3, [r3, #0]
tail = tx_buffer_tail;
201e: 7810 ldrb r0, [r2, #0]
int serial2_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
2020: b2db uxtb r3, r3
tail = tx_buffer_tail;
2022: b2c0 uxtb r0, r0
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
2024: 4283 cmp r3, r0
2026: bf2c ite cs
2028: 3027 addcs r0, #39 ; 0x27
return tail - head - 1;
202a: f100 30ff addcc.w r0, r0, #4294967295 ; 0xffffffff
202e: 1ac0 subs r0, r0, r3
}
2030: 4770 bx lr
2032: bf00 nop
2034: 1fffe873 .word 0x1fffe873
2038: 1fffe878 .word 0x1fffe878
0000203c <serial2_available>:
int serial2_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
203c: 4b05 ldr r3, [pc, #20] ; (2054 <serial2_available+0x18>)
203e: 7818 ldrb r0, [r3, #0]
tail = rx_buffer_tail;
2040: 4b05 ldr r3, [pc, #20] ; (2058 <serial2_available+0x1c>)
2042: 781b ldrb r3, [r3, #0]
int serial2_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
2044: b2c0 uxtb r0, r0
tail = rx_buffer_tail;
2046: b2db uxtb r3, r3
if (head >= tail) return head - tail;
2048: 4298 cmp r0, r3
return RX_BUFFER_SIZE + head - tail;
204a: bf38 it cc
204c: 3040 addcc r0, #64 ; 0x40
204e: 1ac0 subs r0, r0, r3
}
2050: 4770 bx lr
2052: bf00 nop
2054: 1fffe872 .word 0x1fffe872
2058: 1fffe809 .word 0x1fffe809
0000205c <serial2_getchar>:
int serial2_getchar(void)
{
205c: b510 push {r4, lr}
uint32_t head, tail;
int c;
head = rx_buffer_head;
205e: 4b10 ldr r3, [pc, #64] ; (20a0 <serial2_getchar+0x44>)
tail = rx_buffer_tail;
2060: 4910 ldr r1, [pc, #64] ; (20a4 <serial2_getchar+0x48>)
int serial2_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
2062: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
2064: 780b ldrb r3, [r1, #0]
int serial2_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
2066: b2d2 uxtb r2, r2
tail = rx_buffer_tail;
2068: b2db uxtb r3, r3
if (head == tail) return -1;
206a: 429a cmp r2, r3
206c: d014 beq.n 2098 <serial2_getchar+0x3c>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
206e: 3301 adds r3, #1
2070: 2b40 cmp r3, #64 ; 0x40
2072: bf28 it cs
2074: 2300 movcs r3, #0
c = rx_buffer[tail];
2076: 480c ldr r0, [pc, #48] ; (20a8 <serial2_getchar+0x4c>)
rx_buffer_tail = tail;
2078: b2dc uxtb r4, r3
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
207a: 5cc0 ldrb r0, [r0, r3]
rx_buffer_tail = tail;
207c: 700c strb r4, [r1, #0]
if (rts_pin) {
207e: 490b ldr r1, [pc, #44] ; (20ac <serial2_getchar+0x50>)
2080: 6809 ldr r1, [r1, #0]
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
2082: b2c0 uxtb r0, r0
rx_buffer_tail = tail;
if (rts_pin) {
2084: b151 cbz r1, 209c <serial2_getchar+0x40>
int avail;
if (head >= tail) avail = head - tail;
2086: 429a cmp r2, r3
else avail = RX_BUFFER_SIZE + head - tail;
2088: bf38 it cc
208a: 3240 addcc r2, #64 ; 0x40
208c: 1ad3 subs r3, r2, r3
if (avail <= RTS_LOW_WATERMARK) rts_assert();
208e: 2b1a cmp r3, #26
2090: dc04 bgt.n 209c <serial2_getchar+0x40>
2092: 2300 movs r3, #0
2094: 700b strb r3, [r1, #0]
2096: bd10 pop {r4, pc}
uint32_t head, tail;
int c;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
2098: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (head >= tail) avail = head - tail;
else avail = RX_BUFFER_SIZE + head - tail;
if (avail <= RTS_LOW_WATERMARK) rts_assert();
}
return c;
}
209c: bd10 pop {r4, pc}
209e: bf00 nop
20a0: 1fffe872 .word 0x1fffe872
20a4: 1fffe809 .word 0x1fffe809
20a8: 1fffe832 .word 0x1fffe832
20ac: 1fffe804 .word 0x1fffe804
000020b0 <serial2_peek>:
int serial2_peek(void)
{
uint32_t head, tail;
head = rx_buffer_head;
20b0: 4b08 ldr r3, [pc, #32] ; (20d4 <serial2_peek+0x24>)
20b2: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
20b4: 4b08 ldr r3, [pc, #32] ; (20d8 <serial2_peek+0x28>)
20b6: 781b ldrb r3, [r3, #0]
20b8: b2db uxtb r3, r3
if (head == tail) return -1;
20ba: 429a cmp r2, r3
20bc: d007 beq.n 20ce <serial2_peek+0x1e>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
20be: 3301 adds r3, #1
20c0: 2b40 cmp r3, #64 ; 0x40
20c2: bf28 it cs
20c4: 2300 movcs r3, #0
return rx_buffer[tail];
20c6: 4a05 ldr r2, [pc, #20] ; (20dc <serial2_peek+0x2c>)
20c8: 5cd0 ldrb r0, [r2, r3]
20ca: b2c0 uxtb r0, r0
20cc: 4770 bx lr
{
uint32_t head, tail;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
20ce: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (++tail >= RX_BUFFER_SIZE) tail = 0;
return rx_buffer[tail];
}
20d2: 4770 bx lr
20d4: 1fffe872 .word 0x1fffe872
20d8: 1fffe809 .word 0x1fffe809
20dc: 1fffe832 .word 0x1fffe832
000020e0 <serial2_clear>:
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return;
UART1_C2 &= ~(UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
UART1_CFIFO = UART_CFIFO_RXFLUSH;
UART1_C2 |= (UART_C2_RE | UART_C2_RIE | UART_C2_ILIE);
#endif
rx_buffer_head = rx_buffer_tail;
20e0: 4b05 ldr r3, [pc, #20] ; (20f8 <serial2_clear+0x18>)
20e2: 781a ldrb r2, [r3, #0]
20e4: 4b05 ldr r3, [pc, #20] ; (20fc <serial2_clear+0x1c>)
20e6: b2d2 uxtb r2, r2
20e8: 701a strb r2, [r3, #0]
if (rts_pin) rts_assert();
20ea: 4b05 ldr r3, [pc, #20] ; (2100 <serial2_clear+0x20>)
20ec: 681b ldr r3, [r3, #0]
20ee: b10b cbz r3, 20f4 <serial2_clear+0x14>
20f0: 2200 movs r2, #0
20f2: 701a strb r2, [r3, #0]
20f4: 4770 bx lr
20f6: bf00 nop
20f8: 1fffe809 .word 0x1fffe809
20fc: 1fffe872 .word 0x1fffe872
2100: 1fffe804 .word 0x1fffe804
00002104 <uart1_status_isr>:
// Receive data above watermark UART_S1_RDRF
// LIN break detect UART_S2_LBKDIF
// RxD pin active edge UART_S2_RXEDGIF
void uart1_status_isr(void)
{
2104: b510 push {r4, lr}
} while (UART1_TCFIFO < 8);
tx_buffer_tail = tail;
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING;
}
#else
if (UART1_S1 & UART_S1_RDRF) {
2106: 4b21 ldr r3, [pc, #132] ; (218c <uart1_status_isr+0x88>)
2108: 791a ldrb r2, [r3, #4]
210a: 0692 lsls r2, r2, #26
210c: d50f bpl.n 212e <uart1_status_isr+0x2a>
n = UART1_D;
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
head = rx_buffer_head + 1;
210e: 4a20 ldr r2, [pc, #128] ; (2190 <uart1_status_isr+0x8c>)
tx_buffer_tail = tail;
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING;
}
#else
if (UART1_S1 & UART_S1_RDRF) {
n = UART1_D;
2110: 79d8 ldrb r0, [r3, #7]
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
head = rx_buffer_head + 1;
2112: 7813 ldrb r3, [r2, #0]
if (head >= RX_BUFFER_SIZE) head = 0;
if (head != rx_buffer_tail) {
2114: 491f ldr r1, [pc, #124] ; (2194 <uart1_status_isr+0x90>)
}
#else
if (UART1_S1 & UART_S1_RDRF) {
n = UART1_D;
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
head = rx_buffer_head + 1;
2116: 3301 adds r3, #1
if (head >= RX_BUFFER_SIZE) head = 0;
2118: 2b40 cmp r3, #64 ; 0x40
if (head != rx_buffer_tail) {
211a: 7809 ldrb r1, [r1, #0]
#else
if (UART1_S1 & UART_S1_RDRF) {
n = UART1_D;
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
head = rx_buffer_head + 1;
if (head >= RX_BUFFER_SIZE) head = 0;
211c: bf28 it cs
211e: 2300 movcs r3, #0
if (head != rx_buffer_tail) {
2120: 428b cmp r3, r1
tx_buffer_tail = tail;
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING;
}
#else
if (UART1_S1 & UART_S1_RDRF) {
n = UART1_D;
2122: b2c0 uxtb r0, r0
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100;
head = rx_buffer_head + 1;
if (head >= RX_BUFFER_SIZE) head = 0;
if (head != rx_buffer_tail) {
2124: d003 beq.n 212e <uart1_status_isr+0x2a>
rx_buffer[head] = n;
2126: 491c ldr r1, [pc, #112] ; (2198 <uart1_status_isr+0x94>)
2128: 54c8 strb r0, [r1, r3]
rx_buffer_head = head;
212a: b2db uxtb r3, r3
212c: 7013 strb r3, [r2, #0]
}
}
c = UART1_C2;
212e: 4a17 ldr r2, [pc, #92] ; (218c <uart1_status_isr+0x88>)
2130: 78d1 ldrb r1, [r2, #3]
2132: b2c9 uxtb r1, r1
if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) {
2134: 060c lsls r4, r1, #24
2136: d516 bpl.n 2166 <uart1_status_isr+0x62>
2138: 7913 ldrb r3, [r2, #4]
213a: 0618 lsls r0, r3, #24
213c: d513 bpl.n 2166 <uart1_status_isr+0x62>
head = tx_buffer_head;
213e: 4b17 ldr r3, [pc, #92] ; (219c <uart1_status_isr+0x98>)
tail = tx_buffer_tail;
2140: 4817 ldr r0, [pc, #92] ; (21a0 <uart1_status_isr+0x9c>)
rx_buffer_head = head;
}
}
c = UART1_C2;
if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
2142: 781c ldrb r4, [r3, #0]
tail = tx_buffer_tail;
2144: 7803 ldrb r3, [r0, #0]
2146: b2db uxtb r3, r3
if (head == tail) {
2148: 429c cmp r4, r3
214a: d102 bne.n 2152 <uart1_status_isr+0x4e>
UART1_C2 = C2_TX_COMPLETING;
214c: 236c movs r3, #108 ; 0x6c
214e: 70d3 strb r3, [r2, #3]
2150: e009 b.n 2166 <uart1_status_isr+0x62>
} else {
if (++tail >= TX_BUFFER_SIZE) tail = 0;
2152: 3301 adds r3, #1
2154: 2b28 cmp r3, #40 ; 0x28
2156: bf28 it cs
2158: 2300 movcs r3, #0
n = tx_buffer[tail];
215a: 4c12 ldr r4, [pc, #72] ; (21a4 <uart1_status_isr+0xa0>)
215c: 5ce4 ldrb r4, [r4, r3]
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
UART1_D = n;
tx_buffer_tail = tail;
215e: b2db uxtb r3, r3
tail = tx_buffer_tail;
if (head == tail) {
UART1_C2 = C2_TX_COMPLETING;
} else {
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
2160: b2e4 uxtb r4, r4
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2);
UART1_D = n;
2162: 71d4 strb r4, [r2, #7]
tx_buffer_tail = tail;
2164: 7003 strb r3, [r0, #0]
}
}
#endif
if ((c & UART_C2_TCIE) && (UART1_S1 & UART_S1_TC)) {
2166: 064b lsls r3, r1, #25
2168: d50e bpl.n 2188 <uart1_status_isr+0x84>
216a: 4b08 ldr r3, [pc, #32] ; (218c <uart1_status_isr+0x88>)
216c: 791a ldrb r2, [r3, #4]
216e: f012 0f40 tst.w r2, #64 ; 0x40
2172: 4619 mov r1, r3
2174: d008 beq.n 2188 <uart1_status_isr+0x84>
transmitting = 0;
2176: 4b0c ldr r3, [pc, #48] ; (21a8 <uart1_status_isr+0xa4>)
2178: 2200 movs r2, #0
217a: 701a strb r2, [r3, #0]
if (transmit_pin) transmit_deassert();
217c: 4b0b ldr r3, [pc, #44] ; (21ac <uart1_status_isr+0xa8>)
217e: 681b ldr r3, [r3, #0]
2180: b103 cbz r3, 2184 <uart1_status_isr+0x80>
2182: 701a strb r2, [r3, #0]
UART1_C2 = C2_TX_INACTIVE;
2184: 232c movs r3, #44 ; 0x2c
2186: 70cb strb r3, [r1, #3]
2188: bd10 pop {r4, pc}
218a: bf00 nop
218c: 4006b000 .word 0x4006b000
2190: 1fffe872 .word 0x1fffe872
2194: 1fffe809 .word 0x1fffe809
2198: 1fffe832 .word 0x1fffe832
219c: 1fffe878 .word 0x1fffe878
21a0: 1fffe873 .word 0x1fffe873
21a4: 1fffe80a .word 0x1fffe80a
21a8: 1fffe808 .word 0x1fffe808
21ac: 1fffe874 .word 0x1fffe874
000021b0 <serial3_begin>:
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE
#define C2_TX_INACTIVE C2_ENABLE
void serial3_begin(uint32_t divisor)
{
SIM_SCGC4 |= SIM_SCGC4_UART2; // turn on clock, TODO: use bitband
21b0: 4b16 ldr r3, [pc, #88] ; (220c <serial3_begin+0x5c>)
21b2: 681a ldr r2, [r3, #0]
21b4: f442 5280 orr.w r2, r2, #4096 ; 0x1000
21b8: 601a str r2, [r3, #0]
rx_buffer_head = 0;
21ba: 4a15 ldr r2, [pc, #84] ; (2210 <serial3_begin+0x60>)
21bc: 2300 movs r3, #0
21be: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
21c0: 4a14 ldr r2, [pc, #80] ; (2214 <serial3_begin+0x64>)
21c2: 7013 strb r3, [r2, #0]
tx_buffer_head = 0;
21c4: 4a14 ldr r2, [pc, #80] ; (2218 <serial3_begin+0x68>)
21c6: 7013 strb r3, [r2, #0]
tx_buffer_tail = 0;
21c8: 4a14 ldr r2, [pc, #80] ; (221c <serial3_begin+0x6c>)
21ca: 7013 strb r3, [r2, #0]
transmitting = 0;
21cc: 4a14 ldr r2, [pc, #80] ; (2220 <serial3_begin+0x70>)
21ce: 7013 strb r3, [r2, #0]
#if defined(KINETISK)
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3);
21d0: 4a14 ldr r2, [pc, #80] ; (2224 <serial3_begin+0x74>)
21d2: f240 3113 movw r1, #787 ; 0x313
21d6: 6011 str r1, [r2, #0]
CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3);
21d8: f44f 7151 mov.w r1, #836 ; 0x344
21dc: 6051 str r1, [r2, #4]
case 8: CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
case 20: CORE_PIN20_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
}
#endif
#if defined(HAS_KINETISK_UART2)
UART2_BDH = (divisor >> 13) & 0x1F;
21de: 4a12 ldr r2, [pc, #72] ; (2228 <serial3_begin+0x78>)
21e0: f3c0 3144 ubfx r1, r0, #13, #5
21e4: 7011 strb r1, [r2, #0]
UART2_BDL = (divisor >> 5) & 0xFF;
21e6: f3c0 1147 ubfx r1, r0, #5, #8
UART2_C4 = divisor & 0x1F;
21ea: f000 001f and.w r0, r0, #31
case 20: CORE_PIN20_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break;
}
#endif
#if defined(HAS_KINETISK_UART2)
UART2_BDH = (divisor >> 13) & 0x1F;
UART2_BDL = (divisor >> 5) & 0xFF;
21ee: 7051 strb r1, [r2, #1]
UART2_C4 = divisor & 0x1F;
21f0: 7290 strb r0, [r2, #10]
UART2_C1 = 0;
21f2: 7093 strb r3, [r2, #2]
UART2_PFIFO = 0;
21f4: 7413 strb r3, [r2, #16]
#elif defined(HAS_KINETISL_UART2)
UART2_BDH = (divisor >> 8) & 0x1F;
UART2_BDL = divisor & 0xFF;
UART2_C1 = 0;
#endif
UART2_C2 = C2_TX_INACTIVE;
21f6: 232c movs r3, #44 ; 0x2c
21f8: 70d3 strb r3, [r2, #3]
NVIC_SET_PRIORITY(IRQ_UART2_STATUS, IRQ_PRIORITY);
21fa: 4b0c ldr r3, [pc, #48] ; (222c <serial3_begin+0x7c>)
21fc: 2240 movs r2, #64 ; 0x40
21fe: 701a strb r2, [r3, #0]
NVIC_ENABLE_IRQ(IRQ_UART2_STATUS);
2200: f5a3 7345 sub.w r3, r3, #788 ; 0x314
2204: f44f 1280 mov.w r2, #1048576 ; 0x100000
2208: 601a str r2, [r3, #0]
220a: 4770 bx lr
220c: 40048034 .word 0x40048034
2210: 1fffe8ea .word 0x1fffe8ea
2214: 1fffe881 .word 0x1fffe881
2218: 1fffe8f0 .word 0x1fffe8f0
221c: 1fffe8eb .word 0x1fffe8eb
2220: 1fffe880 .word 0x1fffe880
2224: 4004c008 .word 0x4004c008
2228: 4006c000 .word 0x4006c000
222c: e000e414 .word 0xe000e414
00002230 <serial3_format>:
void serial3_format(uint32_t format)
{
uint8_t c;
c = UART2_C1;
2230: 4a13 ldr r2, [pc, #76] ; (2280 <serial3_format+0x50>)
2232: 7893 ldrb r3, [r2, #2]
c = (c & ~0x13) | (format & 0x03); // configure parity
2234: f000 0103 and.w r1, r0, #3
2238: f003 03ec and.w r3, r3, #236 ; 0xec
223c: 430b orrs r3, r1
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
223e: 0741 lsls r1, r0, #29
2240: bf48 it mi
2242: f043 0310 orrmi.w r3, r3, #16
UART2_C1 = c;
2246: 7093 strb r3, [r2, #2]
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
2248: f000 030f and.w r3, r0, #15
224c: 2b04 cmp r3, #4
uint8_t c;
c = UART2_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART2_C1 = c;
224e: 490c ldr r1, [pc, #48] ; (2280 <serial3_format+0x50>)
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
2250: d103 bne.n 225a <serial3_format+0x2a>
2252: 798b ldrb r3, [r1, #6]
2254: f043 0340 orr.w r3, r3, #64 ; 0x40
2258: 718b strb r3, [r1, #6]
c = UART2_S2 & ~0x10;
225a: 7953 ldrb r3, [r2, #5]
if (format & 0x10) c |= 0x10; // rx invert
225c: 06c2 lsls r2, r0, #27
c = UART2_C1;
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART2_C1 = c;
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART2_S2 & ~0x10;
225e: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x10) c |= 0x10; // rx invert
UART2_S2 = c;
2262: 4a07 ldr r2, [pc, #28] ; (2280 <serial3_format+0x50>)
c = (c & ~0x13) | (format & 0x03); // configure parity
if (format & 0x04) c |= 0x10; // 9 bits (might include parity)
UART2_C1 = c;
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART2_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
2264: bf48 it mi
2266: f043 0310 orrmi.w r3, r3, #16
UART2_S2 = c;
226a: 7153 strb r3, [r2, #5]
c = UART2_C3 & ~0x10;
226c: 7993 ldrb r3, [r2, #6]
if (format & 0x20) c |= 0x10; // tx invert
226e: 0681 lsls r1, r0, #26
UART2_C1 = c;
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1
c = UART2_S2 & ~0x10;
if (format & 0x10) c |= 0x10; // rx invert
UART2_S2 = c;
c = UART2_C3 & ~0x10;
2270: f003 03ef and.w r3, r3, #239 ; 0xef
if (format & 0x20) c |= 0x10; // tx invert
2274: bf48 it mi
2276: f043 0310 orrmi.w r3, r3, #16
UART2_C3 = c;
227a: 7193 strb r3, [r2, #6]
227c: 4770 bx lr
227e: bf00 nop
2280: 4006c000 .word 0x4006c000
00002284 <serial3_end>:
use9Bits = format & 0x80;
#endif
}
void serial3_end(void)
{
2284: b508 push {r3, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
2286: 4b11 ldr r3, [pc, #68] ; (22cc <serial3_end+0x48>)
2288: 681b ldr r3, [r3, #0]
228a: 04db lsls r3, r3, #19
228c: d400 bmi.n 2290 <serial3_end+0xc>
228e: bd08 pop {r3, pc}
while (transmitting) yield(); // wait for buffered data to send
2290: 4b0f ldr r3, [pc, #60] ; (22d0 <serial3_end+0x4c>)
2292: 781a ldrb r2, [r3, #0]
2294: f002 03ff and.w r3, r2, #255 ; 0xff
2298: b112 cbz r2, 22a0 <serial3_end+0x1c>
229a: f7ff f8d1 bl 1440 <yield>
229e: e7f7 b.n 2290 <serial3_end+0xc>
NVIC_DISABLE_IRQ(IRQ_UART2_STATUS);
22a0: 4a0c ldr r2, [pc, #48] ; (22d4 <serial3_end+0x50>)
22a2: f44f 1180 mov.w r1, #1048576 ; 0x100000
22a6: 6011 str r1, [r2, #0]
UART2_C2 = 0;
22a8: 4a0b ldr r2, [pc, #44] ; (22d8 <serial3_end+0x54>)
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
22aa: 490c ldr r1, [pc, #48] ; (22dc <serial3_end+0x58>)
void serial3_end(void)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
while (transmitting) yield(); // wait for buffered data to send
NVIC_DISABLE_IRQ(IRQ_UART2_STATUS);
UART2_C2 = 0;
22ac: 70d3 strb r3, [r2, #3]
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
22ae: f240 1203 movw r2, #259 ; 0x103
22b2: 600a str r2, [r1, #0]
CORE_PIN8_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1);
22b4: 604a str r2, [r1, #4]
rx_buffer_head = 0;
22b6: 4a0a ldr r2, [pc, #40] ; (22e0 <serial3_end+0x5c>)
22b8: 7013 strb r3, [r2, #0]
rx_buffer_tail = 0;
22ba: 4a0a ldr r2, [pc, #40] ; (22e4 <serial3_end+0x60>)
22bc: 7013 strb r3, [r2, #0]
if (rts_pin) rts_deassert();
22be: 4b0a ldr r3, [pc, #40] ; (22e8 <serial3_end+0x64>)
22c0: 681b ldr r3, [r3, #0]
22c2: b10b cbz r3, 22c8 <serial3_end+0x44>
22c4: 2201 movs r2, #1
22c6: 701a strb r2, [r3, #0]
22c8: bd08 pop {r3, pc}
22ca: bf00 nop
22cc: 40048034 .word 0x40048034
22d0: 1fffe880 .word 0x1fffe880
22d4: e000e180 .word 0xe000e180
22d8: 4006c000 .word 0x4006c000
22dc: 4004c008 .word 0x4004c008
22e0: 1fffe8ea .word 0x1fffe8ea
22e4: 1fffe881 .word 0x1fffe881
22e8: 1fffe87c .word 0x1fffe87c
000022ec <serial3_set_transmit_pin>:
}
void serial3_set_transmit_pin(uint8_t pin)
{
22ec: b538 push {r3, r4, r5, lr}
22ee: 4604 mov r4, r0
while (transmitting) ;
22f0: 4b09 ldr r3, [pc, #36] ; (2318 <serial3_set_transmit_pin+0x2c>)
22f2: 781b ldrb r3, [r3, #0]
22f4: f003 05ff and.w r5, r3, #255 ; 0xff
22f8: 2b00 cmp r3, #0
22fa: d1f9 bne.n 22f0 <serial3_set_transmit_pin+0x4>
pinMode(pin, OUTPUT);
22fc: 4620 mov r0, r4
22fe: 2101 movs r1, #1
2300: f7fe fa02 bl 708 <pinMode>
digitalWrite(pin, LOW);
2304: 4620 mov r0, r4
2306: 4629 mov r1, r5
2308: f7fe f9de bl 6c8 <digitalWrite>
transmit_pin = portOutputRegister(pin);
230c: 4b03 ldr r3, [pc, #12] ; (231c <serial3_set_transmit_pin+0x30>)
230e: f853 2034 ldr.w r2, [r3, r4, lsl #3]
2312: 4b03 ldr r3, [pc, #12] ; (2320 <serial3_set_transmit_pin+0x34>)
2314: 601a str r2, [r3, #0]
2316: bd38 pop {r3, r4, r5, pc}
2318: 1fffe880 .word 0x1fffe880
231c: 00002a94 .word 0x00002a94
2320: 1fffe8ec .word 0x1fffe8ec
00002324 <serial3_set_tx>:
transmit_mask = digitalPinToBitMask(pin);
#endif
}
void serial3_set_tx(uint8_t pin, uint8_t opendrain)
{
2324: b510 push {r4, lr}
uint32_t cfg;
if (opendrain) pin |= 128;
2326: b109 cbz r1, 232c <serial3_set_tx+0x8>
2328: f040 0080 orr.w r0, r0, #128 ; 0x80
if (pin == tx_pin_num) return;
232c: 4a0e ldr r2, [pc, #56] ; (2368 <serial3_set_tx+0x44>)
232e: 7813 ldrb r3, [r2, #0]
2330: 4298 cmp r0, r3
2332: d017 beq.n 2364 <serial3_set_tx+0x40>
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) {
2334: 4c0d ldr r4, [pc, #52] ; (236c <serial3_set_tx+0x48>)
2336: 6824 ldr r4, [r4, #0]
2338: 04e4 lsls r4, r4, #19
233a: d512 bpl.n 2362 <serial3_set_tx+0x3e>
switch (tx_pin_num & 127) {
233c: f003 037f and.w r3, r3, #127 ; 0x7f
2340: 2b08 cmp r3, #8
2342: d102 bne.n 234a <serial3_set_tx+0x26>
case 8: CORE_PIN8_CONFIG = 0; break; // PTD3
2344: 4b0a ldr r3, [pc, #40] ; (2370 <serial3_set_tx+0x4c>)
2346: 2400 movs r4, #0
2348: 601c str r4, [r3, #0]
#if defined(KINETISL)
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
234a: 2900 cmp r1, #0
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
234c: f000 037f and.w r3, r0, #127 ; 0x7f
#if defined(KINETISL)
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5
#endif
}
if (opendrain) {
cfg = PORT_PCR_DSE | PORT_PCR_ODE;
2350: bf0c ite eq
2352: 2144 moveq r1, #68 ; 0x44
2354: 2160 movne r1, #96 ; 0x60
} else {
cfg = PORT_PCR_DSE | PORT_PCR_SRE;
}
switch (pin & 127) {
2356: 2b08 cmp r3, #8
2358: d103 bne.n 2362 <serial3_set_tx+0x3e>
case 8: CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break;
235a: 4b05 ldr r3, [pc, #20] ; (2370 <serial3_set_tx+0x4c>)
235c: f441 7140 orr.w r1, r1, #768 ; 0x300
2360: 6019 str r1, [r3, #0]
#if defined(KINETISL)
case 20: CORE_PIN20_CONFIG = cfg | PORT_PCR_MUX(3); break;
#endif
}
}
tx_pin_num = pin;
2362: 7010 strb r0, [r2, #0]
2364: bd10 pop {r4, pc}
2366: bf00 nop
2368: 1fffe569 .word 0x1fffe569
236c: 40048034 .word 0x40048034
2370: 4004c00c .word 0x4004c00c
00002374 <serial3_set_rx>:
}
void serial3_set_rx(uint8_t pin)
{
2374: 4770 bx lr
2376: ffff 4a0d vtbl.8 d20, {d15-d17}, d13
00002378 <serial3_set_rts>:
#endif
}
int serial3_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
2378: 4a0d ldr r2, [pc, #52] ; (23b0 <serial3_set_rts+0x38>)
rx_pin_num = pin;
#endif
}
int serial3_set_rts(uint8_t pin)
{
237a: b538 push {r3, r4, r5, lr}
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
237c: 6814 ldr r4, [r2, #0]
237e: f414 5280 ands.w r2, r4, #4096 ; 0x1000
2382: f04f 0400 mov.w r4, #0
2386: d010 beq.n 23aa <serial3_set_rts+0x32>
if (pin < CORE_NUM_DIGITAL) {
2388: 2821 cmp r0, #33 ; 0x21
238a: 4d0a ldr r5, [pc, #40] ; (23b4 <serial3_set_rts+0x3c>)
238c: d80a bhi.n 23a4 <serial3_set_rts+0x2c>
rts_pin = portOutputRegister(pin);
238e: 4a0a ldr r2, [pc, #40] ; (23b8 <serial3_set_rts+0x40>)
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
2390: 2101 movs r1, #1
int serial3_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
if (pin < CORE_NUM_DIGITAL) {
rts_pin = portOutputRegister(pin);
2392: f852 3030 ldr.w r3, [r2, r0, lsl #3]
2396: 602b str r3, [r5, #0]
#if defined(KINETISL)
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
2398: f7fe f9b6 bl 708 <pinMode>
rts_assert();
239c: 682b ldr r3, [r5, #0]
239e: 701c strb r4, [r3, #0]
UART2_MODEM &= ~UART_MODEM_RXRTSE;
return 0;
}
UART2_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
23a0: 2001 movs r0, #1
23a2: bd38 pop {r3, r4, r5, pc}
rts_mask = digitalPinToBitMask(pin);
#endif
pinMode(pin, OUTPUT);
rts_assert();
} else {
rts_pin = NULL;
23a4: 602c str r4, [r5, #0]
return 0;
23a6: 4620 mov r0, r4
23a8: bd38 pop {r3, r4, r5, pc}
#endif
}
int serial3_set_rts(uint8_t pin)
{
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
23aa: 4610 mov r0, r2
return 0;
}
UART2_MODEM |= UART_MODEM_RXRTSE;
*/
return 1;
}
23ac: bd38 pop {r3, r4, r5, pc}
23ae: bf00 nop
23b0: 40048034 .word 0x40048034
23b4: 1fffe87c .word 0x1fffe87c
23b8: 00002a94 .word 0x00002a94
000023bc <serial3_set_cts>:
int serial3_set_cts(uint8_t pin)
{
#if defined(KINETISK)
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
23bc: 4b0b ldr r3, [pc, #44] ; (23ec <serial3_set_cts+0x30>)
23be: 681b ldr r3, [r3, #0]
23c0: f413 5380 ands.w r3, r3, #4096 ; 0x1000
23c4: d010 beq.n 23e8 <serial3_set_cts+0x2c>
if (pin == 14) {
23c6: 280e cmp r0, #14
23c8: 4b09 ldr r3, [pc, #36] ; (23f0 <serial3_set_cts+0x34>)
23ca: d109 bne.n 23e0 <serial3_set_cts+0x24>
CORE_PIN14_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
23cc: 4a09 ldr r2, [pc, #36] ; (23f4 <serial3_set_cts+0x38>)
23ce: f240 3102 movw r1, #770 ; 0x302
23d2: 6011 str r1, [r2, #0]
} else {
UART2_MODEM &= ~UART_MODEM_TXCTSE;
return 0;
}
UART2_MODEM |= UART_MODEM_TXCTSE;
23d4: 7b5a ldrb r2, [r3, #13]
23d6: f042 0201 orr.w r2, r2, #1
23da: 735a strb r2, [r3, #13]
return 1;
23dc: 2001 movs r0, #1
23de: 4770 bx lr
#if defined(KINETISK)
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0;
if (pin == 14) {
CORE_PIN14_CONFIG = PORT_PCR_MUX(3) | PORT_PCR_PE; // weak pulldown
} else {
UART2_MODEM &= ~UART_MODEM_TXCTSE;
23e0: 7b5a ldrb r2, [r3, #13]
23e2: f002 02fe and.w r2, r2, #254 ; 0xfe
23e6: 735a strb r2, [r3, #13]
return 0;
23e8: 2000 movs r0, #0
23ea: 4770 bx lr
23ec: 40048034 .word 0x40048034
23f0: 4006c000 .word 0x4006c000
23f4: 4004c004 .word 0x4004c004
000023f8 <serial3_putchar>:
return 0;
#endif
}
void serial3_putchar(uint32_t c)
{
23f8: b5f8 push {r3, r4, r5, r6, r7, lr}
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
23fa: 4b1d ldr r3, [pc, #116] ; (2470 <serial3_putchar+0x78>)
23fc: 681b ldr r3, [r3, #0]
23fe: 04da lsls r2, r3, #19
return 0;
#endif
}
void serial3_putchar(uint32_t c)
{
2400: 4606 mov r6, r0
uint32_t head, n;
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return;
2402: d533 bpl.n 246c <serial3_putchar+0x74>
if (transmit_pin) transmit_assert();
2404: 4b1b ldr r3, [pc, #108] ; (2474 <serial3_putchar+0x7c>)
2406: 681b ldr r3, [r3, #0]
2408: b10b cbz r3, 240e <serial3_putchar+0x16>
240a: 2201 movs r2, #1
240c: 701a strb r2, [r3, #0]
head = tx_buffer_head;
240e: 4b1a ldr r3, [pc, #104] ; (2478 <serial3_putchar+0x80>)
2410: 781c ldrb r4, [r3, #0]
if (++head >= TX_BUFFER_SIZE) head = 0;
2412: 3401 adds r4, #1
2414: 2c28 cmp r4, #40 ; 0x28
2416: 461f mov r7, r3
2418: bf28 it cs
241a: 2400 movcs r4, #0
while (tx_buffer_tail == head) {
241c: 4d17 ldr r5, [pc, #92] ; (247c <serial3_putchar+0x84>)
241e: 782b ldrb r3, [r5, #0]
2420: 42a3 cmp r3, r4
2422: d118 bne.n 2456 <serial3_putchar+0x5e>
int priority = nvic_execution_priority();
2424: f7ff f8a4 bl 1570 <nvic_execution_priority>
if (priority <= IRQ_PRIORITY) {
2428: 2840 cmp r0, #64 ; 0x40
242a: dc0f bgt.n 244c <serial3_putchar+0x54>
if ((UART2_S1 & UART_S1_TDRE)) {
242c: 4a14 ldr r2, [pc, #80] ; (2480 <serial3_putchar+0x88>)
242e: 7913 ldrb r3, [r2, #4]
2430: 061b lsls r3, r3, #24
2432: d5f3 bpl.n 241c <serial3_putchar+0x24>
uint32_t tail = tx_buffer_tail;
2434: 782b ldrb r3, [r5, #0]
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
2436: 4913 ldr r1, [pc, #76] ; (2484 <serial3_putchar+0x8c>)
while (tx_buffer_tail == head) {
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART2_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
2438: 3301 adds r3, #1
243a: 2b28 cmp r3, #40 ; 0x28
243c: bf28 it cs
243e: 2300 movcs r3, #0
n = tx_buffer[tail];
2440: 5cc9 ldrb r1, [r1, r3]
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2);
UART2_D = n;
tx_buffer_tail = tail;
2442: b2db uxtb r3, r3
int priority = nvic_execution_priority();
if (priority <= IRQ_PRIORITY) {
if ((UART2_S1 & UART_S1_TDRE)) {
uint32_t tail = tx_buffer_tail;
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
2444: b2c9 uxtb r1, r1
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2);
UART2_D = n;
2446: 71d1 strb r1, [r2, #7]
tx_buffer_tail = tail;
2448: 702b strb r3, [r5, #0]
244a: e7e7 b.n 241c <serial3_putchar+0x24>
}
} else if (priority >= 256) {
244c: 28ff cmp r0, #255 ; 0xff
244e: dde5 ble.n 241c <serial3_putchar+0x24>
yield(); // wait
2450: f7fe fff6 bl 1440 <yield>
2454: e7e2 b.n 241c <serial3_putchar+0x24>
}
}
tx_buffer[head] = c;
2456: 4b0b ldr r3, [pc, #44] ; (2484 <serial3_putchar+0x8c>)
2458: b2f6 uxtb r6, r6
245a: 551e strb r6, [r3, r4]
transmitting = 1;
245c: 4b0a ldr r3, [pc, #40] ; (2488 <serial3_putchar+0x90>)
245e: 2201 movs r2, #1
2460: 701a strb r2, [r3, #0]
tx_buffer_head = head;
UART2_C2 = C2_TX_ACTIVE;
2462: 4b07 ldr r3, [pc, #28] ; (2480 <serial3_putchar+0x88>)
yield(); // wait
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
2464: b2e4 uxtb r4, r4
UART2_C2 = C2_TX_ACTIVE;
2466: 22ac movs r2, #172 ; 0xac
yield(); // wait
}
}
tx_buffer[head] = c;
transmitting = 1;
tx_buffer_head = head;
2468: 703c strb r4, [r7, #0]
UART2_C2 = C2_TX_ACTIVE;
246a: 70da strb r2, [r3, #3]
246c: bdf8 pop {r3, r4, r5, r6, r7, pc}
246e: bf00 nop
2470: 40048034 .word 0x40048034
2474: 1fffe8ec .word 0x1fffe8ec
2478: 1fffe8f0 .word 0x1fffe8f0
247c: 1fffe8eb .word 0x1fffe8eb
2480: 4006c000 .word 0x4006c000
2484: 1fffe882 .word 0x1fffe882
2488: 1fffe880 .word 0x1fffe880
0000248c <serial3_write>:
}
void serial3_write(const void *buf, unsigned int count)
{
248c: b538 push {r3, r4, r5, lr}
248e: 4604 mov r4, r0
2490: 1845 adds r5, r0, r1
const uint8_t *p = (const uint8_t *)buf;
while (count-- > 0) serial3_putchar(*p++);
2492: 42ac cmp r4, r5
2494: d004 beq.n 24a0 <serial3_write+0x14>
2496: f814 0b01 ldrb.w r0, [r4], #1
249a: f7ff ffad bl 23f8 <serial3_putchar>
249e: e7f8 b.n 2492 <serial3_write+0x6>
}
24a0: bd38 pop {r3, r4, r5, pc}
24a2: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8
000024a4 <serial3_flush>:
void serial3_flush(void)
{
24a4: b508 push {r3, lr}
while (transmitting) yield(); // wait
24a6: 4b03 ldr r3, [pc, #12] ; (24b4 <serial3_flush+0x10>)
24a8: 781b ldrb r3, [r3, #0]
24aa: b113 cbz r3, 24b2 <serial3_flush+0xe>
24ac: f7fe ffc8 bl 1440 <yield>
24b0: e7f9 b.n 24a6 <serial3_flush+0x2>
}
24b2: bd08 pop {r3, pc}
24b4: 1fffe880 .word 0x1fffe880
000024b8 <serial3_write_buffer_free>:
int serial3_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
tail = tx_buffer_tail;
24b8: 4a06 ldr r2, [pc, #24] ; (24d4 <serial3_write_buffer_free+0x1c>)
int serial3_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
24ba: 4b07 ldr r3, [pc, #28] ; (24d8 <serial3_write_buffer_free+0x20>)
24bc: 781b ldrb r3, [r3, #0]
tail = tx_buffer_tail;
24be: 7810 ldrb r0, [r2, #0]
int serial3_write_buffer_free(void)
{
uint32_t head, tail;
head = tx_buffer_head;
24c0: b2db uxtb r3, r3
tail = tx_buffer_tail;
24c2: b2c0 uxtb r0, r0
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail;
24c4: 4283 cmp r3, r0
24c6: bf2c ite cs
24c8: 3027 addcs r0, #39 ; 0x27
return tail - head - 1;
24ca: f100 30ff addcc.w r0, r0, #4294967295 ; 0xffffffff
24ce: 1ac0 subs r0, r0, r3
}
24d0: 4770 bx lr
24d2: bf00 nop
24d4: 1fffe8eb .word 0x1fffe8eb
24d8: 1fffe8f0 .word 0x1fffe8f0
000024dc <serial3_available>:
int serial3_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
24dc: 4b05 ldr r3, [pc, #20] ; (24f4 <serial3_available+0x18>)
24de: 7818 ldrb r0, [r3, #0]
tail = rx_buffer_tail;
24e0: 4b05 ldr r3, [pc, #20] ; (24f8 <serial3_available+0x1c>)
24e2: 781b ldrb r3, [r3, #0]
int serial3_available(void)
{
uint32_t head, tail;
head = rx_buffer_head;
24e4: b2c0 uxtb r0, r0
tail = rx_buffer_tail;
24e6: b2db uxtb r3, r3
if (head >= tail) return head - tail;
24e8: 4298 cmp r0, r3
return RX_BUFFER_SIZE + head - tail;
24ea: bf38 it cc
24ec: 3040 addcc r0, #64 ; 0x40
24ee: 1ac0 subs r0, r0, r3
}
24f0: 4770 bx lr
24f2: bf00 nop
24f4: 1fffe8ea .word 0x1fffe8ea
24f8: 1fffe881 .word 0x1fffe881
000024fc <serial3_getchar>:
int serial3_getchar(void)
{
24fc: b510 push {r4, lr}
uint32_t head, tail;
int c;
head = rx_buffer_head;
24fe: 4b10 ldr r3, [pc, #64] ; (2540 <serial3_getchar+0x44>)
tail = rx_buffer_tail;
2500: 4910 ldr r1, [pc, #64] ; (2544 <serial3_getchar+0x48>)
int serial3_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
2502: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
2504: 780b ldrb r3, [r1, #0]
int serial3_getchar(void)
{
uint32_t head, tail;
int c;
head = rx_buffer_head;
2506: b2d2 uxtb r2, r2
tail = rx_buffer_tail;
2508: b2db uxtb r3, r3
if (head == tail) return -1;
250a: 429a cmp r2, r3
250c: d014 beq.n 2538 <serial3_getchar+0x3c>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
250e: 3301 adds r3, #1
2510: 2b40 cmp r3, #64 ; 0x40
2512: bf28 it cs
2514: 2300 movcs r3, #0
c = rx_buffer[tail];
2516: 480c ldr r0, [pc, #48] ; (2548 <serial3_getchar+0x4c>)
rx_buffer_tail = tail;
2518: b2dc uxtb r4, r3
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
251a: 5cc0 ldrb r0, [r0, r3]
rx_buffer_tail = tail;
251c: 700c strb r4, [r1, #0]
if (rts_pin) {
251e: 490b ldr r1, [pc, #44] ; (254c <serial3_getchar+0x50>)
2520: 6809 ldr r1, [r1, #0]
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
if (++tail >= RX_BUFFER_SIZE) tail = 0;
c = rx_buffer[tail];
2522: b2c0 uxtb r0, r0
rx_buffer_tail = tail;
if (rts_pin) {
2524: b151 cbz r1, 253c <serial3_getchar+0x40>
int avail;
if (head >= tail) avail = head - tail;
2526: 429a cmp r2, r3
else avail = RX_BUFFER_SIZE + head - tail;
2528: bf38 it cc
252a: 3240 addcc r2, #64 ; 0x40
252c: 1ad3 subs r3, r2, r3
if (avail <= RTS_LOW_WATERMARK) rts_assert();
252e: 2b1a cmp r3, #26
2530: dc04 bgt.n 253c <serial3_getchar+0x40>
2532: 2300 movs r3, #0
2534: 700b strb r3, [r1, #0]
2536: bd10 pop {r4, pc}
uint32_t head, tail;
int c;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
2538: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (head >= tail) avail = head - tail;
else avail = RX_BUFFER_SIZE + head - tail;
if (avail <= RTS_LOW_WATERMARK) rts_assert();
}
return c;
}
253c: bd10 pop {r4, pc}
253e: bf00 nop
2540: 1fffe8ea .word 0x1fffe8ea
2544: 1fffe881 .word 0x1fffe881
2548: 1fffe8aa .word 0x1fffe8aa
254c: 1fffe87c .word 0x1fffe87c
00002550 <serial3_peek>:
int serial3_peek(void)
{
uint32_t head, tail;
head = rx_buffer_head;
2550: 4b08 ldr r3, [pc, #32] ; (2574 <serial3_peek+0x24>)
2552: 781a ldrb r2, [r3, #0]
tail = rx_buffer_tail;
2554: 4b08 ldr r3, [pc, #32] ; (2578 <serial3_peek+0x28>)
2556: 781b ldrb r3, [r3, #0]
2558: b2db uxtb r3, r3
if (head == tail) return -1;
255a: 429a cmp r2, r3
255c: d007 beq.n 256e <serial3_peek+0x1e>
if (++tail >= RX_BUFFER_SIZE) tail = 0;
255e: 3301 adds r3, #1
2560: 2b40 cmp r3, #64 ; 0x40
2562: bf28 it cs
2564: 2300 movcs r3, #0
return rx_buffer[tail];
2566: 4a05 ldr r2, [pc, #20] ; (257c <serial3_peek+0x2c>)
2568: 5cd0 ldrb r0, [r2, r3]
256a: b2c0 uxtb r0, r0
256c: 4770 bx lr
{
uint32_t head, tail;
head = rx_buffer_head;
tail = rx_buffer_tail;
if (head == tail) return -1;
256e: f04f 30ff mov.w r0, #4294967295 ; 0xffffffff
if (++tail >= RX_BUFFER_SIZE) tail = 0;
return rx_buffer[tail];
}
2572: 4770 bx lr
2574: 1fffe8ea .word 0x1fffe8ea
2578: 1fffe881 .word 0x1fffe881
257c: 1fffe8aa .word 0x1fffe8aa
00002580 <serial3_clear>:
void serial3_clear(void)
{
rx_buffer_head = rx_buffer_tail;
2580: 4b05 ldr r3, [pc, #20] ; (2598 <serial3_clear+0x18>)
2582: 781a ldrb r2, [r3, #0]
2584: 4b05 ldr r3, [pc, #20] ; (259c <serial3_clear+0x1c>)
2586: b2d2 uxtb r2, r2
2588: 701a strb r2, [r3, #0]
if (rts_pin) rts_assert();
258a: 4b05 ldr r3, [pc, #20] ; (25a0 <serial3_clear+0x20>)
258c: 681b ldr r3, [r3, #0]
258e: b10b cbz r3, 2594 <serial3_clear+0x14>
2590: 2200 movs r2, #0
2592: 701a strb r2, [r3, #0]
2594: 4770 bx lr
2596: bf00 nop
2598: 1fffe881 .word 0x1fffe881
259c: 1fffe8ea .word 0x1fffe8ea
25a0: 1fffe87c .word 0x1fffe87c
000025a4 <uart2_status_isr>:
// Receive data above watermark UART_S1_RDRF
// LIN break detect UART_S2_LBKDIF
// RxD pin active edge UART_S2_RXEDGIF
void uart2_status_isr(void)
{
25a4: b510 push {r4, lr}
uint32_t head, tail, n;
uint8_t c;
if (UART2_S1 & UART_S1_RDRF) {
25a6: 4b29 ldr r3, [pc, #164] ; (264c <uart2_status_isr+0xa8>)
25a8: 791a ldrb r2, [r3, #4]
25aa: 0692 lsls r2, r2, #26
25ac: d520 bpl.n 25f0 <uart2_status_isr+0x4c>
if (use9Bits && (UART2_C3 & 0x80)) {
n = UART2_D | 0x100;
} else {
n = UART2_D;
}
head = rx_buffer_head + 1;
25ae: 4a28 ldr r2, [pc, #160] ; (2650 <uart2_status_isr+0xac>)
if (UART2_S1 & UART_S1_RDRF) {
if (use9Bits && (UART2_C3 & 0x80)) {
n = UART2_D | 0x100;
} else {
n = UART2_D;
25b0: 79d8 ldrb r0, [r3, #7]
}
head = rx_buffer_head + 1;
25b2: 7813 ldrb r3, [r2, #0]
if (head >= RX_BUFFER_SIZE) head = 0;
if (head != rx_buffer_tail) {
25b4: 4927 ldr r1, [pc, #156] ; (2654 <uart2_status_isr+0xb0>)
if (use9Bits && (UART2_C3 & 0x80)) {
n = UART2_D | 0x100;
} else {
n = UART2_D;
}
head = rx_buffer_head + 1;
25b6: 3301 adds r3, #1
if (head >= RX_BUFFER_SIZE) head = 0;
25b8: 2b40 cmp r3, #64 ; 0x40
if (head != rx_buffer_tail) {
25ba: 7809 ldrb r1, [r1, #0]
n = UART2_D | 0x100;
} else {
n = UART2_D;
}
head = rx_buffer_head + 1;
if (head >= RX_BUFFER_SIZE) head = 0;
25bc: bf28 it cs
25be: 2300 movcs r3, #0
if (head != rx_buffer_tail) {
25c0: 428b cmp r3, r1
if (UART2_S1 & UART_S1_RDRF) {
if (use9Bits && (UART2_C3 & 0x80)) {
n = UART2_D | 0x100;
} else {
n = UART2_D;
25c2: b2c0 uxtb r0, r0
}
head = rx_buffer_head + 1;
if (head >= RX_BUFFER_SIZE) head = 0;
if (head != rx_buffer_tail) {
25c4: d003 beq.n 25ce <uart2_status_isr+0x2a>
rx_buffer[head] = n;
25c6: 4924 ldr r1, [pc, #144] ; (2658 <uart2_status_isr+0xb4>)
25c8: 54c8 strb r0, [r1, r3]
rx_buffer_head = head;
25ca: b2d9 uxtb r1, r3
25cc: 7011 strb r1, [r2, #0]
}
if (rts_pin) {
25ce: 4a23 ldr r2, [pc, #140] ; (265c <uart2_status_isr+0xb8>)
25d0: 6811 ldr r1, [r2, #0]
25d2: b169 cbz r1, 25f0 <uart2_status_isr+0x4c>
int avail;
tail = tx_buffer_tail;
25d4: 4a22 ldr r2, [pc, #136] ; (2660 <uart2_status_isr+0xbc>)
25d6: 7812 ldrb r2, [r2, #0]
25d8: b2d2 uxtb r2, r2
if (head >= tail) avail = head - tail;
25da: 4293 cmp r3, r2
else avail = RX_BUFFER_SIZE + head - tail;
25dc: bf36 itet cc
25de: f1c2 0240 rsbcc r2, r2, #64 ; 0x40
rx_buffer_head = head;
}
if (rts_pin) {
int avail;
tail = tx_buffer_tail;
if (head >= tail) avail = head - tail;
25e2: ebc2 0303 rsbcs r3, r2, r3
else avail = RX_BUFFER_SIZE + head - tail;
25e6: 189b addcc r3, r3, r2
if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
25e8: 2b27 cmp r3, #39 ; 0x27
25ea: bfc4 itt gt
25ec: 2301 movgt r3, #1
25ee: 700b strbgt r3, [r1, #0]
}
}
c = UART2_C2;
25f0: 4a16 ldr r2, [pc, #88] ; (264c <uart2_status_isr+0xa8>)
25f2: 78d1 ldrb r1, [r2, #3]
25f4: b2c9 uxtb r1, r1
if ((c & UART_C2_TIE) && (UART2_S1 & UART_S1_TDRE)) {
25f6: 060c lsls r4, r1, #24
25f8: d516 bpl.n 2628 <uart2_status_isr+0x84>
25fa: 7913 ldrb r3, [r2, #4]
25fc: 0618 lsls r0, r3, #24
25fe: d513 bpl.n 2628 <uart2_status_isr+0x84>
head = tx_buffer_head;
2600: 4b18 ldr r3, [pc, #96] ; (2664 <uart2_status_isr+0xc0>)
tail = tx_buffer_tail;
2602: 4817 ldr r0, [pc, #92] ; (2660 <uart2_status_isr+0xbc>)
if (avail >= RTS_HIGH_WATERMARK) rts_deassert();
}
}
c = UART2_C2;
if ((c & UART_C2_TIE) && (UART2_S1 & UART_S1_TDRE)) {
head = tx_buffer_head;
2604: 781c ldrb r4, [r3, #0]
tail = tx_buffer_tail;
2606: 7803 ldrb r3, [r0, #0]
2608: b2db uxtb r3, r3
if (head == tail) {
260a: 429c cmp r4, r3
260c: d102 bne.n 2614 <uart2_status_isr+0x70>
UART2_C2 = C2_TX_COMPLETING;
260e: 236c movs r3, #108 ; 0x6c
2610: 70d3 strb r3, [r2, #3]
2612: e009 b.n 2628 <uart2_status_isr+0x84>
} else {
if (++tail >= TX_BUFFER_SIZE) tail = 0;
2614: 3301 adds r3, #1
2616: 2b28 cmp r3, #40 ; 0x28
2618: bf28 it cs
261a: 2300 movcs r3, #0
n = tx_buffer[tail];
261c: 4c12 ldr r4, [pc, #72] ; (2668 <uart2_status_isr+0xc4>)
261e: 5ce4 ldrb r4, [r4, r3]
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2);
UART2_D = n;
tx_buffer_tail = tail;
2620: b2db uxtb r3, r3
tail = tx_buffer_tail;
if (head == tail) {
UART2_C2 = C2_TX_COMPLETING;
} else {
if (++tail >= TX_BUFFER_SIZE) tail = 0;
n = tx_buffer[tail];
2622: b2e4 uxtb r4, r4
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2);
UART2_D = n;
2624: 71d4 strb r4, [r2, #7]
tx_buffer_tail = tail;
2626: 7003 strb r3, [r0, #0]
}
}
if ((c & UART_C2_TCIE) && (UART2_S1 & UART_S1_TC)) {
2628: 064b lsls r3, r1, #25
262a: d50e bpl.n 264a <uart2_status_isr+0xa6>
262c: 4b07 ldr r3, [pc, #28] ; (264c <uart2_status_isr+0xa8>)
262e: 791a ldrb r2, [r3, #4]
2630: f012 0f40 tst.w r2, #64 ; 0x40
2634: 4619 mov r1, r3
2636: d008 beq.n 264a <uart2_status_isr+0xa6>
transmitting = 0;
2638: 4b0c ldr r3, [pc, #48] ; (266c <uart2_status_isr+0xc8>)
263a: 2200 movs r2, #0
263c: 701a strb r2, [r3, #0]
if (transmit_pin) transmit_deassert();
263e: 4b0c ldr r3, [pc, #48] ; (2670 <uart2_status_isr+0xcc>)
2640: 681b ldr r3, [r3, #0]
2642: b103 cbz r3, 2646 <uart2_status_isr+0xa2>
2644: 701a strb r2, [r3, #0]
UART2_C2 = C2_TX_INACTIVE;
2646: 232c movs r3, #44 ; 0x2c
2648: 70cb strb r3, [r1, #3]
264a: bd10 pop {r4, pc}
264c: 4006c000 .word 0x4006c000
2650: 1fffe8ea .word 0x1fffe8ea
2654: 1fffe881 .word 0x1fffe881
2658: 1fffe8aa .word 0x1fffe8aa
265c: 1fffe87c .word 0x1fffe87c
2660: 1fffe8eb .word 0x1fffe8eb
2664: 1fffe8f0 .word 0x1fffe8f0
2668: 1fffe882 .word 0x1fffe882
266c: 1fffe880 .word 0x1fffe880
2670: 1fffe8ec .word 0x1fffe8ec
00002674 <usb_init_serialnumber>:
3,
{0,0,0,0,0,0,0,0,0,0}
};
void usb_init_serialnumber(void)
{
2674: b51f push {r0, r1, r2, r3, r4, lr}
char buf[11];
uint32_t i, num;
__disable_irq();
2676: b672 cpsid i
FTFL_FSTAT = FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL;
2678: 4b15 ldr r3, [pc, #84] ; (26d0 <usb_init_serialnumber+0x5c>)
267a: 2270 movs r2, #112 ; 0x70
267c: 701a strb r2, [r3, #0]
FTFL_FCCOB0 = 0x41;
267e: 4a15 ldr r2, [pc, #84] ; (26d4 <usb_init_serialnumber+0x60>)
2680: 2141 movs r1, #65 ; 0x41
2682: 7011 strb r1, [r2, #0]
FTFL_FCCOB1 = 15;
2684: 210f movs r1, #15
2686: f802 1c01 strb.w r1, [r2, #-1]
FTFL_FSTAT = FTFL_FSTAT_CCIF;
268a: 2280 movs r2, #128 ; 0x80
268c: 701a strb r2, [r3, #0]
while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait
268e: 781a ldrb r2, [r3, #0]
2690: 0612 lsls r2, r2, #24
2692: d5fc bpl.n 268e <usb_init_serialnumber+0x1a>
num = *(uint32_t *)&FTFL_FCCOB7;
2694: 4b10 ldr r3, [pc, #64] ; (26d8 <usb_init_serialnumber+0x64>)
2696: 6818 ldr r0, [r3, #0]
__enable_irq();
2698: b662 cpsie i
// add extra zero to work around OS-X CDC-ACM driver bug
if (num < 10000000) num = num * 10;
269a: 4b10 ldr r3, [pc, #64] ; (26dc <usb_init_serialnumber+0x68>)
269c: 4298 cmp r0, r3
269e: bf98 it ls
26a0: 230a movls r3, #10
ultoa(num, buf, 10);
26a2: ac01 add r4, sp, #4
FTFL_FSTAT = FTFL_FSTAT_CCIF;
while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait
num = *(uint32_t *)&FTFL_FCCOB7;
__enable_irq();
// add extra zero to work around OS-X CDC-ACM driver bug
if (num < 10000000) num = num * 10;
26a4: bf98 it ls
26a6: 4358 mulls r0, r3
ultoa(num, buf, 10);
26a8: 4621 mov r1, r4
26aa: 220a movs r2, #10
26ac: f7fe ff7e bl 15ac <ultoa>
for (i=0; i<10; i++) {
26b0: 2300 movs r3, #0
char c = buf[i];
26b2: 5ce1 ldrb r1, [r4, r3]
26b4: 4a0a ldr r2, [pc, #40] ; (26e0 <usb_init_serialnumber+0x6c>)
if (!c) break;
26b6: b129 cbz r1, 26c4 <usb_init_serialnumber+0x50>
26b8: eb02 0043 add.w r0, r2, r3, lsl #1
num = *(uint32_t *)&FTFL_FCCOB7;
__enable_irq();
// add extra zero to work around OS-X CDC-ACM driver bug
if (num < 10000000) num = num * 10;
ultoa(num, buf, 10);
for (i=0; i<10; i++) {
26bc: 3301 adds r3, #1
26be: 2b0a cmp r3, #10
char c = buf[i];
if (!c) break;
usb_string_serial_number_default.wString[i] = c;
26c0: 8041 strh r1, [r0, #2]
num = *(uint32_t *)&FTFL_FCCOB7;
__enable_irq();
// add extra zero to work around OS-X CDC-ACM driver bug
if (num < 10000000) num = num * 10;
ultoa(num, buf, 10);
for (i=0; i<10; i++) {
26c2: d1f6 bne.n 26b2 <usb_init_serialnumber+0x3e>
char c = buf[i];
if (!c) break;
usb_string_serial_number_default.wString[i] = c;
}
usb_string_serial_number_default.bLength = i * 2 + 2;
26c4: 3301 adds r3, #1
26c6: 005b lsls r3, r3, #1
26c8: 7013 strb r3, [r2, #0]
}
26ca: b004 add sp, #16
26cc: bd10 pop {r4, pc}
26ce: bf00 nop
26d0: 40020000 .word 0x40020000
26d4: 40020007 .word 0x40020007
26d8: 40020008 .word 0x40020008
26dc: 0098967f .word 0x0098967f
26e0: 1fffe5f2 .word 0x1fffe5f2
000026e4 <_ZN14HardwareSerial5writeEm>:
virtual int read(void) { return serial_getchar(); }
virtual void flush(void) { serial_flush(); }
virtual void clear(void) { serial_clear(); }
virtual int availableForWrite(void) { return serial_write_buffer_free(); }
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
26e4: b508 push {r3, lr}
26e6: 6803 ldr r3, [r0, #0]
26e8: b2c9 uxtb r1, r1
26ea: 681b ldr r3, [r3, #0]
26ec: 4798 blx r3
26ee: bd08 pop {r3, pc}
000026f0 <_ZN14HardwareSerial5writeEl>:
virtual size_t write(long n) { return write((uint8_t)n); }
26f0: b508 push {r3, lr}
26f2: 6803 ldr r3, [r0, #0]
26f4: b2c9 uxtb r1, r1
26f6: 681b ldr r3, [r3, #0]
26f8: 4798 blx r3
26fa: bd08 pop {r3, pc}
000026fc <_ZN14HardwareSerial5writeEj>:
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
26fc: b508 push {r3, lr}
26fe: 6803 ldr r3, [r0, #0]
2700: b2c9 uxtb r1, r1
2702: 681b ldr r3, [r3, #0]
2704: 4798 blx r3
2706: bd08 pop {r3, pc}
00002708 <_ZN14HardwareSerial5writeEi>:
virtual size_t write(int n) { return write((uint8_t)n); }
2708: b508 push {r3, lr}
270a: 6803 ldr r3, [r0, #0]
270c: b2c9 uxtb r1, r1
270e: 681b ldr r3, [r3, #0]
2710: 4798 blx r3
2712: bd08 pop {r3, pc}
00002714 <_ZN14HardwareSerial5beginEm>:
#ifdef __cplusplus
#include "Stream.h"
class HardwareSerial : public Stream
{
public:
virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); }
2714: 084b lsrs r3, r1, #1
2716: f103 6037 add.w r0, r3, #191889408 ; 0xb700000
271a: f500 30d8 add.w r0, r0, #110592 ; 0x1b000
271e: fbb0 f0f1 udiv r0, r0, r1
2722: f7fe bf61 b.w 15e8 <serial_begin>
00002726 <_ZN14HardwareSerial5beginEmm>:
virtual void begin(uint32_t baud, uint32_t format) {
2726: b510 push {r4, lr}
serial_begin(BAUD2DIV(baud));
2728: 084b lsrs r3, r1, #1
272a: f103 6037 add.w r0, r3, #191889408 ; 0xb700000
272e: f500 30d8 add.w r0, r0, #110592 ; 0x1b000
#include "Stream.h"
class HardwareSerial : public Stream
{
public:
virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); }
virtual void begin(uint32_t baud, uint32_t format) {
2732: 4614 mov r4, r2
serial_begin(BAUD2DIV(baud));
2734: fbb0 f0f1 udiv r0, r0, r1
2738: f7fe ff56 bl 15e8 <serial_begin>
serial_format(format); }
273c: 4620 mov r0, r4
273e: e8bd 4010 ldmia.w sp!, {r4, lr}
2742: f7fe bfb5 b.w 16b0 <serial_format>
00002746 <_ZN14HardwareSerial3endEv>:
virtual void end(void) { serial_end(); }
2746: f7fe bfdd b.w 1704 <serial_end>
0000274a <_ZN14HardwareSerial17transmitterEnableEh>:
virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); }
274a: 4608 mov r0, r1
274c: f7ff b80e b.w 176c <serial_set_transmit_pin>
00002750 <_ZN14HardwareSerial5setRXEh>:
virtual void setRX(uint8_t pin) { serial_set_rx(pin); }
2750: 4608 mov r0, r1
2752: f7ff b85d b.w 1810 <serial_set_rx>
00002756 <_ZN14HardwareSerial5setTXEhb>:
virtual void setTX(uint8_t pin, bool opendrain=false) { serial_set_tx(pin, opendrain); }
2756: 4608 mov r0, r1
2758: 4611 mov r1, r2
275a: f7ff b823 b.w 17a4 <serial_set_tx>
0000275e <_ZN14HardwareSerial9attachRtsEh>:
virtual bool attachRts(uint8_t pin) { return serial_set_rts(pin); }
275e: b508 push {r3, lr}
2760: 4608 mov r0, r1
2762: f7ff f87b bl 185c <serial_set_rts>
2766: 3000 adds r0, #0
2768: bf18 it ne
276a: 2001 movne r0, #1
276c: bd08 pop {r3, pc}
0000276e <_ZN14HardwareSerial9attachCtsEh>:
virtual bool attachCts(uint8_t pin) { return serial_set_cts(pin); }
276e: b508 push {r3, lr}
2770: 4608 mov r0, r1
2772: f7ff f895 bl 18a0 <serial_set_cts>
2776: 3000 adds r0, #0
2778: bf18 it ne
277a: 2001 movne r0, #1
277c: bd08 pop {r3, pc}
0000277e <_ZN14HardwareSerial9availableEv>:
virtual int available(void) { return serial_available(); }
277e: f7ff b979 b.w 1a74 <serial_available>
00002782 <_ZN14HardwareSerial4peekEv>:
virtual int peek(void) { return serial_peek(); }
2782: f7ff b9b1 b.w 1ae8 <serial_peek>
00002786 <_ZN14HardwareSerial4readEv>:
virtual int read(void) { return serial_getchar(); }
2786: f7ff b985 b.w 1a94 <serial_getchar>
0000278a <_ZN14HardwareSerial5flushEv>:
virtual void flush(void) { serial_flush(); }
278a: f7ff b957 b.w 1a3c <serial_flush>
0000278e <_ZN14HardwareSerial5clearEv>:
virtual void clear(void) { serial_clear(); }
278e: f7ff b9c3 b.w 1b18 <serial_clear>
00002792 <_ZN14HardwareSerial17availableForWriteEv>:
virtual int availableForWrite(void) { return serial_write_buffer_free(); }
2792: f7ff b95d b.w 1a50 <serial_write_buffer_free>
00002796 <_ZN14HardwareSerial5writeEh>:
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; }
2796: b508 push {r3, lr}
2798: 4608 mov r0, r1
279a: f7ff f8a7 bl 18ec <serial_putchar>
279e: 2001 movs r0, #1
27a0: bd08 pop {r3, pc}
000027a2 <_ZN14HardwareSerial9write9bitEm>:
virtual size_t write(const uint8_t *buffer, size_t size)
{ serial_write(buffer, size); return size; }
virtual size_t write(const char *str) { size_t len = strlen(str);
serial_write((const uint8_t *)str, len);
return len; }
virtual size_t write9bit(uint32_t c) { serial_putchar(c); return 1; }
27a2: b508 push {r3, lr}
27a4: 4608 mov r0, r1
27a6: f7ff f8a1 bl 18ec <serial_putchar>
27aa: 2001 movs r0, #1
27ac: bd08 pop {r3, pc}
000027ae <_ZN14HardwareSerial5writeEPKhj>:
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
27ae: b510 push {r4, lr}
{ serial_write(buffer, size); return size; }
27b0: 4608 mov r0, r1
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
27b2: 4614 mov r4, r2
{ serial_write(buffer, size); return size; }
27b4: 4611 mov r1, r2
27b6: f7ff f8e3 bl 1980 <serial_write>
27ba: 4620 mov r0, r4
27bc: bd10 pop {r4, pc}
000027be <_ZN14HardwareSerial5writeEPKc>:
virtual size_t write(const char *str) { size_t len = strlen(str);
27be: b538 push {r3, r4, r5, lr}
27c0: 4608 mov r0, r1
27c2: 460d mov r5, r1
27c4: f000 f94c bl 2a60 <strlen>
27c8: 4604 mov r4, r0
serial_write((const uint8_t *)str, len);
27ca: 4621 mov r1, r4
27cc: 4628 mov r0, r5
27ce: f7ff f8d7 bl 1980 <serial_write>
return len; }
27d2: 4620 mov r0, r4
27d4: bd38 pop {r3, r4, r5, pc}
000027d6 <_Z12serialEvent1v>:
#include "HardwareSerial.h"
HardwareSerial Serial1;
void serialEvent1() __attribute__((weak));
void serialEvent1() {}
27d6: 4770 bx lr
000027d8 <_GLOBAL__sub_I_Serial1>:
27d8: 4b04 ldr r3, [pc, #16] ; (27ec <_GLOBAL__sub_I_Serial1+0x14>)
27da: 2200 movs r2, #0
27dc: 711a strb r2, [r3, #4]
27de: f44f 717a mov.w r1, #1000 ; 0x3e8
27e2: 731a strb r2, [r3, #12]
// C++ interface
//
#ifdef __cplusplus
#include "Stream.h"
class HardwareSerial : public Stream
27e4: 4a02 ldr r2, [pc, #8] ; (27f0 <_GLOBAL__sub_I_Serial1+0x18>)
27e6: 6099 str r1, [r3, #8]
27e8: 601a str r2, [r3, #0]
27ea: 4770 bx lr
27ec: 1fffe8f4 .word 0x1fffe8f4
27f0: 00002c30 .word 0x00002c30
000027f4 <_ZN15HardwareSerial25writeEm>:
virtual int read(void) { return serial2_getchar(); }
virtual void flush(void) { serial2_flush(); }
virtual void clear(void) { serial2_clear(); }
virtual int availableForWrite(void) { return serial2_write_buffer_free(); }
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
27f4: b508 push {r3, lr}
27f6: 6803 ldr r3, [r0, #0]
27f8: b2c9 uxtb r1, r1
27fa: 681b ldr r3, [r3, #0]
27fc: 4798 blx r3
27fe: bd08 pop {r3, pc}
00002800 <_ZN15HardwareSerial25writeEl>:
virtual size_t write(long n) { return write((uint8_t)n); }
2800: b508 push {r3, lr}
2802: 6803 ldr r3, [r0, #0]
2804: b2c9 uxtb r1, r1
2806: 681b ldr r3, [r3, #0]
2808: 4798 blx r3
280a: bd08 pop {r3, pc}
0000280c <_ZN15HardwareSerial25writeEj>:
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
280c: b508 push {r3, lr}
280e: 6803 ldr r3, [r0, #0]
2810: b2c9 uxtb r1, r1
2812: 681b ldr r3, [r3, #0]
2814: 4798 blx r3
2816: bd08 pop {r3, pc}
00002818 <_ZN15HardwareSerial25writeEi>:
virtual size_t write(int n) { return write((uint8_t)n); }
2818: b508 push {r3, lr}
281a: 6803 ldr r3, [r0, #0]
281c: b2c9 uxtb r1, r1
281e: 681b ldr r3, [r3, #0]
2820: 4798 blx r3
2822: bd08 pop {r3, pc}
00002824 <_ZN15HardwareSerial25beginEm>:
extern void serialEvent1(void);
class HardwareSerial2 : public HardwareSerial
{
public:
virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV2(baud)); }
2824: 084b lsrs r3, r1, #1
2826: f103 6037 add.w r0, r3, #191889408 ; 0xb700000
282a: f500 30d8 add.w r0, r0, #110592 ; 0x1b000
282e: fbb0 f0f1 udiv r0, r0, r1
2832: f7ff ba19 b.w 1c68 <serial2_begin>
00002836 <_ZN15HardwareSerial25beginEmm>:
virtual void begin(uint32_t baud, uint32_t format) {
2836: b510 push {r4, lr}
serial2_begin(BAUD2DIV2(baud));
2838: 084b lsrs r3, r1, #1
283a: f103 6037 add.w r0, r3, #191889408 ; 0xb700000
283e: f500 30d8 add.w r0, r0, #110592 ; 0x1b000
class HardwareSerial2 : public HardwareSerial
{
public:
virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV2(baud)); }
virtual void begin(uint32_t baud, uint32_t format) {
2842: 4614 mov r4, r2
serial2_begin(BAUD2DIV2(baud));
2844: fbb0 f0f1 udiv r0, r0, r1
2848: f7ff fa0e bl 1c68 <serial2_begin>
serial2_format(format); }
284c: 4620 mov r0, r4
284e: e8bd 4010 ldmia.w sp!, {r4, lr}
2852: f7ff ba69 b.w 1d28 <serial2_format>
00002856 <_ZN15HardwareSerial23endEv>:
virtual void end(void) { serial2_end(); }
2856: f7ff ba91 b.w 1d7c <serial2_end>
0000285a <_ZN15HardwareSerial217transmitterEnableEh>:
virtual void transmitterEnable(uint8_t pin) { serial2_set_transmit_pin(pin); }
285a: 4608 mov r0, r1
285c: f7ff bac2 b.w 1de4 <serial2_set_transmit_pin>
00002860 <_ZN15HardwareSerial25setRXEh>:
virtual void setRX(uint8_t pin) { serial2_set_rx(pin); }
2860: 4608 mov r0, r1
2862: f7ff bb11 b.w 1e88 <serial2_set_rx>
00002866 <_ZN15HardwareSerial25setTXEhb>:
virtual void setTX(uint8_t pin, bool opendrain=false) { serial2_set_tx(pin, opendrain); }
2866: 4608 mov r0, r1
2868: 4611 mov r1, r2
286a: f7ff bad7 b.w 1e1c <serial2_set_tx>
0000286e <_ZN15HardwareSerial29attachRtsEh>:
virtual bool attachRts(uint8_t pin) { return serial2_set_rts(pin); }
286e: b508 push {r3, lr}
2870: 4608 mov r0, r1
2872: f7ff fb31 bl 1ed8 <serial2_set_rts>
2876: 3000 adds r0, #0
2878: bf18 it ne
287a: 2001 movne r0, #1
287c: bd08 pop {r3, pc}
0000287e <_ZN15HardwareSerial29attachCtsEh>:
virtual bool attachCts(uint8_t pin) { return serial2_set_cts(pin); }
287e: b508 push {r3, lr}
2880: 4608 mov r0, r1
2882: f7ff fb4b bl 1f1c <serial2_set_cts>
2886: 3000 adds r0, #0
2888: bf18 it ne
288a: 2001 movne r0, #1
288c: bd08 pop {r3, pc}
0000288e <_ZN15HardwareSerial29availableEv>:
virtual int available(void) { return serial2_available(); }
288e: f7ff bbd5 b.w 203c <serial2_available>
00002892 <_ZN15HardwareSerial24peekEv>:
virtual int peek(void) { return serial2_peek(); }
2892: f7ff bc0d b.w 20b0 <serial2_peek>
00002896 <_ZN15HardwareSerial24readEv>:
virtual int read(void) { return serial2_getchar(); }
2896: f7ff bbe1 b.w 205c <serial2_getchar>
0000289a <_ZN15HardwareSerial25flushEv>:
virtual void flush(void) { serial2_flush(); }
289a: f7ff bbb3 b.w 2004 <serial2_flush>
0000289e <_ZN15HardwareSerial25clearEv>:
virtual void clear(void) { serial2_clear(); }
289e: f7ff bc1f b.w 20e0 <serial2_clear>
000028a2 <_ZN15HardwareSerial217availableForWriteEv>:
virtual int availableForWrite(void) { return serial2_write_buffer_free(); }
28a2: f7ff bbb9 b.w 2018 <serial2_write_buffer_free>
000028a6 <_ZN15HardwareSerial25writeEh>:
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; }
28a6: b508 push {r3, lr}
28a8: 4608 mov r0, r1
28aa: f7ff fb55 bl 1f58 <serial2_putchar>
28ae: 2001 movs r0, #1
28b0: bd08 pop {r3, pc}
000028b2 <_ZN15HardwareSerial29write9bitEm>:
virtual size_t write(const uint8_t *buffer, size_t size)
{ serial2_write(buffer, size); return size; }
virtual size_t write(const char *str) { size_t len = strlen(str);
serial2_write((const uint8_t *)str, len);
return len; }
virtual size_t write9bit(uint32_t c) { serial2_putchar(c); return 1; }
28b2: b508 push {r3, lr}
28b4: 4608 mov r0, r1
28b6: f7ff fb4f bl 1f58 <serial2_putchar>
28ba: 2001 movs r0, #1
28bc: bd08 pop {r3, pc}
000028be <_ZN15HardwareSerial25writeEPKhj>:
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
28be: b510 push {r4, lr}
{ serial2_write(buffer, size); return size; }
28c0: 4608 mov r0, r1
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
28c2: 4614 mov r4, r2
{ serial2_write(buffer, size); return size; }
28c4: 4611 mov r1, r2
28c6: f7ff fb91 bl 1fec <serial2_write>
28ca: 4620 mov r0, r4
28cc: bd10 pop {r4, pc}
000028ce <_ZN15HardwareSerial25writeEPKc>:
virtual size_t write(const char *str) { size_t len = strlen(str);
28ce: b538 push {r3, r4, r5, lr}
28d0: 4608 mov r0, r1
28d2: 460d mov r5, r1
28d4: f000 f8c4 bl 2a60 <strlen>
28d8: 4604 mov r4, r0
serial2_write((const uint8_t *)str, len);
28da: 4621 mov r1, r4
28dc: 4628 mov r0, r5
28de: f7ff fb85 bl 1fec <serial2_write>
return len; }
28e2: 4620 mov r0, r4
28e4: bd38 pop {r3, r4, r5, pc}
000028e6 <_Z12serialEvent2v>:
#include "HardwareSerial.h"
HardwareSerial2 Serial2;
void serialEvent2() __attribute__((weak));
void serialEvent2() {}
28e6: 4770 bx lr
000028e8 <_GLOBAL__sub_I_Serial2>:
28e8: 4b04 ldr r3, [pc, #16] ; (28fc <_GLOBAL__sub_I_Serial2+0x14>)
28ea: 2200 movs r2, #0
28ec: 711a strb r2, [r3, #4]
28ee: f44f 717a mov.w r1, #1000 ; 0x3e8
28f2: 731a strb r2, [r3, #12]
operator bool() { return true; }
};
extern HardwareSerial Serial1;
extern void serialEvent1(void);
class HardwareSerial2 : public HardwareSerial
28f4: 4a02 ldr r2, [pc, #8] ; (2900 <_GLOBAL__sub_I_Serial2+0x18>)
28f6: 6099 str r1, [r3, #8]
28f8: 601a str r2, [r3, #0]
28fa: 4770 bx lr
28fc: 1fffe904 .word 0x1fffe904
2900: 00002c90 .word 0x00002c90
00002904 <_ZN15HardwareSerial35writeEm>:
virtual int read(void) { return serial3_getchar(); }
virtual void flush(void) { serial3_flush(); }
virtual void clear(void) { serial3_clear(); }
virtual int availableForWrite(void) { return serial3_write_buffer_free(); }
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
2904: b508 push {r3, lr}
2906: 6803 ldr r3, [r0, #0]
2908: b2c9 uxtb r1, r1
290a: 681b ldr r3, [r3, #0]
290c: 4798 blx r3
290e: bd08 pop {r3, pc}
00002910 <_ZN15HardwareSerial35writeEl>:
virtual size_t write(long n) { return write((uint8_t)n); }
2910: b508 push {r3, lr}
2912: 6803 ldr r3, [r0, #0]
2914: b2c9 uxtb r1, r1
2916: 681b ldr r3, [r3, #0]
2918: 4798 blx r3
291a: bd08 pop {r3, pc}
0000291c <_ZN15HardwareSerial35writeEj>:
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
291c: b508 push {r3, lr}
291e: 6803 ldr r3, [r0, #0]
2920: b2c9 uxtb r1, r1
2922: 681b ldr r3, [r3, #0]
2924: 4798 blx r3
2926: bd08 pop {r3, pc}
00002928 <_ZN15HardwareSerial35writeEi>:
virtual size_t write(int n) { return write((uint8_t)n); }
2928: b508 push {r3, lr}
292a: 6803 ldr r3, [r0, #0]
292c: b2c9 uxtb r1, r1
292e: 681b ldr r3, [r3, #0]
2930: 4798 blx r3
2932: bd08 pop {r3, pc}
00002934 <_ZN15HardwareSerial35beginEm>:
extern void serialEvent2(void);
class HardwareSerial3 : public HardwareSerial
{
public:
virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); }
2934: 084b lsrs r3, r1, #1
2936: f103 60b7 add.w r0, r3, #95944704 ; 0x5b80000
293a: f500 4058 add.w r0, r0, #55296 ; 0xd800
293e: fbb0 f0f1 udiv r0, r0, r1
2942: f7ff bc35 b.w 21b0 <serial3_begin>
00002946 <_ZN15HardwareSerial35beginEmm>:
virtual void begin(uint32_t baud, uint32_t format) {
2946: b510 push {r4, lr}
serial3_begin(BAUD2DIV3(baud));
2948: 084b lsrs r3, r1, #1
294a: f103 60b7 add.w r0, r3, #95944704 ; 0x5b80000
294e: f500 4058 add.w r0, r0, #55296 ; 0xd800
class HardwareSerial3 : public HardwareSerial
{
public:
virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); }
virtual void begin(uint32_t baud, uint32_t format) {
2952: 4614 mov r4, r2
serial3_begin(BAUD2DIV3(baud));
2954: fbb0 f0f1 udiv r0, r0, r1
2958: f7ff fc2a bl 21b0 <serial3_begin>
serial3_format(format); }
295c: 4620 mov r0, r4
295e: e8bd 4010 ldmia.w sp!, {r4, lr}
2962: f7ff bc65 b.w 2230 <serial3_format>
00002966 <_ZN15HardwareSerial33endEv>:
virtual void end(void) { serial3_end(); }
2966: f7ff bc8d b.w 2284 <serial3_end>
0000296a <_ZN15HardwareSerial317transmitterEnableEh>:
virtual void transmitterEnable(uint8_t pin) { serial3_set_transmit_pin(pin); }
296a: 4608 mov r0, r1
296c: f7ff bcbe b.w 22ec <serial3_set_transmit_pin>
00002970 <_ZN15HardwareSerial35setRXEh>:
virtual void setRX(uint8_t pin) { serial3_set_rx(pin); }
2970: 4608 mov r0, r1
2972: f7ff bcff b.w 2374 <serial3_set_rx>
00002976 <_ZN15HardwareSerial35setTXEhb>:
virtual void setTX(uint8_t pin, bool opendrain=false) { serial3_set_tx(pin, opendrain); }
2976: 4608 mov r0, r1
2978: 4611 mov r1, r2
297a: f7ff bcd3 b.w 2324 <serial3_set_tx>
0000297e <_ZN15HardwareSerial39attachRtsEh>:
virtual bool attachRts(uint8_t pin) { return serial3_set_rts(pin); }
297e: b508 push {r3, lr}
2980: 4608 mov r0, r1
2982: f7ff fcf9 bl 2378 <serial3_set_rts>
2986: 3000 adds r0, #0
2988: bf18 it ne
298a: 2001 movne r0, #1
298c: bd08 pop {r3, pc}
0000298e <_ZN15HardwareSerial39attachCtsEh>:
virtual bool attachCts(uint8_t pin) { return serial3_set_cts(pin); }
298e: b508 push {r3, lr}
2990: 4608 mov r0, r1
2992: f7ff fd13 bl 23bc <serial3_set_cts>
2996: 3000 adds r0, #0
2998: bf18 it ne
299a: 2001 movne r0, #1
299c: bd08 pop {r3, pc}
0000299e <_ZN15HardwareSerial39availableEv>:
virtual int available(void) { return serial3_available(); }
299e: f7ff bd9d b.w 24dc <serial3_available>
000029a2 <_ZN15HardwareSerial34peekEv>:
virtual int peek(void) { return serial3_peek(); }
29a2: f7ff bdd5 b.w 2550 <serial3_peek>
000029a6 <_ZN15HardwareSerial34readEv>:
virtual int read(void) { return serial3_getchar(); }
29a6: f7ff bda9 b.w 24fc <serial3_getchar>
000029aa <_ZN15HardwareSerial35flushEv>:
virtual void flush(void) { serial3_flush(); }
29aa: f7ff bd7b b.w 24a4 <serial3_flush>
000029ae <_ZN15HardwareSerial35clearEv>:
virtual void clear(void) { serial3_clear(); }
29ae: f7ff bde7 b.w 2580 <serial3_clear>
000029b2 <_ZN15HardwareSerial317availableForWriteEv>:
virtual int availableForWrite(void) { return serial3_write_buffer_free(); }
29b2: f7ff bd81 b.w 24b8 <serial3_write_buffer_free>
000029b6 <_ZN15HardwareSerial35writeEh>:
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; }
29b6: b508 push {r3, lr}
29b8: 4608 mov r0, r1
29ba: f7ff fd1d bl 23f8 <serial3_putchar>
29be: 2001 movs r0, #1
29c0: bd08 pop {r3, pc}
000029c2 <_ZN15HardwareSerial39write9bitEm>:
virtual size_t write(const uint8_t *buffer, size_t size)
{ serial3_write(buffer, size); return size; }
virtual size_t write(const char *str) { size_t len = strlen(str);
serial3_write((const uint8_t *)str, len);
return len; }
virtual size_t write9bit(uint32_t c) { serial3_putchar(c); return 1; }
29c2: b508 push {r3, lr}
29c4: 4608 mov r0, r1
29c6: f7ff fd17 bl 23f8 <serial3_putchar>
29ca: 2001 movs r0, #1
29cc: bd08 pop {r3, pc}
000029ce <_ZN15HardwareSerial35writeEPKhj>:
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
29ce: b510 push {r4, lr}
{ serial3_write(buffer, size); return size; }
29d0: 4608 mov r0, r1
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; }
virtual size_t write(unsigned long n) { return write((uint8_t)n); }
virtual size_t write(long n) { return write((uint8_t)n); }
virtual size_t write(unsigned int n) { return write((uint8_t)n); }
virtual size_t write(int n) { return write((uint8_t)n); }
virtual size_t write(const uint8_t *buffer, size_t size)
29d2: 4614 mov r4, r2
{ serial3_write(buffer, size); return size; }
29d4: 4611 mov r1, r2
29d6: f7ff fd59 bl 248c <serial3_write>
29da: 4620 mov r0, r4
29dc: bd10 pop {r4, pc}
000029de <_ZN15HardwareSerial35writeEPKc>:
virtual size_t write(const char *str) { size_t len = strlen(str);
29de: b538 push {r3, r4, r5, lr}
29e0: 4608 mov r0, r1
29e2: 460d mov r5, r1
29e4: f000 f83c bl 2a60 <strlen>
29e8: 4604 mov r4, r0
serial3_write((const uint8_t *)str, len);
29ea: 4621 mov r1, r4
29ec: 4628 mov r0, r5
29ee: f7ff fd4d bl 248c <serial3_write>
return len; }
29f2: 4620 mov r0, r4
29f4: bd38 pop {r3, r4, r5, pc}
000029f6 <_Z12serialEvent3v>:
#include "HardwareSerial.h"
HardwareSerial3 Serial3;
void serialEvent3() __attribute__((weak));
void serialEvent3() {}
29f6: 4770 bx lr
000029f8 <_GLOBAL__sub_I_Serial3>:
29f8: 4b04 ldr r3, [pc, #16] ; (2a0c <_GLOBAL__sub_I_Serial3+0x14>)
29fa: 2200 movs r2, #0
29fc: 711a strb r2, [r3, #4]
29fe: f44f 717a mov.w r1, #1000 ; 0x3e8
2a02: 731a strb r2, [r3, #12]
operator bool() { return true; }
};
extern HardwareSerial2 Serial2;
extern void serialEvent2(void);
class HardwareSerial3 : public HardwareSerial
2a04: 4a02 ldr r2, [pc, #8] ; (2a10 <_GLOBAL__sub_I_Serial3+0x18>)
2a06: 6099 str r1, [r3, #8]
2a08: 601a str r2, [r3, #0]
2a0a: 4770 bx lr
2a0c: 1fffe914 .word 0x1fffe914
2a10: 00002cf0 .word 0x00002cf0
00002a14 <__libc_init_array>:
2a14: b570 push {r4, r5, r6, lr}
2a16: 4b0e ldr r3, [pc, #56] ; (2a50 <__libc_init_array+0x3c>)
2a18: 4d0e ldr r5, [pc, #56] ; (2a54 <__libc_init_array+0x40>)
2a1a: 1aed subs r5, r5, r3
2a1c: 10ad asrs r5, r5, #2
2a1e: 2400 movs r4, #0
2a20: 461e mov r6, r3
2a22: 42ac cmp r4, r5
2a24: d004 beq.n 2a30 <__libc_init_array+0x1c>
2a26: f856 2024 ldr.w r2, [r6, r4, lsl #2]
2a2a: 4790 blx r2
2a2c: 3401 adds r4, #1
2a2e: e7f8 b.n 2a22 <__libc_init_array+0xe>
2a30: f000 f98a bl 2d48 <_init>
2a34: 4d08 ldr r5, [pc, #32] ; (2a58 <__libc_init_array+0x44>)
2a36: 4b09 ldr r3, [pc, #36] ; (2a5c <__libc_init_array+0x48>)
2a38: 1aed subs r5, r5, r3
2a3a: 10ad asrs r5, r5, #2
2a3c: 2400 movs r4, #0
2a3e: 461e mov r6, r3
2a40: 42ac cmp r4, r5
2a42: d004 beq.n 2a4e <__libc_init_array+0x3a>
2a44: f856 2024 ldr.w r2, [r6, r4, lsl #2]
2a48: 4790 blx r2
2a4a: 3401 adds r4, #1
2a4c: e7f8 b.n 2a40 <__libc_init_array+0x2c>
2a4e: bd70 pop {r4, r5, r6, pc}
2a50: 00002d54 .word 0x00002d54
2a54: 00002d54 .word 0x00002d54
2a58: 00002d70 .word 0x00002d70
2a5c: 00002d54 .word 0x00002d54
00002a60 <strlen>:
2a60: 4603 mov r3, r0
2a62: f813 2b01 ldrb.w r2, [r3], #1
2a66: 2a00 cmp r2, #0
2a68: d1fb bne.n 2a62 <strlen+0x2>
2a6a: 1a18 subs r0, r3, r0
2a6c: 3801 subs r0, #1
2a6e: 4770 bx lr
2a70: 75746573 .word 0x75746573
2a74: 65622070 .word 0x65622070
2a78: 006e6967 .word 0x006e6967
2a7c: 75746573 .word 0x75746573
2a80: 3270 .short 0x3270
...
00002a83 <heatmap_gp>:
2a83: 0000 0000 ff80 0000 ffe0 00ff ffff ffff ................
2a93: 40ff .
00002a94 <digital_pin_to_info_PGM>:
2a94: 0840 43fe a040 4004 0844 43fe a044 4004 @..C@[email protected]..@
2aa4: 1800 43fe c000 4004 0030 43fe 9030 4004 [email protected]..@
2ab4: 0034 43fe 9034 4004 181c 43fe c01c 4004 [email protected]...@
2ac4: 1810 43fe c010 4004 1808 43fe c008 4004 [email protected]...@
2ad4: 180c 43fe c00c 4004 100c 43fe b00c 4004 [email protected]...@
2ae4: 1010 43fe b010 4004 1018 43fe b018 4004 [email protected]...@
2af4: 101c 43fe b01c 4004 1014 43fe b014 4004 [email protected]...@
2b04: 1804 43fe c004 4004 1000 43fe b000 4004 [email protected]...@
2b14: 0800 43fe a000 4004 0804 43fe a004 4004 [email protected]...@
2b24: 080c 43fe a00c 4004 0808 43fe a008 4004 [email protected]...@
2b34: 1814 43fe c014 4004 1818 43fe c018 4004 [email protected]...@
2b44: 1004 43fe b004 4004 1008 43fe b008 4004 [email protected]...@
2b54: 0014 43fe 9014 4004 084c 43fe a04c 4004 [email protected]..@
2b64: 2004 43fe d004 4004 1024 43fe b024 4004 . .C...@$..C$..@
2b74: 1020 43fe b020 4004 1028 43fe b028 4004 ..C ..@(..C(..@
2b84: 102c 43fe b02c 4004 2000 43fe d000 4004 ,..C,..@. .C...@
2b94: 0848 43fe a048 4004 0010 43fe 9010 4004 [email protected]...@
2ba4: 0a0d ffff ....
00002ba8 <_ZTV16usb_serial_class>:
...
2bb0: 1415 0000 141b 0000 1401 0000 1405 0000 ................
2bc0: 1409 0000 140d 0000 1411 0000 0000 0000 ................
00002bd0 <usb_endpoint_config_table>:
2bd0: 1500 1519 ....
00002bd4 <usb_descriptor_list>:
2bd4: 0100 0000 e56a 1fff 0012 0000 0200 0000 ....j...........
2be4: e594 1fff 0043 0000 0300 0000 e5ee 1fff ....C...........
2bf4: 0000 0000 0301 0409 e57c 1fff 0000 0000 ........|.......
2c04: 0302 0409 e5d8 1fff 0000 0000 0303 0409 ................
2c14: e5f2 1fff 0000 0000 0000 0000 0000 0000 ................
2c24: 0000 0000 ....
00002c28 <_ZTV14HardwareSerial>:
...
2c30: 2797 0000 27af 0000 277f 0000 2787 0000 .'...'...'...'..
2c40: 2783 0000 278b 0000 2715 0000 2727 0000 .'...'...'..''..
2c50: 2747 0000 274b 0000 2751 0000 2757 0000 G'..K'..Q'..W'..
2c60: 275f 0000 276f 0000 278f 0000 2793 0000 _'..o'...'...'..
2c70: 26e5 0000 26f1 0000 26fd 0000 2709 0000 .&...&...&...'..
2c80: 27bf 0000 27a3 0000 .'...'..
00002c88 <_ZTV15HardwareSerial2>:
...
2c90: 28a7 0000 28bf 0000 288f 0000 2897 0000 .(...(...(...(..
2ca0: 2893 0000 289b 0000 2825 0000 2837 0000 .(...(..%(..7(..
2cb0: 2857 0000 285b 0000 2861 0000 2867 0000 W(..[(..a(..g(..
2cc0: 286f 0000 287f 0000 289f 0000 28a3 0000 o(...(...(...(..
2cd0: 27f5 0000 2801 0000 280d 0000 2819 0000 .'...(...(...(..
2ce0: 28cf 0000 28b3 0000 .(...(..
00002ce8 <_ZTV15HardwareSerial3>:
...
2cf0: 29b7 0000 29cf 0000 299f 0000 29a7 0000 .)...)...)...)..
2d00: 29a3 0000 29ab 0000 2935 0000 2947 0000 .)...)..5)..G)..
2d10: 2967 0000 296b 0000 2971 0000 2977 0000 g)..k)..q)..w)..
2d20: 297f 0000 298f 0000 29af 0000 29b3 0000 .)...)...)...)..
2d30: 2905 0000 2911 0000 291d 0000 2929 0000 .)...)...)..))..
2d40: 29df 0000 29c3 0000 .)...)..
00002d48 <_init>:
2d48: b5f8 push {r3, r4, r5, r6, r7, lr}
2d4a: bf00 nop
2d4c: bcf8 pop {r3, r4, r5, r6, r7}
2d4e: bc08 pop {r3}
2d50: 469e mov lr, r3
2d52: 4770 bx lr
00002d54 <__init_array_start>:
2d54: 00000435 .word 0x00000435
2d58: 000005b1 .word 0x000005b1
2d5c: 000005c5 .word 0x000005c5
2d60: 00001425 .word 0x00001425
2d64: 000027d9 .word 0x000027d9
2d68: 000028e9 .word 0x000028e9
2d6c: 000029f9 .word 0x000029f9
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