Created
March 13, 2017 20:24
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TeensyLC
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PaulTeensyLCPaletteBugTest.ino.elf: file format elf32-littlearm | |
Disassembly of section .text: | |
00000000 <_VectorsFlash>: | |
0: 00 18 00 20 c1 00 00 00 c5 15 00 00 91 15 00 00 ... ............ | |
10: 91 15 00 00 91 15 00 00 91 15 00 00 91 15 00 00 ................ | |
20: 91 15 00 00 91 15 00 00 91 15 00 00 c5 15 00 00 ................ | |
30: c5 15 00 00 91 15 00 00 c5 15 00 00 81 15 00 00 ................ | |
40: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
50: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
60: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
70: e1 1b 00 00 6d 20 00 00 f1 25 00 00 c5 15 00 00 ....m ...%...... | |
80: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
90: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
a0: 39 0a 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 9............... | |
b0: c5 15 00 00 c5 15 00 00 c5 15 00 00 c5 15 00 00 ................ | |
000000c0 <ResetHandler>: | |
__attribute__ ((optimize("-Os"))) | |
#else | |
__attribute__ ((section(".startup"),optimize("-Os"))) | |
#endif | |
void ResetHandler(void) | |
{ | |
c0: b538 push {r3, r4, r5, lr} | |
__asm__ volatile ("nop"); | |
__asm__ volatile ("nop"); | |
#endif | |
// programs using the watchdog timer or needing to initialize hardware as | |
// early as possible can implement startup_early_hook() | |
startup_early_hook(); | |
c2: f001 fa83 bl 15cc <startup_early_hook> | |
//PORTC_PCR5 = PORT_PCR_MUX(1) | PORT_PCR_DSE | PORT_PCR_SRE; | |
//GPIOC_PDDR |= (1<<5); | |
//GPIOC_PSOR = (1<<5); | |
//while (1); | |
#elif defined(__MKL26Z64__) | |
SIM_SCGC4 = SIM_SCGC4_USBOTG | 0xF0000030; | |
c6: 4a45 ldr r2, [pc, #276] ; (1dc <ResetHandler+0x11c>) | |
c8: 4b45 ldr r3, [pc, #276] ; (1e0 <ResetHandler+0x120>) | |
ca: 601a str r2, [r3, #0] | |
SIM_SCGC5 = 0x00003F82; // clocks active to all GPIO | |
cc: 4a45 ldr r2, [pc, #276] ; (1e4 <ResetHandler+0x124>) | |
ce: 4b46 ldr r3, [pc, #280] ; (1e8 <ResetHandler+0x128>) | |
d0: 601a str r2, [r3, #0] | |
SIM_SCGC6 = SIM_SCGC6_ADC0 | SIM_SCGC6_TPM0 | SIM_SCGC6_TPM1 | SIM_SCGC6_TPM2 | SIM_SCGC6_FTFL; | |
d2: 4a46 ldr r2, [pc, #280] ; (1ec <ResetHandler+0x12c>) | |
d4: 4b46 ldr r3, [pc, #280] ; (1f0 <ResetHandler+0x130>) | |
d6: 601a str r2, [r3, #0] | |
RTC_SR = 0; | |
RTC_CR = RTC_CR_SC16P | RTC_CR_SC4P | RTC_CR_OSCE; | |
} | |
#endif | |
// release I/O pins hold, if we woke up from VLLS mode | |
if (PMC_REGSC & PMC_REGSC_ACKISO) PMC_REGSC |= PMC_REGSC_ACKISO; | |
d8: 4b46 ldr r3, [pc, #280] ; (1f4 <ResetHandler+0x134>) | |
da: 2208 movs r2, #8 | |
dc: 7819 ldrb r1, [r3, #0] | |
de: 4211 tst r1, r2 | |
e0: d002 beq.n e8 <ResetHandler+0x28> | |
e2: 7819 ldrb r1, [r3, #0] | |
e4: 430a orrs r2, r1 | |
e6: 701a strb r2, [r3, #0] | |
// since this is a write once register, make it visible to all F_CPU's | |
// so we can into other sleep modes in the future at any speed | |
#if defined(__MK66FX1M0__) | |
SMC_PMPROT = SMC_PMPROT_AHSRUN | SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS; | |
#else | |
SMC_PMPROT = SMC_PMPROT_AVLP | SMC_PMPROT_ALLS | SMC_PMPROT_AVLLS; | |
e8: 4b43 ldr r3, [pc, #268] ; (1f8 <ResetHandler+0x138>) | |
ea: 222a movs r2, #42 ; 0x2a | |
ec: 701a strb r2, [r3, #0] | |
#endif | |
// TODO: do this while the PLL is waiting to lock.... | |
while (dest < &_edata) *dest++ = *src++; | |
ee: 2300 movs r3, #0 | |
f0: 4a42 ldr r2, [pc, #264] ; (1fc <ResetHandler+0x13c>) | |
f2: 4943 ldr r1, [pc, #268] ; (200 <ResetHandler+0x140>) | |
f4: 189a adds r2, r3, r2 | |
f6: 428a cmp r2, r1 | |
f8: d204 bcs.n 104 <ResetHandler+0x44> | |
fa: 4942 ldr r1, [pc, #264] ; (204 <ResetHandler+0x144>) | |
fc: 58c9 ldr r1, [r1, r3] | |
fe: 3304 adds r3, #4 | |
100: 6011 str r1, [r2, #0] | |
102: e7f5 b.n f0 <ResetHandler+0x30> | |
104: 4b40 ldr r3, [pc, #256] ; (208 <ResetHandler+0x148>) | |
dest = &_sbss; | |
while (dest < &_ebss) *dest++ = 0; | |
106: 4941 ldr r1, [pc, #260] ; (20c <ResetHandler+0x14c>) | |
108: 1f1a subs r2, r3, #4 | |
10a: 1d18 adds r0, r3, #4 | |
10c: 2300 movs r3, #0 | |
10e: 428a cmp r2, r1 | |
110: d202 bcs.n 118 <ResetHandler+0x58> | |
112: 6013 str r3, [r2, #0] | |
114: 1c03 adds r3, r0, #0 | |
116: e7f6 b.n 106 <ResetHandler+0x46> | |
// default all interrupts to medium priority level | |
for (i=0; i < NVIC_NUM_INTERRUPTS + 16; i++) _VectorsRam[i] = _VectorsFlash[i]; | |
118: 493d ldr r1, [pc, #244] ; (210 <ResetHandler+0x150>) | |
11a: 4a3e ldr r2, [pc, #248] ; (214 <ResetHandler+0x154>) | |
11c: 5859 ldr r1, [r3, r1] | |
11e: 1c10 adds r0, r2, #0 | |
120: 5099 str r1, [r3, r2] | |
122: 3304 adds r3, #4 | |
124: 2bc0 cmp r3, #192 ; 0xc0 | |
126: d1f7 bne.n 118 <ResetHandler+0x58> | |
128: 2300 movs r3, #0 | |
for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128); | |
12a: 089a lsrs r2, r3, #2 | |
12c: 493a ldr r1, [pc, #232] ; (218 <ResetHandler+0x158>) | |
12e: 0092 lsls r2, r2, #2 | |
130: 1852 adds r2, r2, r1 | |
132: 2103 movs r1, #3 | |
134: 4019 ands r1, r3 | |
136: 00c9 lsls r1, r1, #3 | |
138: 6815 ldr r5, [r2, #0] | |
13a: 24ff movs r4, #255 ; 0xff | |
13c: 408c lsls r4, r1 | |
13e: 43a5 bics r5, r4 | |
140: 1c2c adds r4, r5, #0 | |
142: 2580 movs r5, #128 ; 0x80 | |
144: 408d lsls r5, r1 | |
146: 1c29 adds r1, r5, #0 | |
148: 4321 orrs r1, r4 | |
14a: 3301 adds r3, #1 | |
14c: 6011 str r1, [r2, #0] | |
14e: 2b20 cmp r3, #32 | |
150: d1eb bne.n 12a <ResetHandler+0x6a> | |
SCB_VTOR = (uint32_t)_VectorsRam; // use vector table in RAM | |
152: 4b32 ldr r3, [pc, #200] ; (21c <ResetHandler+0x15c>) | |
#if defined(KINETISK) | |
// enable capacitors for crystal | |
OSC0_CR = OSC_SC8P | OSC_SC2P; | |
#elif defined(KINETISL) | |
// enable capacitors for crystal | |
OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN; | |
154: 228a movs r2, #138 ; 0x8a | |
while (dest < &_ebss) *dest++ = 0; | |
// default all interrupts to medium priority level | |
for (i=0; i < NVIC_NUM_INTERRUPTS + 16; i++) _VectorsRam[i] = _VectorsFlash[i]; | |
for (i=0; i < NVIC_NUM_INTERRUPTS; i++) NVIC_SET_PRIORITY(i, 128); | |
SCB_VTOR = (uint32_t)_VectorsRam; // use vector table in RAM | |
156: 6018 str r0, [r3, #0] | |
#if defined(KINETISK) | |
// enable capacitors for crystal | |
OSC0_CR = OSC_SC8P | OSC_SC2P; | |
#elif defined(KINETISL) | |
// enable capacitors for crystal | |
OSC0_CR = OSC_SC8P | OSC_SC2P | OSC_ERCLKEN; | |
158: 4b31 ldr r3, [pc, #196] ; (220 <ResetHandler+0x160>) | |
15a: 701a strb r2, [r3, #0] | |
#endif | |
// enable osc, 8-32 MHz range, low power mode | |
MCG_C2 = MCG_C2_RANGE0(2) | MCG_C2_EREFS; | |
15c: 4b31 ldr r3, [pc, #196] ; (224 <ResetHandler+0x164>) | |
15e: 2224 movs r2, #36 ; 0x24 | |
160: 705a strb r2, [r3, #1] | |
// switch to crystal as clock source, FLL input = 16 MHz / 512 | |
MCG_C1 = MCG_C1_CLKS(2) | MCG_C1_FRDIV(4); | |
162: 22a0 movs r2, #160 ; 0xa0 | |
164: 701a strb r2, [r3, #0] | |
// wait for crystal oscillator to begin | |
while ((MCG_S & MCG_S_OSCINIT0) == 0) ; | |
166: 799a ldrb r2, [r3, #6] | |
168: 0791 lsls r1, r2, #30 | |
16a: d5fc bpl.n 166 <ResetHandler+0xa6> | |
// wait for FLL to use oscillator | |
while ((MCG_S & MCG_S_IREFST) != 0) ; | |
16c: 799a ldrb r2, [r3, #6] | |
16e: 06d5 lsls r5, r2, #27 | |
170: d4fc bmi.n 16c <ResetHandler+0xac> | |
// wait for MCGOUT to use oscillator | |
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(2)) ; | |
172: 7998 ldrb r0, [r3, #6] | |
174: 210c movs r1, #12 | |
176: 4a2b ldr r2, [pc, #172] ; (224 <ResetHandler+0x164>) | |
178: 4001 ands r1, r0 | |
17a: 2908 cmp r1, #8 | |
17c: d1f9 bne.n 172 <ResetHandler+0xb2> | |
#endif | |
#else | |
#if F_CPU == 72000000 | |
MCG_C5 = MCG_C5_PRDIV0(5); // config PLL input for 16 MHz Crystal / 6 = 2.667 Hz | |
#else | |
MCG_C5 = MCG_C5_PRDIV0(3); // config PLL input for 16 MHz Crystal / 4 = 4 MHz | |
17e: 2103 movs r1, #3 | |
180: 7111 strb r1, [r2, #4] | |
#elif F_CPU == 120000000 | |
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(6); // config PLL for 120 MHz output | |
#elif F_CPU == 72000000 | |
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(3); // config PLL for 72 MHz output | |
#elif F_CPU == 96000000 || F_CPU == 48000000 || F_CPU == 24000000 | |
MCG_C6 = MCG_C6_PLLS | MCG_C6_VDIV0(0); // config PLL for 96 MHz output | |
182: 2140 movs r1, #64 ; 0x40 | |
184: 7151 strb r1, [r2, #5] | |
#error "This clock speed isn't supported..." | |
#endif | |
#endif | |
// wait for PLL to start using xtal as its input | |
while (!(MCG_S & MCG_S_PLLST)) ; | |
186: 799a ldrb r2, [r3, #6] | |
188: 0691 lsls r1, r2, #26 | |
18a: d5fc bpl.n 186 <ResetHandler+0xc6> | |
// wait for PLL to lock | |
while (!(MCG_S & MCG_S_LOCK0)) ; | |
18c: 799a ldrb r2, [r3, #6] | |
18e: 0655 lsls r5, r2, #25 | |
190: d5fc bpl.n 18c <ResetHandler+0xcc> | |
// config divisors: 48 MHz core, 48 MHz bus, 24 MHz flash, USB = 96 / 2 | |
#if defined(KINETISK) | |
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV2(1) | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(3); | |
SIM_CLKDIV2 = SIM_CLKDIV2_USBDIV(1); | |
#elif defined(KINETISL) | |
SIM_CLKDIV1 = SIM_CLKDIV1_OUTDIV1(1) | SIM_CLKDIV1_OUTDIV4(1); | |
192: 4925 ldr r1, [pc, #148] ; (228 <ResetHandler+0x168>) | |
194: 4a25 ldr r2, [pc, #148] ; (22c <ResetHandler+0x16c>) | |
196: 6011 str r1, [r2, #0] | |
#error "Error, F_CPU must be 192, 180, 168, 144, 120, 96, 72, 48, 24, 16, 8, 4, or 2 MHz" | |
#endif | |
#if F_CPU > 16000000 | |
// switch to PLL as clock source, FLL input = 16 MHz / 512 | |
MCG_C1 = MCG_C1_CLKS(0) | MCG_C1_FRDIV(4); | |
198: 4a22 ldr r2, [pc, #136] ; (224 <ResetHandler+0x164>) | |
19a: 2120 movs r1, #32 | |
19c: 7011 strb r1, [r2, #0] | |
// wait for PLL clock to be used | |
while ((MCG_S & MCG_S_CLKST_MASK) != MCG_S_CLKST(3)) ; | |
19e: 7999 ldrb r1, [r3, #6] | |
1a0: 220c movs r2, #12 | |
1a2: 400a ands r2, r1 | |
1a4: 2a0c cmp r2, #12 | |
1a6: d1fa bne.n 19e <ResetHandler+0xde> | |
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_IRC48SEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6); | |
#else | |
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_TRACECLKSEL | SIM_SOPT2_CLKOUTSEL(6); | |
#endif | |
#elif defined(KINETISL) | |
SIM_SOPT2 = SIM_SOPT2_USBSRC | SIM_SOPT2_PLLFLLSEL | SIM_SOPT2_CLKOUTSEL(6) | |
1a8: 4a21 ldr r2, [pc, #132] ; (230 <ResetHandler+0x170>) | |
1aa: 4b22 ldr r3, [pc, #136] ; (234 <ResetHandler+0x174>) | |
1ac: 601a str r2, [r3, #0] | |
// since we are not going into "stop mode" i removed it | |
SMC_PMCTRL = SMC_PMCTRL_RUNM(2); // VLPR mode :-) | |
#endif | |
// initialize the SysTick counter | |
SYST_RVR = (F_CPU / 1000) - 1; | |
1ae: 4a22 ldr r2, [pc, #136] ; (238 <ResetHandler+0x178>) | |
1b0: 4b22 ldr r3, [pc, #136] ; (23c <ResetHandler+0x17c>) | |
1b2: 601a str r2, [r3, #0] | |
SYST_CVR = 0; | |
1b4: 4b22 ldr r3, [pc, #136] ; (240 <ResetHandler+0x180>) | |
1b6: 2200 movs r2, #0 | |
1b8: 601a str r2, [r3, #0] | |
SYST_CSR = SYST_CSR_CLKSOURCE | SYST_CSR_TICKINT | SYST_CSR_ENABLE; | |
1ba: 4b22 ldr r3, [pc, #136] ; (244 <ResetHandler+0x184>) | |
1bc: 2207 movs r2, #7 | |
1be: 601a str r2, [r3, #0] | |
SCB_SHPR3 = 0x20200000; // Systick = priority 32 | |
1c0: 4a21 ldr r2, [pc, #132] ; (248 <ResetHandler+0x188>) | |
1c2: 4b22 ldr r3, [pc, #136] ; (24c <ResetHandler+0x18c>) | |
1c4: 601a str r2, [r3, #0] | |
//init_pins(); | |
__enable_irq(); | |
1c6: b662 cpsie i | |
_init_Teensyduino_internal_(); | |
1c8: f000 fb10 bl 7ec <_init_Teensyduino_internal_> | |
#endif | |
*(uint32_t *)0x4003E01C = 0; | |
} | |
#endif | |
__libc_init_array(); | |
1cc: f002 fd82 bl 2cd4 <__libc_init_array> | |
startup_late_hook(); | |
1d0: f001 fa02 bl 15d8 <startup_late_hook> | |
main(); | |
1d4: f001 f932 bl 143c <main> | |
1d8: e7fe b.n 1d8 <ResetHandler+0x118> | |
1da: 46c0 nop ; (mov r8, r8) | |
1dc: f0040030 .word 0xf0040030 | |
1e0: 40048034 .word 0x40048034 | |
1e4: 00003f82 .word 0x00003f82 | |
1e8: 40048038 .word 0x40048038 | |
1ec: 0f000001 .word 0x0f000001 | |
1f0: 4004803c .word 0x4004803c | |
1f4: 4007d002 .word 0x4007d002 | |
1f8: 4007e000 .word 0x4007e000 | |
1fc: 1ffffd60 .word 0x1ffffd60 | |
200: 1ffffe08 .word 0x1ffffe08 | |
204: 00003078 .word 0x00003078 | |
208: 1ffffe0c .word 0x1ffffe0c | |
20c: 20000140 .word 0x20000140 | |
210: 00000000 .word 0x00000000 | |
214: 1ffff900 .word 0x1ffff900 | |
218: e000e400 .word 0xe000e400 | |
21c: e000ed08 .word 0xe000ed08 | |
220: 40065000 .word 0x40065000 | |
224: 40064000 .word 0x40064000 | |
228: 10010000 .word 0x10010000 | |
22c: 40048044 .word 0x40048044 | |
230: 050500c0 .word 0x050500c0 | |
234: 40048004 .word 0x40048004 | |
238: 0000bb7f .word 0x0000bb7f | |
23c: e000e014 .word 0xe000e014 | |
240: e000e018 .word 0xe000e018 | |
244: e000e010 .word 0xe000e010 | |
248: 20200000 .word 0x20200000 | |
24c: e000ed20 .word 0xe000ed20 | |
250: ffffffff .word 0xffffffff | |
254: ffffffff .word 0xffffffff | |
258: ffffffff .word 0xffffffff | |
25c: ffffffff .word 0xffffffff | |
260: ffffffff .word 0xffffffff | |
264: ffffffff .word 0xffffffff | |
268: ffffffff .word 0xffffffff | |
26c: ffffffff .word 0xffffffff | |
270: ffffffff .word 0xffffffff | |
274: ffffffff .word 0xffffffff | |
278: ffffffff .word 0xffffffff | |
27c: ffffffff .word 0xffffffff | |
280: ffffffff .word 0xffffffff | |
284: ffffffff .word 0xffffffff | |
288: ffffffff .word 0xffffffff | |
28c: ffffffff .word 0xffffffff | |
290: ffffffff .word 0xffffffff | |
294: ffffffff .word 0xffffffff | |
298: ffffffff .word 0xffffffff | |
29c: ffffffff .word 0xffffffff | |
2a0: ffffffff .word 0xffffffff | |
2a4: ffffffff .word 0xffffffff | |
2a8: ffffffff .word 0xffffffff | |
2ac: ffffffff .word 0xffffffff | |
2b0: ffffffff .word 0xffffffff | |
2b4: ffffffff .word 0xffffffff | |
2b8: ffffffff .word 0xffffffff | |
2bc: ffffffff .word 0xffffffff | |
2c0: ffffffff .word 0xffffffff | |
2c4: ffffffff .word 0xffffffff | |
2c8: ffffffff .word 0xffffffff | |
2cc: ffffffff .word 0xffffffff | |
2d0: ffffffff .word 0xffffffff | |
2d4: ffffffff .word 0xffffffff | |
2d8: ffffffff .word 0xffffffff | |
2dc: ffffffff .word 0xffffffff | |
2e0: ffffffff .word 0xffffffff | |
2e4: ffffffff .word 0xffffffff | |
2e8: ffffffff .word 0xffffffff | |
2ec: ffffffff .word 0xffffffff | |
2f0: ffffffff .word 0xffffffff | |
2f4: ffffffff .word 0xffffffff | |
2f8: ffffffff .word 0xffffffff | |
2fc: ffffffff .word 0xffffffff | |
300: ffffffff .word 0xffffffff | |
304: ffffffff .word 0xffffffff | |
308: ffffffff .word 0xffffffff | |
30c: ffffffff .word 0xffffffff | |
310: ffffffff .word 0xffffffff | |
314: ffffffff .word 0xffffffff | |
318: ffffffff .word 0xffffffff | |
31c: ffffffff .word 0xffffffff | |
320: ffffffff .word 0xffffffff | |
324: ffffffff .word 0xffffffff | |
328: ffffffff .word 0xffffffff | |
32c: ffffffff .word 0xffffffff | |
330: ffffffff .word 0xffffffff | |
334: ffffffff .word 0xffffffff | |
338: ffffffff .word 0xffffffff | |
33c: ffffffff .word 0xffffffff | |
340: ffffffff .word 0xffffffff | |
344: ffffffff .word 0xffffffff | |
348: ffffffff .word 0xffffffff | |
34c: ffffffff .word 0xffffffff | |
350: ffffffff .word 0xffffffff | |
354: ffffffff .word 0xffffffff | |
358: ffffffff .word 0xffffffff | |
35c: ffffffff .word 0xffffffff | |
360: ffffffff .word 0xffffffff | |
364: ffffffff .word 0xffffffff | |
368: ffffffff .word 0xffffffff | |
36c: ffffffff .word 0xffffffff | |
370: ffffffff .word 0xffffffff | |
374: ffffffff .word 0xffffffff | |
378: ffffffff .word 0xffffffff | |
37c: ffffffff .word 0xffffffff | |
380: ffffffff .word 0xffffffff | |
384: ffffffff .word 0xffffffff | |
388: ffffffff .word 0xffffffff | |
38c: ffffffff .word 0xffffffff | |
390: ffffffff .word 0xffffffff | |
394: ffffffff .word 0xffffffff | |
398: ffffffff .word 0xffffffff | |
39c: ffffffff .word 0xffffffff | |
3a0: ffffffff .word 0xffffffff | |
3a4: ffffffff .word 0xffffffff | |
3a8: ffffffff .word 0xffffffff | |
3ac: ffffffff .word 0xffffffff | |
3b0: ffffffff .word 0xffffffff | |
3b4: ffffffff .word 0xffffffff | |
3b8: ffffffff .word 0xffffffff | |
3bc: ffffffff .word 0xffffffff | |
3c0: ffffffff .word 0xffffffff | |
3c4: ffffffff .word 0xffffffff | |
3c8: ffffffff .word 0xffffffff | |
3cc: ffffffff .word 0xffffffff | |
3d0: ffffffff .word 0xffffffff | |
3d4: ffffffff .word 0xffffffff | |
3d8: ffffffff .word 0xffffffff | |
3dc: ffffffff .word 0xffffffff | |
3e0: ffffffff .word 0xffffffff | |
3e4: ffffffff .word 0xffffffff | |
3e8: ffffffff .word 0xffffffff | |
3ec: ffffffff .word 0xffffffff | |
3f0: ffffffff .word 0xffffffff | |
3f4: ffffffff .word 0xffffffff | |
3f8: ffffffff .word 0xffffffff | |
3fc: ffffffff .word 0xffffffff | |
00000400 <flashconfigbytes>: | |
400: ffffffff ffffffff ffffffff fffffffe ................ | |
00000410 <__do_global_dtors_aux>: | |
410: b510 push {r4, lr} | |
412: 4c06 ldr r4, [pc, #24] ; (42c <__do_global_dtors_aux+0x1c>) | |
414: 7823 ldrb r3, [r4, #0] | |
416: 2b00 cmp r3, #0 | |
418: d107 bne.n 42a <__do_global_dtors_aux+0x1a> | |
41a: 4b05 ldr r3, [pc, #20] ; (430 <__do_global_dtors_aux+0x20>) | |
41c: 2b00 cmp r3, #0 | |
41e: d002 beq.n 426 <__do_global_dtors_aux+0x16> | |
420: 4804 ldr r0, [pc, #16] ; (434 <__do_global_dtors_aux+0x24>) | |
422: e000 b.n 426 <__do_global_dtors_aux+0x16> | |
424: bf00 nop | |
426: 2301 movs r3, #1 | |
428: 7023 strb r3, [r4, #0] | |
42a: bd10 pop {r4, pc} | |
42c: 1ffffe08 .word 0x1ffffe08 | |
430: 00000000 .word 0x00000000 | |
434: 00003078 .word 0x00003078 | |
00000438 <frame_dummy>: | |
438: b508 push {r3, lr} | |
43a: 4b08 ldr r3, [pc, #32] ; (45c <frame_dummy+0x24>) | |
43c: 2b00 cmp r3, #0 | |
43e: d003 beq.n 448 <frame_dummy+0x10> | |
440: 4807 ldr r0, [pc, #28] ; (460 <frame_dummy+0x28>) | |
442: 4908 ldr r1, [pc, #32] ; (464 <frame_dummy+0x2c>) | |
444: e000 b.n 448 <frame_dummy+0x10> | |
446: bf00 nop | |
448: 4807 ldr r0, [pc, #28] ; (468 <frame_dummy+0x30>) | |
44a: 6803 ldr r3, [r0, #0] | |
44c: 2b00 cmp r3, #0 | |
44e: d003 beq.n 458 <frame_dummy+0x20> | |
450: 4b06 ldr r3, [pc, #24] ; (46c <frame_dummy+0x34>) | |
452: 2b00 cmp r3, #0 | |
454: d000 beq.n 458 <frame_dummy+0x20> | |
456: 4798 blx r3 | |
458: bd08 pop {r3, pc} | |
45a: 46c0 nop ; (mov r8, r8) | |
45c: 00000000 .word 0x00000000 | |
460: 00003078 .word 0x00003078 | |
464: 1ffffe0c .word 0x1ffffe0c | |
468: 1ffffe08 .word 0x1ffffe08 | |
46c: 00000000 .word 0x00000000 | |
00000470 <_ZN5Print7printlnEPKc>: | |
size_t print(double n, int digits = 2) { return printFloat(n, digits); } | |
size_t print(const Printable &obj) { return obj.printTo(*this); } | |
size_t println(void); | |
size_t println(const String &s) { return print(s) + println(); } | |
size_t println(char c) { return print(c) + println(); } | |
size_t println(const char s[]) { return print(s) + println(); } | |
470: b538 push {r3, r4, r5, lr} | |
472: 1c04 adds r4, r0, #0 | |
class Print | |
{ | |
public: | |
Print() : write_error(0) {} | |
virtual size_t write(uint8_t b) = 0; | |
size_t write(const char *str) { return write((const uint8_t *)str, strlen(str)); } | |
474: 1c08 adds r0, r1, #0 | |
size_t print(double n, int digits = 2) { return printFloat(n, digits); } | |
size_t print(const Printable &obj) { return obj.printTo(*this); } | |
size_t println(void); | |
size_t println(const String &s) { return print(s) + println(); } | |
size_t println(char c) { return print(c) + println(); } | |
size_t println(const char s[]) { return print(s) + println(); } | |
476: 1c0d adds r5, r1, #0 | |
class Print | |
{ | |
public: | |
Print() : write_error(0) {} | |
virtual size_t write(uint8_t b) = 0; | |
size_t write(const char *str) { return write((const uint8_t *)str, strlen(str)); } | |
478: f002 fc5b bl 2d32 <strlen> | |
47c: 6823 ldr r3, [r4, #0] | |
47e: 1c02 adds r2, r0, #0 | |
480: 1c29 adds r1, r5, #0 | |
482: 685b ldr r3, [r3, #4] | |
484: 1c20 adds r0, r4, #0 | |
486: 4798 blx r3 | |
488: 1c05 adds r5, r0, #0 | |
size_t print(double n, int digits = 2) { return printFloat(n, digits); } | |
size_t print(const Printable &obj) { return obj.printTo(*this); } | |
size_t println(void); | |
size_t println(const String &s) { return print(s) + println(); } | |
size_t println(char c) { return print(c) + println(); } | |
size_t println(const char s[]) { return print(s) + println(); } | |
48a: 1c20 adds r0, r4, #0 | |
48c: f000 ff94 bl 13b8 <_ZN5Print7printlnEv> | |
490: 1828 adds r0, r5, r0 | |
492: bd38 pop {r3, r4, r5, pc} | |
00000494 <_ZN13CRGBPalette16aSEPKh>: | |
// the exact stripe widths at the expense of dropping some colors. | |
CRGBPalette16( TProgmemRGBGradientPalette_bytes progpal ) | |
{ | |
*this = progpal; | |
} | |
CRGBPalette16& operator=( TProgmemRGBGradientPalette_bytes progpal ) | |
494: b5f0 push {r4, r5, r6, r7, lr} | |
496: b091 sub sp, #68 ; 0x44 | |
498: 900a str r0, [sp, #40] ; 0x28 | |
49a: 1c0c adds r4, r1, #0 | |
{ | |
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal); | |
TRGBGradientPaletteEntryUnion u; | |
// Count entries | |
uint16_t count = 0; | |
49c: 2500 movs r5, #0 | |
do { | |
u.dword = FL_PGM_READ_DWORD_NEAR(progent + count); | |
49e: 00ab lsls r3, r5, #2 | |
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal); | |
TRGBGradientPaletteEntryUnion u; | |
// Count entries | |
uint16_t count = 0; | |
do { | |
4a0: 5ce6 ldrb r6, [r4, r3] | |
u.dword = FL_PGM_READ_DWORD_NEAR(progent + count); | |
count++;; | |
4a2: 3501 adds r5, #1 | |
4a4: b2ad uxth r5, r5 | |
TRGBGradientPaletteEntryUnion* progent = (TRGBGradientPaletteEntryUnion*)(progpal); | |
TRGBGradientPaletteEntryUnion u; | |
// Count entries | |
uint16_t count = 0; | |
do { | |
4a6: 2eff cmp r6, #255 ; 0xff | |
4a8: d1f9 bne.n 49e <_ZN13CRGBPalette16aSEPKh+0xa> | |
count++;; | |
} while ( u.index != 255); | |
int8_t lastSlotUsed = -1; | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
4aa: 6823 ldr r3, [r4, #0] | |
CRGB rgbstart( u.r, u.g, u.b); | |
int indexstart = 0; | |
4ac: 2000 movs r0, #0 | |
} while ( u.index != 255); | |
int8_t lastSlotUsed = -1; | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
CRGB rgbstart( u.r, u.g, u.b); | |
4ae: 041a lsls r2, r3, #16 | |
4b0: 0e12 lsrs r2, r2, #24 | |
4b2: 9205 str r2, [sp, #20] | |
4b4: 021a lsls r2, r3, #8 | |
4b6: 0e12 lsrs r2, r2, #24 | |
4b8: 9204 str r2, [sp, #16] | |
4ba: 0e1f lsrs r7, r3, #24 | |
int indexstart = 0; | |
uint8_t istart8 = 0; | |
uint8_t iend8 = 0; | |
while( indexstart < 255) { | |
progent++; | |
4bc: 3404 adds r4, #4 | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
4be: 6823 ldr r3, [r4, #0] | |
int indexend = u.index; | |
CRGB rgbend( u.r, u.g, u.b); | |
istart8 = indexstart / 16; | |
4c0: 1100 asrs r0, r0, #4 | |
uint8_t istart8 = 0; | |
uint8_t iend8 = 0; | |
while( indexstart < 255) { | |
progent++; | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
int indexend = u.index; | |
4c2: b2d9 uxtb r1, r3 | |
CRGB rgbend( u.r, u.g, u.b); | |
4c4: 041a lsls r2, r3, #16 | |
4c6: 0e12 lsrs r2, r2, #24 | |
uint8_t istart8 = 0; | |
uint8_t iend8 = 0; | |
while( indexstart < 255) { | |
progent++; | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
int indexend = u.index; | |
4c8: 9102 str r1, [sp, #8] | |
CRGB rgbend( u.r, u.g, u.b); | |
4ca: 4669 mov r1, sp | |
4cc: 760a strb r2, [r1, #24] | |
4ce: b2d1 uxtb r1, r2 | |
4d0: 021a lsls r2, r3, #8 | |
4d2: 0e12 lsrs r2, r2, #24 | |
4d4: 0e1b lsrs r3, r3, #24 | |
4d6: 910b str r1, [sp, #44] ; 0x2c | |
4d8: a908 add r1, sp, #32 | |
4da: 700a strb r2, [r1, #0] | |
4dc: b2d1 uxtb r1, r2 | |
4de: b2da uxtb r2, r3 | |
4e0: 920d str r2, [sp, #52] ; 0x34 | |
istart8 = indexstart / 16; | |
iend8 = indexend / 16; | |
4e2: 9a02 ldr r2, [sp, #8] | |
uint8_t iend8 = 0; | |
while( indexstart < 255) { | |
progent++; | |
u.dword = FL_PGM_READ_DWORD_NEAR( progent); | |
int indexend = u.index; | |
CRGB rgbend( u.r, u.g, u.b); | |
4e4: 910c str r1, [sp, #48] ; 0x30 | |
4e6: 469c mov ip, r3 | |
istart8 = indexstart / 16; | |
4e8: b2c1 uxtb r1, r0 | |
iend8 = indexend / 16; | |
4ea: 0913 lsrs r3, r2, #4 | |
if( count < 16) { | |
4ec: 2d0f cmp r5, #15 | |
4ee: d80c bhi.n 50a <_ZN13CRGBPalette16aSEPKh+0x76> | |
if( (istart8 <= lastSlotUsed) && (lastSlotUsed < 15)) { | |
4f0: b272 sxtb r2, r6 | |
4f2: 4290 cmp r0, r2 | |
4f4: dc08 bgt.n 508 <_ZN13CRGBPalette16aSEPKh+0x74> | |
4f6: 2a0e cmp r2, #14 | |
4f8: dc06 bgt.n 508 <_ZN13CRGBPalette16aSEPKh+0x74> | |
istart8 = lastSlotUsed + 1; | |
4fa: 3601 adds r6, #1 | |
4fc: b2f1 uxtb r1, r6 | |
4fe: 1c0a adds r2, r1, #0 | |
500: 4299 cmp r1, r3 | |
502: d200 bcs.n 506 <_ZN13CRGBPalette16aSEPKh+0x72> | |
504: 1c1a adds r2, r3, #0 | |
506: b2d3 uxtb r3, r2 | |
if( iend8 < istart8) { | |
iend8 = istart8; | |
} | |
} | |
lastSlotUsed = iend8; | |
508: b2de uxtb r6, r3 | |
} | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
50a: 9805 ldr r0, [sp, #20] | |
50c: aa0e add r2, sp, #56 ; 0x38 | |
50e: 7010 strb r0, [r2, #0] | |
g = rhs.g; | |
b = rhs.b; | |
510: 7097 strb r7, [r2, #2] | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
g = rhs.g; | |
512: 9804 ldr r0, [sp, #16] | |
} | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
514: 466f mov r7, sp | |
516: 7e3f ldrb r7, [r7, #24] | |
g = rhs.g; | |
518: 7050 strb r0, [r2, #1] | |
} | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
51a: a80f add r0, sp, #60 ; 0x3c | |
51c: 7007 strb r7, [r0, #0] | |
g = rhs.g; | |
51e: af08 add r7, sp, #32 | |
520: 783f ldrb r7, [r7, #0] | |
522: 7047 strb r7, [r0, #1] | |
b = rhs.b; | |
524: 4667 mov r7, ip | |
526: 7087 strb r7, [r0, #2] | |
} | |
fill_gradient_RGB( &(entries[0]), istart8, rgbstart, iend8, rgbend); | |
528: 9000 str r0, [sp, #0] | |
52a: 980a ldr r0, [sp, #40] ; 0x28 | |
52c: f000 f85a bl 5e4 <_Z17fill_gradient_RGBP4CRGBtS_tS_> | |
CRGB rgbstart( u.r, u.g, u.b); | |
int indexstart = 0; | |
uint8_t istart8 = 0; | |
uint8_t iend8 = 0; | |
while( indexstart < 255) { | |
530: 9f02 ldr r7, [sp, #8] | |
532: 2fff cmp r7, #255 ; 0xff | |
534: d006 beq.n 544 <_ZN13CRGBPalette16aSEPKh+0xb0> | |
} | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
536: 9f0b ldr r7, [sp, #44] ; 0x2c | |
} | |
} | |
lastSlotUsed = iend8; | |
} | |
fill_gradient_RGB( &(entries[0]), istart8, rgbstart, iend8, rgbend); | |
indexstart = indexend; | |
538: 9802 ldr r0, [sp, #8] | |
53a: 9705 str r7, [sp, #20] | |
g = rhs.g; | |
53c: 9f0c ldr r7, [sp, #48] ; 0x30 | |
53e: 9704 str r7, [sp, #16] | |
b = rhs.b; | |
540: 9f0d ldr r7, [sp, #52] ; 0x34 | |
542: e7bb b.n 4bc <_ZN13CRGBPalette16aSEPKh+0x28> | |
rgbstart = rgbend; | |
} | |
return *this; | |
} | |
544: 980a ldr r0, [sp, #40] ; 0x28 | |
546: b011 add sp, #68 ; 0x44 | |
548: bdf0 pop {r4, r5, r6, r7, pc} | |
54a: ffff b510 vsli.32 d27, d0, #31 | |
0000054c <setup>: | |
// merely having this object created causes the program to crash | |
// comment out this line to get see the 3 Serial.print() output | |
LedsMultitask Bordlys; | |
void setup() { | |
54c: b510 push {r4, lr} | |
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even | |
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; } | |
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; } | |
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; } | |
operator bool() { return usb_configuration && | |
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) && | |
54e: 4b12 ldr r3, [pc, #72] ; (598 <setup+0x4c>) | |
550: 781b ldrb r3, [r3, #0] | |
552: 2b00 cmp r3, #0 | |
554: d0fb beq.n 54e <setup+0x2> | |
556: 4b11 ldr r3, [pc, #68] ; (59c <setup+0x50>) | |
558: 781b ldrb r3, [r3, #0] | |
uint8_t stopbits(void) { uint8_t b = usb_cdc_line_coding[1]; if (!b) b = 1; return b; } | |
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even | |
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; } | |
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; } | |
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; } | |
operator bool() { return usb_configuration && | |
55a: 079a lsls r2, r3, #30 | |
55c: d0f7 beq.n 54e <setup+0x2> | |
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) && | |
((uint32_t)(systick_millis_count - usb_cdc_line_rtsdtr_millis) >= 25); | |
55e: 4b10 ldr r3, [pc, #64] ; (5a0 <setup+0x54>) | |
560: 681a ldr r2, [r3, #0] | |
562: 4b10 ldr r3, [pc, #64] ; (5a4 <setup+0x58>) | |
564: 681b ldr r3, [r3, #0] | |
566: 1ad3 subs r3, r2, r3 | |
uint8_t paritytype(void) { return usb_cdc_line_coding[1] >> 8; } // 0=none, 1=odd, 2=even | |
uint8_t numbits(void) { return usb_cdc_line_coding[1] >> 16; } | |
uint8_t dtr(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_DTR) ? 1 : 0; } | |
uint8_t rts(void) { return (usb_cdc_line_rtsdtr & USB_SERIAL_RTS) ? 1 : 0; } | |
operator bool() { return usb_configuration && | |
(usb_cdc_line_rtsdtr & (USB_SERIAL_DTR | USB_SERIAL_RTS)) && | |
568: 2b18 cmp r3, #24 | |
56a: d9f0 bls.n 54e <setup+0x2> | |
while (!Serial) ; // wait for Arduino Serial Monitor | |
delay(10); | |
56c: 200a movs r0, #10 | |
56e: f000 f923 bl 7b8 <delay> | |
Serial.println("setup begin"); | |
572: 4c0d ldr r4, [pc, #52] ; (5a8 <setup+0x5c>) | |
574: 490d ldr r1, [pc, #52] ; (5ac <setup+0x60>) | |
576: 1c20 adds r0, r4, #0 | |
578: f7ff ff7a bl 470 <_ZN5Print7printlnEPKc> | |
Serial.println("setup2"); // must print 2+ strings to reproduce problem | |
57c: 1c20 adds r0, r4, #0 | |
57e: 490c ldr r1, [pc, #48] ; (5b0 <setup+0x64>) | |
580: f7ff ff76 bl 470 <_ZN5Print7printlnEPKc> | |
size_t printNumberAny(unsigned long n, uint8_t base); | |
inline size_t printNumber(unsigned long n, uint8_t base, uint8_t sign) __attribute__((always_inline)) { | |
// when "base" is a constant (pretty much always), the | |
// compiler optimizes this to a single function call. | |
if (base == 0) return write((uint8_t)n); | |
if (base == 10 || base < 2) return printNumberDec(n, sign); | |
584: 2130 movs r1, #48 ; 0x30 | |
586: 2200 movs r2, #0 | |
588: 1c20 adds r0, r4, #0 | |
58a: f000 ff27 bl 13dc <_ZN5Print14printNumberDecEmh> | |
size_t println(const char s[]) { return print(s) + println(); } | |
size_t println(const __FlashStringHelper *f) { return print(f) + println(); } | |
size_t println(uint8_t b) { return print(b) + println(); } | |
size_t println(int n) { return print(n) + println(); } | |
size_t println(unsigned int n) { return print(n) + println(); } | |
58e: 1c20 adds r0, r4, #0 | |
590: f000 ff12 bl 13b8 <_ZN5Print7printlnEv> | |
Serial.println(sizeof(LedsMultitask)); | |
} | |
594: bd10 pop {r4, pc} | |
596: 46c0 nop ; (mov r8, r8) | |
598: 1fffff47 .word 0x1fffff47 | |
59c: 1fffff58 .word 0x1fffff58 | |
5a0: 1ffffe64 .word 0x1ffffe64 | |
5a4: 2000013c .word 0x2000013c | |
5a8: 1fffff5c .word 0x1fffff5c | |
5ac: 00002d40 .word 0x00002d40 | |
5b0: 00002d4c .word 0x00002d4c | |
000005b4 <loop>: | |
void loop() {} | |
5b4: 4770 bx lr | |
5b6: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8 | |
000005b8 <_GLOBAL__sub_I_heatmap_gp>: | |
5b8: b508 push {r3, lr} | |
// will be, by definition, different from the widths in the gradient | |
// palette. This code attempts to preserve "all the colors", rather than | |
// the exact stripe widths at the expense of dropping some colors. | |
CRGBPalette16( TProgmemRGBGradientPalette_bytes progpal ) | |
{ | |
*this = progpal; | |
5ba: 4802 ldr r0, [pc, #8] ; (5c4 <_GLOBAL__sub_I_heatmap_gp+0xc>) | |
5bc: 4902 ldr r1, [pc, #8] ; (5c8 <_GLOBAL__sub_I_heatmap_gp+0x10>) | |
5be: f7ff ff69 bl 494 <_ZN13CRGBPalette16aSEPKh> | |
5c2: bd08 pop {r3, pc} | |
5c4: 1ffffe24 .word 0x1ffffe24 | |
5c8: 00002d53 .word 0x00002d53 | |
000005cc <_GLOBAL__sub_I_pSmartMatrix>: | |
// uint32_t CRGB::Squant = ((uint32_t)((__TIME__[4]-'0') * 28))<<16 | ((__TIME__[6]-'0')*50)<<8 | ((__TIME__[7]-'0')*28); | |
CFastLED::CFastLED() { | |
// clear out the array of led controllers | |
// m_nControllers = 0; | |
m_Scale = 255; | |
5cc: 4b04 ldr r3, [pc, #16] ; (5e0 <_GLOBAL__sub_I_pSmartMatrix+0x14>) | |
5ce: 22ff movs r2, #255 ; 0xff | |
5d0: 701a strb r2, [r3, #0] | |
m_nFPS = 0; | |
5d2: 2200 movs r2, #0 | |
5d4: 805a strh r2, [r3, #2] | |
m_pPowerFunc = NULL; | |
5d6: 60da str r2, [r3, #12] | |
m_nPowerData = 0xFFFFFFFF; | |
5d8: 2201 movs r2, #1 | |
5da: 4252 negs r2, r2 | |
5dc: 609a str r2, [r3, #8] | |
} else { | |
m_nMinMicros = 0; | |
} | |
} | |
extern "C" int atexit(void (* /*func*/ )()) { return 0; } | |
5de: 4770 bx lr | |
5e0: 1ffffe54 .word 0x1ffffe54 | |
000005e4 <_Z17fill_gradient_RGBP4CRGBtS_tS_>: | |
void fill_gradient_RGB( CRGB* leds, | |
uint16_t startpos, CRGB startcolor, | |
uint16_t endpos, CRGB endcolor ) | |
{ | |
5e4: b5f0 push {r4, r5, r6, r7, lr} | |
5e6: b089 sub sp, #36 ; 0x24 | |
5e8: 1c1d adds r5, r3, #0 | |
5ea: 9007 str r0, [sp, #28] | |
5ec: 1c0c adds r4, r1, #0 | |
5ee: 9b0e ldr r3, [sp, #56] ; 0x38 | |
// if the points are in the wrong order, straighten them | |
if( endpos < startpos ) { | |
5f0: 428d cmp r5, r1 | |
5f2: d20e bcs.n 612 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x2e> | |
} | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
5f4: 7817 ldrb r7, [r2, #0] | |
} | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
5f6: 781e ldrb r6, [r3, #0] | |
} | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
5f8: 701f strb r7, [r3, #0] | |
g = rhs.g; | |
5fa: 7857 ldrb r7, [r2, #1] | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
g = rhs.g; | |
b = rhs.b; | |
5fc: 7899 ldrb r1, [r3, #2] | |
/// allow copy construction | |
inline CRGB(const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
g = rhs.g; | |
5fe: 7858 ldrb r0, [r3, #1] | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
g = rhs.g; | |
600: 705f strb r7, [r3, #1] | |
b = rhs.b; | |
602: 7897 ldrb r7, [r2, #2] | |
604: 7091 strb r1, [r2, #2] | |
606: 1c21 adds r1, r4, #0 | |
608: 709f strb r7, [r3, #2] | |
60a: 1c2c adds r4, r5, #0 | |
} | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
60c: 7016 strb r6, [r2, #0] | |
g = rhs.g; | |
60e: 7050 strb r0, [r2, #1] | |
610: 1c0d adds r5, r1, #0 | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
612: 7816 ldrb r6, [r2, #0] | |
614: 7818 ldrb r0, [r3, #0] | |
616: 9602 str r6, [sp, #8] | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
618: 7857 ldrb r7, [r2, #1] | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
61a: 1b80 subs r0, r0, r6 | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
61c: 9703 str r7, [sp, #12] | |
bdistance87 = (endcolor.b - startcolor.b) << 7; | |
61e: 7892 ldrb r2, [r2, #2] | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
620: 785f ldrb r7, [r3, #1] | |
bdistance87 = (endcolor.b - startcolor.b) << 7; | |
622: 9204 str r2, [sp, #16] | |
624: 789b ldrb r3, [r3, #2] | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
626: 9e03 ldr r6, [sp, #12] | |
bdistance87 = (endcolor.b - startcolor.b) << 7; | |
628: 1a9b subs r3, r3, r2 | |
62a: 01db lsls r3, r3, #7 | |
62c: 9305 str r3, [sp, #20] | |
uint16_t pixeldistance = endpos - startpos; | |
62e: 1b2b subs r3, r5, r4 | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
630: 1bbf subs r7, r7, r6 | |
bdistance87 = (endcolor.b - startcolor.b) << 7; | |
uint16_t pixeldistance = endpos - startpos; | |
632: b29b uxth r3, r3 | |
saccum87 rdistance87; | |
saccum87 gdistance87; | |
saccum87 bdistance87; | |
rdistance87 = (endcolor.r - startcolor.r) << 7; | |
634: 01c0 lsls r0, r0, #7 | |
gdistance87 = (endcolor.g - startcolor.g) << 7; | |
636: 01ff lsls r7, r7, #7 | |
bdistance87 = (endcolor.b - startcolor.b) << 7; | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
638: 2601 movs r6, #1 | |
63a: 2b00 cmp r3, #0 | |
63c: d000 beq.n 640 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x5c> | |
63e: b29e uxth r6, r3 | |
saccum87 rdelta87 = rdistance87 / divisor; | |
640: b236 sxth r6, r6 | |
642: 1c31 adds r1, r6, #0 | |
644: f002 fac6 bl 2bd4 <__aeabi_idiv> | |
saccum87 gdelta87 = gdistance87 / divisor; | |
saccum87 bdelta87 = bdistance87 / divisor; | |
rdelta87 *= 2; | |
648: 0040 lsls r0, r0, #1 | |
64a: b280 uxth r0, r0 | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
saccum87 rdelta87 = rdistance87 / divisor; | |
saccum87 gdelta87 = gdistance87 / divisor; | |
64c: 1c31 adds r1, r6, #0 | |
saccum87 bdelta87 = bdistance87 / divisor; | |
rdelta87 *= 2; | |
64e: 9006 str r0, [sp, #24] | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
saccum87 rdelta87 = rdistance87 / divisor; | |
saccum87 gdelta87 = gdistance87 / divisor; | |
650: 1c38 adds r0, r7, #0 | |
652: f002 fabf bl 2bd4 <__aeabi_idiv> | |
saccum87 bdelta87 = bdistance87 / divisor; | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
656: 0047 lsls r7, r0, #1 | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
saccum87 rdelta87 = rdistance87 / divisor; | |
saccum87 gdelta87 = gdistance87 / divisor; | |
saccum87 bdelta87 = bdistance87 / divisor; | |
658: 1c31 adds r1, r6, #0 | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
65a: b2bf uxth r7, r7 | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
saccum87 rdelta87 = rdistance87 / divisor; | |
saccum87 gdelta87 = gdistance87 / divisor; | |
saccum87 bdelta87 = bdistance87 / divisor; | |
65c: 9805 ldr r0, [sp, #20] | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
65e: 9701 str r7, [sp, #4] | |
uint16_t pixeldistance = endpos - startpos; | |
int16_t divisor = pixeldistance ? pixeldistance : 1; | |
saccum87 rdelta87 = rdistance87 / divisor; | |
saccum87 gdelta87 = gdistance87 / divisor; | |
saccum87 bdelta87 = bdistance87 / divisor; | |
660: f002 fab8 bl 2bd4 <__aeabi_idiv> | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
bdelta87 *= 2; | |
accum88 r88 = startcolor.r << 8; | |
664: 9f02 ldr r7, [sp, #8] | |
accum88 g88 = startcolor.g << 8; | |
666: 9e03 ldr r6, [sp, #12] | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
bdelta87 *= 2; | |
accum88 r88 = startcolor.r << 8; | |
668: 023b lsls r3, r7, #8 | |
accum88 g88 = startcolor.g << 8; | |
accum88 b88 = startcolor.b << 8; | |
66a: 9f04 ldr r7, [sp, #16] | |
saccum87 gdelta87 = gdistance87 / divisor; | |
saccum87 bdelta87 = bdistance87 / divisor; | |
rdelta87 *= 2; | |
gdelta87 *= 2; | |
bdelta87 *= 2; | |
66c: 0040 lsls r0, r0, #1 | |
66e: b280 uxth r0, r0 | |
accum88 r88 = startcolor.r << 8; | |
accum88 g88 = startcolor.g << 8; | |
670: 0232 lsls r2, r6, #8 | |
accum88 b88 = startcolor.b << 8; | |
672: 0239 lsls r1, r7, #8 | |
for( uint16_t i = startpos; i <= endpos; i++) { | |
674: 42ac cmp r4, r5 | |
676: d814 bhi.n 6a2 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0xbe> | |
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8); | |
678: 2603 movs r6, #3 | |
67a: 4366 muls r6, r4 | |
67c: 9f07 ldr r7, [sp, #28] | |
bdelta87 *= 2; | |
accum88 r88 = startcolor.r << 8; | |
accum88 g88 = startcolor.g << 8; | |
accum88 b88 = startcolor.b << 8; | |
for( uint16_t i = startpos; i <= endpos; i++) { | |
67e: 3401 adds r4, #1 | |
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8); | |
680: 19be adds r6, r7, r6 | |
682: 121f asrs r7, r3, #8 | |
} | |
/// allow assignment from one RGB struct to another | |
inline CRGB& operator= (const CRGB& rhs) __attribute__((always_inline)) | |
{ | |
r = rhs.r; | |
684: 7037 strb r7, [r6, #0] | |
686: 1217 asrs r7, r2, #8 | |
g = rhs.g; | |
688: 7077 strb r7, [r6, #1] | |
68a: 120f asrs r7, r1, #8 | |
b = rhs.b; | |
68c: 70b7 strb r7, [r6, #2] | |
r88 += rdelta87; | |
68e: 9e06 ldr r6, [sp, #24] | |
g88 += gdelta87; | |
690: 9f01 ldr r7, [sp, #4] | |
accum88 r88 = startcolor.r << 8; | |
accum88 g88 = startcolor.g << 8; | |
accum88 b88 = startcolor.b << 8; | |
for( uint16_t i = startpos; i <= endpos; i++) { | |
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8); | |
r88 += rdelta87; | |
692: 199b adds r3, r3, r6 | |
g88 += gdelta87; | |
694: 19d2 adds r2, r2, r7 | |
b88 += bdelta87; | |
696: 1809 adds r1, r1, r0 | |
accum88 r88 = startcolor.r << 8; | |
accum88 g88 = startcolor.g << 8; | |
accum88 b88 = startcolor.b << 8; | |
for( uint16_t i = startpos; i <= endpos; i++) { | |
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8); | |
r88 += rdelta87; | |
698: b29b uxth r3, r3 | |
g88 += gdelta87; | |
69a: b292 uxth r2, r2 | |
b88 += bdelta87; | |
69c: b289 uxth r1, r1 | |
bdelta87 *= 2; | |
accum88 r88 = startcolor.r << 8; | |
accum88 g88 = startcolor.g << 8; | |
accum88 b88 = startcolor.b << 8; | |
for( uint16_t i = startpos; i <= endpos; i++) { | |
69e: b2a4 uxth r4, r4 | |
6a0: e7e8 b.n 674 <_Z17fill_gradient_RGBP4CRGBtS_tS_+0x90> | |
leds[i] = CRGB( r88 >> 8, g88 >> 8, b88 >> 8); | |
r88 += rdelta87; | |
g88 += gdelta87; | |
b88 += bdelta87; | |
} | |
} | |
6a2: b009 add sp, #36 ; 0x24 | |
6a4: bdf0 pop {r4, r5, r6, r7, pc} | |
6a6: ffff b510 vsli.32 d27, d0, #31 | |
000006a8 <digitalWrite>: | |
// TODO: startup code needs to initialize all pins to GPIO mode, input by default | |
void digitalWrite(uint8_t pin, uint8_t val) | |
{ | |
6a8: b510 push {r4, lr} | |
if (pin >= CORE_NUM_DIGITAL) return; | |
6aa: 281a cmp r0, #26 | |
6ac: d818 bhi.n 6e0 <digitalWrite+0x38> | |
*portSetRegister(pin) = 1; | |
} else { | |
*portClearRegister(pin) = 1; | |
} | |
#else | |
if (*portModeRegister(pin) & digitalPinToBitMask(pin)) { | |
6ae: 230c movs r3, #12 | |
6b0: 4358 muls r0, r3 | |
6b2: 4a0c ldr r2, [pc, #48] ; (6e4 <digitalWrite+0x3c>) | |
6b4: 5883 ldr r3, [r0, r2] | |
6b6: 1810 adds r0, r2, r0 | |
6b8: 7d1c ldrb r4, [r3, #20] | |
6ba: 7a02 ldrb r2, [r0, #8] | |
6bc: 4222 tst r2, r4 | |
6be: d005 beq.n 6cc <digitalWrite+0x24> | |
if (val) { | |
6c0: 2900 cmp r1, #0 | |
6c2: d001 beq.n 6c8 <digitalWrite+0x20> | |
*portSetRegister(pin) = digitalPinToBitMask(pin); | |
6c4: 711a strb r2, [r3, #4] | |
6c6: e00b b.n 6e0 <digitalWrite+0x38> | |
} else { | |
*portClearRegister(pin) = digitalPinToBitMask(pin); | |
6c8: 721a strb r2, [r3, #8] | |
6ca: e009 b.n 6e0 <digitalWrite+0x38> | |
} | |
#endif | |
} else { | |
volatile uint32_t *config = portConfigRegister(pin); | |
6cc: 6843 ldr r3, [r0, #4] | |
if (val) { | |
// TODO use bitband for atomic read-mod-write | |
*config |= (PORT_PCR_PE | PORT_PCR_PS); | |
6ce: 681a ldr r2, [r3, #0] | |
*portClearRegister(pin) = digitalPinToBitMask(pin); | |
} | |
#endif | |
} else { | |
volatile uint32_t *config = portConfigRegister(pin); | |
if (val) { | |
6d0: 2900 cmp r1, #0 | |
6d2: d002 beq.n 6da <digitalWrite+0x32> | |
// TODO use bitband for atomic read-mod-write | |
*config |= (PORT_PCR_PE | PORT_PCR_PS); | |
6d4: 2103 movs r1, #3 | |
6d6: 430a orrs r2, r1 | |
6d8: e001 b.n 6de <digitalWrite+0x36> | |
//*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; | |
} else { | |
// TODO use bitband for atomic read-mod-write | |
*config &= ~(PORT_PCR_PE); | |
6da: 2102 movs r1, #2 | |
6dc: 438a bics r2, r1 | |
6de: 601a str r2, [r3, #0] | |
//*config = PORT_PCR_MUX(1); | |
} | |
} | |
} | |
6e0: bd10 pop {r4, pc} | |
6e2: 46c0 nop ; (mov r8, r8) | |
6e4: 00002d64 .word 0x00002d64 | |
000006e8 <pinMode>: | |
} | |
void pinMode(uint8_t pin, uint8_t mode) | |
{ | |
6e8: b5f0 push {r4, r5, r6, r7, lr} | |
volatile uint32_t *config; | |
if (pin >= CORE_NUM_DIGITAL) return; | |
6ea: 281a cmp r0, #26 | |
6ec: d83d bhi.n 76a <pinMode+0x82> | |
config = portConfigRegister(pin); | |
6ee: 270c movs r7, #12 | |
6f0: 1c3d adds r5, r7, #0 | |
6f2: 4345 muls r5, r0 | |
6f4: 4a1d ldr r2, [pc, #116] ; (76c <pinMode+0x84>) | |
6f6: 1954 adds r4, r2, r5 | |
6f8: 6863 ldr r3, [r4, #4] | |
6fa: 1c16 adds r6, r2, #0 | |
if (mode == OUTPUT || mode == OUTPUT_OPENDRAIN) { | |
6fc: 2901 cmp r1, #1 | |
6fe: d001 beq.n 704 <pinMode+0x1c> | |
700: 2904 cmp r1, #4 | |
702: d112 bne.n 72a <pinMode+0x42> | |
#ifdef KINETISK | |
*portModeRegister(pin) = 1; | |
#else | |
*portModeRegister(pin) |= digitalPinToBitMask(pin); // TODO: atomic | |
704: 4378 muls r0, r7 | |
706: 5832 ldr r2, [r6, r0] | |
708: 1830 adds r0, r6, r0 | |
70a: 7d14 ldrb r4, [r2, #20] | |
70c: 7a00 ldrb r0, [r0, #8] | |
70e: 4320 orrs r0, r4 | |
710: 7510 strb r0, [r2, #20] | |
#endif | |
*config = PORT_PCR_SRE | PORT_PCR_DSE | PORT_PCR_MUX(1); | |
712: 22a2 movs r2, #162 ; 0xa2 | |
714: 0052 lsls r2, r2, #1 | |
716: 601a str r2, [r3, #0] | |
718: 2220 movs r2, #32 | |
if (mode == OUTPUT_OPENDRAIN) { | |
71a: 2904 cmp r1, #4 | |
71c: d101 bne.n 722 <pinMode+0x3a> | |
*config |= PORT_PCR_ODE; | |
71e: 6819 ldr r1, [r3, #0] | |
720: e014 b.n 74c <pinMode+0x64> | |
} else { | |
*config &= ~PORT_PCR_ODE; | |
722: 6819 ldr r1, [r3, #0] | |
724: 4391 bics r1, r2 | |
726: 1c0a adds r2, r1, #0 | |
728: e01e b.n 768 <pinMode+0x80> | |
} | |
} else { | |
#ifdef KINETISK | |
*portModeRegister(pin) = 0; | |
#else | |
*portModeRegister(pin) &= ~digitalPinToBitMask(pin); | |
72a: 58aa ldr r2, [r5, r2] | |
72c: 7a24 ldrb r4, [r4, #8] | |
72e: 7d10 ldrb r0, [r2, #20] | |
730: 43a0 bics r0, r4 | |
732: 7510 strb r0, [r2, #20] | |
#endif | |
if (mode == INPUT || mode == INPUT_PULLUP || mode == INPUT_PULLDOWN) { | |
734: 2900 cmp r1, #0 | |
736: d002 beq.n 73e <pinMode+0x56> | |
738: 1e8a subs r2, r1, #2 | |
73a: 2a01 cmp r2, #1 | |
73c: d812 bhi.n 764 <pinMode+0x7c> | |
*config = PORT_PCR_MUX(1); | |
73e: 2280 movs r2, #128 ; 0x80 | |
740: 0052 lsls r2, r2, #1 | |
742: 601a str r2, [r3, #0] | |
if (mode == INPUT_PULLUP) { | |
744: 2902 cmp r1, #2 | |
746: d103 bne.n 750 <pinMode+0x68> | |
*config |= (PORT_PCR_PE | PORT_PCR_PS); // pullup | |
748: 681a ldr r2, [r3, #0] | |
74a: 2103 movs r1, #3 | |
74c: 430a orrs r2, r1 | |
74e: e00b b.n 768 <pinMode+0x80> | |
} else if (mode == INPUT_PULLDOWN) { | |
750: 2903 cmp r1, #3 | |
752: d10a bne.n 76a <pinMode+0x82> | |
*config |= (PORT_PCR_PE); // pulldown | |
754: 681a ldr r2, [r3, #0] | |
756: 2102 movs r1, #2 | |
758: 430a orrs r2, r1 | |
75a: 601a str r2, [r3, #0] | |
*config &= ~(PORT_PCR_PS); | |
75c: 681a ldr r2, [r3, #0] | |
75e: 2101 movs r1, #1 | |
760: 438a bics r2, r1 | |
762: e001 b.n 768 <pinMode+0x80> | |
} | |
} else { | |
*config = PORT_PCR_MUX(1) | PORT_PCR_PE | PORT_PCR_PS; // pullup | |
764: 2204 movs r2, #4 | |
766: 32ff adds r2, #255 ; 0xff | |
768: 601a str r2, [r3, #0] | |
} | |
} | |
} | |
76a: bdf0 pop {r4, r5, r6, r7, pc} | |
76c: 00002d64 .word 0x00002d64 | |
00000770 <micros>: | |
uint32_t micros(void) | |
{ | |
uint32_t count, current, istatus; | |
__disable_irq(); | |
770: b672 cpsid i | |
current = SYST_CVR; | |
772: 4b0c ldr r3, [pc, #48] ; (7a4 <micros+0x34>) | |
count = systick_millis_count; | |
istatus = SCB_ICSR; // bit 26 indicates if systick exception pending | |
774: 490c ldr r1, [pc, #48] ; (7a8 <micros+0x38>) | |
uint32_t micros(void) | |
{ | |
uint32_t count, current, istatus; | |
__disable_irq(); | |
current = SYST_CVR; | |
776: 681a ldr r2, [r3, #0] | |
count = systick_millis_count; | |
778: 4b0c ldr r3, [pc, #48] ; (7ac <micros+0x3c>) | |
77a: 681b ldr r3, [r3, #0] | |
istatus = SCB_ICSR; // bit 26 indicates if systick exception pending | |
77c: 6809 ldr r1, [r1, #0] | |
__enable_irq(); | |
77e: b662 cpsie i | |
//systick_current = current; | |
//systick_count = count; | |
//systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0; | |
if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++; | |
780: 0148 lsls r0, r1, #5 | |
782: d504 bpl.n 78e <micros+0x1e> | |
784: 2132 movs r1, #50 ; 0x32 | |
786: 4291 cmp r1, r2 | |
788: 4189 sbcs r1, r1 | |
78a: 4249 negs r1, r1 | |
78c: 185b adds r3, r3, r1 | |
current = ((F_CPU / 1000) - 1) - current; | |
#if defined(KINETISL) && F_CPU == 48000000 | |
return count * 1000 + ((current * (uint32_t)87381) >> 22); | |
78e: 20fa movs r0, #250 ; 0xfa | |
790: 0080 lsls r0, r0, #2 | |
792: 4343 muls r3, r0 | |
__enable_irq(); | |
//systick_current = current; | |
//systick_count = count; | |
//systick_istatus = istatus & SCB_ICSR_PENDSTSET ? 1 : 0; | |
if ((istatus & SCB_ICSR_PENDSTSET) && current > 50) count++; | |
current = ((F_CPU / 1000) - 1) - current; | |
794: 4806 ldr r0, [pc, #24] ; (7b0 <micros+0x40>) | |
796: 1a82 subs r2, r0, r2 | |
#if defined(KINETISL) && F_CPU == 48000000 | |
return count * 1000 + ((current * (uint32_t)87381) >> 22); | |
798: 4806 ldr r0, [pc, #24] ; (7b4 <micros+0x44>) | |
79a: 4342 muls r2, r0 | |
79c: 0d92 lsrs r2, r2, #22 | |
79e: 1898 adds r0, r3, r2 | |
#elif defined(KINETISL) && F_CPU == 24000000 | |
return count * 1000 + ((current * (uint32_t)174763) >> 22); | |
#endif | |
return count * 1000 + current / (F_CPU / 1000000); | |
} | |
7a0: 4770 bx lr | |
7a2: 46c0 nop ; (mov r8, r8) | |
7a4: e000e018 .word 0xe000e018 | |
7a8: e000ed04 .word 0xe000ed04 | |
7ac: 1ffffe64 .word 0x1ffffe64 | |
7b0: 0000bb7f .word 0x0000bb7f | |
7b4: 00015555 .word 0x00015555 | |
000007b8 <delay>: | |
void delay(uint32_t ms) | |
{ | |
7b8: b538 push {r3, r4, r5, lr} | |
7ba: 1c04 adds r4, r0, #0 | |
uint32_t start = micros(); | |
7bc: f7ff ffd8 bl 770 <micros> | |
7c0: 1c05 adds r5, r0, #0 | |
if (ms > 0) { | |
7c2: 2c00 cmp r4, #0 | |
7c4: d00f beq.n 7e6 <delay+0x2e> | |
while (1) { | |
while ((micros() - start) >= 1000) { | |
7c6: f7ff ffd3 bl 770 <micros> | |
7ca: 4b07 ldr r3, [pc, #28] ; (7e8 <delay+0x30>) | |
7cc: 1b40 subs r0, r0, r5 | |
7ce: 4298 cmp r0, r3 | |
7d0: d906 bls.n 7e0 <delay+0x28> | |
ms--; | |
7d2: 3c01 subs r4, #1 | |
if (ms == 0) return; | |
7d4: 2c00 cmp r4, #0 | |
7d6: d006 beq.n 7e6 <delay+0x2e> | |
start += 1000; | |
7d8: 23fa movs r3, #250 ; 0xfa | |
7da: 009b lsls r3, r3, #2 | |
7dc: 18ed adds r5, r5, r3 | |
7de: e7f2 b.n 7c6 <delay+0xe> | |
} | |
yield(); | |
7e0: f000 fe62 bl 14a8 <yield> | |
} | |
7e4: e7ef b.n 7c6 <delay+0xe> | |
} | |
} | |
7e6: bd38 pop {r3, r4, r5, pc} | |
7e8: 000003e7 .word 0x000003e7 | |
000007ec <_init_Teensyduino_internal_>: | |
NVIC_ENABLE_IRQ(IRQ_PORTB); | |
NVIC_ENABLE_IRQ(IRQ_PORTC); | |
NVIC_ENABLE_IRQ(IRQ_PORTD); | |
NVIC_ENABLE_IRQ(IRQ_PORTE); | |
#elif defined(__MKL26Z64__) | |
NVIC_ENABLE_IRQ(IRQ_PORTA); | |
7ec: 4b1c ldr r3, [pc, #112] ; (860 <_init_Teensyduino_internal_+0x74>) | |
7ee: 2280 movs r2, #128 ; 0x80 | |
7f0: 05d2 lsls r2, r2, #23 | |
#define DEFAULT_FTM_PRESCALE 0 | |
#endif | |
//void init_pins(void) | |
void _init_Teensyduino_internal_(void) | |
{ | |
7f2: b510 push {r4, lr} | |
NVIC_ENABLE_IRQ(IRQ_PORTB); | |
NVIC_ENABLE_IRQ(IRQ_PORTC); | |
NVIC_ENABLE_IRQ(IRQ_PORTD); | |
NVIC_ENABLE_IRQ(IRQ_PORTE); | |
#elif defined(__MKL26Z64__) | |
NVIC_ENABLE_IRQ(IRQ_PORTA); | |
7f4: 601a str r2, [r3, #0] | |
NVIC_ENABLE_IRQ(IRQ_PORTCD); | |
7f6: 2280 movs r2, #128 ; 0x80 | |
7f8: 0612 lsls r2, r2, #24 | |
7fa: 601a str r2, [r3, #0] | |
#endif | |
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write | |
//SIM_SCGC6 |= SIM_SCGC6_FTM1; | |
FTM0_CNT = 0; | |
7fc: 4b19 ldr r3, [pc, #100] ; (864 <_init_Teensyduino_internal_+0x78>) | |
7fe: 2000 movs r0, #0 | |
800: 6018 str r0, [r3, #0] | |
FTM0_MOD = DEFAULT_FTM_MOD; | |
802: 4919 ldr r1, [pc, #100] ; (868 <_init_Teensyduino_internal_+0x7c>) | |
804: 4b19 ldr r3, [pc, #100] ; (86c <_init_Teensyduino_internal_+0x80>) | |
FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10 | |
806: 4a1a ldr r2, [pc, #104] ; (870 <_init_Teensyduino_internal_+0x84>) | |
NVIC_ENABLE_IRQ(IRQ_PORTCD); | |
#endif | |
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write | |
//SIM_SCGC6 |= SIM_SCGC6_FTM1; | |
FTM0_CNT = 0; | |
FTM0_MOD = DEFAULT_FTM_MOD; | |
808: 6019 str r1, [r3, #0] | |
FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10 | |
80a: 2328 movs r3, #40 ; 0x28 | |
80c: 6013 str r3, [r2, #0] | |
FTM0_C1SC = 0x28; | |
80e: 4a19 ldr r2, [pc, #100] ; (874 <_init_Teensyduino_internal_+0x88>) | |
FTM3_C4SC = 0x28; | |
FTM3_C5SC = 0x28; | |
FTM3_C6SC = 0x28; | |
FTM3_C7SC = 0x28; | |
#endif | |
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | |
810: 4c19 ldr r4, [pc, #100] ; (878 <_init_Teensyduino_internal_+0x8c>) | |
//SIM_SCGC6 |= SIM_SCGC6_FTM0; // TODO: use bitband for atomic read-mod-write | |
//SIM_SCGC6 |= SIM_SCGC6_FTM1; | |
FTM0_CNT = 0; | |
FTM0_MOD = DEFAULT_FTM_MOD; | |
FTM0_C0SC = 0x28; // MSnB:MSnA = 10, ELSnB:ELSnA = 10 | |
FTM0_C1SC = 0x28; | |
812: 6013 str r3, [r2, #0] | |
FTM0_C2SC = 0x28; | |
814: 4a19 ldr r2, [pc, #100] ; (87c <_init_Teensyduino_internal_+0x90>) | |
816: 6013 str r3, [r2, #0] | |
FTM0_C3SC = 0x28; | |
818: 4a19 ldr r2, [pc, #100] ; (880 <_init_Teensyduino_internal_+0x94>) | |
81a: 6013 str r3, [r2, #0] | |
FTM0_C4SC = 0x28; | |
81c: 4a19 ldr r2, [pc, #100] ; (884 <_init_Teensyduino_internal_+0x98>) | |
81e: 6013 str r3, [r2, #0] | |
FTM0_C5SC = 0x28; | |
820: 4a19 ldr r2, [pc, #100] ; (888 <_init_Teensyduino_internal_+0x9c>) | |
822: 6013 str r3, [r2, #0] | |
FTM3_C4SC = 0x28; | |
FTM3_C5SC = 0x28; | |
FTM3_C6SC = 0x28; | |
FTM3_C7SC = 0x28; | |
#endif | |
FTM0_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | |
824: 2209 movs r2, #9 | |
826: 6022 str r2, [r4, #0] | |
FTM1_CNT = 0; | |
828: 4c18 ldr r4, [pc, #96] ; (88c <_init_Teensyduino_internal_+0xa0>) | |
82a: 6020 str r0, [r4, #0] | |
FTM1_MOD = DEFAULT_FTM_MOD; | |
82c: 4c18 ldr r4, [pc, #96] ; (890 <_init_Teensyduino_internal_+0xa4>) | |
82e: 6021 str r1, [r4, #0] | |
FTM1_C0SC = 0x28; | |
830: 4c18 ldr r4, [pc, #96] ; (894 <_init_Teensyduino_internal_+0xa8>) | |
832: 6023 str r3, [r4, #0] | |
FTM1_C1SC = 0x28; | |
834: 4c18 ldr r4, [pc, #96] ; (898 <_init_Teensyduino_internal_+0xac>) | |
836: 6023 str r3, [r4, #0] | |
FTM1_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | |
838: 4c18 ldr r4, [pc, #96] ; (89c <_init_Teensyduino_internal_+0xb0>) | |
83a: 6022 str r2, [r4, #0] | |
#if defined(__MK20DX256__) || defined(__MK64FX512__) || defined(__MK66FX1M0__) || defined(__MKL26Z64__) | |
FTM2_CNT = 0; | |
83c: 4c18 ldr r4, [pc, #96] ; (8a0 <_init_Teensyduino_internal_+0xb4>) | |
83e: 6020 str r0, [r4, #0] | |
FTM2_MOD = DEFAULT_FTM_MOD; | |
840: 4818 ldr r0, [pc, #96] ; (8a4 <_init_Teensyduino_internal_+0xb8>) | |
842: 6001 str r1, [r0, #0] | |
FTM2_C0SC = 0x28; | |
844: 4918 ldr r1, [pc, #96] ; (8a8 <_init_Teensyduino_internal_+0xbc>) | |
846: 600b str r3, [r1, #0] | |
FTM2_C1SC = 0x28; | |
848: 4918 ldr r1, [pc, #96] ; (8ac <_init_Teensyduino_internal_+0xc0>) | |
84a: 600b str r3, [r1, #0] | |
FTM2_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | |
84c: 4b18 ldr r3, [pc, #96] ; (8b0 <_init_Teensyduino_internal_+0xc4>) | |
84e: 601a str r2, [r3, #0] | |
FTM3_MOD = DEFAULT_FTM_MOD; | |
FTM3_C0SC = 0x28; | |
FTM3_C1SC = 0x28; | |
FTM3_SC = FTM_SC_CLKS(1) | FTM_SC_PS(DEFAULT_FTM_PRESCALE); | |
#endif | |
analog_init(); | |
850: f000 fe4e bl 14f0 <analog_init> | |
// for background about this startup delay, please see this conversation | |
// https://forum.pjrc.com/threads/31290-Teensey-3-2-Teensey-Loader-1-24-Issues?p=87273&viewfull=1#post87273 | |
delay(250); | |
854: 20fa movs r0, #250 ; 0xfa | |
856: f7ff ffaf bl 7b8 <delay> | |
usb_init(); | |
85a: f000 fbd5 bl 1008 <usb_init> | |
} | |
85e: bd10 pop {r4, pc} | |
860: e000e100 .word 0xe000e100 | |
864: 40038004 .word 0x40038004 | |
868: 0000bfff .word 0x0000bfff | |
86c: 40038008 .word 0x40038008 | |
870: 4003800c .word 0x4003800c | |
874: 40038014 .word 0x40038014 | |
878: 40038000 .word 0x40038000 | |
87c: 4003801c .word 0x4003801c | |
880: 40038024 .word 0x40038024 | |
884: 4003802c .word 0x4003802c | |
888: 40038034 .word 0x40038034 | |
88c: 40039004 .word 0x40039004 | |
890: 40039008 .word 0x40039008 | |
894: 4003900c .word 0x4003900c | |
898: 40039014 .word 0x40039014 | |
89c: 40039000 .word 0x40039000 | |
8a0: 4003a004 .word 0x4003a004 | |
8a4: 4003a008 .word 0x4003a008 | |
8a8: 4003a00c .word 0x4003a00c | |
8ac: 4003a014 .word 0x4003a014 | |
8b0: 4003a000 .word 0x4003a000 | |
000008b4 <endpoint0_transmit>: | |
USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |
} | |
static void endpoint0_transmit(const void *data, uint32_t len) | |
{ | |
8b4: b5f0 push {r4, r5, r6, r7, lr} | |
serial_print(","); | |
serial_phex16(len); | |
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even"); | |
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n"); | |
#endif | |
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data; | |
8b6: 4f0b ldr r7, [pc, #44] ; (8e4 <endpoint0_transmit+0x30>) | |
8b8: 2202 movs r2, #2 | |
8ba: 783b ldrb r3, [r7, #0] | |
8bc: 4e0a ldr r6, [pc, #40] ; (8e8 <endpoint0_transmit+0x34>) | |
8be: 431a orrs r2, r3 | |
8c0: 00d2 lsls r2, r2, #3 | |
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle); | |
8c2: 4d0a ldr r5, [pc, #40] ; (8ec <endpoint0_transmit+0x38>) | |
serial_print(","); | |
serial_phex16(len); | |
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even"); | |
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n"); | |
#endif | |
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data; | |
8c4: 18b4 adds r4, r6, r2 | |
8c6: 6060 str r0, [r4, #4] | |
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle); | |
8c8: 7828 ldrb r0, [r5, #0] | |
8ca: 2488 movs r4, #136 ; 0x88 | |
8cc: 2800 cmp r0, #0 | |
8ce: d000 beq.n 8d2 <endpoint0_transmit+0x1e> | |
8d0: 24c8 movs r4, #200 ; 0xc8 | |
8d2: 0409 lsls r1, r1, #16 | |
8d4: 430c orrs r4, r1 | |
8d6: 50b4 str r4, [r6, r2] | |
ep0_tx_data_toggle ^= 1; | |
8d8: 2201 movs r2, #1 | |
8da: 4050 eors r0, r2 | |
ep0_tx_bdt_bank ^= 1; | |
8dc: 4053 eors r3, r2 | |
serial_print(ep0_tx_bdt_bank ? ", odd" : ", even"); | |
serial_print(ep0_tx_data_toggle ? ", d1\n" : ", d0\n"); | |
#endif | |
table[index(0, TX, ep0_tx_bdt_bank)].addr = (void *)data; | |
table[index(0, TX, ep0_tx_bdt_bank)].desc = BDT_DESC(len, ep0_tx_data_toggle); | |
ep0_tx_data_toggle ^= 1; | |
8de: 7028 strb r0, [r5, #0] | |
ep0_tx_bdt_bank ^= 1; | |
8e0: 703b strb r3, [r7, #0] | |
} | |
8e2: bdf0 pop {r4, r5, r6, r7, pc} | |
8e4: 1ffffed0 .word 0x1ffffed0 | |
8e8: 1ffff800 .word 0x1ffff800 | |
8ec: 1fffff48 .word 0x1fffff48 | |
000008f0 <usb_rx>: | |
usb_packet_t *usb_rx(uint32_t endpoint) | |
{ | |
usb_packet_t *ret; | |
endpoint--; | |
8f0: 1e43 subs r3, r0, #1 | |
usb_packet_t *usb_rx(uint32_t endpoint) | |
{ | |
8f2: b510 push {r4, lr} | |
usb_packet_t *ret; | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return NULL; | |
8f4: 2b03 cmp r3, #3 | |
8f6: d80f bhi.n 918 <usb_rx+0x28> | |
__disable_irq(); | |
8f8: b672 cpsid i | |
ret = rx_first[endpoint]; | |
8fa: 4a08 ldr r2, [pc, #32] ; (91c <usb_rx+0x2c>) | |
8fc: 0099 lsls r1, r3, #2 | |
8fe: 5888 ldr r0, [r1, r2] | |
if (ret) { | |
900: 2800 cmp r0, #0 | |
902: d007 beq.n 914 <usb_rx+0x24> | |
rx_first[endpoint] = ret->next; | |
904: 6844 ldr r4, [r0, #4] | |
usb_rx_byte_count_data[endpoint] -= ret->len; | |
906: 005b lsls r3, r3, #1 | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return NULL; | |
__disable_irq(); | |
ret = rx_first[endpoint]; | |
if (ret) { | |
rx_first[endpoint] = ret->next; | |
908: 508c str r4, [r1, r2] | |
usb_rx_byte_count_data[endpoint] -= ret->len; | |
90a: 4a05 ldr r2, [pc, #20] ; (920 <usb_rx+0x30>) | |
90c: 8801 ldrh r1, [r0, #0] | |
90e: 5a9c ldrh r4, [r3, r2] | |
910: 1a61 subs r1, r4, r1 | |
912: 5299 strh r1, [r3, r2] | |
} | |
__enable_irq(); | |
914: b662 cpsie i | |
//serial_print("rx, epidx="); | |
//serial_phex(endpoint); | |
//serial_print(", packet="); | |
//serial_phex32(ret); | |
//serial_print("\n"); | |
return ret; | |
916: e000 b.n 91a <usb_rx+0x2a> | |
usb_packet_t *usb_rx(uint32_t endpoint) | |
{ | |
usb_packet_t *ret; | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return NULL; | |
918: 2000 movs r0, #0 | |
//serial_phex(endpoint); | |
//serial_print(", packet="); | |
//serial_phex32(ret); | |
//serial_print("\n"); | |
return ret; | |
} | |
91a: bd10 pop {r4, pc} | |
91c: 1ffffec0 .word 0x1ffffec0 | |
920: 2000012c .word 0x2000012c | |
00000924 <usb_tx_packet_count>: | |
uint32_t usb_tx_packet_count(uint32_t endpoint) | |
{ | |
const usb_packet_t *p; | |
uint32_t count=0; | |
endpoint--; | |
924: 1e43 subs r3, r0, #1 | |
if (endpoint >= NUM_ENDPOINTS) return 0; | |
926: 2000 movs r0, #0 | |
928: 2b03 cmp r3, #3 | |
92a: d809 bhi.n 940 <usb_tx_packet_count+0x1c> | |
__disable_irq(); | |
92c: b672 cpsid i | |
for (p = tx_first[endpoint]; p; p = p->next) count++; | |
92e: 4a05 ldr r2, [pc, #20] ; (944 <usb_tx_packet_count+0x20>) | |
930: 009b lsls r3, r3, #2 | |
932: 589b ldr r3, [r3, r2] | |
934: 2b00 cmp r3, #0 | |
936: d002 beq.n 93e <usb_tx_packet_count+0x1a> | |
938: 3001 adds r0, #1 | |
93a: 685b ldr r3, [r3, #4] | |
93c: e7fa b.n 934 <usb_tx_packet_count+0x10> | |
__enable_irq(); | |
93e: b662 cpsie i | |
return count; | |
} | |
940: 4770 bx lr | |
942: 46c0 nop ; (mov r8, r8) | |
944: 1fffff14 .word 0x1fffff14 | |
00000948 <usb_rx_memory>: | |
// user is creating data very quickly, their consumption could starve reception | |
// without this prioritization. The packet buffer (input) is assigned to the | |
// first endpoint needing memory. | |
// | |
void usb_rx_memory(usb_packet_t *packet) | |
{ | |
948: b538 push {r3, r4, r5, lr} | |
unsigned int i; | |
const uint8_t *cfg; | |
cfg = usb_endpoint_config_table; | |
//serial_print("rx_mem:"); | |
__disable_irq(); | |
94a: b672 cpsid i | |
for (i=1; i <= NUM_ENDPOINTS; i++) { | |
94c: 2301 movs r3, #1 | |
94e: 4a16 ldr r2, [pc, #88] ; (9a8 <usb_rx_memory+0x60>) | |
950: 189a adds r2, r3, r2 | |
952: 3a01 subs r2, #1 | |
#ifdef AUDIO_INTERFACE | |
if (i == AUDIO_RX_ENDPOINT) continue; | |
#endif | |
if (*cfg++ & USB_ENDPT_EPRXEN) { | |
954: 7812 ldrb r2, [r2, #0] | |
956: 0711 lsls r1, r2, #28 | |
958: d51c bpl.n 994 <usb_rx_memory+0x4c> | |
if (table[index(i, RX, EVEN)].desc == 0) { | |
95a: 4a14 ldr r2, [pc, #80] ; (9ac <usb_rx_memory+0x64>) | |
95c: 015c lsls r4, r3, #5 | |
95e: 58a5 ldr r5, [r4, r2] | |
960: 0099 lsls r1, r3, #2 | |
962: 2d00 cmp r5, #0 | |
964: d105 bne.n 972 <usb_rx_memory+0x2a> | |
table[index(i, RX, EVEN)].addr = packet->buf; | |
966: 1913 adds r3, r2, r4 | |
968: 3008 adds r0, #8 | |
96a: 6058 str r0, [r3, #4] | |
table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); | |
96c: 4b10 ldr r3, [pc, #64] ; (9b0 <usb_rx_memory+0x68>) | |
96e: 50a3 str r3, [r4, r2] | |
970: e00a b.n 988 <usb_rx_memory+0x40> | |
__enable_irq(); | |
//serial_phex(i); | |
//serial_print(",even\n"); | |
return; | |
} | |
if (table[index(i, RX, ODD)].desc == 0) { | |
972: 2401 movs r4, #1 | |
974: 4321 orrs r1, r4 | |
976: 00c9 lsls r1, r1, #3 | |
978: 588c ldr r4, [r1, r2] | |
97a: 2c00 cmp r4, #0 | |
97c: d10a bne.n 994 <usb_rx_memory+0x4c> | |
table[index(i, RX, ODD)].addr = packet->buf; | |
97e: 1853 adds r3, r2, r1 | |
980: 3008 adds r0, #8 | |
982: 6058 str r0, [r3, #4] | |
table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); | |
984: 4b0b ldr r3, [pc, #44] ; (9b4 <usb_rx_memory+0x6c>) | |
986: 508b str r3, [r1, r2] | |
usb_rx_memory_needed--; | |
988: 4b0b ldr r3, [pc, #44] ; (9b8 <usb_rx_memory+0x70>) | |
98a: 781a ldrb r2, [r3, #0] | |
98c: 3a01 subs r2, #1 | |
98e: 701a strb r2, [r3, #0] | |
__enable_irq(); | |
990: b662 cpsie i | |
//serial_phex(i); | |
//serial_print(",odd\n"); | |
return; | |
992: e008 b.n 9a6 <usb_rx_memory+0x5e> | |
const uint8_t *cfg; | |
cfg = usb_endpoint_config_table; | |
//serial_print("rx_mem:"); | |
__disable_irq(); | |
for (i=1; i <= NUM_ENDPOINTS; i++) { | |
994: 3301 adds r3, #1 | |
996: 2b05 cmp r3, #5 | |
998: d1d9 bne.n 94e <usb_rx_memory+0x6> | |
//serial_print(",odd\n"); | |
return; | |
} | |
} | |
} | |
__enable_irq(); | |
99a: b662 cpsie i | |
// we should never reach this point. If we get here, it means | |
// usb_rx_memory_needed was set greater than zero, but no memory | |
// was actually needed. | |
usb_rx_memory_needed = 0; | |
99c: 4b06 ldr r3, [pc, #24] ; (9b8 <usb_rx_memory+0x70>) | |
99e: 2200 movs r2, #0 | |
9a0: 701a strb r2, [r3, #0] | |
usb_free(packet); | |
9a2: f000 fba5 bl 10f0 <usb_free> | |
return; | |
} | |
9a6: bd38 pop {r3, r4, r5, pc} | |
9a8: 00002ed8 .word 0x00002ed8 | |
9ac: 1ffff800 .word 0x1ffff800 | |
9b0: 00400088 .word 0x00400088 | |
9b4: 004000c8 .word 0x004000c8 | |
9b8: 1fffff3e .word 0x1fffff3e | |
000009bc <usb_tx>: | |
void usb_tx(uint32_t endpoint, usb_packet_t *packet) | |
{ | |
bdt_t *b = &table[index(endpoint, TX, EVEN)]; | |
uint8_t next; | |
endpoint--; | |
9bc: 1e42 subs r2, r0, #1 | |
//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) | |
//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) | |
void usb_tx(uint32_t endpoint, usb_packet_t *packet) | |
{ | |
9be: b510 push {r4, lr} | |
bdt_t *b = &table[index(endpoint, TX, EVEN)]; | |
uint8_t next; | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return; | |
9c0: 2a03 cmp r2, #3 | |
9c2: d830 bhi.n a26 <usb_tx+0x6a> | |
//#define index(endpoint, tx, odd) (((endpoint) << 2) | ((tx) << 1) | (odd)) | |
//#define stat2bufferdescriptor(stat) (table + ((stat) >> 2)) | |
void usb_tx(uint32_t endpoint, usb_packet_t *packet) | |
{ | |
bdt_t *b = &table[index(endpoint, TX, EVEN)]; | |
9c4: 2302 movs r3, #2 | |
9c6: 0080 lsls r0, r0, #2 | |
9c8: 4318 orrs r0, r3 | |
9ca: 4b17 ldr r3, [pc, #92] ; (a28 <usb_tx+0x6c>) | |
9cc: 00c0 lsls r0, r0, #3 | |
9ce: 181b adds r3, r3, r0 | |
uint8_t next; | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return; | |
__disable_irq(); | |
9d0: b672 cpsid i | |
//serial_print("txstate="); | |
//serial_phex(tx_state[endpoint]); | |
//serial_print("\n"); | |
switch (tx_state[endpoint]) { | |
9d2: 4c16 ldr r4, [pc, #88] ; (a2c <usb_tx+0x70>) | |
9d4: 5ca0 ldrb r0, [r4, r2] | |
9d6: 2803 cmp r0, #3 | |
9d8: d809 bhi.n 9ee <usb_tx+0x32> | |
9da: f002 f899 bl 2b10 <__gnu_thumb1_case_uqi> | |
9de: 0214 .short 0x0214 | |
9e0: 0516 .short 0x0516 | |
case TX_STATE_BOTH_FREE_EVEN_FIRST: | |
next = TX_STATE_ODD_FREE; | |
break; | |
case TX_STATE_BOTH_FREE_ODD_FIRST: | |
b++; | |
9e2: 3308 adds r3, #8 | |
next = TX_STATE_EVEN_FREE; | |
9e4: 2002 movs r0, #2 | |
break; | |
9e6: e011 b.n a0c <usb_tx+0x50> | |
case TX_STATE_EVEN_FREE: | |
next = TX_STATE_NONE_FREE_ODD_FIRST; | |
break; | |
case TX_STATE_ODD_FREE: | |
b++; | |
9e8: 3308 adds r3, #8 | |
next = TX_STATE_NONE_FREE_EVEN_FIRST; | |
9ea: 2004 movs r0, #4 | |
break; | |
9ec: e00e b.n a0c <usb_tx+0x50> | |
default: | |
if (tx_first[endpoint] == NULL) { | |
9ee: 4810 ldr r0, [pc, #64] ; (a30 <usb_tx+0x74>) | |
9f0: 0092 lsls r2, r2, #2 | |
9f2: 5814 ldr r4, [r2, r0] | |
9f4: 4b0f ldr r3, [pc, #60] ; (a34 <usb_tx+0x78>) | |
9f6: 2c00 cmp r4, #0 | |
9f8: d101 bne.n 9fe <usb_tx+0x42> | |
tx_first[endpoint] = packet; | |
9fa: 5011 str r1, [r2, r0] | |
9fc: e001 b.n a02 <usb_tx+0x46> | |
} else { | |
tx_last[endpoint]->next = packet; | |
9fe: 5898 ldr r0, [r3, r2] | |
a00: 6041 str r1, [r0, #4] | |
} | |
tx_last[endpoint] = packet; | |
a02: 5099 str r1, [r3, r2] | |
a04: e00e b.n a24 <usb_tx+0x68> | |
//serial_print("txstate="); | |
//serial_phex(tx_state[endpoint]); | |
//serial_print("\n"); | |
switch (tx_state[endpoint]) { | |
case TX_STATE_BOTH_FREE_EVEN_FIRST: | |
next = TX_STATE_ODD_FREE; | |
a06: 2003 movs r0, #3 | |
a08: e000 b.n a0c <usb_tx+0x50> | |
case TX_STATE_BOTH_FREE_ODD_FIRST: | |
b++; | |
next = TX_STATE_EVEN_FREE; | |
break; | |
case TX_STATE_EVEN_FREE: | |
next = TX_STATE_NONE_FREE_ODD_FIRST; | |
a0a: 2005 movs r0, #5 | |
} | |
tx_last[endpoint] = packet; | |
__enable_irq(); | |
return; | |
} | |
tx_state[endpoint] = next; | |
a0c: 54a0 strb r0, [r4, r2] | |
b->addr = packet->buf; | |
a0e: 1c0a adds r2, r1, #0 | |
a10: 3208 adds r2, #8 | |
a12: 605a str r2, [r3, #4] | |
b->desc = BDT_DESC(packet->len, ((uint32_t)b & 8) ? DATA1 : DATA0); | |
a14: 2288 movs r2, #136 ; 0x88 | |
a16: 0718 lsls r0, r3, #28 | |
a18: d500 bpl.n a1c <usb_tx+0x60> | |
a1a: 22c8 movs r2, #200 ; 0xc8 | |
a1c: 8809 ldrh r1, [r1, #0] | |
a1e: 0409 lsls r1, r1, #16 | |
a20: 430a orrs r2, r1 | |
a22: 601a str r2, [r3, #0] | |
__enable_irq(); | |
a24: b662 cpsie i | |
} | |
a26: bd10 pop {r4, pc} | |
a28: 1ffff800 .word 0x1ffff800 | |
a2c: 1ffffe7c .word 0x1ffffe7c | |
a30: 1fffff14 .word 0x1fffff14 | |
a34: 1fffff24 .word 0x1fffff24 | |
00000a38 <usb_isr>: | |
} | |
void usb_isr(void) | |
{ | |
a38: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} | |
//serial_print("isr"); | |
//status = USB0_ISTAT; | |
//serial_phex(status); | |
//serial_print("\n"); | |
restart: | |
status = USB0_ISTAT; | |
a3a: 49b5 ldr r1, [pc, #724] ; (d10 <usb_isr+0x2d8>) | |
a3c: 780c ldrb r4, [r1, #0] | |
a3e: 1c0e adds r6, r1, #0 | |
a40: b2e4 uxtb r4, r4 | |
if ((status & USB_ISTAT_SOFTOK /* 04 */ )) { | |
a42: 0762 lsls r2, r4, #29 | |
a44: d51d bpl.n a82 <usb_isr+0x4a> | |
if (usb_configuration) { | |
a46: 4bb3 ldr r3, [pc, #716] ; (d14 <usb_isr+0x2dc>) | |
a48: 781b ldrb r3, [r3, #0] | |
a4a: 2b00 cmp r3, #0 | |
a4c: d016 beq.n a7c <usb_isr+0x44> | |
t = usb_reboot_timer; | |
a4e: 4ab2 ldr r2, [pc, #712] ; (d18 <usb_isr+0x2e0>) | |
a50: 7813 ldrb r3, [r2, #0] | |
a52: b2db uxtb r3, r3 | |
if (t) { | |
a54: 2b00 cmp r3, #0 | |
a56: d005 beq.n a64 <usb_isr+0x2c> | |
usb_reboot_timer = --t; | |
a58: 3b01 subs r3, #1 | |
a5a: b2db uxtb r3, r3 | |
a5c: 7013 strb r3, [r2, #0] | |
if (!t) _reboot_Teensyduino_(); | |
a5e: 2b00 cmp r3, #0 | |
a60: d100 bne.n a64 <usb_isr+0x2c> | |
void _reboot_Teensyduino_(void) | |
{ | |
// TODO: initialize R0 with a code.... | |
__asm__ volatile("bkpt"); | |
a62: be00 bkpt 0x0000 | |
if (t) { | |
usb_reboot_timer = --t; | |
if (!t) _reboot_Teensyduino_(); | |
} | |
#ifdef CDC_DATA_INTERFACE | |
t = usb_cdc_transmit_flush_timer; | |
a64: 4aad ldr r2, [pc, #692] ; (d1c <usb_isr+0x2e4>) | |
a66: 7813 ldrb r3, [r2, #0] | |
a68: b2db uxtb r3, r3 | |
if (t) { | |
a6a: 2b00 cmp r3, #0 | |
a6c: d006 beq.n a7c <usb_isr+0x44> | |
usb_cdc_transmit_flush_timer = --t; | |
a6e: 3b01 subs r3, #1 | |
a70: b2db uxtb r3, r3 | |
a72: 7013 strb r3, [r2, #0] | |
if (t == 0) usb_serial_flush_callback(); | |
a74: 2b00 cmp r3, #0 | |
a76: d101 bne.n a7c <usb_isr+0x44> | |
a78: f000 fc7a bl 1370 <usb_serial_flush_callback> | |
#endif | |
#ifdef MULTITOUCH_INTERFACE | |
usb_touchscreen_update_callback(); | |
#endif | |
} | |
USB0_ISTAT = USB_ISTAT_SOFTOK; | |
a7c: 4da4 ldr r5, [pc, #656] ; (d10 <usb_isr+0x2d8>) | |
a7e: 2304 movs r3, #4 | |
a80: 702b strb r3, [r5, #0] | |
} | |
if ((status & USB_ISTAT_TOKDNE /* 08 */ )) { | |
a82: 2508 movs r5, #8 | |
a84: 1c22 adds r2, r4, #0 | |
a86: 402a ands r2, r5 | |
a88: d100 bne.n a8c <usb_isr+0x54> | |
a8a: e254 b.n f36 <usb_isr+0x4fe> | |
uint8_t endpoint; | |
stat = USB0_STAT; | |
a8c: 4ba4 ldr r3, [pc, #656] ; (d20 <usb_isr+0x2e8>) | |
a8e: 4ca5 ldr r4, [pc, #660] ; (d24 <usb_isr+0x2ec>) | |
a90: 781b ldrb r3, [r3, #0] | |
a92: b2db uxtb r3, r3 | |
//serial_print("token: ep="); | |
//serial_phex(stat >> 4); | |
//serial_print(stat & 0x08 ? ",tx" : ",rx"); | |
//serial_print(stat & 0x04 ? ",odd\n" : ",even\n"); | |
endpoint = stat >> 4; | |
a94: 091e lsrs r6, r3, #4 | |
a96: 089a lsrs r2, r3, #2 | |
if (endpoint == 0) { | |
a98: 2e00 cmp r6, #0 | |
a9a: d000 beq.n a9e <usb_isr+0x66> | |
a9c: e1dd b.n e5a <usb_isr+0x422> | |
bdt_t *b; | |
uint32_t pid, size; | |
uint8_t *buf; | |
const uint8_t *data; | |
b = stat2bufferdescriptor(stat); | |
a9e: 00d5 lsls r5, r2, #3 | |
aa0: 1965 adds r5, r4, r5 | |
pid = BDT_PID(b->desc); | |
aa2: 682f ldr r7, [r5, #0] | |
//count = b->desc >> 16; | |
buf = b->addr; | |
aa4: 686a ldr r2, [r5, #4] | |
uint32_t pid, size; | |
uint8_t *buf; | |
const uint8_t *data; | |
b = stat2bufferdescriptor(stat); | |
pid = BDT_PID(b->desc); | |
aa6: 06b8 lsls r0, r7, #26 | |
aa8: 0f00 lsrs r0, r0, #28 | |
//serial_phex(pid); | |
//serial_print(", count:"); | |
//serial_phex(count); | |
//serial_print("\n"); | |
switch (pid) { | |
aaa: 3801 subs r0, #1 | |
aac: 280c cmp r0, #12 | |
aae: d900 bls.n ab2 <usb_isr+0x7a> | |
ab0: e1d0 b.n e54 <usb_isr+0x41c> | |
ab2: f002 f837 bl 2b24 <__gnu_thumb1_case_uhi> | |
ab6: 0193 .short 0x0193 | |
ab8: 01cf0193 .word 0x01cf0193 | |
abc: 01cf01cf .word 0x01cf01cf | |
ac0: 01cf01cf .word 0x01cf01cf | |
ac4: 01ac01cf .word 0x01ac01cf | |
ac8: 01cf01cf .word 0x01cf01cf | |
acc: 000d01cf .word 0x000d01cf | |
// grab the 8 byte setup info | |
setup.word1 = *(uint32_t *)(buf); | |
setup.word2 = *(uint32_t *)(buf + 4); | |
// give the buffer back | |
b->desc = BDT_DESC(EP0_SIZE, DATA1); | |
ad0: 4995 ldr r1, [pc, #596] ; (d28 <usb_isr+0x2f0>) | |
switch (pid) { | |
case 0x0D: // Setup received from host | |
//serial_print("PID=Setup\n"); | |
//if (count != 8) ; // panic? | |
// grab the 8 byte setup info | |
setup.word1 = *(uint32_t *)(buf); | |
ad2: 6813 ldr r3, [r2, #0] | |
ad4: 4f95 ldr r7, [pc, #596] ; (d2c <usb_isr+0x2f4>) | |
setup.word2 = *(uint32_t *)(buf + 4); | |
ad6: 6852 ldr r2, [r2, #4] | |
//serial_print("leftover tx odd\n"); | |
//} | |
table[index(0, TX, EVEN)].desc = 0; | |
table[index(0, TX, ODD)].desc = 0; | |
// first IN after Setup is always DATA1 | |
ep0_tx_data_toggle = 1; | |
ad8: 4895 ldr r0, [pc, #596] ; (d30 <usb_isr+0x2f8>) | |
// grab the 8 byte setup info | |
setup.word1 = *(uint32_t *)(buf); | |
setup.word2 = *(uint32_t *)(buf + 4); | |
// give the buffer back | |
b->desc = BDT_DESC(EP0_SIZE, DATA1); | |
ada: 6029 str r1, [r5, #0] | |
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1); | |
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1); | |
// clear any leftover pending IN transactions | |
ep0_tx_ptr = NULL; | |
adc: 4d95 ldr r5, [pc, #596] ; (d34 <usb_isr+0x2fc>) | |
volatile uint8_t *reg; | |
uint8_t epconf; | |
const uint8_t *cfg; | |
int i; | |
switch (setup.wRequestAndType) { | |
ade: 4996 ldr r1, [pc, #600] ; (d38 <usb_isr+0x300>) | |
b->desc = BDT_DESC(EP0_SIZE, DATA1); | |
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1); | |
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1); | |
// clear any leftover pending IN transactions | |
ep0_tx_ptr = NULL; | |
ae0: 2600 movs r6, #0 | |
switch (pid) { | |
case 0x0D: // Setup received from host | |
//serial_print("PID=Setup\n"); | |
//if (count != 8) ; // panic? | |
// grab the 8 byte setup info | |
setup.word1 = *(uint32_t *)(buf); | |
ae2: 603b str r3, [r7, #0] | |
setup.word2 = *(uint32_t *)(buf + 4); | |
ae4: 607a str r2, [r7, #4] | |
volatile uint8_t *reg; | |
uint8_t epconf; | |
const uint8_t *cfg; | |
int i; | |
switch (setup.wRequestAndType) { | |
ae6: b29b uxth r3, r3 | |
//serial_print("leftover tx odd\n"); | |
//} | |
table[index(0, TX, EVEN)].desc = 0; | |
table[index(0, TX, ODD)].desc = 0; | |
// first IN after Setup is always DATA1 | |
ep0_tx_data_toggle = 1; | |
ae8: 2201 movs r2, #1 | |
b->desc = BDT_DESC(EP0_SIZE, DATA1); | |
//table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 1); | |
//table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 1); | |
// clear any leftover pending IN transactions | |
ep0_tx_ptr = NULL; | |
aea: 602e str r6, [r5, #0] | |
//serial_print("leftover tx even\n"); | |
//} | |
//if (table[index(0, TX, ODD)].desc & 0x80) { | |
//serial_print("leftover tx odd\n"); | |
//} | |
table[index(0, TX, EVEN)].desc = 0; | |
aec: 6126 str r6, [r4, #16] | |
table[index(0, TX, ODD)].desc = 0; | |
aee: 61a6 str r6, [r4, #24] | |
// first IN after Setup is always DATA1 | |
ep0_tx_data_toggle = 1; | |
af0: 7002 strb r2, [r0, #0] | |
volatile uint8_t *reg; | |
uint8_t epconf; | |
const uint8_t *cfg; | |
int i; | |
switch (setup.wRequestAndType) { | |
af2: 428b cmp r3, r1 | |
af4: d818 bhi.n b28 <usb_isr+0xf0> | |
af6: 21d0 movs r1, #208 ; 0xd0 | |
af8: 00c9 lsls r1, r1, #3 | |
afa: 428b cmp r3, r1 | |
afc: d300 bcc.n b00 <usb_isr+0xc8> | |
afe: e0e5 b.n ccc <usb_isr+0x294> | |
b00: 2181 movs r1, #129 ; 0x81 | |
b02: 4091 lsls r1, r2 | |
b04: 428b cmp r3, r1 | |
b06: d100 bne.n b0a <usb_isr+0xd2> | |
b08: e0c2 b.n c90 <usb_isr+0x258> | |
b0a: d806 bhi.n b1a <usb_isr+0xe2> | |
b0c: 2b80 cmp r3, #128 ; 0x80 | |
b0e: d100 bne.n b12 <usb_isr+0xda> | |
b10: e0a9 b.n c66 <usb_isr+0x22e> | |
b12: 2b82 cmp r3, #130 ; 0x82 | |
b14: d100 bne.n b18 <usb_isr+0xe0> | |
b16: e0ab b.n c70 <usb_isr+0x238> | |
b18: e0f5 b.n d06 <usb_isr+0x2ce> | |
b1a: 4a88 ldr r2, [pc, #544] ; (d3c <usb_isr+0x304>) | |
b1c: 4293 cmp r3, r2 | |
b1e: d100 bne.n b22 <usb_isr+0xea> | |
b20: e0c5 b.n cae <usb_isr+0x276> | |
b22: 22a0 movs r2, #160 ; 0xa0 | |
b24: 00d2 lsls r2, r2, #3 | |
b26: e017 b.n b58 <usb_isr+0x120> | |
b28: 4985 ldr r1, [pc, #532] ; (d40 <usb_isr+0x308>) | |
b2a: 428b cmp r3, r1 | |
b2c: d100 bne.n b30 <usb_isr+0xf8> | |
b2e: e152 b.n dd6 <usb_isr+0x39e> | |
b30: d80d bhi.n b4e <usb_isr+0x116> | |
b32: 2188 movs r1, #136 ; 0x88 | |
b34: 0109 lsls r1, r1, #4 | |
b36: 428b cmp r3, r1 | |
b38: d100 bne.n b3c <usb_isr+0x104> | |
b3a: e08e b.n c5a <usb_isr+0x222> | |
b3c: 2290 movs r2, #144 ; 0x90 | |
b3e: 0112 lsls r2, r2, #4 | |
b40: 4293 cmp r3, r2 | |
b42: d000 beq.n b46 <usb_isr+0x10e> | |
b44: e0df b.n d06 <usb_isr+0x2ce> | |
case 0x0500: // SET_ADDRESS | |
break; | |
case 0x0900: // SET_CONFIGURATION | |
//serial_print("configure\n"); | |
usb_configuration = setup.wValue; | |
b46: 78ba ldrb r2, [r7, #2] | |
b48: 4b72 ldr r3, [pc, #456] ; (d14 <usb_isr+0x2dc>) | |
b4a: 701a strb r2, [r3, #0] | |
b4c: e009 b.n b62 <usb_isr+0x12a> | |
volatile uint8_t *reg; | |
uint8_t epconf; | |
const uint8_t *cfg; | |
int i; | |
switch (setup.wRequestAndType) { | |
b4e: 4a7d ldr r2, [pc, #500] ; (d44 <usb_isr+0x30c>) | |
b50: 4293 cmp r3, r2 | |
b52: d100 bne.n b56 <usb_isr+0x11e> | |
b54: e0cf b.n cf6 <usb_isr+0x2be> | |
b56: 4a7c ldr r2, [pc, #496] ; (d48 <usb_isr+0x310>) | |
static uint8_t reply_buffer[8]; | |
static void usb_setup(void) | |
{ | |
const uint8_t *data = NULL; | |
uint32_t datalen = 0; | |
b58: 2600 movs r6, #0 | |
volatile uint8_t *reg; | |
uint8_t epconf; | |
const uint8_t *cfg; | |
int i; | |
switch (setup.wRequestAndType) { | |
b5a: 4293 cmp r3, r2 | |
b5c: d100 bne.n b60 <usb_isr+0x128> | |
b5e: e115 b.n d8c <usb_isr+0x354> | |
b60: e0d1 b.n d06 <usb_isr+0x2ce> | |
b62: 19a3 adds r3, r4, r6 | |
usb_configuration = setup.wValue; | |
reg = &USB0_ENDPT1; | |
cfg = usb_endpoint_config_table; | |
// clear all BDT entries, free any allocated memory... | |
for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) { | |
if (table[i].desc & BDT_OWN) { | |
b64: 6a19 ldr r1, [r3, #32] | |
b66: 0609 lsls r1, r1, #24 | |
b68: d503 bpl.n b72 <usb_isr+0x13a> | |
usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8)); | |
b6a: 6a58 ldr r0, [r3, #36] ; 0x24 | |
b6c: 3808 subs r0, #8 | |
b6e: f000 fabf bl 10f0 <usb_free> | |
b72: 3608 adds r6, #8 | |
//serial_print("configure\n"); | |
usb_configuration = setup.wValue; | |
reg = &USB0_ENDPT1; | |
cfg = usb_endpoint_config_table; | |
// clear all BDT entries, free any allocated memory... | |
for (i=4; i < (NUM_ENDPOINTS+1)*4; i++) { | |
b74: 2e80 cmp r6, #128 ; 0x80 | |
b76: d1f4 bne.n b62 <usb_isr+0x12a> | |
b78: 2500 movs r5, #0 | |
b7a: 1c2e adds r6, r5, #0 | |
} | |
} | |
// free all queued packets | |
for (i=0; i < NUM_ENDPOINTS; i++) { | |
usb_packet_t *p, *n; | |
p = rx_first[i]; | |
b7c: 4a73 ldr r2, [pc, #460] ; (d4c <usb_isr+0x314>) | |
b7e: 58a8 ldr r0, [r5, r2] | |
while (p) { | |
b80: 2800 cmp r0, #0 | |
b82: d005 beq.n b90 <usb_isr+0x158> | |
n = p->next; | |
b84: 6843 ldr r3, [r0, #4] | |
b86: 9301 str r3, [sp, #4] | |
usb_free(p); | |
b88: f000 fab2 bl 10f0 <usb_free> | |
p = n; | |
b8c: 9801 ldr r0, [sp, #4] | |
b8e: e7f7 b.n b80 <usb_isr+0x148> | |
} | |
rx_first[i] = NULL; | |
b90: 496e ldr r1, [pc, #440] ; (d4c <usb_isr+0x314>) | |
rx_last[i] = NULL; | |
b92: 4b6f ldr r3, [pc, #444] ; (d50 <usb_isr+0x318>) | |
p = tx_first[i]; | |
b94: 4a6f ldr r2, [pc, #444] ; (d54 <usb_isr+0x31c>) | |
while (p) { | |
n = p->next; | |
usb_free(p); | |
p = n; | |
} | |
rx_first[i] = NULL; | |
b96: 5148 str r0, [r1, r5] | |
rx_last[i] = NULL; | |
b98: 50e8 str r0, [r5, r3] | |
p = tx_first[i]; | |
b9a: 58a8 ldr r0, [r5, r2] | |
while (p) { | |
b9c: 2800 cmp r0, #0 | |
b9e: d005 beq.n bac <usb_isr+0x174> | |
n = p->next; | |
ba0: 6843 ldr r3, [r0, #4] | |
ba2: 9301 str r3, [sp, #4] | |
usb_free(p); | |
ba4: f000 faa4 bl 10f0 <usb_free> | |
p = n; | |
ba8: 9801 ldr r0, [sp, #4] | |
baa: e7f7 b.n b9c <usb_isr+0x164> | |
} | |
tx_first[i] = NULL; | |
tx_last[i] = NULL; | |
bac: 4b6a ldr r3, [pc, #424] ; (d58 <usb_isr+0x320>) | |
usb_rx_byte_count_data[i] = 0; | |
bae: 4a6b ldr r2, [pc, #428] ; (d5c <usb_isr+0x324>) | |
n = p->next; | |
usb_free(p); | |
p = n; | |
} | |
tx_first[i] = NULL; | |
tx_last[i] = NULL; | |
bb0: 50e8 str r0, [r5, r3] | |
bb2: 0073 lsls r3, r6, #1 | |
usb_rx_byte_count_data[i] = 0; | |
bb4: 52d0 strh r0, [r2, r3] | |
while (p) { | |
n = p->next; | |
usb_free(p); | |
p = n; | |
} | |
tx_first[i] = NULL; | |
bb6: 4967 ldr r1, [pc, #412] ; (d54 <usb_isr+0x31c>) | |
tx_last[i] = NULL; | |
usb_rx_byte_count_data[i] = 0; | |
switch (tx_state[i]) { | |
bb8: 4b69 ldr r3, [pc, #420] ; (d60 <usb_isr+0x328>) | |
while (p) { | |
n = p->next; | |
usb_free(p); | |
p = n; | |
} | |
tx_first[i] = NULL; | |
bba: 5148 str r0, [r1, r5] | |
tx_last[i] = NULL; | |
usb_rx_byte_count_data[i] = 0; | |
switch (tx_state[i]) { | |
bbc: 5cf0 ldrb r0, [r6, r3] | |
bbe: 3802 subs r0, #2 | |
bc0: 2803 cmp r0, #3 | |
bc2: d807 bhi.n bd4 <usb_isr+0x19c> | |
bc4: f001 ffa4 bl 2b10 <__gnu_thumb1_case_uqi> | |
bc8: 04020402 .word 0x04020402 | |
case TX_STATE_EVEN_FREE: | |
case TX_STATE_NONE_FREE_EVEN_FIRST: | |
tx_state[i] = TX_STATE_BOTH_FREE_EVEN_FIRST; | |
bcc: 2200 movs r2, #0 | |
bce: e000 b.n bd2 <usb_isr+0x19a> | |
break; | |
case TX_STATE_ODD_FREE: | |
case TX_STATE_NONE_FREE_ODD_FIRST: | |
tx_state[i] = TX_STATE_BOTH_FREE_ODD_FIRST; | |
bd0: 2201 movs r2, #1 | |
bd2: 559a strb r2, [r3, r6] | |
if (table[i].desc & BDT_OWN) { | |
usb_free((usb_packet_t *)((uint8_t *)(table[i].addr) - 8)); | |
} | |
} | |
// free all queued packets | |
for (i=0; i < NUM_ENDPOINTS; i++) { | |
bd4: 3601 adds r6, #1 | |
bd6: 3504 adds r5, #4 | |
bd8: 2e04 cmp r6, #4 | |
bda: d1cf bne.n b7c <usb_isr+0x144> | |
break; | |
default: | |
break; | |
} | |
} | |
usb_rx_memory_needed = 0; | |
bdc: 4a61 ldr r2, [pc, #388] ; (d64 <usb_isr+0x32c>) | |
bde: 2300 movs r3, #0 | |
be0: 7013 strb r3, [r2, #0] | |
for (i=1; i <= NUM_ENDPOINTS; i++) { | |
be2: 2501 movs r5, #1 | |
be4: 1c16 adds r6, r2, #0 | |
be6: 4b60 ldr r3, [pc, #384] ; (d68 <usb_isr+0x330>) | |
be8: 18ea adds r2, r5, r3 | |
bea: 4b60 ldr r3, [pc, #384] ; (d6c <usb_isr+0x334>) | |
bec: 0092 lsls r2, r2, #2 | |
bee: 18eb adds r3, r5, r3 | |
bf0: 3b01 subs r3, #1 | |
epconf = *cfg++; | |
bf2: 781b ldrb r3, [r3, #0] | |
*reg = epconf; | |
bf4: 7013 strb r3, [r2, #0] | |
table[index(i, RX, EVEN)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN; | |
table[index(i, RX, ODD)].addr = usb_audio_receive_buffer; | |
table[index(i, RX, ODD)].desc = (AUDIO_RX_SIZE<<16) | BDT_OWN; | |
} else | |
#endif | |
if (epconf & USB_ENDPT_EPRXEN) { | |
bf6: 0719 lsls r1, r3, #28 | |
bf8: d520 bpl.n c3c <usb_isr+0x204> | |
usb_packet_t *p; | |
p = usb_malloc(); | |
bfa: f000 fa5b bl 10b4 <usb_malloc> | |
bfe: 016b lsls r3, r5, #5 | |
if (p) { | |
c00: 2800 cmp r0, #0 | |
c02: d005 beq.n c10 <usb_isr+0x1d8> | |
table[index(i, RX, EVEN)].addr = p->buf; | |
c04: 18e2 adds r2, r4, r3 | |
c06: 3008 adds r0, #8 | |
c08: 6050 str r0, [r2, #4] | |
table[index(i, RX, EVEN)].desc = BDT_DESC(64, 0); | |
c0a: 4a59 ldr r2, [pc, #356] ; (d70 <usb_isr+0x338>) | |
c0c: 50e2 str r2, [r4, r3] | |
c0e: e003 b.n c18 <usb_isr+0x1e0> | |
} else { | |
table[index(i, RX, EVEN)].desc = 0; | |
c10: 50e0 str r0, [r4, r3] | |
usb_rx_memory_needed++; | |
c12: 7833 ldrb r3, [r6, #0] | |
c14: 3301 adds r3, #1 | |
c16: 7033 strb r3, [r6, #0] | |
} | |
p = usb_malloc(); | |
c18: f000 fa4c bl 10b4 <usb_malloc> | |
c1c: 2201 movs r2, #1 | |
c1e: 00ab lsls r3, r5, #2 | |
if (p) { | |
table[index(i, RX, ODD)].addr = p->buf; | |
c20: 4313 orrs r3, r2 | |
c22: 00db lsls r3, r3, #3 | |
} else { | |
table[index(i, RX, EVEN)].desc = 0; | |
usb_rx_memory_needed++; | |
} | |
p = usb_malloc(); | |
if (p) { | |
c24: 2800 cmp r0, #0 | |
c26: d005 beq.n c34 <usb_isr+0x1fc> | |
table[index(i, RX, ODD)].addr = p->buf; | |
c28: 18e2 adds r2, r4, r3 | |
c2a: 3008 adds r0, #8 | |
c2c: 6050 str r0, [r2, #4] | |
table[index(i, RX, ODD)].desc = BDT_DESC(64, 1); | |
c2e: 4a3e ldr r2, [pc, #248] ; (d28 <usb_isr+0x2f0>) | |
c30: 50e2 str r2, [r4, r3] | |
c32: e003 b.n c3c <usb_isr+0x204> | |
} else { | |
table[index(i, RX, ODD)].desc = 0; | |
c34: 50e0 str r0, [r4, r3] | |
usb_rx_memory_needed++; | |
c36: 7833 ldrb r3, [r6, #0] | |
c38: 3301 adds r3, #1 | |
c3a: 7033 strb r3, [r6, #0] | |
} | |
} | |
table[index(i, TX, EVEN)].desc = 0; | |
c3c: 00ab lsls r3, r5, #2 | |
c3e: 2202 movs r2, #2 | |
c40: 431a orrs r2, r3 | |
c42: 00d2 lsls r2, r2, #3 | |
c44: 2100 movs r1, #0 | |
c46: 50a1 str r1, [r4, r2] | |
table[index(i, TX, ODD)].desc = 0; | |
c48: 2203 movs r2, #3 | |
c4a: 4313 orrs r3, r2 | |
c4c: 4093 lsls r3, r2 | |
default: | |
break; | |
} | |
} | |
usb_rx_memory_needed = 0; | |
for (i=1; i <= NUM_ENDPOINTS; i++) { | |
c4e: 3501 adds r5, #1 | |
table[index(i, RX, ODD)].desc = 0; | |
usb_rx_memory_needed++; | |
} | |
} | |
table[index(i, TX, EVEN)].desc = 0; | |
table[index(i, TX, ODD)].desc = 0; | |
c50: 50e1 str r1, [r4, r3] | |
default: | |
break; | |
} | |
} | |
usb_rx_memory_needed = 0; | |
for (i=1; i <= NUM_ENDPOINTS; i++) { | |
c52: 2d05 cmp r5, #5 | |
c54: d1c7 bne.n be6 <usb_isr+0x1ae> | |
static uint8_t reply_buffer[8]; | |
static void usb_setup(void) | |
{ | |
const uint8_t *data = NULL; | |
uint32_t datalen = 0; | |
c56: 1c0e adds r6, r1, #0 | |
c58: e098 b.n d8c <usb_isr+0x354> | |
} | |
#endif | |
} | |
break; | |
case 0x0880: // GET_CONFIGURATION | |
reply_buffer[0] = usb_configuration; | |
c5a: 4b2e ldr r3, [pc, #184] ; (d14 <usb_isr+0x2dc>) | |
c5c: 4c45 ldr r4, [pc, #276] ; (d74 <usb_isr+0x33c>) | |
c5e: 781b ldrb r3, [r3, #0] | |
datalen = 1; | |
c60: 1c16 adds r6, r2, #0 | |
} | |
#endif | |
} | |
break; | |
case 0x0880: // GET_CONFIGURATION | |
reply_buffer[0] = usb_configuration; | |
c62: 7023 strb r3, [r4, #0] | |
c64: e093 b.n d8e <usb_isr+0x356> | |
datalen = 1; | |
data = reply_buffer; | |
break; | |
case 0x0080: // GET_STATUS (device) | |
reply_buffer[0] = 0; | |
c66: 4c43 ldr r4, [pc, #268] ; (d74 <usb_isr+0x33c>) | |
c68: 7026 strb r6, [r4, #0] | |
reply_buffer[1] = 0; | |
c6a: 7066 strb r6, [r4, #1] | |
datalen = 2; | |
c6c: 2602 movs r6, #2 | |
c6e: e08e b.n d8e <usb_isr+0x356> | |
data = reply_buffer; | |
break; | |
case 0x0082: // GET_STATUS (endpoint) | |
if (setup.wIndex > NUM_ENDPOINTS) { | |
c70: 88bb ldrh r3, [r7, #4] | |
c72: 2b04 cmp r3, #4 | |
c74: d847 bhi.n d06 <usb_isr+0x2ce> | |
// TODO: do we need to handle IN vs OUT here? | |
endpoint0_stall(); | |
return; | |
} | |
reply_buffer[0] = 0; | |
c76: 4c3f ldr r4, [pc, #252] ; (d74 <usb_isr+0x33c>) | |
reply_buffer[1] = 0; | |
if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1; | |
c78: 4d3f ldr r5, [pc, #252] ; (d78 <usb_isr+0x340>) | |
c7a: 009b lsls r3, r3, #2 | |
if (setup.wIndex > NUM_ENDPOINTS) { | |
// TODO: do we need to handle IN vs OUT here? | |
endpoint0_stall(); | |
return; | |
} | |
reply_buffer[0] = 0; | |
c7c: 7026 strb r6, [r4, #0] | |
reply_buffer[1] = 0; | |
c7e: 7066 strb r6, [r4, #1] | |
if (*(uint8_t *)(&USB0_ENDPT0 + setup.wIndex * 4) & 0x02) reply_buffer[0] = 1; | |
c80: 195b adds r3, r3, r5 | |
c82: 781b ldrb r3, [r3, #0] | |
c84: 2602 movs r6, #2 | |
c86: 4233 tst r3, r6 | |
c88: d100 bne.n c8c <usb_isr+0x254> | |
c8a: e080 b.n d8e <usb_isr+0x356> | |
c8c: 7022 strb r2, [r4, #0] | |
c8e: e07e b.n d8e <usb_isr+0x356> | |
data = reply_buffer; | |
datalen = 2; | |
break; | |
case 0x0102: // CLEAR_FEATURE (endpoint) | |
i = setup.wIndex & 0x7F; | |
c90: 88ba ldrh r2, [r7, #4] | |
c92: 237f movs r3, #127 ; 0x7f | |
c94: 4013 ands r3, r2 | |
if (i > NUM_ENDPOINTS || setup.wValue != 0) { | |
c96: 2b04 cmp r3, #4 | |
c98: dc35 bgt.n d06 <usb_isr+0x2ce> | |
c9a: 887e ldrh r6, [r7, #2] | |
c9c: 2e00 cmp r6, #0 | |
c9e: d132 bne.n d06 <usb_isr+0x2ce> | |
// TODO: do we need to handle IN vs OUT here? | |
endpoint0_stall(); | |
return; | |
} | |
(*(uint8_t *)(&USB0_ENDPT0 + i * 4)) &= ~0x02; | |
ca0: 4935 ldr r1, [pc, #212] ; (d78 <usb_isr+0x340>) | |
ca2: 009b lsls r3, r3, #2 | |
ca4: 185b adds r3, r3, r1 | |
ca6: 781a ldrb r2, [r3, #0] | |
ca8: 2102 movs r1, #2 | |
caa: 438a bics r2, r1 | |
cac: e029 b.n d02 <usb_isr+0x2ca> | |
// TODO: do we need to clear the data toggle here? | |
break; | |
case 0x0302: // SET_FEATURE (endpoint) | |
i = setup.wIndex & 0x7F; | |
cae: 88ba ldrh r2, [r7, #4] | |
cb0: 237f movs r3, #127 ; 0x7f | |
cb2: 4013 ands r3, r2 | |
if (i > NUM_ENDPOINTS || setup.wValue != 0) { | |
cb4: 2b04 cmp r3, #4 | |
cb6: dc26 bgt.n d06 <usb_isr+0x2ce> | |
cb8: 887e ldrh r6, [r7, #2] | |
cba: 2e00 cmp r6, #0 | |
cbc: d123 bne.n d06 <usb_isr+0x2ce> | |
// TODO: do we need to handle IN vs OUT here? | |
endpoint0_stall(); | |
return; | |
} | |
(*(uint8_t *)(&USB0_ENDPT0 + i * 4)) |= 0x02; | |
cbe: 4a2e ldr r2, [pc, #184] ; (d78 <usb_isr+0x340>) | |
cc0: 009b lsls r3, r3, #2 | |
cc2: 189b adds r3, r3, r2 | |
cc4: 781a ldrb r2, [r3, #0] | |
cc6: 2102 movs r1, #2 | |
cc8: 430a orrs r2, r1 | |
cca: e01a b.n d02 <usb_isr+0x2ca> | |
//serial_print("\n"); | |
for (list = usb_descriptor_list; 1; list++) { | |
if (list->addr == NULL) break; | |
//if (setup.wValue == list->wValue && | |
//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) { | |
if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) { | |
ccc: 887a ldrh r2, [r7, #2] | |
cce: 88b9 ldrh r1, [r7, #4] | |
cd0: 4b2a ldr r3, [pc, #168] ; (d7c <usb_isr+0x344>) | |
case 0x0681: | |
//serial_print("desc:"); | |
//serial_phex16(setup.wValue); | |
//serial_print("\n"); | |
for (list = usb_descriptor_list; 1; list++) { | |
if (list->addr == NULL) break; | |
cd2: 685c ldr r4, [r3, #4] | |
cd4: 2c00 cmp r4, #0 | |
cd6: d016 beq.n d06 <usb_isr+0x2ce> | |
//if (setup.wValue == list->wValue && | |
//(setup.wIndex == list->wIndex) || ((setup.wValue >> 8) == 3)) { | |
if (setup.wValue == list->wValue && setup.wIndex == list->wIndex) { | |
cd8: 8818 ldrh r0, [r3, #0] | |
cda: 4290 cmp r0, r2 | |
cdc: d109 bne.n cf2 <usb_isr+0x2ba> | |
cde: 8858 ldrh r0, [r3, #2] | |
ce0: 4288 cmp r0, r1 | |
ce2: d106 bne.n cf2 <usb_isr+0x2ba> | |
data = list->addr; | |
if ((setup.wValue >> 8) == 3) { | |
ce4: 0a12 lsrs r2, r2, #8 | |
ce6: 2a03 cmp r2, #3 | |
ce8: d101 bne.n cee <usb_isr+0x2b6> | |
// for string descriptors, use the descriptor's | |
// length field, allowing runtime configured | |
// length. | |
datalen = *(list->addr); | |
cea: 7826 ldrb r6, [r4, #0] | |
cec: e04f b.n d8e <usb_isr+0x356> | |
} else { | |
datalen = list->length; | |
cee: 891e ldrh r6, [r3, #8] | |
cf0: e04d b.n d8e <usb_isr+0x356> | |
case 0x0680: // GET_DESCRIPTOR | |
case 0x0681: | |
//serial_print("desc:"); | |
//serial_phex16(setup.wValue); | |
//serial_print("\n"); | |
for (list = usb_descriptor_list; 1; list++) { | |
cf2: 330c adds r3, #12 | |
cf4: e7ed b.n cd2 <usb_isr+0x29a> | |
//serial_print("desc: not found\n"); | |
endpoint0_stall(); | |
return; | |
#if defined(CDC_STATUS_INTERFACE) | |
case 0x2221: // CDC_SET_CONTROL_LINE_STATE | |
usb_cdc_line_rtsdtr_millis = systick_millis_count; | |
cf6: 4b22 ldr r3, [pc, #136] ; (d80 <usb_isr+0x348>) | |
cf8: 681a ldr r2, [r3, #0] | |
cfa: 4b22 ldr r3, [pc, #136] ; (d84 <usb_isr+0x34c>) | |
cfc: 601a str r2, [r3, #0] | |
usb_cdc_line_rtsdtr = setup.wValue; | |
cfe: 78ba ldrb r2, [r7, #2] | |
d00: 4b21 ldr r3, [pc, #132] ; (d88 <usb_isr+0x350>) | |
d02: 701a strb r2, [r3, #0] | |
d04: e042 b.n d8c <usb_isr+0x354> | |
volatile uint8_t usb_reboot_timer = 0; | |
static void endpoint0_stall(void) | |
{ | |
USB0_ENDPT0 = USB_ENDPT_EPSTALL | USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |
d06: 4b1c ldr r3, [pc, #112] ; (d78 <usb_isr+0x340>) | |
d08: 220f movs r2, #15 | |
d0a: 701a strb r2, [r3, #0] | |
d0c: e063 b.n dd6 <usb_isr+0x39e> | |
d0e: 46c0 nop ; (mov r8, r8) | |
d10: 40072080 .word 0x40072080 | |
d14: 1fffff47 .word 0x1fffff47 | |
d18: 1ffffed1 .word 0x1ffffed1 | |
d1c: 1fffff49 .word 0x1fffff49 | |
d20: 40072090 .word 0x40072090 | |
d24: 1ffff800 .word 0x1ffff800 | |
d28: 004000c8 .word 0x004000c8 | |
d2c: 1fffff34 .word 0x1fffff34 | |
d30: 1fffff48 .word 0x1fffff48 | |
d34: 1ffffe68 .word 0x1ffffe68 | |
d38: 00000681 .word 0x00000681 | |
d3c: 00000302 .word 0x00000302 | |
d40: 00002021 .word 0x00002021 | |
d44: 00002221 .word 0x00002221 | |
d48: 00002321 .word 0x00002321 | |
d4c: 1ffffec0 .word 0x1ffffec0 | |
d50: 1ffffe6c .word 0x1ffffe6c | |
d54: 1fffff14 .word 0x1fffff14 | |
d58: 1fffff24 .word 0x1fffff24 | |
d5c: 2000012c .word 0x2000012c | |
d60: 1ffffe7c .word 0x1ffffe7c | |
d64: 1fffff3e .word 0x1fffff3e | |
d68: 1001c830 .word 0x1001c830 | |
d6c: 00002ed8 .word 0x00002ed8 | |
d70: 00400088 .word 0x00400088 | |
d74: 1fffff3f .word 0x1fffff3f | |
d78: 400720c0 .word 0x400720c0 | |
d7c: 00002edc .word 0x00002edc | |
d80: 1ffffe64 .word 0x1ffffe64 | |
d84: 2000013c .word 0x2000013c | |
d88: 1fffff58 .word 0x1fffff58 | |
static uint8_t reply_buffer[8]; | |
static void usb_setup(void) | |
{ | |
const uint8_t *data = NULL; | |
d8c: 1c34 adds r4, r6, #0 | |
//serial_phex32(data); | |
//serial_print(","); | |
//serial_phex16(datalen); | |
//serial_print("\n"); | |
if (datalen > setup.wLength) datalen = setup.wLength; | |
d8e: 88fb ldrh r3, [r7, #6] | |
d90: 429e cmp r6, r3 | |
d92: d900 bls.n d96 <usb_isr+0x35e> | |
d94: 1c1e adds r6, r3, #0 | |
d96: 1e37 subs r7, r6, #0 | |
d98: 2f40 cmp r7, #64 ; 0x40 | |
d9a: d900 bls.n d9e <usb_isr+0x366> | |
d9c: 2740 movs r7, #64 ; 0x40 | |
size = datalen; | |
if (size > EP0_SIZE) size = EP0_SIZE; | |
endpoint0_transmit(data, size); | |
d9e: 1c20 adds r0, r4, #0 | |
da0: 1c39 adds r1, r7, #0 | |
da2: f7ff fd87 bl 8b4 <endpoint0_transmit> | |
data += size; | |
da6: 19e4 adds r4, r4, r7 | |
datalen -= size; | |
da8: 1bf6 subs r6, r6, r7 | |
if (datalen == 0 && size < EP0_SIZE) return; | |
daa: d103 bne.n db4 <usb_isr+0x37c> | |
dac: 1c35 adds r5, r6, #0 | |
dae: 2f40 cmp r7, #64 ; 0x40 | |
db0: d004 beq.n dbc <usb_isr+0x384> | |
db2: e010 b.n dd6 <usb_isr+0x39e> | |
db4: 2540 movs r5, #64 ; 0x40 | |
db6: 42b5 cmp r5, r6 | |
db8: d900 bls.n dbc <usb_isr+0x384> | |
dba: 1c35 adds r5, r6, #0 | |
size = datalen; | |
if (size > EP0_SIZE) size = EP0_SIZE; | |
endpoint0_transmit(data, size); | |
dbc: 1c20 adds r0, r4, #0 | |
dbe: 1c29 adds r1, r5, #0 | |
dc0: f7ff fd78 bl 8b4 <endpoint0_transmit> | |
data += size; | |
dc4: 1964 adds r4, r4, r5 | |
datalen -= size; | |
dc6: 1b76 subs r6, r6, r5 | |
if (datalen == 0 && size < EP0_SIZE) return; | |
dc8: d101 bne.n dce <usb_isr+0x396> | |
dca: 2d40 cmp r5, #64 ; 0x40 | |
dcc: d103 bne.n dd6 <usb_isr+0x39e> | |
ep0_tx_ptr = data; | |
dce: 4d75 ldr r5, [pc, #468] ; (fa4 <usb_isr+0x56c>) | |
ep0_tx_len = datalen; | |
dd0: 4b75 ldr r3, [pc, #468] ; (fa8 <usb_isr+0x570>) | |
endpoint0_transmit(data, size); | |
data += size; | |
datalen -= size; | |
if (datalen == 0 && size < EP0_SIZE) return; | |
ep0_tx_ptr = data; | |
dd2: 602c str r4, [r5, #0] | |
ep0_tx_len = datalen; | |
dd4: 801e strh r6, [r3, #0] | |
serial_print("\n"); | |
#endif | |
// actually "do" the setup request | |
usb_setup(); | |
// unfreeze the USB, now that we're ready | |
USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit | |
dd6: 2201 movs r2, #1 | |
dd8: 4b74 ldr r3, [pc, #464] ; (fac <usb_isr+0x574>) | |
dda: e03a b.n e52 <usb_isr+0x41a> | |
break; | |
case 0x01: // OUT transaction received from host | |
case 0x02: | |
//serial_print("PID=OUT\n"); | |
#ifdef CDC_STATUS_INTERFACE | |
if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) { | |
ddc: 4b74 ldr r3, [pc, #464] ; (fb0 <usb_isr+0x578>) | |
dde: 8819 ldrh r1, [r3, #0] | |
de0: 4b74 ldr r3, [pc, #464] ; (fb4 <usb_isr+0x57c>) | |
de2: 4299 cmp r1, r3 | |
de4: d110 bne.n e08 <usb_isr+0x3d0> | |
de6: 2300 movs r3, #0 | |
int i; | |
uint8_t *dst = (uint8_t *)usb_cdc_line_coding; | |
//serial_print("set line coding "); | |
for (i=0; i<7; i++) { | |
//serial_phex(*buf); | |
*dst++ = *buf++; | |
de8: 5cd0 ldrb r0, [r2, r3] | |
dea: 4973 ldr r1, [pc, #460] ; (fb8 <usb_isr+0x580>) | |
dec: 54c8 strb r0, [r1, r3] | |
#ifdef CDC_STATUS_INTERFACE | |
if (setup.wRequestAndType == 0x2021 /*CDC_SET_LINE_CODING*/) { | |
int i; | |
uint8_t *dst = (uint8_t *)usb_cdc_line_coding; | |
//serial_print("set line coding "); | |
for (i=0; i<7; i++) { | |
dee: 3301 adds r3, #1 | |
df0: 2b07 cmp r3, #7 | |
df2: d1f9 bne.n de8 <usb_isr+0x3b0> | |
//serial_phex(*buf); | |
*dst++ = *buf++; | |
} | |
//serial_phex32(usb_cdc_line_coding[0]); | |
//serial_print("\n"); | |
if (usb_cdc_line_coding[0] == 134) usb_reboot_timer = 15; | |
df4: 680b ldr r3, [r1, #0] | |
df6: 2b86 cmp r3, #134 ; 0x86 | |
df8: d102 bne.n e00 <usb_isr+0x3c8> | |
dfa: 4b70 ldr r3, [pc, #448] ; (fbc <usb_isr+0x584>) | |
dfc: 220f movs r2, #15 | |
dfe: 701a strb r2, [r3, #0] | |
endpoint0_transmit(NULL, 0); | |
e00: 2000 movs r0, #0 | |
e02: 1c01 adds r1, r0, #0 | |
e04: f7ff fd56 bl 8b4 <endpoint0_transmit> | |
if (usb_audio_set_feature(&setup, buf)) { | |
endpoint0_transmit(NULL, 0); | |
} | |
#endif | |
// give the buffer back | |
b->desc = BDT_DESC(EP0_SIZE, DATA1); | |
e08: 4b6d ldr r3, [pc, #436] ; (fc0 <usb_isr+0x588>) | |
e0a: 602b str r3, [r5, #0] | |
e0c: e022 b.n e54 <usb_isr+0x41c> | |
//serial_print("PID=IN:"); | |
//serial_phex(stat); | |
//serial_print("\n"); | |
// send remaining data, if any... | |
data = ep0_tx_ptr; | |
e0e: 4f65 ldr r7, [pc, #404] ; (fa4 <usb_isr+0x56c>) | |
e10: 683d ldr r5, [r7, #0] | |
if (data) { | |
e12: 2d00 cmp r5, #0 | |
e14: d013 beq.n e3e <usb_isr+0x406> | |
size = ep0_tx_len; | |
e16: 4964 ldr r1, [pc, #400] ; (fa8 <usb_isr+0x570>) | |
e18: 880e ldrh r6, [r1, #0] | |
e1a: 1e34 subs r4, r6, #0 | |
e1c: 2c40 cmp r4, #64 ; 0x40 | |
e1e: d900 bls.n e22 <usb_isr+0x3ea> | |
e20: 2440 movs r4, #64 ; 0x40 | |
if (size > EP0_SIZE) size = EP0_SIZE; | |
endpoint0_transmit(data, size); | |
e22: 1c28 adds r0, r5, #0 | |
e24: 1c21 adds r1, r4, #0 | |
e26: f7ff fd45 bl 8b4 <endpoint0_transmit> | |
data += size; | |
ep0_tx_len -= size; | |
e2a: 1b36 subs r6, r6, r4 | |
e2c: 4a5e ldr r2, [pc, #376] ; (fa8 <usb_isr+0x570>) | |
e2e: b2b6 uxth r6, r6 | |
e30: 8016 strh r6, [r2, #0] | |
ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL; | |
e32: 2e00 cmp r6, #0 | |
e34: d101 bne.n e3a <usb_isr+0x402> | |
e36: 2c40 cmp r4, #64 ; 0x40 | |
e38: d100 bne.n e3c <usb_isr+0x404> | |
data = ep0_tx_ptr; | |
if (data) { | |
size = ep0_tx_len; | |
if (size > EP0_SIZE) size = EP0_SIZE; | |
endpoint0_transmit(data, size); | |
data += size; | |
e3a: 192e adds r6, r5, r4 | |
ep0_tx_len -= size; | |
ep0_tx_ptr = (ep0_tx_len > 0 || size == EP0_SIZE) ? data : NULL; | |
e3c: 603e str r6, [r7, #0] | |
} | |
if (setup.bRequest == 5 && setup.bmRequestType == 0) { | |
e3e: 4b5c ldr r3, [pc, #368] ; (fb0 <usb_isr+0x578>) | |
e40: 22a0 movs r2, #160 ; 0xa0 | |
e42: 8819 ldrh r1, [r3, #0] | |
e44: 00d2 lsls r2, r2, #3 | |
e46: 4291 cmp r1, r2 | |
e48: d104 bne.n e54 <usb_isr+0x41c> | |
setup.bRequest = 0; | |
e4a: 2200 movs r2, #0 | |
e4c: 705a strb r2, [r3, #1] | |
//serial_print("set address: "); | |
//serial_phex16(setup.wValue); | |
//serial_print("\n"); | |
USB0_ADDR = setup.wValue; | |
e4e: 789a ldrb r2, [r3, #2] | |
e50: 4b5c ldr r3, [pc, #368] ; (fc4 <usb_isr+0x58c>) | |
e52: 701a strb r2, [r3, #0] | |
//default: | |
//serial_print("PID=unknown:"); | |
//serial_phex(pid); | |
//serial_print("\n"); | |
} | |
USB0_CTL = USB_CTL_USBENSOFEN; // clear TXSUSPENDTOKENBUSY bit | |
e54: 2201 movs r2, #1 | |
e56: 4b55 ldr r3, [pc, #340] ; (fac <usb_isr+0x574>) | |
e58: e061 b.n f1e <usb_isr+0x4e6> | |
//serial_print(stat & 0x04 ? ",odd\n" : ",even\n"); | |
endpoint = stat >> 4; | |
if (endpoint == 0) { | |
usb_control(stat); | |
} else { | |
bdt_t *b = stat2bufferdescriptor(stat); | |
e5a: 00d2 lsls r2, r2, #3 | |
e5c: 18a4 adds r4, r4, r2 | |
usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8); | |
e5e: 6860 ldr r0, [r4, #4] | |
serial_print(((uint32_t)b & 8) ? ", odd" : ", even"); | |
serial_print(", count:"); | |
serial_phex(b->desc >> 16); | |
serial_print("\n"); | |
#endif | |
endpoint--; // endpoint is index to zero-based arrays | |
e60: 3e01 subs r6, #1 | |
endpoint = stat >> 4; | |
if (endpoint == 0) { | |
usb_control(stat); | |
} else { | |
bdt_t *b = stat2bufferdescriptor(stat); | |
usb_packet_t *packet = (usb_packet_t *)((uint8_t *)(b->addr) - 8); | |
e62: 3808 subs r0, #8 | |
serial_print(((uint32_t)b & 8) ? ", odd" : ", even"); | |
serial_print(", count:"); | |
serial_phex(b->desc >> 16); | |
serial_print("\n"); | |
#endif | |
endpoint--; // endpoint is index to zero-based arrays | |
e64: b2f6 uxtb r6, r6 | |
b->addr = &usb_audio_sync_feedback; | |
b->desc = (3 << 16) | BDT_OWN; | |
tx_state[endpoint] ^= 1; | |
} else | |
#endif | |
if (stat & 0x08) { // transmit | |
e66: 402b ands r3, r5 | |
e68: d036 beq.n ed8 <usb_isr+0x4a0> | |
usb_free(packet); | |
e6a: f000 f941 bl 10f0 <usb_free> | |
packet = tx_first[endpoint]; | |
e6e: 4956 ldr r1, [pc, #344] ; (fc8 <usb_isr+0x590>) | |
e70: 00b0 lsls r0, r6, #2 | |
e72: 5842 ldr r2, [r0, r1] | |
e74: 4b55 ldr r3, [pc, #340] ; (fcc <usb_isr+0x594>) | |
if (packet) { | |
e76: 2a00 cmp r2, #0 | |
e78: d01b beq.n eb2 <usb_isr+0x47a> | |
//serial_print("tx packet\n"); | |
tx_first[endpoint] = packet->next; | |
e7a: 6855 ldr r5, [r2, #4] | |
e7c: 5045 str r5, [r0, r1] | |
b->addr = packet->buf; | |
e7e: 1c11 adds r1, r2, #0 | |
switch (tx_state[endpoint]) { | |
e80: 5d98 ldrb r0, [r3, r6] | |
usb_free(packet); | |
packet = tx_first[endpoint]; | |
if (packet) { | |
//serial_print("tx packet\n"); | |
tx_first[endpoint] = packet->next; | |
b->addr = packet->buf; | |
e82: 3108 adds r1, #8 | |
e84: 6061 str r1, [r4, #4] | |
switch (tx_state[endpoint]) { | |
e86: 2803 cmp r0, #3 | |
e88: d80b bhi.n ea2 <usb_isr+0x46a> | |
e8a: f001 fe41 bl 2b10 <__gnu_thumb1_case_uqi> | |
e8e: 0402 .short 0x0402 | |
e90: 0806 .short 0x0806 | |
case TX_STATE_BOTH_FREE_EVEN_FIRST: | |
tx_state[endpoint] = TX_STATE_ODD_FREE; | |
e92: 2103 movs r1, #3 | |
e94: e004 b.n ea0 <usb_isr+0x468> | |
break; | |
case TX_STATE_BOTH_FREE_ODD_FIRST: | |
tx_state[endpoint] = TX_STATE_EVEN_FREE; | |
e96: 2102 movs r1, #2 | |
e98: e002 b.n ea0 <usb_isr+0x468> | |
break; | |
case TX_STATE_EVEN_FREE: | |
tx_state[endpoint] = TX_STATE_NONE_FREE_ODD_FIRST; | |
e9a: 2105 movs r1, #5 | |
e9c: e000 b.n ea0 <usb_isr+0x468> | |
break; | |
case TX_STATE_ODD_FREE: | |
tx_state[endpoint] = TX_STATE_NONE_FREE_EVEN_FIRST; | |
e9e: 2104 movs r1, #4 | |
ea0: 5599 strb r1, [r3, r6] | |
break; | |
default: | |
break; | |
} | |
b->desc = BDT_DESC(packet->len, | |
ea2: 2388 movs r3, #136 ; 0x88 | |
ea4: 0727 lsls r7, r4, #28 | |
ea6: d500 bpl.n eaa <usb_isr+0x472> | |
ea8: 23c8 movs r3, #200 ; 0xc8 | |
eaa: 8812 ldrh r2, [r2, #0] | |
eac: 0412 lsls r2, r2, #16 | |
eae: 4313 orrs r3, r2 | |
eb0: e03c b.n f2c <usb_isr+0x4f4> | |
((uint32_t)b & 8) ? DATA1 : DATA0); | |
} else { | |
//serial_print("tx no packet\n"); | |
switch (tx_state[endpoint]) { | |
eb2: 5d98 ldrb r0, [r3, r6] | |
eb4: 2803 cmp r0, #3 | |
eb6: d808 bhi.n eca <usb_isr+0x492> | |
eb8: f001 fe2a bl 2b10 <__gnu_thumb1_case_uqi> | |
ebc: 04023939 .word 0x04023939 | |
case TX_STATE_BOTH_FREE_EVEN_FIRST: | |
case TX_STATE_BOTH_FREE_ODD_FIRST: | |
break; | |
case TX_STATE_EVEN_FREE: | |
tx_state[endpoint] = TX_STATE_BOTH_FREE_EVEN_FIRST; | |
ec0: 2200 movs r2, #0 | |
ec2: e000 b.n ec6 <usb_isr+0x48e> | |
break; | |
case TX_STATE_ODD_FREE: | |
tx_state[endpoint] = TX_STATE_BOTH_FREE_ODD_FIRST; | |
ec4: 2201 movs r2, #1 | |
ec6: 559a strb r2, [r3, r6] | |
break; | |
ec8: e031 b.n f2e <usb_isr+0x4f6> | |
default: | |
tx_state[endpoint] = ((uint32_t)b & 8) ? | |
eca: 402c ands r4, r5 | |
ecc: 4262 negs r2, r4 | |
ece: 4162 adcs r2, r4 | |
ed0: 2403 movs r4, #3 | |
ed2: 1aa4 subs r4, r4, r2 | |
ed4: 559c strb r4, [r3, r6] | |
TX_STATE_ODD_FREE : TX_STATE_EVEN_FREE; | |
break; | |
ed6: e02a b.n f2e <usb_isr+0x4f6> | |
} | |
} | |
} else { // receive | |
packet->len = b->desc >> 16; | |
ed8: 8862 ldrh r2, [r4, #2] | |
eda: 8002 strh r2, [r0, #0] | |
if (packet->len > 0) { | |
edc: 2a00 cmp r2, #0 | |
ede: d020 beq.n f22 <usb_isr+0x4ea> | |
packet->index = 0; | |
packet->next = NULL; | |
if (rx_first[endpoint] == NULL) { | |
ee0: 4d3b ldr r5, [pc, #236] ; (fd0 <usb_isr+0x598>) | |
} | |
} | |
} else { // receive | |
packet->len = b->desc >> 16; | |
if (packet->len > 0) { | |
packet->index = 0; | |
ee2: 8043 strh r3, [r0, #2] | |
packet->next = NULL; | |
ee4: 6043 str r3, [r0, #4] | |
if (rx_first[endpoint] == NULL) { | |
ee6: 00b3 lsls r3, r6, #2 | |
ee8: 595f ldr r7, [r3, r5] | |
eea: 493a ldr r1, [pc, #232] ; (fd4 <usb_isr+0x59c>) | |
eec: 2f00 cmp r7, #0 | |
eee: d101 bne.n ef4 <usb_isr+0x4bc> | |
//serial_print("rx 1st, epidx="); | |
//serial_phex(endpoint); | |
//serial_print(", packet="); | |
//serial_phex32((uint32_t)packet); | |
//serial_print("\n"); | |
rx_first[endpoint] = packet; | |
ef0: 5158 str r0, [r3, r5] | |
ef2: e001 b.n ef8 <usb_isr+0x4c0> | |
//serial_print("rx Nth, epidx="); | |
//serial_phex(endpoint); | |
//serial_print(", packet="); | |
//serial_phex32((uint32_t)packet); | |
//serial_print("\n"); | |
rx_last[endpoint]->next = packet; | |
ef4: 58cd ldr r5, [r1, r3] | |
ef6: 6068 str r0, [r5, #4] | |
} | |
rx_last[endpoint] = packet; | |
ef8: 50c8 str r0, [r1, r3] | |
usb_rx_byte_count_data[endpoint] += packet->len; | |
efa: 4b37 ldr r3, [pc, #220] ; (fd8 <usb_isr+0x5a0>) | |
efc: 0076 lsls r6, r6, #1 | |
efe: 5af1 ldrh r1, [r6, r3] | |
f00: 1852 adds r2, r2, r1 | |
f02: 52f2 strh r2, [r6, r3] | |
// TODO: implement a per-endpoint maximum # of allocated | |
// packets, so a flood of incoming data on 1 endpoint | |
// doesn't starve the others if the user isn't reading | |
// it regularly | |
packet = usb_malloc(); | |
f04: f000 f8d6 bl 10b4 <usb_malloc> | |
if (packet) { | |
f08: 2800 cmp r0, #0 | |
f0a: d004 beq.n f16 <usb_isr+0x4de> | |
b->addr = packet->buf; | |
f0c: 3008 adds r0, #8 | |
f0e: 6060 str r0, [r4, #4] | |
b->desc = BDT_DESC(64, | |
f10: 0721 lsls r1, r4, #28 | |
f12: d50a bpl.n f2a <usb_isr+0x4f2> | |
f14: e007 b.n f26 <usb_isr+0x4ee> | |
((uint32_t)b & 8) ? DATA1 : DATA0); | |
} else { | |
//serial_print("starving "); | |
//serial_phex(endpoint + 1); | |
b->desc = 0; | |
usb_rx_memory_needed++; | |
f16: 4b31 ldr r3, [pc, #196] ; (fdc <usb_isr+0x5a4>) | |
b->desc = BDT_DESC(64, | |
((uint32_t)b & 8) ? DATA1 : DATA0); | |
} else { | |
//serial_print("starving "); | |
//serial_phex(endpoint + 1); | |
b->desc = 0; | |
f18: 6020 str r0, [r4, #0] | |
usb_rx_memory_needed++; | |
f1a: 781a ldrb r2, [r3, #0] | |
f1c: 3201 adds r2, #1 | |
f1e: 701a strb r2, [r3, #0] | |
f20: e005 b.n f2e <usb_isr+0x4f6> | |
} | |
} else { | |
b->desc = BDT_DESC(64, ((uint32_t)b & 8) ? DATA1 : DATA0); | |
f22: 422c tst r4, r5 | |
f24: d001 beq.n f2a <usb_isr+0x4f2> | |
f26: 4b26 ldr r3, [pc, #152] ; (fc0 <usb_isr+0x588>) | |
f28: e000 b.n f2c <usb_isr+0x4f4> | |
f2a: 4b2d ldr r3, [pc, #180] ; (fe0 <usb_isr+0x5a8>) | |
f2c: 6023 str r3, [r4, #0] | |
} | |
} | |
} | |
USB0_ISTAT = USB_ISTAT_TOKDNE; | |
f2e: 4a2d ldr r2, [pc, #180] ; (fe4 <usb_isr+0x5ac>) | |
f30: 2308 movs r3, #8 | |
f32: 7013 strb r3, [r2, #0] | |
goto restart; | |
f34: e581 b.n a3a <usb_isr+0x2> | |
} | |
if (status & USB_ISTAT_USBRST /* 01 */ ) { | |
f36: 2001 movs r0, #1 | |
f38: 4204 tst r4, r0 | |
f3a: d01e beq.n f7a <usb_isr+0x542> | |
//serial_print("reset\n"); | |
// initialize BDT toggle bits | |
USB0_CTL = USB_CTL_ODDRST; | |
f3c: 491b ldr r1, [pc, #108] ; (fac <usb_isr+0x574>) | |
f3e: 2302 movs r3, #2 | |
f40: 700b strb r3, [r1, #0] | |
ep0_tx_bdt_bank = 0; | |
f42: 4b29 ldr r3, [pc, #164] ; (fe8 <usb_isr+0x5b0>) | |
// set up buffers to receive Setup and OUT packets | |
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); | |
f44: 4c26 ldr r4, [pc, #152] ; (fe0 <usb_isr+0x5a8>) | |
if (status & USB_ISTAT_USBRST /* 01 */ ) { | |
//serial_print("reset\n"); | |
// initialize BDT toggle bits | |
USB0_CTL = USB_CTL_ODDRST; | |
ep0_tx_bdt_bank = 0; | |
f46: 701a strb r2, [r3, #0] | |
// set up buffers to receive Setup and OUT packets | |
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); | |
f48: 4b28 ldr r3, [pc, #160] ; (fec <usb_isr+0x5b4>) | |
table[index(0, RX, EVEN)].addr = ep0_rx0_buf; | |
f4a: 4d29 ldr r5, [pc, #164] ; (ff0 <usb_isr+0x5b8>) | |
// initialize BDT toggle bits | |
USB0_CTL = USB_CTL_ODDRST; | |
ep0_tx_bdt_bank = 0; | |
// set up buffers to receive Setup and OUT packets | |
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); | |
f4c: 601c str r4, [r3, #0] | |
table[index(0, RX, EVEN)].addr = ep0_rx0_buf; | |
table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0); | |
f4e: 609c str r4, [r3, #8] | |
table[index(0, RX, ODD)].addr = ep0_rx1_buf; | |
f50: 4c28 ldr r4, [pc, #160] ; (ff4 <usb_isr+0x5bc>) | |
table[index(0, TX, EVEN)].desc = 0; | |
f52: 611a str r2, [r3, #16] | |
// set up buffers to receive Setup and OUT packets | |
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); | |
table[index(0, RX, EVEN)].addr = ep0_rx0_buf; | |
table[index(0, RX, ODD)].desc = BDT_DESC(EP0_SIZE, 0); | |
table[index(0, RX, ODD)].addr = ep0_rx1_buf; | |
f54: 60dc str r4, [r3, #12] | |
table[index(0, TX, EVEN)].desc = 0; | |
table[index(0, TX, ODD)].desc = 0; | |
f56: 619a str r2, [r3, #24] | |
USB0_CTL = USB_CTL_ODDRST; | |
ep0_tx_bdt_bank = 0; | |
// set up buffers to receive Setup and OUT packets | |
table[index(0, RX, EVEN)].desc = BDT_DESC(EP0_SIZE, 0); | |
table[index(0, RX, EVEN)].addr = ep0_rx0_buf; | |
f58: 605d str r5, [r3, #4] | |
table[index(0, RX, ODD)].addr = ep0_rx1_buf; | |
table[index(0, TX, EVEN)].desc = 0; | |
table[index(0, TX, ODD)].desc = 0; | |
// activate endpoint 0 | |
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |
f5a: 4b27 ldr r3, [pc, #156] ; (ff8 <usb_isr+0x5c0>) | |
f5c: 240d movs r4, #13 | |
f5e: 701c strb r4, [r3, #0] | |
// clear all ending interrupts | |
USB0_ERRSTAT = 0xFF; | |
f60: 4c26 ldr r4, [pc, #152] ; (ffc <usb_isr+0x5c4>) | |
f62: 23ff movs r3, #255 ; 0xff | |
f64: 7023 strb r3, [r4, #0] | |
USB0_ISTAT = 0xFF; | |
// set the address to zero during enumeration | |
USB0_ADDR = 0; | |
f66: 4c17 ldr r4, [pc, #92] ; (fc4 <usb_isr+0x58c>) | |
// activate endpoint 0 | |
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |
// clear all ending interrupts | |
USB0_ERRSTAT = 0xFF; | |
USB0_ISTAT = 0xFF; | |
f68: 7033 strb r3, [r6, #0] | |
// set the address to zero during enumeration | |
USB0_ADDR = 0; | |
f6a: 7022 strb r2, [r4, #0] | |
// enable other interrupts | |
USB0_ERREN = 0xFF; | |
f6c: 4a24 ldr r2, [pc, #144] ; (1000 <usb_isr+0x5c8>) | |
f6e: 7013 strb r3, [r2, #0] | |
USB0_INTEN = USB_INTEN_TOKDNEEN | | |
f70: 4b24 ldr r3, [pc, #144] ; (1004 <usb_isr+0x5cc>) | |
f72: 229f movs r2, #159 ; 0x9f | |
f74: 701a strb r2, [r3, #0] | |
USB_INTEN_ERROREN | | |
USB_INTEN_USBRSTEN | | |
USB_INTEN_SLEEPEN; | |
// is this necessary? | |
USB0_CTL = USB_CTL_USBENSOFEN; | |
f76: 7008 strb r0, [r1, #0] | |
return; | |
f78: e013 b.n fa2 <usb_isr+0x56a> | |
} | |
if ((status & USB_ISTAT_STALL /* 80 */ )) { | |
f7a: b263 sxtb r3, r4 | |
f7c: 2b00 cmp r3, #0 | |
f7e: da04 bge.n f8a <usb_isr+0x552> | |
//serial_print("stall:\n"); | |
USB0_ENDPT0 = USB_ENDPT_EPRXEN | USB_ENDPT_EPTXEN | USB_ENDPT_EPHSHK; | |
f80: 4b1d ldr r3, [pc, #116] ; (ff8 <usb_isr+0x5c0>) | |
f82: 220d movs r2, #13 | |
f84: 701a strb r2, [r3, #0] | |
USB0_ISTAT = USB_ISTAT_STALL; | |
f86: 2380 movs r3, #128 ; 0x80 | |
f88: 7033 strb r3, [r6, #0] | |
} | |
if ((status & USB_ISTAT_ERROR /* 02 */ )) { | |
f8a: 2302 movs r3, #2 | |
f8c: 421c tst r4, r3 | |
f8e: d004 beq.n f9a <usb_isr+0x562> | |
uint8_t err = USB0_ERRSTAT; | |
f90: 4a1a ldr r2, [pc, #104] ; (ffc <usb_isr+0x5c4>) | |
f92: 7811 ldrb r1, [r2, #0] | |
f94: b2c9 uxtb r1, r1 | |
USB0_ERRSTAT = err; | |
f96: 7011 strb r1, [r2, #0] | |
//serial_print("err:"); | |
//serial_phex(err); | |
//serial_print("\n"); | |
USB0_ISTAT = USB_ISTAT_ERROR; | |
f98: 7033 strb r3, [r6, #0] | |
} | |
if ((status & USB_ISTAT_SLEEP /* 10 */ )) { | |
f9a: 2310 movs r3, #16 | |
f9c: 421c tst r4, r3 | |
f9e: d000 beq.n fa2 <usb_isr+0x56a> | |
//serial_print("sleep\n"); | |
USB0_ISTAT = USB_ISTAT_SLEEP; | |
fa0: 7033 strb r3, [r6, #0] | |
} | |
} | |
fa2: bdf7 pop {r0, r1, r2, r4, r5, r6, r7, pc} | |
fa4: 1ffffe68 .word 0x1ffffe68 | |
fa8: 1fffff3c .word 0x1fffff3c | |
fac: 40072094 .word 0x40072094 | |
fb0: 1fffff34 .word 0x1fffff34 | |
fb4: 00002021 .word 0x00002021 | |
fb8: 20000134 .word 0x20000134 | |
fbc: 1ffffed1 .word 0x1ffffed1 | |
fc0: 004000c8 .word 0x004000c8 | |
fc4: 40072098 .word 0x40072098 | |
fc8: 1fffff14 .word 0x1fffff14 | |
fcc: 1ffffe7c .word 0x1ffffe7c | |
fd0: 1ffffec0 .word 0x1ffffec0 | |
fd4: 1ffffe6c .word 0x1ffffe6c | |
fd8: 2000012c .word 0x2000012c | |
fdc: 1fffff3e .word 0x1fffff3e | |
fe0: 00400088 .word 0x00400088 | |
fe4: 40072080 .word 0x40072080 | |
fe8: 1ffffed0 .word 0x1ffffed0 | |
fec: 1ffff800 .word 0x1ffff800 | |
ff0: 1ffffe80 .word 0x1ffffe80 | |
ff4: 1ffffed4 .word 0x1ffffed4 | |
ff8: 400720c0 .word 0x400720c0 | |
ffc: 40072088 .word 0x40072088 | |
1000: 4007208c .word 0x4007208c | |
1004: 40072084 .word 0x40072084 | |
00001008 <usb_init>: | |
void usb_init(void) | |
{ | |
1008: b510 push {r4, lr} | |
int i; | |
//serial_begin(BAUD2DIV(115200)); | |
//serial_print("usb_init\n"); | |
usb_init_serialnumber(); | |
100a: f001 fb67 bl 26dc <usb_init_serialnumber> | |
100e: 2200 movs r2, #0 | |
for (i=0; i <= NUM_ENDPOINTS*4; i++) { | |
table[i].desc = 0; | |
1010: 4b1a ldr r3, [pc, #104] ; (107c <usb_init+0x74>) | |
1012: 2100 movs r1, #0 | |
1014: 50d1 str r1, [r2, r3] | |
1016: 1898 adds r0, r3, r2 | |
1018: 3208 adds r2, #8 | |
table[i].addr = 0; | |
101a: 6041 str r1, [r0, #4] | |
//serial_begin(BAUD2DIV(115200)); | |
//serial_print("usb_init\n"); | |
usb_init_serialnumber(); | |
for (i=0; i <= NUM_ENDPOINTS*4; i++) { | |
101c: 2a88 cmp r2, #136 ; 0x88 | |
101e: d1f7 bne.n 1010 <usb_init+0x8> | |
// this basically follows the flowchart in the Kinetis | |
// Quick Reference User Guide, Rev. 1, 03/2012, page 141 | |
// assume 48 MHz clock already running | |
// SIM - enable clock | |
SIM_SCGC4 |= SIM_SCGC4_USBOTG; | |
1020: 4a17 ldr r2, [pc, #92] ; (1080 <usb_init+0x78>) | |
1022: 2080 movs r0, #128 ; 0x80 | |
1024: 6814 ldr r4, [r2, #0] | |
1026: 02c0 lsls r0, r0, #11 | |
1028: 4320 orrs r0, r4 | |
102a: 6010 str r0, [r2, #0] | |
// reset USB module | |
//USB0_USBTRC0 = USB_USBTRC_USBRESET; | |
//while ((USB0_USBTRC0 & USB_USBTRC_USBRESET) != 0) ; // wait for reset to end | |
// set desc table base addr | |
USB0_BDTPAGE1 = ((uint32_t)table) >> 8; | |
102c: 0a18 lsrs r0, r3, #8 | |
102e: 4a15 ldr r2, [pc, #84] ; (1084 <usb_init+0x7c>) | |
1030: b2c0 uxtb r0, r0 | |
1032: 7010 strb r0, [r2, #0] | |
USB0_BDTPAGE2 = ((uint32_t)table) >> 16; | |
1034: 0c18 lsrs r0, r3, #16 | |
1036: 4a14 ldr r2, [pc, #80] ; (1088 <usb_init+0x80>) | |
1038: b2c0 uxtb r0, r0 | |
103a: 7010 strb r0, [r2, #0] | |
USB0_BDTPAGE3 = ((uint32_t)table) >> 24; | |
103c: 4a13 ldr r2, [pc, #76] ; (108c <usb_init+0x84>) | |
103e: 0e1b lsrs r3, r3, #24 | |
1040: 7013 strb r3, [r2, #0] | |
// clear all ISR flags | |
USB0_ISTAT = 0xFF; | |
1042: 4a13 ldr r2, [pc, #76] ; (1090 <usb_init+0x88>) | |
1044: 23ff movs r3, #255 ; 0xff | |
1046: 7013 strb r3, [r2, #0] | |
USB0_ERRSTAT = 0xFF; | |
1048: 4a12 ldr r2, [pc, #72] ; (1094 <usb_init+0x8c>) | |
USB0_OTGISTAT = 0xFF; | |
//USB0_USBTRC0 |= 0x40; // undocumented bit | |
// enable USB | |
USB0_CTL = USB_CTL_USBENSOFEN; | |
104a: 4813 ldr r0, [pc, #76] ; (1098 <usb_init+0x90>) | |
USB0_BDTPAGE2 = ((uint32_t)table) >> 16; | |
USB0_BDTPAGE3 = ((uint32_t)table) >> 24; | |
// clear all ISR flags | |
USB0_ISTAT = 0xFF; | |
USB0_ERRSTAT = 0xFF; | |
104c: 7013 strb r3, [r2, #0] | |
USB0_OTGISTAT = 0xFF; | |
104e: 4a13 ldr r2, [pc, #76] ; (109c <usb_init+0x94>) | |
1050: 7013 strb r3, [r2, #0] | |
//USB0_USBTRC0 |= 0x40; // undocumented bit | |
// enable USB | |
USB0_CTL = USB_CTL_USBENSOFEN; | |
1052: 2201 movs r2, #1 | |
1054: 7002 strb r2, [r0, #0] | |
USB0_USBCTRL = 0; | |
1056: 4812 ldr r0, [pc, #72] ; (10a0 <usb_init+0x98>) | |
1058: 7001 strb r1, [r0, #0] | |
// enable reset interrupt | |
USB0_INTEN = USB_INTEN_USBRSTEN; | |
105a: 4912 ldr r1, [pc, #72] ; (10a4 <usb_init+0x9c>) | |
105c: 700a strb r2, [r1, #0] | |
// enable interrupt in NVIC... | |
NVIC_SET_PRIORITY(IRQ_USBOTG, 112); | |
105e: 4a12 ldr r2, [pc, #72] ; (10a8 <usb_init+0xa0>) | |
1060: 6811 ldr r1, [r2, #0] | |
1062: 4399 bics r1, r3 | |
1064: 1c0b adds r3, r1, #0 | |
1066: 2170 movs r1, #112 ; 0x70 | |
1068: 430b orrs r3, r1 | |
106a: 6013 str r3, [r2, #0] | |
NVIC_ENABLE_IRQ(IRQ_USBOTG); | |
106c: 4b0f ldr r3, [pc, #60] ; (10ac <usb_init+0xa4>) | |
106e: 2280 movs r2, #128 ; 0x80 | |
1070: 0452 lsls r2, r2, #17 | |
1072: 601a str r2, [r3, #0] | |
// enable d+ pullup | |
USB0_CONTROL = USB_CONTROL_DPPULLUPNONOTG; | |
1074: 4b0e ldr r3, [pc, #56] ; (10b0 <usb_init+0xa8>) | |
1076: 2210 movs r2, #16 | |
1078: 701a strb r2, [r3, #0] | |
} | |
107a: bd10 pop {r4, pc} | |
107c: 1ffff800 .word 0x1ffff800 | |
1080: 40048034 .word 0x40048034 | |
1084: 4007209c .word 0x4007209c | |
1088: 400720b0 .word 0x400720b0 | |
108c: 400720b4 .word 0x400720b4 | |
1090: 40072080 .word 0x40072080 | |
1094: 40072088 .word 0x40072088 | |
1098: 40072094 .word 0x40072094 | |
109c: 40072010 .word 0x40072010 | |
10a0: 40072100 .word 0x40072100 | |
10a4: 40072084 .word 0x40072084 | |
10a8: e000e418 .word 0xe000e418 | |
10ac: e000e100 .word 0xe000e100 | |
10b0: 40072108 .word 0x40072108 | |
000010b4 <usb_malloc>: | |
// http://www.archivum.info/gnu.gcc.help/2006-08/00148/Re-GCC-Inline-Assembly.html | |
// http://gcc.gnu.org/ml/gcc/2012-06/msg00015.html | |
// __builtin_clz() | |
usb_packet_t * usb_malloc(void) | |
{ | |
10b4: b538 push {r3, r4, r5, lr} | |
unsigned int n, avail; | |
uint8_t *p; | |
__disable_irq(); | |
10b6: b672 cpsid i | |
avail = usb_buffer_available; | |
10b8: 4c0b ldr r4, [pc, #44] ; (10e8 <usb_malloc+0x34>) | |
10ba: 6825 ldr r5, [r4, #0] | |
n = __builtin_clz(avail); // clz = count leading zeros | |
10bc: 1c28 adds r0, r5, #0 | |
10be: f001 fdeb bl 2c98 <__clzsi2> | |
if (n >= NUM_USB_BUFFERS) { | |
10c2: 280b cmp r0, #11 | |
10c4: d902 bls.n 10cc <usb_malloc+0x18> | |
__enable_irq(); | |
10c6: b662 cpsie i | |
return NULL; | |
10c8: 2000 movs r0, #0 | |
10ca: e00c b.n 10e6 <usb_malloc+0x32> | |
} | |
//serial_print("malloc:"); | |
//serial_phex(n); | |
//serial_print("\n"); | |
usb_buffer_available = avail & ~(0x80000000 >> n); | |
10cc: 2380 movs r3, #128 ; 0x80 | |
10ce: 061b lsls r3, r3, #24 | |
10d0: 40c3 lsrs r3, r0 | |
10d2: 439d bics r5, r3 | |
10d4: 6025 str r5, [r4, #0] | |
__enable_irq(); | |
10d6: b662 cpsie i | |
p = usb_buffer_memory + (n * sizeof(usb_packet_t)); | |
10d8: 2348 movs r3, #72 ; 0x48 | |
10da: 4358 muls r0, r3 | |
10dc: 4b03 ldr r3, [pc, #12] ; (10ec <usb_malloc+0x38>) | |
10de: 1818 adds r0, r3, r0 | |
//serial_print("malloc:"); | |
//serial_phex32((int)p); | |
//serial_print("\n"); | |
*(uint32_t *)p = 0; | |
10e0: 2300 movs r3, #0 | |
10e2: 6003 str r3, [r0, #0] | |
*(uint32_t *)(p + 4) = 0; | |
10e4: 6043 str r3, [r0, #4] | |
return (usb_packet_t *)p; | |
} | |
10e6: bd38 pop {r3, r4, r5, pc} | |
10e8: 1ffffd60 .word 0x1ffffd60 | |
10ec: 1ffffa00 .word 0x1ffffa00 | |
000010f0 <usb_free>: | |
// for the receive endpoints to request memory | |
extern uint8_t usb_rx_memory_needed; | |
extern void usb_rx_memory(usb_packet_t *packet); | |
void usb_free(usb_packet_t *p) | |
{ | |
10f0: b510 push {r4, lr} | |
10f2: 1c04 adds r4, r0, #0 | |
unsigned int n, mask; | |
//serial_print("free:"); | |
n = ((uint8_t *)p - usb_buffer_memory) / sizeof(usb_packet_t); | |
10f4: 480e ldr r0, [pc, #56] ; (1130 <usb_free+0x40>) | |
10f6: 2148 movs r1, #72 ; 0x48 | |
10f8: 1a20 subs r0, r4, r0 | |
10fa: f001 fd1d bl 2b38 <__aeabi_uidiv> | |
if (n >= NUM_USB_BUFFERS) return; | |
10fe: 280b cmp r0, #11 | |
1100: d815 bhi.n 112e <usb_free+0x3e> | |
//serial_phex(n); | |
//serial_print("\n"); | |
// if any endpoints are starving for memory to receive | |
// packets, give this memory to them immediately! | |
if (usb_rx_memory_needed && usb_configuration) { | |
1102: 4b0c ldr r3, [pc, #48] ; (1134 <usb_free+0x44>) | |
1104: 781b ldrb r3, [r3, #0] | |
1106: 2b00 cmp r3, #0 | |
1108: d007 beq.n 111a <usb_free+0x2a> | |
110a: 4b0b ldr r3, [pc, #44] ; (1138 <usb_free+0x48>) | |
110c: 781b ldrb r3, [r3, #0] | |
110e: 2b00 cmp r3, #0 | |
1110: d003 beq.n 111a <usb_free+0x2a> | |
//serial_print("give to rx:"); | |
//serial_phex32((int)p); | |
//serial_print("\n"); | |
usb_rx_memory(p); | |
1112: 1c20 adds r0, r4, #0 | |
1114: f7ff fc18 bl 948 <usb_rx_memory> | |
return; | |
1118: e009 b.n 112e <usb_free+0x3e> | |
} | |
mask = (0x80000000 >> n); | |
__disable_irq(); | |
111a: b672 cpsid i | |
//serial_print("\n"); | |
usb_rx_memory(p); | |
return; | |
} | |
mask = (0x80000000 >> n); | |
111c: 2280 movs r2, #128 ; 0x80 | |
__disable_irq(); | |
usb_buffer_available |= mask; | |
111e: 4b07 ldr r3, [pc, #28] ; (113c <usb_free+0x4c>) | |
//serial_print("\n"); | |
usb_rx_memory(p); | |
return; | |
} | |
mask = (0x80000000 >> n); | |
1120: 0612 lsls r2, r2, #24 | |
1122: 40c2 lsrs r2, r0 | |
1124: 1c10 adds r0, r2, #0 | |
__disable_irq(); | |
usb_buffer_available |= mask; | |
1126: 681a ldr r2, [r3, #0] | |
1128: 4310 orrs r0, r2 | |
112a: 6018 str r0, [r3, #0] | |
__enable_irq(); | |
112c: b662 cpsie i | |
//serial_print("free:"); | |
//serial_phex32((int)p); | |
//serial_print("\n"); | |
} | |
112e: bd10 pop {r4, pc} | |
1130: 1ffffa00 .word 0x1ffffa00 | |
1134: 1fffff3e .word 0x1fffff3e | |
1138: 1fffff47 .word 0x1fffff47 | |
113c: 1ffffd60 .word 0x1ffffd60 | |
00001140 <usb_serial_getchar>: | |
#define TRANSMIT_FLUSH_TIMEOUT 5 /* in milliseconds */ | |
// get the next character, or -1 if nothing received | |
int usb_serial_getchar(void) | |
{ | |
1140: b538 push {r3, r4, r5, lr} | |
unsigned int i; | |
int c; | |
if (!rx_packet) { | |
1142: 4c11 ldr r4, [pc, #68] ; (1188 <usb_serial_getchar+0x48>) | |
1144: 6823 ldr r3, [r4, #0] | |
1146: 2b00 cmp r3, #0 | |
1148: d00c beq.n 1164 <usb_serial_getchar+0x24> | |
if (!usb_configuration) return -1; | |
rx_packet = usb_rx(CDC_RX_ENDPOINT); | |
if (!rx_packet) return -1; | |
} | |
i = rx_packet->index; | |
114a: 6820 ldr r0, [r4, #0] | |
114c: 8842 ldrh r2, [r0, #2] | |
c = rx_packet->buf[i++]; | |
114e: 1c53 adds r3, r2, #1 | |
1150: 1882 adds r2, r0, r2 | |
1152: 7a15 ldrb r5, [r2, #8] | |
if (i >= rx_packet->len) { | |
1154: 8802 ldrh r2, [r0, #0] | |
1156: 4293 cmp r3, r2 | |
1158: d312 bcc.n 1180 <usb_serial_getchar+0x40> | |
usb_free(rx_packet); | |
115a: f7ff ffc9 bl 10f0 <usb_free> | |
rx_packet = NULL; | |
115e: 2300 movs r3, #0 | |
1160: 6023 str r3, [r4, #0] | |
1162: e00e b.n 1182 <usb_serial_getchar+0x42> | |
{ | |
unsigned int i; | |
int c; | |
if (!rx_packet) { | |
if (!usb_configuration) return -1; | |
1164: 4b09 ldr r3, [pc, #36] ; (118c <usb_serial_getchar+0x4c>) | |
1166: 781b ldrb r3, [r3, #0] | |
1168: 2b00 cmp r3, #0 | |
116a: d102 bne.n 1172 <usb_serial_getchar+0x32> | |
116c: 2001 movs r0, #1 | |
116e: 4240 negs r0, r0 | |
1170: e008 b.n 1184 <usb_serial_getchar+0x44> | |
rx_packet = usb_rx(CDC_RX_ENDPOINT); | |
1172: 2003 movs r0, #3 | |
1174: f7ff fbbc bl 8f0 <usb_rx> | |
1178: 6020 str r0, [r4, #0] | |
if (!rx_packet) return -1; | |
117a: 2800 cmp r0, #0 | |
117c: d1e5 bne.n 114a <usb_serial_getchar+0xa> | |
117e: e7f5 b.n 116c <usb_serial_getchar+0x2c> | |
c = rx_packet->buf[i++]; | |
if (i >= rx_packet->len) { | |
usb_free(rx_packet); | |
rx_packet = NULL; | |
} else { | |
rx_packet->index = i; | |
1180: 8043 strh r3, [r0, #2] | |
} | |
return c; | |
1182: 1c28 adds r0, r5, #0 | |
} | |
1184: bd38 pop {r3, r4, r5, pc} | |
1186: 46c0 nop ; (mov r8, r8) | |
1188: 1fffff54 .word 0x1fffff54 | |
118c: 1fffff47 .word 0x1fffff47 | |
00001190 <usb_serial_peekchar>: | |
// peek at the next character, or -1 if nothing received | |
int usb_serial_peekchar(void) | |
{ | |
1190: b510 push {r4, lr} | |
if (!rx_packet) { | |
1192: 4c0d ldr r4, [pc, #52] ; (11c8 <usb_serial_peekchar+0x38>) | |
1194: 6823 ldr r3, [r4, #0] | |
1196: 2b00 cmp r3, #0 | |
1198: d003 beq.n 11a2 <usb_serial_peekchar+0x12> | |
if (!usb_configuration) return -1; | |
rx_packet = usb_rx(CDC_RX_ENDPOINT); | |
if (!rx_packet) return -1; | |
} | |
if (!rx_packet) return -1; | |
119a: 6823 ldr r3, [r4, #0] | |
119c: 2b00 cmp r3, #0 | |
119e: d10e bne.n 11be <usb_serial_peekchar+0x2e> | |
11a0: e003 b.n 11aa <usb_serial_peekchar+0x1a> | |
// peek at the next character, or -1 if nothing received | |
int usb_serial_peekchar(void) | |
{ | |
if (!rx_packet) { | |
if (!usb_configuration) return -1; | |
11a2: 4b0a ldr r3, [pc, #40] ; (11cc <usb_serial_peekchar+0x3c>) | |
11a4: 781b ldrb r3, [r3, #0] | |
11a6: 2b00 cmp r3, #0 | |
11a8: d102 bne.n 11b0 <usb_serial_peekchar+0x20> | |
11aa: 2001 movs r0, #1 | |
11ac: 4240 negs r0, r0 | |
11ae: e009 b.n 11c4 <usb_serial_peekchar+0x34> | |
rx_packet = usb_rx(CDC_RX_ENDPOINT); | |
11b0: 2003 movs r0, #3 | |
11b2: f7ff fb9d bl 8f0 <usb_rx> | |
11b6: 6020 str r0, [r4, #0] | |
if (!rx_packet) return -1; | |
11b8: 2800 cmp r0, #0 | |
11ba: d1ee bne.n 119a <usb_serial_peekchar+0xa> | |
11bc: e7f5 b.n 11aa <usb_serial_peekchar+0x1a> | |
} | |
if (!rx_packet) return -1; | |
return rx_packet->buf[rx_packet->index]; | |
11be: 885a ldrh r2, [r3, #2] | |
11c0: 189b adds r3, r3, r2 | |
11c2: 7a18 ldrb r0, [r3, #8] | |
} | |
11c4: bd10 pop {r4, pc} | |
11c6: 46c0 nop ; (mov r8, r8) | |
11c8: 1fffff54 .word 0x1fffff54 | |
11cc: 1fffff47 .word 0x1fffff47 | |
000011d0 <usb_serial_available>: | |
static inline uint32_t usb_rx_byte_count(uint32_t endpoint) __attribute__((always_inline)); | |
static inline uint32_t usb_rx_byte_count(uint32_t endpoint) | |
{ | |
endpoint--; | |
if (endpoint >= NUM_ENDPOINTS) return 0; | |
return usb_rx_byte_count_data[endpoint]; | |
11d0: 4b05 ldr r3, [pc, #20] ; (11e8 <usb_serial_available+0x18>) | |
// number of bytes available in the receive buffer | |
int usb_serial_available(void) | |
{ | |
int count; | |
count = usb_rx_byte_count(CDC_RX_ENDPOINT); | |
11d2: 8898 ldrh r0, [r3, #4] | |
if (rx_packet) count += rx_packet->len - rx_packet->index; | |
11d4: 4b05 ldr r3, [pc, #20] ; (11ec <usb_serial_available+0x1c>) | |
11d6: 681b ldr r3, [r3, #0] | |
11d8: 2b00 cmp r3, #0 | |
11da: d003 beq.n 11e4 <usb_serial_available+0x14> | |
11dc: 881a ldrh r2, [r3, #0] | |
11de: 885b ldrh r3, [r3, #2] | |
11e0: 1ad3 subs r3, r2, r3 | |
11e2: 18c0 adds r0, r0, r3 | |
return count; | |
} | |
11e4: 4770 bx lr | |
11e6: 46c0 nop ; (mov r8, r8) | |
11e8: 2000012c .word 0x2000012c | |
11ec: 1fffff54 .word 0x1fffff54 | |
000011f0 <usb_serial_flush_input>: | |
return count; | |
} | |
// discard any buffered input | |
void usb_serial_flush_input(void) | |
{ | |
11f0: b510 push {r4, lr} | |
usb_packet_t *rx; | |
if (!usb_configuration) return; | |
11f2: 4b0a ldr r3, [pc, #40] ; (121c <usb_serial_flush_input+0x2c>) | |
11f4: 781b ldrb r3, [r3, #0] | |
11f6: 2b00 cmp r3, #0 | |
11f8: d00f beq.n 121a <usb_serial_flush_input+0x2a> | |
if (rx_packet) { | |
11fa: 4c09 ldr r4, [pc, #36] ; (1220 <usb_serial_flush_input+0x30>) | |
11fc: 6820 ldr r0, [r4, #0] | |
11fe: 2800 cmp r0, #0 | |
1200: d003 beq.n 120a <usb_serial_flush_input+0x1a> | |
usb_free(rx_packet); | |
1202: f7ff ff75 bl 10f0 <usb_free> | |
rx_packet = NULL; | |
1206: 2300 movs r3, #0 | |
1208: 6023 str r3, [r4, #0] | |
} | |
while (1) { | |
rx = usb_rx(CDC_RX_ENDPOINT); | |
120a: 2003 movs r0, #3 | |
120c: f7ff fb70 bl 8f0 <usb_rx> | |
if (!rx) break; | |
1210: 2800 cmp r0, #0 | |
1212: d002 beq.n 121a <usb_serial_flush_input+0x2a> | |
usb_free(rx); | |
1214: f7ff ff6c bl 10f0 <usb_free> | |
} | |
1218: e7f7 b.n 120a <usb_serial_flush_input+0x1a> | |
} | |
121a: bd10 pop {r4, pc} | |
121c: 1fffff47 .word 0x1fffff47 | |
1220: 1fffff54 .word 0x1fffff54 | |
00001224 <usb_serial_write>: | |
return usb_serial_write(&c, 1); | |
} | |
int usb_serial_write(const void *buffer, uint32_t size) | |
{ | |
1224: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} | |
uint32_t len; | |
uint32_t wait_count; | |
const uint8_t *src = (const uint8_t *)buffer; | |
uint8_t *dest; | |
tx_noautoflush = 1; | |
1226: 4d30 ldr r5, [pc, #192] ; (12e8 <usb_serial_write+0xc4>) | |
1228: 2301 movs r3, #1 | |
return usb_serial_write(&c, 1); | |
} | |
int usb_serial_write(const void *buffer, uint32_t size) | |
{ | |
122a: 1c07 adds r7, r0, #0 | |
122c: 1c0c adds r4, r1, #0 | |
uint32_t len; | |
uint32_t wait_count; | |
const uint8_t *src = (const uint8_t *)buffer; | |
uint8_t *dest; | |
tx_noautoflush = 1; | |
122e: 702b strb r3, [r5, #0] | |
while (size > 0) { | |
1230: 2c00 cmp r4, #0 | |
1232: d056 beq.n 12e2 <usb_serial_write+0xbe> | |
if (!tx_packet) { | |
1234: 4e2d ldr r6, [pc, #180] ; (12ec <usb_serial_write+0xc8>) | |
1236: 6830 ldr r0, [r6, #0] | |
1238: 2800 cmp r0, #0 | |
123a: d127 bne.n 128c <usb_serial_write+0x68> | |
123c: 4a2c ldr r2, [pc, #176] ; (12f0 <usb_serial_write+0xcc>) | |
123e: 9201 str r2, [sp, #4] | |
wait_count = 0; | |
while (1) { | |
if (!usb_configuration) { | |
1240: 4b2c ldr r3, [pc, #176] ; (12f4 <usb_serial_write+0xd0>) | |
1242: 781b ldrb r3, [r3, #0] | |
1244: b2db uxtb r3, r3 | |
1246: 2b00 cmp r3, #0 | |
1248: d103 bne.n 1252 <usb_serial_write+0x2e> | |
tx_noautoflush = 0; | |
124a: 702b strb r3, [r5, #0] | |
return -1; | |
124c: 2001 movs r0, #1 | |
124e: 4240 negs r0, r0 | |
1250: e049 b.n 12e6 <usb_serial_write+0xc2> | |
} | |
if (usb_tx_packet_count(CDC_TX_ENDPOINT) < TX_PACKET_LIMIT) { | |
1252: 2004 movs r0, #4 | |
1254: f7ff fb66 bl 924 <usb_tx_packet_count> | |
1258: 2807 cmp r0, #7 | |
125a: d808 bhi.n 126e <usb_serial_write+0x4a> | |
tx_noautoflush = 1; | |
125c: 2301 movs r3, #1 | |
125e: 702b strb r3, [r5, #0] | |
tx_packet = usb_malloc(); | |
1260: f7ff ff28 bl 10b4 <usb_malloc> | |
1264: 4b21 ldr r3, [pc, #132] ; (12ec <usb_serial_write+0xc8>) | |
1266: 6018 str r0, [r3, #0] | |
if (tx_packet) break; | |
1268: 2800 cmp r0, #0 | |
126a: d10f bne.n 128c <usb_serial_write+0x68> | |
tx_noautoflush = 0; | |
126c: 7028 strb r0, [r5, #0] | |
126e: 9801 ldr r0, [sp, #4] | |
1270: 4b21 ldr r3, [pc, #132] ; (12f8 <usb_serial_write+0xd4>) | |
1272: 3801 subs r0, #1 | |
1274: 9001 str r0, [sp, #4] | |
} | |
if (++wait_count > TX_TIMEOUT || transmit_previous_timeout) { | |
1276: 2800 cmp r0, #0 | |
1278: d002 beq.n 1280 <usb_serial_write+0x5c> | |
127a: 781a ldrb r2, [r3, #0] | |
127c: 2a00 cmp r2, #0 | |
127e: d002 beq.n 1286 <usb_serial_write+0x62> | |
transmit_previous_timeout = 1; | |
1280: 2201 movs r2, #1 | |
1282: 701a strb r2, [r3, #0] | |
1284: e7e2 b.n 124c <usb_serial_write+0x28> | |
return -1; | |
} | |
yield(); | |
1286: f000 f90f bl 14a8 <yield> | |
} | |
128a: e7d9 b.n 1240 <usb_serial_write+0x1c> | |
} | |
transmit_previous_timeout = 0; | |
128c: 4b1a ldr r3, [pc, #104] ; (12f8 <usb_serial_write+0xd4>) | |
128e: 2200 movs r2, #0 | |
len = CDC_TX_SIZE - tx_packet->index; | |
1290: 6831 ldr r1, [r6, #0] | |
return -1; | |
} | |
yield(); | |
} | |
} | |
transmit_previous_timeout = 0; | |
1292: 701a strb r2, [r3, #0] | |
len = CDC_TX_SIZE - tx_packet->index; | |
1294: 884b ldrh r3, [r1, #2] | |
1296: 2040 movs r0, #64 ; 0x40 | |
1298: 1ac0 subs r0, r0, r3 | |
129a: 9400 str r4, [sp, #0] | |
129c: 4284 cmp r4, r0 | |
129e: d900 bls.n 12a2 <usb_serial_write+0x7e> | |
12a0: 9000 str r0, [sp, #0] | |
if (len > size) len = size; | |
dest = tx_packet->buf + tx_packet->index; | |
12a2: 1c18 adds r0, r3, #0 | |
tx_packet->index += len; | |
12a4: 9a00 ldr r2, [sp, #0] | |
} | |
} | |
transmit_previous_timeout = 0; | |
len = CDC_TX_SIZE - tx_packet->index; | |
if (len > size) len = size; | |
dest = tx_packet->buf + tx_packet->index; | |
12a6: 3008 adds r0, #8 | |
tx_packet->index += len; | |
12a8: 189b adds r3, r3, r2 | |
} | |
} | |
transmit_previous_timeout = 0; | |
len = CDC_TX_SIZE - tx_packet->index; | |
if (len > size) len = size; | |
dest = tx_packet->buf + tx_packet->index; | |
12aa: 1808 adds r0, r1, r0 | |
tx_packet->index += len; | |
12ac: 804b strh r3, [r1, #2] | |
} | |
} | |
transmit_previous_timeout = 0; | |
len = CDC_TX_SIZE - tx_packet->index; | |
if (len > size) len = size; | |
dest = tx_packet->buf + tx_packet->index; | |
12ae: 9001 str r0, [sp, #4] | |
tx_packet->index += len; | |
size -= len; | |
12b0: 1aa4 subs r4, r4, r2 | |
while (len-- > 0) *dest++ = *src++; | |
12b2: 2300 movs r3, #0 | |
12b4: 9800 ldr r0, [sp, #0] | |
12b6: 4283 cmp r3, r0 | |
12b8: d004 beq.n 12c4 <usb_serial_write+0xa0> | |
12ba: 5cf8 ldrb r0, [r7, r3] | |
12bc: 9a01 ldr r2, [sp, #4] | |
12be: 54d0 strb r0, [r2, r3] | |
12c0: 3301 adds r3, #1 | |
12c2: e7f7 b.n 12b4 <usb_serial_write+0x90> | |
12c4: 18ff adds r7, r7, r3 | |
if (tx_packet->index >= CDC_TX_SIZE) { | |
12c6: 884b ldrh r3, [r1, #2] | |
12c8: 2b3f cmp r3, #63 ; 0x3f | |
12ca: d906 bls.n 12da <usb_serial_write+0xb6> | |
tx_packet->len = CDC_TX_SIZE; | |
12cc: 2340 movs r3, #64 ; 0x40 | |
12ce: 800b strh r3, [r1, #0] | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
12d0: 2004 movs r0, #4 | |
12d2: f7ff fb73 bl 9bc <usb_tx> | |
tx_packet = NULL; | |
12d6: 2300 movs r3, #0 | |
12d8: 6033 str r3, [r6, #0] | |
} | |
usb_cdc_transmit_flush_timer = TRANSMIT_FLUSH_TIMEOUT; | |
12da: 4b08 ldr r3, [pc, #32] ; (12fc <usb_serial_write+0xd8>) | |
12dc: 2205 movs r2, #5 | |
12de: 701a strb r2, [r3, #0] | |
12e0: e7a6 b.n 1230 <usb_serial_write+0xc> | |
} | |
tx_noautoflush = 0; | |
12e2: 702c strb r4, [r5, #0] | |
return 0; | |
12e4: 1c20 adds r0, r4, #0 | |
} | |
12e6: bdfe pop {r1, r2, r3, r4, r5, r6, r7, pc} | |
12e8: 1fffff4a .word 0x1fffff4a | |
12ec: 1fffff4c .word 0x1fffff4c | |
12f0: 00007509 .word 0x00007509 | |
12f4: 1fffff47 .word 0x1fffff47 | |
12f8: 1fffff50 .word 0x1fffff50 | |
12fc: 1fffff49 .word 0x1fffff49 | |
00001300 <usb_serial_putchar>: | |
static uint8_t transmit_previous_timeout=0; | |
// transmit a character. 0 returned on success, -1 on error | |
int usb_serial_putchar(uint8_t c) | |
{ | |
1300: b507 push {r0, r1, r2, lr} | |
1302: 466b mov r3, sp | |
1304: 71d8 strb r0, [r3, #7] | |
1306: 3307 adds r3, #7 | |
return usb_serial_write(&c, 1); | |
1308: 1c18 adds r0, r3, #0 | |
130a: 2101 movs r1, #1 | |
130c: f7ff ff8a bl 1224 <usb_serial_write> | |
} | |
1310: bd0e pop {r1, r2, r3, pc} | |
1312: ffff b5f8 vsli.64 <illegal reg q13.5>, q12, #63 ; 0x3f | |
00001314 <usb_serial_flush_output>: | |
tx_noautoflush = 0; | |
return len; | |
} | |
void usb_serial_flush_output(void) | |
{ | |
1314: b5f8 push {r3, r4, r5, r6, r7, lr} | |
if (!usb_configuration) return; | |
1316: 4b12 ldr r3, [pc, #72] ; (1360 <usb_serial_flush_output+0x4c>) | |
1318: 781b ldrb r3, [r3, #0] | |
131a: 2b00 cmp r3, #0 | |
131c: d01e beq.n 135c <usb_serial_flush_output+0x48> | |
tx_noautoflush = 1; | |
if (tx_packet) { | |
131e: 4f11 ldr r7, [pc, #68] ; (1364 <usb_serial_flush_output+0x50>) | |
} | |
void usb_serial_flush_output(void) | |
{ | |
if (!usb_configuration) return; | |
tx_noautoflush = 1; | |
1320: 4b11 ldr r3, [pc, #68] ; (1368 <usb_serial_flush_output+0x54>) | |
if (tx_packet) { | |
1322: 683c ldr r4, [r7, #0] | |
} | |
void usb_serial_flush_output(void) | |
{ | |
if (!usb_configuration) return; | |
tx_noautoflush = 1; | |
1324: 2601 movs r6, #1 | |
1326: 701e strb r6, [r3, #0] | |
1328: 4d10 ldr r5, [pc, #64] ; (136c <usb_serial_flush_output+0x58>) | |
if (tx_packet) { | |
132a: 2c00 cmp r4, #0 | |
132c: d009 beq.n 1342 <usb_serial_flush_output+0x2e> | |
usb_cdc_transmit_flush_timer = 0; | |
132e: 2600 movs r6, #0 | |
1330: 702e strb r6, [r5, #0] | |
tx_packet->len = tx_packet->index; | |
1332: 8863 ldrh r3, [r4, #2] | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
1334: 2004 movs r0, #4 | |
{ | |
if (!usb_configuration) return; | |
tx_noautoflush = 1; | |
if (tx_packet) { | |
usb_cdc_transmit_flush_timer = 0; | |
tx_packet->len = tx_packet->index; | |
1336: 8023 strh r3, [r4, #0] | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
1338: 1c21 adds r1, r4, #0 | |
133a: f7ff fb3f bl 9bc <usb_tx> | |
tx_packet = NULL; | |
133e: 603e str r6, [r7, #0] | |
1340: e009 b.n 1356 <usb_serial_flush_output+0x42> | |
} else { | |
usb_packet_t *tx = usb_malloc(); | |
1342: f7ff feb7 bl 10b4 <usb_malloc> | |
1346: 1e01 subs r1, r0, #0 | |
if (tx) { | |
1348: d004 beq.n 1354 <usb_serial_flush_output+0x40> | |
usb_cdc_transmit_flush_timer = 0; | |
usb_tx(CDC_TX_ENDPOINT, tx); | |
134a: 2004 movs r0, #4 | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
tx_packet = NULL; | |
} else { | |
usb_packet_t *tx = usb_malloc(); | |
if (tx) { | |
usb_cdc_transmit_flush_timer = 0; | |
134c: 702c strb r4, [r5, #0] | |
usb_tx(CDC_TX_ENDPOINT, tx); | |
134e: f7ff fb35 bl 9bc <usb_tx> | |
1352: e000 b.n 1356 <usb_serial_flush_output+0x42> | |
} else { | |
usb_cdc_transmit_flush_timer = 1; | |
1354: 702e strb r6, [r5, #0] | |
} | |
} | |
tx_noautoflush = 0; | |
1356: 4a04 ldr r2, [pc, #16] ; (1368 <usb_serial_flush_output+0x54>) | |
1358: 2300 movs r3, #0 | |
135a: 7013 strb r3, [r2, #0] | |
} | |
135c: bdf8 pop {r3, r4, r5, r6, r7, pc} | |
135e: 46c0 nop ; (mov r8, r8) | |
1360: 1fffff47 .word 0x1fffff47 | |
1364: 1fffff4c .word 0x1fffff4c | |
1368: 1fffff4a .word 0x1fffff4a | |
136c: 1fffff49 .word 0x1fffff49 | |
00001370 <usb_serial_flush_callback>: | |
void usb_serial_flush_callback(void) | |
{ | |
1370: b538 push {r3, r4, r5, lr} | |
if (tx_noautoflush) return; | |
1372: 4b0e ldr r3, [pc, #56] ; (13ac <usb_serial_flush_callback+0x3c>) | |
1374: 781d ldrb r5, [r3, #0] | |
1376: b2ed uxtb r5, r5 | |
1378: 2d00 cmp r5, #0 | |
137a: d115 bne.n 13a8 <usb_serial_flush_callback+0x38> | |
if (tx_packet) { | |
137c: 4c0c ldr r4, [pc, #48] ; (13b0 <usb_serial_flush_callback+0x40>) | |
137e: 6821 ldr r1, [r4, #0] | |
1380: 2900 cmp r1, #0 | |
1382: d006 beq.n 1392 <usb_serial_flush_callback+0x22> | |
tx_packet->len = tx_packet->index; | |
1384: 884b ldrh r3, [r1, #2] | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
1386: 2004 movs r0, #4 | |
void usb_serial_flush_callback(void) | |
{ | |
if (tx_noautoflush) return; | |
if (tx_packet) { | |
tx_packet->len = tx_packet->index; | |
1388: 800b strh r3, [r1, #0] | |
usb_tx(CDC_TX_ENDPOINT, tx_packet); | |
138a: f7ff fb17 bl 9bc <usb_tx> | |
tx_packet = NULL; | |
138e: 6025 str r5, [r4, #0] | |
1390: e00a b.n 13a8 <usb_serial_flush_callback+0x38> | |
} else { | |
usb_packet_t *tx = usb_malloc(); | |
1392: f7ff fe8f bl 10b4 <usb_malloc> | |
1396: 1e01 subs r1, r0, #0 | |
if (tx) { | |
1398: d003 beq.n 13a2 <usb_serial_flush_callback+0x32> | |
usb_tx(CDC_TX_ENDPOINT, tx); | |
139a: 2004 movs r0, #4 | |
139c: f7ff fb0e bl 9bc <usb_tx> | |
13a0: e002 b.n 13a8 <usb_serial_flush_callback+0x38> | |
} else { | |
usb_cdc_transmit_flush_timer = 1; | |
13a2: 4b04 ldr r3, [pc, #16] ; (13b4 <usb_serial_flush_callback+0x44>) | |
13a4: 2201 movs r2, #1 | |
13a6: 701a strb r2, [r3, #0] | |
} | |
} | |
} | |
13a8: bd38 pop {r3, r4, r5, pc} | |
13aa: 46c0 nop ; (mov r8, r8) | |
13ac: 1fffff4a .word 0x1fffff4a | |
13b0: 1fffff4c .word 0x1fffff4c | |
13b4: 1fffff49 .word 0x1fffff49 | |
000013b8 <_ZN5Print7printlnEv>: | |
return printNumber(n, 10, sign); | |
} | |
size_t Print::println(void) | |
{ | |
13b8: b537 push {r0, r1, r2, r4, r5, lr} | |
uint8_t buf[2]={'\r', '\n'}; | |
13ba: 2402 movs r4, #2 | |
return printNumber(n, 10, sign); | |
} | |
size_t Print::println(void) | |
{ | |
13bc: 1c05 adds r5, r0, #0 | |
uint8_t buf[2]={'\r', '\n'}; | |
13be: 1c22 adds r2, r4, #0 | |
13c0: a801 add r0, sp, #4 | |
13c2: 4905 ldr r1, [pc, #20] ; (13d8 <_ZN5Print7printlnEv+0x20>) | |
13c4: f001 fcac bl 2d20 <memcpy> | |
return write(buf, 2); | |
13c8: 682b ldr r3, [r5, #0] | |
13ca: 1c28 adds r0, r5, #0 | |
13cc: 685b ldr r3, [r3, #4] | |
13ce: a901 add r1, sp, #4 | |
13d0: 1c22 adds r2, r4, #0 | |
13d2: 4798 blx r3 | |
} | |
13d4: bd3e pop {r1, r2, r3, r4, r5, pc} | |
13d6: 46c0 nop ; (mov r8, r8) | |
13d8: 00002ea8 .word 0x00002ea8 | |
000013dc <_ZN5Print14printNumberDecEmh>: | |
// ({_mod = _div % 10, _div = _div / 10; }) | |
#endif | |
size_t Print::printNumberDec(unsigned long n, uint8_t sign) | |
{ | |
13dc: b5f0 push {r4, r5, r6, r7, lr} | |
13de: b085 sub sp, #20 | |
13e0: 466b mov r3, sp | |
13e2: 330e adds r3, #14 | |
// https://forum.pjrc.com/threads/28932-LC-is-10-9-times-slower-than-T3-1?p=76072&viewfull=1#post76072 | |
void inline divmod10_v2(uint32_t n,uint32_t *div,uint32_t *mod) { | |
uint32_t p,q; | |
/* Using 32.16 fixed point representation p.q */ | |
/* p.q = (n+1)/512 */ | |
q = (n&0xFFFF) + 1; | |
13e4: b28e uxth r6, r1 | |
p = (n>>16); | |
/* p.q = 51*(n+1)/512 */ | |
q = 13107*q; | |
13e6: 4c14 ldr r4, [pc, #80] ; (1438 <_ZN5Print14printNumberDecEmh+0x5c>) | |
void inline divmod10_v2(uint32_t n,uint32_t *div,uint32_t *mod) { | |
uint32_t p,q; | |
/* Using 32.16 fixed point representation p.q */ | |
/* p.q = (n+1)/512 */ | |
q = (n&0xFFFF) + 1; | |
p = (n>>16); | |
13e8: 0c0d lsrs r5, r1, #16 | |
// https://forum.pjrc.com/threads/28932-LC-is-10-9-times-slower-than-T3-1?p=76072&viewfull=1#post76072 | |
void inline divmod10_v2(uint32_t n,uint32_t *div,uint32_t *mod) { | |
uint32_t p,q; | |
/* Using 32.16 fixed point representation p.q */ | |
/* p.q = (n+1)/512 */ | |
q = (n&0xFFFF) + 1; | |
13ea: 3601 adds r6, #1 | |
p = (n>>16); | |
/* p.q = 51*(n+1)/512 */ | |
q = 13107*q; | |
13ec: 4366 muls r6, r4 | |
p = 13107*p; | |
13ee: 436c muls r4, r5 | |
/* p.q = (1+1/2^8+1/2^16+1/2^24)*51*(n+1)/512 */ | |
q = q + (q>>16) + (p&0xFFFF); | |
13f0: b2a5 uxth r5, r4 | |
13f2: 0c37 lsrs r7, r6, #16 | |
13f4: 19ae adds r6, r5, r6 | |
13f6: 19f6 adds r6, r6, r7 | |
p = p + (p>>16) + (q>>16); | |
13f8: 0c25 lsrs r5, r4, #16 | |
13fa: 192c adds r4, r5, r4 | |
13fc: 0c36 lsrs r6, r6, #16 | |
13fe: 19a5 adds r5, r4, r6 | |
/* divide by 2 */ | |
p = p>>1; | |
1400: 086d lsrs r5, r5, #1 | |
*div = p; | |
*mod = n-10*p; | |
1402: 260a movs r6, #10 | |
1404: 436e muls r6, r5 | |
1406: 1b89 subs r1, r1, r6 | |
do { | |
uint32_t div; | |
divmod10_v2(n, &div, &digit); | |
n = div; | |
//divmod10_asm(n, digit, t1, t2, c3333); | |
*--p = digit + '0'; | |
1408: 3130 adds r1, #48 ; 0x30 | |
140a: 1c1c adds r4, r3, #0 | |
140c: 7019 strb r1, [r3, #0] | |
140e: 3b01 subs r3, #1 | |
uint8_t buf[11], *p; | |
uint32_t digit; | |
//uint32_t t1, t2, c3333=0x3333; | |
p = buf + (sizeof(buf)); | |
do { | |
1410: 2d00 cmp r5, #0 | |
1412: d001 beq.n 1418 <_ZN5Print14printNumberDecEmh+0x3c> | |
uint32_t div; | |
divmod10_v2(n, &div, &digit); | |
n = div; | |
1414: 1c29 adds r1, r5, #0 | |
1416: e7e5 b.n 13e4 <_ZN5Print14printNumberDecEmh+0x8> | |
//divmod10_asm(n, digit, t1, t2, c3333); | |
*--p = digit + '0'; | |
1418: 1c21 adds r1, r4, #0 | |
} while (n); | |
if (sign) *--p = '-'; | |
141a: 2a00 cmp r2, #0 | |
141c: d003 beq.n 1426 <_ZN5Print14printNumberDecEmh+0x4a> | |
141e: 1c1c adds r4, r3, #0 | |
1420: 222d movs r2, #45 ; 0x2d | |
1422: 1e4b subs r3, r1, #1 | |
1424: 701a strb r2, [r3, #0] | |
return write(p, sizeof(buf) - (p - buf)); | |
1426: 6803 ldr r3, [r0, #0] | |
1428: a904 add r1, sp, #16 | |
142a: 43e2 mvns r2, r4 | |
142c: 1852 adds r2, r2, r1 | |
142e: 685b ldr r3, [r3, #4] | |
1430: 1c21 adds r1, r4, #0 | |
1432: 4798 blx r3 | |
} | |
1434: b005 add sp, #20 | |
1436: bdf0 pop {r4, r5, r6, r7, pc} | |
1438: 00003333 .word 0x00003333 | |
0000143c <main>: | |
#include "WProgram.h" | |
extern "C" int main(void) | |
{ | |
143c: b508 push {r3, lr} | |
} | |
#else | |
// Arduino's main() function just calls setup() and loop().... | |
setup(); | |
143e: f7ff f885 bl 54c <setup> | |
while (1) { | |
loop(); | |
1442: f7ff f8b7 bl 5b4 <loop> | |
yield(); | |
1446: f000 f82f bl 14a8 <yield> | |
144a: e7fa b.n 1442 <main+0x6> | |
0000144c <_ZN16usb_serial_class9availableEv>: | |
class usb_serial_class : public Stream | |
{ | |
public: | |
void begin(long) { /* TODO: call a function that tries to wait for enumeration */ }; | |
void end() { /* TODO: flush output and shut down USB port */ }; | |
virtual int available() { return usb_serial_available(); } | |
144c: b508 push {r3, lr} | |
144e: f7ff febf bl 11d0 <usb_serial_available> | |
1452: bd08 pop {r3, pc} | |
00001454 <_ZN16usb_serial_class4readEv>: | |
virtual int read() { return usb_serial_getchar(); } | |
1454: b508 push {r3, lr} | |
1456: f7ff fe73 bl 1140 <usb_serial_getchar> | |
145a: bd08 pop {r3, pc} | |
0000145c <_ZN16usb_serial_class4peekEv>: | |
virtual int peek() { return usb_serial_peekchar(); } | |
145c: b508 push {r3, lr} | |
145e: f7ff fe97 bl 1190 <usb_serial_peekchar> | |
1462: bd08 pop {r3, pc} | |
00001464 <_ZN16usb_serial_class5flushEv>: | |
virtual void flush() { usb_serial_flush_output(); } // TODO: actually wait for data to leave USB... | |
1464: b508 push {r3, lr} | |
1466: f7ff ff55 bl 1314 <usb_serial_flush_output> | |
146a: bd08 pop {r3, pc} | |
0000146c <_ZN16usb_serial_class5clearEv>: | |
virtual void clear(void) { usb_serial_flush_input(); } | |
146c: b508 push {r3, lr} | |
146e: f7ff febf bl 11f0 <usb_serial_flush_input> | |
1472: bd08 pop {r3, pc} | |
00001474 <_ZN16usb_serial_class5writeEh>: | |
virtual size_t write(uint8_t c) { return usb_serial_putchar(c); } | |
1474: b508 push {r3, lr} | |
1476: 1c08 adds r0, r1, #0 | |
1478: f7ff ff42 bl 1300 <usb_serial_putchar> | |
147c: bd08 pop {r3, pc} | |
0000147e <_ZN16usb_serial_class5writeEPKhj>: | |
virtual size_t write(const uint8_t *buffer, size_t size) { return usb_serial_write(buffer, size); } | |
147e: b508 push {r3, lr} | |
1480: 1c08 adds r0, r1, #0 | |
1482: 1c11 adds r1, r2, #0 | |
1484: f7ff fece bl 1224 <usb_serial_write> | |
1488: bd08 pop {r3, pc} | |
0000148a <_Z11serialEventv>: | |
#endif | |
#endif // F_CPU | |
void serialEvent() __attribute__((weak)); | |
void serialEvent() {} | |
148a: 4770 bx lr | |
0000148c <_GLOBAL__sub_I_Serial>: | |
class __FlashStringHelper; | |
class Print | |
{ | |
public: | |
Print() : write_error(0) {} | |
148c: 4b04 ldr r3, [pc, #16] ; (14a0 <_GLOBAL__sub_I_Serial+0x14>) | |
148e: 2200 movs r2, #0 | |
1490: 711a strb r2, [r3, #4] | |
#include "Print.h" | |
class Stream : public Print | |
{ | |
public: | |
Stream() : _timeout(1000), read_error(0) {} | |
1492: 731a strb r2, [r3, #12] | |
1494: 21fa movs r1, #250 ; 0xfa | |
#define USB_SERIAL_RTS 0x02 | |
// C++ interface | |
#ifdef __cplusplus | |
#include "Stream.h" | |
class usb_serial_class : public Stream | |
1496: 4a03 ldr r2, [pc, #12] ; (14a4 <_GLOBAL__sub_I_Serial+0x18>) | |
1498: 0089 lsls r1, r1, #2 | |
149a: 6099 str r1, [r3, #8] | |
149c: 601a str r2, [r3, #0] | |
149e: 4770 bx lr | |
14a0: 1fffff5c .word 0x1fffff5c | |
14a4: 00002eb8 .word 0x00002eb8 | |
000014a8 <yield>: | |
#include "usb_serial.h" | |
#include "usb_seremu.h" | |
void yield(void) __attribute__ ((weak)); | |
void yield(void) | |
{ | |
14a8: b510 push {r4, lr} | |
static uint8_t running=0; | |
if (running) return; // TODO: does this need to be atomic? | |
14aa: 4c10 ldr r4, [pc, #64] ; (14ec <yield+0x44>) | |
14ac: 7823 ldrb r3, [r4, #0] | |
14ae: 2b00 cmp r3, #0 | |
14b0: d11b bne.n 14ea <yield+0x42> | |
running = 1; | |
14b2: 2301 movs r3, #1 | |
14b4: 7023 strb r3, [r4, #0] | |
{ | |
public: | |
void begin(long) { /* TODO: call a function that tries to wait for enumeration */ }; | |
void end() { /* TODO: flush output and shut down USB port */ }; | |
virtual int available() { return usb_serial_available(); } | |
14b6: f7ff fe8b bl 11d0 <usb_serial_available> | |
if (Serial.available()) serialEvent(); | |
14ba: 2800 cmp r0, #0 | |
14bc: d001 beq.n 14c2 <yield+0x1a> | |
14be: f7ff ffe4 bl 148a <_Z11serialEventv> | |
virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); } | |
virtual void setRX(uint8_t pin) { serial_set_rx(pin); } | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial_set_tx(pin, opendrain); } | |
virtual bool attachRts(uint8_t pin) { return serial_set_rts(pin); } | |
virtual bool attachCts(uint8_t pin) { return serial_set_cts(pin); } | |
virtual int available(void) { return serial_available(); } | |
14c2: f000 fb1b bl 1afc <serial_available> | |
if (Serial1.available()) serialEvent1(); | |
14c6: 2800 cmp r0, #0 | |
14c8: d001 beq.n 14ce <yield+0x26> | |
14ca: f001 f9d1 bl 2870 <_Z12serialEvent1v> | |
virtual void transmitterEnable(uint8_t pin) { serial2_set_transmit_pin(pin); } | |
virtual void setRX(uint8_t pin) { serial2_set_rx(pin); } | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial2_set_tx(pin, opendrain); } | |
virtual bool attachRts(uint8_t pin) { return serial2_set_rts(pin); } | |
virtual bool attachCts(uint8_t pin) { return serial2_set_cts(pin); } | |
virtual int available(void) { return serial2_available(); } | |
14ce: f000 fd5b bl 1f88 <serial2_available> | |
if (Serial2.available()) serialEvent2(); | |
14d2: 2800 cmp r0, #0 | |
14d4: d001 beq.n 14da <yield+0x32> | |
14d6: f001 fa6b bl 29b0 <_Z12serialEvent2v> | |
virtual void transmitterEnable(uint8_t pin) { serial3_set_transmit_pin(pin); } | |
virtual void setRX(uint8_t pin) { serial3_set_rx(pin); } | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial3_set_tx(pin, opendrain); } | |
virtual bool attachRts(uint8_t pin) { return serial3_set_rts(pin); } | |
virtual bool attachCts(uint8_t pin) { return serial3_set_cts(pin); } | |
virtual int available(void) { return serial3_available(); } | |
14da: f001 f817 bl 250c <serial3_available> | |
if (Serial3.available()) serialEvent3(); | |
14de: 2800 cmp r0, #0 | |
14e0: d001 beq.n 14e6 <yield+0x3e> | |
14e2: f001 fb05 bl 2af0 <_Z12serialEvent3v> | |
if (Serial4.available()) serialEvent4(); | |
#endif | |
#ifdef HAS_KINETISK_UART4 | |
if (Serial5.available()) serialEvent5(); | |
#endif | |
running = 0; | |
14e6: 2300 movs r3, #0 | |
14e8: 7023 strb r3, [r4, #0] | |
}; | |
14ea: bd10 pop {r4, pc} | |
14ec: 1fffff6c .word 0x1fffff6c | |
000014f0 <analog_init>: | |
#if defined(__MK20DX128__) || defined(__MK20DX256__) | |
VREF_TRM = 0x60; | |
VREF_SC = 0xE1; // enable 1.2 volt ref | |
#endif | |
if (analog_config_bits == 8) { | |
14f0: 4b1b ldr r3, [pc, #108] ; (1560 <analog_init+0x70>) | |
14f2: 4a1c ldr r2, [pc, #112] ; (1564 <analog_init+0x74>) | |
14f4: 7819 ldrb r1, [r3, #0] | |
14f6: 4b1c ldr r3, [pc, #112] ; (1568 <analog_init+0x78>) | |
14f8: 2908 cmp r1, #8 | |
14fa: d101 bne.n 1500 <analog_init+0x10> | |
ADC0_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); | |
14fc: 2100 movs r1, #0 | |
14fe: e002 b.n 1506 <analog_init+0x16> | |
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_CFG1 = ADC_CFG1_8BIT + ADC_CFG1_MODE(0); | |
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); | |
#endif | |
} else if (analog_config_bits == 10) { | |
1500: 290a cmp r1, #10 | |
1502: d103 bne.n 150c <analog_init+0x1c> | |
ADC0_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; | |
1504: 2138 movs r1, #56 ; 0x38 | |
1506: 6011 str r1, [r2, #0] | |
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); | |
1508: 2213 movs r2, #19 | |
150a: e006 b.n 151a <analog_init+0x2a> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_CFG1 = ADC_CFG1_10BIT + ADC_CFG1_MODE(2) + ADC_CFG1_ADLSMP; | |
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(3); | |
#endif | |
} else if (analog_config_bits == 12) { | |
150c: 290c cmp r1, #12 | |
150e: d101 bne.n 1514 <analog_init+0x24> | |
ADC0_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; | |
1510: 2134 movs r1, #52 ; 0x34 | |
1512: e000 b.n 1516 <analog_init+0x26> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_CFG1 = ADC_CFG1_12BIT + ADC_CFG1_MODE(1) + ADC_CFG1_ADLSMP; | |
ADC1_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); | |
#endif | |
} else { | |
ADC0_CFG1 = ADC_CFG1_16BIT + ADC_CFG1_MODE(3) + ADC_CFG1_ADLSMP; | |
1514: 213c movs r1, #60 ; 0x3c | |
1516: 6011 str r1, [r2, #0] | |
ADC0_CFG2 = ADC_CFG2_MUXSEL + ADC_CFG2_ADLSTS(2); | |
1518: 2212 movs r2, #18 | |
151a: 601a str r2, [r3, #0] | |
} else { | |
ADC0_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref | |
ADC1_SC2 = ADC_SC2_REFSEL(0); // vcc/ext ref | |
} | |
#elif defined(__MKL26Z64__) | |
if (analog_reference_internal) { | |
151c: 4b13 ldr r3, [pc, #76] ; (156c <analog_init+0x7c>) | |
151e: 781a ldrb r2, [r3, #0] | |
1520: 4b13 ldr r3, [pc, #76] ; (1570 <analog_init+0x80>) | |
1522: 2a00 cmp r2, #0 | |
1524: d001 beq.n 152a <analog_init+0x3a> | |
ADC0_SC2 = ADC_SC2_REFSEL(0); // external AREF | |
1526: 2200 movs r2, #0 | |
1528: e000 b.n 152c <analog_init+0x3c> | |
} else { | |
ADC0_SC2 = ADC_SC2_REFSEL(1); // vcc | |
152a: 2201 movs r2, #1 | |
152c: 601a str r2, [r3, #0] | |
} | |
#endif | |
num = analog_num_average; | |
152e: 4b11 ldr r3, [pc, #68] ; (1574 <analog_init+0x84>) | |
1530: 781a ldrb r2, [r3, #0] | |
1532: 4b11 ldr r3, [pc, #68] ; (1578 <analog_init+0x88>) | |
if (num <= 1) { | |
1534: 2a01 cmp r2, #1 | |
1536: d801 bhi.n 153c <analog_init+0x4c> | |
ADC0_SC3 = ADC_SC3_CAL; // begin cal | |
1538: 2280 movs r2, #128 ; 0x80 | |
153a: e00c b.n 1556 <analog_init+0x66> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_SC3 = ADC_SC3_CAL; // begin cal | |
#endif | |
} else if (num <= 4) { | |
153c: 2a04 cmp r2, #4 | |
153e: d801 bhi.n 1544 <analog_init+0x54> | |
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); | |
1540: 2284 movs r2, #132 ; 0x84 | |
1542: e008 b.n 1556 <analog_init+0x66> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(0); | |
#endif | |
} else if (num <= 8) { | |
1544: 2a08 cmp r2, #8 | |
1546: d801 bhi.n 154c <analog_init+0x5c> | |
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); | |
1548: 2285 movs r2, #133 ; 0x85 | |
154a: e004 b.n 1556 <analog_init+0x66> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(1); | |
#endif | |
} else if (num <= 16) { | |
154c: 2a10 cmp r2, #16 | |
154e: d801 bhi.n 1554 <analog_init+0x64> | |
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); | |
1550: 2286 movs r2, #134 ; 0x86 | |
1552: e000 b.n 1556 <analog_init+0x66> | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(2); | |
#endif | |
} else { | |
ADC0_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); | |
1554: 2287 movs r2, #135 ; 0x87 | |
1556: 601a str r2, [r3, #0] | |
#ifdef HAS_KINETIS_ADC1 | |
ADC1_SC3 = ADC_SC3_CAL + ADC_SC3_AVGE + ADC_SC3_AVGS(3); | |
#endif | |
} | |
calibrating = 1; | |
1558: 4b08 ldr r3, [pc, #32] ; (157c <analog_init+0x8c>) | |
155a: 2201 movs r2, #1 | |
155c: 701a strb r2, [r3, #0] | |
} | |
155e: 4770 bx lr | |
1560: 1ffffd64 .word 0x1ffffd64 | |
1564: 4003b008 .word 0x4003b008 | |
1568: 4003b00c .word 0x4003b00c | |
156c: 1fffff6e .word 0x1fffff6e | |
1570: 4003b020 .word 0x4003b020 | |
1574: 1ffffd65 .word 0x1ffffd65 | |
1578: 4003b024 .word 0x4003b024 | |
157c: 1fffff6d .word 0x1fffff6d | |
00001580 <systick_default_isr>: | |
} | |
extern volatile uint32_t systick_millis_count; | |
void systick_default_isr(void) | |
{ | |
systick_millis_count++; | |
1580: 4b02 ldr r3, [pc, #8] ; (158c <systick_default_isr+0xc>) | |
1582: 681a ldr r2, [r3, #0] | |
1584: 3201 adds r2, #1 | |
1586: 601a str r2, [r3, #0] | |
} | |
1588: 4770 bx lr | |
158a: 46c0 nop ; (mov r8, r8) | |
158c: 1ffffe64 .word 0x1ffffe64 | |
00001590 <fault_isr>: | |
void _init_Teensyduino_internal_(void); | |
void __libc_init_array(void); | |
void fault_isr(void) | |
{ | |
1590: b510 push {r4, lr} | |
asm("ldr %0, [sp, #0]" : "=r" (addr) ::); | |
#endif | |
while (1) { | |
// keep polling some communication while in fault | |
// mode, so we don't completely die. | |
if (SIM_SCGC4 & SIM_SCGC4_USBOTG) usb_isr(); | |
1592: 4c0b ldr r4, [pc, #44] ; (15c0 <fault_isr+0x30>) | |
1594: 6823 ldr r3, [r4, #0] | |
1596: 035a lsls r2, r3, #13 | |
1598: d501 bpl.n 159e <fault_isr+0xe> | |
159a: f7ff fa4d bl a38 <usb_isr> | |
if (SIM_SCGC4 & SIM_SCGC4_UART0) uart0_status_isr(); | |
159e: 6823 ldr r3, [r4, #0] | |
15a0: 055a lsls r2, r3, #21 | |
15a2: d501 bpl.n 15a8 <fault_isr+0x18> | |
15a4: f000 fb1c bl 1be0 <uart0_status_isr> | |
if (SIM_SCGC4 & SIM_SCGC4_UART1) uart1_status_isr(); | |
15a8: 6823 ldr r3, [r4, #0] | |
15aa: 051a lsls r2, r3, #20 | |
15ac: d501 bpl.n 15b2 <fault_isr+0x22> | |
15ae: f000 fd5d bl 206c <uart1_status_isr> | |
if (SIM_SCGC4 & SIM_SCGC4_UART2) uart2_status_isr(); | |
15b2: 6823 ldr r3, [r4, #0] | |
15b4: 04da lsls r2, r3, #19 | |
15b6: d5ec bpl.n 1592 <fault_isr+0x2> | |
15b8: f001 f81a bl 25f0 <uart2_status_isr> | |
15bc: e7e9 b.n 1592 <fault_isr+0x2> | |
15be: 46c0 nop ; (mov r8, r8) | |
15c0: 40048034 .word 0x40048034 | |
000015c4 <unused_isr>: | |
} | |
} | |
void unused_isr(void) | |
{ | |
15c4: b508 push {r3, lr} | |
fault_isr(); | |
15c6: f7ff ffe3 bl 1590 <fault_isr> | |
15ca: ffff 4b01 vtbl.8 d20, {d15-d18}, d1 | |
000015cc <startup_early_hook>: | |
static void startup_default_early_hook(void) { | |
#if defined(KINETISK) | |
WDOG_STCTRLH = WDOG_STCTRLH_ALLOWUPDATE; | |
#elif defined(KINETISL) | |
SIM_COPC = 0; // disable the watchdog | |
15cc: 4b01 ldr r3, [pc, #4] ; (15d4 <startup_early_hook+0x8>) | |
15ce: 2200 movs r2, #0 | |
15d0: 601a str r2, [r3, #0] | |
#endif | |
} | |
15d2: 4770 bx lr | |
15d4: 40048100 .word 0x40048100 | |
000015d8 <startup_late_hook>: | |
static void startup_default_late_hook(void) {} | |
15d8: 4770 bx lr | |
15da: ffff f3ef ; <UNDEFINED> instruction: 0xfffff3ef | |
000015dc <nvic_execution_priority>: | |
int priority=256; | |
uint32_t primask, faultmask, basepri, ipsr; | |
// full algorithm in ARM DDI0403D, page B1-639 | |
// this isn't quite complete, but hopefully good enough | |
__asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::); | |
15dc: f3ef 8013 mrs r0, FAULTMASK | |
if (faultmask) return -1; | |
15e0: 2800 cmp r0, #0 | |
15e2: d121 bne.n 1628 <nvic_execution_priority+0x4c> | |
__asm__ volatile("mrs %0, primask\n" : "=r" (primask)::); | |
15e4: f3ef 8210 mrs r2, PRIMASK | |
if (primask) return 0; | |
15e8: 2a00 cmp r2, #0 | |
15ea: d11f bne.n 162c <nvic_execution_priority+0x50> | |
__asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::); | |
15ec: f3ef 8305 mrs r3, IPSR | |
if (ipsr) { | |
15f0: 2b00 cmp r3, #0 | |
15f2: d00f beq.n 1614 <nvic_execution_priority+0x38> | |
if (ipsr < 16) priority = 0; // could be non-zero | |
15f4: 1c10 adds r0, r2, #0 | |
15f6: 2b0f cmp r3, #15 | |
15f8: d90e bls.n 1618 <nvic_execution_priority+0x3c> | |
else priority = NVIC_GET_PRIORITY(ipsr - 16); | |
15fa: 1c1a adds r2, r3, #0 | |
15fc: 3a10 subs r2, #16 | |
15fe: 0892 lsrs r2, r2, #2 | |
1600: 490b ldr r1, [pc, #44] ; (1630 <nvic_execution_priority+0x54>) | |
1602: 2003 movs r0, #3 | |
1604: 0092 lsls r2, r2, #2 | |
1606: 4003 ands r3, r0 | |
1608: 1852 adds r2, r2, r1 | |
160a: 4083 lsls r3, r0 | |
160c: 6810 ldr r0, [r2, #0] | |
160e: 40d8 lsrs r0, r3 | |
1610: b2c0 uxtb r0, r0 | |
1612: e001 b.n 1618 <nvic_execution_priority+0x3c> | |
*g = 1; | |
} | |
int nvic_execution_priority(void) | |
{ | |
int priority=256; | |
1614: 2080 movs r0, #128 ; 0x80 | |
1616: 0040 lsls r0, r0, #1 | |
__asm__ volatile("mrs %0, ipsr\n" : "=r" (ipsr)::); | |
if (ipsr) { | |
if (ipsr < 16) priority = 0; // could be non-zero | |
else priority = NVIC_GET_PRIORITY(ipsr - 16); | |
} | |
__asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::); | |
1618: f3ef 8211 mrs r2, BASEPRI | |
if (basepri > 0 && basepri < priority) priority = basepri; | |
161c: 2a00 cmp r2, #0 | |
161e: d005 beq.n 162c <nvic_execution_priority+0x50> | |
1620: 4282 cmp r2, r0 | |
1622: d203 bcs.n 162c <nvic_execution_priority+0x50> | |
1624: 1c10 adds r0, r2, #0 | |
1626: e001 b.n 162c <nvic_execution_priority+0x50> | |
uint32_t primask, faultmask, basepri, ipsr; | |
// full algorithm in ARM DDI0403D, page B1-639 | |
// this isn't quite complete, but hopefully good enough | |
__asm__ volatile("mrs %0, faultmask\n" : "=r" (faultmask)::); | |
if (faultmask) return -1; | |
1628: 2001 movs r0, #1 | |
162a: 4240 negs r0, r0 | |
else priority = NVIC_GET_PRIORITY(ipsr - 16); | |
} | |
__asm__ volatile("mrs %0, basepri\n" : "=r" (basepri)::); | |
if (basepri > 0 && basepri < priority) priority = basepri; | |
return priority; | |
} | |
162c: 4770 bx lr | |
162e: 46c0 nop ; (mov r8, r8) | |
1630: e000e400 .word 0xe000e400 | |
00001634 <ultoa>: | |
#include <string.h> | |
#include <stdlib.h> | |
char * ultoa(unsigned long val, char *buf, int radix) | |
{ | |
1634: b5f8 push {r3, r4, r5, r6, r7, lr} | |
1636: 1c06 adds r6, r0, #0 | |
1638: 1c0d adds r5, r1, #0 | |
163a: 1c17 adds r7, r2, #0 | |
unsigned digit; | |
int i=0, j; | |
163c: 2400 movs r4, #0 | |
char t; | |
while (1) { | |
digit = val % radix; | |
163e: 1c30 adds r0, r6, #0 | |
1640: 1c39 adds r1, r7, #0 | |
1642: f001 fabd bl 2bc0 <__aeabi_uidivmod> | |
buf[i] = ((digit < 10) ? '0' + digit : 'A' + digit - 10); | |
1646: 2909 cmp r1, #9 | |
1648: d801 bhi.n 164e <ultoa+0x1a> | |
164a: 3130 adds r1, #48 ; 0x30 | |
164c: e000 b.n 1650 <ultoa+0x1c> | |
164e: 3137 adds r1, #55 ; 0x37 | |
1650: b2c9 uxtb r1, r1 | |
1652: 5529 strb r1, [r5, r4] | |
val /= radix; | |
1654: 1c30 adds r0, r6, #0 | |
1656: 1c39 adds r1, r7, #0 | |
1658: f001 fa6e bl 2b38 <__aeabi_uidiv> | |
165c: 1e06 subs r6, r0, #0 | |
if (val == 0) break; | |
165e: d001 beq.n 1664 <ultoa+0x30> | |
i++; | |
1660: 3401 adds r4, #1 | |
} | |
1662: e7ec b.n 163e <ultoa+0xa> | |
buf[i + 1] = 0; | |
1664: 192b adds r3, r5, r4 | |
1666: 7058 strb r0, [r3, #1] | |
for (j=0; j < i; j++, i--) { | |
1668: 1c2b adds r3, r5, #0 | |
166a: 1b5a subs r2, r3, r5 | |
166c: 42a2 cmp r2, r4 | |
166e: da06 bge.n 167e <ultoa+0x4a> | |
t = buf[j]; | |
1670: 781a ldrb r2, [r3, #0] | |
buf[j] = buf[i]; | |
1672: 5d29 ldrb r1, [r5, r4] | |
1674: 7019 strb r1, [r3, #0] | |
buf[i] = t; | |
1676: 552a strb r2, [r5, r4] | |
1678: 3301 adds r3, #1 | |
val /= radix; | |
if (val == 0) break; | |
i++; | |
} | |
buf[i + 1] = 0; | |
for (j=0; j < i; j++, i--) { | |
167a: 3c01 subs r4, #1 | |
167c: e7f5 b.n 166a <ultoa+0x36> | |
t = buf[j]; | |
buf[j] = buf[i]; | |
buf[i] = t; | |
} | |
return buf; | |
} | |
167e: 1c28 adds r0, r5, #0 | |
1680: bdf8 pop {r3, r4, r5, r6, r7, pc} | |
1682: ffff 4b26 vtbl.8 d20, {d15-d18}, d22 | |
00001684 <serial_begin>: | |
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE | |
#define C2_TX_INACTIVE C2_ENABLE | |
void serial_begin(uint32_t divisor) | |
{ | |
SIM_SCGC4 |= SIM_SCGC4_UART0; // turn on clock, TODO: use bitband | |
1684: 4b26 ldr r3, [pc, #152] ; (1720 <serial_begin+0x9c>) | |
1686: 2280 movs r2, #128 ; 0x80 | |
1688: 6819 ldr r1, [r3, #0] | |
168a: 00d2 lsls r2, r2, #3 | |
168c: 430a orrs r2, r1 | |
168e: 601a str r2, [r3, #0] | |
rx_buffer_head = 0; | |
1690: 4a24 ldr r2, [pc, #144] ; (1724 <serial_begin+0xa0>) | |
1692: 2300 movs r3, #0 | |
1694: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
1696: 4a24 ldr r2, [pc, #144] ; (1728 <serial_begin+0xa4>) | |
1698: 7013 strb r3, [r2, #0] | |
tx_buffer_head = 0; | |
169a: 4a24 ldr r2, [pc, #144] ; (172c <serial_begin+0xa8>) | |
169c: 7013 strb r3, [r2, #0] | |
tx_buffer_tail = 0; | |
169e: 4a24 ldr r2, [pc, #144] ; (1730 <serial_begin+0xac>) | |
16a0: 7013 strb r3, [r2, #0] | |
transmitting = 0; | |
16a2: 4a24 ldr r2, [pc, #144] ; (1734 <serial_begin+0xb0>) | |
16a4: 7013 strb r3, [r2, #0] | |
switch (rx_pin_num) { | |
16a6: 4b24 ldr r3, [pc, #144] ; (1738 <serial_begin+0xb4>) | |
16a8: 781b ldrb r3, [r3, #0] | |
16aa: 2b03 cmp r3, #3 | |
16ac: d009 beq.n 16c2 <serial_begin+0x3e> | |
16ae: 2b15 cmp r3, #21 | |
16b0: d004 beq.n 16bc <serial_begin+0x38> | |
16b2: 2b00 cmp r3, #0 | |
16b4: d108 bne.n 16c8 <serial_begin+0x44> | |
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
16b6: 4a21 ldr r2, [pc, #132] ; (173c <serial_begin+0xb8>) | |
16b8: 4b21 ldr r3, [pc, #132] ; (1740 <serial_begin+0xbc>) | |
16ba: e004 b.n 16c6 <serial_begin+0x42> | |
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
16bc: 4a1f ldr r2, [pc, #124] ; (173c <serial_begin+0xb8>) | |
16be: 4b21 ldr r3, [pc, #132] ; (1744 <serial_begin+0xc0>) | |
16c0: e001 b.n 16c6 <serial_begin+0x42> | |
#if defined(KINETISL) | |
case 3: CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break; | |
16c2: 4a21 ldr r2, [pc, #132] ; (1748 <serial_begin+0xc4>) | |
16c4: 4b21 ldr r3, [pc, #132] ; (174c <serial_begin+0xc8>) | |
16c6: 601a str r2, [r3, #0] | |
#endif | |
} | |
switch (tx_pin_num) { | |
16c8: 4b21 ldr r3, [pc, #132] ; (1750 <serial_begin+0xcc>) | |
16ca: 781b ldrb r3, [r3, #0] | |
16cc: 2b04 cmp r3, #4 | |
16ce: d00b beq.n 16e8 <serial_begin+0x64> | |
16d0: 2b05 cmp r3, #5 | |
16d2: d005 beq.n 16e0 <serial_begin+0x5c> | |
16d4: 2b01 cmp r3, #1 | |
16d6: d10b bne.n 16f0 <serial_begin+0x6c> | |
case 1: CORE_PIN1_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
16d8: 22d1 movs r2, #209 ; 0xd1 | |
16da: 0092 lsls r2, r2, #2 | |
16dc: 4b1d ldr r3, [pc, #116] ; (1754 <serial_begin+0xd0>) | |
16de: e006 b.n 16ee <serial_begin+0x6a> | |
case 5: CORE_PIN5_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
16e0: 22d1 movs r2, #209 ; 0xd1 | |
16e2: 0092 lsls r2, r2, #2 | |
16e4: 4b1c ldr r3, [pc, #112] ; (1758 <serial_begin+0xd4>) | |
16e6: e002 b.n 16ee <serial_begin+0x6a> | |
#if defined(KINETISL) | |
case 4: CORE_PIN4_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(2); break; | |
16e8: 2291 movs r2, #145 ; 0x91 | |
16ea: 4b1c ldr r3, [pc, #112] ; (175c <serial_begin+0xd8>) | |
16ec: 0092 lsls r2, r2, #2 | |
16ee: 601a str r2, [r3, #0] | |
#else | |
UART0_C1 = 0; | |
UART0_PFIFO = 0; | |
#endif | |
#elif defined(HAS_KINETISL_UART0) | |
UART0_BDH = (divisor >> 8) & 0x1F; | |
16f0: 4b1b ldr r3, [pc, #108] ; (1760 <serial_begin+0xdc>) | |
16f2: 04c2 lsls r2, r0, #19 | |
16f4: 0ed2 lsrs r2, r2, #27 | |
16f6: 701a strb r2, [r3, #0] | |
UART0_BDL = divisor & 0xFF; | |
16f8: b2c0 uxtb r0, r0 | |
UART0_C1 = 0; | |
16fa: 2200 movs r2, #0 | |
UART0_C1 = 0; | |
UART0_PFIFO = 0; | |
#endif | |
#elif defined(HAS_KINETISL_UART0) | |
UART0_BDH = (divisor >> 8) & 0x1F; | |
UART0_BDL = divisor & 0xFF; | |
16fc: 7058 strb r0, [r3, #1] | |
UART0_C1 = 0; | |
16fe: 709a strb r2, [r3, #2] | |
#endif | |
UART0_C2 = C2_TX_INACTIVE; | |
1700: 222c movs r2, #44 ; 0x2c | |
1702: 70da strb r2, [r3, #3] | |
NVIC_SET_PRIORITY(IRQ_UART0_STATUS, IRQ_PRIORITY); | |
1704: 4b17 ldr r3, [pc, #92] ; (1764 <serial_begin+0xe0>) | |
1706: 22ff movs r2, #255 ; 0xff | |
1708: 6819 ldr r1, [r3, #0] | |
170a: 4391 bics r1, r2 | |
170c: 1c0a adds r2, r1, #0 | |
170e: 2140 movs r1, #64 ; 0x40 | |
1710: 430a orrs r2, r1 | |
1712: 601a str r2, [r3, #0] | |
NVIC_ENABLE_IRQ(IRQ_UART0_STATUS); | |
1714: 4b14 ldr r3, [pc, #80] ; (1768 <serial_begin+0xe4>) | |
1716: 2280 movs r2, #128 ; 0x80 | |
1718: 0152 lsls r2, r2, #5 | |
171a: 601a str r2, [r3, #0] | |
} | |
171c: 4770 bx lr | |
171e: 46c0 nop ; (mov r8, r8) | |
1720: 40048034 .word 0x40048034 | |
1724: 1ffffff9 .word 0x1ffffff9 | |
1728: 1fffff75 .word 0x1fffff75 | |
172c: 20000000 .word 0x20000000 | |
1730: 1ffffffa .word 0x1ffffffa | |
1734: 1fffff74 .word 0x1fffff74 | |
1738: 1fffffb6 .word 0x1fffffb6 | |
173c: 00000313 .word 0x00000313 | |
1740: 4004a040 .word 0x4004a040 | |
1744: 4004c018 .word 0x4004c018 | |
1748: 00000213 .word 0x00000213 | |
174c: 40049004 .word 0x40049004 | |
1750: 1ffffd66 .word 0x1ffffd66 | |
1754: 4004a044 .word 0x4004a044 | |
1758: 4004c01c .word 0x4004c01c | |
175c: 40049008 .word 0x40049008 | |
1760: 4006a000 .word 0x4006a000 | |
1764: e000e40c .word 0xe000e40c | |
1768: e000e100 .word 0xe000e100 | |
0000176c <serial_format>: | |
void serial_format(uint32_t format) | |
{ | |
176c: b510 push {r4, lr} | |
uint8_t c; | |
c = UART0_C1; | |
176e: 4b12 ldr r3, [pc, #72] ; (17b8 <serial_format+0x4c>) | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
1770: 2213 movs r2, #19 | |
void serial_format(uint32_t format) | |
{ | |
uint8_t c; | |
c = UART0_C1; | |
1772: 7899 ldrb r1, [r3, #2] | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
1774: 4391 bics r1, r2 | |
1776: 2203 movs r2, #3 | |
1778: 4002 ands r2, r0 | |
177a: 430a orrs r2, r1 | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
177c: 0741 lsls r1, r0, #29 | |
177e: d501 bpl.n 1784 <serial_format+0x18> | |
1780: 2110 movs r1, #16 | |
1782: 430a orrs r2, r1 | |
UART0_C1 = c; | |
1784: 709a strb r2, [r3, #2] | |
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
1786: 220f movs r2, #15 | |
uint8_t c; | |
c = UART0_C1; | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
UART0_C1 = c; | |
1788: 490b ldr r1, [pc, #44] ; (17b8 <serial_format+0x4c>) | |
if ((format & 0x0F) == 0x04) UART0_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
178a: 4002 ands r2, r0 | |
178c: 2a04 cmp r2, #4 | |
178e: d103 bne.n 1798 <serial_format+0x2c> | |
1790: 798a ldrb r2, [r1, #6] | |
1792: 2440 movs r4, #64 ; 0x40 | |
1794: 4322 orrs r2, r4 | |
1796: 718a strb r2, [r1, #6] | |
c = UART0_S2 & ~0x10; | |
1798: 795a ldrb r2, [r3, #5] | |
179a: 2110 movs r1, #16 | |
179c: 438a bics r2, r1 | |
if (format & 0x10) c |= 0x10; // rx invert | |
179e: 4208 tst r0, r1 | |
17a0: d000 beq.n 17a4 <serial_format+0x38> | |
17a2: 430a orrs r2, r1 | |
UART0_S2 = c; | |
17a4: 715a strb r2, [r3, #5] | |
c = UART0_C3 & ~0x10; | |
17a6: 799a ldrb r2, [r3, #6] | |
17a8: 2110 movs r1, #16 | |
17aa: 438a bics r2, r1 | |
if (format & 0x20) c |= 0x10; // tx invert | |
17ac: 0684 lsls r4, r0, #26 | |
17ae: d500 bpl.n 17b2 <serial_format+0x46> | |
17b0: 430a orrs r2, r1 | |
UART0_C3 = c; | |
17b2: 719a strb r2, [r3, #6] | |
c = UART0_C4 & 0x1F; | |
if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits) | |
UART0_C4 = c; | |
use9Bits = format & 0x80; | |
#endif | |
} | |
17b4: bd10 pop {r4, pc} | |
17b6: 46c0 nop ; (mov r8, r8) | |
17b8: 4006a000 .word 0x4006a000 | |
000017bc <serial_end>: | |
void serial_end(void) | |
{ | |
17bc: b508 push {r3, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
17be: 4b12 ldr r3, [pc, #72] ; (1808 <serial_end+0x4c>) | |
17c0: 681b ldr r3, [r3, #0] | |
17c2: 055a lsls r2, r3, #21 | |
17c4: d51e bpl.n 1804 <serial_end+0x48> | |
while (transmitting) yield(); // wait for buffered data to send | |
17c6: 4b11 ldr r3, [pc, #68] ; (180c <serial_end+0x50>) | |
17c8: 781b ldrb r3, [r3, #0] | |
17ca: b2db uxtb r3, r3 | |
17cc: 2b00 cmp r3, #0 | |
17ce: d002 beq.n 17d6 <serial_end+0x1a> | |
17d0: f7ff fe6a bl 14a8 <yield> | |
17d4: e7f7 b.n 17c6 <serial_end+0xa> | |
NVIC_DISABLE_IRQ(IRQ_UART0_STATUS); | |
17d6: 4a0e ldr r2, [pc, #56] ; (1810 <serial_end+0x54>) | |
17d8: 2180 movs r1, #128 ; 0x80 | |
17da: 0149 lsls r1, r1, #5 | |
17dc: 6011 str r1, [r2, #0] | |
UART0_C2 = 0; | |
17de: 4a0d ldr r2, [pc, #52] ; (1814 <serial_end+0x58>) | |
CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
17e0: 490d ldr r1, [pc, #52] ; (1818 <serial_end+0x5c>) | |
void serial_end(void) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
while (transmitting) yield(); // wait for buffered data to send | |
NVIC_DISABLE_IRQ(IRQ_UART0_STATUS); | |
UART0_C2 = 0; | |
17e2: 70d3 strb r3, [r2, #3] | |
CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
17e4: 2204 movs r2, #4 | |
17e6: 32ff adds r2, #255 ; 0xff | |
17e8: 600a str r2, [r1, #0] | |
CORE_PIN1_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
17ea: 490c ldr r1, [pc, #48] ; (181c <serial_end+0x60>) | |
17ec: 600a str r2, [r1, #0] | |
rx_buffer_head = 0; | |
17ee: 4a0c ldr r2, [pc, #48] ; (1820 <serial_end+0x64>) | |
17f0: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
17f2: 4a0c ldr r2, [pc, #48] ; (1824 <serial_end+0x68>) | |
17f4: 7013 strb r3, [r2, #0] | |
if (rts_pin) rts_deassert(); | |
17f6: 4b0c ldr r3, [pc, #48] ; (1828 <serial_end+0x6c>) | |
17f8: 681b ldr r3, [r3, #0] | |
17fa: 2b00 cmp r3, #0 | |
17fc: d002 beq.n 1804 <serial_end+0x48> | |
17fe: 4a0b ldr r2, [pc, #44] ; (182c <serial_end+0x70>) | |
1800: 7812 ldrb r2, [r2, #0] | |
1802: 711a strb r2, [r3, #4] | |
} | |
1804: bd08 pop {r3, pc} | |
1806: 46c0 nop ; (mov r8, r8) | |
1808: 40048034 .word 0x40048034 | |
180c: 1fffff74 .word 0x1fffff74 | |
1810: e000e180 .word 0xe000e180 | |
1814: 4006a000 .word 0x4006a000 | |
1818: 4004a040 .word 0x4004a040 | |
181c: 4004a044 .word 0x4004a044 | |
1820: 1ffffff9 .word 0x1ffffff9 | |
1824: 1fffff75 .word 0x1fffff75 | |
1828: 1fffff70 .word 0x1fffff70 | |
182c: 1fffffb7 .word 0x1fffffb7 | |
00001830 <serial_set_transmit_pin>: | |
void serial_set_transmit_pin(uint8_t pin) | |
{ | |
1830: b538 push {r3, r4, r5, lr} | |
1832: 1c04 adds r4, r0, #0 | |
while (transmitting) ; | |
1834: 4b0b ldr r3, [pc, #44] ; (1864 <serial_set_transmit_pin+0x34>) | |
1836: 781d ldrb r5, [r3, #0] | |
1838: b2ed uxtb r5, r5 | |
183a: 2d00 cmp r5, #0 | |
183c: d1fa bne.n 1834 <serial_set_transmit_pin+0x4> | |
pinMode(pin, OUTPUT); | |
183e: 1c20 adds r0, r4, #0 | |
1840: 2101 movs r1, #1 | |
1842: f7fe ff51 bl 6e8 <pinMode> | |
digitalWrite(pin, LOW); | |
1846: 1c29 adds r1, r5, #0 | |
1848: 1c20 adds r0, r4, #0 | |
184a: f7fe ff2d bl 6a8 <digitalWrite> | |
transmit_pin = portOutputRegister(pin); | |
184e: 220c movs r2, #12 | |
1850: 4354 muls r4, r2 | |
1852: 4b05 ldr r3, [pc, #20] ; (1868 <serial_set_transmit_pin+0x38>) | |
1854: 4a05 ldr r2, [pc, #20] ; (186c <serial_set_transmit_pin+0x3c>) | |
1856: 58e1 ldr r1, [r4, r3] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
1858: 191c adds r4, r3, r4 | |
void serial_set_transmit_pin(uint8_t pin) | |
{ | |
while (transmitting) ; | |
pinMode(pin, OUTPUT); | |
digitalWrite(pin, LOW); | |
transmit_pin = portOutputRegister(pin); | |
185a: 6011 str r1, [r2, #0] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
185c: 4b04 ldr r3, [pc, #16] ; (1870 <serial_set_transmit_pin+0x40>) | |
185e: 7a22 ldrb r2, [r4, #8] | |
1860: 701a strb r2, [r3, #0] | |
#endif | |
} | |
1862: bd38 pop {r3, r4, r5, pc} | |
1864: 1fffff74 .word 0x1fffff74 | |
1868: 00002d64 .word 0x00002d64 | |
186c: 1ffffffc .word 0x1ffffffc | |
1870: 1ffffff8 .word 0x1ffffff8 | |
00001874 <serial_set_tx>: | |
void serial_set_tx(uint8_t pin, uint8_t opendrain) | |
{ | |
1874: b530 push {r4, r5, lr} | |
uint32_t cfg; | |
if (opendrain) pin |= 128; | |
1876: 2900 cmp r1, #0 | |
1878: d001 beq.n 187e <serial_set_tx+0xa> | |
187a: 2380 movs r3, #128 ; 0x80 | |
187c: 4318 orrs r0, r3 | |
if (pin == tx_pin_num) return; | |
187e: 4a22 ldr r2, [pc, #136] ; (1908 <serial_set_tx+0x94>) | |
1880: 7813 ldrb r3, [r2, #0] | |
1882: 1c14 adds r4, r2, #0 | |
1884: 4298 cmp r0, r3 | |
1886: d03e beq.n 1906 <serial_set_tx+0x92> | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
1888: 4a20 ldr r2, [pc, #128] ; (190c <serial_set_tx+0x98>) | |
188a: 6812 ldr r2, [r2, #0] | |
188c: 0555 lsls r5, r2, #21 | |
188e: d539 bpl.n 1904 <serial_set_tx+0x90> | |
switch (tx_pin_num & 127) { | |
1890: 227f movs r2, #127 ; 0x7f | |
1892: 4013 ands r3, r2 | |
1894: 2b04 cmp r3, #4 | |
1896: d00f beq.n 18b8 <serial_set_tx+0x44> | |
1898: d804 bhi.n 18a4 <serial_set_tx+0x30> | |
189a: 2b01 cmp r3, #1 | |
189c: d10f bne.n 18be <serial_set_tx+0x4a> | |
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17 | |
189e: 2200 movs r2, #0 | |
18a0: 4b1b ldr r3, [pc, #108] ; (1910 <serial_set_tx+0x9c>) | |
18a2: e00b b.n 18bc <serial_set_tx+0x48> | |
uint32_t cfg; | |
if (opendrain) pin |= 128; | |
if (pin == tx_pin_num) return; | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
switch (tx_pin_num & 127) { | |
18a4: 2b05 cmp r3, #5 | |
18a6: d004 beq.n 18b2 <serial_set_tx+0x3e> | |
18a8: 2b18 cmp r3, #24 | |
18aa: d108 bne.n 18be <serial_set_tx+0x4a> | |
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17 | |
case 5: CORE_PIN5_CONFIG = 0; break; // PTD7 | |
#if defined(KINETISL) | |
case 4: CORE_PIN4_CONFIG = 0; break; // PTA2 | |
case 24: CORE_PIN24_CONFIG = 0; break; // PTE20 | |
18ac: 2200 movs r2, #0 | |
18ae: 4b19 ldr r3, [pc, #100] ; (1914 <serial_set_tx+0xa0>) | |
18b0: e004 b.n 18bc <serial_set_tx+0x48> | |
if (opendrain) pin |= 128; | |
if (pin == tx_pin_num) return; | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
switch (tx_pin_num & 127) { | |
case 1: CORE_PIN1_CONFIG = 0; break; // PTB17 | |
case 5: CORE_PIN5_CONFIG = 0; break; // PTD7 | |
18b2: 2200 movs r2, #0 | |
18b4: 4b18 ldr r3, [pc, #96] ; (1918 <serial_set_tx+0xa4>) | |
18b6: e001 b.n 18bc <serial_set_tx+0x48> | |
#if defined(KINETISL) | |
case 4: CORE_PIN4_CONFIG = 0; break; // PTA2 | |
18b8: 4b18 ldr r3, [pc, #96] ; (191c <serial_set_tx+0xa8>) | |
18ba: 2200 movs r2, #0 | |
case 24: CORE_PIN24_CONFIG = 0; break; // PTE20 | |
18bc: 601a str r2, [r3, #0] | |
#endif | |
} | |
if (opendrain) { | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
18be: 2344 movs r3, #68 ; 0x44 | |
#endif | |
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |
case 26: CORE_PIN26_CONFIG = 0; break; //PTA14 | |
#endif | |
} | |
if (opendrain) { | |
18c0: 2900 cmp r1, #0 | |
18c2: d000 beq.n 18c6 <serial_set_tx+0x52> | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
18c4: 2360 movs r3, #96 ; 0x60 | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
} | |
switch (pin & 127) { | |
18c6: 227f movs r2, #127 ; 0x7f | |
18c8: 4002 ands r2, r0 | |
18ca: 2a04 cmp r2, #4 | |
18cc: d015 beq.n 18fa <serial_set_tx+0x86> | |
18ce: d806 bhi.n 18de <serial_set_tx+0x6a> | |
18d0: 2a01 cmp r2, #1 | |
18d2: d117 bne.n 1904 <serial_set_tx+0x90> | |
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
18d4: 22c0 movs r2, #192 ; 0xc0 | |
18d6: 0092 lsls r2, r2, #2 | |
18d8: 4313 orrs r3, r2 | |
18da: 4a0d ldr r2, [pc, #52] ; (1910 <serial_set_tx+0x9c>) | |
18dc: e011 b.n 1902 <serial_set_tx+0x8e> | |
if (opendrain) { | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
} | |
switch (pin & 127) { | |
18de: 2a05 cmp r2, #5 | |
18e0: d006 beq.n 18f0 <serial_set_tx+0x7c> | |
18e2: 2a18 cmp r2, #24 | |
18e4: d10e bne.n 1904 <serial_set_tx+0x90> | |
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
case 5: CORE_PIN5_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
#if defined(KINETISL) | |
case 4: CORE_PIN4_CONFIG = cfg | PORT_PCR_MUX(2); break; | |
case 24: CORE_PIN24_CONFIG = cfg | PORT_PCR_MUX(4); break; | |
18e6: 2280 movs r2, #128 ; 0x80 | |
18e8: 00d2 lsls r2, r2, #3 | |
18ea: 4313 orrs r3, r2 | |
18ec: 4a09 ldr r2, [pc, #36] ; (1914 <serial_set_tx+0xa0>) | |
18ee: e008 b.n 1902 <serial_set_tx+0x8e> | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
} | |
switch (pin & 127) { | |
case 1: CORE_PIN1_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
case 5: CORE_PIN5_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
18f0: 22c0 movs r2, #192 ; 0xc0 | |
18f2: 0092 lsls r2, r2, #2 | |
18f4: 4313 orrs r3, r2 | |
18f6: 4a08 ldr r2, [pc, #32] ; (1918 <serial_set_tx+0xa4>) | |
18f8: e003 b.n 1902 <serial_set_tx+0x8e> | |
#if defined(KINETISL) | |
case 4: CORE_PIN4_CONFIG = cfg | PORT_PCR_MUX(2); break; | |
18fa: 2280 movs r2, #128 ; 0x80 | |
18fc: 0092 lsls r2, r2, #2 | |
18fe: 4313 orrs r3, r2 | |
1900: 4a06 ldr r2, [pc, #24] ; (191c <serial_set_tx+0xa8>) | |
case 24: CORE_PIN24_CONFIG = cfg | PORT_PCR_MUX(4); break; | |
1902: 6013 str r3, [r2, #0] | |
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |
case 26: CORE_PIN26_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
#endif | |
} | |
} | |
tx_pin_num = pin; | |
1904: 7020 strb r0, [r4, #0] | |
} | |
1906: bd30 pop {r4, r5, pc} | |
1908: 1ffffd66 .word 0x1ffffd66 | |
190c: 40048034 .word 0x40048034 | |
1910: 4004a044 .word 0x4004a044 | |
1914: 4004d050 .word 0x4004d050 | |
1918: 4004c01c .word 0x4004c01c | |
191c: 40049008 .word 0x40049008 | |
00001920 <serial_set_rx>: | |
void serial_set_rx(uint8_t pin) | |
{ | |
1920: b510 push {r4, lr} | |
if (pin == rx_pin_num) return; | |
1922: 4a1a ldr r2, [pc, #104] ; (198c <serial_set_rx+0x6c>) | |
1924: 7813 ldrb r3, [r2, #0] | |
1926: 4298 cmp r0, r3 | |
1928: d02e beq.n 1988 <serial_set_rx+0x68> | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
192a: 4919 ldr r1, [pc, #100] ; (1990 <serial_set_rx+0x70>) | |
192c: 6809 ldr r1, [r1, #0] | |
192e: 054c lsls r4, r1, #21 | |
1930: d529 bpl.n 1986 <serial_set_rx+0x66> | |
switch (rx_pin_num) { | |
1932: 2b03 cmp r3, #3 | |
1934: d00f beq.n 1956 <serial_set_rx+0x36> | |
1936: d804 bhi.n 1942 <serial_set_rx+0x22> | |
1938: 2b00 cmp r3, #0 | |
193a: d10f bne.n 195c <serial_set_rx+0x3c> | |
case 0: CORE_PIN0_CONFIG = 0; break; // PTB16 | |
193c: 4915 ldr r1, [pc, #84] ; (1994 <serial_set_rx+0x74>) | |
193e: 600b str r3, [r1, #0] | |
1940: e00c b.n 195c <serial_set_rx+0x3c> | |
void serial_set_rx(uint8_t pin) | |
{ | |
if (pin == rx_pin_num) return; | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
switch (rx_pin_num) { | |
1942: 2b15 cmp r3, #21 | |
1944: d004 beq.n 1950 <serial_set_rx+0x30> | |
1946: 2b19 cmp r3, #25 | |
1948: d108 bne.n 195c <serial_set_rx+0x3c> | |
case 0: CORE_PIN0_CONFIG = 0; break; // PTB16 | |
case 21: CORE_PIN21_CONFIG = 0; break; // PTD6 | |
#if defined(KINETISL) | |
case 3: CORE_PIN3_CONFIG = 0; break; // PTA1 | |
case 25: CORE_PIN25_CONFIG = 0; break; // PTE21 | |
194a: 2100 movs r1, #0 | |
194c: 4b12 ldr r3, [pc, #72] ; (1998 <serial_set_rx+0x78>) | |
194e: e004 b.n 195a <serial_set_rx+0x3a> | |
{ | |
if (pin == rx_pin_num) return; | |
if ((SIM_SCGC4 & SIM_SCGC4_UART0)) { | |
switch (rx_pin_num) { | |
case 0: CORE_PIN0_CONFIG = 0; break; // PTB16 | |
case 21: CORE_PIN21_CONFIG = 0; break; // PTD6 | |
1950: 2100 movs r1, #0 | |
1952: 4b12 ldr r3, [pc, #72] ; (199c <serial_set_rx+0x7c>) | |
1954: e001 b.n 195a <serial_set_rx+0x3a> | |
#if defined(KINETISL) | |
case 3: CORE_PIN3_CONFIG = 0; break; // PTA1 | |
1956: 4b12 ldr r3, [pc, #72] ; (19a0 <serial_set_rx+0x80>) | |
1958: 2100 movs r1, #0 | |
case 25: CORE_PIN25_CONFIG = 0; break; // PTE21 | |
195a: 6019 str r1, [r3, #0] | |
#endif | |
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |
case 27: CORE_PIN27_CONFIG = 0; break; // PTA15 | |
#endif | |
} | |
switch (pin) { | |
195c: 2803 cmp r0, #3 | |
195e: d00f beq.n 1980 <serial_set_rx+0x60> | |
1960: d804 bhi.n 196c <serial_set_rx+0x4c> | |
1962: 2800 cmp r0, #0 | |
1964: d10f bne.n 1986 <serial_set_rx+0x66> | |
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
1966: 490f ldr r1, [pc, #60] ; (19a4 <serial_set_rx+0x84>) | |
1968: 4b0a ldr r3, [pc, #40] ; (1994 <serial_set_rx+0x74>) | |
196a: e00b b.n 1984 <serial_set_rx+0x64> | |
#endif | |
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |
case 27: CORE_PIN27_CONFIG = 0; break; // PTA15 | |
#endif | |
} | |
switch (pin) { | |
196c: 2815 cmp r0, #21 | |
196e: d004 beq.n 197a <serial_set_rx+0x5a> | |
1970: 2819 cmp r0, #25 | |
1972: d108 bne.n 1986 <serial_set_rx+0x66> | |
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
#if defined(KINETISL) | |
case 3: CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break; | |
case 25: CORE_PIN25_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(4); break; | |
1974: 490c ldr r1, [pc, #48] ; (19a8 <serial_set_rx+0x88>) | |
1976: 4b08 ldr r3, [pc, #32] ; (1998 <serial_set_rx+0x78>) | |
1978: e004 b.n 1984 <serial_set_rx+0x64> | |
case 27: CORE_PIN27_CONFIG = 0; break; // PTA15 | |
#endif | |
} | |
switch (pin) { | |
case 0: CORE_PIN0_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
case 21: CORE_PIN21_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
197a: 490a ldr r1, [pc, #40] ; (19a4 <serial_set_rx+0x84>) | |
197c: 4b07 ldr r3, [pc, #28] ; (199c <serial_set_rx+0x7c>) | |
197e: e001 b.n 1984 <serial_set_rx+0x64> | |
#if defined(KINETISL) | |
case 3: CORE_PIN3_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(2); break; | |
1980: 490a ldr r1, [pc, #40] ; (19ac <serial_set_rx+0x8c>) | |
1982: 4b07 ldr r3, [pc, #28] ; (19a0 <serial_set_rx+0x80>) | |
case 25: CORE_PIN25_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(4); break; | |
1984: 6019 str r1, [r3, #0] | |
#if defined(__MK64FX512__) || defined(__MK66FX1M0__) | |
case 27: CORE_PIN27_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
#endif | |
} | |
} | |
rx_pin_num = pin; | |
1986: 7010 strb r0, [r2, #0] | |
} | |
1988: bd10 pop {r4, pc} | |
198a: 46c0 nop ; (mov r8, r8) | |
198c: 1fffffb6 .word 0x1fffffb6 | |
1990: 40048034 .word 0x40048034 | |
1994: 4004a040 .word 0x4004a040 | |
1998: 4004d054 .word 0x4004d054 | |
199c: 4004c018 .word 0x4004c018 | |
19a0: 40049004 .word 0x40049004 | |
19a4: 00000313 .word 0x00000313 | |
19a8: 00000413 .word 0x00000413 | |
19ac: 00000213 .word 0x00000213 | |
000019b0 <serial_set_rts>: | |
int serial_set_rts(uint8_t pin) | |
{ | |
19b0: b538 push {r3, r4, r5, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0; | |
19b2: 4b0e ldr r3, [pc, #56] ; (19ec <serial_set_rts+0x3c>) | |
19b4: 681a ldr r2, [r3, #0] | |
19b6: 2300 movs r3, #0 | |
19b8: 0551 lsls r1, r2, #21 | |
19ba: d514 bpl.n 19e6 <serial_set_rts+0x36> | |
19bc: 4c0c ldr r4, [pc, #48] ; (19f0 <serial_set_rts+0x40>) | |
if (pin < CORE_NUM_DIGITAL) { | |
19be: 281a cmp r0, #26 | |
19c0: d810 bhi.n 19e4 <serial_set_rts+0x34> | |
rts_pin = portOutputRegister(pin); | |
19c2: 230c movs r3, #12 | |
19c4: 4343 muls r3, r0 | |
19c6: 4a0b ldr r2, [pc, #44] ; (19f4 <serial_set_rts+0x44>) | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
19c8: 4d0b ldr r5, [pc, #44] ; (19f8 <serial_set_rts+0x48>) | |
int serial_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
19ca: 5899 ldr r1, [r3, r2] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
19cc: 18d3 adds r3, r2, r3 | |
19ce: 7a1b ldrb r3, [r3, #8] | |
int serial_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
19d0: 6021 str r1, [r4, #0] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
19d2: 2101 movs r1, #1 | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
19d4: 702b strb r3, [r5, #0] | |
#endif | |
pinMode(pin, OUTPUT); | |
19d6: f7fe fe87 bl 6e8 <pinMode> | |
rts_assert(); | |
19da: 6823 ldr r3, [r4, #0] | |
19dc: 782a ldrb r2, [r5, #0] | |
19de: 721a strb r2, [r3, #8] | |
UART0_MODEM &= ~UART_MODEM_RXRTSE; | |
return 0; | |
} | |
UART0_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
19e0: 2301 movs r3, #1 | |
19e2: e000 b.n 19e6 <serial_set_rts+0x36> | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
rts_assert(); | |
} else { | |
rts_pin = NULL; | |
19e4: 6023 str r3, [r4, #0] | |
return 0; | |
} | |
UART0_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
} | |
19e6: 1c18 adds r0, r3, #0 | |
19e8: bd38 pop {r3, r4, r5, pc} | |
19ea: 46c0 nop ; (mov r8, r8) | |
19ec: 40048034 .word 0x40048034 | |
19f0: 1fffff70 .word 0x1fffff70 | |
19f4: 00002d64 .word 0x00002d64 | |
19f8: 1fffffb7 .word 0x1fffffb7 | |
000019fc <serial_set_cts>: | |
UART0_MODEM |= UART_MODEM_TXCTSE; | |
return 1; | |
#else | |
return 0; | |
#endif | |
} | |
19fc: 2000 movs r0, #0 | |
19fe: 4770 bx lr | |
00001a00 <serial_putchar>: | |
void serial_putchar(uint32_t c) | |
{ | |
1a00: b5f8 push {r3, r4, r5, r6, r7, lr} | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
1a02: 4b21 ldr r3, [pc, #132] ; (1a88 <serial_putchar+0x88>) | |
return 0; | |
#endif | |
} | |
void serial_putchar(uint32_t c) | |
{ | |
1a04: 1c07 adds r7, r0, #0 | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
1a06: 681b ldr r3, [r3, #0] | |
1a08: 055a lsls r2, r3, #21 | |
1a0a: d53b bpl.n 1a84 <serial_putchar+0x84> | |
if (transmit_pin) transmit_assert(); | |
1a0c: 4b1f ldr r3, [pc, #124] ; (1a8c <serial_putchar+0x8c>) | |
1a0e: 681b ldr r3, [r3, #0] | |
1a10: 2b00 cmp r3, #0 | |
1a12: d002 beq.n 1a1a <serial_putchar+0x1a> | |
1a14: 4a1e ldr r2, [pc, #120] ; (1a90 <serial_putchar+0x90>) | |
1a16: 7812 ldrb r2, [r2, #0] | |
1a18: 711a strb r2, [r3, #4] | |
head = tx_buffer_head; | |
1a1a: 4e1e ldr r6, [pc, #120] ; (1a94 <serial_putchar+0x94>) | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
1a1c: 2300 movs r3, #0 | |
{ | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
if (transmit_pin) transmit_assert(); | |
head = tx_buffer_head; | |
1a1e: 7834 ldrb r4, [r6, #0] | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
1a20: 223f movs r2, #63 ; 0x3f | |
1a22: 3401 adds r4, #1 | |
1a24: 42a2 cmp r2, r4 | |
1a26: 415b adcs r3, r3 | |
1a28: 425b negs r3, r3 | |
1a2a: 401c ands r4, r3 | |
while (tx_buffer_tail == head) { | |
1a2c: 4d1a ldr r5, [pc, #104] ; (1a98 <serial_putchar+0x98>) | |
1a2e: 782b ldrb r3, [r5, #0] | |
1a30: 42a3 cmp r3, r4 | |
1a32: d11c bne.n 1a6e <serial_putchar+0x6e> | |
int priority = nvic_execution_priority(); | |
1a34: f7ff fdd2 bl 15dc <nvic_execution_priority> | |
if (priority <= IRQ_PRIORITY) { | |
1a38: 2840 cmp r0, #64 ; 0x40 | |
1a3a: dc13 bgt.n 1a64 <serial_putchar+0x64> | |
if ((UART0_S1 & UART_S1_TDRE)) { | |
1a3c: 4a17 ldr r2, [pc, #92] ; (1a9c <serial_putchar+0x9c>) | |
1a3e: 7913 ldrb r3, [r2, #4] | |
1a40: b25b sxtb r3, r3 | |
1a42: 2b00 cmp r3, #0 | |
1a44: daf2 bge.n 1a2c <serial_putchar+0x2c> | |
uint32_t tail = tx_buffer_tail; | |
1a46: 782b ldrb r3, [r5, #0] | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
1a48: 2100 movs r1, #0 | |
1a4a: 3301 adds r3, #1 | |
1a4c: 203f movs r0, #63 ; 0x3f | |
1a4e: 4298 cmp r0, r3 | |
1a50: 4149 adcs r1, r1 | |
1a52: 4249 negs r1, r1 | |
1a54: 400b ands r3, r1 | |
n = tx_buffer[tail]; | |
1a56: 4912 ldr r1, [pc, #72] ; (1aa0 <serial_putchar+0xa0>) | |
1a58: 5cc9 ldrb r1, [r1, r3] | |
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART0_D = n; | |
tx_buffer_tail = tail; | |
1a5a: b2db uxtb r3, r3 | |
int priority = nvic_execution_priority(); | |
if (priority <= IRQ_PRIORITY) { | |
if ((UART0_S1 & UART_S1_TDRE)) { | |
uint32_t tail = tx_buffer_tail; | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
1a5c: b2c9 uxtb r1, r1 | |
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART0_D = n; | |
1a5e: 71d1 strb r1, [r2, #7] | |
tx_buffer_tail = tail; | |
1a60: 702b strb r3, [r5, #0] | |
1a62: e7e3 b.n 1a2c <serial_putchar+0x2c> | |
} | |
} else if (priority >= 256) { | |
1a64: 28ff cmp r0, #255 ; 0xff | |
1a66: dde1 ble.n 1a2c <serial_putchar+0x2c> | |
yield(); | |
1a68: f7ff fd1e bl 14a8 <yield> | |
1a6c: e7de b.n 1a2c <serial_putchar+0x2c> | |
} | |
} | |
tx_buffer[head] = c; | |
1a6e: 4b0c ldr r3, [pc, #48] ; (1aa0 <serial_putchar+0xa0>) | |
1a70: b2ff uxtb r7, r7 | |
1a72: 551f strb r7, [r3, r4] | |
transmitting = 1; | |
1a74: 4b0b ldr r3, [pc, #44] ; (1aa4 <serial_putchar+0xa4>) | |
1a76: 2201 movs r2, #1 | |
1a78: 701a strb r2, [r3, #0] | |
tx_buffer_head = head; | |
UART0_C2 = C2_TX_ACTIVE; | |
1a7a: 4b08 ldr r3, [pc, #32] ; (1a9c <serial_putchar+0x9c>) | |
yield(); | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
1a7c: b2e4 uxtb r4, r4 | |
UART0_C2 = C2_TX_ACTIVE; | |
1a7e: 22ac movs r2, #172 ; 0xac | |
yield(); | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
1a80: 7034 strb r4, [r6, #0] | |
UART0_C2 = C2_TX_ACTIVE; | |
1a82: 70da strb r2, [r3, #3] | |
} | |
1a84: bdf8 pop {r3, r4, r5, r6, r7, pc} | |
1a86: 46c0 nop ; (mov r8, r8) | |
1a88: 40048034 .word 0x40048034 | |
1a8c: 1ffffffc .word 0x1ffffffc | |
1a90: 1ffffff8 .word 0x1ffffff8 | |
1a94: 20000000 .word 0x20000000 | |
1a98: 1ffffffa .word 0x1ffffffa | |
1a9c: 4006a000 .word 0x4006a000 | |
1aa0: 1fffff76 .word 0x1fffff76 | |
1aa4: 1fffff74 .word 0x1fffff74 | |
00001aa8 <serial_write>: | |
} | |
UART0_C2 = C2_TX_ACTIVE; | |
} | |
#else | |
void serial_write(const void *buf, unsigned int count) | |
{ | |
1aa8: b538 push {r3, r4, r5, lr} | |
1aaa: 1c04 adds r4, r0, #0 | |
1aac: 1845 adds r5, r0, r1 | |
const uint8_t *p = (const uint8_t *)buf; | |
while (count-- > 0) serial_putchar(*p++); | |
1aae: 42ac cmp r4, r5 | |
1ab0: d004 beq.n 1abc <serial_write+0x14> | |
1ab2: 7820 ldrb r0, [r4, #0] | |
1ab4: f7ff ffa4 bl 1a00 <serial_putchar> | |
1ab8: 3401 adds r4, #1 | |
1aba: e7f8 b.n 1aae <serial_write+0x6> | |
} | |
1abc: bd38 pop {r3, r4, r5, pc} | |
1abe: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8 | |
00001ac0 <serial_flush>: | |
#endif | |
void serial_flush(void) | |
{ | |
1ac0: b508 push {r3, lr} | |
while (transmitting) yield(); // wait | |
1ac2: 4b04 ldr r3, [pc, #16] ; (1ad4 <serial_flush+0x14>) | |
1ac4: 781b ldrb r3, [r3, #0] | |
1ac6: 2b00 cmp r3, #0 | |
1ac8: d002 beq.n 1ad0 <serial_flush+0x10> | |
1aca: f7ff fced bl 14a8 <yield> | |
1ace: e7f8 b.n 1ac2 <serial_flush+0x2> | |
} | |
1ad0: bd08 pop {r3, pc} | |
1ad2: 46c0 nop ; (mov r8, r8) | |
1ad4: 1fffff74 .word 0x1fffff74 | |
00001ad8 <serial_write_buffer_free>: | |
int serial_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1ad8: 4b06 ldr r3, [pc, #24] ; (1af4 <serial_write_buffer_free+0x1c>) | |
tail = tx_buffer_tail; | |
1ada: 4a07 ldr r2, [pc, #28] ; (1af8 <serial_write_buffer_free+0x20>) | |
int serial_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1adc: 781b ldrb r3, [r3, #0] | |
tail = tx_buffer_tail; | |
1ade: 7810 ldrb r0, [r2, #0] | |
int serial_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1ae0: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
1ae2: b2c0 uxtb r0, r0 | |
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |
1ae4: 4283 cmp r3, r0 | |
1ae6: d301 bcc.n 1aec <serial_write_buffer_free+0x14> | |
1ae8: 303f adds r0, #63 ; 0x3f | |
1aea: e000 b.n 1aee <serial_write_buffer_free+0x16> | |
return tail - head - 1; | |
1aec: 3801 subs r0, #1 | |
1aee: 1ac0 subs r0, r0, r3 | |
} | |
1af0: 4770 bx lr | |
1af2: 46c0 nop ; (mov r8, r8) | |
1af4: 20000000 .word 0x20000000 | |
1af8: 1ffffffa .word 0x1ffffffa | |
00001afc <serial_available>: | |
int serial_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
1afc: 4b05 ldr r3, [pc, #20] ; (1b14 <serial_available+0x18>) | |
1afe: 7818 ldrb r0, [r3, #0] | |
tail = rx_buffer_tail; | |
1b00: 4b05 ldr r3, [pc, #20] ; (1b18 <serial_available+0x1c>) | |
int serial_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
1b02: b2c0 uxtb r0, r0 | |
tail = rx_buffer_tail; | |
1b04: 781b ldrb r3, [r3, #0] | |
1b06: b2db uxtb r3, r3 | |
if (head >= tail) return head - tail; | |
1b08: 4298 cmp r0, r3 | |
1b0a: d200 bcs.n 1b0e <serial_available+0x12> | |
return RX_BUFFER_SIZE + head - tail; | |
1b0c: 3040 adds r0, #64 ; 0x40 | |
1b0e: 1ac0 subs r0, r0, r3 | |
} | |
1b10: 4770 bx lr | |
1b12: 46c0 nop ; (mov r8, r8) | |
1b14: 1ffffff9 .word 0x1ffffff9 | |
1b18: 1fffff75 .word 0x1fffff75 | |
00001b1c <serial_getchar>: | |
int serial_getchar(void) | |
{ | |
1b1c: b510 push {r4, lr} | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1b1e: 4b12 ldr r3, [pc, #72] ; (1b68 <serial_getchar+0x4c>) | |
tail = rx_buffer_tail; | |
1b20: 4912 ldr r1, [pc, #72] ; (1b6c <serial_getchar+0x50>) | |
int serial_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1b22: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
1b24: 780b ldrb r3, [r1, #0] | |
int serial_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1b26: b2d2 uxtb r2, r2 | |
tail = rx_buffer_tail; | |
1b28: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
1b2a: 429a cmp r2, r3 | |
1b2c: d019 beq.n 1b62 <serial_getchar+0x46> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
1b2e: 3301 adds r3, #1 | |
1b30: 243f movs r4, #63 ; 0x3f | |
1b32: 2000 movs r0, #0 | |
1b34: 429c cmp r4, r3 | |
1b36: 4140 adcs r0, r0 | |
1b38: 4240 negs r0, r0 | |
1b3a: 4003 ands r3, r0 | |
c = rx_buffer[tail]; | |
1b3c: 480c ldr r0, [pc, #48] ; (1b70 <serial_getchar+0x54>) | |
rx_buffer_tail = tail; | |
1b3e: b2dc uxtb r4, r3 | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
1b40: 5cc0 ldrb r0, [r0, r3] | |
rx_buffer_tail = tail; | |
1b42: 700c strb r4, [r1, #0] | |
if (rts_pin) { | |
1b44: 490b ldr r1, [pc, #44] ; (1b74 <serial_getchar+0x58>) | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
1b46: b2c0 uxtb r0, r0 | |
rx_buffer_tail = tail; | |
if (rts_pin) { | |
1b48: 6809 ldr r1, [r1, #0] | |
1b4a: 2900 cmp r1, #0 | |
1b4c: d00b beq.n 1b66 <serial_getchar+0x4a> | |
int avail; | |
if (head >= tail) avail = head - tail; | |
1b4e: 429a cmp r2, r3 | |
1b50: d200 bcs.n 1b54 <serial_getchar+0x38> | |
else avail = RX_BUFFER_SIZE + head - tail; | |
1b52: 3240 adds r2, #64 ; 0x40 | |
1b54: 1ad3 subs r3, r2, r3 | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
1b56: 2b1a cmp r3, #26 | |
1b58: dc05 bgt.n 1b66 <serial_getchar+0x4a> | |
1b5a: 4b07 ldr r3, [pc, #28] ; (1b78 <serial_getchar+0x5c>) | |
1b5c: 781b ldrb r3, [r3, #0] | |
1b5e: 720b strb r3, [r1, #8] | |
1b60: e001 b.n 1b66 <serial_getchar+0x4a> | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
1b62: 2001 movs r0, #1 | |
1b64: 4240 negs r0, r0 | |
if (head >= tail) avail = head - tail; | |
else avail = RX_BUFFER_SIZE + head - tail; | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
} | |
return c; | |
} | |
1b66: bd10 pop {r4, pc} | |
1b68: 1ffffff9 .word 0x1ffffff9 | |
1b6c: 1fffff75 .word 0x1fffff75 | |
1b70: 1fffffb8 .word 0x1fffffb8 | |
1b74: 1fffff70 .word 0x1fffff70 | |
1b78: 1fffffb7 .word 0x1fffffb7 | |
00001b7c <serial_peek>: | |
int serial_peek(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
1b7c: 4b0a ldr r3, [pc, #40] ; (1ba8 <serial_peek+0x2c>) | |
1b7e: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
1b80: 4b0a ldr r3, [pc, #40] ; (1bac <serial_peek+0x30>) | |
1b82: 781b ldrb r3, [r3, #0] | |
1b84: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
1b86: 429a cmp r2, r3 | |
1b88: d00a beq.n 1ba0 <serial_peek+0x24> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
1b8a: 3301 adds r3, #1 | |
1b8c: 2200 movs r2, #0 | |
1b8e: 213f movs r1, #63 ; 0x3f | |
1b90: 4299 cmp r1, r3 | |
1b92: 4152 adcs r2, r2 | |
1b94: 4252 negs r2, r2 | |
1b96: 4013 ands r3, r2 | |
return rx_buffer[tail]; | |
1b98: 4a05 ldr r2, [pc, #20] ; (1bb0 <serial_peek+0x34>) | |
1b9a: 5cd0 ldrb r0, [r2, r3] | |
1b9c: b2c0 uxtb r0, r0 | |
1b9e: e001 b.n 1ba4 <serial_peek+0x28> | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
1ba0: 2001 movs r0, #1 | |
1ba2: 4240 negs r0, r0 | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
return rx_buffer[tail]; | |
} | |
1ba4: 4770 bx lr | |
1ba6: 46c0 nop ; (mov r8, r8) | |
1ba8: 1ffffff9 .word 0x1ffffff9 | |
1bac: 1fffff75 .word 0x1fffff75 | |
1bb0: 1fffffb8 .word 0x1fffffb8 | |
00001bb4 <serial_clear>: | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART0)) return; | |
UART0_C2 &= ~(UART_C2_RE | UART_C2_RIE | UART_C2_ILIE); | |
UART0_CFIFO = UART_CFIFO_RXFLUSH; | |
UART0_C2 |= (UART_C2_RE | UART_C2_RIE | UART_C2_ILIE); | |
#endif | |
rx_buffer_head = rx_buffer_tail; | |
1bb4: 4b06 ldr r3, [pc, #24] ; (1bd0 <serial_clear+0x1c>) | |
1bb6: 781a ldrb r2, [r3, #0] | |
1bb8: 4b06 ldr r3, [pc, #24] ; (1bd4 <serial_clear+0x20>) | |
1bba: b2d2 uxtb r2, r2 | |
1bbc: 701a strb r2, [r3, #0] | |
if (rts_pin) rts_assert(); | |
1bbe: 4b06 ldr r3, [pc, #24] ; (1bd8 <serial_clear+0x24>) | |
1bc0: 681b ldr r3, [r3, #0] | |
1bc2: 2b00 cmp r3, #0 | |
1bc4: d002 beq.n 1bcc <serial_clear+0x18> | |
1bc6: 4a05 ldr r2, [pc, #20] ; (1bdc <serial_clear+0x28>) | |
1bc8: 7812 ldrb r2, [r2, #0] | |
1bca: 721a strb r2, [r3, #8] | |
} | |
1bcc: 4770 bx lr | |
1bce: 46c0 nop ; (mov r8, r8) | |
1bd0: 1fffff75 .word 0x1fffff75 | |
1bd4: 1ffffff9 .word 0x1ffffff9 | |
1bd8: 1fffff70 .word 0x1fffff70 | |
1bdc: 1fffffb7 .word 0x1fffffb7 | |
00001be0 <uart0_status_isr>: | |
// Receive data above watermark UART_S1_RDRF | |
// LIN break detect UART_S2_LBKDIF | |
// RxD pin active edge UART_S2_RXEDGIF | |
void uart0_status_isr(void) | |
{ | |
1be0: b530 push {r4, r5, lr} | |
} while (UART0_TCFIFO < 8); | |
tx_buffer_tail = tail; | |
if (UART0_S1 & UART_S1_TDRE) UART0_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART0_S1 & UART_S1_RDRF) { | |
1be2: 4a25 ldr r2, [pc, #148] ; (1c78 <uart0_status_isr+0x98>) | |
1be4: 7913 ldrb r3, [r2, #4] | |
1be6: 0699 lsls r1, r3, #26 | |
1be8: d512 bpl.n 1c10 <uart0_status_isr+0x30> | |
n = UART0_D; | |
if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
1bea: 4924 ldr r1, [pc, #144] ; (1c7c <uart0_status_isr+0x9c>) | |
tx_buffer_tail = tail; | |
if (UART0_S1 & UART_S1_TDRE) UART0_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART0_S1 & UART_S1_RDRF) { | |
n = UART0_D; | |
1bec: 79d4 ldrb r4, [r2, #7] | |
if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
1bee: 780b ldrb r3, [r1, #0] | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
1bf0: 2000 movs r0, #0 | |
} | |
#else | |
if (UART0_S1 & UART_S1_RDRF) { | |
n = UART0_D; | |
if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
1bf2: 3301 adds r3, #1 | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
1bf4: 253f movs r5, #63 ; 0x3f | |
1bf6: 429d cmp r5, r3 | |
1bf8: 4140 adcs r0, r0 | |
1bfa: 4240 negs r0, r0 | |
1bfc: 4003 ands r3, r0 | |
if (head != rx_buffer_tail) { | |
1bfe: 4820 ldr r0, [pc, #128] ; (1c80 <uart0_status_isr+0xa0>) | |
tx_buffer_tail = tail; | |
if (UART0_S1 & UART_S1_TDRE) UART0_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART0_S1 & UART_S1_RDRF) { | |
n = UART0_D; | |
1c00: b2e4 uxtb r4, r4 | |
if (use9Bits && (UART0_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
if (head != rx_buffer_tail) { | |
1c02: 7800 ldrb r0, [r0, #0] | |
1c04: 4283 cmp r3, r0 | |
1c06: d003 beq.n 1c10 <uart0_status_isr+0x30> | |
rx_buffer[head] = n; | |
1c08: 481e ldr r0, [pc, #120] ; (1c84 <uart0_status_isr+0xa4>) | |
1c0a: 54c4 strb r4, [r0, r3] | |
rx_buffer_head = head; | |
1c0c: b2db uxtb r3, r3 | |
1c0e: 700b strb r3, [r1, #0] | |
} | |
} | |
c = UART0_C2; | |
1c10: 78d1 ldrb r1, [r2, #3] | |
1c12: 4c19 ldr r4, [pc, #100] ; (1c78 <uart0_status_isr+0x98>) | |
1c14: b2c9 uxtb r1, r1 | |
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) { | |
1c16: b24b sxtb r3, r1 | |
1c18: 2b00 cmp r3, #0 | |
1c1a: da1a bge.n 1c52 <uart0_status_isr+0x72> | |
1c1c: 7923 ldrb r3, [r4, #4] | |
1c1e: b25b sxtb r3, r3 | |
1c20: 2b00 cmp r3, #0 | |
1c22: da16 bge.n 1c52 <uart0_status_isr+0x72> | |
head = tx_buffer_head; | |
1c24: 4b18 ldr r3, [pc, #96] ; (1c88 <uart0_status_isr+0xa8>) | |
tail = tx_buffer_tail; | |
1c26: 4819 ldr r0, [pc, #100] ; (1c8c <uart0_status_isr+0xac>) | |
rx_buffer_head = head; | |
} | |
} | |
c = UART0_C2; | |
if ((c & UART_C2_TIE) && (UART0_S1 & UART_S1_TDRE)) { | |
head = tx_buffer_head; | |
1c28: 781d ldrb r5, [r3, #0] | |
tail = tx_buffer_tail; | |
1c2a: 7803 ldrb r3, [r0, #0] | |
1c2c: b2db uxtb r3, r3 | |
if (head == tail) { | |
1c2e: 429d cmp r5, r3 | |
1c30: d102 bne.n 1c38 <uart0_status_isr+0x58> | |
UART0_C2 = C2_TX_COMPLETING; | |
1c32: 236c movs r3, #108 ; 0x6c | |
1c34: 70e3 strb r3, [r4, #3] | |
1c36: e00c b.n 1c52 <uart0_status_isr+0x72> | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
1c38: 3301 adds r3, #1 | |
1c3a: 2400 movs r4, #0 | |
1c3c: 253f movs r5, #63 ; 0x3f | |
1c3e: 429d cmp r5, r3 | |
1c40: 4164 adcs r4, r4 | |
1c42: 4264 negs r4, r4 | |
1c44: 4023 ands r3, r4 | |
n = tx_buffer[tail]; | |
1c46: 4c12 ldr r4, [pc, #72] ; (1c90 <uart0_status_isr+0xb0>) | |
1c48: 5ce4 ldrb r4, [r4, r3] | |
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART0_D = n; | |
tx_buffer_tail = tail; | |
1c4a: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
if (head == tail) { | |
UART0_C2 = C2_TX_COMPLETING; | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
1c4c: b2e4 uxtb r4, r4 | |
if (use9Bits) UART0_C3 = (UART0_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART0_D = n; | |
1c4e: 71d4 strb r4, [r2, #7] | |
tx_buffer_tail = tail; | |
1c50: 7003 strb r3, [r0, #0] | |
} | |
} | |
#endif | |
if ((c & UART_C2_TCIE) && (UART0_S1 & UART_S1_TC)) { | |
1c52: 2340 movs r3, #64 ; 0x40 | |
1c54: 4219 tst r1, r3 | |
1c56: d00e beq.n 1c76 <uart0_status_isr+0x96> | |
1c58: 7911 ldrb r1, [r2, #4] | |
1c5a: 4219 tst r1, r3 | |
1c5c: d00b beq.n 1c76 <uart0_status_isr+0x96> | |
transmitting = 0; | |
1c5e: 4b0d ldr r3, [pc, #52] ; (1c94 <uart0_status_isr+0xb4>) | |
1c60: 2100 movs r1, #0 | |
1c62: 7019 strb r1, [r3, #0] | |
if (transmit_pin) transmit_deassert(); | |
1c64: 4b0c ldr r3, [pc, #48] ; (1c98 <uart0_status_isr+0xb8>) | |
1c66: 681b ldr r3, [r3, #0] | |
1c68: 428b cmp r3, r1 | |
1c6a: d002 beq.n 1c72 <uart0_status_isr+0x92> | |
1c6c: 490b ldr r1, [pc, #44] ; (1c9c <uart0_status_isr+0xbc>) | |
1c6e: 7809 ldrb r1, [r1, #0] | |
1c70: 7219 strb r1, [r3, #8] | |
UART0_C2 = C2_TX_INACTIVE; | |
1c72: 232c movs r3, #44 ; 0x2c | |
1c74: 70d3 strb r3, [r2, #3] | |
} | |
} | |
1c76: bd30 pop {r4, r5, pc} | |
1c78: 4006a000 .word 0x4006a000 | |
1c7c: 1ffffff9 .word 0x1ffffff9 | |
1c80: 1fffff75 .word 0x1fffff75 | |
1c84: 1fffffb8 .word 0x1fffffb8 | |
1c88: 20000000 .word 0x20000000 | |
1c8c: 1ffffffa .word 0x1ffffffa | |
1c90: 1fffff76 .word 0x1fffff76 | |
1c94: 1fffff74 .word 0x1fffff74 | |
1c98: 1ffffffc .word 0x1ffffffc | |
1c9c: 1ffffff8 .word 0x1ffffff8 | |
00001ca0 <serial2_begin>: | |
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE | |
#define C2_TX_INACTIVE C2_ENABLE | |
void serial2_begin(uint32_t divisor) | |
{ | |
SIM_SCGC4 |= SIM_SCGC4_UART1; // turn on clock, TODO: use bitband | |
1ca0: 4b16 ldr r3, [pc, #88] ; (1cfc <serial2_begin+0x5c>) | |
1ca2: 2280 movs r2, #128 ; 0x80 | |
1ca4: 6819 ldr r1, [r3, #0] | |
1ca6: 0112 lsls r2, r2, #4 | |
1ca8: 430a orrs r2, r1 | |
1caa: 601a str r2, [r3, #0] | |
rx_buffer_head = 0; | |
1cac: 4a14 ldr r2, [pc, #80] ; (1d00 <serial2_begin+0x60>) | |
1cae: 2300 movs r3, #0 | |
1cb0: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
1cb2: 4a14 ldr r2, [pc, #80] ; (1d04 <serial2_begin+0x64>) | |
switch (tx_pin_num) { | |
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
} | |
#elif defined(KINETISL) | |
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | |
1cb4: 4914 ldr r1, [pc, #80] ; (1d08 <serial2_begin+0x68>) | |
void serial2_begin(uint32_t divisor) | |
{ | |
SIM_SCGC4 |= SIM_SCGC4_UART1; // turn on clock, TODO: use bitband | |
rx_buffer_head = 0; | |
rx_buffer_tail = 0; | |
1cb6: 7013 strb r3, [r2, #0] | |
tx_buffer_head = 0; | |
1cb8: 4a14 ldr r2, [pc, #80] ; (1d0c <serial2_begin+0x6c>) | |
1cba: 7013 strb r3, [r2, #0] | |
tx_buffer_tail = 0; | |
1cbc: 4a14 ldr r2, [pc, #80] ; (1d10 <serial2_begin+0x70>) | |
1cbe: 7013 strb r3, [r2, #0] | |
transmitting = 0; | |
1cc0: 4a14 ldr r2, [pc, #80] ; (1d14 <serial2_begin+0x74>) | |
1cc2: 7013 strb r3, [r2, #0] | |
switch (tx_pin_num) { | |
case 10: CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
case 31: CORE_PIN31_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
} | |
#elif defined(KINETISL) | |
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | |
1cc4: 4a14 ldr r2, [pc, #80] ; (1d18 <serial2_begin+0x78>) | |
1cc6: 6011 str r1, [r2, #0] | |
CORE_PIN10_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | |
1cc8: 4a14 ldr r2, [pc, #80] ; (1d1c <serial2_begin+0x7c>) | |
1cca: 21d1 movs r1, #209 ; 0xd1 | |
1ccc: 0089 lsls r1, r1, #2 | |
1cce: 6011 str r1, [r2, #0] | |
#else | |
UART1_C1 = 0; | |
UART1_PFIFO = 0; | |
#endif | |
#elif defined(HAS_KINETISL_UART1) | |
UART1_BDH = (divisor >> 8) & 0x1F; | |
1cd0: 4a13 ldr r2, [pc, #76] ; (1d20 <serial2_begin+0x80>) | |
1cd2: 04c1 lsls r1, r0, #19 | |
1cd4: 0ec9 lsrs r1, r1, #27 | |
UART1_BDL = divisor & 0xFF; | |
1cd6: b2c0 uxtb r0, r0 | |
#else | |
UART1_C1 = 0; | |
UART1_PFIFO = 0; | |
#endif | |
#elif defined(HAS_KINETISL_UART1) | |
UART1_BDH = (divisor >> 8) & 0x1F; | |
1cd8: 7011 strb r1, [r2, #0] | |
UART1_BDL = divisor & 0xFF; | |
1cda: 7050 strb r0, [r2, #1] | |
UART1_C1 = 0; | |
1cdc: 7093 strb r3, [r2, #2] | |
#endif | |
UART1_C2 = C2_TX_INACTIVE; | |
1cde: 232c movs r3, #44 ; 0x2c | |
1ce0: 70d3 strb r3, [r2, #3] | |
NVIC_SET_PRIORITY(IRQ_UART1_STATUS, IRQ_PRIORITY); | |
1ce2: 4b10 ldr r3, [pc, #64] ; (1d24 <serial2_begin+0x84>) | |
1ce4: 4a10 ldr r2, [pc, #64] ; (1d28 <serial2_begin+0x88>) | |
1ce6: 6819 ldr r1, [r3, #0] | |
1ce8: 400a ands r2, r1 | |
1cea: 2180 movs r1, #128 ; 0x80 | |
1cec: 01c9 lsls r1, r1, #7 | |
1cee: 430a orrs r2, r1 | |
1cf0: 601a str r2, [r3, #0] | |
NVIC_ENABLE_IRQ(IRQ_UART1_STATUS); | |
1cf2: 4b0e ldr r3, [pc, #56] ; (1d2c <serial2_begin+0x8c>) | |
1cf4: 2280 movs r2, #128 ; 0x80 | |
1cf6: 0192 lsls r2, r2, #6 | |
1cf8: 601a str r2, [r3, #0] | |
} | |
1cfa: 4770 bx lr | |
1cfc: 40048034 .word 0x40048034 | |
1d00: 20000074 .word 0x20000074 | |
1d04: 20000009 .word 0x20000009 | |
1d08: 00000313 .word 0x00000313 | |
1d0c: 2000007c .word 0x2000007c | |
1d10: 20000075 .word 0x20000075 | |
1d14: 20000008 .word 0x20000008 | |
1d18: 4004b00c .word 0x4004b00c | |
1d1c: 4004b010 .word 0x4004b010 | |
1d20: 4006b000 .word 0x4006b000 | |
1d24: e000e40c .word 0xe000e40c | |
1d28: ffff00ff .word 0xffff00ff | |
1d2c: e000e100 .word 0xe000e100 | |
00001d30 <serial2_format>: | |
void serial2_format(uint32_t format) | |
{ | |
1d30: b510 push {r4, lr} | |
uint8_t c; | |
c = UART1_C1; | |
1d32: 4b12 ldr r3, [pc, #72] ; (1d7c <serial2_format+0x4c>) | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
1d34: 2213 movs r2, #19 | |
void serial2_format(uint32_t format) | |
{ | |
uint8_t c; | |
c = UART1_C1; | |
1d36: 7899 ldrb r1, [r3, #2] | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
1d38: 4391 bics r1, r2 | |
1d3a: 2203 movs r2, #3 | |
1d3c: 4002 ands r2, r0 | |
1d3e: 430a orrs r2, r1 | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
1d40: 0741 lsls r1, r0, #29 | |
1d42: d501 bpl.n 1d48 <serial2_format+0x18> | |
1d44: 2110 movs r1, #16 | |
1d46: 430a orrs r2, r1 | |
UART1_C1 = c; | |
1d48: 709a strb r2, [r3, #2] | |
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
1d4a: 220f movs r2, #15 | |
uint8_t c; | |
c = UART1_C1; | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
UART1_C1 = c; | |
1d4c: 490b ldr r1, [pc, #44] ; (1d7c <serial2_format+0x4c>) | |
if ((format & 0x0F) == 0x04) UART1_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
1d4e: 4002 ands r2, r0 | |
1d50: 2a04 cmp r2, #4 | |
1d52: d103 bne.n 1d5c <serial2_format+0x2c> | |
1d54: 798a ldrb r2, [r1, #6] | |
1d56: 2440 movs r4, #64 ; 0x40 | |
1d58: 4322 orrs r2, r4 | |
1d5a: 718a strb r2, [r1, #6] | |
c = UART1_S2 & ~0x10; | |
1d5c: 795a ldrb r2, [r3, #5] | |
1d5e: 2110 movs r1, #16 | |
1d60: 438a bics r2, r1 | |
if (format & 0x10) c |= 0x10; // rx invert | |
1d62: 4208 tst r0, r1 | |
1d64: d000 beq.n 1d68 <serial2_format+0x38> | |
1d66: 430a orrs r2, r1 | |
UART1_S2 = c; | |
1d68: 715a strb r2, [r3, #5] | |
c = UART1_C3 & ~0x10; | |
1d6a: 799a ldrb r2, [r3, #6] | |
1d6c: 2110 movs r1, #16 | |
1d6e: 438a bics r2, r1 | |
if (format & 0x20) c |= 0x10; // tx invert | |
1d70: 0684 lsls r4, r0, #26 | |
1d72: d500 bpl.n 1d76 <serial2_format+0x46> | |
1d74: 430a orrs r2, r1 | |
UART1_C3 = c; | |
1d76: 719a strb r2, [r3, #6] | |
// UART1_C1.1 = parity, 0=disable, 1=enable | |
// UART1_C1.4 = mode, 1=9bit, 0=8bit | |
// UART1_C4.5 = mode, 1=10bit, 0=8bit | |
// UART1_C3.4 = txinv, 0=normal, 1=inverted | |
// UART1_S2.4 = rxinv, 0=normal, 1=inverted | |
} | |
1d78: bd10 pop {r4, pc} | |
1d7a: 46c0 nop ; (mov r8, r8) | |
1d7c: 4006b000 .word 0x4006b000 | |
00001d80 <serial2_end>: | |
void serial2_end(void) | |
{ | |
1d80: b508 push {r3, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
1d82: 4b12 ldr r3, [pc, #72] ; (1dcc <serial2_end+0x4c>) | |
1d84: 681b ldr r3, [r3, #0] | |
1d86: 051a lsls r2, r3, #20 | |
1d88: d51e bpl.n 1dc8 <serial2_end+0x48> | |
while (transmitting) yield(); // wait for buffered data to send | |
1d8a: 4b11 ldr r3, [pc, #68] ; (1dd0 <serial2_end+0x50>) | |
1d8c: 781b ldrb r3, [r3, #0] | |
1d8e: b2db uxtb r3, r3 | |
1d90: 2b00 cmp r3, #0 | |
1d92: d002 beq.n 1d9a <serial2_end+0x1a> | |
1d94: f7ff fb88 bl 14a8 <yield> | |
1d98: e7f7 b.n 1d8a <serial2_end+0xa> | |
NVIC_DISABLE_IRQ(IRQ_UART1_STATUS); | |
1d9a: 4a0e ldr r2, [pc, #56] ; (1dd4 <serial2_end+0x54>) | |
1d9c: 2180 movs r1, #128 ; 0x80 | |
1d9e: 0189 lsls r1, r1, #6 | |
1da0: 6011 str r1, [r2, #0] | |
UART1_C2 = 0; | |
1da2: 4a0d ldr r2, [pc, #52] ; (1dd8 <serial2_end+0x58>) | |
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
1da4: 490d ldr r1, [pc, #52] ; (1ddc <serial2_end+0x5c>) | |
void serial2_end(void) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
while (transmitting) yield(); // wait for buffered data to send | |
NVIC_DISABLE_IRQ(IRQ_UART1_STATUS); | |
UART1_C2 = 0; | |
1da6: 70d3 strb r3, [r2, #3] | |
CORE_PIN9_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
1da8: 2204 movs r2, #4 | |
1daa: 32ff adds r2, #255 ; 0xff | |
1dac: 600a str r2, [r1, #0] | |
CORE_PIN10_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
1dae: 490c ldr r1, [pc, #48] ; (1de0 <serial2_end+0x60>) | |
1db0: 600a str r2, [r1, #0] | |
rx_buffer_head = 0; | |
1db2: 4a0c ldr r2, [pc, #48] ; (1de4 <serial2_end+0x64>) | |
1db4: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
1db6: 4a0c ldr r2, [pc, #48] ; (1de8 <serial2_end+0x68>) | |
1db8: 7013 strb r3, [r2, #0] | |
if (rts_pin) rts_deassert(); | |
1dba: 4b0c ldr r3, [pc, #48] ; (1dec <serial2_end+0x6c>) | |
1dbc: 681b ldr r3, [r3, #0] | |
1dbe: 2b00 cmp r3, #0 | |
1dc0: d002 beq.n 1dc8 <serial2_end+0x48> | |
1dc2: 4a0b ldr r2, [pc, #44] ; (1df0 <serial2_end+0x70>) | |
1dc4: 7812 ldrb r2, [r2, #0] | |
1dc6: 711a strb r2, [r3, #4] | |
} | |
1dc8: bd08 pop {r3, pc} | |
1dca: 46c0 nop ; (mov r8, r8) | |
1dcc: 40048034 .word 0x40048034 | |
1dd0: 20000008 .word 0x20000008 | |
1dd4: e000e180 .word 0xe000e180 | |
1dd8: 4006b000 .word 0x4006b000 | |
1ddc: 4004b00c .word 0x4004b00c | |
1de0: 4004b010 .word 0x4004b010 | |
1de4: 20000074 .word 0x20000074 | |
1de8: 20000009 .word 0x20000009 | |
1dec: 20000004 .word 0x20000004 | |
1df0: 20000032 .word 0x20000032 | |
00001df4 <serial2_set_transmit_pin>: | |
void serial2_set_transmit_pin(uint8_t pin) | |
{ | |
1df4: b538 push {r3, r4, r5, lr} | |
1df6: 1c04 adds r4, r0, #0 | |
while (transmitting) ; | |
1df8: 4b0b ldr r3, [pc, #44] ; (1e28 <serial2_set_transmit_pin+0x34>) | |
1dfa: 781d ldrb r5, [r3, #0] | |
1dfc: b2ed uxtb r5, r5 | |
1dfe: 2d00 cmp r5, #0 | |
1e00: d1fa bne.n 1df8 <serial2_set_transmit_pin+0x4> | |
pinMode(pin, OUTPUT); | |
1e02: 1c20 adds r0, r4, #0 | |
1e04: 2101 movs r1, #1 | |
1e06: f7fe fc6f bl 6e8 <pinMode> | |
digitalWrite(pin, LOW); | |
1e0a: 1c29 adds r1, r5, #0 | |
1e0c: 1c20 adds r0, r4, #0 | |
1e0e: f7fe fc4b bl 6a8 <digitalWrite> | |
transmit_pin = portOutputRegister(pin); | |
1e12: 220c movs r2, #12 | |
1e14: 4354 muls r4, r2 | |
1e16: 4b05 ldr r3, [pc, #20] ; (1e2c <serial2_set_transmit_pin+0x38>) | |
1e18: 4a05 ldr r2, [pc, #20] ; (1e30 <serial2_set_transmit_pin+0x3c>) | |
1e1a: 58e1 ldr r1, [r4, r3] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
1e1c: 191c adds r4, r3, r4 | |
void serial2_set_transmit_pin(uint8_t pin) | |
{ | |
while (transmitting) ; | |
pinMode(pin, OUTPUT); | |
digitalWrite(pin, LOW); | |
transmit_pin = portOutputRegister(pin); | |
1e1e: 6011 str r1, [r2, #0] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
1e20: 4b04 ldr r3, [pc, #16] ; (1e34 <serial2_set_transmit_pin+0x40>) | |
1e22: 7a22 ldrb r2, [r4, #8] | |
1e24: 701a strb r2, [r3, #0] | |
#endif | |
} | |
1e26: bd38 pop {r3, r4, r5, pc} | |
1e28: 20000008 .word 0x20000008 | |
1e2c: 00002d64 .word 0x00002d64 | |
1e30: 20000078 .word 0x20000078 | |
1e34: 20000073 .word 0x20000073 | |
00001e38 <serial2_set_tx>: | |
#endif | |
} | |
} | |
tx_pin_num = pin; | |
#endif | |
} | |
1e38: 4770 bx lr | |
00001e3a <serial2_set_rx>: | |
#endif | |
} | |
} | |
rx_pin_num = pin; | |
#endif | |
} | |
1e3a: 4770 bx lr | |
00001e3c <serial2_set_rts>: | |
int serial2_set_rts(uint8_t pin) | |
{ | |
1e3c: b538 push {r3, r4, r5, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; | |
1e3e: 4b0e ldr r3, [pc, #56] ; (1e78 <serial2_set_rts+0x3c>) | |
1e40: 681a ldr r2, [r3, #0] | |
1e42: 2300 movs r3, #0 | |
1e44: 0511 lsls r1, r2, #20 | |
1e46: d514 bpl.n 1e72 <serial2_set_rts+0x36> | |
1e48: 4c0c ldr r4, [pc, #48] ; (1e7c <serial2_set_rts+0x40>) | |
if (pin < CORE_NUM_DIGITAL) { | |
1e4a: 281a cmp r0, #26 | |
1e4c: d810 bhi.n 1e70 <serial2_set_rts+0x34> | |
rts_pin = portOutputRegister(pin); | |
1e4e: 230c movs r3, #12 | |
1e50: 4343 muls r3, r0 | |
1e52: 4a0b ldr r2, [pc, #44] ; (1e80 <serial2_set_rts+0x44>) | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
1e54: 4d0b ldr r5, [pc, #44] ; (1e84 <serial2_set_rts+0x48>) | |
int serial2_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
1e56: 5899 ldr r1, [r3, r2] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
1e58: 18d3 adds r3, r2, r3 | |
1e5a: 7a1b ldrb r3, [r3, #8] | |
int serial2_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
1e5c: 6021 str r1, [r4, #0] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
1e5e: 2101 movs r1, #1 | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
1e60: 702b strb r3, [r5, #0] | |
#endif | |
pinMode(pin, OUTPUT); | |
1e62: f7fe fc41 bl 6e8 <pinMode> | |
rts_assert(); | |
1e66: 6823 ldr r3, [r4, #0] | |
1e68: 782a ldrb r2, [r5, #0] | |
1e6a: 721a strb r2, [r3, #8] | |
UART1_MODEM &= ~UART_MODEM_RXRTSE; | |
return 0; | |
} | |
UART1_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
1e6c: 2301 movs r3, #1 | |
1e6e: e000 b.n 1e72 <serial2_set_rts+0x36> | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
rts_assert(); | |
} else { | |
rts_pin = NULL; | |
1e70: 6023 str r3, [r4, #0] | |
return 0; | |
} | |
UART1_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
} | |
1e72: 1c18 adds r0, r3, #0 | |
1e74: bd38 pop {r3, r4, r5, pc} | |
1e76: 46c0 nop ; (mov r8, r8) | |
1e78: 40048034 .word 0x40048034 | |
1e7c: 20000004 .word 0x20000004 | |
1e80: 00002d64 .word 0x00002d64 | |
1e84: 20000032 .word 0x20000032 | |
00001e88 <serial2_set_cts>: | |
UART1_MODEM |= UART_MODEM_TXCTSE; | |
return 1; | |
#else | |
return 0; | |
#endif | |
} | |
1e88: 2000 movs r0, #0 | |
1e8a: 4770 bx lr | |
00001e8c <serial2_putchar>: | |
void serial2_putchar(uint32_t c) | |
{ | |
1e8c: b5f8 push {r3, r4, r5, r6, r7, lr} | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
1e8e: 4b21 ldr r3, [pc, #132] ; (1f14 <serial2_putchar+0x88>) | |
return 0; | |
#endif | |
} | |
void serial2_putchar(uint32_t c) | |
{ | |
1e90: 1c07 adds r7, r0, #0 | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
1e92: 681b ldr r3, [r3, #0] | |
1e94: 051a lsls r2, r3, #20 | |
1e96: d53b bpl.n 1f10 <serial2_putchar+0x84> | |
if (transmit_pin) transmit_assert(); | |
1e98: 4b1f ldr r3, [pc, #124] ; (1f18 <serial2_putchar+0x8c>) | |
1e9a: 681b ldr r3, [r3, #0] | |
1e9c: 2b00 cmp r3, #0 | |
1e9e: d002 beq.n 1ea6 <serial2_putchar+0x1a> | |
1ea0: 4a1e ldr r2, [pc, #120] ; (1f1c <serial2_putchar+0x90>) | |
1ea2: 7812 ldrb r2, [r2, #0] | |
1ea4: 711a strb r2, [r3, #4] | |
head = tx_buffer_head; | |
1ea6: 4e1e ldr r6, [pc, #120] ; (1f20 <serial2_putchar+0x94>) | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
1ea8: 2300 movs r3, #0 | |
{ | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
if (transmit_pin) transmit_assert(); | |
head = tx_buffer_head; | |
1eaa: 7834 ldrb r4, [r6, #0] | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
1eac: 2227 movs r2, #39 ; 0x27 | |
1eae: 3401 adds r4, #1 | |
1eb0: 42a2 cmp r2, r4 | |
1eb2: 415b adcs r3, r3 | |
1eb4: 425b negs r3, r3 | |
1eb6: 401c ands r4, r3 | |
while (tx_buffer_tail == head) { | |
1eb8: 4d1a ldr r5, [pc, #104] ; (1f24 <serial2_putchar+0x98>) | |
1eba: 782b ldrb r3, [r5, #0] | |
1ebc: 42a3 cmp r3, r4 | |
1ebe: d11c bne.n 1efa <serial2_putchar+0x6e> | |
int priority = nvic_execution_priority(); | |
1ec0: f7ff fb8c bl 15dc <nvic_execution_priority> | |
if (priority <= IRQ_PRIORITY) { | |
1ec4: 2840 cmp r0, #64 ; 0x40 | |
1ec6: dc13 bgt.n 1ef0 <serial2_putchar+0x64> | |
if ((UART1_S1 & UART_S1_TDRE)) { | |
1ec8: 4a17 ldr r2, [pc, #92] ; (1f28 <serial2_putchar+0x9c>) | |
1eca: 7913 ldrb r3, [r2, #4] | |
1ecc: b25b sxtb r3, r3 | |
1ece: 2b00 cmp r3, #0 | |
1ed0: daf2 bge.n 1eb8 <serial2_putchar+0x2c> | |
uint32_t tail = tx_buffer_tail; | |
1ed2: 782b ldrb r3, [r5, #0] | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
1ed4: 2100 movs r1, #0 | |
1ed6: 3301 adds r3, #1 | |
1ed8: 2027 movs r0, #39 ; 0x27 | |
1eda: 4298 cmp r0, r3 | |
1edc: 4149 adcs r1, r1 | |
1ede: 4249 negs r1, r1 | |
1ee0: 400b ands r3, r1 | |
n = tx_buffer[tail]; | |
1ee2: 4912 ldr r1, [pc, #72] ; (1f2c <serial2_putchar+0xa0>) | |
1ee4: 5cc9 ldrb r1, [r1, r3] | |
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART1_D = n; | |
tx_buffer_tail = tail; | |
1ee6: b2db uxtb r3, r3 | |
int priority = nvic_execution_priority(); | |
if (priority <= IRQ_PRIORITY) { | |
if ((UART1_S1 & UART_S1_TDRE)) { | |
uint32_t tail = tx_buffer_tail; | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
1ee8: b2c9 uxtb r1, r1 | |
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART1_D = n; | |
1eea: 71d1 strb r1, [r2, #7] | |
tx_buffer_tail = tail; | |
1eec: 702b strb r3, [r5, #0] | |
1eee: e7e3 b.n 1eb8 <serial2_putchar+0x2c> | |
} | |
} else if (priority >= 256) { | |
1ef0: 28ff cmp r0, #255 ; 0xff | |
1ef2: dde1 ble.n 1eb8 <serial2_putchar+0x2c> | |
yield(); // wait | |
1ef4: f7ff fad8 bl 14a8 <yield> | |
1ef8: e7de b.n 1eb8 <serial2_putchar+0x2c> | |
} | |
} | |
tx_buffer[head] = c; | |
1efa: 4b0c ldr r3, [pc, #48] ; (1f2c <serial2_putchar+0xa0>) | |
1efc: b2ff uxtb r7, r7 | |
1efe: 551f strb r7, [r3, r4] | |
transmitting = 1; | |
1f00: 4b0b ldr r3, [pc, #44] ; (1f30 <serial2_putchar+0xa4>) | |
1f02: 2201 movs r2, #1 | |
1f04: 701a strb r2, [r3, #0] | |
tx_buffer_head = head; | |
UART1_C2 = C2_TX_ACTIVE; | |
1f06: 4b08 ldr r3, [pc, #32] ; (1f28 <serial2_putchar+0x9c>) | |
yield(); // wait | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
1f08: b2e4 uxtb r4, r4 | |
UART1_C2 = C2_TX_ACTIVE; | |
1f0a: 22ac movs r2, #172 ; 0xac | |
yield(); // wait | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
1f0c: 7034 strb r4, [r6, #0] | |
UART1_C2 = C2_TX_ACTIVE; | |
1f0e: 70da strb r2, [r3, #3] | |
} | |
1f10: bdf8 pop {r3, r4, r5, r6, r7, pc} | |
1f12: 46c0 nop ; (mov r8, r8) | |
1f14: 40048034 .word 0x40048034 | |
1f18: 20000078 .word 0x20000078 | |
1f1c: 20000073 .word 0x20000073 | |
1f20: 2000007c .word 0x2000007c | |
1f24: 20000075 .word 0x20000075 | |
1f28: 4006b000 .word 0x4006b000 | |
1f2c: 2000000a .word 0x2000000a | |
1f30: 20000008 .word 0x20000008 | |
00001f34 <serial2_write>: | |
} | |
UART1_C2 = C2_TX_ACTIVE; | |
} | |
#else | |
void serial2_write(const void *buf, unsigned int count) | |
{ | |
1f34: b538 push {r3, r4, r5, lr} | |
1f36: 1c04 adds r4, r0, #0 | |
1f38: 1845 adds r5, r0, r1 | |
const uint8_t *p = (const uint8_t *)buf; | |
while (count-- > 0) serial2_putchar(*p++); | |
1f3a: 42ac cmp r4, r5 | |
1f3c: d004 beq.n 1f48 <serial2_write+0x14> | |
1f3e: 7820 ldrb r0, [r4, #0] | |
1f40: f7ff ffa4 bl 1e8c <serial2_putchar> | |
1f44: 3401 adds r4, #1 | |
1f46: e7f8 b.n 1f3a <serial2_write+0x6> | |
} | |
1f48: bd38 pop {r3, r4, r5, pc} | |
1f4a: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8 | |
00001f4c <serial2_flush>: | |
#endif | |
void serial2_flush(void) | |
{ | |
1f4c: b508 push {r3, lr} | |
while (transmitting) yield(); // wait | |
1f4e: 4b04 ldr r3, [pc, #16] ; (1f60 <serial2_flush+0x14>) | |
1f50: 781b ldrb r3, [r3, #0] | |
1f52: 2b00 cmp r3, #0 | |
1f54: d002 beq.n 1f5c <serial2_flush+0x10> | |
1f56: f7ff faa7 bl 14a8 <yield> | |
1f5a: e7f8 b.n 1f4e <serial2_flush+0x2> | |
} | |
1f5c: bd08 pop {r3, pc} | |
1f5e: 46c0 nop ; (mov r8, r8) | |
1f60: 20000008 .word 0x20000008 | |
00001f64 <serial2_write_buffer_free>: | |
int serial2_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1f64: 4b06 ldr r3, [pc, #24] ; (1f80 <serial2_write_buffer_free+0x1c>) | |
tail = tx_buffer_tail; | |
1f66: 4a07 ldr r2, [pc, #28] ; (1f84 <serial2_write_buffer_free+0x20>) | |
int serial2_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1f68: 781b ldrb r3, [r3, #0] | |
tail = tx_buffer_tail; | |
1f6a: 7810 ldrb r0, [r2, #0] | |
int serial2_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
1f6c: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
1f6e: b2c0 uxtb r0, r0 | |
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |
1f70: 4283 cmp r3, r0 | |
1f72: d301 bcc.n 1f78 <serial2_write_buffer_free+0x14> | |
1f74: 3027 adds r0, #39 ; 0x27 | |
1f76: e000 b.n 1f7a <serial2_write_buffer_free+0x16> | |
return tail - head - 1; | |
1f78: 3801 subs r0, #1 | |
1f7a: 1ac0 subs r0, r0, r3 | |
} | |
1f7c: 4770 bx lr | |
1f7e: 46c0 nop ; (mov r8, r8) | |
1f80: 2000007c .word 0x2000007c | |
1f84: 20000075 .word 0x20000075 | |
00001f88 <serial2_available>: | |
int serial2_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
1f88: 4b05 ldr r3, [pc, #20] ; (1fa0 <serial2_available+0x18>) | |
1f8a: 7818 ldrb r0, [r3, #0] | |
tail = rx_buffer_tail; | |
1f8c: 4b05 ldr r3, [pc, #20] ; (1fa4 <serial2_available+0x1c>) | |
int serial2_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
1f8e: b2c0 uxtb r0, r0 | |
tail = rx_buffer_tail; | |
1f90: 781b ldrb r3, [r3, #0] | |
1f92: b2db uxtb r3, r3 | |
if (head >= tail) return head - tail; | |
1f94: 4298 cmp r0, r3 | |
1f96: d200 bcs.n 1f9a <serial2_available+0x12> | |
return RX_BUFFER_SIZE + head - tail; | |
1f98: 3040 adds r0, #64 ; 0x40 | |
1f9a: 1ac0 subs r0, r0, r3 | |
} | |
1f9c: 4770 bx lr | |
1f9e: 46c0 nop ; (mov r8, r8) | |
1fa0: 20000074 .word 0x20000074 | |
1fa4: 20000009 .word 0x20000009 | |
00001fa8 <serial2_getchar>: | |
int serial2_getchar(void) | |
{ | |
1fa8: b510 push {r4, lr} | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1faa: 4b12 ldr r3, [pc, #72] ; (1ff4 <serial2_getchar+0x4c>) | |
tail = rx_buffer_tail; | |
1fac: 4912 ldr r1, [pc, #72] ; (1ff8 <serial2_getchar+0x50>) | |
int serial2_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1fae: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
1fb0: 780b ldrb r3, [r1, #0] | |
int serial2_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
1fb2: b2d2 uxtb r2, r2 | |
tail = rx_buffer_tail; | |
1fb4: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
1fb6: 429a cmp r2, r3 | |
1fb8: d019 beq.n 1fee <serial2_getchar+0x46> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
1fba: 3301 adds r3, #1 | |
1fbc: 243f movs r4, #63 ; 0x3f | |
1fbe: 2000 movs r0, #0 | |
1fc0: 429c cmp r4, r3 | |
1fc2: 4140 adcs r0, r0 | |
1fc4: 4240 negs r0, r0 | |
1fc6: 4003 ands r3, r0 | |
c = rx_buffer[tail]; | |
1fc8: 480c ldr r0, [pc, #48] ; (1ffc <serial2_getchar+0x54>) | |
rx_buffer_tail = tail; | |
1fca: b2dc uxtb r4, r3 | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
1fcc: 5cc0 ldrb r0, [r0, r3] | |
rx_buffer_tail = tail; | |
1fce: 700c strb r4, [r1, #0] | |
if (rts_pin) { | |
1fd0: 490b ldr r1, [pc, #44] ; (2000 <serial2_getchar+0x58>) | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
1fd2: b2c0 uxtb r0, r0 | |
rx_buffer_tail = tail; | |
if (rts_pin) { | |
1fd4: 6809 ldr r1, [r1, #0] | |
1fd6: 2900 cmp r1, #0 | |
1fd8: d00b beq.n 1ff2 <serial2_getchar+0x4a> | |
int avail; | |
if (head >= tail) avail = head - tail; | |
1fda: 429a cmp r2, r3 | |
1fdc: d200 bcs.n 1fe0 <serial2_getchar+0x38> | |
else avail = RX_BUFFER_SIZE + head - tail; | |
1fde: 3240 adds r2, #64 ; 0x40 | |
1fe0: 1ad3 subs r3, r2, r3 | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
1fe2: 2b1a cmp r3, #26 | |
1fe4: dc05 bgt.n 1ff2 <serial2_getchar+0x4a> | |
1fe6: 4b07 ldr r3, [pc, #28] ; (2004 <serial2_getchar+0x5c>) | |
1fe8: 781b ldrb r3, [r3, #0] | |
1fea: 720b strb r3, [r1, #8] | |
1fec: e001 b.n 1ff2 <serial2_getchar+0x4a> | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
1fee: 2001 movs r0, #1 | |
1ff0: 4240 negs r0, r0 | |
if (head >= tail) avail = head - tail; | |
else avail = RX_BUFFER_SIZE + head - tail; | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
} | |
return c; | |
} | |
1ff2: bd10 pop {r4, pc} | |
1ff4: 20000074 .word 0x20000074 | |
1ff8: 20000009 .word 0x20000009 | |
1ffc: 20000033 .word 0x20000033 | |
2000: 20000004 .word 0x20000004 | |
2004: 20000032 .word 0x20000032 | |
00002008 <serial2_peek>: | |
int serial2_peek(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
2008: 4b0a ldr r3, [pc, #40] ; (2034 <serial2_peek+0x2c>) | |
200a: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
200c: 4b0a ldr r3, [pc, #40] ; (2038 <serial2_peek+0x30>) | |
200e: 781b ldrb r3, [r3, #0] | |
2010: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
2012: 429a cmp r2, r3 | |
2014: d00a beq.n 202c <serial2_peek+0x24> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
2016: 3301 adds r3, #1 | |
2018: 2200 movs r2, #0 | |
201a: 213f movs r1, #63 ; 0x3f | |
201c: 4299 cmp r1, r3 | |
201e: 4152 adcs r2, r2 | |
2020: 4252 negs r2, r2 | |
2022: 4013 ands r3, r2 | |
return rx_buffer[tail]; | |
2024: 4a05 ldr r2, [pc, #20] ; (203c <serial2_peek+0x34>) | |
2026: 5cd0 ldrb r0, [r2, r3] | |
2028: b2c0 uxtb r0, r0 | |
202a: e001 b.n 2030 <serial2_peek+0x28> | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
202c: 2001 movs r0, #1 | |
202e: 4240 negs r0, r0 | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
return rx_buffer[tail]; | |
} | |
2030: 4770 bx lr | |
2032: 46c0 nop ; (mov r8, r8) | |
2034: 20000074 .word 0x20000074 | |
2038: 20000009 .word 0x20000009 | |
203c: 20000033 .word 0x20000033 | |
00002040 <serial2_clear>: | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART1)) return; | |
UART1_C2 &= ~(UART_C2_RE | UART_C2_RIE | UART_C2_ILIE); | |
UART1_CFIFO = UART_CFIFO_RXFLUSH; | |
UART1_C2 |= (UART_C2_RE | UART_C2_RIE | UART_C2_ILIE); | |
#endif | |
rx_buffer_head = rx_buffer_tail; | |
2040: 4b06 ldr r3, [pc, #24] ; (205c <serial2_clear+0x1c>) | |
2042: 781a ldrb r2, [r3, #0] | |
2044: 4b06 ldr r3, [pc, #24] ; (2060 <serial2_clear+0x20>) | |
2046: b2d2 uxtb r2, r2 | |
2048: 701a strb r2, [r3, #0] | |
if (rts_pin) rts_assert(); | |
204a: 4b06 ldr r3, [pc, #24] ; (2064 <serial2_clear+0x24>) | |
204c: 681b ldr r3, [r3, #0] | |
204e: 2b00 cmp r3, #0 | |
2050: d002 beq.n 2058 <serial2_clear+0x18> | |
2052: 4a05 ldr r2, [pc, #20] ; (2068 <serial2_clear+0x28>) | |
2054: 7812 ldrb r2, [r2, #0] | |
2056: 721a strb r2, [r3, #8] | |
} | |
2058: 4770 bx lr | |
205a: 46c0 nop ; (mov r8, r8) | |
205c: 20000009 .word 0x20000009 | |
2060: 20000074 .word 0x20000074 | |
2064: 20000004 .word 0x20000004 | |
2068: 20000032 .word 0x20000032 | |
0000206c <uart1_status_isr>: | |
// Receive data above watermark UART_S1_RDRF | |
// LIN break detect UART_S2_LBKDIF | |
// RxD pin active edge UART_S2_RXEDGIF | |
void uart1_status_isr(void) | |
{ | |
206c: b530 push {r4, r5, lr} | |
} while (UART1_TCFIFO < 8); | |
tx_buffer_tail = tail; | |
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART1_S1 & UART_S1_RDRF) { | |
206e: 4a25 ldr r2, [pc, #148] ; (2104 <uart1_status_isr+0x98>) | |
2070: 7913 ldrb r3, [r2, #4] | |
2072: 0699 lsls r1, r3, #26 | |
2074: d512 bpl.n 209c <uart1_status_isr+0x30> | |
n = UART1_D; | |
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
2076: 4924 ldr r1, [pc, #144] ; (2108 <uart1_status_isr+0x9c>) | |
tx_buffer_tail = tail; | |
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART1_S1 & UART_S1_RDRF) { | |
n = UART1_D; | |
2078: 79d4 ldrb r4, [r2, #7] | |
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
207a: 780b ldrb r3, [r1, #0] | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
207c: 2000 movs r0, #0 | |
} | |
#else | |
if (UART1_S1 & UART_S1_RDRF) { | |
n = UART1_D; | |
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
207e: 3301 adds r3, #1 | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
2080: 253f movs r5, #63 ; 0x3f | |
2082: 429d cmp r5, r3 | |
2084: 4140 adcs r0, r0 | |
2086: 4240 negs r0, r0 | |
2088: 4003 ands r3, r0 | |
if (head != rx_buffer_tail) { | |
208a: 4820 ldr r0, [pc, #128] ; (210c <uart1_status_isr+0xa0>) | |
tx_buffer_tail = tail; | |
if (UART1_S1 & UART_S1_TDRE) UART1_C2 = C2_TX_COMPLETING; | |
} | |
#else | |
if (UART1_S1 & UART_S1_RDRF) { | |
n = UART1_D; | |
208c: b2e4 uxtb r4, r4 | |
if (use9Bits && (UART1_C3 & 0x80)) n |= 0x100; | |
head = rx_buffer_head + 1; | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
if (head != rx_buffer_tail) { | |
208e: 7800 ldrb r0, [r0, #0] | |
2090: 4283 cmp r3, r0 | |
2092: d003 beq.n 209c <uart1_status_isr+0x30> | |
rx_buffer[head] = n; | |
2094: 481e ldr r0, [pc, #120] ; (2110 <uart1_status_isr+0xa4>) | |
2096: 54c4 strb r4, [r0, r3] | |
rx_buffer_head = head; | |
2098: b2db uxtb r3, r3 | |
209a: 700b strb r3, [r1, #0] | |
} | |
} | |
c = UART1_C2; | |
209c: 78d1 ldrb r1, [r2, #3] | |
209e: 4c19 ldr r4, [pc, #100] ; (2104 <uart1_status_isr+0x98>) | |
20a0: b2c9 uxtb r1, r1 | |
if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) { | |
20a2: b24b sxtb r3, r1 | |
20a4: 2b00 cmp r3, #0 | |
20a6: da1a bge.n 20de <uart1_status_isr+0x72> | |
20a8: 7923 ldrb r3, [r4, #4] | |
20aa: b25b sxtb r3, r3 | |
20ac: 2b00 cmp r3, #0 | |
20ae: da16 bge.n 20de <uart1_status_isr+0x72> | |
head = tx_buffer_head; | |
20b0: 4b18 ldr r3, [pc, #96] ; (2114 <uart1_status_isr+0xa8>) | |
tail = tx_buffer_tail; | |
20b2: 4819 ldr r0, [pc, #100] ; (2118 <uart1_status_isr+0xac>) | |
rx_buffer_head = head; | |
} | |
} | |
c = UART1_C2; | |
if ((c & UART_C2_TIE) && (UART1_S1 & UART_S1_TDRE)) { | |
head = tx_buffer_head; | |
20b4: 781d ldrb r5, [r3, #0] | |
tail = tx_buffer_tail; | |
20b6: 7803 ldrb r3, [r0, #0] | |
20b8: b2db uxtb r3, r3 | |
if (head == tail) { | |
20ba: 429d cmp r5, r3 | |
20bc: d102 bne.n 20c4 <uart1_status_isr+0x58> | |
UART1_C2 = C2_TX_COMPLETING; | |
20be: 236c movs r3, #108 ; 0x6c | |
20c0: 70e3 strb r3, [r4, #3] | |
20c2: e00c b.n 20de <uart1_status_isr+0x72> | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
20c4: 3301 adds r3, #1 | |
20c6: 2400 movs r4, #0 | |
20c8: 2527 movs r5, #39 ; 0x27 | |
20ca: 429d cmp r5, r3 | |
20cc: 4164 adcs r4, r4 | |
20ce: 4264 negs r4, r4 | |
20d0: 4023 ands r3, r4 | |
n = tx_buffer[tail]; | |
20d2: 4c12 ldr r4, [pc, #72] ; (211c <uart1_status_isr+0xb0>) | |
20d4: 5ce4 ldrb r4, [r4, r3] | |
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART1_D = n; | |
tx_buffer_tail = tail; | |
20d6: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
if (head == tail) { | |
UART1_C2 = C2_TX_COMPLETING; | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
20d8: b2e4 uxtb r4, r4 | |
if (use9Bits) UART1_C3 = (UART1_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART1_D = n; | |
20da: 71d4 strb r4, [r2, #7] | |
tx_buffer_tail = tail; | |
20dc: 7003 strb r3, [r0, #0] | |
} | |
} | |
#endif | |
if ((c & UART_C2_TCIE) && (UART1_S1 & UART_S1_TC)) { | |
20de: 2340 movs r3, #64 ; 0x40 | |
20e0: 4219 tst r1, r3 | |
20e2: d00e beq.n 2102 <uart1_status_isr+0x96> | |
20e4: 7911 ldrb r1, [r2, #4] | |
20e6: 4219 tst r1, r3 | |
20e8: d00b beq.n 2102 <uart1_status_isr+0x96> | |
transmitting = 0; | |
20ea: 4b0d ldr r3, [pc, #52] ; (2120 <uart1_status_isr+0xb4>) | |
20ec: 2100 movs r1, #0 | |
20ee: 7019 strb r1, [r3, #0] | |
if (transmit_pin) transmit_deassert(); | |
20f0: 4b0c ldr r3, [pc, #48] ; (2124 <uart1_status_isr+0xb8>) | |
20f2: 681b ldr r3, [r3, #0] | |
20f4: 428b cmp r3, r1 | |
20f6: d002 beq.n 20fe <uart1_status_isr+0x92> | |
20f8: 490b ldr r1, [pc, #44] ; (2128 <uart1_status_isr+0xbc>) | |
20fa: 7809 ldrb r1, [r1, #0] | |
20fc: 7219 strb r1, [r3, #8] | |
UART1_C2 = C2_TX_INACTIVE; | |
20fe: 232c movs r3, #44 ; 0x2c | |
2100: 70d3 strb r3, [r2, #3] | |
} | |
} | |
2102: bd30 pop {r4, r5, pc} | |
2104: 4006b000 .word 0x4006b000 | |
2108: 20000074 .word 0x20000074 | |
210c: 20000009 .word 0x20000009 | |
2110: 20000033 .word 0x20000033 | |
2114: 2000007c .word 0x2000007c | |
2118: 20000075 .word 0x20000075 | |
211c: 2000000a .word 0x2000000a | |
2120: 20000008 .word 0x20000008 | |
2124: 20000078 .word 0x20000078 | |
2128: 20000073 .word 0x20000073 | |
0000212c <serial3_begin>: | |
#define C2_TX_COMPLETING C2_ENABLE | UART_C2_TCIE | |
#define C2_TX_INACTIVE C2_ENABLE | |
void serial3_begin(uint32_t divisor) | |
{ | |
SIM_SCGC4 |= SIM_SCGC4_UART2; // turn on clock, TODO: use bitband | |
212c: 4b20 ldr r3, [pc, #128] ; (21b0 <serial3_begin+0x84>) | |
212e: 2280 movs r2, #128 ; 0x80 | |
2130: 6819 ldr r1, [r3, #0] | |
2132: 0152 lsls r2, r2, #5 | |
2134: 430a orrs r2, r1 | |
2136: 601a str r2, [r3, #0] | |
rx_buffer_head = 0; | |
2138: 4a1e ldr r2, [pc, #120] ; (21b4 <serial3_begin+0x88>) | |
213a: 2300 movs r3, #0 | |
213c: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
213e: 4a1e ldr r2, [pc, #120] ; (21b8 <serial3_begin+0x8c>) | |
2140: 7013 strb r3, [r2, #0] | |
tx_buffer_head = 0; | |
2142: 4a1e ldr r2, [pc, #120] ; (21bc <serial3_begin+0x90>) | |
2144: 7013 strb r3, [r2, #0] | |
tx_buffer_tail = 0; | |
2146: 4a1e ldr r2, [pc, #120] ; (21c0 <serial3_begin+0x94>) | |
2148: 7013 strb r3, [r2, #0] | |
transmitting = 0; | |
214a: 4a1e ldr r2, [pc, #120] ; (21c4 <serial3_begin+0x98>) | |
214c: 7013 strb r3, [r2, #0] | |
#if defined(KINETISK) | |
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); | |
CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); | |
#elif defined(KINETISL) | |
switch (rx_pin_num) { | |
214e: 4b1e ldr r3, [pc, #120] ; (21c8 <serial3_begin+0x9c>) | |
2150: 781b ldrb r3, [r3, #0] | |
2152: 2b06 cmp r3, #6 | |
2154: d004 beq.n 2160 <serial3_begin+0x34> | |
2156: 2b07 cmp r3, #7 | |
2158: d105 bne.n 2166 <serial3_begin+0x3a> | |
case 7: CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
215a: 4a1c ldr r2, [pc, #112] ; (21cc <serial3_begin+0xa0>) | |
215c: 4b1c ldr r3, [pc, #112] ; (21d0 <serial3_begin+0xa4>) | |
215e: e001 b.n 2164 <serial3_begin+0x38> | |
case 6: CORE_PIN6_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
2160: 4a1a ldr r2, [pc, #104] ; (21cc <serial3_begin+0xa0>) | |
2162: 4b1c ldr r3, [pc, #112] ; (21d4 <serial3_begin+0xa8>) | |
2164: 601a str r2, [r3, #0] | |
} | |
switch (tx_pin_num) { | |
2166: 4b1c ldr r3, [pc, #112] ; (21d8 <serial3_begin+0xac>) | |
2168: 781b ldrb r3, [r3, #0] | |
216a: 2b08 cmp r3, #8 | |
216c: d005 beq.n 217a <serial3_begin+0x4e> | |
216e: 2b14 cmp r3, #20 | |
2170: d107 bne.n 2182 <serial3_begin+0x56> | |
case 8: CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
case 20: CORE_PIN20_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
2172: 22d1 movs r2, #209 ; 0xd1 | |
2174: 0092 lsls r2, r2, #2 | |
2176: 4b19 ldr r3, [pc, #100] ; (21dc <serial3_begin+0xb0>) | |
2178: e002 b.n 2180 <serial3_begin+0x54> | |
switch (rx_pin_num) { | |
case 7: CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
case 6: CORE_PIN6_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
} | |
switch (tx_pin_num) { | |
case 8: CORE_PIN8_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
217a: 22d1 movs r2, #209 ; 0xd1 | |
217c: 4b18 ldr r3, [pc, #96] ; (21e0 <serial3_begin+0xb4>) | |
217e: 0092 lsls r2, r2, #2 | |
case 20: CORE_PIN20_CONFIG = PORT_PCR_DSE | PORT_PCR_SRE | PORT_PCR_MUX(3); break; | |
2180: 601a str r2, [r3, #0] | |
UART2_BDL = (divisor >> 5) & 0xFF; | |
UART2_C4 = divisor & 0x1F; | |
UART2_C1 = 0; | |
UART2_PFIFO = 0; | |
#elif defined(HAS_KINETISL_UART2) | |
UART2_BDH = (divisor >> 8) & 0x1F; | |
2182: 4b18 ldr r3, [pc, #96] ; (21e4 <serial3_begin+0xb8>) | |
2184: 04c2 lsls r2, r0, #19 | |
2186: 0ed2 lsrs r2, r2, #27 | |
2188: 701a strb r2, [r3, #0] | |
UART2_BDL = divisor & 0xFF; | |
218a: b2c0 uxtb r0, r0 | |
UART2_C1 = 0; | |
218c: 2200 movs r2, #0 | |
UART2_C4 = divisor & 0x1F; | |
UART2_C1 = 0; | |
UART2_PFIFO = 0; | |
#elif defined(HAS_KINETISL_UART2) | |
UART2_BDH = (divisor >> 8) & 0x1F; | |
UART2_BDL = divisor & 0xFF; | |
218e: 7058 strb r0, [r3, #1] | |
UART2_C1 = 0; | |
2190: 709a strb r2, [r3, #2] | |
#endif | |
UART2_C2 = C2_TX_INACTIVE; | |
2192: 222c movs r2, #44 ; 0x2c | |
2194: 70da strb r2, [r3, #3] | |
NVIC_SET_PRIORITY(IRQ_UART2_STATUS, IRQ_PRIORITY); | |
2196: 4b14 ldr r3, [pc, #80] ; (21e8 <serial3_begin+0xbc>) | |
2198: 4a14 ldr r2, [pc, #80] ; (21ec <serial3_begin+0xc0>) | |
219a: 6819 ldr r1, [r3, #0] | |
219c: 400a ands r2, r1 | |
219e: 2180 movs r1, #128 ; 0x80 | |
21a0: 03c9 lsls r1, r1, #15 | |
21a2: 430a orrs r2, r1 | |
21a4: 601a str r2, [r3, #0] | |
NVIC_ENABLE_IRQ(IRQ_UART2_STATUS); | |
21a6: 4b12 ldr r3, [pc, #72] ; (21f0 <serial3_begin+0xc4>) | |
21a8: 2280 movs r2, #128 ; 0x80 | |
21aa: 01d2 lsls r2, r2, #7 | |
21ac: 601a str r2, [r3, #0] | |
} | |
21ae: 4770 bx lr | |
21b0: 40048034 .word 0x40048034 | |
21b4: 200000f0 .word 0x200000f0 | |
21b8: 20000085 .word 0x20000085 | |
21bc: 200000f8 .word 0x200000f8 | |
21c0: 200000f1 .word 0x200000f1 | |
21c4: 20000084 .word 0x20000084 | |
21c8: 1ffffd67 .word 0x1ffffd67 | |
21cc: 00000313 .word 0x00000313 | |
21d0: 4004c008 .word 0x4004c008 | |
21d4: 4004c010 .word 0x4004c010 | |
21d8: 1ffffd68 .word 0x1ffffd68 | |
21dc: 4004c014 .word 0x4004c014 | |
21e0: 4004c00c .word 0x4004c00c | |
21e4: 4006c000 .word 0x4006c000 | |
21e8: e000e40c .word 0xe000e40c | |
21ec: ff00ffff .word 0xff00ffff | |
21f0: e000e100 .word 0xe000e100 | |
000021f4 <serial3_format>: | |
void serial3_format(uint32_t format) | |
{ | |
21f4: b510 push {r4, lr} | |
uint8_t c; | |
c = UART2_C1; | |
21f6: 4b12 ldr r3, [pc, #72] ; (2240 <serial3_format+0x4c>) | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
21f8: 2213 movs r2, #19 | |
void serial3_format(uint32_t format) | |
{ | |
uint8_t c; | |
c = UART2_C1; | |
21fa: 7899 ldrb r1, [r3, #2] | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
21fc: 4391 bics r1, r2 | |
21fe: 2203 movs r2, #3 | |
2200: 4002 ands r2, r0 | |
2202: 430a orrs r2, r1 | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
2204: 0741 lsls r1, r0, #29 | |
2206: d501 bpl.n 220c <serial3_format+0x18> | |
2208: 2110 movs r1, #16 | |
220a: 430a orrs r2, r1 | |
UART2_C1 = c; | |
220c: 709a strb r2, [r3, #2] | |
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
220e: 220f movs r2, #15 | |
uint8_t c; | |
c = UART2_C1; | |
c = (c & ~0x13) | (format & 0x03); // configure parity | |
if (format & 0x04) c |= 0x10; // 9 bits (might include parity) | |
UART2_C1 = c; | |
2210: 490b ldr r1, [pc, #44] ; (2240 <serial3_format+0x4c>) | |
if ((format & 0x0F) == 0x04) UART2_C3 |= 0x40; // 8N2 is 9 bit with 9th bit always 1 | |
2212: 4002 ands r2, r0 | |
2214: 2a04 cmp r2, #4 | |
2216: d103 bne.n 2220 <serial3_format+0x2c> | |
2218: 798a ldrb r2, [r1, #6] | |
221a: 2440 movs r4, #64 ; 0x40 | |
221c: 4322 orrs r2, r4 | |
221e: 718a strb r2, [r1, #6] | |
c = UART2_S2 & ~0x10; | |
2220: 795a ldrb r2, [r3, #5] | |
2222: 2110 movs r1, #16 | |
2224: 438a bics r2, r1 | |
if (format & 0x10) c |= 0x10; // rx invert | |
2226: 4208 tst r0, r1 | |
2228: d000 beq.n 222c <serial3_format+0x38> | |
222a: 430a orrs r2, r1 | |
UART2_S2 = c; | |
222c: 715a strb r2, [r3, #5] | |
c = UART2_C3 & ~0x10; | |
222e: 799a ldrb r2, [r3, #6] | |
2230: 2110 movs r1, #16 | |
2232: 438a bics r2, r1 | |
if (format & 0x20) c |= 0x10; // tx invert | |
2234: 0684 lsls r4, r0, #26 | |
2236: d500 bpl.n 223a <serial3_format+0x46> | |
2238: 430a orrs r2, r1 | |
UART2_C3 = c; | |
223a: 719a strb r2, [r3, #6] | |
c = UART2_C4 & 0x1F; | |
if (format & 0x08) c |= 0x20; // 9 bit mode with parity (requires 10 bits) | |
UART2_C4 = c; | |
use9Bits = format & 0x80; | |
#endif | |
} | |
223c: bd10 pop {r4, pc} | |
223e: 46c0 nop ; (mov r8, r8) | |
2240: 4006c000 .word 0x4006c000 | |
00002244 <serial3_end>: | |
void serial3_end(void) | |
{ | |
2244: b508 push {r3, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |
2246: 4b12 ldr r3, [pc, #72] ; (2290 <serial3_end+0x4c>) | |
2248: 681b ldr r3, [r3, #0] | |
224a: 04da lsls r2, r3, #19 | |
224c: d51e bpl.n 228c <serial3_end+0x48> | |
while (transmitting) yield(); // wait for buffered data to send | |
224e: 4b11 ldr r3, [pc, #68] ; (2294 <serial3_end+0x50>) | |
2250: 781b ldrb r3, [r3, #0] | |
2252: b2db uxtb r3, r3 | |
2254: 2b00 cmp r3, #0 | |
2256: d002 beq.n 225e <serial3_end+0x1a> | |
2258: f7ff f926 bl 14a8 <yield> | |
225c: e7f7 b.n 224e <serial3_end+0xa> | |
NVIC_DISABLE_IRQ(IRQ_UART2_STATUS); | |
225e: 4a0e ldr r2, [pc, #56] ; (2298 <serial3_end+0x54>) | |
2260: 2180 movs r1, #128 ; 0x80 | |
2262: 01c9 lsls r1, r1, #7 | |
2264: 6011 str r1, [r2, #0] | |
UART2_C2 = 0; | |
2266: 4a0d ldr r2, [pc, #52] ; (229c <serial3_end+0x58>) | |
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
2268: 490d ldr r1, [pc, #52] ; (22a0 <serial3_end+0x5c>) | |
void serial3_end(void) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |
while (transmitting) yield(); // wait for buffered data to send | |
NVIC_DISABLE_IRQ(IRQ_UART2_STATUS); | |
UART2_C2 = 0; | |
226a: 70d3 strb r3, [r2, #3] | |
CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
226c: 2204 movs r2, #4 | |
226e: 32ff adds r2, #255 ; 0xff | |
2270: 600a str r2, [r1, #0] | |
CORE_PIN8_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_MUX(1); | |
2272: 490c ldr r1, [pc, #48] ; (22a4 <serial3_end+0x60>) | |
2274: 600a str r2, [r1, #0] | |
rx_buffer_head = 0; | |
2276: 4a0c ldr r2, [pc, #48] ; (22a8 <serial3_end+0x64>) | |
2278: 7013 strb r3, [r2, #0] | |
rx_buffer_tail = 0; | |
227a: 4a0c ldr r2, [pc, #48] ; (22ac <serial3_end+0x68>) | |
227c: 7013 strb r3, [r2, #0] | |
if (rts_pin) rts_deassert(); | |
227e: 4b0c ldr r3, [pc, #48] ; (22b0 <serial3_end+0x6c>) | |
2280: 681b ldr r3, [r3, #0] | |
2282: 2b00 cmp r3, #0 | |
2284: d002 beq.n 228c <serial3_end+0x48> | |
2286: 4a0b ldr r2, [pc, #44] ; (22b4 <serial3_end+0x70>) | |
2288: 7812 ldrb r2, [r2, #0] | |
228a: 711a strb r2, [r3, #4] | |
} | |
228c: bd08 pop {r3, pc} | |
228e: 46c0 nop ; (mov r8, r8) | |
2290: 40048034 .word 0x40048034 | |
2294: 20000084 .word 0x20000084 | |
2298: e000e180 .word 0xe000e180 | |
229c: 4006c000 .word 0x4006c000 | |
22a0: 4004c008 .word 0x4004c008 | |
22a4: 4004c00c .word 0x4004c00c | |
22a8: 200000f0 .word 0x200000f0 | |
22ac: 20000085 .word 0x20000085 | |
22b0: 20000080 .word 0x20000080 | |
22b4: 200000ae .word 0x200000ae | |
000022b8 <serial3_set_transmit_pin>: | |
void serial3_set_transmit_pin(uint8_t pin) | |
{ | |
22b8: b538 push {r3, r4, r5, lr} | |
22ba: 1c04 adds r4, r0, #0 | |
while (transmitting) ; | |
22bc: 4b0b ldr r3, [pc, #44] ; (22ec <serial3_set_transmit_pin+0x34>) | |
22be: 781d ldrb r5, [r3, #0] | |
22c0: b2ed uxtb r5, r5 | |
22c2: 2d00 cmp r5, #0 | |
22c4: d1fa bne.n 22bc <serial3_set_transmit_pin+0x4> | |
pinMode(pin, OUTPUT); | |
22c6: 1c20 adds r0, r4, #0 | |
22c8: 2101 movs r1, #1 | |
22ca: f7fe fa0d bl 6e8 <pinMode> | |
digitalWrite(pin, LOW); | |
22ce: 1c29 adds r1, r5, #0 | |
22d0: 1c20 adds r0, r4, #0 | |
22d2: f7fe f9e9 bl 6a8 <digitalWrite> | |
transmit_pin = portOutputRegister(pin); | |
22d6: 220c movs r2, #12 | |
22d8: 4354 muls r4, r2 | |
22da: 4b05 ldr r3, [pc, #20] ; (22f0 <serial3_set_transmit_pin+0x38>) | |
22dc: 4a05 ldr r2, [pc, #20] ; (22f4 <serial3_set_transmit_pin+0x3c>) | |
22de: 58e1 ldr r1, [r4, r3] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
22e0: 191c adds r4, r3, r4 | |
void serial3_set_transmit_pin(uint8_t pin) | |
{ | |
while (transmitting) ; | |
pinMode(pin, OUTPUT); | |
digitalWrite(pin, LOW); | |
transmit_pin = portOutputRegister(pin); | |
22e2: 6011 str r1, [r2, #0] | |
#if defined(KINETISL) | |
transmit_mask = digitalPinToBitMask(pin); | |
22e4: 4b04 ldr r3, [pc, #16] ; (22f8 <serial3_set_transmit_pin+0x40>) | |
22e6: 7a22 ldrb r2, [r4, #8] | |
22e8: 701a strb r2, [r3, #0] | |
#endif | |
} | |
22ea: bd38 pop {r3, r4, r5, pc} | |
22ec: 20000084 .word 0x20000084 | |
22f0: 00002d64 .word 0x00002d64 | |
22f4: 200000f4 .word 0x200000f4 | |
22f8: 200000ef .word 0x200000ef | |
000022fc <serial3_set_tx>: | |
void serial3_set_tx(uint8_t pin, uint8_t opendrain) | |
{ | |
22fc: b530 push {r4, r5, lr} | |
uint32_t cfg; | |
if (opendrain) pin |= 128; | |
22fe: 2900 cmp r1, #0 | |
2300: d001 beq.n 2306 <serial3_set_tx+0xa> | |
2302: 2380 movs r3, #128 ; 0x80 | |
2304: 4318 orrs r0, r3 | |
if (pin == tx_pin_num) return; | |
2306: 4a15 ldr r2, [pc, #84] ; (235c <serial3_set_tx+0x60>) | |
2308: 7813 ldrb r3, [r2, #0] | |
230a: 1c14 adds r4, r2, #0 | |
230c: 4298 cmp r0, r3 | |
230e: d024 beq.n 235a <serial3_set_tx+0x5e> | |
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) { | |
2310: 4a13 ldr r2, [pc, #76] ; (2360 <serial3_set_tx+0x64>) | |
2312: 6812 ldr r2, [r2, #0] | |
2314: 04d5 lsls r5, r2, #19 | |
2316: d51f bpl.n 2358 <serial3_set_tx+0x5c> | |
switch (tx_pin_num & 127) { | |
2318: 227f movs r2, #127 ; 0x7f | |
231a: 4013 ands r3, r2 | |
231c: 2b08 cmp r3, #8 | |
231e: d004 beq.n 232a <serial3_set_tx+0x2e> | |
2320: 2b14 cmp r3, #20 | |
2322: d105 bne.n 2330 <serial3_set_tx+0x34> | |
case 8: CORE_PIN8_CONFIG = 0; break; // PTD3 | |
#if defined(KINETISL) | |
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5 | |
2324: 2200 movs r2, #0 | |
2326: 4b0f ldr r3, [pc, #60] ; (2364 <serial3_set_tx+0x68>) | |
2328: e001 b.n 232e <serial3_set_tx+0x32> | |
if (opendrain) pin |= 128; | |
if (pin == tx_pin_num) return; | |
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) { | |
switch (tx_pin_num & 127) { | |
case 8: CORE_PIN8_CONFIG = 0; break; // PTD3 | |
232a: 4b0f ldr r3, [pc, #60] ; (2368 <serial3_set_tx+0x6c>) | |
232c: 2200 movs r2, #0 | |
#if defined(KINETISL) | |
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5 | |
232e: 601a str r2, [r3, #0] | |
#endif | |
} | |
if (opendrain) { | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
2330: 2344 movs r3, #68 ; 0x44 | |
case 8: CORE_PIN8_CONFIG = 0; break; // PTD3 | |
#if defined(KINETISL) | |
case 20: CORE_PIN20_CONFIG = 0; break; // PTD5 | |
#endif | |
} | |
if (opendrain) { | |
2332: 2900 cmp r1, #0 | |
2334: d000 beq.n 2338 <serial3_set_tx+0x3c> | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
2336: 2360 movs r3, #96 ; 0x60 | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
} | |
switch (pin & 127) { | |
2338: 227f movs r2, #127 ; 0x7f | |
233a: 4002 ands r2, r0 | |
233c: 2a08 cmp r2, #8 | |
233e: d006 beq.n 234e <serial3_set_tx+0x52> | |
2340: 2a14 cmp r2, #20 | |
2342: d109 bne.n 2358 <serial3_set_tx+0x5c> | |
case 8: CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
#if defined(KINETISL) | |
case 20: CORE_PIN20_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
2344: 22c0 movs r2, #192 ; 0xc0 | |
2346: 0092 lsls r2, r2, #2 | |
2348: 4313 orrs r3, r2 | |
234a: 4a06 ldr r2, [pc, #24] ; (2364 <serial3_set_tx+0x68>) | |
234c: e003 b.n 2356 <serial3_set_tx+0x5a> | |
cfg = PORT_PCR_DSE | PORT_PCR_ODE; | |
} else { | |
cfg = PORT_PCR_DSE | PORT_PCR_SRE; | |
} | |
switch (pin & 127) { | |
case 8: CORE_PIN8_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
234e: 22c0 movs r2, #192 ; 0xc0 | |
2350: 0092 lsls r2, r2, #2 | |
2352: 4313 orrs r3, r2 | |
2354: 4a04 ldr r2, [pc, #16] ; (2368 <serial3_set_tx+0x6c>) | |
#if defined(KINETISL) | |
case 20: CORE_PIN20_CONFIG = cfg | PORT_PCR_MUX(3); break; | |
2356: 6013 str r3, [r2, #0] | |
#endif | |
} | |
} | |
tx_pin_num = pin; | |
2358: 7020 strb r0, [r4, #0] | |
} | |
235a: bd30 pop {r4, r5, pc} | |
235c: 1ffffd68 .word 0x1ffffd68 | |
2360: 40048034 .word 0x40048034 | |
2364: 4004c014 .word 0x4004c014 | |
2368: 4004c00c .word 0x4004c00c | |
0000236c <serial3_set_rx>: | |
void serial3_set_rx(uint8_t pin) | |
{ | |
236c: b510 push {r4, lr} | |
#if defined(KINETISL) | |
if (pin == rx_pin_num) return; | |
236e: 4a0f ldr r2, [pc, #60] ; (23ac <serial3_set_rx+0x40>) | |
2370: 7813 ldrb r3, [r2, #0] | |
2372: 4298 cmp r0, r3 | |
2374: d018 beq.n 23a8 <serial3_set_rx+0x3c> | |
if ((SIM_SCGC4 & SIM_SCGC4_UART2)) { | |
2376: 490e ldr r1, [pc, #56] ; (23b0 <serial3_set_rx+0x44>) | |
2378: 6809 ldr r1, [r1, #0] | |
237a: 04cc lsls r4, r1, #19 | |
237c: d513 bpl.n 23a6 <serial3_set_rx+0x3a> | |
switch (rx_pin_num) { | |
237e: 2b06 cmp r3, #6 | |
2380: d004 beq.n 238c <serial3_set_rx+0x20> | |
2382: 2b07 cmp r3, #7 | |
2384: d105 bne.n 2392 <serial3_set_rx+0x26> | |
case 7: CORE_PIN7_CONFIG = 0; break; // PTD2 | |
2386: 2100 movs r1, #0 | |
2388: 4b0a ldr r3, [pc, #40] ; (23b4 <serial3_set_rx+0x48>) | |
238a: e001 b.n 2390 <serial3_set_rx+0x24> | |
case 6: CORE_PIN6_CONFIG = 0; break; // PTD4 | |
238c: 4b0a ldr r3, [pc, #40] ; (23b8 <serial3_set_rx+0x4c>) | |
238e: 2100 movs r1, #0 | |
2390: 6019 str r1, [r3, #0] | |
} | |
switch (pin) { | |
2392: 2806 cmp r0, #6 | |
2394: d004 beq.n 23a0 <serial3_set_rx+0x34> | |
2396: 2807 cmp r0, #7 | |
2398: d105 bne.n 23a6 <serial3_set_rx+0x3a> | |
case 7: CORE_PIN7_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
239a: 4908 ldr r1, [pc, #32] ; (23bc <serial3_set_rx+0x50>) | |
239c: 4b05 ldr r3, [pc, #20] ; (23b4 <serial3_set_rx+0x48>) | |
239e: e001 b.n 23a4 <serial3_set_rx+0x38> | |
case 6: CORE_PIN6_CONFIG = PORT_PCR_PE | PORT_PCR_PS | PORT_PCR_PFE | PORT_PCR_MUX(3); break; | |
23a0: 4906 ldr r1, [pc, #24] ; (23bc <serial3_set_rx+0x50>) | |
23a2: 4b05 ldr r3, [pc, #20] ; (23b8 <serial3_set_rx+0x4c>) | |
23a4: 6019 str r1, [r3, #0] | |
} | |
} | |
rx_pin_num = pin; | |
23a6: 7010 strb r0, [r2, #0] | |
#endif | |
} | |
23a8: bd10 pop {r4, pc} | |
23aa: 46c0 nop ; (mov r8, r8) | |
23ac: 1ffffd67 .word 0x1ffffd67 | |
23b0: 40048034 .word 0x40048034 | |
23b4: 4004c008 .word 0x4004c008 | |
23b8: 4004c010 .word 0x4004c010 | |
23bc: 00000313 .word 0x00000313 | |
000023c0 <serial3_set_rts>: | |
int serial3_set_rts(uint8_t pin) | |
{ | |
23c0: b538 push {r3, r4, r5, lr} | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0; | |
23c2: 4b0e ldr r3, [pc, #56] ; (23fc <serial3_set_rts+0x3c>) | |
23c4: 681a ldr r2, [r3, #0] | |
23c6: 2300 movs r3, #0 | |
23c8: 04d1 lsls r1, r2, #19 | |
23ca: d514 bpl.n 23f6 <serial3_set_rts+0x36> | |
23cc: 4c0c ldr r4, [pc, #48] ; (2400 <serial3_set_rts+0x40>) | |
if (pin < CORE_NUM_DIGITAL) { | |
23ce: 281a cmp r0, #26 | |
23d0: d810 bhi.n 23f4 <serial3_set_rts+0x34> | |
rts_pin = portOutputRegister(pin); | |
23d2: 230c movs r3, #12 | |
23d4: 4343 muls r3, r0 | |
23d6: 4a0b ldr r2, [pc, #44] ; (2404 <serial3_set_rts+0x44>) | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
23d8: 4d0b ldr r5, [pc, #44] ; (2408 <serial3_set_rts+0x48>) | |
int serial3_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
23da: 5899 ldr r1, [r3, r2] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
23dc: 18d3 adds r3, r2, r3 | |
23de: 7a1b ldrb r3, [r3, #8] | |
int serial3_set_rts(uint8_t pin) | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
23e0: 6021 str r1, [r4, #0] | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
23e2: 2101 movs r1, #1 | |
{ | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return 0; | |
if (pin < CORE_NUM_DIGITAL) { | |
rts_pin = portOutputRegister(pin); | |
#if defined(KINETISL) | |
rts_mask = digitalPinToBitMask(pin); | |
23e4: 702b strb r3, [r5, #0] | |
#endif | |
pinMode(pin, OUTPUT); | |
23e6: f7fe f97f bl 6e8 <pinMode> | |
rts_assert(); | |
23ea: 6823 ldr r3, [r4, #0] | |
23ec: 782a ldrb r2, [r5, #0] | |
23ee: 721a strb r2, [r3, #8] | |
UART2_MODEM &= ~UART_MODEM_RXRTSE; | |
return 0; | |
} | |
UART2_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
23f0: 2301 movs r3, #1 | |
23f2: e000 b.n 23f6 <serial3_set_rts+0x36> | |
rts_mask = digitalPinToBitMask(pin); | |
#endif | |
pinMode(pin, OUTPUT); | |
rts_assert(); | |
} else { | |
rts_pin = NULL; | |
23f4: 6023 str r3, [r4, #0] | |
return 0; | |
} | |
UART2_MODEM |= UART_MODEM_RXRTSE; | |
*/ | |
return 1; | |
} | |
23f6: 1c18 adds r0, r3, #0 | |
23f8: bd38 pop {r3, r4, r5, pc} | |
23fa: 46c0 nop ; (mov r8, r8) | |
23fc: 40048034 .word 0x40048034 | |
2400: 20000080 .word 0x20000080 | |
2404: 00002d64 .word 0x00002d64 | |
2408: 200000ae .word 0x200000ae | |
0000240c <serial3_set_cts>: | |
UART2_MODEM |= UART_MODEM_TXCTSE; | |
return 1; | |
#else | |
return 0; | |
#endif | |
} | |
240c: 2000 movs r0, #0 | |
240e: 4770 bx lr | |
00002410 <serial3_putchar>: | |
void serial3_putchar(uint32_t c) | |
{ | |
2410: b5f8 push {r3, r4, r5, r6, r7, lr} | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |
2412: 4b21 ldr r3, [pc, #132] ; (2498 <serial3_putchar+0x88>) | |
return 0; | |
#endif | |
} | |
void serial3_putchar(uint32_t c) | |
{ | |
2414: 1c07 adds r7, r0, #0 | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |
2416: 681b ldr r3, [r3, #0] | |
2418: 04da lsls r2, r3, #19 | |
241a: d53b bpl.n 2494 <serial3_putchar+0x84> | |
if (transmit_pin) transmit_assert(); | |
241c: 4b1f ldr r3, [pc, #124] ; (249c <serial3_putchar+0x8c>) | |
241e: 681b ldr r3, [r3, #0] | |
2420: 2b00 cmp r3, #0 | |
2422: d002 beq.n 242a <serial3_putchar+0x1a> | |
2424: 4a1e ldr r2, [pc, #120] ; (24a0 <serial3_putchar+0x90>) | |
2426: 7812 ldrb r2, [r2, #0] | |
2428: 711a strb r2, [r3, #4] | |
head = tx_buffer_head; | |
242a: 4e1e ldr r6, [pc, #120] ; (24a4 <serial3_putchar+0x94>) | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
242c: 2300 movs r3, #0 | |
{ | |
uint32_t head, n; | |
if (!(SIM_SCGC4 & SIM_SCGC4_UART2)) return; | |
if (transmit_pin) transmit_assert(); | |
head = tx_buffer_head; | |
242e: 7834 ldrb r4, [r6, #0] | |
if (++head >= TX_BUFFER_SIZE) head = 0; | |
2430: 2227 movs r2, #39 ; 0x27 | |
2432: 3401 adds r4, #1 | |
2434: 42a2 cmp r2, r4 | |
2436: 415b adcs r3, r3 | |
2438: 425b negs r3, r3 | |
243a: 401c ands r4, r3 | |
while (tx_buffer_tail == head) { | |
243c: 4d1a ldr r5, [pc, #104] ; (24a8 <serial3_putchar+0x98>) | |
243e: 782b ldrb r3, [r5, #0] | |
2440: 42a3 cmp r3, r4 | |
2442: d11c bne.n 247e <serial3_putchar+0x6e> | |
int priority = nvic_execution_priority(); | |
2444: f7ff f8ca bl 15dc <nvic_execution_priority> | |
if (priority <= IRQ_PRIORITY) { | |
2448: 2840 cmp r0, #64 ; 0x40 | |
244a: dc13 bgt.n 2474 <serial3_putchar+0x64> | |
if ((UART2_S1 & UART_S1_TDRE)) { | |
244c: 4a17 ldr r2, [pc, #92] ; (24ac <serial3_putchar+0x9c>) | |
244e: 7913 ldrb r3, [r2, #4] | |
2450: b25b sxtb r3, r3 | |
2452: 2b00 cmp r3, #0 | |
2454: daf2 bge.n 243c <serial3_putchar+0x2c> | |
uint32_t tail = tx_buffer_tail; | |
2456: 782b ldrb r3, [r5, #0] | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
2458: 2100 movs r1, #0 | |
245a: 3301 adds r3, #1 | |
245c: 2027 movs r0, #39 ; 0x27 | |
245e: 4298 cmp r0, r3 | |
2460: 4149 adcs r1, r1 | |
2462: 4249 negs r1, r1 | |
2464: 400b ands r3, r1 | |
n = tx_buffer[tail]; | |
2466: 4912 ldr r1, [pc, #72] ; (24b0 <serial3_putchar+0xa0>) | |
2468: 5cc9 ldrb r1, [r1, r3] | |
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART2_D = n; | |
tx_buffer_tail = tail; | |
246a: b2db uxtb r3, r3 | |
int priority = nvic_execution_priority(); | |
if (priority <= IRQ_PRIORITY) { | |
if ((UART2_S1 & UART_S1_TDRE)) { | |
uint32_t tail = tx_buffer_tail; | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
246c: b2c9 uxtb r1, r1 | |
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART2_D = n; | |
246e: 71d1 strb r1, [r2, #7] | |
tx_buffer_tail = tail; | |
2470: 702b strb r3, [r5, #0] | |
2472: e7e3 b.n 243c <serial3_putchar+0x2c> | |
} | |
} else if (priority >= 256) { | |
2474: 28ff cmp r0, #255 ; 0xff | |
2476: dde1 ble.n 243c <serial3_putchar+0x2c> | |
yield(); // wait | |
2478: f7ff f816 bl 14a8 <yield> | |
247c: e7de b.n 243c <serial3_putchar+0x2c> | |
} | |
} | |
tx_buffer[head] = c; | |
247e: 4b0c ldr r3, [pc, #48] ; (24b0 <serial3_putchar+0xa0>) | |
2480: b2ff uxtb r7, r7 | |
2482: 551f strb r7, [r3, r4] | |
transmitting = 1; | |
2484: 4b0b ldr r3, [pc, #44] ; (24b4 <serial3_putchar+0xa4>) | |
2486: 2201 movs r2, #1 | |
2488: 701a strb r2, [r3, #0] | |
tx_buffer_head = head; | |
UART2_C2 = C2_TX_ACTIVE; | |
248a: 4b08 ldr r3, [pc, #32] ; (24ac <serial3_putchar+0x9c>) | |
yield(); // wait | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
248c: b2e4 uxtb r4, r4 | |
UART2_C2 = C2_TX_ACTIVE; | |
248e: 22ac movs r2, #172 ; 0xac | |
yield(); // wait | |
} | |
} | |
tx_buffer[head] = c; | |
transmitting = 1; | |
tx_buffer_head = head; | |
2490: 7034 strb r4, [r6, #0] | |
UART2_C2 = C2_TX_ACTIVE; | |
2492: 70da strb r2, [r3, #3] | |
} | |
2494: bdf8 pop {r3, r4, r5, r6, r7, pc} | |
2496: 46c0 nop ; (mov r8, r8) | |
2498: 40048034 .word 0x40048034 | |
249c: 200000f4 .word 0x200000f4 | |
24a0: 200000ef .word 0x200000ef | |
24a4: 200000f8 .word 0x200000f8 | |
24a8: 200000f1 .word 0x200000f1 | |
24ac: 4006c000 .word 0x4006c000 | |
24b0: 20000086 .word 0x20000086 | |
24b4: 20000084 .word 0x20000084 | |
000024b8 <serial3_write>: | |
void serial3_write(const void *buf, unsigned int count) | |
{ | |
24b8: b538 push {r3, r4, r5, lr} | |
24ba: 1c04 adds r4, r0, #0 | |
24bc: 1845 adds r5, r0, r1 | |
const uint8_t *p = (const uint8_t *)buf; | |
while (count-- > 0) serial3_putchar(*p++); | |
24be: 42ac cmp r4, r5 | |
24c0: d004 beq.n 24cc <serial3_write+0x14> | |
24c2: 7820 ldrb r0, [r4, #0] | |
24c4: f7ff ffa4 bl 2410 <serial3_putchar> | |
24c8: 3401 adds r4, #1 | |
24ca: e7f8 b.n 24be <serial3_write+0x6> | |
} | |
24cc: bd38 pop {r3, r4, r5, pc} | |
24ce: ffff b508 vabal.u<illegal width 64> <illegal reg q13.5>, d15, d8 | |
000024d0 <serial3_flush>: | |
void serial3_flush(void) | |
{ | |
24d0: b508 push {r3, lr} | |
while (transmitting) yield(); // wait | |
24d2: 4b04 ldr r3, [pc, #16] ; (24e4 <serial3_flush+0x14>) | |
24d4: 781b ldrb r3, [r3, #0] | |
24d6: 2b00 cmp r3, #0 | |
24d8: d002 beq.n 24e0 <serial3_flush+0x10> | |
24da: f7fe ffe5 bl 14a8 <yield> | |
24de: e7f8 b.n 24d2 <serial3_flush+0x2> | |
} | |
24e0: bd08 pop {r3, pc} | |
24e2: 46c0 nop ; (mov r8, r8) | |
24e4: 20000084 .word 0x20000084 | |
000024e8 <serial3_write_buffer_free>: | |
int serial3_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
24e8: 4b06 ldr r3, [pc, #24] ; (2504 <serial3_write_buffer_free+0x1c>) | |
tail = tx_buffer_tail; | |
24ea: 4a07 ldr r2, [pc, #28] ; (2508 <serial3_write_buffer_free+0x20>) | |
int serial3_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
24ec: 781b ldrb r3, [r3, #0] | |
tail = tx_buffer_tail; | |
24ee: 7810 ldrb r0, [r2, #0] | |
int serial3_write_buffer_free(void) | |
{ | |
uint32_t head, tail; | |
head = tx_buffer_head; | |
24f0: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
24f2: b2c0 uxtb r0, r0 | |
if (head >= tail) return TX_BUFFER_SIZE - 1 - head + tail; | |
24f4: 4283 cmp r3, r0 | |
24f6: d301 bcc.n 24fc <serial3_write_buffer_free+0x14> | |
24f8: 3027 adds r0, #39 ; 0x27 | |
24fa: e000 b.n 24fe <serial3_write_buffer_free+0x16> | |
return tail - head - 1; | |
24fc: 3801 subs r0, #1 | |
24fe: 1ac0 subs r0, r0, r3 | |
} | |
2500: 4770 bx lr | |
2502: 46c0 nop ; (mov r8, r8) | |
2504: 200000f8 .word 0x200000f8 | |
2508: 200000f1 .word 0x200000f1 | |
0000250c <serial3_available>: | |
int serial3_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
250c: 4b05 ldr r3, [pc, #20] ; (2524 <serial3_available+0x18>) | |
250e: 7818 ldrb r0, [r3, #0] | |
tail = rx_buffer_tail; | |
2510: 4b05 ldr r3, [pc, #20] ; (2528 <serial3_available+0x1c>) | |
int serial3_available(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
2512: b2c0 uxtb r0, r0 | |
tail = rx_buffer_tail; | |
2514: 781b ldrb r3, [r3, #0] | |
2516: b2db uxtb r3, r3 | |
if (head >= tail) return head - tail; | |
2518: 4298 cmp r0, r3 | |
251a: d200 bcs.n 251e <serial3_available+0x12> | |
return RX_BUFFER_SIZE + head - tail; | |
251c: 3040 adds r0, #64 ; 0x40 | |
251e: 1ac0 subs r0, r0, r3 | |
} | |
2520: 4770 bx lr | |
2522: 46c0 nop ; (mov r8, r8) | |
2524: 200000f0 .word 0x200000f0 | |
2528: 20000085 .word 0x20000085 | |
0000252c <serial3_getchar>: | |
int serial3_getchar(void) | |
{ | |
252c: b510 push {r4, lr} | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
252e: 4b12 ldr r3, [pc, #72] ; (2578 <serial3_getchar+0x4c>) | |
tail = rx_buffer_tail; | |
2530: 4912 ldr r1, [pc, #72] ; (257c <serial3_getchar+0x50>) | |
int serial3_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
2532: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
2534: 780b ldrb r3, [r1, #0] | |
int serial3_getchar(void) | |
{ | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
2536: b2d2 uxtb r2, r2 | |
tail = rx_buffer_tail; | |
2538: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
253a: 429a cmp r2, r3 | |
253c: d019 beq.n 2572 <serial3_getchar+0x46> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
253e: 3301 adds r3, #1 | |
2540: 243f movs r4, #63 ; 0x3f | |
2542: 2000 movs r0, #0 | |
2544: 429c cmp r4, r3 | |
2546: 4140 adcs r0, r0 | |
2548: 4240 negs r0, r0 | |
254a: 4003 ands r3, r0 | |
c = rx_buffer[tail]; | |
254c: 480c ldr r0, [pc, #48] ; (2580 <serial3_getchar+0x54>) | |
rx_buffer_tail = tail; | |
254e: b2dc uxtb r4, r3 | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
2550: 5cc0 ldrb r0, [r0, r3] | |
rx_buffer_tail = tail; | |
2552: 700c strb r4, [r1, #0] | |
if (rts_pin) { | |
2554: 490b ldr r1, [pc, #44] ; (2584 <serial3_getchar+0x58>) | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
c = rx_buffer[tail]; | |
2556: b2c0 uxtb r0, r0 | |
rx_buffer_tail = tail; | |
if (rts_pin) { | |
2558: 6809 ldr r1, [r1, #0] | |
255a: 2900 cmp r1, #0 | |
255c: d00b beq.n 2576 <serial3_getchar+0x4a> | |
int avail; | |
if (head >= tail) avail = head - tail; | |
255e: 429a cmp r2, r3 | |
2560: d200 bcs.n 2564 <serial3_getchar+0x38> | |
else avail = RX_BUFFER_SIZE + head - tail; | |
2562: 3240 adds r2, #64 ; 0x40 | |
2564: 1ad3 subs r3, r2, r3 | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
2566: 2b1a cmp r3, #26 | |
2568: dc05 bgt.n 2576 <serial3_getchar+0x4a> | |
256a: 4b07 ldr r3, [pc, #28] ; (2588 <serial3_getchar+0x5c>) | |
256c: 781b ldrb r3, [r3, #0] | |
256e: 720b strb r3, [r1, #8] | |
2570: e001 b.n 2576 <serial3_getchar+0x4a> | |
uint32_t head, tail; | |
int c; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
2572: 2001 movs r0, #1 | |
2574: 4240 negs r0, r0 | |
if (head >= tail) avail = head - tail; | |
else avail = RX_BUFFER_SIZE + head - tail; | |
if (avail <= RTS_LOW_WATERMARK) rts_assert(); | |
} | |
return c; | |
} | |
2576: bd10 pop {r4, pc} | |
2578: 200000f0 .word 0x200000f0 | |
257c: 20000085 .word 0x20000085 | |
2580: 200000af .word 0x200000af | |
2584: 20000080 .word 0x20000080 | |
2588: 200000ae .word 0x200000ae | |
0000258c <serial3_peek>: | |
int serial3_peek(void) | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
258c: 4b0a ldr r3, [pc, #40] ; (25b8 <serial3_peek+0x2c>) | |
258e: 781a ldrb r2, [r3, #0] | |
tail = rx_buffer_tail; | |
2590: 4b0a ldr r3, [pc, #40] ; (25bc <serial3_peek+0x30>) | |
2592: 781b ldrb r3, [r3, #0] | |
2594: b2db uxtb r3, r3 | |
if (head == tail) return -1; | |
2596: 429a cmp r2, r3 | |
2598: d00a beq.n 25b0 <serial3_peek+0x24> | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
259a: 3301 adds r3, #1 | |
259c: 2200 movs r2, #0 | |
259e: 213f movs r1, #63 ; 0x3f | |
25a0: 4299 cmp r1, r3 | |
25a2: 4152 adcs r2, r2 | |
25a4: 4252 negs r2, r2 | |
25a6: 4013 ands r3, r2 | |
return rx_buffer[tail]; | |
25a8: 4a05 ldr r2, [pc, #20] ; (25c0 <serial3_peek+0x34>) | |
25aa: 5cd0 ldrb r0, [r2, r3] | |
25ac: b2c0 uxtb r0, r0 | |
25ae: e001 b.n 25b4 <serial3_peek+0x28> | |
{ | |
uint32_t head, tail; | |
head = rx_buffer_head; | |
tail = rx_buffer_tail; | |
if (head == tail) return -1; | |
25b0: 2001 movs r0, #1 | |
25b2: 4240 negs r0, r0 | |
if (++tail >= RX_BUFFER_SIZE) tail = 0; | |
return rx_buffer[tail]; | |
} | |
25b4: 4770 bx lr | |
25b6: 46c0 nop ; (mov r8, r8) | |
25b8: 200000f0 .word 0x200000f0 | |
25bc: 20000085 .word 0x20000085 | |
25c0: 200000af .word 0x200000af | |
000025c4 <serial3_clear>: | |
void serial3_clear(void) | |
{ | |
rx_buffer_head = rx_buffer_tail; | |
25c4: 4b06 ldr r3, [pc, #24] ; (25e0 <serial3_clear+0x1c>) | |
25c6: 781a ldrb r2, [r3, #0] | |
25c8: 4b06 ldr r3, [pc, #24] ; (25e4 <serial3_clear+0x20>) | |
25ca: b2d2 uxtb r2, r2 | |
25cc: 701a strb r2, [r3, #0] | |
if (rts_pin) rts_assert(); | |
25ce: 4b06 ldr r3, [pc, #24] ; (25e8 <serial3_clear+0x24>) | |
25d0: 681b ldr r3, [r3, #0] | |
25d2: 2b00 cmp r3, #0 | |
25d4: d002 beq.n 25dc <serial3_clear+0x18> | |
25d6: 4a05 ldr r2, [pc, #20] ; (25ec <serial3_clear+0x28>) | |
25d8: 7812 ldrb r2, [r2, #0] | |
25da: 721a strb r2, [r3, #8] | |
} | |
25dc: 4770 bx lr | |
25de: 46c0 nop ; (mov r8, r8) | |
25e0: 20000085 .word 0x20000085 | |
25e4: 200000f0 .word 0x200000f0 | |
25e8: 20000080 .word 0x20000080 | |
25ec: 200000ae .word 0x200000ae | |
000025f0 <uart2_status_isr>: | |
// Receive data above watermark UART_S1_RDRF | |
// LIN break detect UART_S2_LBKDIF | |
// RxD pin active edge UART_S2_RXEDGIF | |
void uart2_status_isr(void) | |
{ | |
25f0: b530 push {r4, r5, lr} | |
uint32_t head, tail, n; | |
uint8_t c; | |
if (UART2_S1 & UART_S1_RDRF) { | |
25f2: 4a2e ldr r2, [pc, #184] ; (26ac <uart2_status_isr+0xbc>) | |
25f4: 7913 ldrb r3, [r2, #4] | |
25f6: 0699 lsls r1, r3, #26 | |
25f8: d524 bpl.n 2644 <uart2_status_isr+0x54> | |
if (use9Bits && (UART2_C3 & 0x80)) { | |
n = UART2_D | 0x100; | |
} else { | |
n = UART2_D; | |
} | |
head = rx_buffer_head + 1; | |
25fa: 492d ldr r1, [pc, #180] ; (26b0 <uart2_status_isr+0xc0>) | |
if (UART2_S1 & UART_S1_RDRF) { | |
if (use9Bits && (UART2_C3 & 0x80)) { | |
n = UART2_D | 0x100; | |
} else { | |
n = UART2_D; | |
25fc: 79d4 ldrb r4, [r2, #7] | |
} | |
head = rx_buffer_head + 1; | |
25fe: 780b ldrb r3, [r1, #0] | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
2600: 2000 movs r0, #0 | |
if (use9Bits && (UART2_C3 & 0x80)) { | |
n = UART2_D | 0x100; | |
} else { | |
n = UART2_D; | |
} | |
head = rx_buffer_head + 1; | |
2602: 3301 adds r3, #1 | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
2604: 253f movs r5, #63 ; 0x3f | |
2606: 429d cmp r5, r3 | |
2608: 4140 adcs r0, r0 | |
260a: 4240 negs r0, r0 | |
260c: 4003 ands r3, r0 | |
if (head != rx_buffer_tail) { | |
260e: 4829 ldr r0, [pc, #164] ; (26b4 <uart2_status_isr+0xc4>) | |
if (UART2_S1 & UART_S1_RDRF) { | |
if (use9Bits && (UART2_C3 & 0x80)) { | |
n = UART2_D | 0x100; | |
} else { | |
n = UART2_D; | |
2610: b2e4 uxtb r4, r4 | |
} | |
head = rx_buffer_head + 1; | |
if (head >= RX_BUFFER_SIZE) head = 0; | |
if (head != rx_buffer_tail) { | |
2612: 7800 ldrb r0, [r0, #0] | |
2614: 4283 cmp r3, r0 | |
2616: d003 beq.n 2620 <uart2_status_isr+0x30> | |
rx_buffer[head] = n; | |
2618: 4827 ldr r0, [pc, #156] ; (26b8 <uart2_status_isr+0xc8>) | |
261a: 54c4 strb r4, [r0, r3] | |
rx_buffer_head = head; | |
261c: b2d8 uxtb r0, r3 | |
261e: 7008 strb r0, [r1, #0] | |
} | |
if (rts_pin) { | |
2620: 4926 ldr r1, [pc, #152] ; (26bc <uart2_status_isr+0xcc>) | |
2622: 6808 ldr r0, [r1, #0] | |
2624: 2800 cmp r0, #0 | |
2626: d00d beq.n 2644 <uart2_status_isr+0x54> | |
int avail; | |
tail = tx_buffer_tail; | |
2628: 4925 ldr r1, [pc, #148] ; (26c0 <uart2_status_isr+0xd0>) | |
262a: 7809 ldrb r1, [r1, #0] | |
262c: b2c9 uxtb r1, r1 | |
if (head >= tail) avail = head - tail; | |
262e: 428b cmp r3, r1 | |
2630: d301 bcc.n 2636 <uart2_status_isr+0x46> | |
2632: 1a5b subs r3, r3, r1 | |
2634: e001 b.n 263a <uart2_status_isr+0x4a> | |
else avail = RX_BUFFER_SIZE + head - tail; | |
2636: 1a5b subs r3, r3, r1 | |
2638: 3340 adds r3, #64 ; 0x40 | |
if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |
263a: 2b27 cmp r3, #39 ; 0x27 | |
263c: dd02 ble.n 2644 <uart2_status_isr+0x54> | |
263e: 4b21 ldr r3, [pc, #132] ; (26c4 <uart2_status_isr+0xd4>) | |
2640: 781b ldrb r3, [r3, #0] | |
2642: 7103 strb r3, [r0, #4] | |
} | |
} | |
c = UART2_C2; | |
2644: 78d1 ldrb r1, [r2, #3] | |
2646: 4c19 ldr r4, [pc, #100] ; (26ac <uart2_status_isr+0xbc>) | |
2648: b2c9 uxtb r1, r1 | |
if ((c & UART_C2_TIE) && (UART2_S1 & UART_S1_TDRE)) { | |
264a: b24b sxtb r3, r1 | |
264c: 2b00 cmp r3, #0 | |
264e: da1a bge.n 2686 <uart2_status_isr+0x96> | |
2650: 7923 ldrb r3, [r4, #4] | |
2652: b25b sxtb r3, r3 | |
2654: 2b00 cmp r3, #0 | |
2656: da16 bge.n 2686 <uart2_status_isr+0x96> | |
head = tx_buffer_head; | |
2658: 4b1b ldr r3, [pc, #108] ; (26c8 <uart2_status_isr+0xd8>) | |
tail = tx_buffer_tail; | |
265a: 4819 ldr r0, [pc, #100] ; (26c0 <uart2_status_isr+0xd0>) | |
if (avail >= RTS_HIGH_WATERMARK) rts_deassert(); | |
} | |
} | |
c = UART2_C2; | |
if ((c & UART_C2_TIE) && (UART2_S1 & UART_S1_TDRE)) { | |
head = tx_buffer_head; | |
265c: 781d ldrb r5, [r3, #0] | |
tail = tx_buffer_tail; | |
265e: 7803 ldrb r3, [r0, #0] | |
2660: b2db uxtb r3, r3 | |
if (head == tail) { | |
2662: 429d cmp r5, r3 | |
2664: d102 bne.n 266c <uart2_status_isr+0x7c> | |
UART2_C2 = C2_TX_COMPLETING; | |
2666: 236c movs r3, #108 ; 0x6c | |
2668: 70e3 strb r3, [r4, #3] | |
266a: e00c b.n 2686 <uart2_status_isr+0x96> | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
266c: 3301 adds r3, #1 | |
266e: 2400 movs r4, #0 | |
2670: 2527 movs r5, #39 ; 0x27 | |
2672: 429d cmp r5, r3 | |
2674: 4164 adcs r4, r4 | |
2676: 4264 negs r4, r4 | |
2678: 4023 ands r3, r4 | |
n = tx_buffer[tail]; | |
267a: 4c14 ldr r4, [pc, #80] ; (26cc <uart2_status_isr+0xdc>) | |
267c: 5ce4 ldrb r4, [r4, r3] | |
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART2_D = n; | |
tx_buffer_tail = tail; | |
267e: b2db uxtb r3, r3 | |
tail = tx_buffer_tail; | |
if (head == tail) { | |
UART2_C2 = C2_TX_COMPLETING; | |
} else { | |
if (++tail >= TX_BUFFER_SIZE) tail = 0; | |
n = tx_buffer[tail]; | |
2680: b2e4 uxtb r4, r4 | |
if (use9Bits) UART2_C3 = (UART2_C3 & ~0x40) | ((n & 0x100) >> 2); | |
UART2_D = n; | |
2682: 71d4 strb r4, [r2, #7] | |
tx_buffer_tail = tail; | |
2684: 7003 strb r3, [r0, #0] | |
} | |
} | |
if ((c & UART_C2_TCIE) && (UART2_S1 & UART_S1_TC)) { | |
2686: 2340 movs r3, #64 ; 0x40 | |
2688: 4219 tst r1, r3 | |
268a: d00e beq.n 26aa <uart2_status_isr+0xba> | |
268c: 7911 ldrb r1, [r2, #4] | |
268e: 4219 tst r1, r3 | |
2690: d00b beq.n 26aa <uart2_status_isr+0xba> | |
transmitting = 0; | |
2692: 4b0f ldr r3, [pc, #60] ; (26d0 <uart2_status_isr+0xe0>) | |
2694: 2100 movs r1, #0 | |
2696: 7019 strb r1, [r3, #0] | |
if (transmit_pin) transmit_deassert(); | |
2698: 4b0e ldr r3, [pc, #56] ; (26d4 <uart2_status_isr+0xe4>) | |
269a: 681b ldr r3, [r3, #0] | |
269c: 428b cmp r3, r1 | |
269e: d002 beq.n 26a6 <uart2_status_isr+0xb6> | |
26a0: 490d ldr r1, [pc, #52] ; (26d8 <uart2_status_isr+0xe8>) | |
26a2: 7809 ldrb r1, [r1, #0] | |
26a4: 7219 strb r1, [r3, #8] | |
UART2_C2 = C2_TX_INACTIVE; | |
26a6: 232c movs r3, #44 ; 0x2c | |
26a8: 70d3 strb r3, [r2, #3] | |
} | |
} | |
26aa: bd30 pop {r4, r5, pc} | |
26ac: 4006c000 .word 0x4006c000 | |
26b0: 200000f0 .word 0x200000f0 | |
26b4: 20000085 .word 0x20000085 | |
26b8: 200000af .word 0x200000af | |
26bc: 20000080 .word 0x20000080 | |
26c0: 200000f1 .word 0x200000f1 | |
26c4: 200000ae .word 0x200000ae | |
26c8: 200000f8 .word 0x200000f8 | |
26cc: 20000086 .word 0x20000086 | |
26d0: 20000084 .word 0x20000084 | |
26d4: 200000f4 .word 0x200000f4 | |
26d8: 200000ef .word 0x200000ef | |
000026dc <usb_init_serialnumber>: | |
3, | |
{0,0,0,0,0,0,0,0,0,0} | |
}; | |
void usb_init_serialnumber(void) | |
{ | |
26dc: b51f push {r0, r1, r2, r3, r4, lr} | |
char buf[11]; | |
uint32_t i, num; | |
__disable_irq(); | |
26de: b672 cpsid i | |
FTFL_FSTAT = FTFL_FSTAT_RDCOLERR | FTFL_FSTAT_ACCERR | FTFL_FSTAT_FPVIOL; | |
26e0: 4b15 ldr r3, [pc, #84] ; (2738 <usb_init_serialnumber+0x5c>) | |
26e2: 2270 movs r2, #112 ; 0x70 | |
26e4: 701a strb r2, [r3, #0] | |
FTFL_FCCOB0 = 0x41; | |
26e6: 4a15 ldr r2, [pc, #84] ; (273c <usb_init_serialnumber+0x60>) | |
26e8: 2141 movs r1, #65 ; 0x41 | |
26ea: 7011 strb r1, [r2, #0] | |
FTFL_FCCOB1 = 15; | |
26ec: 4a14 ldr r2, [pc, #80] ; (2740 <usb_init_serialnumber+0x64>) | |
26ee: 210f movs r1, #15 | |
26f0: 7011 strb r1, [r2, #0] | |
FTFL_FSTAT = FTFL_FSTAT_CCIF; | |
26f2: 2280 movs r2, #128 ; 0x80 | |
26f4: 701a strb r2, [r3, #0] | |
while (!(FTFL_FSTAT & FTFL_FSTAT_CCIF)) ; // wait | |
26f6: 781a ldrb r2, [r3, #0] | |
26f8: b252 sxtb r2, r2 | |
26fa: 2a00 cmp r2, #0 | |
26fc: dafb bge.n 26f6 <usb_init_serialnumber+0x1a> | |
num = *(uint32_t *)&FTFL_FCCOB7; | |
26fe: 4b11 ldr r3, [pc, #68] ; (2744 <usb_init_serialnumber+0x68>) | |
2700: 6818 ldr r0, [r3, #0] | |
__enable_irq(); | |
2702: b662 cpsie i | |
// add extra zero to work around OS-X CDC-ACM driver bug | |
if (num < 10000000) num = num * 10; | |
2704: 4b10 ldr r3, [pc, #64] ; (2748 <usb_init_serialnumber+0x6c>) | |
2706: 4298 cmp r0, r3 | |
2708: d801 bhi.n 270e <usb_init_serialnumber+0x32> | |
270a: 230a movs r3, #10 | |
270c: 4358 muls r0, r3 | |
ultoa(num, buf, 10); | |
270e: ac01 add r4, sp, #4 | |
2710: 1c21 adds r1, r4, #0 | |
2712: 220a movs r2, #10 | |
2714: f7fe ff8e bl 1634 <ultoa> | |
for (i=0; i<10; i++) { | |
2718: 2300 movs r3, #0 | |
char c = buf[i]; | |
271a: 5ce1 ldrb r1, [r4, r3] | |
271c: 4a0b ldr r2, [pc, #44] ; (274c <usb_init_serialnumber+0x70>) | |
if (!c) break; | |
271e: 2900 cmp r1, #0 | |
2720: d005 beq.n 272e <usb_init_serialnumber+0x52> | |
2722: 0058 lsls r0, r3, #1 | |
2724: 1810 adds r0, r2, r0 | |
num = *(uint32_t *)&FTFL_FCCOB7; | |
__enable_irq(); | |
// add extra zero to work around OS-X CDC-ACM driver bug | |
if (num < 10000000) num = num * 10; | |
ultoa(num, buf, 10); | |
for (i=0; i<10; i++) { | |
2726: 3301 adds r3, #1 | |
char c = buf[i]; | |
if (!c) break; | |
usb_string_serial_number_default.wString[i] = c; | |
2728: 8041 strh r1, [r0, #2] | |
num = *(uint32_t *)&FTFL_FCCOB7; | |
__enable_irq(); | |
// add extra zero to work around OS-X CDC-ACM driver bug | |
if (num < 10000000) num = num * 10; | |
ultoa(num, buf, 10); | |
for (i=0; i<10; i++) { | |
272a: 2b0a cmp r3, #10 | |
272c: d1f5 bne.n 271a <usb_init_serialnumber+0x3e> | |
char c = buf[i]; | |
if (!c) break; | |
usb_string_serial_number_default.wString[i] = c; | |
} | |
usb_string_serial_number_default.bLength = i * 2 + 2; | |
272e: 3301 adds r3, #1 | |
2730: 005b lsls r3, r3, #1 | |
2732: 7013 strb r3, [r2, #0] | |
} | |
2734: bd1f pop {r0, r1, r2, r3, r4, pc} | |
2736: 46c0 nop ; (mov r8, r8) | |
2738: 40020000 .word 0x40020000 | |
273c: 40020007 .word 0x40020007 | |
2740: 40020006 .word 0x40020006 | |
2744: 40020008 .word 0x40020008 | |
2748: 0098967f .word 0x0098967f | |
274c: 1ffffdf2 .word 0x1ffffdf2 | |
00002750 <_ZN14HardwareSerial5writeEm>: | |
virtual int read(void) { return serial_getchar(); } | |
virtual void flush(void) { serial_flush(); } | |
virtual void clear(void) { serial_clear(); } | |
virtual int availableForWrite(void) { return serial_write_buffer_free(); } | |
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
2750: b508 push {r3, lr} | |
2752: 6803 ldr r3, [r0, #0] | |
2754: b2c9 uxtb r1, r1 | |
2756: 681b ldr r3, [r3, #0] | |
2758: 4798 blx r3 | |
275a: bd08 pop {r3, pc} | |
0000275c <_ZN14HardwareSerial5writeEl>: | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
275c: b508 push {r3, lr} | |
275e: 6803 ldr r3, [r0, #0] | |
2760: b2c9 uxtb r1, r1 | |
2762: 681b ldr r3, [r3, #0] | |
2764: 4798 blx r3 | |
2766: bd08 pop {r3, pc} | |
00002768 <_ZN14HardwareSerial5writeEj>: | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
2768: b508 push {r3, lr} | |
276a: 6803 ldr r3, [r0, #0] | |
276c: b2c9 uxtb r1, r1 | |
276e: 681b ldr r3, [r3, #0] | |
2770: 4798 blx r3 | |
2772: bd08 pop {r3, pc} | |
00002774 <_ZN14HardwareSerial5writeEi>: | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
2774: b508 push {r3, lr} | |
2776: 6803 ldr r3, [r0, #0] | |
2778: b2c9 uxtb r1, r1 | |
277a: 681b ldr r3, [r3, #0] | |
277c: 4798 blx r3 | |
277e: bd08 pop {r3, pc} | |
00002780 <_ZN14HardwareSerial5beginEm>: | |
#ifdef __cplusplus | |
#include "Stream.h" | |
class HardwareSerial : public Stream | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); } | |
2780: b508 push {r3, lr} | |
2782: 4b04 ldr r3, [pc, #16] ; (2794 <_ZN14HardwareSerial5beginEm+0x14>) | |
2784: 0848 lsrs r0, r1, #1 | |
2786: 18c0 adds r0, r0, r3 | |
2788: f000 f9d6 bl 2b38 <__aeabi_uidiv> | |
278c: f7fe ff7a bl 1684 <serial_begin> | |
2790: bd08 pop {r3, pc} | |
2792: 46c0 nop ; (mov r8, r8) | |
2794: 002dc6c0 .word 0x002dc6c0 | |
00002798 <_ZN14HardwareSerial5beginEmm>: | |
virtual void begin(uint32_t baud, uint32_t format) { | |
2798: b510 push {r4, lr} | |
serial_begin(BAUD2DIV(baud)); | |
279a: 4b06 ldr r3, [pc, #24] ; (27b4 <_ZN14HardwareSerial5beginEmm+0x1c>) | |
279c: 0848 lsrs r0, r1, #1 | |
279e: 18c0 adds r0, r0, r3 | |
#include "Stream.h" | |
class HardwareSerial : public Stream | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial_begin(BAUD2DIV(baud)); } | |
virtual void begin(uint32_t baud, uint32_t format) { | |
27a0: 1c14 adds r4, r2, #0 | |
serial_begin(BAUD2DIV(baud)); | |
27a2: f000 f9c9 bl 2b38 <__aeabi_uidiv> | |
27a6: f7fe ff6d bl 1684 <serial_begin> | |
serial_format(format); } | |
27aa: 1c20 adds r0, r4, #0 | |
27ac: f7fe ffde bl 176c <serial_format> | |
27b0: bd10 pop {r4, pc} | |
27b2: 46c0 nop ; (mov r8, r8) | |
27b4: 002dc6c0 .word 0x002dc6c0 | |
000027b8 <_ZN14HardwareSerial3endEv>: | |
virtual void end(void) { serial_end(); } | |
27b8: b508 push {r3, lr} | |
27ba: f7fe ffff bl 17bc <serial_end> | |
27be: bd08 pop {r3, pc} | |
000027c0 <_ZN14HardwareSerial17transmitterEnableEh>: | |
virtual void transmitterEnable(uint8_t pin) { serial_set_transmit_pin(pin); } | |
27c0: b508 push {r3, lr} | |
27c2: 1c08 adds r0, r1, #0 | |
27c4: f7ff f834 bl 1830 <serial_set_transmit_pin> | |
27c8: bd08 pop {r3, pc} | |
000027ca <_ZN14HardwareSerial5setRXEh>: | |
virtual void setRX(uint8_t pin) { serial_set_rx(pin); } | |
27ca: b508 push {r3, lr} | |
27cc: 1c08 adds r0, r1, #0 | |
27ce: f7ff f8a7 bl 1920 <serial_set_rx> | |
27d2: bd08 pop {r3, pc} | |
000027d4 <_ZN14HardwareSerial5setTXEhb>: | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial_set_tx(pin, opendrain); } | |
27d4: b508 push {r3, lr} | |
27d6: 1c08 adds r0, r1, #0 | |
27d8: 1c11 adds r1, r2, #0 | |
27da: f7ff f84b bl 1874 <serial_set_tx> | |
27de: bd08 pop {r3, pc} | |
000027e0 <_ZN14HardwareSerial9attachRtsEh>: | |
virtual bool attachRts(uint8_t pin) { return serial_set_rts(pin); } | |
27e0: b508 push {r3, lr} | |
27e2: 1c08 adds r0, r1, #0 | |
27e4: f7ff f8e4 bl 19b0 <serial_set_rts> | |
27e8: 1e43 subs r3, r0, #1 | |
27ea: 4198 sbcs r0, r3 | |
27ec: b2c0 uxtb r0, r0 | |
27ee: bd08 pop {r3, pc} | |
000027f0 <_ZN14HardwareSerial9attachCtsEh>: | |
virtual bool attachCts(uint8_t pin) { return serial_set_cts(pin); } | |
27f0: b508 push {r3, lr} | |
27f2: 1c08 adds r0, r1, #0 | |
27f4: f7ff f902 bl 19fc <serial_set_cts> | |
27f8: 1e43 subs r3, r0, #1 | |
27fa: 4198 sbcs r0, r3 | |
27fc: b2c0 uxtb r0, r0 | |
27fe: bd08 pop {r3, pc} | |
00002800 <_ZN14HardwareSerial9availableEv>: | |
virtual int available(void) { return serial_available(); } | |
2800: b508 push {r3, lr} | |
2802: f7ff f97b bl 1afc <serial_available> | |
2806: bd08 pop {r3, pc} | |
00002808 <_ZN14HardwareSerial4peekEv>: | |
virtual int peek(void) { return serial_peek(); } | |
2808: b508 push {r3, lr} | |
280a: f7ff f9b7 bl 1b7c <serial_peek> | |
280e: bd08 pop {r3, pc} | |
00002810 <_ZN14HardwareSerial4readEv>: | |
virtual int read(void) { return serial_getchar(); } | |
2810: b508 push {r3, lr} | |
2812: f7ff f983 bl 1b1c <serial_getchar> | |
2816: bd08 pop {r3, pc} | |
00002818 <_ZN14HardwareSerial5flushEv>: | |
virtual void flush(void) { serial_flush(); } | |
2818: b508 push {r3, lr} | |
281a: f7ff f951 bl 1ac0 <serial_flush> | |
281e: bd08 pop {r3, pc} | |
00002820 <_ZN14HardwareSerial5clearEv>: | |
virtual void clear(void) { serial_clear(); } | |
2820: b508 push {r3, lr} | |
2822: f7ff f9c7 bl 1bb4 <serial_clear> | |
2826: bd08 pop {r3, pc} | |
00002828 <_ZN14HardwareSerial17availableForWriteEv>: | |
virtual int availableForWrite(void) { return serial_write_buffer_free(); } | |
2828: b508 push {r3, lr} | |
282a: f7ff f955 bl 1ad8 <serial_write_buffer_free> | |
282e: bd08 pop {r3, pc} | |
00002830 <_ZN14HardwareSerial5writeEh>: | |
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } | |
2830: b508 push {r3, lr} | |
2832: 1c08 adds r0, r1, #0 | |
2834: f7ff f8e4 bl 1a00 <serial_putchar> | |
2838: 2001 movs r0, #1 | |
283a: bd08 pop {r3, pc} | |
0000283c <_ZN14HardwareSerial9write9bitEm>: | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
{ serial_write(buffer, size); return size; } | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
serial_write((const uint8_t *)str, len); | |
return len; } | |
virtual size_t write9bit(uint32_t c) { serial_putchar(c); return 1; } | |
283c: b508 push {r3, lr} | |
283e: 1c08 adds r0, r1, #0 | |
2840: f7ff f8de bl 1a00 <serial_putchar> | |
2844: 2001 movs r0, #1 | |
2846: bd08 pop {r3, pc} | |
00002848 <_ZN14HardwareSerial5writeEPKhj>: | |
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
2848: b510 push {r4, lr} | |
{ serial_write(buffer, size); return size; } | |
284a: 1c08 adds r0, r1, #0 | |
virtual size_t write(uint8_t c) { serial_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
284c: 1c14 adds r4, r2, #0 | |
{ serial_write(buffer, size); return size; } | |
284e: 1c11 adds r1, r2, #0 | |
2850: f7ff f92a bl 1aa8 <serial_write> | |
2854: 1c20 adds r0, r4, #0 | |
2856: bd10 pop {r4, pc} | |
00002858 <_ZN14HardwareSerial5writeEPKc>: | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
2858: b538 push {r3, r4, r5, lr} | |
285a: 1c08 adds r0, r1, #0 | |
285c: 1c0d adds r5, r1, #0 | |
285e: f000 fa68 bl 2d32 <strlen> | |
2862: 1c04 adds r4, r0, #0 | |
serial_write((const uint8_t *)str, len); | |
2864: 1c21 adds r1, r4, #0 | |
2866: 1c28 adds r0, r5, #0 | |
2868: f7ff f91e bl 1aa8 <serial_write> | |
return len; } | |
286c: 1c20 adds r0, r4, #0 | |
286e: bd38 pop {r3, r4, r5, pc} | |
00002870 <_Z12serialEvent1v>: | |
#include "HardwareSerial.h" | |
HardwareSerial Serial1; | |
void serialEvent1() __attribute__((weak)); | |
void serialEvent1() {} | |
2870: 4770 bx lr | |
2872: ffff 4b04 vtbl.8 d20, {d15-d18}, d4 | |
00002874 <_GLOBAL__sub_I_Serial1>: | |
2874: 4b04 ldr r3, [pc, #16] ; (2888 <_GLOBAL__sub_I_Serial1+0x14>) | |
2876: 2200 movs r2, #0 | |
2878: 711a strb r2, [r3, #4] | |
287a: 731a strb r2, [r3, #12] | |
287c: 21fa movs r1, #250 ; 0xfa | |
// C++ interface | |
// | |
#ifdef __cplusplus | |
#include "Stream.h" | |
class HardwareSerial : public Stream | |
287e: 4a03 ldr r2, [pc, #12] ; (288c <_GLOBAL__sub_I_Serial1+0x18>) | |
2880: 0089 lsls r1, r1, #2 | |
2882: 6099 str r1, [r3, #8] | |
2884: 601a str r2, [r3, #0] | |
2886: 4770 bx lr | |
2888: 200000fc .word 0x200000fc | |
288c: 00002f38 .word 0x00002f38 | |
00002890 <_ZN15HardwareSerial25writeEm>: | |
virtual int read(void) { return serial2_getchar(); } | |
virtual void flush(void) { serial2_flush(); } | |
virtual void clear(void) { serial2_clear(); } | |
virtual int availableForWrite(void) { return serial2_write_buffer_free(); } | |
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
2890: b508 push {r3, lr} | |
2892: 6803 ldr r3, [r0, #0] | |
2894: b2c9 uxtb r1, r1 | |
2896: 681b ldr r3, [r3, #0] | |
2898: 4798 blx r3 | |
289a: bd08 pop {r3, pc} | |
0000289c <_ZN15HardwareSerial25writeEl>: | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
289c: b508 push {r3, lr} | |
289e: 6803 ldr r3, [r0, #0] | |
28a0: b2c9 uxtb r1, r1 | |
28a2: 681b ldr r3, [r3, #0] | |
28a4: 4798 blx r3 | |
28a6: bd08 pop {r3, pc} | |
000028a8 <_ZN15HardwareSerial25writeEj>: | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
28a8: b508 push {r3, lr} | |
28aa: 6803 ldr r3, [r0, #0] | |
28ac: b2c9 uxtb r1, r1 | |
28ae: 681b ldr r3, [r3, #0] | |
28b0: 4798 blx r3 | |
28b2: bd08 pop {r3, pc} | |
000028b4 <_ZN15HardwareSerial25writeEi>: | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
28b4: b508 push {r3, lr} | |
28b6: 6803 ldr r3, [r0, #0] | |
28b8: b2c9 uxtb r1, r1 | |
28ba: 681b ldr r3, [r3, #0] | |
28bc: 4798 blx r3 | |
28be: bd08 pop {r3, pc} | |
000028c0 <_ZN15HardwareSerial25beginEm>: | |
extern void serialEvent1(void); | |
class HardwareSerial2 : public HardwareSerial | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV2(baud)); } | |
28c0: b508 push {r3, lr} | |
28c2: 4b04 ldr r3, [pc, #16] ; (28d4 <_ZN15HardwareSerial25beginEm+0x14>) | |
28c4: 0848 lsrs r0, r1, #1 | |
28c6: 18c0 adds r0, r0, r3 | |
28c8: f000 f936 bl 2b38 <__aeabi_uidiv> | |
28cc: f7ff f9e8 bl 1ca0 <serial2_begin> | |
28d0: bd08 pop {r3, pc} | |
28d2: 46c0 nop ; (mov r8, r8) | |
28d4: 0016e360 .word 0x0016e360 | |
000028d8 <_ZN15HardwareSerial25beginEmm>: | |
virtual void begin(uint32_t baud, uint32_t format) { | |
28d8: b510 push {r4, lr} | |
serial2_begin(BAUD2DIV2(baud)); | |
28da: 4b06 ldr r3, [pc, #24] ; (28f4 <_ZN15HardwareSerial25beginEmm+0x1c>) | |
28dc: 0848 lsrs r0, r1, #1 | |
28de: 18c0 adds r0, r0, r3 | |
class HardwareSerial2 : public HardwareSerial | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial2_begin(BAUD2DIV2(baud)); } | |
virtual void begin(uint32_t baud, uint32_t format) { | |
28e0: 1c14 adds r4, r2, #0 | |
serial2_begin(BAUD2DIV2(baud)); | |
28e2: f000 f929 bl 2b38 <__aeabi_uidiv> | |
28e6: f7ff f9db bl 1ca0 <serial2_begin> | |
serial2_format(format); } | |
28ea: 1c20 adds r0, r4, #0 | |
28ec: f7ff fa20 bl 1d30 <serial2_format> | |
28f0: bd10 pop {r4, pc} | |
28f2: 46c0 nop ; (mov r8, r8) | |
28f4: 0016e360 .word 0x0016e360 | |
000028f8 <_ZN15HardwareSerial23endEv>: | |
virtual void end(void) { serial2_end(); } | |
28f8: b508 push {r3, lr} | |
28fa: f7ff fa41 bl 1d80 <serial2_end> | |
28fe: bd08 pop {r3, pc} | |
00002900 <_ZN15HardwareSerial217transmitterEnableEh>: | |
virtual void transmitterEnable(uint8_t pin) { serial2_set_transmit_pin(pin); } | |
2900: b508 push {r3, lr} | |
2902: 1c08 adds r0, r1, #0 | |
2904: f7ff fa76 bl 1df4 <serial2_set_transmit_pin> | |
2908: bd08 pop {r3, pc} | |
0000290a <_ZN15HardwareSerial25setRXEh>: | |
virtual void setRX(uint8_t pin) { serial2_set_rx(pin); } | |
290a: b508 push {r3, lr} | |
290c: 1c08 adds r0, r1, #0 | |
290e: f7ff fa94 bl 1e3a <serial2_set_rx> | |
2912: bd08 pop {r3, pc} | |
00002914 <_ZN15HardwareSerial25setTXEhb>: | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial2_set_tx(pin, opendrain); } | |
2914: b508 push {r3, lr} | |
2916: 1c08 adds r0, r1, #0 | |
2918: 1c11 adds r1, r2, #0 | |
291a: f7ff fa8d bl 1e38 <serial2_set_tx> | |
291e: bd08 pop {r3, pc} | |
00002920 <_ZN15HardwareSerial29attachRtsEh>: | |
virtual bool attachRts(uint8_t pin) { return serial2_set_rts(pin); } | |
2920: b508 push {r3, lr} | |
2922: 1c08 adds r0, r1, #0 | |
2924: f7ff fa8a bl 1e3c <serial2_set_rts> | |
2928: 1e43 subs r3, r0, #1 | |
292a: 4198 sbcs r0, r3 | |
292c: b2c0 uxtb r0, r0 | |
292e: bd08 pop {r3, pc} | |
00002930 <_ZN15HardwareSerial29attachCtsEh>: | |
virtual bool attachCts(uint8_t pin) { return serial2_set_cts(pin); } | |
2930: b508 push {r3, lr} | |
2932: 1c08 adds r0, r1, #0 | |
2934: f7ff faa8 bl 1e88 <serial2_set_cts> | |
2938: 1e43 subs r3, r0, #1 | |
293a: 4198 sbcs r0, r3 | |
293c: b2c0 uxtb r0, r0 | |
293e: bd08 pop {r3, pc} | |
00002940 <_ZN15HardwareSerial29availableEv>: | |
virtual int available(void) { return serial2_available(); } | |
2940: b508 push {r3, lr} | |
2942: f7ff fb21 bl 1f88 <serial2_available> | |
2946: bd08 pop {r3, pc} | |
00002948 <_ZN15HardwareSerial24peekEv>: | |
virtual int peek(void) { return serial2_peek(); } | |
2948: b508 push {r3, lr} | |
294a: f7ff fb5d bl 2008 <serial2_peek> | |
294e: bd08 pop {r3, pc} | |
00002950 <_ZN15HardwareSerial24readEv>: | |
virtual int read(void) { return serial2_getchar(); } | |
2950: b508 push {r3, lr} | |
2952: f7ff fb29 bl 1fa8 <serial2_getchar> | |
2956: bd08 pop {r3, pc} | |
00002958 <_ZN15HardwareSerial25flushEv>: | |
virtual void flush(void) { serial2_flush(); } | |
2958: b508 push {r3, lr} | |
295a: f7ff faf7 bl 1f4c <serial2_flush> | |
295e: bd08 pop {r3, pc} | |
00002960 <_ZN15HardwareSerial25clearEv>: | |
virtual void clear(void) { serial2_clear(); } | |
2960: b508 push {r3, lr} | |
2962: f7ff fb6d bl 2040 <serial2_clear> | |
2966: bd08 pop {r3, pc} | |
00002968 <_ZN15HardwareSerial217availableForWriteEv>: | |
virtual int availableForWrite(void) { return serial2_write_buffer_free(); } | |
2968: b508 push {r3, lr} | |
296a: f7ff fafb bl 1f64 <serial2_write_buffer_free> | |
296e: bd08 pop {r3, pc} | |
00002970 <_ZN15HardwareSerial25writeEh>: | |
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } | |
2970: b508 push {r3, lr} | |
2972: 1c08 adds r0, r1, #0 | |
2974: f7ff fa8a bl 1e8c <serial2_putchar> | |
2978: 2001 movs r0, #1 | |
297a: bd08 pop {r3, pc} | |
0000297c <_ZN15HardwareSerial29write9bitEm>: | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
{ serial2_write(buffer, size); return size; } | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
serial2_write((const uint8_t *)str, len); | |
return len; } | |
virtual size_t write9bit(uint32_t c) { serial2_putchar(c); return 1; } | |
297c: b508 push {r3, lr} | |
297e: 1c08 adds r0, r1, #0 | |
2980: f7ff fa84 bl 1e8c <serial2_putchar> | |
2984: 2001 movs r0, #1 | |
2986: bd08 pop {r3, pc} | |
00002988 <_ZN15HardwareSerial25writeEPKhj>: | |
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
2988: b510 push {r4, lr} | |
{ serial2_write(buffer, size); return size; } | |
298a: 1c08 adds r0, r1, #0 | |
virtual size_t write(uint8_t c) { serial2_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
298c: 1c14 adds r4, r2, #0 | |
{ serial2_write(buffer, size); return size; } | |
298e: 1c11 adds r1, r2, #0 | |
2990: f7ff fad0 bl 1f34 <serial2_write> | |
2994: 1c20 adds r0, r4, #0 | |
2996: bd10 pop {r4, pc} | |
00002998 <_ZN15HardwareSerial25writeEPKc>: | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
2998: b538 push {r3, r4, r5, lr} | |
299a: 1c08 adds r0, r1, #0 | |
299c: 1c0d adds r5, r1, #0 | |
299e: f000 f9c8 bl 2d32 <strlen> | |
29a2: 1c04 adds r4, r0, #0 | |
serial2_write((const uint8_t *)str, len); | |
29a4: 1c21 adds r1, r4, #0 | |
29a6: 1c28 adds r0, r5, #0 | |
29a8: f7ff fac4 bl 1f34 <serial2_write> | |
return len; } | |
29ac: 1c20 adds r0, r4, #0 | |
29ae: bd38 pop {r3, r4, r5, pc} | |
000029b0 <_Z12serialEvent2v>: | |
#include "HardwareSerial.h" | |
HardwareSerial2 Serial2; | |
void serialEvent2() __attribute__((weak)); | |
void serialEvent2() {} | |
29b0: 4770 bx lr | |
29b2: ffff 4b04 vtbl.8 d20, {d15-d18}, d4 | |
000029b4 <_GLOBAL__sub_I_Serial2>: | |
29b4: 4b04 ldr r3, [pc, #16] ; (29c8 <_GLOBAL__sub_I_Serial2+0x14>) | |
29b6: 2200 movs r2, #0 | |
29b8: 711a strb r2, [r3, #4] | |
29ba: 731a strb r2, [r3, #12] | |
29bc: 21fa movs r1, #250 ; 0xfa | |
operator bool() { return true; } | |
}; | |
extern HardwareSerial Serial1; | |
extern void serialEvent1(void); | |
class HardwareSerial2 : public HardwareSerial | |
29be: 4a03 ldr r2, [pc, #12] ; (29cc <_GLOBAL__sub_I_Serial2+0x18>) | |
29c0: 0089 lsls r1, r1, #2 | |
29c2: 6099 str r1, [r3, #8] | |
29c4: 601a str r2, [r3, #0] | |
29c6: 4770 bx lr | |
29c8: 2000010c .word 0x2000010c | |
29cc: 00002f98 .word 0x00002f98 | |
000029d0 <_ZN15HardwareSerial35writeEm>: | |
virtual int read(void) { return serial3_getchar(); } | |
virtual void flush(void) { serial3_flush(); } | |
virtual void clear(void) { serial3_clear(); } | |
virtual int availableForWrite(void) { return serial3_write_buffer_free(); } | |
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
29d0: b508 push {r3, lr} | |
29d2: 6803 ldr r3, [r0, #0] | |
29d4: b2c9 uxtb r1, r1 | |
29d6: 681b ldr r3, [r3, #0] | |
29d8: 4798 blx r3 | |
29da: bd08 pop {r3, pc} | |
000029dc <_ZN15HardwareSerial35writeEl>: | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
29dc: b508 push {r3, lr} | |
29de: 6803 ldr r3, [r0, #0] | |
29e0: b2c9 uxtb r1, r1 | |
29e2: 681b ldr r3, [r3, #0] | |
29e4: 4798 blx r3 | |
29e6: bd08 pop {r3, pc} | |
000029e8 <_ZN15HardwareSerial35writeEj>: | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
29e8: b508 push {r3, lr} | |
29ea: 6803 ldr r3, [r0, #0] | |
29ec: b2c9 uxtb r1, r1 | |
29ee: 681b ldr r3, [r3, #0] | |
29f0: 4798 blx r3 | |
29f2: bd08 pop {r3, pc} | |
000029f4 <_ZN15HardwareSerial35writeEi>: | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
29f4: b508 push {r3, lr} | |
29f6: 6803 ldr r3, [r0, #0] | |
29f8: b2c9 uxtb r1, r1 | |
29fa: 681b ldr r3, [r3, #0] | |
29fc: 4798 blx r3 | |
29fe: bd08 pop {r3, pc} | |
00002a00 <_ZN15HardwareSerial35beginEm>: | |
extern void serialEvent2(void); | |
class HardwareSerial3 : public HardwareSerial | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); } | |
2a00: b508 push {r3, lr} | |
2a02: 4b04 ldr r3, [pc, #16] ; (2a14 <_ZN15HardwareSerial35beginEm+0x14>) | |
2a04: 0848 lsrs r0, r1, #1 | |
2a06: 18c0 adds r0, r0, r3 | |
2a08: f000 f896 bl 2b38 <__aeabi_uidiv> | |
2a0c: f7ff fb8e bl 212c <serial3_begin> | |
2a10: bd08 pop {r3, pc} | |
2a12: 46c0 nop ; (mov r8, r8) | |
2a14: 0016e360 .word 0x0016e360 | |
00002a18 <_ZN15HardwareSerial35beginEmm>: | |
virtual void begin(uint32_t baud, uint32_t format) { | |
2a18: b510 push {r4, lr} | |
serial3_begin(BAUD2DIV3(baud)); | |
2a1a: 4b06 ldr r3, [pc, #24] ; (2a34 <_ZN15HardwareSerial35beginEmm+0x1c>) | |
2a1c: 0848 lsrs r0, r1, #1 | |
2a1e: 18c0 adds r0, r0, r3 | |
class HardwareSerial3 : public HardwareSerial | |
{ | |
public: | |
virtual void begin(uint32_t baud) { serial3_begin(BAUD2DIV3(baud)); } | |
virtual void begin(uint32_t baud, uint32_t format) { | |
2a20: 1c14 adds r4, r2, #0 | |
serial3_begin(BAUD2DIV3(baud)); | |
2a22: f000 f889 bl 2b38 <__aeabi_uidiv> | |
2a26: f7ff fb81 bl 212c <serial3_begin> | |
serial3_format(format); } | |
2a2a: 1c20 adds r0, r4, #0 | |
2a2c: f7ff fbe2 bl 21f4 <serial3_format> | |
2a30: bd10 pop {r4, pc} | |
2a32: 46c0 nop ; (mov r8, r8) | |
2a34: 0016e360 .word 0x0016e360 | |
00002a38 <_ZN15HardwareSerial33endEv>: | |
virtual void end(void) { serial3_end(); } | |
2a38: b508 push {r3, lr} | |
2a3a: f7ff fc03 bl 2244 <serial3_end> | |
2a3e: bd08 pop {r3, pc} | |
00002a40 <_ZN15HardwareSerial317transmitterEnableEh>: | |
virtual void transmitterEnable(uint8_t pin) { serial3_set_transmit_pin(pin); } | |
2a40: b508 push {r3, lr} | |
2a42: 1c08 adds r0, r1, #0 | |
2a44: f7ff fc38 bl 22b8 <serial3_set_transmit_pin> | |
2a48: bd08 pop {r3, pc} | |
00002a4a <_ZN15HardwareSerial35setRXEh>: | |
virtual void setRX(uint8_t pin) { serial3_set_rx(pin); } | |
2a4a: b508 push {r3, lr} | |
2a4c: 1c08 adds r0, r1, #0 | |
2a4e: f7ff fc8d bl 236c <serial3_set_rx> | |
2a52: bd08 pop {r3, pc} | |
00002a54 <_ZN15HardwareSerial35setTXEhb>: | |
virtual void setTX(uint8_t pin, bool opendrain=false) { serial3_set_tx(pin, opendrain); } | |
2a54: b508 push {r3, lr} | |
2a56: 1c08 adds r0, r1, #0 | |
2a58: 1c11 adds r1, r2, #0 | |
2a5a: f7ff fc4f bl 22fc <serial3_set_tx> | |
2a5e: bd08 pop {r3, pc} | |
00002a60 <_ZN15HardwareSerial39attachRtsEh>: | |
virtual bool attachRts(uint8_t pin) { return serial3_set_rts(pin); } | |
2a60: b508 push {r3, lr} | |
2a62: 1c08 adds r0, r1, #0 | |
2a64: f7ff fcac bl 23c0 <serial3_set_rts> | |
2a68: 1e43 subs r3, r0, #1 | |
2a6a: 4198 sbcs r0, r3 | |
2a6c: b2c0 uxtb r0, r0 | |
2a6e: bd08 pop {r3, pc} | |
00002a70 <_ZN15HardwareSerial39attachCtsEh>: | |
virtual bool attachCts(uint8_t pin) { return serial3_set_cts(pin); } | |
2a70: b508 push {r3, lr} | |
2a72: 1c08 adds r0, r1, #0 | |
2a74: f7ff fcca bl 240c <serial3_set_cts> | |
2a78: 1e43 subs r3, r0, #1 | |
2a7a: 4198 sbcs r0, r3 | |
2a7c: b2c0 uxtb r0, r0 | |
2a7e: bd08 pop {r3, pc} | |
00002a80 <_ZN15HardwareSerial39availableEv>: | |
virtual int available(void) { return serial3_available(); } | |
2a80: b508 push {r3, lr} | |
2a82: f7ff fd43 bl 250c <serial3_available> | |
2a86: bd08 pop {r3, pc} | |
00002a88 <_ZN15HardwareSerial34peekEv>: | |
virtual int peek(void) { return serial3_peek(); } | |
2a88: b508 push {r3, lr} | |
2a8a: f7ff fd7f bl 258c <serial3_peek> | |
2a8e: bd08 pop {r3, pc} | |
00002a90 <_ZN15HardwareSerial34readEv>: | |
virtual int read(void) { return serial3_getchar(); } | |
2a90: b508 push {r3, lr} | |
2a92: f7ff fd4b bl 252c <serial3_getchar> | |
2a96: bd08 pop {r3, pc} | |
00002a98 <_ZN15HardwareSerial35flushEv>: | |
virtual void flush(void) { serial3_flush(); } | |
2a98: b508 push {r3, lr} | |
2a9a: f7ff fd19 bl 24d0 <serial3_flush> | |
2a9e: bd08 pop {r3, pc} | |
00002aa0 <_ZN15HardwareSerial35clearEv>: | |
virtual void clear(void) { serial3_clear(); } | |
2aa0: b508 push {r3, lr} | |
2aa2: f7ff fd8f bl 25c4 <serial3_clear> | |
2aa6: bd08 pop {r3, pc} | |
00002aa8 <_ZN15HardwareSerial317availableForWriteEv>: | |
virtual int availableForWrite(void) { return serial3_write_buffer_free(); } | |
2aa8: b508 push {r3, lr} | |
2aaa: f7ff fd1d bl 24e8 <serial3_write_buffer_free> | |
2aae: bd08 pop {r3, pc} | |
00002ab0 <_ZN15HardwareSerial35writeEh>: | |
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } | |
2ab0: b508 push {r3, lr} | |
2ab2: 1c08 adds r0, r1, #0 | |
2ab4: f7ff fcac bl 2410 <serial3_putchar> | |
2ab8: 2001 movs r0, #1 | |
2aba: bd08 pop {r3, pc} | |
00002abc <_ZN15HardwareSerial39write9bitEm>: | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
{ serial3_write(buffer, size); return size; } | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
serial3_write((const uint8_t *)str, len); | |
return len; } | |
virtual size_t write9bit(uint32_t c) { serial3_putchar(c); return 1; } | |
2abc: b508 push {r3, lr} | |
2abe: 1c08 adds r0, r1, #0 | |
2ac0: f7ff fca6 bl 2410 <serial3_putchar> | |
2ac4: 2001 movs r0, #1 | |
2ac6: bd08 pop {r3, pc} | |
00002ac8 <_ZN15HardwareSerial35writeEPKhj>: | |
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
2ac8: b510 push {r4, lr} | |
{ serial3_write(buffer, size); return size; } | |
2aca: 1c08 adds r0, r1, #0 | |
virtual size_t write(uint8_t c) { serial3_putchar(c); return 1; } | |
virtual size_t write(unsigned long n) { return write((uint8_t)n); } | |
virtual size_t write(long n) { return write((uint8_t)n); } | |
virtual size_t write(unsigned int n) { return write((uint8_t)n); } | |
virtual size_t write(int n) { return write((uint8_t)n); } | |
virtual size_t write(const uint8_t *buffer, size_t size) | |
2acc: 1c14 adds r4, r2, #0 | |
{ serial3_write(buffer, size); return size; } | |
2ace: 1c11 adds r1, r2, #0 | |
2ad0: f7ff fcf2 bl 24b8 <serial3_write> | |
2ad4: 1c20 adds r0, r4, #0 | |
2ad6: bd10 pop {r4, pc} | |
00002ad8 <_ZN15HardwareSerial35writeEPKc>: | |
virtual size_t write(const char *str) { size_t len = strlen(str); | |
2ad8: b538 push {r3, r4, r5, lr} | |
2ada: 1c08 adds r0, r1, #0 | |
2adc: 1c0d adds r5, r1, #0 | |
2ade: f000 f928 bl 2d32 <strlen> | |
2ae2: 1c04 adds r4, r0, #0 | |
serial3_write((const uint8_t *)str, len); | |
2ae4: 1c21 adds r1, r4, #0 | |
2ae6: 1c28 adds r0, r5, #0 | |
2ae8: f7ff fce6 bl 24b8 <serial3_write> | |
return len; } | |
2aec: 1c20 adds r0, r4, #0 | |
2aee: bd38 pop {r3, r4, r5, pc} | |
00002af0 <_Z12serialEvent3v>: | |
#include "HardwareSerial.h" | |
HardwareSerial3 Serial3; | |
void serialEvent3() __attribute__((weak)); | |
void serialEvent3() {} | |
2af0: 4770 bx lr | |
2af2: ffff 4b04 vtbl.8 d20, {d15-d18}, d4 | |
00002af4 <_GLOBAL__sub_I_Serial3>: | |
2af4: 4b04 ldr r3, [pc, #16] ; (2b08 <_GLOBAL__sub_I_Serial3+0x14>) | |
2af6: 2200 movs r2, #0 | |
2af8: 711a strb r2, [r3, #4] | |
2afa: 731a strb r2, [r3, #12] | |
2afc: 21fa movs r1, #250 ; 0xfa | |
operator bool() { return true; } | |
}; | |
extern HardwareSerial2 Serial2; | |
extern void serialEvent2(void); | |
class HardwareSerial3 : public HardwareSerial | |
2afe: 4a03 ldr r2, [pc, #12] ; (2b0c <_GLOBAL__sub_I_Serial3+0x18>) | |
2b00: 0089 lsls r1, r1, #2 | |
2b02: 6099 str r1, [r3, #8] | |
2b04: 601a str r2, [r3, #0] | |
2b06: 4770 bx lr | |
2b08: 2000011c .word 0x2000011c | |
2b0c: 00002ff8 .word 0x00002ff8 | |
00002b10 <__gnu_thumb1_case_uqi>: | |
2b10: b402 push {r1} | |
2b12: 4671 mov r1, lr | |
2b14: 0849 lsrs r1, r1, #1 | |
2b16: 0049 lsls r1, r1, #1 | |
2b18: 5c09 ldrb r1, [r1, r0] | |
2b1a: 0049 lsls r1, r1, #1 | |
2b1c: 448e add lr, r1 | |
2b1e: bc02 pop {r1} | |
2b20: 4770 bx lr | |
2b22: 46c0 nop ; (mov r8, r8) | |
00002b24 <__gnu_thumb1_case_uhi>: | |
2b24: b403 push {r0, r1} | |
2b26: 4671 mov r1, lr | |
2b28: 0849 lsrs r1, r1, #1 | |
2b2a: 0040 lsls r0, r0, #1 | |
2b2c: 0049 lsls r1, r1, #1 | |
2b2e: 5a09 ldrh r1, [r1, r0] | |
2b30: 0049 lsls r1, r1, #1 | |
2b32: 448e add lr, r1 | |
2b34: bc03 pop {r0, r1} | |
2b36: 4770 bx lr | |
00002b38 <__aeabi_uidiv>: | |
2b38: 2900 cmp r1, #0 | |
2b3a: d034 beq.n 2ba6 <.udivsi3_skip_div0_test+0x6a> | |
00002b3c <.udivsi3_skip_div0_test>: | |
2b3c: 2301 movs r3, #1 | |
2b3e: 2200 movs r2, #0 | |
2b40: b410 push {r4} | |
2b42: 4288 cmp r0, r1 | |
2b44: d32c bcc.n 2ba0 <.udivsi3_skip_div0_test+0x64> | |
2b46: 2401 movs r4, #1 | |
2b48: 0724 lsls r4, r4, #28 | |
2b4a: 42a1 cmp r1, r4 | |
2b4c: d204 bcs.n 2b58 <.udivsi3_skip_div0_test+0x1c> | |
2b4e: 4281 cmp r1, r0 | |
2b50: d202 bcs.n 2b58 <.udivsi3_skip_div0_test+0x1c> | |
2b52: 0109 lsls r1, r1, #4 | |
2b54: 011b lsls r3, r3, #4 | |
2b56: e7f8 b.n 2b4a <.udivsi3_skip_div0_test+0xe> | |
2b58: 00e4 lsls r4, r4, #3 | |
2b5a: 42a1 cmp r1, r4 | |
2b5c: d204 bcs.n 2b68 <.udivsi3_skip_div0_test+0x2c> | |
2b5e: 4281 cmp r1, r0 | |
2b60: d202 bcs.n 2b68 <.udivsi3_skip_div0_test+0x2c> | |
2b62: 0049 lsls r1, r1, #1 | |
2b64: 005b lsls r3, r3, #1 | |
2b66: e7f8 b.n 2b5a <.udivsi3_skip_div0_test+0x1e> | |
2b68: 4288 cmp r0, r1 | |
2b6a: d301 bcc.n 2b70 <.udivsi3_skip_div0_test+0x34> | |
2b6c: 1a40 subs r0, r0, r1 | |
2b6e: 431a orrs r2, r3 | |
2b70: 084c lsrs r4, r1, #1 | |
2b72: 42a0 cmp r0, r4 | |
2b74: d302 bcc.n 2b7c <.udivsi3_skip_div0_test+0x40> | |
2b76: 1b00 subs r0, r0, r4 | |
2b78: 085c lsrs r4, r3, #1 | |
2b7a: 4322 orrs r2, r4 | |
2b7c: 088c lsrs r4, r1, #2 | |
2b7e: 42a0 cmp r0, r4 | |
2b80: d302 bcc.n 2b88 <.udivsi3_skip_div0_test+0x4c> | |
2b82: 1b00 subs r0, r0, r4 | |
2b84: 089c lsrs r4, r3, #2 | |
2b86: 4322 orrs r2, r4 | |
2b88: 08cc lsrs r4, r1, #3 | |
2b8a: 42a0 cmp r0, r4 | |
2b8c: d302 bcc.n 2b94 <.udivsi3_skip_div0_test+0x58> | |
2b8e: 1b00 subs r0, r0, r4 | |
2b90: 08dc lsrs r4, r3, #3 | |
2b92: 4322 orrs r2, r4 | |
2b94: 2800 cmp r0, #0 | |
2b96: d003 beq.n 2ba0 <.udivsi3_skip_div0_test+0x64> | |
2b98: 091b lsrs r3, r3, #4 | |
2b9a: d001 beq.n 2ba0 <.udivsi3_skip_div0_test+0x64> | |
2b9c: 0909 lsrs r1, r1, #4 | |
2b9e: e7e3 b.n 2b68 <.udivsi3_skip_div0_test+0x2c> | |
2ba0: 1c10 adds r0, r2, #0 | |
2ba2: bc10 pop {r4} | |
2ba4: 4770 bx lr | |
2ba6: 2800 cmp r0, #0 | |
2ba8: d001 beq.n 2bae <.udivsi3_skip_div0_test+0x72> | |
2baa: 2000 movs r0, #0 | |
2bac: 43c0 mvns r0, r0 | |
2bae: b407 push {r0, r1, r2} | |
2bb0: 4802 ldr r0, [pc, #8] ; (2bbc <.udivsi3_skip_div0_test+0x80>) | |
2bb2: a102 add r1, pc, #8 ; (adr r1, 2bbc <.udivsi3_skip_div0_test+0x80>) | |
2bb4: 1840 adds r0, r0, r1 | |
2bb6: 9002 str r0, [sp, #8] | |
2bb8: bd03 pop {r0, r1, pc} | |
2bba: 46c0 nop ; (mov r8, r8) | |
2bbc: 000000d9 .word 0x000000d9 | |
00002bc0 <__aeabi_uidivmod>: | |
2bc0: 2900 cmp r1, #0 | |
2bc2: d0f0 beq.n 2ba6 <.udivsi3_skip_div0_test+0x6a> | |
2bc4: b503 push {r0, r1, lr} | |
2bc6: f7ff ffb9 bl 2b3c <.udivsi3_skip_div0_test> | |
2bca: bc0e pop {r1, r2, r3} | |
2bcc: 4342 muls r2, r0 | |
2bce: 1a89 subs r1, r1, r2 | |
2bd0: 4718 bx r3 | |
2bd2: 46c0 nop ; (mov r8, r8) | |
00002bd4 <__aeabi_idiv>: | |
2bd4: 2900 cmp r1, #0 | |
2bd6: d041 beq.n 2c5c <.divsi3_skip_div0_test+0x84> | |
00002bd8 <.divsi3_skip_div0_test>: | |
2bd8: b410 push {r4} | |
2bda: 1c04 adds r4, r0, #0 | |
2bdc: 404c eors r4, r1 | |
2bde: 46a4 mov ip, r4 | |
2be0: 2301 movs r3, #1 | |
2be2: 2200 movs r2, #0 | |
2be4: 2900 cmp r1, #0 | |
2be6: d500 bpl.n 2bea <.divsi3_skip_div0_test+0x12> | |
2be8: 4249 negs r1, r1 | |
2bea: 2800 cmp r0, #0 | |
2bec: d500 bpl.n 2bf0 <.divsi3_skip_div0_test+0x18> | |
2bee: 4240 negs r0, r0 | |
2bf0: 4288 cmp r0, r1 | |
2bf2: d32c bcc.n 2c4e <.divsi3_skip_div0_test+0x76> | |
2bf4: 2401 movs r4, #1 | |
2bf6: 0724 lsls r4, r4, #28 | |
2bf8: 42a1 cmp r1, r4 | |
2bfa: d204 bcs.n 2c06 <.divsi3_skip_div0_test+0x2e> | |
2bfc: 4281 cmp r1, r0 | |
2bfe: d202 bcs.n 2c06 <.divsi3_skip_div0_test+0x2e> | |
2c00: 0109 lsls r1, r1, #4 | |
2c02: 011b lsls r3, r3, #4 | |
2c04: e7f8 b.n 2bf8 <.divsi3_skip_div0_test+0x20> | |
2c06: 00e4 lsls r4, r4, #3 | |
2c08: 42a1 cmp r1, r4 | |
2c0a: d204 bcs.n 2c16 <.divsi3_skip_div0_test+0x3e> | |
2c0c: 4281 cmp r1, r0 | |
2c0e: d202 bcs.n 2c16 <.divsi3_skip_div0_test+0x3e> | |
2c10: 0049 lsls r1, r1, #1 | |
2c12: 005b lsls r3, r3, #1 | |
2c14: e7f8 b.n 2c08 <.divsi3_skip_div0_test+0x30> | |
2c16: 4288 cmp r0, r1 | |
2c18: d301 bcc.n 2c1e <.divsi3_skip_div0_test+0x46> | |
2c1a: 1a40 subs r0, r0, r1 | |
2c1c: 431a orrs r2, r3 | |
2c1e: 084c lsrs r4, r1, #1 | |
2c20: 42a0 cmp r0, r4 | |
2c22: d302 bcc.n 2c2a <.divsi3_skip_div0_test+0x52> | |
2c24: 1b00 subs r0, r0, r4 | |
2c26: 085c lsrs r4, r3, #1 | |
2c28: 4322 orrs r2, r4 | |
2c2a: 088c lsrs r4, r1, #2 | |
2c2c: 42a0 cmp r0, r4 | |
2c2e: d302 bcc.n 2c36 <.divsi3_skip_div0_test+0x5e> | |
2c30: 1b00 subs r0, r0, r4 | |
2c32: 089c lsrs r4, r3, #2 | |
2c34: 4322 orrs r2, r4 | |
2c36: 08cc lsrs r4, r1, #3 | |
2c38: 42a0 cmp r0, r4 | |
2c3a: d302 bcc.n 2c42 <.divsi3_skip_div0_test+0x6a> | |
2c3c: 1b00 subs r0, r0, r4 | |
2c3e: 08dc lsrs r4, r3, #3 | |
2c40: 4322 orrs r2, r4 | |
2c42: 2800 cmp r0, #0 | |
2c44: d003 beq.n 2c4e <.divsi3_skip_div0_test+0x76> | |
2c46: 091b lsrs r3, r3, #4 | |
2c48: d001 beq.n 2c4e <.divsi3_skip_div0_test+0x76> | |
2c4a: 0909 lsrs r1, r1, #4 | |
2c4c: e7e3 b.n 2c16 <.divsi3_skip_div0_test+0x3e> | |
2c4e: 1c10 adds r0, r2, #0 | |
2c50: 4664 mov r4, ip | |
2c52: 2c00 cmp r4, #0 | |
2c54: d500 bpl.n 2c58 <.divsi3_skip_div0_test+0x80> | |
2c56: 4240 negs r0, r0 | |
2c58: bc10 pop {r4} | |
2c5a: 4770 bx lr | |
2c5c: 2800 cmp r0, #0 | |
2c5e: d006 beq.n 2c6e <.divsi3_skip_div0_test+0x96> | |
2c60: db03 blt.n 2c6a <.divsi3_skip_div0_test+0x92> | |
2c62: 2000 movs r0, #0 | |
2c64: 43c0 mvns r0, r0 | |
2c66: 0840 lsrs r0, r0, #1 | |
2c68: e001 b.n 2c6e <.divsi3_skip_div0_test+0x96> | |
2c6a: 2080 movs r0, #128 ; 0x80 | |
2c6c: 0600 lsls r0, r0, #24 | |
2c6e: b407 push {r0, r1, r2} | |
2c70: 4802 ldr r0, [pc, #8] ; (2c7c <.divsi3_skip_div0_test+0xa4>) | |
2c72: a102 add r1, pc, #8 ; (adr r1, 2c7c <.divsi3_skip_div0_test+0xa4>) | |
2c74: 1840 adds r0, r0, r1 | |
2c76: 9002 str r0, [sp, #8] | |
2c78: bd03 pop {r0, r1, pc} | |
2c7a: 46c0 nop ; (mov r8, r8) | |
2c7c: 00000019 .word 0x00000019 | |
00002c80 <__aeabi_idivmod>: | |
2c80: 2900 cmp r1, #0 | |
2c82: d0eb beq.n 2c5c <.divsi3_skip_div0_test+0x84> | |
2c84: b503 push {r0, r1, lr} | |
2c86: f7ff ffa7 bl 2bd8 <.divsi3_skip_div0_test> | |
2c8a: bc0e pop {r1, r2, r3} | |
2c8c: 4342 muls r2, r0 | |
2c8e: 1a89 subs r1, r1, r2 | |
2c90: 4718 bx r3 | |
2c92: 46c0 nop ; (mov r8, r8) | |
00002c94 <__aeabi_idiv0>: | |
2c94: 4770 bx lr | |
2c96: 46c0 nop ; (mov r8, r8) | |
00002c98 <__clzsi2>: | |
2c98: 211c movs r1, #28 | |
2c9a: 2301 movs r3, #1 | |
2c9c: 041b lsls r3, r3, #16 | |
2c9e: 4298 cmp r0, r3 | |
2ca0: d301 bcc.n 2ca6 <__clzsi2+0xe> | |
2ca2: 0c00 lsrs r0, r0, #16 | |
2ca4: 3910 subs r1, #16 | |
2ca6: 0a1b lsrs r3, r3, #8 | |
2ca8: 4298 cmp r0, r3 | |
2caa: d301 bcc.n 2cb0 <__clzsi2+0x18> | |
2cac: 0a00 lsrs r0, r0, #8 | |
2cae: 3908 subs r1, #8 | |
2cb0: 091b lsrs r3, r3, #4 | |
2cb2: 4298 cmp r0, r3 | |
2cb4: d301 bcc.n 2cba <__clzsi2+0x22> | |
2cb6: 0900 lsrs r0, r0, #4 | |
2cb8: 3904 subs r1, #4 | |
2cba: a202 add r2, pc, #8 ; (adr r2, 2cc4 <__clzsi2+0x2c>) | |
2cbc: 5c10 ldrb r0, [r2, r0] | |
2cbe: 1840 adds r0, r0, r1 | |
2cc0: 4770 bx lr | |
2cc2: 46c0 nop ; (mov r8, r8) | |
2cc4: 02020304 .word 0x02020304 | |
2cc8: 01010101 .word 0x01010101 | |
... | |
00002cd4 <__libc_init_array>: | |
2cd4: b570 push {r4, r5, r6, lr} | |
2cd6: 4b0e ldr r3, [pc, #56] ; (2d10 <__libc_init_array+0x3c>) | |
2cd8: 4d0e ldr r5, [pc, #56] ; (2d14 <__libc_init_array+0x40>) | |
2cda: 2400 movs r4, #0 | |
2cdc: 1aed subs r5, r5, r3 | |
2cde: 10ad asrs r5, r5, #2 | |
2ce0: 1c1e adds r6, r3, #0 | |
2ce2: 42ac cmp r4, r5 | |
2ce4: d004 beq.n 2cf0 <__libc_init_array+0x1c> | |
2ce6: 00a3 lsls r3, r4, #2 | |
2ce8: 58f3 ldr r3, [r6, r3] | |
2cea: 4798 blx r3 | |
2cec: 3401 adds r4, #1 | |
2cee: e7f8 b.n 2ce2 <__libc_init_array+0xe> | |
2cf0: f000 f9ae bl 3050 <_init> | |
2cf4: 4b08 ldr r3, [pc, #32] ; (2d18 <__libc_init_array+0x44>) | |
2cf6: 4d09 ldr r5, [pc, #36] ; (2d1c <__libc_init_array+0x48>) | |
2cf8: 2400 movs r4, #0 | |
2cfa: 1aed subs r5, r5, r3 | |
2cfc: 10ad asrs r5, r5, #2 | |
2cfe: 1c1e adds r6, r3, #0 | |
2d00: 42ac cmp r4, r5 | |
2d02: d004 beq.n 2d0e <__libc_init_array+0x3a> | |
2d04: 00a3 lsls r3, r4, #2 | |
2d06: 58f3 ldr r3, [r6, r3] | |
2d08: 4798 blx r3 | |
2d0a: 3401 adds r4, #1 | |
2d0c: e7f8 b.n 2d00 <__libc_init_array+0x2c> | |
2d0e: bd70 pop {r4, r5, r6, pc} | |
2d10: 0000305c .word 0x0000305c | |
2d14: 0000305c .word 0x0000305c | |
2d18: 0000305c .word 0x0000305c | |
2d1c: 00003078 .word 0x00003078 | |
00002d20 <memcpy>: | |
2d20: b510 push {r4, lr} | |
2d22: 2300 movs r3, #0 | |
2d24: 4293 cmp r3, r2 | |
2d26: d003 beq.n 2d30 <memcpy+0x10> | |
2d28: 5ccc ldrb r4, [r1, r3] | |
2d2a: 54c4 strb r4, [r0, r3] | |
2d2c: 3301 adds r3, #1 | |
2d2e: e7f9 b.n 2d24 <memcpy+0x4> | |
2d30: bd10 pop {r4, pc} | |
00002d32 <strlen>: | |
2d32: 2300 movs r3, #0 | |
2d34: 5cc2 ldrb r2, [r0, r3] | |
2d36: 3301 adds r3, #1 | |
2d38: 2a00 cmp r2, #0 | |
2d3a: d1fb bne.n 2d34 <strlen+0x2> | |
2d3c: 1e58 subs r0, r3, #1 | |
2d3e: 4770 bx lr | |
2d40: 75746573 .word 0x75746573 | |
2d44: 65622070 .word 0x65622070 | |
2d48: 006e6967 .word 0x006e6967 | |
2d4c: 75746573 .word 0x75746573 | |
2d50: 3270 .short 0x3270 | |
... | |
00002d53 <heatmap_gp>: | |
2d53: 0000 0000 ff80 0000 ffe0 00ff ffff ffff ................ | |
2d63: 42ff . | |
00002d64 <digital_pin_to_info_PGM>: | |
2d64: 0042 f800 a040 4004 0001 0000 0042 f800 B...@[email protected]... | |
2d74: a044 4004 0002 0000 00c0 f800 c000 4004 D..@...........@ | |
2d84: 0001 0000 0000 f800 9004 4004 0002 0000 ...........@.... | |
2d94: 0000 f800 9008 4004 0004 0000 00c0 f800 .......@........ | |
2da4: c01c 4004 0080 0000 00c0 f800 c010 4004 ...@...........@ | |
2db4: 0010 0000 00c0 f800 c008 4004 0004 0000 ...........@.... | |
2dc4: 00c0 f800 c00c 4004 0008 0000 0080 f800 .......@........ | |
2dd4: b00c 4004 0008 0000 0080 f800 b010 4004 ...@...........@ | |
2de4: 0010 0000 0080 f800 b018 4004 0040 0000 ...........@@... | |
2df4: 0080 f800 b01c 4004 0080 0000 0080 f800 .......@........ | |
2e04: b014 4004 0020 0000 00c0 f800 c004 4004 ...@ ..........@ | |
2e14: 0002 0000 0080 f800 b000 4004 0001 0000 ...........@.... | |
2e24: 0040 f800 a000 4004 0001 0000 0040 f800 @......@....@... | |
2e34: a004 4004 0002 0000 0040 f800 a00c 4004 ...@....@......@ | |
2e44: 0008 0000 0040 f800 a008 4004 0004 0000 ....@......@.... | |
2e54: 00c0 f800 c014 4004 0020 0000 00c0 f800 .......@ ....... | |
2e64: c018 4004 0040 0000 0080 f800 b004 4004 ...@@..........@ | |
2e74: 0002 0000 0080 f800 b008 4004 0004 0000 ...........@.... | |
2e84: 0102 f800 d050 4004 0010 0000 0102 f800 ....P..@........ | |
2e94: d054 4004 0020 0000 0103 f800 d078 4004 T..@ .......x..@ | |
2ea4: 0040 0000 0a0d ffff ffff ffff @........... | |
00002eb0 <_ZTV16usb_serial_class>: | |
... | |
2eb8: 1475 0000 147f 0000 144d 0000 1455 0000 u.......M...U... | |
2ec8: 145d 0000 1465 0000 146d 0000 0000 0000 ]...e...m....... | |
00002ed8 <usb_endpoint_config_table>: | |
2ed8: 1500 1519 .... | |
00002edc <usb_descriptor_list>: | |
2edc: 0100 0000 fd69 1fff 0012 0000 0200 0000 ....i........... | |
2eec: fd94 1fff 0043 0000 0300 0000 fdee 1fff ....C........... | |
2efc: 0000 0000 0301 0409 fd7c 1fff 0000 0000 ........|....... | |
2f0c: 0302 0409 fdd8 1fff 0000 0000 0303 0409 ................ | |
2f1c: fdf2 1fff 0000 0000 0000 0000 0000 0000 ................ | |
2f2c: 0000 0000 .... | |
00002f30 <_ZTV14HardwareSerial>: | |
... | |
2f38: 2831 0000 2849 0000 2801 0000 2811 0000 1(..I(...(...(.. | |
2f48: 2809 0000 2819 0000 2781 0000 2799 0000 .(...(...'...'.. | |
2f58: 27b9 0000 27c1 0000 27cb 0000 27d5 0000 .'...'...'...'.. | |
2f68: 27e1 0000 27f1 0000 2821 0000 2829 0000 .'...'..!(..)(.. | |
2f78: 2751 0000 275d 0000 2769 0000 2775 0000 Q'..]'..i'..u'.. | |
2f88: 2859 0000 283d 0000 Y(..=(.. | |
00002f90 <_ZTV15HardwareSerial2>: | |
... | |
2f98: 2971 0000 2989 0000 2941 0000 2951 0000 q)...)..A)..Q).. | |
2fa8: 2949 0000 2959 0000 28c1 0000 28d9 0000 I)..Y)...(...(.. | |
2fb8: 28f9 0000 2901 0000 290b 0000 2915 0000 .(...)...)...).. | |
2fc8: 2921 0000 2931 0000 2961 0000 2969 0000 !)..1)..a)..i).. | |
2fd8: 2891 0000 289d 0000 28a9 0000 28b5 0000 .(...(...(...(.. | |
2fe8: 2999 0000 297d 0000 .)..}).. | |
00002ff0 <_ZTV15HardwareSerial3>: | |
... | |
2ff8: 2ab1 0000 2ac9 0000 2a81 0000 2a91 0000 .*...*...*...*.. | |
3008: 2a89 0000 2a99 0000 2a01 0000 2a19 0000 .*...*...*...*.. | |
3018: 2a39 0000 2a41 0000 2a4b 0000 2a55 0000 9*..A*..K*..U*.. | |
3028: 2a61 0000 2a71 0000 2aa1 0000 2aa9 0000 a*..q*...*...*.. | |
3038: 29d1 0000 29dd 0000 29e9 0000 29f5 0000 .)...)...)...).. | |
3048: 2ad9 0000 2abd 0000 .*...*.. | |
00003050 <_init>: | |
3050: b5f8 push {r3, r4, r5, r6, r7, lr} | |
3052: 46c0 nop ; (mov r8, r8) | |
3054: bcf8 pop {r3, r4, r5, r6, r7} | |
3056: bc08 pop {r3} | |
3058: 469e mov lr, r3 | |
305a: 4770 bx lr | |
0000305c <__init_array_start>: | |
305c: 00000439 .word 0x00000439 | |
3060: 000005b9 .word 0x000005b9 | |
3064: 000005cd .word 0x000005cd | |
3068: 0000148d .word 0x0000148d | |
306c: 00002875 .word 0x00002875 | |
3070: 000029b5 .word 0x000029b5 | |
3074: 00002af5 .word 0x00002af5 |
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