dwc-otg-stm32-change.patch

diff --git a/lib/usbd/backend/usbd_dwc_otg.c b/lib/usbd/backend/usbd_dwc_otg.c
index abd4a8f..3a8ec9c 100644
--- a/lib/usbd/backend/usbd_dwc_otg.c
+++ b/lib/usbd/backend/usbd_dwc_otg.c
@@ -44,8 +44,14 @@ void dwc_otg_init(usbd_device *usbd_dev)
 	REBASE(DWC_OTG_GINTSTS) = DWC_OTG_GINTSTS_MMIS;
 
 	REBASE(DWC_OTG_GUSBCFG) |= DWC_OTG_GUSBCFG_PHYSEL;
-	/* Enable VBUS sensing in device mode and power down the PHY. */
-	REBASE(DWC_OTG_GCCFG) |= DWC_OTG_GCCFG_VBUSBSEN | DWC_OTG_GCCFG_PWRDWN;
+
+	/* Enable VBUS sensing in device mode and power down the PHY.
+	 * note: bit VBDEN and NOVBUSSENS are same */
+	REBASE(DWC_OTG_GCCFG) = DWC_OTG_GCCFG_PWRDWN | DWC_OTG_GCCFG_NOVBUSSENS |
+						DWC_OTG_GCCFG_VBUSASEN | DWC_OTG_GCCFG_VBUSBSEN;
+
+	/* make sure that SDIS is low */
+	REBASE(DWC_OTG_DCTL) &= ~DWC_OTG_DCTL_SDIS;
 
 	/* Wait for AHB idle. */
 	while (!(REBASE(DWC_OTG_GRSTCTL) & DWC_OTG_GRSTCTL_AHBIDL));