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leonardoalt/keccak.asm

Created January 22, 2025 09:07
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keccak.asm
use std::machines::large_field::binary::Binary;
use std::machines::range::Bit2;
use std::machines::range::Bit6;
use std::machines::range::Bit7;
use std::machines::range::Byte;
use std::machines::range::Byte2;
use std::machines::binary::ByteBinary;
use std::machines::split::ByteCompare;
use std::machines::large_field::shift::ByteShift;
use std::machines::hash::poseidon_gl_memory::PoseidonGLMemory;
use std::machines::large_field::shift::Shift;
use std::machines::split::split_gl::SplitGL;
let MIN_DEGREE_LOG: int = 5;
let MIN_DEGREE: int = 2**MIN_DEGREE_LOG;
let MAX_DEGREE_LOG: int = 18;
let MAIN_MAX_DEGREE: int = 2**MAX_DEGREE_LOG;
let LARGE_SUBMACHINES_MAX_DEGREE: int = 2**(MAX_DEGREE_LOG + 2);
machine Main with min_degree: MIN_DEGREE, max_degree: 262144 {
reg pc[@pc];
reg X[<=];
reg Y[<=];
reg Z[<=];
reg W[<=];
// We still need these registers for prover inputs.
reg query_arg_1;
reg query_arg_2;
std::machines::large_field::memory::Memory regs(byte2, MIN_DEGREE, LARGE_SUBMACHINES_MAX_DEGREE);
std::machines::large_field::memory::Memory memory(byte2, MIN_DEGREE, MAIN_MAX_DEGREE);
Binary binary(byte_binary, MIN_DEGREE, LARGE_SUBMACHINES_MAX_DEGREE);
Bit2 bit2;
Bit6 bit6;
Bit7 bit7;
Byte byte;
Byte2 byte2;
ByteBinary byte_binary;
ByteCompare byte_compare;
ByteShift byte_shift;
PoseidonGLMemory poseidon_gl(memory, split_gl, MIN_DEGREE, LARGE_SUBMACHINES_MAX_DEGREE);
Shift shift(byte_shift, MIN_DEGREE, LARGE_SUBMACHINES_MAX_DEGREE);
SplitGL split_gl(byte_compare, MIN_DEGREE, LARGE_SUBMACHINES_MAX_DEGREE);
let initial_memory: (fe, fe)[] = [
];
// Initial and final memory addresses of prover data.
// The data is to be filled in by the prover in this range.
let prover_data_start: fe = 268435456;
let prover_data_end: fe = 536870912;
// ================= Extra columns we use to hold temporary values inside instructions.
col witness tmp1_col;
col witness tmp2_col;
col witness tmp3_col;
col witness tmp4_col;
col witness X_b1;
col witness X_b2;
col witness X_b3;
col witness X_b4;
link => byte.check(X_b1);
link => byte.check(X_b2);
link => byte.check(X_b3);
link => byte.check(X_b4);
col witness Y_7bit;
link => bit7.check(Y_7bit);
col witness Y_15bit;
col witness Y_b5;
col witness Y_b6;
col witness Y_b7;
col witness Y_b8;
link => byte.check(Y_b5);
link => byte.check(Y_b6);
link => byte.check(Y_b7);
link => byte.check(Y_b8);
col witness REM_b1;
col witness REM_b2;
col witness REM_b3;
col witness REM_b4;
link => byte.check(REM_b1);
link => byte.check(REM_b2);
link => byte.check(REM_b3);
link => byte.check(REM_b4);
// TODO std::utils::force_bool doesn't work with witgen at this level
col witness wrap_bit;
wrap_bit * (1 - wrap_bit) = 0;
// We need to add these inline instead of using std::utils::is_zero
// because when XX is not constrained, witgen will try to set XX,
// XX_inv and XXIsZero to zero, which fails this constraint.
// Therefore, we have to activate constrained whenever XXIsZero is used.
// XXIsZero = 1 - XX * XX_inv
col witness XX, XX_inv, XXIsZero;
std::utils::force_bool(XXIsZero);
XXIsZero * XX = 0;
// =============== Register memory =======================
// Get the value in register Y.
instr get_reg Y -> X link ~> X = regs.mload(Y, STEP);
// Set the value in register X to the value in register Y.
instr set_reg X, Y -> link ~> regs.mstore(X, STEP, Y);
// ================ Publics ==================
std::machines::write_once_memory_with_8_publics::WriteOnceMemoryWith8Publics publics;
instr commit_public X, Y link => publics.access(tmp1_col, tmp2_col)
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP);
// ===========================================
// Increased by 4 in each step, because we do up to 4 register memory accesses per step
col fixed STEP(i) { 3000 * i };
// ============== memory instructions ==============
/// Loads one word from an address V = val(X) + Y, where V can be between 0 and 2**33 (sic!),
/// wraps the address to 32 bits and rounds it down to the next multiple of 4.
/// Writes the loaded word and the remainder of the division by 4 to registers Z and W,
/// respectively.
instr mload X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp3_col = memory.mload(X_b4 * 0x1000000 + X_b3 * 0x10000 + X_b2 * 0x100 + X_b1 * 4, STEP + 1)
link ~> regs.mstore(Z, STEP + 2, tmp3_col)
link ~> regs.mstore(W, STEP + 3, tmp4_col)
link => bit2.check(tmp4_col)
link => bit6.check(X_b1)
{
tmp1_col + Y = wrap_bit * 2**32 + X_b4 * 0x1000000 + X_b3 * 0x10000 + X_b2 * 0x100 + X_b1 * 4 + tmp4_col
}
// Stores val(W) at address (V = val(X) - val(Y) + Z) % 2**32.
// V can be between 0 and 2**33.
// V should be a multiple of 4, but this instruction does not enforce it.
instr mstore X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> tmp3_col = regs.mload(W, STEP + 2)
link ~> memory.mstore(X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000, STEP + 3, tmp3_col)
{
tmp1_col - tmp2_col + Z = (X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000) + wrap_bit * 2**32
}
// ============== control-flow instructions ==============
// Load the value of label `l` into register X.
instr load_label X, l: label
link ~> regs.mstore(X, STEP, tmp1_col)
{
tmp1_col = l
}
// Jump to `l` and store the return program counter in register W.
instr jump l: label, W
link ~> regs.mstore(W, STEP, pc + 1)
{
pc' = l
}
// Jump to the address in register X and store the return program counter in register W.
instr jump_dyn X, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(W, STEP, pc + 1)
{
// TODO: using a tmp col here avoids an extra selector column, because
// links with next references on LHS can't currently be merged with other links
pc' = tmp1_col
}
// Jump to `l` if val(X) - val(Y) is nonzero, where X and Y are register ids.
instr branch_if_diff_nonzero X, Y, l: label
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp1_col - tmp2_col,
pc' = (1 - XXIsZero) * l + XXIsZero * (pc + 1)
}
// Jump to `l` if (val(X) - val(Y)) == Z, where X and Y are register ids and Z is a number.
instr branch_if_diff_equal X, Y, Z, l: label
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp1_col - tmp2_col - Z,
pc' = XXIsZero * l + (1 - XXIsZero) * (pc + 1)
}
// Skips W instructions if val(X) - val(Y) + Z is zero, where X and Y are register ids and Z is a
// constant offset.
instr skip_if_equal X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp1_col - tmp2_col + Z,
pc' = pc + 1 + (XXIsZero * W)
}
// Branches to `l` if V = val(X) - val(Y) - Z is positive, i.e. val(X) - val(Y) > Z,
// where X and Y are register ids and Z is a constant.
// V is required to be the difference of two 32-bit unsigned values.
// i.e. -2**32 < V < 2**32.
instr branch_if_diff_greater_than X, Y, Z, l: label
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
{
(tmp1_col - tmp2_col - Z) + 2**32 - 1 = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000 + wrap_bit * 2**32,
pc' = wrap_bit * l + (1 - wrap_bit) * (pc + 1)
}
// Stores 1 in register W if V = val(X) - val(Y) - Z is positive,
// i.e. val(X) - val(Y) > Z, where X and Y are register ids and Z is a constant.
// V is required to be the difference of two 32-bit unsigend values.
// i.e. -2**32 < V < 2**32
instr is_diff_greater_than X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> regs.mstore(W, STEP + 2, wrap_bit)
{
(tmp1_col - tmp2_col - Z) + 2**32 - 1 = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000 + wrap_bit * 2**32
}
// Stores val(X) * Z + W in register Y.
instr affine X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(Y, STEP + 1, tmp1_col * Z + W);
// ================= wrapping instructions =================
// Computes V = val(X) + val(Y) + Z, wraps it in 32 bits, and stores the result in register W.
// Requires 0 <= V < 2**33.
instr add_wrap X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> regs.mstore(W, STEP + 2, tmp3_col)
{
tmp1_col + tmp2_col + Z = tmp3_col + wrap_bit * 2**32,
tmp3_col = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
}
// Computes V = val(X) - val(Y) + Z, wraps it in 32 bits, and stores the result in register W.
// Requires -2**32 <= V < 2**32.
instr sub_wrap_with_offset X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> regs.mstore(W, STEP + 2, tmp3_col)
{
(tmp1_col - tmp2_col + Z) + 2**32 = tmp3_col + wrap_bit * 2**32,
tmp3_col = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
}
// ================= logical instructions =================
// Stores 1 in register W if the value in register X is zero,
// otherwise stores 0.
instr is_equal_zero X, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(W, STEP + 2, XXIsZero)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp1_col
}
// Stores 1 in register W if val(X) == val(Y), otherwise stores 0.
instr is_not_equal X, Y, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> regs.mstore(W, STEP + 2, tmp3_col)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp1_col - tmp2_col,
tmp3_col = 1 - XXIsZero
}
// Sign extends the value in register X and stores it in register Y.
// Input is a 32 bit unsigned number. We check bit 7 and set all higher bits to that value.
instr sign_extend_byte X, Y
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(Y, STEP + 3, tmp3_col)
{
// wrap_bit is used as sign_bit here.
tmp1_col = Y_7bit + wrap_bit * 0x80 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000,
tmp3_col = Y_7bit + wrap_bit * 0xffffff80
}
// Sign extends the value in register X and stores it in register Y.
// Input is a 32 bit unsigned number. We check bit 15 and set all higher bits to that value.
instr sign_extend_16_bits X, Y
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(Y, STEP + 3, tmp3_col)
{
Y_15bit = X_b1 + Y_7bit * 0x100,
// wrap_bit is used as sign_bit here.
tmp1_col = Y_15bit + wrap_bit * 0x8000 + X_b3 * 0x10000 + X_b4 * 0x1000000,
tmp3_col = Y_15bit + wrap_bit * 0xffff8000
}
// Converts the value in register X to a signed number and stores it in register Y.
// Input is a 32 bit unsigned number (0 <= val(X) < 2**32) interpreted as a two's complement numbers.
// Returns a signed number (-2**31 <= val(Y) < 2**31).
instr to_signed X, Y
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(Y, STEP + 1, tmp3_col)
{
// wrap_bit is used as sign_bit here.
tmp1_col = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + Y_7bit * 0x1000000 + wrap_bit * 0x80000000,
tmp3_col = tmp1_col - wrap_bit * 0x100000000
}
// ======================= assertions =========================
instr fail
link ~> tmp1_col = regs.mload(0, STEP)
{
tmp1_col = 1
}
// Wraps V = val(X) * Y and stores it in register Z,
// where X is a register and Y is a constant factor.
// Removes up to 16 bits beyond 32
// TODO is this really safe?
instr wrap16 X, Y, Z
link ~> tmp1_col = regs.mload(X, STEP)
link ~> regs.mstore(Z, STEP + 3, tmp3_col)
{
(tmp1_col * Y) = Y_b5 * 2**32 + Y_b6 * 2**40 + tmp3_col,
tmp3_col = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
}
// Computes Q = val(Y) / val(X) and R = val(Y) % val(X) and stores them in registers Z and W.
instr divremu Y, X, Z, W
link ~> tmp1_col = regs.mload(Y, STEP)
link ~> tmp2_col = regs.mload(X, STEP + 1)
link ~> regs.mstore(Z, STEP + 2, tmp3_col)
link ~> regs.mstore(W, STEP + 3, tmp4_col)
{
XXIsZero = 1 - XX * XX_inv,
XX = tmp2_col,
// if X is zero, remainder is set to dividend, as per RISC-V specification:
tmp2_col * tmp3_col + tmp4_col = tmp1_col,
// remainder >= 0:
tmp4_col = REM_b1 + REM_b2 * 0x100 + REM_b3 * 0x10000 + REM_b4 * 0x1000000,
// remainder < divisor, conditioned to val(X) not being 0:
(1 - XXIsZero) * (tmp2_col - tmp4_col - 1 - Y_b5 - Y_b6 * 0x100 - Y_b7 * 0x10000 - Y_b8 * 0x1000000) = 0,
// in case X is zero, we set quotient according to RISC-V specification
XXIsZero * (tmp3_col - 0xffffffff) = 0,
// quotient is 32 bits:
tmp3_col = X_b1 + X_b2 * 0x100 + X_b3 * 0x10000 + X_b4 * 0x1000000
}
// Computes V = val(X) * val(Y) and
// stores the lower 32 bits in register Z and the upper 32 bits in register W.
instr mul X, Y, Z, W
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> (tmp3_col, tmp4_col) = split_gl.split(tmp1_col * tmp2_col)
link ~> regs.mstore(Z, STEP + 2, tmp3_col)
link ~> regs.mstore(W, STEP + 3, tmp4_col);
// ================= ground field arithmetic =================
// Inverts a Goldilocks field value inplace.
//
// X and Y are low and high limbs of the field element to invert, respectively.
//
// Unsolvable if the value is 0.
instr invert_gl X, Y
link ~> tmp1_col = regs.mload(X, STEP)
link ~> tmp2_col = regs.mload(Y, STEP + 1)
link ~> (tmp3_col, tmp4_col) = split_gl.split(XX_inv)
link ~> regs.mstore(X, STEP + 2, tmp3_col)
link ~> regs.mstore(Y, STEP + 3, tmp4_col)
{
XX_inv * (tmp1_col + tmp2_col * 2**32) = 1
}
// ================= submachine instructions =================
instr and X, Y, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> tmp3_col = binary.and(tmp1_col, tmp2_col + Z) link ~> regs.mstore(W, STEP + 3, tmp3_col){ }
instr or X, Y, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> tmp3_col = binary.or(tmp1_col, tmp2_col + Z) link ~> regs.mstore(W, STEP + 3, tmp3_col){ }
instr xor X, Y, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> tmp3_col = binary.xor(tmp1_col, tmp2_col + Z) link ~> regs.mstore(W, STEP + 3, tmp3_col){ }
instr poseidon_gl X, Y link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> poseidon_gl.poseidon_permutation(tmp1_col, tmp2_col, STEP){ tmp3_col * 4 = tmp1_col, tmp4_col * 4 = tmp2_col, tmp3_col = X_b1 + X_b2 * 256 + X_b3 * 65536 + X_b4 * 16777216, tmp4_col = Y_b5 + Y_b6 * 256 + Y_b7 * 65536 + Y_b8 * 16777216 }
instr shl X, Y, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> tmp3_col = shift.shl(tmp1_col, tmp2_col + Z) link ~> regs.mstore(W, STEP + 3, tmp3_col){ }
instr shr X, Y, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> tmp2_col = regs.mload(Y, STEP + 1) link ~> tmp3_col = shift.shr(tmp1_col, tmp2_col + Z) link ~> regs.mstore(W, STEP + 3, tmp3_col){ }
instr split_gl X, Z, W link ~> tmp1_col = regs.mload(X, STEP) link ~> (tmp3_col, tmp4_col) = split_gl.split(tmp1_col) link ~> regs.mstore(Z, STEP + 2, tmp3_col) link ~> regs.mstore(W, STEP + 3, tmp4_col){ }
// ================= bootloader instructions =================
// ================= compiled program =================
function main {
.debug file 1 "/home/leo/devel/powdr/riscv/tests/riscv_data/keccak/src" "main.rs";
.debug file 2 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice" "index.rs";
.debug file 3 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mod.rs";
.debug file 4 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 5 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "take.rs";
.debug file 6 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "index_range.rs";
.debug file 7 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "cycle.rs";
.debug file 8 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice" "mod.rs";
.debug file 9 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/array" "iter.rs";
.debug file 10 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "option.rs";
.debug file 11 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "const_ptr.rs";
.debug file 12 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/mem" "maybe_uninit.rs";
.debug file 13 "/home/leo/.cargo/registry/src/index.crates.io-6f17d22bba15001f/tiny-keccak-2.0.2/src" "keccakf.rs";
.debug file 14 "/home/leo/.cargo/registry/src/index.crates.io-6f17d22bba15001f/tiny-keccak-2.0.2/src" "keccak.rs";
.debug file 15 "/home/leo/.cargo/registry/src/index.crates.io-6f17d22bba15001f/tiny-keccak-2.0.2/src" "lib.rs";
.debug file 16 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice" "index.rs";
.debug file 17 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter" "range.rs";
.debug file 18 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mut_ptr.rs";
.debug file 19 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "const_ptr.rs";
.debug file 20 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/array" "mod.rs";
.debug file 21 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "intrinsics.rs";
.debug file 22 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice" "mod.rs";
.debug file 23 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 24 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 25 "/home/leo/devel/powdr/riscv-runtime/src" "commit.rs";
.debug file 26 "/home/leo/devel/powdr/riscv-runtime/src" "no_std_support.rs";
.debug file 27 "/home/leo/devel/powdr/riscv-runtime/src" "allocator.rs";
.debug file 28 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/fmt" "mod.rs";
.debug file 29 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/char" "methods.rs";
.debug file 30 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "option.rs";
.debug file 31 "/home/leo/devel/powdr/riscv-runtime/src" "ecall.rs";
.debug file 32 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "non_null.rs";
.debug file 33 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice/iter" "macros.rs";
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.debug file 196 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/slice/sort/shared" "smallsort.rs";
.debug file 197 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "flatten.rs";
.debug file 198 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "fuse.rs";
.debug file 199 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "internal_macros.rs";
.debug file 200 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "take_while.rs";
.debug file 201 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter" "mod.rs";
.debug file 202 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "try_trait.rs";
.debug file 203 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/str" "converts.rs";
.debug file 204 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/str" "error.rs";
.debug file 205 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/str" "lossy.rs";
.debug file 206 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "time.rs";
.debug file 207 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/unicode" "printable.rs";
.debug file 208 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/task" "wake.rs";
.debug file 209 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/alloc" "layout.rs";
.debug file 210 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/alloc" "mod.rs";
.debug file 211 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num/dec2flt" "number.rs";
.debug file 212 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "arith.rs";
.debug file 213 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num/dec2flt" "slow.rs";
.debug file 214 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 215 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/iter/adapters" "chain.rs";
.debug file 216 "/rust/deps/compiler_builtins-0.1.114/src/mem" "impls.rs";
.debug file 217 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 218 "/rust/deps/compiler_builtins-0.1.114/src/mem" "mod.rs";
.debug file 219 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 220 "/rust/deps/compiler_builtins-0.1.114/src/int" "udiv.rs";
.debug file 221 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 222 "/rust/deps/compiler_builtins-0.1.114/src/int/specialized_div_rem" "delegate.rs";
.debug file 223 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 224 "/rust/deps/compiler_builtins-0.1.114/src" "lib.rs";
.debug file 225 "/rust/deps/compiler_builtins-0.1.114/src/int/specialized_div_rem" "norm_shift.rs";
.debug file 226 "/rust/deps/compiler_builtins-0.1.114/src/int/specialized_div_rem" "mod.rs";
.debug file 227 "/rust/deps/compiler_builtins-0.1.114/src/int/specialized_div_rem" "binary_long.rs";
.debug file 228 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 229 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 230 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 231 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 232 "/rust/deps/compiler_builtins-0.1.114/src/float" "div.rs";
.debug file 233 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 234 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "arith.rs";
.debug file 235 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "int_macros.rs";
.debug file 236 "/rust/deps/compiler_builtins-0.1.114/src/float" "mod.rs";
.debug file 237 "/rust/deps/compiler_builtins-0.1.114/src/int" "mod.rs";
.debug file 238 "/rust/deps/compiler_builtins-0.1.114/src" "lib.rs";
.debug file 239 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 240 "/rust/deps/compiler_builtins-0.1.114/src/float" "mod.rs";
.debug file 241 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "int_macros.rs";
.debug file 242 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 243 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 244 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 245 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 246 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 247 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 248 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 249 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 250 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 251 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 252 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 253 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 254 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 255 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 256 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 257 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 258 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 259 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 260 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 261 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 262 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 263 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 264 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 265 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 266 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 267 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 268 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 269 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 270 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 271 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 272 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 273 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 274 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 275 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 276 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 277 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 278 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 279 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 280 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 281 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 282 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 283 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 284 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 285 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 286 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 287 "/rust/deps/compiler_builtins-0.1.114/src/float" "mul.rs";
.debug file 288 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 289 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "int_macros.rs";
.debug file 290 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "arith.rs";
.debug file 291 "/rust/deps/compiler_builtins-0.1.114/src/float" "mod.rs";
.debug file 292 "/rust/deps/compiler_builtins-0.1.114/src/int" "mod.rs";
.debug file 293 "/rust/deps/compiler_builtins-0.1.114/src" "lib.rs";
.debug file 294 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 295 "/rust/deps/compiler_builtins-0.1.114/src/float" "mod.rs";
.debug file 296 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "int_macros.rs";
.debug file 297 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 298 "/rust/deps/compiler_builtins-0.1.114/src/int" "udiv.rs";
.debug file 299 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 300 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 301 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 302 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 303 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 304 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 305 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 306 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 307 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 308 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 309 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 310 "/rust/deps/compiler_builtins-0.1.114/src/float" "conv.rs";
.debug file 311 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 312 "/rust/deps/compiler_builtins-0.1.114/src/float" "conv.rs";
.debug file 313 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 314 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 315 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 316 "/rust/deps/compiler_builtins-0.1.114/src/int" "udiv.rs";
.debug file 317 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 318 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 319 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 320 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 321 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 322 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 323 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 324 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 325 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 326 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 327 "/rust/deps/compiler_builtins-0.1.114/src/mem" "impls.rs";
.debug file 328 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 329 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mut_ptr.rs";
.debug file 330 "/rust/deps/compiler_builtins-0.1.114/src/mem" "mod.rs";
.debug file 331 "/rust/deps/compiler_builtins-0.1.114/src/mem" "impls.rs";
.debug file 332 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 333 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 334 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mut_ptr.rs";
.debug file 335 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 336 "/rust/deps/compiler_builtins-0.1.114/src/int" "mul.rs";
.debug file 337 "/rust/deps/compiler_builtins-0.1.114/src/int" "mod.rs";
.debug file 338 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 339 "/rust/deps/compiler_builtins-0.1.114/src/int" "mul.rs";
.debug file 340 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 341 "/rust/deps/compiler_builtins-0.1.114/src/int" "mod.rs";
.debug file 342 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 343 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 344 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 345 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 346 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 347 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 348 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 349 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 350 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 351 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 352 "/rust/deps/compiler_builtins-0.1.114/src/int" "udiv.rs";
.debug file 353 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 354 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 355 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 356 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 357 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 358 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ops" "bit.rs";
.debug file 359 "/rust/deps/compiler_builtins-0.1.114/src/float" "cmp.rs";
.debug file 360 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 361 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src" "cmp.rs";
.debug file 362 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 363 "/rust/deps/compiler_builtins-0.1.114/src/mem" "impls.rs";
.debug file 364 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 365 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mut_ptr.rs";
.debug file 366 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "const_ptr.rs";
.debug file 367 "/rust/deps/compiler_builtins-0.1.114/src/mem" "mod.rs";
.debug file 368 "/rust/deps/compiler_builtins-0.1.114/src/mem" "impls.rs";
.debug file 369 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 370 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 371 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "mut_ptr.rs";
.debug file 372 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/ptr" "const_ptr.rs";
.debug file 373 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
.debug file 374 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 375 "/rust/deps/compiler_builtins-0.1.114/src/float" "conv.rs";
.debug file 376 "/rustc/28a58f2fa7f0c46b8fab8237c02471a915924fe5/library/core/src/num" "uint_macros.rs";
.debug file 377 "/rust/deps/compiler_builtins-0.1.114/src/float" "conv.rs";
.debug file 378 "/rust/deps/compiler_builtins-0.1.114/src" "macros.rs";
jump __data_init, 1;
set_reg 0, 0;
jump __runtime_start, 1;
return;
__runtime_start:
set_reg 3, 536883056;
set_reg 2, 268433408;
jump main, 1;
jump halt, 1;
main:
.debug loc 1 8 0;
add_wrap 2, 0, 4294966800, 2;
mstore 2, 0, 492, 1;
mstore 2, 0, 488, 8;
mstore 2, 0, 484, 9;
mstore 2, 0, 480, 18;
mstore 2, 0, 476, 19;
mstore 2, 0, 472, 20;
mstore 2, 0, 468, 21;
mstore 2, 0, 28, 0;
mstore 2, 0, 24, 0;
mstore 2, 0, 20, 0;
mstore 2, 0, 16, 0;
mstore 2, 0, 12, 0;
mstore 2, 0, 8, 0;
mstore 2, 0, 4, 0;
mstore 2, 0, 0, 0;
.debug loc 1 11 22;
add_wrap 2, 0, 32, 10;
jump _ZN11tiny_keccak6keccak6Keccak4v25617h0427e82f7d976ee6E, 1;
.debug loc 1 0 22;
add_wrap 0, 0, 0, 10;
.debug loc 1 12 18;
set_reg 18, 536881008;
mstore 2, 0, 248, 18;
set_reg 19, 536881016;
mstore 2, 0, 252, 19;
add_wrap 2, 0, 264, 20;
mstore 2, 0, 264, 18;
mstore 2, 0, 268, 19;
add_wrap 0, 0, 4294967196, 9;
add_wrap 0, 0, 2, 21;
jump ___dot_L200008a0, 32;
___dot_L20000882:
.debug loc 2 117 14;
wrap16 10, 4, 11;
add_wrap 11, 20, 0, 11;
.debug loc 3 1399 9;
mload 11, 0, 11, 32;
.debug loc 4 573 17;
add_wrap 10, 0, 1, 8;
.debug loc 1 13 9;
add_wrap 2, 0, 32, 10;
add_wrap 0, 0, 8, 12;
jump _ZN67_$LT$tiny_keccak_dot__dot_keccak_dot__dot_Keccak$u20$as$u20$tiny_keccak_dot__dot_Hasher$GT$6update17h5e1123a11374d3c6E, 1;
.debug loc 5 37 12;
add_wrap 9, 0, 1, 9;
add_wrap 0, 8, 0, 10;
branch_if_diff_equal 9, 0, 0, ___dot_L200008b0;
___dot_L200008a0:
.debug loc 6 119 12;
branch_if_diff_nonzero 10, 21, ___dot_L20000882;
.debug loc 6 0 12;
add_wrap 0, 0, 0, 10;
.debug loc 7 37 17;
mstore 2, 0, 264, 18;
mstore 2, 0, 268, 19;
.debug loc 7 0 17;
jump ___dot_L20000882, 32;
___dot_L200008b0:
.debug loc 1 15 5;
add_wrap 2, 0, 248, 10;
add_wrap 2, 0, 32, 11;
add_wrap 0, 0, 216, 12;
jump memcpy, 1;
add_wrap 2, 0, 248, 10;
add_wrap 0, 2, 0, 11;
add_wrap 0, 0, 32, 12;
jump _ZN67_$LT$tiny_keccak_dot__dot_keccak_dot__dot_Keccak$u20$as$u20$tiny_keccak_dot__dot_Hasher$GT$8finalize17h247b04d82ac0f81fE, 1;
mload 2, 492, 1, 32;
mload 2, 488, 8, 32;
mload 2, 484, 9, 32;
mload 2, 480, 18, 32;
.debug loc 1 0 5;
mload 2, 476, 19, 32;
mload 2, 472, 20, 32;
mload 2, 468, 21, 32;
.debug loc 1 27 2;
add_wrap 2, 0, 496, 2;
jump_dyn 1, 32;
_ZN11tiny_keccak6keccak6Keccak4v25617h0427e82f7d976ee6E:
.debug loc 14 33 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 0, 10, 0, 8;
add_wrap 0, 0, 204, 12;
add_wrap 0, 0, 0, 11;
jump memset, 1;
add_wrap 0, 0, 136, 10;
mstore 8, 0, 204, 10;
add_wrap 0, 0, 1, 10;
mload 8, 208, 32, 33;
set_reg 34, 0xffff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xffff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 8, 33, 208, 32;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 14 35 6;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
_ZN67_$LT$tiny_keccak_dot__dot_keccak_dot__dot_Keccak$u20$as$u20$tiny_keccak_dot__dot_Hasher$GT$6update17h5e1123a11374d3c6E:
.debug loc 14 72 0;
add_wrap 2, 0, 4294967264, 2;
mstore 2, 0, 28, 1;
mstore 2, 0, 24, 8;
mstore 2, 0, 20, 9;
mstore 2, 0, 16, 18;
mstore 2, 0, 12, 19;
mstore 2, 0, 8, 20;
mstore 2, 0, 4, 21;
mstore 2, 0, 0, 22;
add_wrap 0, 10, 0, 19;
mload 10, 209, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 10;
add_wrap 0, 12, 0, 18;
.debug loc 15 0 34;
add_wrap 0, 11, 0, 20;
.debug loc 15 408 16;
branch_if_diff_equal 10, 0, 0, ___dot_L20000958;
.debug loc 15 409 13;
mload 19, 209, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 0, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 19, 33, 209, 32;
.debug loc 13 38 9;
add_wrap 0, 19, 0, 10;
jump _ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E, 1;
.debug loc 15 416 24;
mload 19, 204, 9, 32;
add_wrap 0, 0, 0, 10;
.debug loc 15 466 9;
mstore 19, 0, 200, 0;
.debug loc 15 418 15;
branch_if_diff_greater_than 9, 18, 0, ___dot_L2000096e;
jump ___dot_L20000972, 32;
___dot_L20000958:
.debug loc 15 416 36;
mload 19, 200, 10, 32;
.debug loc 15 416 24;
mload 19, 204, 9, 32;
sub_wrap_with_offset 9, 10, 0, 9;
.debug loc 15 418 15;
branch_if_diff_greater_than 18, 9, -1, ___dot_L20000972;
.debug loc 15 0 15;
add_wrap 0, 0, 200, 11;
branch_if_diff_greater_than 10, 11, 0, ___dot_L20000a46;
___dot_L2000096e:
add_wrap 0, 18, 0, 21;
jump ___dot_L200009e0, 32;
___dot_L20000972:
add_wrap 0, 0, 0, 8;
add_wrap 0, 0, 200, 22;
add_wrap 0, 18, 0, 21;
jump ___dot_L20000996, 32;
___dot_L2000097c:
.debug loc 13 38 9;
add_wrap 0, 19, 0, 10;
jump _ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E, 1;
.debug loc 15 421 13;
add_wrap 8, 9, 0, 8;
.debug loc 15 422 13;
sub_wrap_with_offset 21, 9, 0, 21;
.debug loc 15 423 20;
mload 19, 204, 9, 32;
.debug loc 15 0 20;
add_wrap 0, 0, 0, 10;
.debug loc 15 418 15;
branch_if_diff_greater_than 9, 21, 0, ___dot_L200009d4;
___dot_L20000996:
.debug loc 16 592 12;
branch_if_diff_greater_than 8, 18, 0, ___dot_L20000a5a;
.debug loc 16 601 12;
branch_if_diff_greater_than 10, 22, 0, ___dot_L20000a46;
.debug loc 16 455 27;
sub_wrap_with_offset 22, 10, 0, 11;
.debug loc 16 478 12;
branch_if_diff_greater_than 9, 11, 0, ___dot_L20000a6e;
.debug loc 15 419 0;
sub_wrap_with_offset 18, 8, 0, 11;
.debug loc 15 338 21;
branch_if_diff_greater_than 9, 11, 0, ___dot_L20000a2a;
.debug loc 17 752 12;
branch_if_diff_equal 9, 0, 0, ___dot_L2000097c;
.debug loc 15 419 0;
add_wrap 20, 8, 0, 11;
.debug loc 15 312 0;
add_wrap 19, 10, 0, 12;
.debug loc 17 752 12;
add_wrap 10, 9, 0, 10;
add_wrap 10, 19, 0, 10;
___dot_L200009bc:
.debug loc 15 344 33;
mload 11, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
.debug loc 15 344 21;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 14;
xor 13, 14, 0, 13;
mload 12, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 12, 33, 0, 32;
.debug loc 18 458 18;
add_wrap 12, 0, 1, 12;
.debug loc 19 442 18;
add_wrap 11, 0, 1, 11;
.debug loc 17 752 12;
branch_if_diff_nonzero 12, 10, ___dot_L200009bc;
jump ___dot_L2000097c, 32;
___dot_L200009d4:
.debug loc 16 592 12;
branch_if_diff_greater_than 8, 18, 0, ___dot_L20000a92;
.debug loc 16 0 12;
add_wrap 0, 0, 0, 10;
.debug loc 16 437 27;
sub_wrap_with_offset 18, 8, 0, 18;
.debug loc 16 117 14;
add_wrap 20, 8, 0, 20;
___dot_L200009e0:
.debug loc 16 0 14;
add_wrap 0, 0, 200, 11;
.debug loc 16 455 27;
sub_wrap_with_offset 11, 10, 0, 11;
.debug loc 16 478 12;
branch_if_diff_greater_than 21, 11, 0, ___dot_L20000a80;
.debug loc 15 338 21;
branch_if_diff_greater_than 21, 18, 0, ___dot_L20000a2a;
.debug loc 15 0 21;
add_wrap 21, 10, 0, 11;
.debug loc 17 752 12;
branch_if_diff_equal 21, 0, 0, ___dot_L20000a12;
.debug loc 15 312 0;
add_wrap 10, 19, 0, 10;
.debug loc 17 752 12;
add_wrap 19, 11, 0, 12;
___dot_L200009fc:
.debug loc 15 344 33;
mload 20, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
.debug loc 15 344 21;
mload 10, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 14;
xor 13, 14, 0, 13;
mload 10, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 10, 33, 0, 32;
.debug loc 18 458 18;
add_wrap 10, 0, 1, 10;
.debug loc 19 442 18;
add_wrap 20, 0, 1, 20;
.debug loc 17 752 12;
branch_if_diff_nonzero 10, 12, ___dot_L200009fc;
___dot_L20000a12:
.debug loc 15 428 9;
mstore 19, 0, 200, 11;
mload 2, 28, 1, 32;
mload 2, 24, 8, 32;
mload 2, 20, 9, 32;
.debug loc 15 0 9;
mload 2, 16, 18, 32;
mload 2, 12, 19, 32;
mload 2, 8, 20, 32;
mload 2, 4, 21, 32;
mload 2, 0, 22, 32;
.debug loc 14 74 6;
add_wrap 2, 0, 32, 2;
jump_dyn 1, 32;
___dot_L20000a2a:
.debug loc 15 338 13;
set_reg 10, 536881164;
set_reg 12, 536881204;
add_wrap 0, 0, 40, 11;
jump _ZN4core9panicking5panic17hb3b5b38e2fececcbE, 1;
___dot_L20000a46:
.debug loc 16 602 13;
set_reg 12, 536881132;
add_wrap 0, 0, 200, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
___dot_L20000a5a:
.debug loc 16 593 13;
set_reg 12, 536881236;
.debug loc 16 593 13;
add_wrap 0, 8, 0, 10;
add_wrap 0, 18, 0, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
___dot_L20000a6e:
.debug loc 16 479 13;
set_reg 12, 536881116;
add_wrap 0, 9, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000a80:
.debug loc 16 479 13;
set_reg 12, 536881116;
add_wrap 0, 21, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000a92:
.debug loc 16 593 13;
set_reg 12, 536881220;
.debug loc 16 593 13;
add_wrap 0, 8, 0, 10;
add_wrap 0, 18, 0, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
_ZN67_$LT$tiny_keccak_dot__dot_keccak_dot__dot_Keccak$u20$as$u20$tiny_keccak_dot__dot_Hasher$GT$8finalize17h247b04d82ac0f81fE:
.debug loc 14 90 0;
add_wrap 2, 0, 4294967040, 2;
mstore 2, 0, 252, 1;
mstore 2, 0, 248, 8;
mstore 2, 0, 244, 9;
mstore 2, 0, 240, 18;
mstore 2, 0, 236, 19;
mstore 2, 0, 232, 20;
mstore 2, 0, 228, 21;
add_wrap 0, 12, 0, 19;
add_wrap 0, 11, 0, 18;
add_wrap 0, 10, 0, 11;
add_wrap 2, 0, 8, 10;
add_wrap 0, 0, 216, 12;
jump memcpy, 1;
.debug loc 15 436 34;
mload 2, 217, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 10;
.debug loc 15 436 16;
branch_if_diff_equal 10, 0, 0, ___dot_L20000ae8;
.debug loc 15 445 36;
mload 2, 208, 10, 32;
.debug loc 15 445 24;
mload 2, 212, 8, 32;
add_wrap 0, 0, 200, 11;
sub_wrap_with_offset 8, 10, 0, 8;
.debug loc 15 447 15;
branch_if_diff_greater_than 19, 8, -1, ___dot_L20000b4c;
.debug loc 16 601 12;
branch_if_diff_greater_than 10, 11, 0, ___dot_L20000c30;
.debug loc 16 0 12;
add_wrap 0, 0, 0, 8;
add_wrap 0, 19, 0, 20;
jump ___dot_L20000bc2, 32;
___dot_L20000ae8:
.debug loc 15 432 25;
mload 2, 208, 10, 32;
add_wrap 0, 0, 1, 12;
add_wrap 0, 0, 200, 11;
.debug loc 15 437 13;
mload 2, 217, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 12, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 217, 32;
.debug loc 16 601 12;
branch_if_diff_greater_than 10, 11, 0, ___dot_L20000c30;
.debug loc 16 478 12;
branch_if_diff_equal 10, 11, 0, ___dot_L20000c44;
.debug loc 16 0 12;
mload 2, 216, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
add_wrap 2, 0, 8, 12;
.debug loc 16 124 14;
add_wrap 12, 10, 0, 12;
.debug loc 15 353 40;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 10;
.debug loc 15 0 40;
mload 2, 212, 13, 32;
.debug loc 15 353 40;
xor 10, 11, 0, 14;
.debug loc 15 354 22;
add_wrap 13, 0, 4294967295, 10;
add_wrap 0, 0, 200, 11;
.debug loc 15 353 40;
mload 12, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 14, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 12, 33, 0, 32;
.debug loc 16 601 12;
branch_if_diff_greater_than 10, 11, 0, ___dot_L20000c30;
.debug loc 16 478 12;
branch_if_diff_equal 10, 11, 0, ___dot_L20000c44;
.debug loc 16 0 12;
add_wrap 2, 0, 8, 11;
.debug loc 16 124 14;
add_wrap 10, 11, 0, 10;
.debug loc 15 354 42;
mload 10, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
xor 11, 0, 128, 11;
mload 10, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 10, 33, 0, 32;
.debug loc 13 38 9;
add_wrap 2, 0, 8, 10;
jump _ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E, 1;
.debug loc 15 445 24;
mload 2, 212, 8, 32;
add_wrap 0, 0, 0, 10;
.debug loc 15 466 9;
mstore 2, 0, 208, 0;
.debug loc 15 447 15;
branch_if_diff_greater_than 19, 8, -1, ___dot_L20000b50;
.debug loc 15 0 15;
add_wrap 0, 19, 0, 20;
add_wrap 0, 10, 0, 8;
.debug loc 15 447 15;
jump ___dot_L20000bc2, 32;
___dot_L20000b4c:
.debug loc 16 601 12;
branch_if_diff_greater_than 10, 11, 0, ___dot_L20000c30;
___dot_L20000b50:
.debug loc 16 0 12;
add_wrap 0, 0, 200, 11;
.debug loc 16 455 27;
sub_wrap_with_offset 11, 10, 0, 11;
.debug loc 16 478 12;
branch_if_diff_greater_than 8, 11, 0, ___dot_L20000c7e;
.debug loc 16 0 12;
add_wrap 2, 0, 8, 11;
.debug loc 16 124 14;
add_wrap 11, 10, 0, 11;
.debug loc 21 3034 14;
add_wrap 0, 18, 0, 10;
add_wrap 0, 8, 0, 12;
jump memcpy, 1;
.debug loc 13 38 9;
add_wrap 2, 0, 8, 10;
jump _ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E, 1;
.debug loc 15 452 20;
mload 2, 212, 9, 32;
.debug loc 15 451 13;
sub_wrap_with_offset 19, 8, 0, 20;
.debug loc 15 447 15;
branch_if_diff_greater_than 9, 20, 0, ___dot_L20000bb8;
.debug loc 15 0 15;
add_wrap 0, 0, 201, 21;
___dot_L20000b82:
.debug loc 16 601 12;
branch_if_diff_greater_than 8, 19, 0, ___dot_L20000bf4;
.debug loc 16 478 12;
branch_if_diff_greater_than 9, 21, -1, ___dot_L20000c08;
.debug loc 16 455 27;
sub_wrap_with_offset 19, 8, 0, 11;
.debug loc 16 478 12;
branch_if_diff_greater_than 9, 11, 0, ___dot_L20000c1e;
.debug loc 15 448 0;
add_wrap 18, 8, 0, 10;
.debug loc 21 3034 14;
add_wrap 2, 0, 8, 11;
add_wrap 0, 9, 0, 12;
jump memcpy, 1;
.debug loc 13 38 9;
add_wrap 2, 0, 8, 10;
jump _ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E, 1;
.debug loc 15 450 13;
add_wrap 8, 9, 0, 8;
.debug loc 15 451 13;
sub_wrap_with_offset 20, 9, 0, 20;
.debug loc 15 452 20;
mload 2, 212, 9, 32;
.debug loc 15 447 15;
branch_if_diff_greater_than 20, 9, -1, ___dot_L20000b82;
___dot_L20000bb8:
.debug loc 16 601 12;
branch_if_diff_greater_than 8, 19, 0, ___dot_L20000c92;
.debug loc 16 0 12;
add_wrap 0, 0, 0, 10;
.debug loc 16 455 27;
sub_wrap_with_offset 19, 8, 0, 19;
___dot_L20000bc2:
.debug loc 16 0 27;
add_wrap 0, 0, 200, 11;
.debug loc 16 455 27;
sub_wrap_with_offset 11, 10, 0, 11;
.debug loc 16 478 12;
branch_if_diff_greater_than 20, 11, 0, ___dot_L20000c58;
.debug loc 16 478 12;
branch_if_diff_greater_than 20, 19, 0, ___dot_L20000c6a;
.debug loc 16 124 14;
add_wrap 8, 18, 0, 8;
add_wrap 2, 0, 8, 11;
.debug loc 16 124 14;
add_wrap 11, 10, 0, 11;
.debug loc 21 3034 14;
add_wrap 0, 8, 0, 10;
add_wrap 0, 20, 0, 12;
jump memcpy, 1;
.debug loc 21 0 14;
mload 2, 252, 1, 32;
mload 2, 248, 8, 32;
mload 2, 244, 9, 32;
mload 2, 240, 18, 32;
mload 2, 236, 19, 32;
mload 2, 232, 20, 32;
mload 2, 228, 21, 32;
.debug loc 14 92 6;
add_wrap 2, 0, 256, 2;
jump_dyn 1, 32;
___dot_L20000bf4:
.debug loc 16 602 13;
set_reg 12, 536881268;
.debug loc 16 602 13;
add_wrap 0, 8, 0, 10;
add_wrap 0, 19, 0, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
___dot_L20000c08:
.debug loc 16 0 13;
add_wrap 0, 0, 200, 11;
.debug loc 16 479 13;
set_reg 12, 536881116;
add_wrap 0, 9, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c1e:
.debug loc 16 479 13;
set_reg 12, 536881148;
add_wrap 0, 9, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c30:
.debug loc 15 0 0;
set_reg 12, 536881132;
add_wrap 0, 0, 200, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
___dot_L20000c44:
set_reg 12, 536881116;
add_wrap 0, 0, 1, 10;
add_wrap 0, 0, 0, 11;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c58:
.debug loc 16 479 13;
set_reg 12, 536881116;
add_wrap 0, 20, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c6a:
.debug loc 16 479 13;
set_reg 12, 536881148;
add_wrap 0, 20, 0, 10;
add_wrap 0, 19, 0, 11;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c7e:
.debug loc 16 0 13;
add_wrap 0, 8, 0, 9;
.debug loc 16 479 13;
set_reg 12, 536881116;
add_wrap 0, 9, 0, 10;
jump _ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E, 1;
___dot_L20000c92:
.debug loc 16 602 13;
set_reg 12, 536881252;
.debug loc 16 602 13;
add_wrap 0, 8, 0, 10;
add_wrap 0, 19, 0, 11;
jump _ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E, 1;
_ZN11tiny_keccak7keccakf7keccakf17h926dafebcb09a875E:
.debug loc 15 59 0;
add_wrap 2, 0, 4294967024, 2;
mstore 2, 0, 268, 1;
mstore 2, 0, 264, 8;
mstore 2, 0, 260, 9;
mstore 2, 0, 256, 18;
mstore 2, 0, 252, 19;
mstore 2, 0, 248, 20;
mstore 2, 0, 244, 21;
mstore 2, 0, 240, 22;
mstore 2, 0, 236, 23;
mstore 2, 0, 232, 24;
mstore 2, 0, 228, 25;
mstore 2, 0, 224, 26;
mstore 2, 0, 220, 27;
mload 10, 4, 7, 32;
mload 10, 0, 15, 32;
mload 10, 44, 11, 32;
mstore 2, 0, 88, 11;
mload 10, 40, 11, 32;
mstore 2, 0, 92, 11;
mload 10, 84, 6, 32;
mload 10, 80, 11, 32;
mstore 2, 0, 112, 11;
mload 10, 124, 17, 32;
mload 10, 120, 23, 32;
mload 10, 164, 11, 32;
mstore 2, 0, 84, 11;
mload 10, 160, 18, 32;
mload 10, 12, 11, 32;
mstore 2, 0, 100, 11;
mload 10, 8, 11, 32;
mstore 2, 0, 196, 11;
mload 10, 52, 11, 32;
mstore 2, 0, 148, 11;
mload 10, 48, 11, 32;
mstore 2, 0, 156, 11;
mload 10, 92, 11, 32;
mstore 2, 0, 116, 11;
mload 10, 88, 11, 32;
mstore 2, 0, 120, 11;
mload 10, 132, 1, 32;
mload 10, 128, 29, 32;
mload 10, 172, 8, 32;
mload 10, 168, 27, 32;
mload 10, 20, 11, 32;
mstore 2, 0, 216, 11;
mload 10, 16, 11, 32;
mstore 2, 0, 208, 11;
mload 10, 60, 11, 32;
mstore 2, 0, 192, 11;
mload 10, 56, 11, 32;
mstore 2, 0, 172, 11;
mload 10, 100, 11, 32;
mstore 2, 0, 160, 11;
mload 10, 96, 11, 32;
mstore 2, 0, 128, 11;
mload 10, 140, 11, 32;
mstore 2, 0, 124, 11;
mload 10, 136, 24, 32;
mload 10, 180, 30, 32;
mload 10, 176, 28, 32;
mload 10, 28, 11, 32;
mstore 2, 0, 184, 11;
mload 10, 24, 11, 32;
mstore 2, 0, 212, 11;
mload 10, 68, 11, 32;
mstore 2, 0, 188, 11;
mload 10, 64, 11, 32;
mstore 2, 0, 164, 11;
mload 10, 108, 11, 32;
mstore 2, 0, 152, 11;
mload 10, 104, 11, 32;
mstore 2, 0, 144, 11;
mload 10, 148, 11, 32;
mstore 2, 0, 96, 11;
mload 10, 144, 21, 32;
mload 10, 188, 5, 32;
mload 10, 184, 16, 32;
mload 10, 36, 11, 32;
mstore 2, 0, 204, 11;
mload 10, 32, 11, 32;
mstore 2, 0, 200, 11;
mload 10, 76, 11, 32;
mstore 2, 0, 180, 11;
mload 10, 72, 11, 32;
mstore 2, 0, 168, 11;
mload 10, 116, 11, 32;
mstore 2, 0, 176, 11;
mload 10, 112, 11, 32;
mstore 2, 0, 140, 11;
mload 10, 156, 11, 32;
mstore 2, 0, 136, 11;
mload 10, 152, 11, 32;
mstore 2, 0, 132, 11;
mload 10, 196, 31, 32;
mstore 2, 0, 12, 10;
mload 10, 192, 12, 32;
set_reg 13, 536881288;
___dot_L20000da4:
mstore 2, 0, 72, 6;
mstore 2, 0, 32, 28;
mstore 2, 0, 36, 16;
mstore 2, 0, 40, 5;
mstore 2, 0, 80, 13;
mload 2, 88, 19, 32;
xor 19, 7, 0, 10;
.debug loc 15 71 33;
xor 6, 17, 0, 11;
mstore 2, 0, 60, 21;
add_wrap 0, 17, 0, 16;
add_wrap 0, 27, 0, 20;
add_wrap 0, 8, 0, 17;
add_wrap 0, 24, 0, 8;
mstore 2, 0, 48, 24;
.debug loc 15 71 33;
xor 10, 11, 0, 24;
mload 2, 92, 25, 32;
.debug loc 15 71 33;
xor 25, 15, 0, 10;
add_wrap 0, 12, 0, 28;
mstore 2, 0, 52, 12;
mload 2, 112, 11, 32;
.debug loc 15 71 33;
xor 11, 23, 0, 12;
mstore 2, 0, 44, 29;
.debug loc 15 71 33;
xor 10, 12, 0, 10;
mstore 2, 0, 104, 10;
mload 2, 156, 10, 32;
mload 2, 196, 12, 32;
.debug loc 15 71 33;
xor 10, 12, 0, 10;
.debug loc 15 0 33;
mload 2, 120, 12, 32;
.debug loc 15 71 33;
xor 12, 29, 0, 13;
.debug loc 15 71 33;
xor 10, 13, 0, 22;
.debug loc 15 0 33;
add_wrap 0, 30, 0, 13;
mload 2, 100, 26, 32;
mload 2, 148, 10, 32;
.debug loc 15 71 33;
xor 10, 26, 0, 10;
.debug loc 15 0 33;
add_wrap 0, 31, 0, 30;
mstore 2, 0, 64, 31;
add_wrap 0, 1, 0, 27;
mload 2, 116, 11, 32;
.debug loc 15 71 33;
xor 11, 1, 0, 14;
.debug loc 15 71 33;
xor 10, 14, 0, 31;
.debug loc 15 0 33;
mload 2, 96, 6, 32;
mload 2, 208, 14, 32;
mload 2, 172, 10, 32;
.debug loc 15 71 33;
xor 14, 10, 0, 14;
.debug loc 15 0 33;
add_wrap 0, 15, 0, 1;
mload 2, 128, 15, 32;
.debug loc 15 71 33;
xor 15, 8, 0, 15;
.debug loc 15 71 33;
xor 14, 15, 0, 14;
.debug loc 15 0 33;
mstore 2, 0, 20, 14;
mload 2, 192, 15, 32;
mload 2, 216, 10, 32;
.debug loc 15 71 33;
xor 15, 10, 0, 15;
.debug loc 15 0 33;
mload 2, 84, 29, 32;
mload 2, 160, 10, 32;
mload 2, 124, 8, 32;
.debug loc 15 71 33;
xor 8, 10, 0, 8;
.debug loc 15 71 33;
xor 15, 8, 0, 15;
.debug loc 15 0 33;
mstore 2, 0, 16, 15;
mload 2, 164, 10, 32;
mload 2, 212, 8, 32;
.debug loc 15 71 33;
xor 8, 10, 0, 8;
.debug loc 15 0 33;
add_wrap 0, 7, 0, 15;
mload 2, 144, 10, 32;
.debug loc 15 71 33;
xor 10, 21, 0, 9;
.debug loc 15 71 33;
xor 8, 9, 0, 8;
.debug loc 15 0 33;
mstore 2, 0, 28, 8;
mload 2, 184, 8, 32;
mload 2, 188, 10, 32;
.debug loc 15 71 33;
xor 8, 10, 0, 8;
.debug loc 15 0 33;
mload 2, 152, 10, 32;
.debug loc 15 71 33;
xor 10, 6, 0, 9;
.debug loc 15 71 33;
xor 8, 9, 0, 8;
.debug loc 15 0 33;
mstore 2, 0, 24, 8;
mload 2, 168, 12, 32;
mload 2, 200, 11, 32;
.debug loc 15 71 33;
xor 12, 11, 0, 12;
.debug loc 15 0 33;
mload 2, 132, 8, 32;
mload 2, 140, 11, 32;
.debug loc 15 71 33;
xor 8, 11, 0, 8;
.debug loc 15 71 33;
xor 8, 12, 0, 8;
.debug loc 15 0 33;
mload 2, 180, 11, 32;
mload 2, 204, 10, 32;
.debug loc 15 71 33;
xor 11, 10, 0, 5;
.debug loc 15 0 33;
mload 2, 136, 10, 32;
mload 2, 176, 12, 32;
.debug loc 15 71 33;
xor 12, 10, 0, 12;
.debug loc 15 71 33;
xor 5, 12, 0, 12;
.debug loc 15 0 33;
add_wrap 0, 17, 0, 9;
.debug loc 15 71 33;
xor 31, 17, 0, 17;
xor 22, 20, 0, 5;
.debug loc 23 261 20;
shr 5, 0, 31, 14;
wrap16 17, 2, 10;
or 10, 14, 0, 10;
wrap16 5, 2, 7;
shr 17, 0, 31, 14;
or 7, 14, 0, 14;
.debug loc 15 71 33;
xor 24, 29, 0, 7;
.debug loc 15 71 33;
xor 12, 30, 0, 24;
.debug loc 15 82 45;
xor 24, 10, 0, 10;
.debug loc 15 82 33;
xor 10, 15, 0, 12;
mstore 2, 0, 108, 12;
.debug loc 15 82 33;
xor 10, 19, 0, 12;
mstore 2, 0, 76, 12;
mload 2, 72, 11, 32;
.debug loc 15 82 33;
xor 11, 10, 0, 11;
mstore 2, 0, 72, 11;
.debug loc 15 82 33;
xor 10, 16, 0, 12;
.debug loc 15 0 33;
mstore 2, 0, 68, 12;
.debug loc 15 82 33;
xor 10, 29, 0, 10;
mstore 2, 0, 88, 10;
mload 2, 104, 10, 32;
.debug loc 15 71 33;
xor 10, 18, 0, 16;
.debug loc 15 71 33;
xor 8, 28, 0, 22;
.debug loc 15 82 45;
xor 22, 14, 0, 14;
.debug loc 15 82 33;
xor 14, 1, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 104, 10;
.debug loc 15 82 33;
xor 14, 25, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 84, 10;
mload 2, 112, 10, 32;
.debug loc 15 82 33;
xor 10, 14, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 56, 10;
.debug loc 15 82 33;
xor 14, 23, 0, 10;
mstore 2, 0, 92, 10;
.debug loc 15 82 33;
xor 14, 18, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 112, 10;
add_wrap 0, 13, 0, 18;
mload 2, 16, 10, 32;
.debug loc 15 71 33;
xor 10, 13, 0, 12;
.debug loc 15 0 33;
mload 2, 32, 28, 32;
mload 2, 20, 10, 32;
.debug loc 15 71 33;
xor 10, 28, 0, 30;
.debug loc 23 261 20;
wrap16 30, 2, 14;
shr 12, 0, 31, 10;
or 10, 14, 0, 10;
shr 30, 0, 31, 14;
wrap16 12, 2, 8;
or 14, 8, 0, 14;
.debug loc 15 82 45;
xor 14, 7, 0, 14;
.debug loc 15 82 33;
xor 14, 26, 0, 19;
mload 2, 148, 11, 32;
.debug loc 15 82 33;
xor 11, 14, 0, 11;
.debug loc 15 0 33;
mstore 2, 0, 148, 11;
mload 2, 116, 11, 32;
.debug loc 15 82 33;
xor 14, 11, 0, 23;
.debug loc 15 82 33;
xor 14, 27, 0, 11;
.debug loc 15 0 33;
mstore 2, 0, 100, 11;
.debug loc 15 82 33;
xor 14, 9, 0, 11;
mstore 2, 0, 116, 11;
.debug loc 15 82 45;
xor 10, 16, 0, 10;
mload 2, 196, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 25;
mload 2, 156, 11, 32;
.debug loc 15 82 33;
xor 11, 10, 0, 11;
mstore 2, 0, 196, 11;
mload 2, 120, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 21;
.debug loc 15 0 33;
mload 2, 44, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 1;
.debug loc 15 82 33;
xor 10, 20, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 120, 10;
mload 2, 40, 31, 32;
mload 2, 24, 10, 32;
.debug loc 15 71 33;
xor 10, 31, 0, 20;
.debug loc 15 0 33;
mload 2, 36, 9, 32;
mload 2, 28, 15, 32;
.debug loc 15 71 33;
xor 15, 9, 0, 15;
.debug loc 23 261 20;
shr 15, 0, 31, 10;
wrap16 20, 2, 14;
or 10, 14, 0, 10;
wrap16 15, 2, 14;
shr 20, 0, 31, 8;
or 14, 8, 0, 14;
.debug loc 15 82 45;
xor 14, 5, 0, 13;
xor 10, 17, 0, 10;
mload 2, 208, 11, 32;
.debug loc 15 82 33;
xor 11, 13, 0, 11;
.debug loc 15 0 33;
mstore 2, 0, 208, 11;
mload 2, 172, 11, 32;
.debug loc 15 82 33;
xor 13, 11, 0, 17;
mload 2, 128, 11, 32;
.debug loc 15 82 33;
xor 11, 13, 0, 11;
.debug loc 15 0 33;
mstore 2, 0, 156, 11;
mload 2, 48, 11, 32;
.debug loc 15 82 33;
xor 13, 11, 0, 29;
.debug loc 15 82 33;
xor 13, 28, 0, 26;
.debug loc 15 0 33;
mload 2, 216, 11, 32;
.debug loc 15 82 33;
xor 11, 10, 0, 11;
mstore 2, 0, 172, 11;
mload 2, 192, 13, 32;
.debug loc 15 82 33;
xor 13, 10, 0, 13;
.debug loc 15 0 33;
mload 2, 160, 11, 32;
.debug loc 15 82 33;
xor 11, 10, 0, 11;
mstore 2, 0, 192, 11;
mload 2, 124, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 5;
.debug loc 15 82 33;
xor 10, 18, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 216, 10;
.debug loc 23 261 20;
wrap16 22, 2, 10;
shr 24, 0, 31, 11;
or 10, 11, 0, 10;
shr 22, 0, 31, 11;
wrap16 24, 2, 24;
or 24, 11, 0, 11;
.debug loc 15 82 45;
xor 11, 12, 0, 8;
xor 10, 30, 0, 10;
mload 2, 212, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 28;
mload 2, 164, 11, 32;
.debug loc 15 82 33;
xor 10, 11, 0, 18;
.debug loc 15 0 33;
mload 2, 144, 11, 32;
.debug loc 15 82 33;
xor 11, 10, 0, 11;
.debug loc 15 0 33;
mstore 2, 0, 164, 11;
mload 2, 60, 12, 32;
.debug loc 15 82 33;
xor 12, 10, 0, 12;
.debug loc 15 82 33;
xor 10, 9, 0, 24;
mload 2, 184, 14, 32;
.debug loc 15 82 33;
xor 14, 8, 0, 14;
.debug loc 15 0 33;
mload 2, 188, 10, 32;
.debug loc 15 82 33;
xor 8, 10, 0, 30;
.debug loc 15 0 33;
mload 2, 152, 10, 32;
.debug loc 15 82 33;
xor 10, 8, 0, 10;
mstore 2, 0, 184, 10;
.debug loc 15 82 33;
xor 8, 6, 0, 6;
.debug loc 15 82 33;
xor 8, 31, 0, 22;
.debug loc 23 261 20;
wrap16 16, 2, 8;
shr 7, 0, 31, 9;
or 8, 9, 0, 8;
shr 16, 0, 31, 9;
wrap16 7, 2, 7;
or 7, 9, 0, 9;
.debug loc 15 82 45;
xor 20, 9, 0, 9;
xor 15, 8, 0, 15;
.debug loc 15 0 45;
mload 2, 204, 10, 32;
.debug loc 15 82 33;
xor 9, 10, 0, 31;
.debug loc 15 0 33;
mload 2, 180, 10, 32;
.debug loc 15 82 33;
xor 10, 9, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 212, 10;
mload 2, 176, 10, 32;
.debug loc 15 82 33;
xor 10, 9, 0, 10;
.debug loc 15 0 33;
mstore 2, 0, 188, 10;
mload 2, 136, 8, 32;
.debug loc 15 82 33;
xor 8, 9, 0, 8;
mload 2, 64, 10, 32;
.debug loc 15 82 33;
xor 10, 9, 0, 16;
.debug loc 15 0 33;
mload 2, 200, 10, 32;
.debug loc 15 82 33;
xor 15, 10, 0, 7;
mload 2, 168, 10, 32;
.debug loc 15 82 33;
xor 10, 15, 0, 10;
mstore 2, 0, 204, 10;
mload 2, 140, 10, 32;
.debug loc 15 82 33;
xor 10, 15, 0, 10;
mstore 2, 0, 200, 10;
mload 2, 132, 10, 32;
.debug loc 15 82 33;
xor 10, 15, 0, 20;
.debug loc 15 0 33;
mload 2, 52, 10, 32;
.debug loc 15 82 33;
xor 15, 10, 0, 15;
.debug loc 23 261 20;
shr 19, 0, 31, 10;
wrap16 25, 2, 27;
or 27, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 176, 10;
.debug loc 23 261 20;
shr 25, 0, 31, 10;
wrap16 19, 2, 19;
or 19, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 140, 10;
mload 2, 56, 25, 32;
.debug loc 23 261 20;
shr 25, 0, 29, 11;
mload 2, 72, 10, 32;
wrap16 10, 8, 9;
or 9, 11, 0, 27;
shr 10, 0, 29, 10;
wrap16 25, 8, 25;
or 25, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 180, 10;
.debug loc 23 261 20;
shr 13, 0, 26, 10;
wrap16 17, 64, 9;
or 10, 9, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 124, 10;
.debug loc 23 261 20;
shr 17, 0, 26, 10;
wrap16 13, 64, 13;
or 10, 13, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 24, 10;
.debug loc 23 261 20;
shr 21, 0, 22, 10;
wrap16 23, 1024, 13;
or 10, 13, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 60, 10;
.debug loc 23 261 20;
shr 23, 0, 22, 10;
wrap16 21, 1024, 21;
or 21, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 136, 10;
.debug loc 23 261 20;
shr 29, 0, 17, 10;
wrap16 5, 32768, 13;
or 10, 13, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 96, 10;
.debug loc 23 261 20;
shr 5, 0, 17, 10;
wrap16 29, 32768, 29;
or 29, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 132, 10;
.debug loc 23 261 20;
shr 12, 0, 11, 10;
wrap16 6, 65536, 32;
wrap16 32, 32, 13;
or 13, 10, 0, 17;
shr 6, 0, 11, 11;
wrap16 12, 65536, 32;
wrap16 32, 32, 12;
or 12, 11, 0, 19;
.debug loc 23 261 20;
shr 14, 0, 4, 10;
wrap16 28, 65536, 32;
wrap16 32, 4096, 11;
or 11, 10, 0, 23;
shr 28, 0, 4, 10;
wrap16 14, 65536, 32;
wrap16 32, 4096, 14;
or 14, 10, 0, 25;
.debug loc 23 0 20;
mload 2, 84, 13, 32;
.debug loc 23 261 20;
shr 13, 0, 28, 10;
mload 2, 76, 12, 32;
wrap16 12, 16, 11;
or 10, 11, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 56, 10;
.debug loc 23 261 20;
shr 12, 0, 28, 10;
wrap16 13, 16, 11;
or 10, 11, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 36, 10;
mload 2, 100, 6, 32;
.debug loc 23 261 20;
shr 6, 0, 19, 10;
wrap16 1, 8192, 11;
or 11, 10, 0, 5;
shr 1, 0, 19, 10;
wrap16 6, 8192, 11;
or 11, 10, 0, 21;
.debug loc 23 261 20;
shr 18, 0, 9, 10;
wrap16 30, 65536, 32;
wrap16 32, 128, 11;
or 10, 11, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 84, 10;
.debug loc 23 261 20;
shr 30, 0, 9, 10;
wrap16 18, 65536, 32;
wrap16 32, 128, 18;
or 18, 10, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 64, 10;
mload 2, 120, 12, 32;
.debug loc 23 261 20;
shr 12, 0, 30, 10;
mload 2, 116, 6, 32;
wrap16 6, 4, 11;
or 10, 11, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 72, 10;
.debug loc 23 261 20;
shr 6, 0, 30, 10;
wrap16 12, 4, 11;
or 10, 11, 0, 10;
.debug loc 23 0 20;
mstore 2, 0, 76, 10;
.debug loc 23 261 20;
shr 15, 0, 18, 10;
wrap16 16, 16384, 11;
or 11, 10, 0, 11;
shr 16, 0, 18, 10;
wrap16 15, 16384, 15;
or 10, 15, 0, 10;
.debug loc 23 261 20;
shr 31, 0, 5, 12;
wrap16 7, 65536, 32;
wrap16 32, 2048, 13;
or 12, 13, 0, 12;
.debug loc 23 0 20;
mstore 2, 0, 44, 12;
.debug loc 23 261 20;
shr 7, 0, 5, 12;
wrap16 31, 65536, 32;
wrap16 32, 2048, 31;
or 31, 12, 0, 12;
.debug loc 23 0 20;
mstore 2, 0, 28, 12;
mload 2, 68, 14, 32;
.debug loc 23 261 20;
shr 14, 0, 23, 12;
mload 2, 92, 15, 32;
wrap16 15, 512, 13;
or 12, 13, 0, 12;
.debug loc 23 0 20;
mstore 2, 0, 52, 12;
.debug loc 23 261 20;
shr 15, 0, 23, 12;
wrap16 14, 512, 13;
or 12, 13, 0, 12;
.debug loc 23 0 20;
mstore 2, 0, 68, 12;
.debug loc 23 261 20;
shr 22, 0, 8, 12;
wrap16 24, 65536, 32;
wrap16 32, 256, 13;
or 12, 13, 0, 12;
.debug loc 23 0 20;
mstore 2, 0, 16, 12;
.debug loc 23 261 20;
shr 24, 0, 8, 12;
wrap16 22, 65536, 32;
wrap16 32, 256, 14;
or 14, 12, 0, 31;
.debug loc 23 261 20;
shr 20, 0, 24, 12;
wrap16 8, 256, 13;
or 13, 12, 0, 16;
shr 8, 0, 24, 8;
wrap16 20, 256, 20;
or 20, 8, 0, 7;
.debug loc 23 0 20;
mload 2, 164, 15, 32;
.debug loc 23 261 20;
shr 15, 0, 7, 12;
mload 2, 184, 14, 32;
wrap16 14, 65536, 32;
wrap16 32, 512, 13;
or 13, 12, 0, 24;
shr 14, 0, 7, 13;
wrap16 15, 65536, 32;
wrap16 32, 512, 15;
or 15, 13, 0, 1;
.debug loc 23 0 20;
mload 2, 156, 9, 32;
.debug loc 23 261 20;
shr 9, 0, 21, 13;
mload 2, 192, 12, 32;
wrap16 12, 2048, 15;
or 13, 15, 0, 13;
shr 12, 0, 21, 15;
wrap16 9, 2048, 9;
or 9, 15, 0, 6;
.debug loc 23 0 20;
mload 2, 208, 12, 32;
.debug loc 23 261 20;
shr 12, 0, 2, 14;
mload 2, 172, 15, 32;
wrap16 15, 65536, 32;
wrap16 32, 16384, 9;
or 14, 9, 0, 14;
.debug loc 23 0 20;
mstore 2, 0, 48, 14;
.debug loc 23 261 20;
shr 15, 0, 2, 14;
wrap16 12, 65536, 32;
wrap16 32, 16384, 9;
or 14, 9, 0, 14;
.debug loc 23 0 20;
mstore 2, 0, 40, 14;
mload 2, 112, 9, 32;
.debug loc 23 261 20;
shr 9, 0, 14, 14;
mload 2, 88, 12, 32;
wrap16 12, 65536, 32;
wrap16 32, 4, 8;
or 8, 14, 0, 22;
shr 12, 0, 14, 14;
wrap16 9, 65536, 32;
wrap16 32, 4, 9;
or 9, 14, 0, 29;
.debug loc 23 0 20;
mload 2, 188, 12, 32;
.debug loc 23 261 20;
shr 12, 0, 25, 14;
mload 2, 200, 15, 32;
wrap16 15, 128, 9;
or 9, 14, 0, 20;
shr 15, 0, 25, 14;
wrap16 12, 128, 9;
or 9, 14, 0, 18;
.debug loc 23 0 20;
mload 2, 216, 12, 32;
.debug loc 23 261 20;
shr 12, 0, 3, 14;
wrap16 26, 65536, 32;
wrap16 32, 8192, 9;
or 9, 14, 0, 28;
shr 26, 0, 3, 14;
wrap16 12, 65536, 32;
wrap16 32, 8192, 9;
or 9, 14, 0, 26;
.debug loc 23 0 20;
mload 2, 212, 8, 32;
.debug loc 23 261 20;
shr 8, 0, 12, 9;
mload 2, 204, 12, 32;
wrap16 12, 65536, 32;
wrap16 32, 16, 14;
or 14, 9, 0, 14;
shr 12, 0, 12, 9;
wrap16 8, 65536, 32;
wrap16 32, 16, 8;
or 8, 9, 0, 30;
.debug loc 23 0 20;
mload 2, 148, 12, 32;
.debug loc 23 261 20;
shr 12, 0, 20, 8;
mload 2, 196, 15, 32;
wrap16 15, 4096, 9;
or 8, 9, 0, 8;
shr 15, 0, 20, 9;
wrap16 12, 4096, 12;
or 12, 9, 0, 12;
.debug loc 15 111 56;
xor 8, 0, 4294967295, 9;
.debug loc 15 111 55;
and 6, 9, 0, 9;
mstore 2, 0, 32, 9;
.debug loc 15 111 56;
xor 17, 0, 4294967295, 9;
.debug loc 15 111 55;
and 9, 11, 0, 9;
.debug loc 15 111 33;
xor 9, 6, 0, 9;
mstore 2, 0, 216, 9;
.debug loc 15 111 56;
xor 6, 0, 4294967295, 15;
.debug loc 15 111 55;
and 17, 15, 0, 15;
.debug loc 15 111 56;
xor 11, 0, 4294967295, 9;
mload 2, 108, 6, 32;
.debug loc 15 111 55;
and 6, 9, 0, 9;
.debug loc 15 111 33;
xor 17, 9, 0, 9;
mstore 2, 0, 184, 9;
.debug loc 15 111 56;
xor 12, 0, 4294967295, 9;
.debug loc 15 111 55;
and 9, 13, 0, 9;
mstore 2, 0, 20, 9;
.debug loc 15 111 56;
xor 19, 0, 4294967295, 9;
.debug loc 15 111 55;
and 9, 10, 0, 9;
.debug loc 15 111 33;
xor 9, 13, 0, 9;
mstore 2, 0, 208, 9;
.debug loc 15 111 56;
xor 13, 0, 4294967295, 13;
.debug loc 15 111 55;
and 19, 13, 0, 13;
.debug loc 15 111 56;
xor 10, 0, 4294967295, 9;
mload 2, 104, 17, 32;
.debug loc 15 111 55;
and 17, 9, 0, 9;
.debug loc 15 111 33;
xor 19, 9, 0, 9;
mstore 2, 0, 212, 9;
xor 13, 12, 0, 13;
mstore 2, 0, 196, 13;
.debug loc 15 111 56;
xor 17, 0, 4294967295, 13;
.debug loc 15 111 55;
and 12, 13, 0, 12;
.debug loc 15 111 33;
xor 15, 8, 0, 15;
mstore 2, 0, 100, 15;
.debug loc 15 111 56;
xor 6, 0, 4294967295, 13;
.debug loc 15 111 55;
and 13, 8, 0, 13;
.debug loc 15 111 33;
xor 11, 13, 0, 11;
mstore 2, 0, 204, 11;
xor 10, 12, 0, 10;
mstore 2, 0, 200, 10;
.debug loc 15 111 56;
xor 30, 0, 4294967295, 10;
.debug loc 15 111 55;
and 27, 10, 0, 10;
.debug loc 15 111 56;
xor 5, 0, 4294967295, 11;
.debug loc 15 111 55;
and 28, 11, 0, 11;
.debug loc 15 111 33;
xor 27, 11, 0, 11;
mstore 2, 0, 192, 11;
.debug loc 15 111 56;
xor 27, 0, 4294967295, 11;
.debug loc 15 111 55;
and 5, 11, 0, 11;
.debug loc 15 111 56;
xor 28, 0, 4294967295, 12;
.debug loc 15 111 55;
and 25, 12, 0, 12;
.debug loc 15 111 33;
xor 12, 5, 0, 12;
mstore 2, 0, 188, 12;
.debug loc 15 111 56;
xor 14, 0, 4294967295, 12;
mload 2, 180, 15, 32;
.debug loc 15 111 55;
and 12, 15, 0, 12;
.debug loc 15 111 56;
xor 21, 0, 4294967295, 13;
.debug loc 15 111 55;
and 26, 13, 0, 13;
.debug loc 15 111 33;
xor 13, 15, 0, 13;
mstore 2, 0, 172, 13;
.debug loc 15 111 56;
xor 15, 0, 4294967295, 13;
.debug loc 15 111 55;
and 21, 13, 0, 13;
.debug loc 15 111 56;
xor 26, 0, 4294967295, 15;
.debug loc 15 111 55;
and 23, 15, 0, 15;
.debug loc 15 111 33;
xor 15, 21, 0, 15;
mstore 2, 0, 164, 15;
xor 23, 12, 0, 12;
mstore 2, 0, 92, 12;
xor 13, 14, 0, 13;
mstore 2, 0, 156, 13;
.debug loc 15 111 56;
xor 23, 0, 4294967295, 12;
.debug loc 15 111 55;
and 12, 14, 0, 12;
.debug loc 15 111 33;
xor 25, 10, 0, 10;
mstore 2, 0, 88, 10;
xor 11, 30, 0, 10;
mstore 2, 0, 148, 10;
.debug loc 15 111 56;
xor 25, 0, 4294967295, 10;
.debug loc 15 111 55;
and 30, 10, 0, 10;
.debug loc 15 111 33;
xor 10, 28, 0, 10;
mstore 2, 0, 180, 10;
xor 12, 26, 0, 10;
mstore 2, 0, 168, 10;
mload 2, 24, 17, 32;
.debug loc 15 111 56;
xor 17, 0, 4294967295, 10;
.debug loc 15 111 55;
and 24, 10, 0, 10;
.debug loc 15 111 56;
xor 16, 0, 4294967295, 11;
.debug loc 15 111 55;
and 22, 11, 0, 11;
.debug loc 15 111 33;
xor 24, 11, 0, 11;
mstore 2, 0, 160, 11;
.debug loc 15 111 56;
xor 24, 0, 4294967295, 11;
.debug loc 15 111 55;
and 16, 11, 0, 11;
.debug loc 15 111 56;
xor 22, 0, 4294967295, 12;
mload 2, 140, 9, 32;
.debug loc 15 111 55;
and 12, 9, 0, 12;
.debug loc 15 111 33;
xor 12, 16, 0, 12;
mstore 2, 0, 152, 12;
mload 2, 124, 8, 32;
.debug loc 15 111 56;
xor 8, 0, 4294967295, 12;
.debug loc 15 111 55;
and 1, 12, 0, 12;
.debug loc 15 111 56;
xor 7, 0, 4294967295, 13;
.debug loc 15 111 55;
and 29, 13, 0, 13;
.debug loc 15 111 33;
xor 1, 13, 0, 13;
mstore 2, 0, 128, 13;
.debug loc 15 111 56;
xor 1, 0, 4294967295, 13;
.debug loc 15 111 55;
and 7, 13, 0, 13;
.debug loc 15 111 56;
xor 29, 0, 4294967295, 14;
mload 2, 176, 15, 32;
.debug loc 15 111 55;
and 14, 15, 0, 14;
.debug loc 15 111 33;
xor 14, 7, 0, 14;
mstore 2, 0, 144, 14;
xor 12, 15, 0, 12;
mstore 2, 0, 112, 12;
xor 13, 8, 0, 13;
mstore 2, 0, 120, 13;
.debug loc 15 111 56;
xor 15, 0, 4294967295, 12;
.debug loc 15 111 55;
and 12, 8, 0, 12;
.debug loc 15 111 33;
xor 10, 9, 0, 6;
xor 11, 17, 0, 11;
mstore 2, 0, 116, 11;
.debug loc 15 111 56;
xor 9, 0, 4294967295, 10;
.debug loc 15 111 55;
and 17, 10, 0, 10;
.debug loc 15 111 33;
xor 22, 10, 0, 10;
mstore 2, 0, 176, 10;
xor 29, 12, 0, 10;
mstore 2, 0, 140, 10;
mload 2, 36, 8, 32;
.debug loc 15 111 56;
xor 8, 0, 4294967295, 10;
mload 2, 60, 13, 32;
.debug loc 15 111 55;
and 13, 10, 0, 5;
mload 2, 96, 12, 32;
.debug loc 15 111 56;
xor 12, 0, 4294967295, 11;
mload 2, 16, 10, 32;
.debug loc 15 111 55;
and 11, 10, 0, 11;
.debug loc 15 111 33;
xor 11, 13, 0, 11;
mstore 2, 0, 124, 11;
.debug loc 15 111 56;
xor 13, 0, 4294967295, 11;
.debug loc 15 111 55;
and 12, 11, 0, 7;
.debug loc 15 0 55;
add_wrap 0, 12, 0, 13;
.debug loc 15 111 56;
xor 10, 0, 4294967295, 12;
add_wrap 0, 10, 0, 22;
mload 2, 28, 11, 32;
.debug loc 15 111 55;
and 12, 11, 0, 12;
.debug loc 15 111 33;
xor 12, 13, 0, 12;
mstore 2, 0, 96, 12;
mload 2, 56, 9, 32;
.debug loc 15 111 56;
xor 9, 0, 4294967295, 12;
mload 2, 136, 14, 32;
.debug loc 15 111 55;
and 12, 14, 0, 12;
mload 2, 132, 15, 32;
.debug loc 15 111 56;
xor 15, 0, 4294967295, 13;
.debug loc 15 111 55;
and 31, 13, 0, 13;
.debug loc 15 111 33;
xor 13, 14, 0, 24;
.debug loc 15 111 56;
xor 14, 0, 4294967295, 13;
.debug loc 15 111 55;
and 13, 15, 0, 13;
.debug loc 15 111 56;
xor 31, 0, 4294967295, 14;
mload 2, 44, 10, 32;
.debug loc 15 111 55;
and 14, 10, 0, 14;
.debug loc 15 111 33;
xor 14, 15, 0, 21;
xor 12, 10, 0, 23;
xor 9, 13, 0, 29;
.debug loc 15 111 56;
xor 10, 0, 4294967295, 12;
.debug loc 15 111 55;
and 12, 9, 0, 12;
.debug loc 15 111 33;
xor 5, 11, 0, 17;
xor 8, 7, 0, 1;
.debug loc 15 111 56;
xor 11, 0, 4294967295, 10;
.debug loc 15 111 55;
and 10, 8, 0, 10;
.debug loc 15 111 33;
xor 22, 10, 0, 10;
mstore 2, 0, 136, 10;
xor 31, 12, 0, 10;
mstore 2, 0, 132, 10;
mload 2, 64, 9, 32;
.debug loc 15 111 56;
xor 9, 0, 4294967295, 10;
.debug loc 15 111 55;
and 20, 10, 0, 31;
mload 2, 52, 10, 32;
.debug loc 15 111 56;
xor 10, 0, 4294967295, 11;
mload 2, 72, 13, 32;
.debug loc 15 111 55;
and 11, 13, 0, 11;
.debug loc 15 111 33;
xor 11, 20, 0, 30;
.debug loc 15 111 56;
xor 20, 0, 4294967295, 11;
.debug loc 15 111 55;
and 10, 11, 0, 20;
.debug loc 15 111 56;
xor 13, 0, 4294967295, 12;
add_wrap 0, 13, 0, 25;
mload 2, 40, 11, 32;
.debug loc 15 111 55;
and 12, 11, 0, 12;
.debug loc 15 111 33;
xor 10, 12, 0, 5;
mload 2, 84, 8, 32;
.debug loc 15 111 56;
xor 8, 0, 4294967295, 12;
.debug loc 15 111 55;
and 18, 12, 0, 27;
mload 2, 68, 14, 32;
.debug loc 15 111 56;
xor 14, 0, 4294967295, 13;
mload 2, 76, 15, 32;
.debug loc 15 111 55;
and 13, 15, 0, 13;
.debug loc 15 111 33;
xor 13, 18, 0, 28;
.debug loc 15 111 56;
xor 18, 0, 4294967295, 13;
.debug loc 15 111 55;
and 13, 14, 0, 13;
add_wrap 0, 14, 0, 10;
.debug loc 15 111 56;
xor 15, 0, 4294967295, 14;
mload 2, 48, 12, 32;
.debug loc 15 111 55;
and 14, 12, 0, 14;
.debug loc 15 111 33;
xor 10, 14, 0, 16;
xor 27, 12, 0, 18;
xor 8, 13, 0, 27;
mload 2, 80, 13, 32;
.debug loc 15 111 56;
xor 12, 0, 4294967295, 12;
.debug loc 15 111 55;
and 12, 8, 0, 12;
.debug loc 15 111 33;
xor 31, 11, 0, 10;
mstore 2, 0, 84, 10;
xor 9, 20, 0, 8;
.debug loc 15 111 56;
xor 11, 0, 4294967295, 10;
.debug loc 15 111 55;
and 10, 9, 0, 10;
.debug loc 15 118 25;
mload 13, 4, 11, 32;
.debug loc 15 111 33;
xor 10, 25, 0, 31;
.debug loc 15 118 25;
mload 13, 0, 10, 32;
.debug loc 15 111 33;
xor 12, 15, 0, 12;
mload 2, 108, 15, 32;
.debug loc 15 118 17;
xor 11, 15, 0, 11;
mload 2, 32, 9, 32;
xor 9, 11, 0, 7;
mload 2, 104, 11, 32;
xor 10, 11, 0, 10;
.debug loc 24 1563 52;
add_wrap 13, 0, 8, 13;
.debug loc 17 752 12;
set_reg 11, 536881288;
add_wrap 11, 0, 192, 11;
mload 2, 20, 15, 32;
.debug loc 15 118 17;
xor 15, 10, 0, 15;
.debug loc 17 752 12;
branch_if_diff_nonzero 13, 11, ___dot_L20000da4;
.debug loc 17 0 12;
mload 2, 12, 10, 32;
mstore 10, 0, 0, 15;
mstore 10, 0, 4, 7;
mload 2, 92, 11, 32;
mstore 10, 0, 40, 11;
mload 2, 88, 11, 32;
mstore 10, 0, 44, 11;
mload 2, 112, 11, 32;
mstore 10, 0, 80, 11;
mstore 10, 0, 84, 6;
mstore 10, 0, 120, 23;
mstore 10, 0, 124, 17;
mstore 10, 0, 160, 18;
mload 2, 84, 11, 32;
mstore 10, 0, 164, 11;
mload 2, 196, 11, 32;
mstore 10, 0, 8, 11;
mload 2, 100, 11, 32;
mstore 10, 0, 12, 11;
mload 2, 156, 11, 32;
mstore 10, 0, 48, 11;
mload 2, 148, 11, 32;
mstore 10, 0, 52, 11;
mload 2, 120, 11, 32;
mstore 10, 0, 88, 11;
mload 2, 116, 11, 32;
mstore 10, 0, 92, 11;
mstore 10, 0, 128, 29;
mstore 10, 0, 132, 1;
mstore 10, 0, 168, 27;
mstore 10, 0, 172, 8;
mload 2, 208, 11, 32;
mstore 10, 0, 16, 11;
mload 2, 216, 11, 32;
mstore 10, 0, 20, 11;
mload 2, 172, 11, 32;
mstore 10, 0, 56, 11;
mload 2, 192, 11, 32;
mstore 10, 0, 60, 11;
mload 2, 128, 11, 32;
mstore 10, 0, 96, 11;
mload 2, 160, 11, 32;
mstore 10, 0, 100, 11;
mstore 10, 0, 136, 24;
mload 2, 124, 11, 32;
mstore 10, 0, 140, 11;
mstore 10, 0, 176, 28;
mstore 10, 0, 180, 30;
mload 2, 212, 11, 32;
mstore 10, 0, 24, 11;
mload 2, 184, 11, 32;
mstore 10, 0, 28, 11;
mload 2, 164, 11, 32;
mstore 10, 0, 64, 11;
mload 2, 188, 11, 32;
mstore 10, 0, 68, 11;
mload 2, 144, 11, 32;
mstore 10, 0, 104, 11;
mload 2, 152, 11, 32;
mstore 10, 0, 108, 11;
mstore 10, 0, 144, 21;
mload 2, 96, 11, 32;
mstore 10, 0, 148, 11;
mstore 10, 0, 184, 16;
mstore 10, 0, 188, 5;
mload 2, 204, 11, 32;
mstore 10, 0, 36, 11;
mload 2, 200, 11, 32;
mstore 10, 0, 32, 11;
mload 2, 180, 11, 32;
mstore 10, 0, 76, 11;
mload 2, 168, 11, 32;
mstore 10, 0, 72, 11;
mload 2, 176, 11, 32;
mstore 10, 0, 116, 11;
mload 2, 140, 11, 32;
mstore 10, 0, 112, 11;
mload 2, 136, 11, 32;
mstore 10, 0, 156, 11;
mload 2, 132, 11, 32;
mstore 10, 0, 152, 11;
mstore 10, 0, 196, 31;
mstore 10, 0, 192, 12;
mload 2, 268, 1, 32;
mload 2, 264, 8, 32;
mload 2, 260, 9, 32;
mload 2, 256, 18, 32;
mload 2, 252, 19, 32;
mload 2, 248, 20, 32;
mload 2, 244, 21, 32;
mload 2, 240, 22, 32;
mload 2, 236, 23, 32;
mload 2, 232, 24, 32;
mload 2, 228, 25, 32;
mload 2, 224, 26, 32;
mload 2, 220, 27, 32;
.debug loc 15 120 10;
add_wrap 2, 0, 272, 2;
jump_dyn 1, 32;
_ZN44_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h16a49860d04324d0E:
mload 10, 0, 10, 32;
.debug loc 28 2377 62;
jump _ZN73_$LT$core_dot__dot_panic_dot__dot_panic_info_dot__dot_PanicInfo$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h7201809dc650370bE, 32;
_ZN4core3fmt5Write10write_char17h011162669ac84ddbE:
.debug loc 28 174 0;
add_wrap 2, 0, 4294967280, 2;
add_wrap 0, 0, 128, 10;
mstore 2, 0, 12, 0;
.debug loc 29 1741 8;
branch_if_diff_greater_than 11, 10, -1, ___dot_L20001660;
.debug loc 29 0 0;
add_wrap 2, 0, 13, 12;
.debug loc 29 1772 13;
mload 2, 12, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 12, 32;
.debug loc 29 1773 9;
jump ___dot_L200016ec, 32;
___dot_L20001660:
.debug loc 29 1743 15;
shr 11, 0, 11, 10;
branch_if_diff_nonzero 10, 0, ___dot_L20001684;
.debug loc 29 0 0;
add_wrap 2, 0, 14, 12;
.debug loc 29 1775 19;
shr 11, 0, 6, 10;
.debug loc 29 1775 13;
or 10, 0, 192, 10;
mload 2, 12, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 12, 32;
.debug loc 29 1776 18;
and 11, 0, 63, 10;
.debug loc 29 1776 13;
add_wrap 10, 0, 128, 10;
mload 2, 13, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 13, 32;
.debug loc 29 1777 9;
jump ___dot_L200016ec, 32;
___dot_L20001684:
.debug loc 29 1745 15;
shr 11, 0, 16, 10;
branch_if_diff_nonzero 10, 0, ___dot_L200016b6;
.debug loc 29 0 0;
add_wrap 2, 0, 15, 12;
.debug loc 29 1779 19;
shr 11, 0, 12, 10;
.debug loc 29 1779 13;
or 10, 0, 224, 10;
mload 2, 12, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 12, 32;
.debug loc 29 1780 18;
wrap16 11, 65536, 32;
wrap16 32, 16, 10;
shr 10, 0, 26, 10;
.debug loc 29 1780 13;
add_wrap 10, 0, 128, 10;
mload 2, 13, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 13, 32;
.debug loc 29 1781 18;
and 11, 0, 63, 10;
.debug loc 29 1781 13;
add_wrap 10, 0, 128, 10;
mload 2, 14, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 14, 32;
.debug loc 29 1782 9;
jump ___dot_L200016ec, 32;
___dot_L200016b6:
.debug loc 29 0 0;
add_wrap 2, 0, 16, 12;
.debug loc 29 1784 19;
shr 11, 0, 18, 10;
.debug loc 29 1784 13;
or 10, 0, 240, 10;
mload 2, 12, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 12, 32;
.debug loc 29 1785 18;
wrap16 11, 16384, 10;
shr 10, 0, 26, 10;
.debug loc 29 1785 13;
add_wrap 10, 0, 128, 10;
mload 2, 13, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 13, 32;
.debug loc 29 1786 18;
wrap16 11, 65536, 32;
wrap16 32, 16, 10;
shr 10, 0, 26, 10;
.debug loc 29 1786 13;
add_wrap 10, 0, 128, 10;
mload 2, 14, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 14, 32;
.debug loc 29 1787 18;
and 11, 0, 63, 10;
.debug loc 29 1787 13;
add_wrap 10, 0, 128, 10;
mload 2, 15, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 2, 33, 15, 32;
___dot_L200016ec:
.debug loc 29 0 13;
add_wrap 2, 0, 12, 13;
___dot_L200016ee:
.debug loc 30 1902 19;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
.debug loc 31 7 9;
add_wrap 0, 0, 0, 10;
query_arg_1 <== get_reg(10);
query_arg_2 <== get_reg(11);
set_reg 0, ${ std::prelude::Query::Output(std::convert::int(std::prover::eval(query_arg_1)), std::prover::eval(query_arg_2)) };
.debug loc 32 601 37;
add_wrap 13, 0, 1, 10;
.debug loc 32 0 37;
add_wrap 0, 10, 0, 13;
.debug loc 33 25 86;
branch_if_diff_nonzero 10, 12, ___dot_L200016ee;
.debug loc 28 176 6;
add_wrap 0, 0, 0, 10;
.debug loc 28 176 6;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
_ZN4core3fmt5Write9write_fmt17hf6efca51361f006cE:
set_reg 12, 536881488;
add_wrap 0, 11, 0, 13;
add_wrap 0, 12, 0, 11;
add_wrap 0, 13, 0, 12;
jump _ZN4core3fmt5write17hef204004899667f3E, 32;
_ZN53_$LT$core_dot__dot_fmt_dot__dot_Error$u20$as$u20$core_dot__dot_fmt_dot__dot_Debug$GT$3fmt17h745edb6e5f428217E:
set_reg 13, 536881480;
add_wrap 0, 0, 5, 12;
add_wrap 0, 11, 0, 10;
add_wrap 0, 13, 0, 11;
jump _ZN4core3fmt9Formatter9write_str17h775351d85ee60b01E, 32;
_ZN75_$LT$powdr_riscv_runtime_dot__dot_fmt_dot__dot_ProverWriter$u20$as$u20$core_dot__dot_fmt_dot__dot_Write$GT$9write_str17h8b7371fb4fcceb69E:
branch_if_diff_equal 12, 0, 0, ___dot_L2000174c;
.debug loc 33 0 86;
add_wrap 0, 11, 0, 13;
___dot_L2000173a:
.debug loc 30 1902 19;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
.debug loc 31 7 9;
add_wrap 0, 0, 0, 10;
query_arg_1 <== get_reg(10);
query_arg_2 <== get_reg(11);
set_reg 0, ${ std::prelude::Query::Output(std::convert::int(std::prover::eval(query_arg_1)), std::prover::eval(query_arg_2)) };
.debug loc 32 601 37;
add_wrap 13, 0, 1, 13;
.debug loc 32 1749 9;
add_wrap 12, 0, 4294967295, 12;
.debug loc 33 25 86;
branch_if_diff_nonzero 12, 0, ___dot_L2000173a;
___dot_L2000174c:
.debug loc 36 23 6;
add_wrap 0, 0, 0, 10;
jump_dyn 1, 32;
rust_begin_unwind:
.debug loc 26 6 0;
add_wrap 2, 0, 4294967248, 2;
mstore 2, 0, 44, 1;
set_reg 11, 536879104;
mload 11, 1896, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 12;
.debug loc 28 346 9;
mstore 2, 0, 4, 10;
.debug loc 26 9 9;
branch_if_diff_equal 12, 0, 0, ___dot_L20001780;
.debug loc 26 0 9;
set_reg 12, 536881744;
add_wrap 12, 0, 59, 13;
___dot_L2000176c:
.debug loc 30 1902 19;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
.debug loc 31 7 9;
add_wrap 0, 0, 0, 10;
query_arg_1 <== get_reg(10);
query_arg_2 <== get_reg(11);
set_reg 0, ${ std::prelude::Query::Output(std::convert::int(std::prover::eval(query_arg_1)), std::prover::eval(query_arg_2)) };
.debug loc 32 1749 9;
add_wrap 12, 0, 1, 12;
.debug loc 32 0 9;
branch_if_diff_nonzero 12, 13, ___dot_L2000176c;
jump ___dot_L200017c2, 32;
___dot_L20001780:
add_wrap 0, 0, 1, 10;
.debug loc 26 10 9;
mload 11, 1896, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 11, 33, 1896, 32;
add_wrap 2, 0, 4, 11;
.debug loc 36 9 33;
mstore 2, 0, 32, 11;
load_label 11, _ZN44_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h16a49860d04324d0E;
mstore 2, 0, 36, 11;
.debug loc 28 350 9;
set_reg 11, 536881728;
mstore 2, 0, 8, 11;
add_wrap 0, 0, 2, 11;
mstore 2, 0, 12, 11;
mstore 2, 0, 24, 0;
add_wrap 2, 0, 32, 11;
mstore 2, 0, 16, 11;
mstore 2, 0, 20, 10;
.debug loc 36 14 5;
set_reg 11, 536881488;
add_wrap 2, 0, 43, 10;
add_wrap 2, 0, 8, 12;
jump _ZN4core3fmt5write17hef204004899667f3E, 1;
.debug loc 45 1100 9;
branch_if_diff_nonzero 10, 0, ___dot_L200017c6;
___dot_L200017c2:
.debug loc 26 17 5;
fail;
___dot_L200017c4:
.debug loc 26 18 5;
jump ___dot_L200017c4, 32;
___dot_L200017c6:
.debug loc 45 1102 23;
set_reg 10, 536881596;
set_reg 13, 536881640;
set_reg 14, 536881704;
add_wrap 0, 0, 43, 11;
add_wrap 2, 0, 43, 12;
jump _ZN4core6result13unwrap_failed17he4aa90da91656339E, 1;
halt:
.debug loc 52 34 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
jump _ZN19powdr_riscv_runtime8finalize17h91168f0302af67a8E, 1;
.debug loc 31 7 9;
return;
___dot_L20001800:
.debug loc 52 40 5;
jump ___dot_L20001800, 32;
_ZN19powdr_riscv_runtime8finalize17h91168f0302af67a8E:
.debug loc 52 43 0;
add_wrap 2, 0, 4294967248, 2;
mstore 2, 0, 44, 1;
mstore 2, 0, 40, 8;
mstore 2, 0, 36, 9;
mstore 2, 0, 32, 18;
mstore 2, 0, 28, 19;
mstore 2, 0, 24, 20;
mstore 2, 0, 20, 21;
mstore 2, 0, 16, 22;
mstore 2, 0, 12, 23;
set_reg 10, 536880896;
mload 10, 96, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
add_wrap 0, 0, 7, 12;
add_wrap 11, 0, 4, 13;
.debug loc 25 25 9;
branch_if_diff_greater_than 11, 12, 0, ___dot_L2000192e;
wrap16 13, 8, 13;
add_wrap 13, 10, 0, 13;
mstore 13, 0, 4, 0;
add_wrap 0, 0, 1, 11;
mstore 13, 0, 0, 11;
.debug loc 25 27 9;
mload 10, 96, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
add_wrap 11, 0, 1, 11;
and 11, 0, 255, 12;
add_wrap 0, 0, 4, 13;
mload 10, 96, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 10, 33, 96, 32;
.debug loc 25 29 12;
branch_if_diff_nonzero 12, 13, ___dot_L2000185a;
.debug loc 25 30 13;
mload 10, 96, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 0, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 10, 33, 96, 32;
.debug loc 31 7 9;
poseidon_gl 10, 10;
.debug loc 25 43 12;
mload 10, 96, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
___dot_L2000185a:
and 11, 0, 255, 11;
branch_if_diff_equal 11, 0, 0, ___dot_L20001894;
.debug loc 25 0 12;
add_wrap 0, 0, 5, 12;
.debug loc 25 44 33;
add_wrap 11, 0, 4, 13;
.debug loc 43 661 16;
branch_if_diff_greater_than 11, 12, -1, ___dot_L20001942;
.debug loc 43 0 16;
add_wrap 0, 0, 8, 12;
.debug loc 33 25 86;
branch_if_diff_equal 13, 12, 0, ___dot_L20001886;
.debug loc 44 124 14;
wrap16 13, 8, 13;
.debug loc 33 25 86;
add_wrap 10, 13, 0, 10;
wrap16 11, 8, 11;
.debug loc 33 0 86;
add_wrap 0, 0, 32, 12;
.debug loc 33 25 86;
sub_wrap_with_offset 12, 11, 0, 12;
.debug loc 25 45 17;
add_wrap 0, 0, 0, 11;
jump memset, 1;
___dot_L20001886:
.debug loc 31 7 9;
set_reg 10, 536880896;
poseidon_gl 10, 10;
___dot_L20001894:
.debug loc 45 1544 20;
set_reg 10, 536879104;
mload 10, 1796, 19, 32;
mload 10, 1792, 9, 32;
add_wrap 10, 0, 1792, 10;
mload 10, 12, 18, 32;
mload 10, 8, 8, 32;
mload 10, 20, 20, 32;
mload 10, 16, 21, 32;
mload 10, 28, 22, 32;
mload 10, 24, 23, 32;
.debug loc 25 51 9;
add_wrap 0, 0, 97, 12;
add_wrap 0, 0, 0, 11;
jump memset, 1;
.debug loc 31 7 9;
add_wrap 0, 0, 0, 10;
add_wrap 0, 9, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 1, 10;
add_wrap 0, 19, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 2, 10;
add_wrap 0, 8, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 3, 10;
add_wrap 0, 18, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 4, 10;
add_wrap 0, 21, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 5, 10;
add_wrap 0, 20, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 6, 10;
add_wrap 0, 23, 0, 11;
commit_public 10, 11;
add_wrap 0, 0, 7, 10;
add_wrap 0, 22, 0, 11;
commit_public 10, 11;
mload 2, 44, 1, 32;
mload 2, 40, 8, 32;
.debug loc 31 0 9;
mload 2, 36, 9, 32;
mload 2, 32, 18, 32;
mload 2, 28, 19, 32;
mload 2, 24, 20, 32;
mload 2, 20, 21, 32;
mload 2, 16, 22, 32;
mload 2, 12, 23, 32;
.debug loc 52 54 2;
add_wrap 2, 0, 48, 2;
jump_dyn 1, 32;
___dot_L2000192e:
.debug loc 25 25 9;
set_reg 12, 536881564;
add_wrap 0, 0, 12, 11;
add_wrap 0, 13, 0, 10;
jump _ZN4core9panicking18panic_bounds_check17ha1b7823ab8b969bfE, 1;
___dot_L20001942:
.debug loc 44 476 13;
set_reg 12, 536881580;
add_wrap 0, 0, 8, 11;
add_wrap 0, 13, 0, 10;
jump _ZN4core5slice5index22slice_index_order_fail17hd3cc9b16bc1a4131E, 1;
_ZN73_$LT$core_dot__dot_panic_dot__dot_panic_info_dot__dot_PanicInfo$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h7201809dc650370bE:
.debug loc 179 145 0;
add_wrap 2, 0, 4294967216, 2;
mstore 2, 0, 76, 1;
mstore 2, 0, 72, 8;
mstore 2, 0, 68, 9;
mstore 2, 0, 64, 18;
mstore 2, 0, 60, 19;
mstore 2, 0, 56, 20;
mstore 2, 0, 52, 21;
add_wrap 2, 0, 80, 8;
mload 11, 24, 18, 32;
mload 11, 20, 9, 32;
mload 18, 12, 21, 32;
add_wrap 0, 10, 0, 19;
set_reg 11, 536881880;
add_wrap 0, 0, 12, 12;
add_wrap 0, 9, 0, 10;
jump_dyn 21, 1;
add_wrap 0, 0, 1, 20;
.debug loc 144 1976 9;
branch_if_diff_nonzero 10, 0, ___dot_L20001a0e;
.debug loc 179 147 9;
mload 19, 24, 10, 32;
.debug loc 110 1807 37;
add_wrap 10, 0, 8, 11;
.debug loc 110 1807 37;
add_wrap 10, 0, 12, 12;
.debug loc 119 650 24;
mstore 8, 0, 4294967244, 10;
load_label 10, _ZN44_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h306e340642ffe7b0E;
mstore 8, 0, 4294967248, 10;
mstore 8, 0, 4294967252, 11;
load_label 10, _ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E;
mstore 8, 0, 4294967256, 10;
mstore 8, 0, 4294967260, 12;
mstore 8, 0, 4294967264, 10;
.debug loc 96 350 9;
set_reg 10, 536881856;
mstore 8, 0, 4294967220, 10;
add_wrap 0, 0, 3, 10;
mstore 8, 0, 4294967224, 10;
mstore 8, 0, 4294967236, 0;
add_wrap 8, 0, 4294967244, 11;
mstore 8, 0, 4294967228, 11;
mstore 8, 0, 4294967232, 10;
.debug loc 96 1653 13;
add_wrap 8, 0, 4294967220, 12;
add_wrap 0, 9, 0, 10;
add_wrap 0, 18, 0, 11;
jump _ZN4core3fmt5write17hef204004899667f3E, 1;
.debug loc 144 1976 9;
branch_if_diff_nonzero 10, 0, ___dot_L20001a0e;
.debug loc 96 1626 9;
set_reg 11, 536881892;
add_wrap 0, 0, 2, 12;
add_wrap 0, 9, 0, 10;
jump_dyn 21, 1;
.debug loc 144 1976 9;
branch_if_diff_nonzero 10, 0, ___dot_L20001a0e;
.debug loc 96 1653 13;
add_wrap 0, 9, 0, 10;
add_wrap 0, 18, 0, 11;
add_wrap 0, 19, 0, 12;
jump _ZN4core3fmt5write17hef204004899667f3E, 1;
add_wrap 0, 10, 0, 20;
___dot_L20001a0e:
.debug loc 179 151 6;
add_wrap 0, 20, 0, 10;
mload 2, 76, 1, 32;
mload 2, 72, 8, 32;
mload 2, 68, 9, 32;
mload 2, 64, 18, 32;
mload 2, 60, 19, 32;
mload 2, 56, 20, 32;
mload 2, 52, 21, 32;
.debug loc 179 151 6;
add_wrap 2, 0, 80, 2;
jump_dyn 1, 32;
_ZN4core9panicking9panic_fmt17h24451800c87c1c7eE:
.debug loc 176 54 0;
add_wrap 2, 0, 4294967248, 2;
mstore 2, 0, 44, 1;
mstore 2, 0, 40, 8;
add_wrap 2, 0, 48, 8;
mload 10, 20, 12, 32;
mload 10, 16, 13, 32;
mstore 8, 0, 4294967276, 12;
mstore 8, 0, 4294967272, 13;
mload 10, 12, 12, 32;
mload 10, 8, 13, 32;
mload 10, 4, 14, 32;
mload 10, 0, 10, 32;
mstore 8, 0, 4294967268, 12;
mstore 8, 0, 4294967264, 13;
mstore 8, 0, 4294967260, 14;
mstore 8, 0, 4294967256, 10;
mstore 8, 0, 4294967280, 11;
add_wrap 0, 0, 1, 10;
mload 8, 4294967284, 32, 33;
set_reg 34, 0xffff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xffff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 8, 33, 4294967284, 32;
.debug loc 176 74 14;
add_wrap 8, 0, 4294967256, 10;
jump rust_begin_unwind, 1;
_ZN4core9panicking5panic17hb3b5b38e2fececcbE:
.debug loc 176 136 0;
add_wrap 2, 0, 4294967248, 2;
mstore 2, 0, 44, 1;
mstore 2, 0, 40, 8;
add_wrap 2, 0, 48, 8;
mstore 8, 0, 4294967280, 10;
mstore 8, 0, 4294967284, 11;
add_wrap 8, 0, 4294967280, 10;
.debug loc 96 339 9;
mstore 8, 0, 4294967256, 10;
add_wrap 0, 0, 1, 10;
mstore 8, 0, 4294967260, 10;
mstore 8, 0, 4294967272, 0;
add_wrap 0, 0, 4, 10;
mstore 8, 0, 4294967264, 10;
mstore 8, 0, 4294967268, 0;
.debug loc 176 148 5;
add_wrap 8, 0, 4294967256, 10;
add_wrap 0, 12, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core9panicking18panic_bounds_check17ha1b7823ab8b969bfE:
.debug loc 176 271 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
add_wrap 2, 0, 64, 8;
mstore 8, 0, 4294967240, 10;
mstore 8, 0, 4294967244, 11;
add_wrap 8, 0, 4294967244, 10;
mstore 8, 0, 4294967272, 10;
load_label 10, _ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E;
mstore 8, 0, 4294967276, 10;
add_wrap 8, 0, 4294967240, 11;
mstore 8, 0, 4294967280, 11;
mstore 8, 0, 4294967284, 10;
.debug loc 96 350 9;
set_reg 10, 536881912;
mstore 8, 0, 4294967248, 10;
add_wrap 0, 0, 2, 10;
mstore 8, 0, 4294967252, 10;
mstore 8, 0, 4294967264, 0;
add_wrap 8, 0, 4294967272, 11;
mstore 8, 0, 4294967256, 11;
mstore 8, 0, 4294967260, 10;
.debug loc 176 276 5;
add_wrap 8, 0, 4294967248, 10;
add_wrap 0, 12, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core6result13unwrap_failed17he4aa90da91656339E:
.debug loc 144 1678 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
add_wrap 2, 0, 64, 8;
mstore 8, 0, 4294967232, 10;
mstore 8, 0, 4294967236, 11;
mstore 8, 0, 4294967240, 12;
mstore 8, 0, 4294967244, 13;
add_wrap 8, 0, 4294967232, 10;
mstore 8, 0, 4294967272, 10;
load_label 10, _ZN44_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h306e340642ffe7b0E;
mstore 8, 0, 4294967276, 10;
add_wrap 8, 0, 4294967240, 10;
mstore 8, 0, 4294967280, 10;
load_label 10, _ZN42_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Debug$GT$3fmt17hd338eab38a7adb87E;
mstore 8, 0, 4294967284, 10;
.debug loc 96 350 9;
set_reg 10, 536881932;
mstore 8, 0, 4294967248, 10;
add_wrap 0, 0, 2, 10;
mstore 8, 0, 4294967252, 10;
mstore 8, 0, 4294967264, 0;
add_wrap 8, 0, 4294967272, 11;
mstore 8, 0, 4294967256, 11;
mstore 8, 0, 4294967260, 10;
.debug loc 144 1679 5;
add_wrap 8, 0, 4294967248, 10;
add_wrap 0, 14, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core3fmt5write17hef204004899667f3E:
.debug loc 96 1160 0;
add_wrap 2, 0, 4294967216, 2;
mstore 2, 0, 76, 1;
mstore 2, 0, 72, 8;
mstore 2, 0, 68, 9;
mstore 2, 0, 64, 18;
mstore 2, 0, 60, 19;
mstore 2, 0, 56, 20;
mstore 2, 0, 52, 21;
mstore 2, 0, 48, 22;
mstore 2, 0, 44, 23;
mstore 2, 0, 40, 24;
add_wrap 2, 0, 80, 8;
add_wrap 0, 12, 0, 19;
mstore 8, 0, 4294967248, 0;
add_wrap 0, 0, 32, 12;
mstore 8, 0, 4294967236, 12;
add_wrap 0, 0, 3, 12;
mload 8, 4294967252, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 12, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 8, 33, 4294967252, 32;
.debug loc 96 1164 11;
mload 19, 16, 9, 32;
.debug loc 96 283 9;
mstore 8, 0, 4294967220, 0;
mstore 8, 0, 4294967228, 0;
mstore 8, 0, 4294967240, 10;
mstore 8, 0, 4294967244, 11;
.debug loc 96 1164 5;
branch_if_diff_equal 9, 0, 0, ___dot_L20001c82;
.debug loc 96 1183 14;
mload 19, 20, 21, 32;
.debug loc 103 25 86;
branch_if_diff_equal 21, 0, 0, ___dot_L20001cde;
.debug loc 103 0 86;
mload 19, 0, 22, 32;
mload 19, 8, 20, 32;
.debug loc 103 25 86;
add_wrap 21, 0, 4294967295, 10;
wrap16 10, 32, 10;
shr 10, 0, 5, 10;
add_wrap 10, 0, 1, 18;
add_wrap 22, 0, 4, 22;
wrap16 21, 32, 21;
add_wrap 9, 0, 16, 9;
add_wrap 0, 0, 2, 23;
add_wrap 0, 0, 1, 24;
___dot_L20001bd6:
.debug loc 96 1190 21;
mload 22, 0, 12, 32;
branch_if_diff_equal 12, 0, 0, ___dot_L20001bf0;
.debug loc 96 1191 21;
mload 8, 4294967244, 13, 32;
mload 8, 4294967240, 10, 32;
.debug loc 96 1191 45;
mload 22, 4294967292, 11, 32;
.debug loc 96 1191 21;
mload 13, 12, 13, 32;
jump_dyn 13, 1;
branch_if_diff_nonzero 10, 0, ___dot_L20001d06;
___dot_L20001bf0:
.debug loc 96 1210 16;
mload 9, 0, 12, 32;
.debug loc 96 1211 17;
mload 9, 12, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
.debug loc 96 1212 17;
mload 9, 8, 14, 32;
.debug loc 96 1216 21;
mload 9, 4294967288, 11, 32;
mload 9, 4294967292, 10, 32;
.debug loc 96 1210 5;
mstore 8, 0, 4294967236, 12;
.debug loc 96 1211 5;
mload 8, 4294967252, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 8, 33, 4294967252, 32;
.debug loc 96 1212 5;
mstore 8, 0, 4294967248, 14;
branch_if_diff_equal 11, 0, 0, ___dot_L20001c2e;
.debug loc 96 0 5;
branch_if_diff_nonzero 11, 24, ___dot_L20001c1a;
.debug loc 101 117 14;
wrap16 10, 8, 10;
add_wrap 10, 20, 0, 10;
.debug loc 178 181 15;
mload 10, 4, 11, 32;
.debug loc 178 181 9;
branch_if_diff_equal 11, 0, 0, ___dot_L20001c2c;
___dot_L20001c1a:
.debug loc 96 1217 25;
mload 9, 4294967280, 12, 32;
.debug loc 96 1216 9;
mstore 8, 0, 4294967220, 0;
mstore 8, 0, 4294967224, 10;
.debug loc 96 1232 5;
branch_if_diff_nonzero 12, 23, ___dot_L20001c40;
jump ___dot_L20001c52, 32;
___dot_L20001c2c:
.debug loc 178 182 33;
mload 10, 0, 10, 32;
___dot_L20001c2e:
.debug loc 178 0 33;
add_wrap 0, 0, 1, 11;
.debug loc 96 1217 25;
mload 9, 4294967280, 12, 32;
.debug loc 96 1216 9;
mstore 8, 0, 4294967220, 11;
mstore 8, 0, 4294967224, 10;
.debug loc 96 1232 5;
branch_if_diff_equal 12, 23, 0, ___dot_L20001c52;
___dot_L20001c40:
.debug loc 96 1217 25;
mload 9, 4294967284, 11, 32;
.debug loc 96 1232 5;
branch_if_diff_nonzero 12, 24, ___dot_L20001c58;
.debug loc 101 117 14;
wrap16 11, 8, 10;
add_wrap 10, 20, 0, 10;
.debug loc 178 181 15;
mload 10, 4, 11, 32;
.debug loc 178 181 9;
branch_if_diff_equal 11, 0, 0, ___dot_L20001c56;
___dot_L20001c52:
.debug loc 178 0 9;
add_wrap 0, 0, 0, 12;
.debug loc 96 1232 5;
jump ___dot_L20001c5a, 32;
___dot_L20001c56:
.debug loc 178 182 33;
mload 10, 0, 11, 32;
___dot_L20001c58:
.debug loc 178 0 33;
add_wrap 0, 0, 1, 12;
___dot_L20001c5a:
.debug loc 96 1224 45;
mload 9, 4, 10, 32;
.debug loc 101 117 14;
wrap16 10, 8, 10;
add_wrap 10, 20, 0, 10;
.debug loc 178 165 15;
mload 10, 4, 13, 32;
.debug loc 178 173 52;
mload 10, 0, 10, 32;
.debug loc 96 1217 9;
mstore 8, 0, 4294967228, 12;
mstore 8, 0, 4294967232, 11;
.debug loc 178 173 76;
add_wrap 8, 0, 4294967220, 11;
jump_dyn 13, 1;
.debug loc 96 1195 17;
branch_if_diff_nonzero 10, 0, ___dot_L20001d06;
.debug loc 110 1749 9;
add_wrap 22, 0, 8, 22;
add_wrap 21, 0, 4294967264, 21;
add_wrap 9, 0, 32, 9;
branch_if_diff_nonzero 21, 0, ___dot_L20001bd6;
jump ___dot_L20001cd4, 32;
___dot_L20001c82:
.debug loc 96 1167 29;
mload 19, 12, 20, 32;
.debug loc 103 25 86;
branch_if_diff_equal 20, 0, 0, ___dot_L20001cde;
.debug loc 103 0 86;
mload 19, 8, 9, 32;
mload 19, 0, 21, 32;
.debug loc 103 25 86;
add_wrap 20, 0, 4294967295, 10;
wrap16 10, 8, 10;
shr 10, 0, 3, 10;
add_wrap 10, 0, 1, 18;
add_wrap 21, 0, 4, 21;
wrap16 20, 8, 20;
add_wrap 9, 0, 4, 9;
___dot_L20001ca4:
.debug loc 96 1171 21;
mload 21, 0, 12, 32;
branch_if_diff_equal 12, 0, 0, ___dot_L20001cbc;
.debug loc 96 1172 21;
mload 8, 4294967244, 13, 32;
mload 8, 4294967240, 10, 32;
.debug loc 96 1172 45;
mload 21, 4294967292, 11, 32;
.debug loc 96 1172 21;
mload 13, 12, 13, 32;
jump_dyn 13, 1;
branch_if_diff_nonzero 10, 0, ___dot_L20001d06;
___dot_L20001cbc:
.debug loc 178 165 15;
mload 9, 0, 12, 32;
.debug loc 178 173 52;
mload 9, 4294967292, 10, 32;
.debug loc 178 173 76;
add_wrap 8, 0, 4294967220, 11;
jump_dyn 12, 1;
.debug loc 96 1178 21;
branch_if_diff_nonzero 10, 0, ___dot_L20001d06;
.debug loc 110 1749 9;
add_wrap 21, 0, 8, 21;
add_wrap 20, 0, 4294967288, 20;
add_wrap 9, 0, 8, 9;
.debug loc 103 25 86;
branch_if_diff_nonzero 20, 0, ___dot_L20001ca4;
___dot_L20001cd4:
.debug loc 96 1202 26;
mload 19, 4, 10, 32;
.debug loc 96 1202 12;
branch_if_diff_greater_than 10, 18, 0, ___dot_L20001ce8;
jump ___dot_L20001d0a, 32;
___dot_L20001cde:
.debug loc 96 0 12;
add_wrap 0, 0, 0, 18;
.debug loc 96 1202 26;
mload 19, 4, 10, 32;
.debug loc 96 1202 12;
branch_if_diff_greater_than 0, 10, -1, ___dot_L20001d0a;
___dot_L20001ce8:
.debug loc 101 256 12;
mload 19, 0, 10, 32;
wrap16 18, 8, 18;
add_wrap 18, 10, 0, 18;
.debug loc 96 1203 9;
mload 8, 4294967244, 13, 32;
mload 8, 4294967240, 10, 32;
.debug loc 96 1203 33;
mload 18, 0, 11, 32;
mload 18, 4, 12, 32;
.debug loc 96 1203 9;
mload 13, 12, 13, 32;
jump_dyn 13, 1;
branch_if_diff_equal 10, 0, 0, ___dot_L20001d0a;
___dot_L20001d06:
.debug loc 96 0 9;
add_wrap 0, 0, 1, 10;
.debug loc 96 1207 2;
jump ___dot_L20001d0c, 32;
___dot_L20001d0a:
.debug loc 96 0 2;
add_wrap 0, 0, 0, 10;
___dot_L20001d0c:
mload 2, 76, 1, 32;
mload 2, 72, 8, 32;
mload 2, 68, 9, 32;
mload 2, 64, 18, 32;
mload 2, 60, 19, 32;
mload 2, 56, 20, 32;
mload 2, 52, 21, 32;
mload 2, 48, 22, 32;
mload 2, 44, 23, 32;
mload 2, 40, 24, 32;
.debug loc 96 1207 2;
add_wrap 2, 0, 80, 2;
jump_dyn 1, 32;
_ZN4core3fmt9Formatter12pad_integral17had4dfa66510dbedeE:
.debug loc 96 1332 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
mstore 2, 0, 52, 9;
mstore 2, 0, 48, 18;
mstore 2, 0, 44, 19;
mstore 2, 0, 40, 20;
mstore 2, 0, 36, 21;
mstore 2, 0, 32, 22;
mstore 2, 0, 28, 23;
mstore 2, 0, 24, 24;
mstore 2, 0, 20, 25;
mstore 2, 0, 16, 26;
mstore 2, 0, 12, 27;
add_wrap 2, 0, 64, 8;
add_wrap 0, 15, 0, 19;
add_wrap 0, 14, 0, 18;
add_wrap 0, 13, 0, 20;
add_wrap 0, 12, 0, 22;
branch_if_diff_equal 11, 0, 0, ___dot_L20001d94;
.debug loc 96 1832 9;
mload 10, 28, 9, 32;
and 9, 0, 1, 24;
set_reg 21, 1114112;
.debug loc 96 1339 19;
branch_if_diff_equal 24, 0, 0, ___dot_L20001d5e;
.debug loc 96 0 19;
add_wrap 0, 0, 43, 21;
___dot_L20001d5e:
.debug loc 96 1339 19;
add_wrap 24, 19, 0, 24;
.debug loc 96 1889 9;
and 9, 0, 4, 11;
.debug loc 96 1344 25;
branch_if_diff_equal 11, 0, 0, ___dot_L20001da4;
___dot_L20001d66:
.debug loc 96 0 25;
add_wrap 0, 0, 16, 11;
.debug loc 188 28 47;
branch_if_diff_greater_than 20, 11, -1, ___dot_L20001dac;
.debug loc 188 0 47;
add_wrap 0, 0, 0, 11;
.debug loc 103 25 86;
branch_if_diff_equal 20, 0, 0, ___dot_L20001d8c;
.debug loc 103 237 24;
add_wrap 22, 20, 0, 12;
add_wrap 0, 22, 0, 13;
___dot_L20001d78:
.debug loc 103 232 27;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 14;
.debug loc 189 24 5;
to_signed 14, 32;
is_diff_greater_than 0, 32, -(-64), 14;
xor 14, 0, 1, 14;
.debug loc 103 237 24;
add_wrap 13, 0, 1, 13;
.debug loc 190 53 28;
add_wrap 11, 14, 0, 11;
.debug loc 103 237 24;
branch_if_diff_nonzero 13, 12, ___dot_L20001d78;
___dot_L20001d8c:
.debug loc 96 1345 13;
add_wrap 24, 11, 0, 24;
.debug loc 96 1361 15;
mload 10, 0, 11, 32;
.debug loc 96 1361 9;
branch_if_diff_equal 11, 0, 0, ___dot_L20001de4;
jump ___dot_L20001dc6, 32;
___dot_L20001d94:
.debug loc 96 1889 9;
mload 10, 28, 9, 32;
.debug loc 96 1338 13;
add_wrap 19, 0, 1, 24;
add_wrap 0, 0, 45, 21;
.debug loc 96 1889 9;
and 9, 0, 4, 11;
.debug loc 96 1344 25;
branch_if_diff_nonzero 11, 0, ___dot_L20001d66;
___dot_L20001da4:
.debug loc 96 0 25;
add_wrap 0, 0, 0, 22;
.debug loc 96 1361 15;
mload 10, 0, 11, 32;
.debug loc 96 1361 9;
branch_if_diff_nonzero 11, 0, ___dot_L20001dc6;
jump ___dot_L20001de4, 32;
___dot_L20001dac:
.debug loc 96 0 9;
add_wrap 0, 10, 0, 23;
.debug loc 188 35 9;
add_wrap 0, 22, 0, 10;
add_wrap 0, 20, 0, 11;
jump _ZN4core3str5count14do_count_chars17he8abb95ab04ae460E, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 23, 0, 10;
.debug loc 96 1345 13;
add_wrap 24, 11, 0, 24;
.debug loc 96 1361 15;
mload 23, 0, 11, 32;
.debug loc 96 1361 9;
branch_if_diff_equal 11, 0, 0, ___dot_L20001de4;
___dot_L20001dc6:
.debug loc 96 1370 35;
mload 10, 4, 25, 32;
.debug loc 96 1370 26;
branch_if_diff_greater_than 24, 25, -1, ___dot_L20001de4;
.debug loc 96 1915 9;
and 9, 0, 8, 9;
branch_if_diff_nonzero 9, 0, ___dot_L20001e28;
.debug loc 96 1483 27;
mload 10, 32, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 11;
add_wrap 0, 0, 1, 12;
.debug loc 96 1389 49;
sub_wrap_with_offset 25, 24, 0, 25;
.debug loc 96 1483 21;
to_signed 12, 32;
to_signed 11, 33;
branch_if_diff_greater_than 33, 32, 0, ___dot_L20001e78;
branch_if_diff_equal 11, 0, 0, ___dot_L20001e8e;
jump ___dot_L20001e8a, 32;
___dot_L20001de4:
.debug loc 96 0 0;
mload 10, 20, 23, 32;
mload 10, 24, 9, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 9, 0, 11;
add_wrap 0, 21, 0, 12;
add_wrap 0, 22, 0, 13;
add_wrap 0, 20, 0, 14;
jump _ZN4core3fmt9Formatter12pad_integral12write_prefix17h27200b97870eac3eE, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 0, 1, 10;
branch_if_diff_nonzero 11, 0, ___dot_L20001eb0;
mload 9, 12, 15, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 18, 0, 11;
add_wrap 0, 19, 0, 12;
mload 2, 60, 1, 32;
mload 2, 56, 8, 32;
mload 2, 52, 9, 32;
mload 2, 48, 18, 32;
mload 2, 44, 19, 32;
mload 2, 40, 20, 32;
mload 2, 36, 21, 32;
mload 2, 32, 22, 32;
mload 2, 28, 23, 32;
mload 2, 24, 24, 32;
mload 2, 20, 25, 32;
mload 2, 16, 26, 32;
mload 2, 12, 27, 32;
add_wrap 2, 0, 64, 2;
jump_dyn 15, 32;
___dot_L20001e28:
.debug loc 161 1399 9;
mload 10, 16, 9, 32;
add_wrap 0, 0, 48, 11;
.debug loc 161 1399 9;
mload 10, 32, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 12;
mstore 8, 0, 4294967240, 12;
.debug loc 96 1379 17;
mload 10, 20, 23, 32;
mload 10, 24, 26, 32;
.debug loc 161 1608 9;
mstore 10, 0, 16, 11;
add_wrap 0, 0, 1, 11;
add_wrap 0, 10, 0, 27;
.debug loc 161 1608 9;
mload 10, 32, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 10, 33, 32, 32;
.debug loc 96 1379 17;
add_wrap 0, 23, 0, 10;
add_wrap 0, 26, 0, 11;
add_wrap 0, 21, 0, 12;
add_wrap 0, 22, 0, 13;
add_wrap 0, 20, 0, 14;
jump _ZN4core3fmt9Formatter12pad_integral12write_prefix17h27200b97870eac3eE, 1;
branch_if_diff_nonzero 10, 0, ___dot_L20001eae;
.debug loc 96 0 17;
add_wrap 0, 9, 0, 20;
.debug loc 96 1496 9;
sub_wrap_with_offset 25, 24, 0, 9;
add_wrap 9, 0, 1, 9;
___dot_L20001e64:
.debug loc 125 1563 52;
add_wrap 9, 0, 4294967295, 9;
branch_if_diff_equal 9, 0, 0, ___dot_L20001f1c;
.debug loc 96 1497 13;
mload 26, 16, 12, 32;
add_wrap 0, 0, 48, 11;
add_wrap 0, 23, 0, 10;
jump_dyn 12, 1;
.debug loc 144 1976 9;
branch_if_diff_equal 10, 0, 0, ___dot_L20001e64;
jump ___dot_L20001eae, 32;
___dot_L20001e78:
.debug loc 144 0 9;
add_wrap 0, 0, 2, 12;
.debug loc 96 1483 21;
branch_if_diff_nonzero 11, 12, ___dot_L20001e8a;
.debug loc 96 1493 35;
shr 25, 0, 1, 11;
.debug loc 96 1493 48;
add_wrap 25, 0, 1, 25;
shr 25, 0, 1, 25;
jump ___dot_L20001e8e, 32;
___dot_L20001e8a:
.debug loc 96 0 48;
add_wrap 0, 25, 0, 11;
add_wrap 0, 0, 0, 25;
___dot_L20001e8e:
mload 10, 20, 23, 32;
mload 10, 24, 26, 32;
mload 10, 16, 24, 32;
.debug loc 96 1496 9;
add_wrap 11, 0, 1, 9;
___dot_L20001e9e:
.debug loc 125 1563 52;
add_wrap 9, 0, 4294967295, 9;
.debug loc 100 752 12;
branch_if_diff_equal 9, 0, 0, ___dot_L20001ece;
.debug loc 96 1497 13;
mload 26, 16, 12, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 24, 0, 11;
jump_dyn 12, 1;
.debug loc 144 1976 9;
branch_if_diff_equal 10, 0, 0, ___dot_L20001e9e;
___dot_L20001eae:
.debug loc 144 0 9;
add_wrap 0, 0, 1, 10;
___dot_L20001eb0:
mload 2, 60, 1, 32;
mload 2, 56, 8, 32;
mload 2, 52, 9, 32;
mload 2, 48, 18, 32;
mload 2, 44, 19, 32;
mload 2, 40, 20, 32;
mload 2, 36, 21, 32;
mload 2, 32, 22, 32;
mload 2, 28, 23, 32;
mload 2, 24, 24, 32;
mload 2, 20, 25, 32;
mload 2, 16, 26, 32;
mload 2, 12, 27, 32;
.debug loc 96 1395 6;
add_wrap 2, 0, 64, 2;
jump_dyn 1, 32;
___dot_L20001ece:
.debug loc 96 1390 17;
add_wrap 0, 23, 0, 10;
add_wrap 0, 26, 0, 11;
add_wrap 0, 21, 0, 12;
add_wrap 0, 22, 0, 13;
add_wrap 0, 20, 0, 14;
jump _ZN4core3fmt9Formatter12pad_integral12write_prefix17h27200b97870eac3eE, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 0, 1, 10;
branch_if_diff_nonzero 11, 0, ___dot_L20001eb0;
.debug loc 96 1391 17;
mload 26, 12, 13, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 18, 0, 11;
add_wrap 0, 19, 0, 12;
jump_dyn 13, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 0, 1, 10;
branch_if_diff_nonzero 11, 0, ___dot_L20001eb0;
.debug loc 96 1258 9;
sub_wrap_with_offset 0, 25, 0, 18;
add_wrap 0, 0, 4294967295, 19;
add_wrap 0, 0, 4294967295, 9;
___dot_L20001f00:
.debug loc 125 1563 52;
add_wrap 18, 9, 0, 10;
.debug loc 100 752 12;
branch_if_diff_equal 10, 19, 0, ___dot_L20001f3e;
.debug loc 96 1259 13;
mload 26, 16, 12, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 24, 0, 11;
jump_dyn 12, 1;
.debug loc 144 1976 9;
add_wrap 9, 0, 1, 9;
branch_if_diff_equal 10, 0, 0, ___dot_L20001f00;
.debug loc 125 1563 52;
is_diff_greater_than 25, 9, 0, 10;
.debug loc 96 1393 13;
jump ___dot_L20001eb0, 32;
___dot_L20001f1c:
.debug loc 96 1381 17;
mload 26, 12, 13, 32;
add_wrap 0, 23, 0, 10;
add_wrap 0, 18, 0, 11;
add_wrap 0, 19, 0, 12;
jump_dyn 13, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 0, 1, 10;
branch_if_diff_nonzero 11, 0, ___dot_L20001eb0;
.debug loc 96 0 17;
add_wrap 0, 0, 0, 10;
.debug loc 96 1383 17;
mstore 27, 0, 16, 20;
mload 8, 4294967240, 11, 32;
.debug loc 96 1384 17;
mload 27, 32, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 27, 33, 32, 32;
jump ___dot_L20001eb0, 32;
___dot_L20001f3e:
.debug loc 125 1563 52;
is_diff_greater_than 25, 25, 0, 10;
.debug loc 96 1393 13;
jump ___dot_L20001eb0, 32;
_ZN4core3fmt9Formatter12pad_integral12write_prefix17h27200b97870eac3eE:
.debug loc 96 1353 0;
add_wrap 2, 0, 4294967264, 2;
mstore 2, 0, 28, 1;
mstore 2, 0, 24, 8;
mstore 2, 0, 20, 9;
mstore 2, 0, 16, 18;
mstore 2, 0, 12, 19;
mstore 2, 0, 8, 20;
add_wrap 2, 0, 32, 8;
set_reg 15, 1114112;
add_wrap 0, 14, 0, 18;
add_wrap 0, 13, 0, 20;
add_wrap 0, 11, 0, 19;
branch_if_diff_equal 12, 15, 0, ___dot_L20001f74;
.debug loc 96 1355 17;
mload 19, 16, 13, 32;
add_wrap 0, 10, 0, 9;
add_wrap 0, 12, 0, 11;
jump_dyn 13, 1;
add_wrap 0, 10, 0, 12;
add_wrap 0, 9, 0, 10;
add_wrap 0, 0, 1, 11;
.debug loc 144 1976 9;
branch_if_diff_nonzero 12, 0, ___dot_L20001f92;
___dot_L20001f74:
.debug loc 96 1357 20;
branch_if_diff_equal 20, 0, 0, ___dot_L20001f90;
.debug loc 96 1357 44;
mload 19, 12, 15, 32;
add_wrap 0, 20, 0, 11;
add_wrap 0, 18, 0, 12;
mload 2, 28, 1, 32;
mload 2, 24, 8, 32;
mload 2, 20, 9, 32;
mload 2, 16, 18, 32;
mload 2, 12, 19, 32;
mload 2, 8, 20, 32;
.debug loc 96 1357 44;
add_wrap 2, 0, 32, 2;
jump_dyn 15, 32;
___dot_L20001f90:
.debug loc 96 0 44;
add_wrap 0, 0, 0, 11;
___dot_L20001f92:
.debug loc 96 1358 10;
add_wrap 0, 11, 0, 10;
mload 2, 28, 1, 32;
mload 2, 24, 8, 32;
mload 2, 20, 9, 32;
mload 2, 16, 18, 32;
mload 2, 12, 19, 32;
mload 2, 8, 20, 32;
.debug loc 96 1358 10;
add_wrap 2, 0, 32, 2;
jump_dyn 1, 32;
_ZN4core3fmt9Formatter3pad17h574160d80a598710E:
.debug loc 96 1427 0;
add_wrap 2, 0, 4294967248, 2;
mstore 2, 0, 44, 1;
mstore 2, 0, 40, 8;
mstore 2, 0, 36, 9;
mstore 2, 0, 32, 18;
mstore 2, 0, 28, 19;
mstore 2, 0, 24, 20;
mstore 2, 0, 20, 21;
mstore 2, 0, 16, 22;
mstore 2, 0, 12, 23;
add_wrap 2, 0, 48, 8;
mload 10, 0, 13, 32;
.debug loc 96 0 0;
mload 10, 8, 14, 32;
add_wrap 0, 12, 0, 18;
add_wrap 0, 11, 0, 19;
and 14, 0, 1, 11;
.debug loc 119 475 9;
branch_if_diff_nonzero 13, 0, ___dot_L20001fca;
.debug loc 119 475 9;
branch_if_diff_equal 11, 0, 0, ___dot_L200020be;
___dot_L20001fca:
.debug loc 96 1434 24;
branch_if_diff_equal 11, 0, 0, ___dot_L20002062;
.debug loc 96 1434 29;
mload 10, 12, 14, 32;
.debug loc 123 1044 18;
add_wrap 19, 18, 0, 12;
add_wrap 0, 0, 0, 11;
.debug loc 100 752 12;
branch_if_diff_equal 14, 0, 0, ___dot_L2000201c;
.debug loc 100 0 12;
add_wrap 0, 0, 224, 17;
add_wrap 0, 0, 240, 16;
add_wrap 0, 19, 0, 9;
jump ___dot_L20001ff2, 32;
___dot_L20001fe2:
add_wrap 9, 0, 1, 15;
___dot_L20001fe6:
.debug loc 182 192 38;
sub_wrap_with_offset 9, 11, 0, 9;
.debug loc 125 1563 52;
add_wrap 14, 0, 4294967295, 14;
.debug loc 182 192 17;
sub_wrap_with_offset 15, 9, 0, 11;
add_wrap 0, 15, 0, 9;
.debug loc 100 752 12;
branch_if_diff_equal 14, 0, 0, ___dot_L2000201e;
___dot_L20001ff2:
.debug loc 103 25 86;
branch_if_diff_equal 9, 12, 0, ___dot_L20002062;
.debug loc 189 37 13;
mload 9, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 15;
.debug loc 189 38 8;
to_signed 15, 32;
to_signed 0, 33;
branch_if_diff_greater_than 32, 33, -1, ___dot_L20001fe2;
.debug loc 189 0 0;
and 15, 0, 255, 15;
.debug loc 189 50 8;
branch_if_diff_greater_than 17, 15, 0, ___dot_L20002010;
.debug loc 189 58 12;
branch_if_diff_greater_than 16, 15, 0, ___dot_L20002016;
.debug loc 110 601 37;
add_wrap 9, 0, 4, 15;
jump ___dot_L20001fe6, 32;
___dot_L20002010:
.debug loc 189 0 0;
add_wrap 9, 0, 2, 15;
.debug loc 189 50 8;
jump ___dot_L20001fe6, 32;
___dot_L20002016:
.debug loc 189 0 0;
add_wrap 9, 0, 3, 15;
.debug loc 189 58 12;
jump ___dot_L20001fe6, 32;
___dot_L2000201c:
.debug loc 189 0 12;
add_wrap 0, 19, 0, 15;
___dot_L2000201e:
.debug loc 103 25 86;
branch_if_diff_equal 15, 12, 0, ___dot_L20002062;
.debug loc 189 37 13;
mload 15, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 12;
.debug loc 189 38 8;
to_signed 12, 32;
to_signed 0, 33;
branch_if_diff_greater_than 33, 32, 0, ___dot_L2000202e;
.debug loc 184 193 12;
branch_if_diff_nonzero 11, 0, ___dot_L20002038;
jump ___dot_L20002058, 32;
___dot_L2000202e:
.debug loc 184 0 12;
and 12, 0, 255, 12;
add_wrap 0, 0, 224, 14;
.debug loc 184 193 12;
branch_if_diff_equal 11, 0, 0, ___dot_L20002058;
___dot_L20002038:
.debug loc 101 256 12;
branch_if_diff_greater_than 11, 18, -1, ___dot_L20002054;
.debug loc 101 117 14;
add_wrap 19, 11, 0, 12;
.debug loc 184 209 19;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 12;
add_wrap 0, 0, 4294967231, 14;
.debug loc 194 437 12;
to_signed 14, 32;
to_signed 12, 33;
branch_if_diff_greater_than 33, 32, 0, ___dot_L20002058;
___dot_L2000204c:
.debug loc 194 0 12;
add_wrap 0, 0, 0, 12;
.debug loc 131 988 9;
branch_if_diff_nonzero 0, 0, ___dot_L2000205e;
jump ___dot_L20002062, 32;
___dot_L20002054:
.debug loc 194 437 12;
branch_if_diff_nonzero 11, 18, ___dot_L2000204c;
___dot_L20002058:
.debug loc 194 0 12;
add_wrap 0, 19, 0, 12;
.debug loc 131 988 9;
branch_if_diff_equal 19, 0, 0, ___dot_L20002062;
___dot_L2000205e:
.debug loc 131 0 9;
add_wrap 0, 11, 0, 18;
add_wrap 0, 12, 0, 19;
___dot_L20002062:
.debug loc 96 1451 9;
branch_if_diff_equal 13, 0, 0, ___dot_L200020be;
.debug loc 96 1455 18;
mload 10, 4, 9, 32;
add_wrap 0, 0, 16, 11;
.debug loc 188 28 47;
branch_if_diff_greater_than 18, 11, -1, ___dot_L200020a8;
.debug loc 188 0 47;
add_wrap 0, 0, 0, 11;
.debug loc 103 25 86;
branch_if_diff_equal 18, 0, 0, ___dot_L2000208c;
.debug loc 103 237 24;
add_wrap 19, 18, 0, 12;
add_wrap 0, 19, 0, 13;
___dot_L20002078:
.debug loc 103 232 27;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 14;
.debug loc 189 24 5;
to_signed 14, 32;
is_diff_greater_than 0, 32, -(-64), 14;
xor 14, 0, 1, 14;
.debug loc 103 237 24;
add_wrap 13, 0, 1, 13;
.debug loc 190 53 28;
add_wrap 11, 14, 0, 11;
.debug loc 103 237 24;
branch_if_diff_nonzero 13, 12, ___dot_L20002078;
___dot_L2000208c:
.debug loc 96 1459 20;
branch_if_diff_greater_than 11, 9, -1, ___dot_L200020be;
___dot_L20002090:
.debug loc 96 1483 27;
mload 10, 32, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
add_wrap 0, 0, 0, 12;
add_wrap 0, 0, 1, 14;
.debug loc 96 1466 53;
sub_wrap_with_offset 9, 11, 0, 21;
.debug loc 96 1483 21;
to_signed 14, 32;
to_signed 13, 33;
branch_if_diff_greater_than 33, 32, 0, ___dot_L200020de;
branch_if_diff_equal 13, 0, 0, ___dot_L200020ee;
.debug loc 96 0 21;
add_wrap 0, 21, 0, 12;
add_wrap 0, 0, 0, 21;
.debug loc 96 1492 44;
jump ___dot_L200020ee, 32;
___dot_L200020a8:
.debug loc 96 0 44;
add_wrap 0, 10, 0, 20;
.debug loc 188 35 9;
add_wrap 0, 19, 0, 10;
add_wrap 0, 18, 0, 11;
jump _ZN4core3str5count14do_count_chars17he8abb95ab04ae460E, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 20, 0, 10;
.debug loc 96 1459 20;
branch_if_diff_greater_than 9, 11, 0, ___dot_L20002090;
___dot_L200020be:
.debug loc 96 0 0;
mload 10, 24, 11, 32;
mload 10, 20, 10, 32;
mload 11, 12, 15, 32;
add_wrap 0, 19, 0, 11;
add_wrap 0, 18, 0, 12;
mload 2, 44, 1, 32;
mload 2, 40, 8, 32;
mload 2, 36, 9, 32;
mload 2, 32, 18, 32;
mload 2, 28, 19, 32;
mload 2, 24, 20, 32;
mload 2, 20, 21, 32;
mload 2, 16, 22, 32;
mload 2, 12, 23, 32;
add_wrap 2, 0, 48, 2;
jump_dyn 15, 32;
___dot_L200020de:
add_wrap 0, 0, 2, 11;
.debug loc 96 1483 21;
branch_if_diff_nonzero 13, 11, ___dot_L200020ee;
.debug loc 96 1493 35;
shr 21, 0, 1, 12;
.debug loc 96 1493 48;
add_wrap 21, 0, 1, 21;
shr 21, 0, 1, 21;
___dot_L200020ee:
.debug loc 96 0 48;
mload 10, 20, 20, 32;
mload 10, 24, 23, 32;
mload 10, 16, 22, 32;
.debug loc 96 1496 9;
add_wrap 12, 0, 1, 9;
___dot_L200020fe:
.debug loc 125 1563 52;
add_wrap 9, 0, 4294967295, 9;
.debug loc 100 752 12;
branch_if_diff_equal 9, 0, 0, ___dot_L20002112;
.debug loc 96 1497 13;
mload 23, 16, 12, 32;
add_wrap 0, 20, 0, 10;
add_wrap 0, 22, 0, 11;
jump_dyn 12, 1;
.debug loc 144 1976 9;
branch_if_diff_equal 10, 0, 0, ___dot_L200020fe;
.debug loc 144 0 9;
add_wrap 0, 0, 1, 10;
.debug loc 144 1976 9;
jump ___dot_L2000214a, 32;
___dot_L20002112:
.debug loc 96 1467 21;
mload 23, 12, 13, 32;
add_wrap 0, 20, 0, 10;
add_wrap 0, 19, 0, 11;
add_wrap 0, 18, 0, 12;
jump_dyn 13, 1;
add_wrap 0, 10, 0, 11;
add_wrap 0, 0, 1, 10;
.debug loc 144 1976 9;
branch_if_diff_nonzero 11, 0, ___dot_L2000214a;
.debug loc 96 1258 9;
sub_wrap_with_offset 0, 21, 0, 18;
add_wrap 0, 0, 4294967295, 19;
add_wrap 0, 0, 4294967295, 9;
___dot_L2000212c:
.debug loc 125 1563 52;
add_wrap 18, 9, 0, 10;
.debug loc 100 752 12;
branch_if_diff_equal 10, 19, 0, ___dot_L20002144;
.debug loc 96 1259 13;
mload 23, 16, 12, 32;
add_wrap 0, 20, 0, 10;
add_wrap 0, 22, 0, 11;
jump_dyn 12, 1;
.debug loc 144 1976 9;
add_wrap 9, 0, 1, 9;
branch_if_diff_equal 10, 0, 0, ___dot_L2000212c;
jump ___dot_L20002146, 32;
___dot_L20002144:
.debug loc 144 0 9;
add_wrap 0, 21, 0, 9;
___dot_L20002146:
.debug loc 125 1563 52;
is_diff_greater_than 21, 9, 0, 10;
___dot_L2000214a:
.debug loc 125 0 52;
mload 2, 44, 1, 32;
mload 2, 40, 8, 32;
mload 2, 36, 9, 32;
mload 2, 32, 18, 32;
mload 2, 28, 19, 32;
mload 2, 24, 20, 32;
mload 2, 20, 21, 32;
mload 2, 16, 22, 32;
mload 2, 12, 23, 32;
.debug loc 96 1472 6;
add_wrap 2, 0, 48, 2;
jump_dyn 1, 32;
_ZN4core3fmt9Formatter9write_str17h775351d85ee60b01E:
_ZN57_$LT$core_dot__dot_fmt_dot__dot_Formatter$u20$as$u20$core_dot__dot_fmt_dot__dot_Write$GT$9write_str17h8f9105bda7f8a05aE:
.debug loc 96 1625 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
mload 10, 24, 13, 32;
mload 10, 20, 10, 32;
mload 13, 12, 15, 32;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 96 1626 9;
add_wrap 2, 0, 16, 2;
jump_dyn 15, 32;
_ZN4core5slice5index26slice_start_index_len_fail17hcc35fa938170d988E:
.debug loc 101 35 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
add_wrap 2, 0, 64, 8;
mstore 8, 0, 4294967240, 10;
mstore 8, 0, 4294967244, 11;
add_wrap 8, 0, 4294967240, 10;
.debug loc 101 43 5;
mstore 8, 0, 4294967272, 10;
load_label 10, _ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E;
mstore 8, 0, 4294967276, 10;
add_wrap 8, 0, 4294967244, 11;
mstore 8, 0, 4294967280, 11;
mstore 8, 0, 4294967284, 10;
.debug loc 96 350 9;
set_reg 10, 536882200;
mstore 8, 0, 4294967248, 10;
add_wrap 0, 0, 2, 10;
mstore 8, 0, 4294967252, 10;
mstore 8, 0, 4294967264, 0;
add_wrap 8, 0, 4294967272, 11;
mstore 8, 0, 4294967256, 11;
mstore 8, 0, 4294967260, 10;
.debug loc 101 43 5;
add_wrap 8, 0, 4294967248, 10;
add_wrap 0, 12, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core5slice5index24slice_end_index_len_fail17hfe2a101d40d96304E:
.debug loc 101 56 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
add_wrap 2, 0, 64, 8;
mstore 8, 0, 4294967240, 10;
mstore 8, 0, 4294967244, 11;
add_wrap 8, 0, 4294967240, 10;
.debug loc 101 64 5;
mstore 8, 0, 4294967272, 10;
load_label 10, _ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E;
mstore 8, 0, 4294967276, 10;
add_wrap 8, 0, 4294967244, 11;
mstore 8, 0, 4294967280, 11;
mstore 8, 0, 4294967284, 10;
.debug loc 96 350 9;
set_reg 10, 536882216;
mstore 8, 0, 4294967248, 10;
add_wrap 0, 0, 2, 10;
mstore 8, 0, 4294967252, 10;
mstore 8, 0, 4294967264, 0;
add_wrap 8, 0, 4294967272, 11;
mstore 8, 0, 4294967256, 11;
mstore 8, 0, 4294967260, 10;
.debug loc 101 64 5;
add_wrap 8, 0, 4294967248, 10;
add_wrap 0, 12, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core5slice5index22slice_index_order_fail17hd3cc9b16bc1a4131E:
.debug loc 101 77 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
add_wrap 2, 0, 64, 8;
mstore 8, 0, 4294967240, 10;
mstore 8, 0, 4294967244, 11;
add_wrap 8, 0, 4294967240, 10;
.debug loc 101 85 5;
mstore 8, 0, 4294967272, 10;
load_label 10, _ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E;
mstore 8, 0, 4294967276, 10;
add_wrap 8, 0, 4294967244, 11;
mstore 8, 0, 4294967280, 11;
mstore 8, 0, 4294967284, 10;
.debug loc 96 350 9;
set_reg 10, 536882268;
mstore 8, 0, 4294967248, 10;
add_wrap 0, 0, 2, 10;
mstore 8, 0, 4294967252, 10;
mstore 8, 0, 4294967264, 0;
add_wrap 8, 0, 4294967272, 11;
mstore 8, 0, 4294967256, 11;
mstore 8, 0, 4294967260, 10;
.debug loc 101 85 5;
add_wrap 8, 0, 4294967248, 10;
add_wrap 0, 12, 0, 11;
jump _ZN4core9panicking9panic_fmt17h24451800c87c1c7eE, 1;
_ZN4core3str5count14do_count_chars17he8abb95ab04ae460E:
.debug loc 188 39 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
add_wrap 0, 10, 0, 12;
add_wrap 10, 0, 3, 10;
and 10, 0, 4294967292, 10;
.debug loc 161 1979 27;
sub_wrap_with_offset 10, 12, 0, 15;
.debug loc 107 3851 12;
branch_if_diff_greater_than 15, 11, 0, ___dot_L200022c6;
.debug loc 107 1968 74;
sub_wrap_with_offset 11, 15, 0, 13;
.debug loc 107 3803 22;
shr 13, 0, 2, 17;
.debug loc 188 68 17;
branch_if_diff_equal 17, 0, 0, ___dot_L200022c6;
.debug loc 188 0 17;
add_wrap 15, 12, 0, 15;
and 13, 0, 3, 11;
.debug loc 103 25 86;
branch_if_diff_nonzero 10, 12, ___dot_L200022e8;
.debug loc 103 0 86;
add_wrap 0, 0, 0, 10;
.debug loc 103 25 86;
jump ___dot_L200022fe, 32;
___dot_L200022c6:
.debug loc 103 0 86;
add_wrap 0, 0, 0, 10;
.debug loc 103 25 86;
branch_if_diff_equal 11, 0, 0, ___dot_L200022e0;
.debug loc 103 237 24;
add_wrap 11, 12, 0, 11;
___dot_L200022cc:
.debug loc 103 232 27;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 13;
.debug loc 189 24 5;
to_signed 13, 32;
is_diff_greater_than 0, 32, -(-64), 13;
xor 13, 0, 1, 13;
.debug loc 103 237 24;
add_wrap 12, 0, 1, 12;
.debug loc 190 53 28;
add_wrap 10, 13, 0, 10;
.debug loc 103 237 24;
branch_if_diff_nonzero 12, 11, ___dot_L200022cc;
___dot_L200022e0:
.debug loc 103 0 24;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 188 108 2;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
___dot_L200022e8:
.debug loc 188 0 2;
add_wrap 0, 0, 0, 10;
___dot_L200022ea:
.debug loc 103 232 27;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 14;
.debug loc 189 24 5;
to_signed 14, 32;
is_diff_greater_than 0, 32, -(-64), 14;
xor 14, 0, 1, 14;
.debug loc 103 237 24;
add_wrap 12, 0, 1, 12;
.debug loc 190 53 28;
add_wrap 10, 14, 0, 10;
.debug loc 103 237 24;
branch_if_diff_nonzero 12, 15, ___dot_L200022ea;
___dot_L200022fe:
.debug loc 103 0 24;
add_wrap 0, 0, 0, 14;
.debug loc 103 25 86;
branch_if_diff_equal 11, 0, 0, ___dot_L2000231c;
.debug loc 103 0 86;
and 13, 0, 4294967292, 12;
add_wrap 12, 15, 0, 12;
___dot_L20002308:
.debug loc 103 232 27;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
sign_extend_byte 32, 13;
.debug loc 189 24 5;
to_signed 13, 32;
is_diff_greater_than 0, 32, -(-64), 13;
xor 13, 0, 1, 13;
.debug loc 190 53 28;
add_wrap 14, 13, 0, 14;
.debug loc 103 237 24;
add_wrap 11, 0, 4294967295, 11;
add_wrap 12, 0, 1, 12;
branch_if_diff_nonzero 11, 0, ___dot_L20002308;
___dot_L2000231c:
.debug loc 103 0 24;
set_reg 11, 16842752;
add_wrap 11, 0, 257, 30;
set_reg 11, 16711680;
add_wrap 11, 0, 255, 5;
.debug loc 188 72 21;
add_wrap 10, 14, 0, 10;
add_wrap 0, 0, 4, 16;
jump ___dot_L20002356, 32;
___dot_L20002332:
.debug loc 188 0 0;
add_wrap 7, 17, 0, 15;
sub_wrap_with_offset 28, 6, 0, 17;
and 6, 0, 3, 11;
.debug loc 188 127 27;
and 14, 5, 0, 12;
.debug loc 188 127 52;
shr 14, 0, 8, 14;
.debug loc 188 127 51;
and 14, 5, 0, 13;
.debug loc 188 127 27;
add_wrap 12, 13, 0, 12;
.debug loc 108 1913 13;
wrap16 12, 65536, 13;
add_wrap 12, 13, 0, 12;
.debug loc 188 128 5;
shr 12, 0, 16, 12;
.debug loc 188 91 9;
add_wrap 10, 12, 0, 10;
branch_if_diff_nonzero 11, 0, ___dot_L200023d0;
___dot_L20002356:
.debug loc 188 0 9;
branch_if_diff_equal 17, 0, 0, ___dot_L200022e0;
add_wrap 0, 17, 0, 28;
add_wrap 0, 15, 0, 7;
add_wrap 0, 0, 192, 11;
add_wrap 0, 17, 0, 6;
branch_if_diff_greater_than 11, 17, 0, ___dot_L2000236c;
add_wrap 0, 0, 192, 6;
___dot_L2000236c:
.debug loc 163 903 18;
wrap16 6, 4, 17;
add_wrap 0, 0, 0, 14;
branch_if_diff_greater_than 16, 28, 0, ___dot_L20002332;
.debug loc 163 0 18;
and 17, 0, 1008, 11;
add_wrap 7, 11, 0, 29;
add_wrap 0, 7, 0, 15;
___dot_L20002380:
.debug loc 188 82 18;
mload 15, 0, 13, 32;
.debug loc 188 117 7;
xor 13, 0, 4294967295, 11;
.debug loc 188 117 6;
shr 11, 0, 7, 11;
.debug loc 188 117 18;
shr 13, 0, 6, 13;
.debug loc 188 82 18;
mload 15, 4, 12, 32;
.debug loc 188 117 5;
or 11, 13, 0, 11;
and 11, 30, 0, 11;
.debug loc 188 85 17;
add_wrap 11, 14, 0, 11;
.debug loc 188 117 7;
xor 12, 0, 4294967295, 13;
.debug loc 188 117 6;
shr 13, 0, 7, 13;
.debug loc 188 82 18;
mload 15, 8, 14, 32;
.debug loc 188 117 18;
shr 12, 0, 6, 12;
.debug loc 188 117 5;
or 12, 13, 0, 12;
and 12, 30, 0, 12;
.debug loc 188 117 7;
xor 14, 0, 4294967295, 13;
.debug loc 188 117 6;
shr 13, 0, 7, 13;
.debug loc 188 117 18;
shr 14, 0, 6, 14;
.debug loc 188 117 5;
or 13, 14, 0, 13;
.debug loc 188 82 18;
mload 15, 12, 14, 32;
.debug loc 188 117 5;
and 13, 30, 0, 13;
.debug loc 188 85 17;
add_wrap 12, 13, 0, 12;
add_wrap 11, 12, 0, 11;
.debug loc 188 117 7;
xor 14, 0, 4294967295, 12;
.debug loc 188 117 6;
shr 12, 0, 7, 12;
.debug loc 188 117 18;
shr 14, 0, 6, 14;
.debug loc 188 117 5;
or 12, 14, 0, 12;
and 12, 30, 0, 14;
.debug loc 110 601 37;
add_wrap 15, 0, 16, 15;
.debug loc 188 85 17;
add_wrap 14, 11, 0, 14;
branch_if_diff_nonzero 15, 29, ___dot_L20002380;
jump ___dot_L20002332, 32;
___dot_L200023d0:
.debug loc 188 0 17;
add_wrap 0, 0, 0, 11;
and 6, 0, 252, 12;
wrap16 12, 4, 12;
add_wrap 7, 12, 0, 7;
.debug loc 103 25 86;
is_diff_greater_than 0, 28, -(192), 12;
sub_wrap_with_offset 0, 12, 0, 12;
and 28, 12, 0, 12;
and 12, 0, 3, 12;
wrap16 12, 4, 13;
___dot_L200023ec:
.debug loc 188 100 18;
mload 7, 0, 12, 32;
.debug loc 110 601 37;
add_wrap 7, 0, 4, 7;
.debug loc 188 117 7;
xor 12, 0, 4294967295, 14;
.debug loc 188 117 6;
shr 14, 0, 7, 14;
.debug loc 188 117 18;
shr 12, 0, 6, 12;
.debug loc 188 117 5;
or 12, 14, 0, 12;
and 12, 30, 0, 12;
.debug loc 110 1749 9;
add_wrap 13, 0, 4294967292, 13;
.debug loc 188 101 17;
add_wrap 11, 12, 0, 11;
branch_if_diff_nonzero 13, 0, ___dot_L200023ec;
.debug loc 188 127 27;
and 11, 5, 0, 12;
.debug loc 188 127 52;
shr 11, 0, 8, 11;
.debug loc 188 127 51;
and 11, 5, 0, 11;
.debug loc 188 127 27;
add_wrap 11, 12, 0, 11;
.debug loc 108 1913 13;
wrap16 11, 65536, 12;
add_wrap 11, 12, 0, 11;
.debug loc 188 128 5;
shr 11, 0, 16, 11;
.debug loc 188 103 13;
add_wrap 10, 11, 0, 10;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 188 108 2;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
_ZN4core3fmt3num3imp7fmt_u3217h08136a15b15ceb9eE:
.debug loc 187 213 0;
add_wrap 2, 0, 4294967232, 2;
mstore 2, 0, 60, 1;
mstore 2, 0, 56, 8;
mstore 2, 0, 52, 9;
mstore 2, 0, 48, 18;
add_wrap 2, 0, 64, 8;
add_wrap 0, 12, 0, 16;
shr 10, 0, 4, 12;
add_wrap 0, 0, 39, 14;
add_wrap 0, 0, 625, 13;
set_reg 6, 536881948;
branch_if_diff_greater_than 12, 13, -1, ___dot_L2000246c;
.debug loc 187 0 23;
add_wrap 0, 0, 99, 12;
.debug loc 187 251 20;
branch_if_diff_greater_than 10, 12, 0, ___dot_L20002502;
___dot_L20002452:
.debug loc 187 0 20;
add_wrap 0, 0, 10, 12;
.debug loc 187 259 20;
branch_if_diff_greater_than 10, 12, -1, ___dot_L20002544;
___dot_L20002458:
.debug loc 187 260 21;
add_wrap 14, 0, 4294967295, 12;
add_wrap 8, 0, 4294967241, 13;
.debug loc 123 1044 18;
add_wrap 13, 12, 0, 13;
.debug loc 187 261 21;
or 10, 0, 48, 10;
mload 13, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 13, 33, 0, 32;
jump ___dot_L20002562, 32;
___dot_L2000246c:
.debug loc 187 0 21;
add_wrap 0, 0, 0, 14;
.debug loc 187 232 23;
add_wrap 8, 0, 4294967276, 17;
add_wrap 8, 0, 4294967278, 5;
set_reg 12, 3518435328;
add_wrap 12, 0, 1881, 28;
set_reg 12, 8192;
add_wrap 12, 0, 1808, 29;
set_reg 12, 4096;
add_wrap 12, 0, 1147, 30;
add_wrap 0, 0, 100, 7;
set_reg 15, 99999744;
add_wrap 15, 0, 255, 31;
___dot_L20002496:
.debug loc 187 0 23;
add_wrap 0, 10, 0, 18;
.debug loc 187 234 21;
mul 10, 28, 32, 10;
shr 10, 0, 13, 10;
.debug loc 187 233 31;
mul 10, 29, 12, 32;
sub_wrap_with_offset 18, 12, 0, 13;
.debug loc 187 236 30;
wrap16 13, 65536, 12;
shr 12, 0, 18, 12;
mul 12, 30, 12, 32;
shr 12, 0, 17, 9;
shr 12, 0, 16, 12;
and 12, 0, 2046, 12;
.debug loc 187 237 30;
mul 9, 7, 9, 32;
sub_wrap_with_offset 13, 9, 0, 13;
wrap16 13, 65536, 32;
wrap16 32, 2, 13;
.debug loc 163 903 18;
add_wrap 12, 6, 0, 12;
.debug loc 109 3034 14;
mload 12, 1, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 9;
.debug loc 187 237 30;
shr 13, 0, 16, 13;
.debug loc 109 3034 14;
add_wrap 17, 14, 0, 15;
mload 12, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 12;
mload 15, 1, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 9, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 1, 32;
.debug loc 163 903 18;
add_wrap 13, 6, 0, 13;
.debug loc 109 3034 14;
mload 13, 1, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 9;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
.debug loc 109 3034 14;
mload 15, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 12, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 0, 32;
.debug loc 109 3034 14;
add_wrap 5, 14, 0, 12;
mload 12, 1, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 9, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 12, 33, 1, 32;
mload 12, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 12, 33, 0, 32;
.debug loc 187 232 23;
add_wrap 14, 0, 4294967292, 14;
branch_if_diff_greater_than 18, 31, 0, ___dot_L20002496;
.debug loc 187 251 20;
add_wrap 14, 0, 39, 14;
add_wrap 0, 0, 99, 12;
branch_if_diff_greater_than 12, 10, -1, ___dot_L20002452;
___dot_L20002502:
.debug loc 187 253 21;
wrap16 10, 65536, 12;
shr 12, 0, 18, 12;
set_reg 13, 5243;
mul 12, 13, 12, 32;
shr 12, 0, 17, 12;
add_wrap 0, 0, 100, 13;
.debug loc 187 252 30;
mul 12, 13, 13, 32;
sub_wrap_with_offset 10, 13, 0, 10;
wrap16 10, 65536, 32;
wrap16 32, 2, 10;
shr 10, 0, 16, 10;
.debug loc 187 254 21;
add_wrap 14, 0, 4294967294, 14;
.debug loc 163 903 18;
add_wrap 10, 6, 0, 10;
.debug loc 109 3034 14;
mload 10, 1, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
mload 10, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 10;
add_wrap 8, 0, 4294967241, 15;
.debug loc 123 1044 18;
add_wrap 15, 14, 0, 15;
.debug loc 109 3034 14;
mload 15, 1, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 1, 32;
mload 15, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 0, 32;
add_wrap 0, 12, 0, 10;
add_wrap 0, 0, 10, 12;
.debug loc 187 259 20;
branch_if_diff_greater_than 12, 10, 0, ___dot_L20002458;
___dot_L20002544:
.debug loc 187 263 30;
wrap16 10, 2, 10;
.debug loc 187 264 21;
add_wrap 14, 0, 4294967294, 12;
.debug loc 163 903 18;
add_wrap 10, 6, 0, 10;
.debug loc 109 3034 14;
mload 10, 1, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 13;
mload 10, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 10;
add_wrap 8, 0, 4294967241, 14;
.debug loc 123 1044 18;
add_wrap 14, 12, 0, 14;
.debug loc 109 3034 14;
mload 14, 1, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 13, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 14, 33, 1, 32;
mload 14, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 10, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 14, 33, 0, 32;
___dot_L20002562:
.debug loc 109 0 14;
add_wrap 8, 0, 4294967241, 14;
.debug loc 123 1044 18;
add_wrap 14, 12, 0, 14;
add_wrap 0, 0, 39, 15;
.debug loc 187 273 62;
sub_wrap_with_offset 15, 12, 0, 15;
.debug loc 187 275 13;
add_wrap 0, 0, 1, 12;
add_wrap 0, 16, 0, 10;
add_wrap 0, 0, 0, 13;
jump _ZN4core3fmt9Formatter12pad_integral17had4dfa66510dbedeE, 1;
mload 2, 60, 1, 32;
mload 2, 56, 8, 32;
mload 2, 52, 9, 32;
mload 2, 48, 18, 32;
.debug loc 187 276 10;
add_wrap 2, 0, 64, 2;
jump_dyn 1, 32;
_ZN4core3fmt3num3imp52_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$u32$GT$3fmt17he456442f35260ed7E:
_ZN4core3fmt3num3imp54_$LT$impl$u20$core_dot__dot_fmt_dot__dot_Display$u20$for$u20$usize$GT$3fmt17h7b361369e811d5e5E:
.debug loc 187 313 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
mload 10, 0, 10, 32;
add_wrap 0, 11, 0, 12;
.debug loc 187 321 17;
add_wrap 0, 0, 1, 11;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 187 321 17;
add_wrap 2, 0, 16, 2;
jump _ZN4core3fmt3num3imp7fmt_u3217h08136a15b15ceb9eE, 32;
_ZN42_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Debug$GT$3fmt17hd338eab38a7adb87E:
.debug loc 96 2377 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
mload 10, 4, 12, 32;
mload 10, 0, 10, 32;
.debug loc 96 2377 62;
mload 12, 12, 15, 32;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 96 2377 62;
add_wrap 2, 0, 16, 2;
jump_dyn 15, 32;
_ZN44_$LT$$RF$T$u20$as$u20$core_dot__dot_fmt_dot__dot_Display$GT$3fmt17h306e340642ffe7b0E:
.debug loc 96 2377 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
mload 10, 0, 13, 32;
mload 10, 4, 12, 32;
add_wrap 0, 11, 0, 10;
.debug loc 96 2472 9;
add_wrap 0, 13, 0, 11;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 96 2472 9;
add_wrap 2, 0, 16, 2;
jump _ZN4core3fmt9Formatter3pad17h574160d80a598710E, 32;
memset:
.debug loc 326 376 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
add_wrap 0, 0, 16, 13;
branch_if_diff_greater_than 13, 12, 0, ___dot_L2000262a;
.debug loc 328 1890 13;
sub_wrap_with_offset 0, 10, 0, 13;
.debug loc 327 256 28;
and 13, 0, 3, 13;
.debug loc 329 1044 18;
add_wrap 10, 13, 0, 14;
.debug loc 327 229 15;
branch_if_diff_equal 13, 0, 0, ___dot_L200025fe;
.debug loc 327 0 15;
add_wrap 0, 10, 0, 15;
___dot_L200025f4:
.debug loc 327 230 13;
mload 15, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 0, 32;
.debug loc 329 1044 18;
add_wrap 15, 0, 1, 15;
.debug loc 327 229 15;
branch_if_diff_greater_than 14, 15, 0, ___dot_L200025f4;
___dot_L200025fe:
.debug loc 327 259 9;
sub_wrap_with_offset 12, 13, 0, 12;
.debug loc 327 261 23;
and 12, 0, 4294967292, 15;
.debug loc 329 1044 18;
add_wrap 14, 15, 0, 13;
.debug loc 327 247 15;
to_signed 0, 32;
to_signed 15, 33;
branch_if_diff_greater_than 32, 33, -1, ___dot_L20002624;
.debug loc 327 0 15;
and 11, 0, 255, 16;
set_reg 15, 16843009;
mul 16, 15, 15, 32;
___dot_L2000261c:
.debug loc 327 248 13;
mstore 14, 0, 0, 15;
.debug loc 329 1044 18;
add_wrap 14, 0, 4, 14;
.debug loc 327 247 15;
branch_if_diff_greater_than 13, 14, 0, ___dot_L2000261c;
___dot_L20002624:
.debug loc 327 264 9;
and 12, 0, 3, 12;
branch_if_diff_nonzero 12, 0, ___dot_L2000262e;
jump ___dot_L2000263a, 32;
___dot_L2000262a:
.debug loc 327 0 9;
add_wrap 0, 10, 0, 13;
branch_if_diff_equal 12, 0, 0, ___dot_L2000263a;
___dot_L2000262e:
add_wrap 12, 13, 0, 12;
___dot_L20002630:
.debug loc 327 230 13;
mload 13, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 11, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 13, 33, 0, 32;
.debug loc 329 1044 18;
add_wrap 13, 0, 1, 13;
branch_if_diff_greater_than 12, 13, 0, ___dot_L20002630;
___dot_L2000263a:
.debug loc 329 0 18;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 326 378 14;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
memcpy:
.debug loc 362 376 0;
add_wrap 2, 0, 4294967280, 2;
mstore 2, 0, 12, 1;
mstore 2, 0, 8, 8;
add_wrap 2, 0, 16, 8;
add_wrap 0, 0, 16, 13;
branch_if_diff_greater_than 13, 12, 0, ___dot_L200026c2;
.debug loc 364 1890 13;
sub_wrap_with_offset 0, 10, 0, 13;
.debug loc 363 103 33;
and 13, 0, 3, 16;
.debug loc 365 1044 18;
add_wrap 10, 16, 0, 7;
.debug loc 363 32 15;
branch_if_diff_equal 16, 0, 0, ___dot_L20002674;
.debug loc 363 0 15;
add_wrap 0, 10, 0, 15;
add_wrap 0, 11, 0, 13;
___dot_L20002664:
.debug loc 363 33 21;
mload 13, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 14;
.debug loc 363 33 13;
mload 15, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 14, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 15, 33, 0, 32;
.debug loc 365 1044 18;
add_wrap 15, 0, 1, 15;
.debug loc 366 903 18;
add_wrap 13, 0, 1, 13;
.debug loc 363 32 15;
branch_if_diff_greater_than 7, 15, 0, ___dot_L20002664;
___dot_L20002674:
.debug loc 366 903 18;
add_wrap 11, 16, 0, 17;
.debug loc 363 107 9;
sub_wrap_with_offset 12, 16, 0, 16;
.debug loc 363 109 23;
and 16, 0, 4294967292, 5;
.debug loc 363 110 32;
and 17, 0, 3, 11;
.debug loc 363 0 0;
add_wrap 7, 5, 0, 13;
.debug loc 363 111 12;
branch_if_diff_equal 11, 0, 0, ___dot_L200026c8;
.debug loc 363 72 15;
to_signed 0, 32;
to_signed 5, 33;
branch_if_diff_greater_than 32, 33, -1, ___dot_L200026dc;
.debug loc 363 0 0;
wrap16 17, 8, 11;
and 11, 0, 24, 6;
.debug loc 363 63 31;
and 17, 0, 4294967292, 15;
.debug loc 363 68 29;
mload 15, 0, 12, 32;
sub_wrap_with_offset 0, 11, 0, 11;
and 11, 0, 24, 28;
.debug loc 363 72 15;
add_wrap 15, 0, 4, 15;
___dot_L200026a6:
.debug loc 363 74 28;
mload 15, 0, 14, 32;
.debug loc 363 76 29;
and 6, 0, 0x1f, 32;
shr 12, 32, 0, 12;
.debug loc 363 76 50;
and 28, 0, 0x1f, 32;
shl 14, 32, 0, 11;
.debug loc 363 76 29;
or 11, 12, 0, 11;
.debug loc 363 81 13;
mstore 7, 0, 0, 11;
.debug loc 365 1044 18;
add_wrap 7, 0, 4, 7;
.debug loc 363 72 15;
add_wrap 15, 0, 4, 15;
add_wrap 0, 14, 0, 12;
branch_if_diff_greater_than 13, 7, 0, ___dot_L200026a6;
jump ___dot_L200026dc, 32;
___dot_L200026c2:
.debug loc 363 0 15;
add_wrap 0, 10, 0, 13;
branch_if_diff_nonzero 12, 0, ___dot_L200026e6;
jump ___dot_L200026f8, 32;
___dot_L200026c8:
.debug loc 363 45 15;
to_signed 0, 32;
to_signed 5, 33;
branch_if_diff_greater_than 32, 33, -1, ___dot_L200026dc;
.debug loc 363 0 15;
add_wrap 0, 17, 0, 11;
___dot_L200026ce:
.debug loc 363 46 27;
mload 11, 0, 12, 32;
.debug loc 363 46 13;
mstore 7, 0, 0, 12;
.debug loc 365 1044 18;
add_wrap 7, 0, 4, 7;
.debug loc 365 1044 18;
add_wrap 11, 0, 4, 11;
.debug loc 363 45 15;
branch_if_diff_greater_than 13, 7, 0, ___dot_L200026ce;
___dot_L200026dc:
.debug loc 366 903 18;
add_wrap 17, 5, 0, 11;
.debug loc 363 118 9;
and 16, 0, 3, 12;
branch_if_diff_equal 12, 0, 0, ___dot_L200026f8;
___dot_L200026e6:
.debug loc 363 0 0;
add_wrap 12, 13, 0, 12;
___dot_L200026e8:
.debug loc 363 33 21;
mload 11, 0, 32, 33;
affine 33, 33, 8, 0;
shr 32, 33, 0, 32;
and 32, 0, 0xff, 14;
.debug loc 363 33 13;
mload 13, 0, 32, 33;
set_reg 34, 0xff;
affine 33, 35, 8, 0;
shl 34, 35, 0, 34;
xor 34, 0, 0xffffffff, 34;
and 32, 34, 0, 32;
and 14, 0, 0xff, 34;
shl 34, 35, 0, 34;
or 32, 34, 0, 32;
mstore 13, 33, 0, 32;
.debug loc 365 1044 18;
add_wrap 13, 0, 1, 13;
.debug loc 366 903 18;
add_wrap 11, 0, 1, 11;
branch_if_diff_greater_than 12, 13, 0, ___dot_L200026e8;
___dot_L200026f8:
.debug loc 366 0 18;
mload 2, 12, 1, 32;
mload 2, 8, 8, 32;
.debug loc 362 378 14;
add_wrap 2, 0, 16, 2;
jump_dyn 1, 32;
// This is the data initialization routine.
__data_init:
// data .Lanon.fad58de7366495db4650cfefac2fcd61.0
set_reg 33, 0x696c6f53;
set_reg 32, 0x20002770;
mstore 32, 0, 0, 33;
set_reg 33, 0x79746964;
set_reg 32, 0x20002774;
mstore 32, 0, 0, 33;
// data .Lanon.fad58de7366495db4650cfefac2fcd61.1
set_reg 33, 0x64776f50;
set_reg 32, 0x20002778;
mstore 32, 0, 0, 33;
set_reg 33, 0x72727272;
set_reg 32, 0x2000277c;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.0
set_reg 33, 0x6d6f682f;
set_reg 32, 0x20002780;
mstore 32, 0, 0, 33;
set_reg 33, 0x656c2f65;
set_reg 32, 0x20002784;
mstore 32, 0, 0, 33;
set_reg 33, 0x632e2f6f;
set_reg 32, 0x20002788;
mstore 32, 0, 0, 33;
set_reg 33, 0x6f677261;
set_reg 32, 0x2000278c;
mstore 32, 0, 0, 33;
set_reg 33, 0x6765722f;
set_reg 32, 0x20002790;
mstore 32, 0, 0, 33;
set_reg 33, 0x72747369;
set_reg 32, 0x20002794;
mstore 32, 0, 0, 33;
set_reg 33, 0x72732f79;
set_reg 32, 0x20002798;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e692f63;
set_reg 32, 0x2000279c;
mstore 32, 0, 0, 33;
set_reg 33, 0x2e786564;
set_reg 32, 0x200027a0;
mstore 32, 0, 0, 33;
set_reg 33, 0x74617263;
set_reg 32, 0x200027a4;
mstore 32, 0, 0, 33;
set_reg 33, 0x692e7365;
set_reg 32, 0x200027a8;
mstore 32, 0, 0, 33;
set_reg 33, 0x66362d6f;
set_reg 32, 0x200027ac;
mstore 32, 0, 0, 33;
set_reg 33, 0x32643731;
set_reg 32, 0x200027b0;
mstore 32, 0, 0, 33;
set_reg 33, 0x61626232;
set_reg 32, 0x200027b4;
mstore 32, 0, 0, 33;
set_reg 33, 0x30303531;
set_reg 32, 0x200027b8;
mstore 32, 0, 0, 33;
set_reg 33, 0x742f6631;
set_reg 32, 0x200027bc;
mstore 32, 0, 0, 33;
set_reg 33, 0x2d796e69;
set_reg 32, 0x200027c0;
mstore 32, 0, 0, 33;
set_reg 33, 0x6363656b;
set_reg 32, 0x200027c4;
mstore 32, 0, 0, 33;
set_reg 33, 0x322d6b61;
set_reg 32, 0x200027c8;
mstore 32, 0, 0, 33;
set_reg 33, 0x322e302e;
set_reg 32, 0x200027cc;
mstore 32, 0, 0, 33;
set_reg 33, 0x6372732f;
set_reg 32, 0x200027d0;
mstore 32, 0, 0, 33;
set_reg 33, 0x62696c2f;
set_reg 32, 0x200027d4;
mstore 32, 0, 0, 33;
set_reg 33, 0x73722e;
set_reg 32, 0x200027d8;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.1
set_reg 33, 0x20002780;
set_reg 32, 0x200027dc;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x200027e0;
mstore 32, 0, 0, 33;
set_reg 33, 0x138;
set_reg 32, 0x200027e4;
mstore 32, 0, 0, 33;
set_reg 33, 0x20;
set_reg 32, 0x200027e8;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.2
set_reg 33, 0x20002780;
set_reg 32, 0x200027ec;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x200027f0;
mstore 32, 0, 0, 33;
set_reg 33, 0x138;
set_reg 32, 0x200027f4;
mstore 32, 0, 0, 33;
set_reg 33, 0x16;
set_reg 32, 0x200027f8;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.3
set_reg 33, 0x20002780;
set_reg 32, 0x200027fc;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002800;
mstore 32, 0, 0, 33;
set_reg 33, 0x14d;
set_reg 32, 0x20002804;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f;
set_reg 32, 0x20002808;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.4
set_reg 33, 0x65737361;
set_reg 32, 0x2000280c;
mstore 32, 0, 0, 33;
set_reg 33, 0x6f697472;
set_reg 32, 0x20002810;
mstore 32, 0, 0, 33;
set_reg 33, 0x6166206e;
set_reg 32, 0x20002814;
mstore 32, 0, 0, 33;
set_reg 33, 0x64656c69;
set_reg 32, 0x20002818;
mstore 32, 0, 0, 33;
set_reg 33, 0x7364203a;
set_reg 32, 0x2000281c;
mstore 32, 0, 0, 33;
set_reg 33, 0x656c2e74;
set_reg 32, 0x20002820;
mstore 32, 0, 0, 33;
set_reg 33, 0x2029286e;
set_reg 32, 0x20002824;
mstore 32, 0, 0, 33;
set_reg 33, 0x73203d3c;
set_reg 32, 0x20002828;
mstore 32, 0, 0, 33;
set_reg 33, 0x6c2e6372;
set_reg 32, 0x2000282c;
mstore 32, 0, 0, 33;
set_reg 33, 0x29286e65;
set_reg 32, 0x20002830;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.5
set_reg 33, 0x20002780;
set_reg 32, 0x20002834;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002838;
mstore 32, 0, 0, 33;
set_reg 33, 0x152;
set_reg 32, 0x2000283c;
mstore 32, 0, 0, 33;
set_reg 33, 0xd;
set_reg 32, 0x20002840;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.6
set_reg 33, 0x20002780;
set_reg 32, 0x20002844;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002848;
mstore 32, 0, 0, 33;
set_reg 33, 0x1ab;
set_reg 32, 0x2000284c;
mstore 32, 0, 0, 33;
set_reg 33, 0x21;
set_reg 32, 0x20002850;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.7
set_reg 33, 0x20002780;
set_reg 32, 0x20002854;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002858;
mstore 32, 0, 0, 33;
set_reg 33, 0x1a3;
set_reg 32, 0x2000285c;
mstore 32, 0, 0, 33;
set_reg 33, 0x25;
set_reg 32, 0x20002860;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.8
set_reg 33, 0x20002780;
set_reg 32, 0x20002864;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002868;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c8;
set_reg 32, 0x2000286c;
mstore 32, 0, 0, 33;
set_reg 33, 0x27;
set_reg 32, 0x20002870;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.9
set_reg 33, 0x20002780;
set_reg 32, 0x20002874;
mstore 32, 0, 0, 33;
set_reg 33, 0x5b;
set_reg 32, 0x20002878;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c0;
set_reg 32, 0x2000287c;
mstore 32, 0, 0, 33;
set_reg 33, 0x2b;
set_reg 32, 0x20002880;
mstore 32, 0, 0, 33;
// data .Lanon.5c5e2096af39c0c281f333643916de09.10
set_reg 33, 0x1;
set_reg 32, 0x20002888;
mstore 32, 0, 0, 33;
set_reg 33, 0x8082;
set_reg 32, 0x20002890;
mstore 32, 0, 0, 33;
set_reg 33, 0x808a;
set_reg 32, 0x20002898;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x2000289c;
mstore 32, 0, 0, 33;
set_reg 33, 0x80008000;
set_reg 32, 0x200028a0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x200028a4;
mstore 32, 0, 0, 33;
set_reg 33, 0x808b;
set_reg 32, 0x200028a8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000001;
set_reg 32, 0x200028b0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80008081;
set_reg 32, 0x200028b8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x200028bc;
mstore 32, 0, 0, 33;
set_reg 33, 0x8009;
set_reg 32, 0x200028c0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x200028c4;
mstore 32, 0, 0, 33;
set_reg 33, 0x8a;
set_reg 32, 0x200028c8;
mstore 32, 0, 0, 33;
set_reg 33, 0x88;
set_reg 32, 0x200028d0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80008009;
set_reg 32, 0x200028d8;
mstore 32, 0, 0, 33;
set_reg 33, 0x8000000a;
set_reg 32, 0x200028e0;
mstore 32, 0, 0, 33;
set_reg 33, 0x8000808b;
set_reg 32, 0x200028e8;
mstore 32, 0, 0, 33;
set_reg 33, 0x8b;
set_reg 32, 0x200028f0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x200028f4;
mstore 32, 0, 0, 33;
set_reg 33, 0x8089;
set_reg 32, 0x200028f8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x200028fc;
mstore 32, 0, 0, 33;
set_reg 33, 0x8003;
set_reg 32, 0x20002900;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x20002904;
mstore 32, 0, 0, 33;
set_reg 33, 0x8002;
set_reg 32, 0x20002908;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x2000290c;
mstore 32, 0, 0, 33;
set_reg 33, 0x80;
set_reg 32, 0x20002910;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x20002914;
mstore 32, 0, 0, 33;
set_reg 33, 0x800a;
set_reg 32, 0x20002918;
mstore 32, 0, 0, 33;
set_reg 33, 0x8000000a;
set_reg 32, 0x20002920;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x20002924;
mstore 32, 0, 0, 33;
set_reg 33, 0x80008081;
set_reg 32, 0x20002928;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x2000292c;
mstore 32, 0, 0, 33;
set_reg 33, 0x8080;
set_reg 32, 0x20002930;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x20002934;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000001;
set_reg 32, 0x20002938;
mstore 32, 0, 0, 33;
set_reg 33, 0x80008008;
set_reg 32, 0x20002940;
mstore 32, 0, 0, 33;
set_reg 33, 0x80000000;
set_reg 32, 0x20002944;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.1
set_reg 33, 0x6f727245;
set_reg 32, 0x20002948;
mstore 32, 0, 0, 33;
set_reg 33, 0x72;
set_reg 32, 0x2000294c;
mstore 32, 0, 0, 33;
set_reg 33, 0x1;
set_reg 32, 0x20002958;
mstore 32, 0, 0, 33;
load_label 33, _ZN75_$LT$powdr_riscv_runtime_dot__dot_fmt_dot__dot_ProverWriter$u20$as$u20$core_dot__dot_fmt_dot__dot_Write$GT$9write_str17h8b7371fb4fcceb69E;
set_reg 32, 0x2000295c;
mstore 32, 0, 0, 33;
load_label 33, _ZN4core3fmt5Write10write_char17h011162669ac84ddbE;
set_reg 32, 0x20002960;
mstore 32, 0, 0, 33;
load_label 33, _ZN4core3fmt5Write9write_fmt17hf6efca51361f006cE;
set_reg 32, 0x20002964;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.3
set_reg 33, 0x6d6f682f;
set_reg 32, 0x20002968;
mstore 32, 0, 0, 33;
set_reg 33, 0x656c2f65;
set_reg 32, 0x2000296c;
mstore 32, 0, 0, 33;
set_reg 33, 0x65642f6f;
set_reg 32, 0x20002970;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f6c6576;
set_reg 32, 0x20002974;
mstore 32, 0, 0, 33;
set_reg 33, 0x64776f70;
set_reg 32, 0x20002978;
mstore 32, 0, 0, 33;
set_reg 33, 0x69722f72;
set_reg 32, 0x2000297c;
mstore 32, 0, 0, 33;
set_reg 33, 0x2d766373;
set_reg 32, 0x20002980;
mstore 32, 0, 0, 33;
set_reg 33, 0x746e7572;
set_reg 32, 0x20002984;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f656d69;
set_reg 32, 0x20002988;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f637273;
set_reg 32, 0x2000298c;
mstore 32, 0, 0, 33;
set_reg 33, 0x6d6d6f63;
set_reg 32, 0x20002990;
mstore 32, 0, 0, 33;
set_reg 33, 0x722e7469;
set_reg 32, 0x20002994;
mstore 32, 0, 0, 33;
set_reg 33, 0x73;
set_reg 32, 0x20002998;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.4
set_reg 33, 0x20002968;
set_reg 32, 0x2000299c;
mstore 32, 0, 0, 33;
set_reg 33, 0x31;
set_reg 32, 0x200029a0;
mstore 32, 0, 0, 33;
set_reg 33, 0x19;
set_reg 32, 0x200029a4;
mstore 32, 0, 0, 33;
set_reg 33, 0x9;
set_reg 32, 0x200029a8;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.5
set_reg 33, 0x20002968;
set_reg 32, 0x200029ac;
mstore 32, 0, 0, 33;
set_reg 33, 0x31;
set_reg 32, 0x200029b0;
mstore 32, 0, 0, 33;
set_reg 33, 0x2c;
set_reg 32, 0x200029b4;
mstore 32, 0, 0, 33;
set_reg 33, 0x20;
set_reg 32, 0x200029b8;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.6
set_reg 33, 0x6c6c6163;
set_reg 32, 0x200029bc;
mstore 32, 0, 0, 33;
set_reg 33, 0x60206465;
set_reg 32, 0x200029c0;
mstore 32, 0, 0, 33;
set_reg 33, 0x75736552;
set_reg 32, 0x200029c4;
mstore 32, 0, 0, 33;
set_reg 33, 0x3a3a746c;
set_reg 32, 0x200029c8;
mstore 32, 0, 0, 33;
set_reg 33, 0x72776e75;
set_reg 32, 0x200029cc;
mstore 32, 0, 0, 33;
set_reg 33, 0x29287061;
set_reg 32, 0x200029d0;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e6f2060;
set_reg 32, 0x200029d4;
mstore 32, 0, 0, 33;
set_reg 33, 0x206e6120;
set_reg 32, 0x200029d8;
mstore 32, 0, 0, 33;
set_reg 33, 0x72724560;
set_reg 32, 0x200029dc;
mstore 32, 0, 0, 33;
set_reg 33, 0x61762060;
set_reg 32, 0x200029e0;
mstore 32, 0, 0, 33;
set_reg 33, 0x65756c;
set_reg 32, 0x200029e4;
mstore 32, 0, 0, 33;
set_reg 33, 0x1;
set_reg 32, 0x200029f0;
mstore 32, 0, 0, 33;
load_label 33, _ZN53_$LT$core_dot__dot_fmt_dot__dot_Error$u20$as$u20$core_dot__dot_fmt_dot__dot_Debug$GT$3fmt17h745edb6e5f428217E;
set_reg 32, 0x200029f4;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.8
set_reg 33, 0x6d6f682f;
set_reg 32, 0x200029f8;
mstore 32, 0, 0, 33;
set_reg 33, 0x656c2f65;
set_reg 32, 0x200029fc;
mstore 32, 0, 0, 33;
set_reg 33, 0x65642f6f;
set_reg 32, 0x20002a00;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f6c6576;
set_reg 32, 0x20002a04;
mstore 32, 0, 0, 33;
set_reg 33, 0x64776f70;
set_reg 32, 0x20002a08;
mstore 32, 0, 0, 33;
set_reg 33, 0x69722f72;
set_reg 32, 0x20002a0c;
mstore 32, 0, 0, 33;
set_reg 33, 0x2d766373;
set_reg 32, 0x20002a10;
mstore 32, 0, 0, 33;
set_reg 33, 0x746e7572;
set_reg 32, 0x20002a14;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f656d69;
set_reg 32, 0x20002a18;
mstore 32, 0, 0, 33;
set_reg 33, 0x2f637273;
set_reg 32, 0x20002a1c;
mstore 32, 0, 0, 33;
set_reg 33, 0x2e746d66;
set_reg 32, 0x20002a20;
mstore 32, 0, 0, 33;
set_reg 33, 0x7372;
set_reg 32, 0x20002a24;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.9
set_reg 33, 0x200029f8;
set_reg 32, 0x20002a28;
mstore 32, 0, 0, 33;
set_reg 33, 0x2e;
set_reg 32, 0x20002a2c;
mstore 32, 0, 0, 33;
set_reg 33, 0xe;
set_reg 32, 0x20002a30;
mstore 32, 0, 0, 33;
set_reg 33, 0x2c;
set_reg 32, 0x20002a34;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.16
set_reg 33, 0x696e6150;
set_reg 32, 0x20002a38;
mstore 32, 0, 0, 33;
set_reg 33, 0xa203a63;
set_reg 32, 0x20002a3c;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.18
set_reg 33, 0x20002a38;
set_reg 32, 0x20002a40;
mstore 32, 0, 0, 33;
set_reg 33, 0x7;
set_reg 32, 0x20002a44;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002a3f;
set_reg 32, 0x20002a48;
mstore 32, 0, 0, 33;
set_reg 33, 0x1;
set_reg 32, 0x20002a4c;
mstore 32, 0, 0, 33;
// data .Lanon.ed595c4158cd23b790492a004f00fba1.19
set_reg 33, 0x696e6150;
set_reg 32, 0x20002a50;
mstore 32, 0, 0, 33;
set_reg 33, 0x61682063;
set_reg 32, 0x20002a54;
mstore 32, 0, 0, 33;
set_reg 33, 0x656c646e;
set_reg 32, 0x20002a58;
mstore 32, 0, 0, 33;
set_reg 33, 0x61682072;
set_reg 32, 0x20002a5c;
mstore 32, 0, 0, 33;
set_reg 33, 0x61702073;
set_reg 32, 0x20002a60;
mstore 32, 0, 0, 33;
set_reg 33, 0x6b63696e;
set_reg 32, 0x20002a64;
mstore 32, 0, 0, 33;
set_reg 33, 0x20216465;
set_reg 32, 0x20002a68;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e696854;
set_reg 32, 0x20002a6c;
mstore 32, 0, 0, 33;
set_reg 33, 0x61207367;
set_reg 32, 0x20002a70;
mstore 32, 0, 0, 33;
set_reg 33, 0x76206572;
set_reg 32, 0x20002a74;
mstore 32, 0, 0, 33;
set_reg 33, 0x20797265;
set_reg 32, 0x20002a78;
mstore 32, 0, 0, 33;
set_reg 33, 0x65726964;
set_reg 32, 0x20002a7c;
mstore 32, 0, 0, 33;
set_reg 33, 0x646e6920;
set_reg 32, 0x20002a80;
mstore 32, 0, 0, 33;
set_reg 33, 0x2e646565;
set_reg 32, 0x20002a84;
mstore 32, 0, 0, 33;
set_reg 33, 0x690a2e2e;
set_reg 32, 0x20002a88;
mstore 32, 0, 0, 33;
set_reg 33, 0x7865646e;
set_reg 32, 0x20002a8c;
mstore 32, 0, 0, 33;
set_reg 33, 0x74756f20;
set_reg 32, 0x20002a90;
mstore 32, 0, 0, 33;
set_reg 33, 0x20666f20;
set_reg 32, 0x20002a94;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e756f62;
set_reg 32, 0x20002a98;
mstore 32, 0, 0, 33;
set_reg 33, 0x203a7364;
set_reg 32, 0x20002a9c;
mstore 32, 0, 0, 33;
set_reg 33, 0x20656874;
set_reg 32, 0x20002aa0;
mstore 32, 0, 0, 33;
set_reg 33, 0x206e656c;
set_reg 32, 0x20002aa4;
mstore 32, 0, 0, 33;
set_reg 33, 0x207369;
set_reg 32, 0x20002aa8;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.344
set_reg 33, 0x676e6172;
set_reg 32, 0x20002aac;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e652065;
set_reg 32, 0x20002ab0;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e692064;
set_reg 32, 0x20002ab4;
mstore 32, 0, 0, 33;
set_reg 33, 0x20786564;
set_reg 32, 0x20002ab8;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.242
set_reg 33, 0x3a;
set_reg 32, 0x20002abc;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.253
set_reg 33, 0x1;
set_reg 32, 0x20002ac0;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002abc;
set_reg 32, 0x20002ac8;
mstore 32, 0, 0, 33;
set_reg 33, 0x1;
set_reg 32, 0x20002acc;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002abc;
set_reg 32, 0x20002ad0;
mstore 32, 0, 0, 33;
set_reg 33, 0x1;
set_reg 32, 0x20002ad4;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.254
set_reg 33, 0x696e6170;
set_reg 32, 0x20002ad8;
mstore 32, 0, 0, 33;
set_reg 33, 0x64656b63;
set_reg 32, 0x20002adc;
mstore 32, 0, 0, 33;
set_reg 33, 0x20746120;
set_reg 32, 0x20002ae0;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.255
set_reg 33, 0x62200a3a;
set_reg 32, 0x20002ae4;
mstore 32, 0, 0, 33;
set_reg 33, 0x74207475;
set_reg 32, 0x20002ae8;
mstore 32, 0, 0, 33;
set_reg 33, 0x69206568;
set_reg 32, 0x20002aec;
mstore 32, 0, 0, 33;
set_reg 33, 0x7865646e;
set_reg 32, 0x20002af0;
mstore 32, 0, 0, 33;
set_reg 33, 0x20736920;
set_reg 32, 0x20002af4;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.263
set_reg 33, 0x20002a8b;
set_reg 32, 0x20002af8;
mstore 32, 0, 0, 33;
set_reg 33, 0x20;
set_reg 32, 0x20002afc;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002ae6;
set_reg 32, 0x20002b00;
mstore 32, 0, 0, 33;
set_reg 33, 0x12;
set_reg 32, 0x20002b04;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.282
set_reg 33, 0x203a;
set_reg 32, 0x20002b08;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.283
set_reg 33, 0x1;
set_reg 32, 0x20002b0c;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002b08;
set_reg 32, 0x20002b14;
mstore 32, 0, 0, 33;
set_reg 33, 0x2;
set_reg 32, 0x20002b18;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.317
set_reg 33, 0x31303030;
set_reg 32, 0x20002b1c;
mstore 32, 0, 0, 33;
set_reg 33, 0x33303230;
set_reg 32, 0x20002b20;
mstore 32, 0, 0, 33;
set_reg 33, 0x35303430;
set_reg 32, 0x20002b24;
mstore 32, 0, 0, 33;
set_reg 33, 0x37303630;
set_reg 32, 0x20002b28;
mstore 32, 0, 0, 33;
set_reg 33, 0x39303830;
set_reg 32, 0x20002b2c;
mstore 32, 0, 0, 33;
set_reg 33, 0x31313031;
set_reg 32, 0x20002b30;
mstore 32, 0, 0, 33;
set_reg 33, 0x33313231;
set_reg 32, 0x20002b34;
mstore 32, 0, 0, 33;
set_reg 33, 0x35313431;
set_reg 32, 0x20002b38;
mstore 32, 0, 0, 33;
set_reg 33, 0x37313631;
set_reg 32, 0x20002b3c;
mstore 32, 0, 0, 33;
set_reg 33, 0x39313831;
set_reg 32, 0x20002b40;
mstore 32, 0, 0, 33;
set_reg 33, 0x31323032;
set_reg 32, 0x20002b44;
mstore 32, 0, 0, 33;
set_reg 33, 0x33323232;
set_reg 32, 0x20002b48;
mstore 32, 0, 0, 33;
set_reg 33, 0x35323432;
set_reg 32, 0x20002b4c;
mstore 32, 0, 0, 33;
set_reg 33, 0x37323632;
set_reg 32, 0x20002b50;
mstore 32, 0, 0, 33;
set_reg 33, 0x39323832;
set_reg 32, 0x20002b54;
mstore 32, 0, 0, 33;
set_reg 33, 0x31333033;
set_reg 32, 0x20002b58;
mstore 32, 0, 0, 33;
set_reg 33, 0x33333233;
set_reg 32, 0x20002b5c;
mstore 32, 0, 0, 33;
set_reg 33, 0x35333433;
set_reg 32, 0x20002b60;
mstore 32, 0, 0, 33;
set_reg 33, 0x37333633;
set_reg 32, 0x20002b64;
mstore 32, 0, 0, 33;
set_reg 33, 0x39333833;
set_reg 32, 0x20002b68;
mstore 32, 0, 0, 33;
set_reg 33, 0x31343034;
set_reg 32, 0x20002b6c;
mstore 32, 0, 0, 33;
set_reg 33, 0x33343234;
set_reg 32, 0x20002b70;
mstore 32, 0, 0, 33;
set_reg 33, 0x35343434;
set_reg 32, 0x20002b74;
mstore 32, 0, 0, 33;
set_reg 33, 0x37343634;
set_reg 32, 0x20002b78;
mstore 32, 0, 0, 33;
set_reg 33, 0x39343834;
set_reg 32, 0x20002b7c;
mstore 32, 0, 0, 33;
set_reg 33, 0x31353035;
set_reg 32, 0x20002b80;
mstore 32, 0, 0, 33;
set_reg 33, 0x33353235;
set_reg 32, 0x20002b84;
mstore 32, 0, 0, 33;
set_reg 33, 0x35353435;
set_reg 32, 0x20002b88;
mstore 32, 0, 0, 33;
set_reg 33, 0x37353635;
set_reg 32, 0x20002b8c;
mstore 32, 0, 0, 33;
set_reg 33, 0x39353835;
set_reg 32, 0x20002b90;
mstore 32, 0, 0, 33;
set_reg 33, 0x31363036;
set_reg 32, 0x20002b94;
mstore 32, 0, 0, 33;
set_reg 33, 0x33363236;
set_reg 32, 0x20002b98;
mstore 32, 0, 0, 33;
set_reg 33, 0x35363436;
set_reg 32, 0x20002b9c;
mstore 32, 0, 0, 33;
set_reg 33, 0x37363636;
set_reg 32, 0x20002ba0;
mstore 32, 0, 0, 33;
set_reg 33, 0x39363836;
set_reg 32, 0x20002ba4;
mstore 32, 0, 0, 33;
set_reg 33, 0x31373037;
set_reg 32, 0x20002ba8;
mstore 32, 0, 0, 33;
set_reg 33, 0x33373237;
set_reg 32, 0x20002bac;
mstore 32, 0, 0, 33;
set_reg 33, 0x35373437;
set_reg 32, 0x20002bb0;
mstore 32, 0, 0, 33;
set_reg 33, 0x37373637;
set_reg 32, 0x20002bb4;
mstore 32, 0, 0, 33;
set_reg 33, 0x39373837;
set_reg 32, 0x20002bb8;
mstore 32, 0, 0, 33;
set_reg 33, 0x31383038;
set_reg 32, 0x20002bbc;
mstore 32, 0, 0, 33;
set_reg 33, 0x33383238;
set_reg 32, 0x20002bc0;
mstore 32, 0, 0, 33;
set_reg 33, 0x35383438;
set_reg 32, 0x20002bc4;
mstore 32, 0, 0, 33;
set_reg 33, 0x37383638;
set_reg 32, 0x20002bc8;
mstore 32, 0, 0, 33;
set_reg 33, 0x39383838;
set_reg 32, 0x20002bcc;
mstore 32, 0, 0, 33;
set_reg 33, 0x31393039;
set_reg 32, 0x20002bd0;
mstore 32, 0, 0, 33;
set_reg 33, 0x33393239;
set_reg 32, 0x20002bd4;
mstore 32, 0, 0, 33;
set_reg 33, 0x35393439;
set_reg 32, 0x20002bd8;
mstore 32, 0, 0, 33;
set_reg 33, 0x37393639;
set_reg 32, 0x20002bdc;
mstore 32, 0, 0, 33;
set_reg 33, 0x39393839;
set_reg 32, 0x20002be0;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.341
set_reg 33, 0x676e6172;
set_reg 32, 0x20002be4;
mstore 32, 0, 0, 33;
set_reg 33, 0x74732065;
set_reg 32, 0x20002be8;
mstore 32, 0, 0, 33;
set_reg 33, 0x20747261;
set_reg 32, 0x20002bec;
mstore 32, 0, 0, 33;
set_reg 33, 0x65646e69;
set_reg 32, 0x20002bf0;
mstore 32, 0, 0, 33;
set_reg 33, 0x6f202078;
set_reg 32, 0x20002bf4;
mstore 32, 0, 0, 33;
set_reg 33, 0x6f207475;
set_reg 32, 0x20002bf8;
mstore 32, 0, 0, 33;
set_reg 33, 0x61722066;
set_reg 32, 0x20002bfc;
mstore 32, 0, 0, 33;
set_reg 33, 0x2065676e;
set_reg 32, 0x20002c00;
mstore 32, 0, 0, 33;
set_reg 33, 0x20726f66;
set_reg 32, 0x20002c04;
mstore 32, 0, 0, 33;
set_reg 33, 0x63696c73;
set_reg 32, 0x20002c08;
mstore 32, 0, 0, 33;
set_reg 33, 0x666f2065;
set_reg 32, 0x20002c0c;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e656c20;
set_reg 32, 0x20002c10;
mstore 32, 0, 0, 33;
set_reg 33, 0x20687467;
set_reg 32, 0x20002c14;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.343
set_reg 33, 0x20002be4;
set_reg 32, 0x20002c18;
mstore 32, 0, 0, 33;
set_reg 33, 0x12;
set_reg 32, 0x20002c1c;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002bf6;
set_reg 32, 0x20002c20;
mstore 32, 0, 0, 33;
set_reg 33, 0x22;
set_reg 32, 0x20002c24;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.345
set_reg 33, 0x20002aac;
set_reg 32, 0x20002c28;
mstore 32, 0, 0, 33;
set_reg 33, 0x10;
set_reg 32, 0x20002c2c;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002bf6;
set_reg 32, 0x20002c30;
mstore 32, 0, 0, 33;
set_reg 33, 0x22;
set_reg 32, 0x20002c34;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.346
set_reg 33, 0x63696c73;
set_reg 32, 0x20002c38;
mstore 32, 0, 0, 33;
set_reg 33, 0x6e692065;
set_reg 32, 0x20002c3c;
mstore 32, 0, 0, 33;
set_reg 33, 0x20786564;
set_reg 32, 0x20002c40;
mstore 32, 0, 0, 33;
set_reg 33, 0x72617473;
set_reg 32, 0x20002c44;
mstore 32, 0, 0, 33;
set_reg 33, 0x61207374;
set_reg 32, 0x20002c48;
mstore 32, 0, 0, 33;
set_reg 33, 0x62202074;
set_reg 32, 0x20002c4c;
mstore 32, 0, 0, 33;
set_reg 33, 0x65207475;
set_reg 32, 0x20002c50;
mstore 32, 0, 0, 33;
set_reg 33, 0x2073646e;
set_reg 32, 0x20002c54;
mstore 32, 0, 0, 33;
set_reg 33, 0x207461;
set_reg 32, 0x20002c58;
mstore 32, 0, 0, 33;
// data .Lanon.f22648cecc38f34b88641f27a3cdc061.348
set_reg 33, 0x20002c38;
set_reg 32, 0x20002c5c;
mstore 32, 0, 0, 33;
set_reg 33, 0x16;
set_reg 32, 0x20002c60;
mstore 32, 0, 0, 33;
set_reg 33, 0x20002c4e;
set_reg 32, 0x20002c64;
mstore 32, 0, 0, 33;
set_reg 33, 0xd;
set_reg 32, 0x20002c68;
mstore 32, 0, 0, 33;
set_reg 33, 0x10;
set_reg 32, 0x20002c6c;
mstore 32, 0, 0, 33;
set_reg 33, 0x527a01;
set_reg 32, 0x20002c74;
mstore 32, 0, 0, 33;
set_reg 33, 0x1017c01;
set_reg 32, 0x20002c78;
mstore 32, 0, 0, 33;
set_reg 33, 0x20c1b;
set_reg 32, 0x20002c7c;
mstore 32, 0, 0, 33;
set_reg 33, 0x24;
set_reg 32, 0x20002c80;
mstore 32, 0, 0, 33;
set_reg 33, 0x18;
set_reg 32, 0x20002c84;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffecce;
set_reg 32, 0x20002c88;
mstore 32, 0, 0, 33;
set_reg 33, 0xcc;
set_reg 32, 0x20002c8c;
mstore 32, 0, 0, 33;
set_reg 33, 0x500e4200;
set_reg 32, 0x20002c90;
mstore 32, 0, 0, 33;
set_reg 33, 0x8801814e;
set_reg 32, 0x20002c94;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002c98;
mstore 32, 0, 0, 33;
set_reg 33, 0x94059304;
set_reg 32, 0x20002c9c;
mstore 32, 0, 0, 33;
set_reg 33, 0x42079506;
set_reg 32, 0x20002ca0;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c;
set_reg 32, 0x20002ca4;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002ca8;
mstore 32, 0, 0, 33;
set_reg 33, 0x40;
set_reg 32, 0x20002cac;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffed72;
set_reg 32, 0x20002cb0;
mstore 32, 0, 0, 33;
set_reg 33, 0x42;
set_reg 32, 0x20002cb4;
mstore 32, 0, 0, 33;
set_reg 33, 0x300e4200;
set_reg 32, 0x20002cb8;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002cbc;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002cc0;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002cc8;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002ccc;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffed94;
set_reg 32, 0x20002cd0;
mstore 32, 0, 0, 33;
set_reg 33, 0x3a;
set_reg 32, 0x20002cd4;
mstore 32, 0, 0, 33;
set_reg 33, 0x300e4200;
set_reg 32, 0x20002cd8;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002cdc;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002ce0;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002ce8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80;
set_reg 32, 0x20002cec;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffedae;
set_reg 32, 0x20002cf0;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002cf4;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002cf8;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002cfc;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002d00;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002d08;
mstore 32, 0, 0, 33;
set_reg 33, 0xa0;
set_reg 32, 0x20002d0c;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffedee;
set_reg 32, 0x20002d10;
mstore 32, 0, 0, 33;
set_reg 33, 0x70;
set_reg 32, 0x20002d14;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002d18;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002d1c;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002d20;
mstore 32, 0, 0, 33;
set_reg 33, 0x2c;
set_reg 32, 0x20002d28;
mstore 32, 0, 0, 33;
set_reg 33, 0xc0;
set_reg 32, 0x20002d2c;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffee3e;
set_reg 32, 0x20002d30;
mstore 32, 0, 0, 33;
set_reg 33, 0x1b6;
set_reg 32, 0x20002d34;
mstore 32, 0, 0, 33;
set_reg 33, 0x500e4200;
set_reg 32, 0x20002d38;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018154;
set_reg 32, 0x20002d3c;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002d40;
mstore 32, 0, 0, 33;
set_reg 33, 0x94059304;
set_reg 32, 0x20002d44;
mstore 32, 0, 0, 33;
set_reg 33, 0x96079506;
set_reg 32, 0x20002d48;
mstore 32, 0, 0, 33;
set_reg 33, 0x98099708;
set_reg 32, 0x20002d4c;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c420a;
set_reg 32, 0x20002d50;
mstore 32, 0, 0, 33;
set_reg 33, 0x30;
set_reg 32, 0x20002d58;
mstore 32, 0, 0, 33;
set_reg 33, 0xf0;
set_reg 32, 0x20002d5c;
mstore 32, 0, 0, 33;
set_reg 33, 0xffffefc4;
set_reg 32, 0x20002d60;
mstore 32, 0, 0, 33;
set_reg 33, 0x220;
set_reg 32, 0x20002d64;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002d68;
mstore 32, 0, 0, 33;
set_reg 33, 0x8801815a;
set_reg 32, 0x20002d6c;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002d70;
mstore 32, 0, 0, 33;
set_reg 33, 0x94059304;
set_reg 32, 0x20002d74;
mstore 32, 0, 0, 33;
set_reg 33, 0x96079506;
set_reg 32, 0x20002d78;
mstore 32, 0, 0, 33;
set_reg 33, 0x98099708;
set_reg 32, 0x20002d7c;
mstore 32, 0, 0, 33;
set_reg 33, 0x9a0b990a;
set_reg 32, 0x20002d80;
mstore 32, 0, 0, 33;
set_reg 33, 0x420d9b0c;
set_reg 32, 0x20002d84;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c;
set_reg 32, 0x20002d88;
mstore 32, 0, 0, 33;
set_reg 33, 0x24;
set_reg 32, 0x20002d8c;
mstore 32, 0, 0, 33;
set_reg 33, 0x124;
set_reg 32, 0x20002d90;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff1b0;
set_reg 32, 0x20002d94;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002d98;
mstore 32, 0, 0, 33;
set_reg 33, 0x200e4200;
set_reg 32, 0x20002d9c;
mstore 32, 0, 0, 33;
set_reg 33, 0x8801814c;
set_reg 32, 0x20002da0;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002da4;
mstore 32, 0, 0, 33;
set_reg 33, 0x94059304;
set_reg 32, 0x20002da8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4206;
set_reg 32, 0x20002dac;
mstore 32, 0, 0, 33;
set_reg 33, 0x28;
set_reg 32, 0x20002db4;
mstore 32, 0, 0, 33;
set_reg 33, 0x14c;
set_reg 32, 0x20002db8;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff1e8;
set_reg 32, 0x20002dbc;
mstore 32, 0, 0, 33;
set_reg 33, 0x1bc;
set_reg 32, 0x20002dc0;
mstore 32, 0, 0, 33;
set_reg 33, 0x300e4200;
set_reg 32, 0x20002dc4;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018152;
set_reg 32, 0x20002dc8;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002dcc;
mstore 32, 0, 0, 33;
set_reg 33, 0x94059304;
set_reg 32, 0x20002dd0;
mstore 32, 0, 0, 33;
set_reg 33, 0x96079506;
set_reg 32, 0x20002dd4;
mstore 32, 0, 0, 33;
set_reg 33, 0x42099708;
set_reg 32, 0x20002dd8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c;
set_reg 32, 0x20002ddc;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002de0;
mstore 32, 0, 0, 33;
set_reg 33, 0x178;
set_reg 32, 0x20002de4;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff378;
set_reg 32, 0x20002de8;
mstore 32, 0, 0, 33;
set_reg 33, 0x16;
set_reg 32, 0x20002dec;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002df0;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002df4;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002df8;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002e00;
mstore 32, 0, 0, 33;
set_reg 33, 0x198;
set_reg 32, 0x20002e04;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff36e;
set_reg 32, 0x20002e08;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002e0c;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002e10;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002e14;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002e18;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002e20;
mstore 32, 0, 0, 33;
set_reg 33, 0x1b8;
set_reg 32, 0x20002e24;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff3ae;
set_reg 32, 0x20002e28;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002e2c;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002e30;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002e34;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002e38;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002e40;
mstore 32, 0, 0, 33;
set_reg 33, 0x1d8;
set_reg 32, 0x20002e44;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff3ee;
set_reg 32, 0x20002e48;
mstore 32, 0, 0, 33;
set_reg 33, 0x60;
set_reg 32, 0x20002e4c;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002e50;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002e54;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002e58;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002e60;
mstore 32, 0, 0, 33;
set_reg 33, 0x1f8;
set_reg 32, 0x20002e64;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff42e;
set_reg 32, 0x20002e68;
mstore 32, 0, 0, 33;
set_reg 33, 0x18e;
set_reg 32, 0x20002e6c;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002e70;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002e74;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002e78;
mstore 32, 0, 0, 33;
set_reg 33, 0x20;
set_reg 32, 0x20002e80;
mstore 32, 0, 0, 33;
set_reg 33, 0x218;
set_reg 32, 0x20002e84;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff59c;
set_reg 32, 0x20002e88;
mstore 32, 0, 0, 33;
set_reg 33, 0x164;
set_reg 32, 0x20002e8c;
mstore 32, 0, 0, 33;
set_reg 33, 0x400e4200;
set_reg 32, 0x20002e90;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018148;
set_reg 32, 0x20002e94;
mstore 32, 0, 0, 33;
set_reg 33, 0x92038902;
set_reg 32, 0x20002e98;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4204;
set_reg 32, 0x20002e9c;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002ea4;
mstore 32, 0, 0, 33;
set_reg 33, 0x23c;
set_reg 32, 0x20002ea8;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff6dc;
set_reg 32, 0x20002eac;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002eb0;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002eb4;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002eb8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002ebc;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002ec4;
mstore 32, 0, 0, 33;
set_reg 33, 0x25c;
set_reg 32, 0x20002ec8;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff6d8;
set_reg 32, 0x20002ecc;
mstore 32, 0, 0, 33;
set_reg 33, 0x16;
set_reg 32, 0x20002ed0;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002ed4;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002ed8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002edc;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002ee4;
mstore 32, 0, 0, 33;
set_reg 33, 0x27c;
set_reg 32, 0x20002ee8;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff6ce;
set_reg 32, 0x20002eec;
mstore 32, 0, 0, 33;
set_reg 33, 0x1e;
set_reg 32, 0x20002ef0;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002ef4;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002ef8;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002efc;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002f04;
mstore 32, 0, 0, 33;
set_reg 33, 0x29c;
set_reg 32, 0x20002f08;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff6cc;
set_reg 32, 0x20002f0c;
mstore 32, 0, 0, 33;
set_reg 33, 0x6a;
set_reg 32, 0x20002f10;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002f14;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002f18;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002f1c;
mstore 32, 0, 0, 33;
set_reg 33, 0x1c;
set_reg 32, 0x20002f24;
mstore 32, 0, 0, 33;
set_reg 33, 0x2bc;
set_reg 32, 0x20002f28;
mstore 32, 0, 0, 33;
set_reg 33, 0xfffff716;
set_reg 32, 0x20002f2c;
mstore 32, 0, 0, 33;
set_reg 33, 0xbe;
set_reg 32, 0x20002f30;
mstore 32, 0, 0, 33;
set_reg 33, 0x100e4200;
set_reg 32, 0x20002f34;
mstore 32, 0, 0, 33;
set_reg 33, 0x88018144;
set_reg 32, 0x20002f38;
mstore 32, 0, 0, 33;
set_reg 33, 0x80c4202;
set_reg 32, 0x20002f3c;
mstore 32, 0, 0, 33;
// This is the end of the data initialization routine.
jump_dyn 1, 32;
// ecall handler
__ecall_handler:
branch_if_diff_equal 5, 0, 12, __ecall_handler_commit_public;
branch_if_diff_equal 5, 0, 9, __ecall_handler_halt;
branch_if_diff_equal 5, 0, 1, __ecall_handler_input;
branch_if_diff_equal 5, 0, 13, __ecall_handler_invert_gl;
branch_if_diff_equal 5, 0, 11, __ecall_handler_native_hash;
branch_if_diff_equal 5, 0, 2, __ecall_handler_output;
branch_if_diff_equal 5, 0, 3, __ecall_handler_poseidon_gl;
__invalid_syscall:
fail;
__ecall_handler_commit_public:
commit_public 10, 11;
jump_dyn 1, 32;
__ecall_handler_halt:
return;
jump_dyn 1, 32;
__ecall_handler_input:
query_arg_1 <== get_reg(10);
query_arg_2 <== get_reg(11);
set_reg 10, ${ std::prelude::Query::Input(std::convert::int(std::prover::eval(query_arg_1)), std::convert::int(std::prover::eval(query_arg_2))) };
jump_dyn 1, 32;
__ecall_handler_invert_gl:
invert_gl 10, 11;
jump_dyn 1, 32;
__ecall_handler_native_hash:
poseidon_gl 10, 10;
jump_dyn 1, 32;
__ecall_handler_output:
query_arg_1 <== get_reg(10);
query_arg_2 <== get_reg(11);
set_reg 0, ${ std::prelude::Query::Output(std::convert::int(std::prover::eval(query_arg_1)), std::prover::eval(query_arg_2)) };
jump_dyn 1, 32;
__ecall_handler_poseidon_gl:
poseidon_gl 10, 10;
jump_dyn 1, 32;
// end of ecall handler
}
}
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