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@lesterlo
Created January 3, 2025 15:20
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zuboard custom device tree for Xilinx SDTgen workflow
#include "include/dt-bindings/input/input.h"
#include "include/dt-bindings/interrupt-controller/irq.h"
#include "include/dt-bindings/gpio/gpio.h"
#include "include/dt-bindings/pinctrl/pinctrl-zynqmp.h"
#include "include/dt-bindings/phy/phy.h"
/ {
chosen {
bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused root=/dev/mmcblk0p2 rw rootwait cma=512M";
nvmem0 = &eui_eepromm;
};
xlnk {
compatible = "xlnx,xlnk-1.0";
};
aliases {
mmc0 = &sdhci1;
mmc1 = &sdhci0;
};
gtr_clk0: gtr_clk0 { /* gtr_refclk0_dp - 135MHz */
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <135000000>;
};
pmu {
/delete-property/ interrupt-affinity;
interrupt-affinity = <&cpu0>, <&cpu1>;
};
};
&gem2 {
status = "okay";
phy-mode = "rgmii-id";
/delete-property/ local-mac-address;
nvmem-cells = <&mac_address>;
nvmem-cell-names = "mac-address";
phy-handle = <&phy0>;
phy0: phy@7 {
reg = <0x7>;
};
};
/* QSPI partitions are defined with petalinux-config and described in system.conf.dtsi */
&qspi { /* MIO 0-5 - U10 */
flash@0 { /* ISSI IS25WP256E */
compatible = "mt25qu256a", "jedec,spi-nor"; /* 32MB */
#address-cells = <1>;
#size-cells = <1>;
reg = <0>;
spi-tx-bus-width = <1>;
spi-rx-bus-width = <4>;
spi-max-frequency = <50000000>; /* 50MHz */
};
};
/* SD1 for SD card boot */
/* SD1 with level shifter */
/* only supports 3.3V, no level shifter */
&sdhci1 {
status = "okay";
no-1-8-v;
disable-wp;
};
&axi_iic_0 {
#address-cells = <1>;
#size-cells = <0>;
clock-frequency = <100000>;
stts22htr: stts22htr@3f {
compatible = "st,stts22h";
reg = <0x3f>;
};
};
&spi0 {
num-cs = <1>;
pressure@00 {
compatible = "st,lps22hh";
reg = <0>;
spi-max-frequency = <100000>;
};
};
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
/* Ethernet MAC ID EEPROM */
eui_eeprom: eui_eeprom@58 { /* U7 */
#address-cells = <1>;
#size-cells = <1>;
compatible = "atmel,24mac402";
reg = <0x58>;
mac_address: mac_address@9A {
reg = <0x9A 0x6>;
};
};
};
&psgtr {
/* DP */
clocks = <&gtr_clk0>;
clock-names = "ref0";
};
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