Enable r5 core

readme.md

Reference

https://adaptivesupport.amd.com/s/question/0D54U00007mDLkUSAW/zynq-ultrascale-mpsoc-device-tree-for-two-r5?language=en_US

rpu0.dtsi

/include/ "system-conf.dtsi"
/ {
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
		rpu0vdev0vring0: rpu0vdev0vring0@3ed40000 {
			no-map;
			reg = <0x0 0x3ed40000 0x0 0x4000>;
		};
		rpu0vdev0vring1: rpu0vdev0vring1@3ed44000 {
			no-map;
			reg = <0x0 0x3ed44000 0x0 0x4000>;
		};
		rpu0vdev0buffer: rpu0vdev0buffer@3ed48000 {
			no-map;
			reg = <0x0 0x3ed48000 0x0 0x100000>;
		};
		rproc_0_reserved: rproc@3ed00000 {
			no-map;
			reg = <0x0 0x3ed00000 0x0 0x40000>;
		};
	};


	tcm_0a@ffe00000 {
		no-map;
		reg = <0x0 0xffe00000 0x0 0x10000>;
		phandle = <0x40>;
		status = "okay";
		compatible = "mmio-sram";
		power-domain = <&zynqmp_firmware 15>;
	};

	tcm_0b@ffe20000 {
		no-map;
		reg = <0x0 0xffe20000 0x0 0x10000>;
		phandle = <0x41>;
		status = "okay";
		compatible = "mmio-sram";
		power-domain = <&zynqmp_firmware 16>;
	};


	rf5ss@ff9a0000 {
		compatible = "xlnx,zynqmp-r5-remoteproc";
		xlnx,cluster-mode = <1>;
		ranges;
		reg = <0x0 0xFF9A0000 0x0 0x10000>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;

		r5f_0 {
			compatible = "xilinx,r5f";
			#address-cells = <2>;
			#size-cells = <2>;
			ranges;
			sram = <0x40 0x41>;
			memory-region = <&rproc_0_reserved>, <&rpu0vdev0buffer>, <&rpu0vdev0vring0>, <&rpu0vdev0vring1>;
			power-domain = <&zynqmp_firmware 7>;
			mboxes = <&ipi_mailbox_rpu0 0>, <&ipi_mailbox_rpu0 1>;
			mbox-names = "tx", "rx";
		};
	};


	zynqmp_ipi1 {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
		xlnx,ipi-id = <7>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* APU<->RPU0 IPI mailbox controller */
		ipi_mailbox_rpu0: mailbox@ff990600 {
			reg = <0xff990600 0x20>,
			      <0xff990620 0x20>,
			      <0xff9900c0 0x20>,
			      <0xff9900e0 0x20>;
			reg-names = "local_request_region",
				    "local_response_region",
				    "remote_request_region",
				    "remote_response_region";
			#mbox-cells = <1>;
			xlnx,ipi-id = <1>;
		};
	};
};

rpu1.dtsi

/include/ "system-conf.dtsi"
/ {
	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;
        rproc_1_reserved: rproc@3ef00000 {
            no-map;
            reg = <0x0 0x3ef00000 0x0 0x40000>;
        };
        rpu1vdev0vring0: rpu1vdev0vring0@3ef40000 {
            no-map;
            reg = <0x0 0x3ef40000 0x0 0x4000>;
        };
        rpu1vdev0vring1: rpu1vdev0vring1@3ef44000 {
            no-map;
            reg = <0x0 0x3ef44000 0x0 0x4000>;
        };
        rpu1vdev0buffer: rpu1vdev0buffer@3ef48000 {
            no-map;
            compatible = "shared-dma-pool";
            reg = <0x0 0x3ef48000 0x0 0x100000>;
        };
	};

    tcm_0a@ffe00000 {
		no-map;
		reg = <0x0 0xffe00000 0x0 0x10000>;
		phandle = <0x40>;
		status = "okay";
		compatible = "mmio-sram";
        power-domain = <&zynqmp_firmware 15>;
	};

	tcm_0b@ffe20000 {
		no-map;
		reg = <0x0 0xffe20000 0x0 0x10000>;
		phandle = <0x41>;
		status = "okay";
		compatible = "mmio-sram";
        power-domain = <&zynqmp_firmware 16>;
	};
    tcm_0a@ffe90000 {
        no-map;
        reg = <0x0 0xffe90000 0x0 0x10000>;
        phandle = <0x42>;
        status = "okay";
        compatible = "mmio-sram";
        power-domain = <&zynqmp_firmware 17>;
    };

    tcm_0b@ffeb0000 {
        no-map;
        reg = <0x0 0xffeb0000 0x0 0x10000>;
        phandle = <0x43>;
        status = "okay";
        compatible = "mmio-sram";
        power-domain = <&zynqmp_firmware 18>;
    };


	rf5ss@ff9a0000 {
		compatible = "xlnx,zynqmp-r5-remoteproc";
		xlnx,cluster-mode = <0x1>;
		ranges;
		reg = <0x0 0xFF9A0000 0x0 0x10000>;
		#address-cells = <0x2>;
		#size-cells = <0x2>;
        r5f_1 {                                                                 
            compatible = "xilinx,r5f";                                          
            #address-cells = <2>;                                               
            #size-cells = <2>;                                                  
            ranges;                                                             
            sram = <0x42 0x43>;                                                 
            memory-region = <&rproc_1_reserved>, <&rpu1vdev0buffer>, <&rpu1vdev0vring0>, <&rpu1vdev0vring1>;
            power-domain = <&zynqmp_firmware 8>;                                               
            mboxes = <&ipi_mailbox_rpu1 0>, <&ipi_mailbox_rpu1 1>;              
            mbox-names = "tx", "rx";                                            
        };

	};


	zynqmp_ipi1 {
		compatible = "xlnx,zynqmp-ipi-mailbox";
		interrupt-parent = <&gic>;
		interrupts = <0 29 4>;
		xlnx,ipi-id = <7>;
		#address-cells = <1>;
		#size-cells = <1>;
		ranges;

		/* APU<->RPU1 IPI mailbox controller */
        ipi_mailbox_rpu1: mailbox@ff90000 {
            reg = <0xff990600 0x20>,
                  <0xff990620 0x20>,
                  <0xff9900c0 0x20>,
                  <0xff9900e0 0x20>;
            reg-names = "local_request_region",
                    "local_response_region",
                    "remote_request_region",
                    "remote_response_region";
            #mbox-cells = <1>;
            xlnx,ipi-id = <2>;
	     phandle = <0x44>;
        };
	};
};