Generic makefile for small c programs

Makefile

# ?=   declare if not already defined
CC ?= gcc
CFLAGS ?= -Wall -O2 -march=native
#LDLIBS = -lcrypt -lssl

# output executable name and file extensions
EXEC = run
SOURCES = $(wildcard *.c)
OBJECTS = $(SOURCES:.c=.o)

all: $(EXEC)

debug: CFLAGS = -Wall -g
debug: clean
debug: $(EXEC)

# Main target
$(EXEC): $(OBJECTS)
	$(CC) $(LDLIBS) $(OBJECTS) -o $(EXEC)

# Object files
%.o: %.cpp
	$(CC) -c $(CFLAGS) $< -o $@

clean:
	rm -f $(EXEC) $(OBJECTS)