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From b21f15950a02b882d2301d7cc13964178ccdbc53 Mon Sep 17 00:00:00 2001 | |
From: Chris Morgan <[email protected]> | |
Date: Tue, 6 Sep 2022 16:05:58 -0500 | |
Subject: [PATCH] NOT (YET) FOR UPSTREAM | |
Add panels to RG353P and RG503. | |
Signed-off-by: Chris Morgan <[email protected]> | |
--- | |
.../dts/rockchip/rk3566-anbernic-rg353p.dts | 58 +++++++++++++++++ |
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# | |
# Automatically generated file; DO NOT EDIT. | |
# Linux/arm64 6.0.0-rc3 Kernel Configuration | |
# | |
CONFIG_CC_VERSION_TEXT="aarch64-linux-gnu-gcc (Ubuntu 9.4.0-1ubuntu1~20.04.1) 9.4.0" | |
CONFIG_CC_IS_GCC=y | |
CONFIG_GCC_VERSION=90400 | |
CONFIG_CLANG_VERSION=0 | |
CONFIG_AS_IS_GNU=y | |
CONFIG_AS_VERSION=23400 |
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From b13013b1ab34b8eda4c78c1d63d29211cb6af03d Mon Sep 17 00:00:00 2001 | |
From: Chris Morgan <[email protected]> | |
Date: Tue, 30 Aug 2022 12:32:43 -0500 | |
Subject: [PATCH] drm: Add Panel Drivers for ams495qa01 and RG353P | |
Do not upstream. I haven't confirmed the part number yet for the | |
RG353P panel and I haven't added gamma yet for the Samsung panel. | |
Signed-off-by: Chris Morgan <[email protected]> | |
--- |
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gpio_spi: spi { | |
compatible = "spi-gpio"; | |
pinctrl-names = "default"; | |
pinctrl-0 = <&spi_gpios>; | |
#address-cells = <1>; | |
#size-cells = <0>; | |
sck-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; | |
mosi-gpios = <&gpio4 RK_PB0 GPIO_ACTIVE_HIGH>; | |
cs-gpios = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; |
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// SPDX-License-Identifier: (GPL-2.0+ OR MIT) | |
/dts-v1/; | |
#include <dt-bindings/gpio/gpio.h> | |
#include <dt-bindings/input/linux-event-codes.h> | |
#include <dt-bindings/leds/common.h> | |
#include <dt-bindings/pinctrl/rockchip.h> | |
#include <dt-bindings/soc/rockchip,vop2.h> | |
#include "rk3566.dtsi" |
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From 498c9e0a673c171c19b24700a154f14ec3d58a9f Mon Sep 17 00:00:00 2001 | |
From: Chris Morgan <[email protected]> | |
Date: Tue, 2 Aug 2022 15:16:46 -0500 | |
Subject: Add dsi and dsi-dphy to rk356x | |
Add the necessary devicetree bindings to the rk356x.dtsi file. | |
--- | |
arch/arm64/boot/dts/rockchip/rk356x.dtsi | 80 ++++++++++++++++++++++++ | |
1 file changed, 80 insertions(+) |
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/dts-v1/; | |
/ { | |
compatible = "rockchip,rk3566-evb2-lp4x-v11\0rockchip,rk3566"; | |
interrupt-parent = <0x01>; | |
#address-cells = <0x02>; | |
#size-cells = <0x02>; | |
model = "Rockchip RK3566 EVB2 LP4X V10 Board"; | |
ddr_timing { |
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DDR Version V1.08 20210520 | |
ln | |
ddrconfig:0 | |
LP4 MR14:0x4d | |
LPDDR4, 324MHz | |
BW=32 Col=10 Bk=8 CS0 Row=15 CS=1 Die BW=16 Size=1024MB | |
wrlvl:clk skew:0x80,0x80 | |
tdqss_skew: | |
cs 0 dqs 0: 127 | |
cs 0 dqs 1: 12 |
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#ucm2/Rockchip/rk817-codec/HiFi.conf | |
SectionVerb { | |
EnableSequence [ | |
cset "name='Playback Mux' SPK" | |
] | |
Value { | |
PlaybackPCM "hw:${CardId},0" | |
CapturePCM "hw:${CardId},0" | |
} |
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[ 0.000000] Booting Linux on physical CPU 0x0 | |
[ 0.000000] Linux version 5.15.0-0.bpo.2-armmp ([email protected]) (arm-linux-gnueabihf-gcc-10 (Debian 10.2.1-6) 10.2.1 20210110, GNU ld (GNU Binutils for Debian) 2.35.2) #1 Debian 5.15.5-2~bpo11+1 (2022-01-02) | |
[ 0.000000] CPU: ARMv7 Processor [413fc082] revision 2 (ARMv7), cr=10c5387d | |
[ 0.000000] CPU: PIPT / VIPT nonaliasing data cache, VIPT aliasing instruction cache | |
[ 0.000000] OF: fdt: Machine model: NextThing C.H.I.P. | |
[ 0.000000] Memory policy: Data cache writeback | |
[ 0.000000] Reserved memory: created CMA memory pool at 0x4a000000, size 96 MiB | |
[ 0.000000] OF: reserved mem: initialized node default-pool, compatible id shared-dma-pool | |
[ 0.000000] Zone ranges: | |
[ 0.000000] Normal [mem 0x0000000040000000-0x000000005fffffff] |