Created
September 21, 2014 13:11
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Build FPGALink and the cksum VHDL example, and use flcli to write data to an Aessent aes220, and then read data back from it.
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Building FPGALink & the cksum example VHDL for Aessent aes220 on Linux: | |
# Install prerequisites: | |
sudo apt-get install build-essential libreadline-dev libusb-1.0-0-dev python-yaml | |
mkdir $HOME/20140524 | |
cd $HOME/20140524 | |
wget -qO- http://tiny.cc/msbil | tar zxf - | |
# Fetch and build flcli: | |
cd makestuff/apps | |
../scripts/msget.sh makestuff/flcli/20140524 | |
cd flcli | |
make deps | |
cd ../../ | |
# Fetch and build the VHDL version of the cksum example: | |
scripts/msget.sh makestuff/hdlmake | |
cd hdlmake/apps | |
../bin/hdlmake.py -g makestuff/swled | |
cd makestuff/swled/cksum/vhdl | |
../../../../../bin/hdlmake.py -t ../../templates/fx2all/vhdl -b aes220 | |
# Load FPGALink firmware into the aes220: | |
../../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -i 2443:00dc | |
# Program the FPGA: | |
../../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -p XS:D0D5D1D6A7[D3?,B1+,B5+,B3+]:top_level.bin | |
# Write 64KiB of random data to the board: | |
dd if=/dev/urandom of=random.dat bs=1024 count=64 | |
../../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -a 'w0 "random.dat";r1;r2' -b | |
# And now read 64KiB (0x10000 bytes) back from the board and save it as "out.dat": | |
../../../../../../apps/flcli/lin.x64/rel/flcli -v 1d50:602b:0002 -a 'r0 10000 "out.dat"' | |
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Alternatively, on Windows: | |
1) Install the Windows SDK: | |
http://download.microsoft.com/download/A/6/A/A6AC035D-DA3F-4F0C-ADA4-37C8E5D34E3D/winsdk_web.exe | |
2) For x86, install this (choose "install just for me"): | |
http://www.python.org/ftp/python/2.7.6/python-2.7.6.msi | |
Alternatively for x64, install this (choose "install just for me"): | |
http://www.python.org/ftp/python/2.7.6/python-2.7.6.amd64.msi | |
3) Install: | |
http://pyyaml.org/download/pyyaml/PyYAML-3.10.win32-py2.7.exe | |
4) Download this and uncompress it to C:\makestuff: | |
http://tiny.cc/msbiw | |
5) Run C:\makestuff\setup.exe, select the C/C++ compiler, Xilinx ISE and Python 2.7 and click | |
"Create Shortcut". | |
6) Launch the new desktop shortcut & continue at the shell-prompt (hint: you can paste into the | |
console window using the right mouse button). | |
# Connect the aes220 & use Zadig to load a new WinUSB driver: | |
zadig.sh | |
# Fetch and build flcli: | |
cd $HOME/apps | |
msget.sh makestuff/flcli/20140524 | |
cd flcli | |
make deps | |
cd ../../ | |
# Fetch and build the VHDL version of the cksum example: | |
msget.sh makestuff/hdlmake | |
cd hdlmake/apps | |
../bin/hdlmake.py -g makestuff/swled | |
cd makestuff/swled/cksum/vhdl | |
../../../../../bin/hdlmake.py -t ../../templates/fx2all/vhdl -b aes220 | |
# Load FPGALink firmware into the aes220 (you can press Ctrl-C after Windows detects the new device): | |
../../../../../../apps/flcli/msvc.x64/rel/flcli -v 1d50:602b:0002 -i 2443:00dc # x64 | |
../../../../../../apps/flcli/msvc.x86/rel/flcli -v 1d50:602b:0002 -i 2443:00dc # x86 | |
# Run Zadig again & install a new WinUSB driver for the newly-added FPGALink device (1D50:602B): | |
zadig.sh | |
# Program the FPGA: | |
../../../../../../apps/flcli/msvc.x64/rel/flcli -v 1d50:602b:0002 -p XS:D0D5D1D6A7[D3?,B1+,B5+,B3+]:top_level.bin # x64 | |
../../../../../../apps/flcli/msvc.x86/rel/flcli -v 1d50:602b:0002 -p XS:D0D5D1D6A7[D3?,B1+,B5+,B3+]:top_level.bin # x86 | |
# Write 64KiB of random data to the board: | |
dd if=/dev/urandom of=random.dat bs=1024 count=64 | |
../../../../../../apps/flcli/msvc.x64/rel/flcli -v 1d50:602b:0002 -a 'w0 "random.dat";r1;r2' # x64 | |
../../../../../../apps/flcli/msvc.x86/rel/flcli -v 1d50:602b:0002 -a 'w0 "random.dat";r1;r2' # x86 | |
# And now read 64KiB (0x10000 bytes) back from the board and save it as "out.dat": | |
../../../../../../apps/flcli/msvc.x64/rel/flcli -v 1d50:602b:0002 -a 'r0 10000 "out.dat"' # x64 | |
../../../../../../apps/flcli/msvc.x86/rel/flcli -v 1d50:602b:0002 -a 'r0 10000 "out.dat"' # x86 |
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