makslevental

# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
# See https://llvm.org/LICENSE.txt for license information.
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
# Copyright (c) 2025.

[project]
name = "mlir-python-bindings"
version = "0.0.1"
requires-python = ">=3.8,<=3.13"
[project.urls]

makslevental

//===--- ItaniumMangle.cpp - Itanium C++ Name Mangling ----------*- C++ -*-===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
//
//===----------------------------------------------------------------------===//
//
// Implements C++ name mangling according to the Itanium C++ ABI,
// which is used in GCC 3.2 and newer (and many compilers that are

makslevental

import re
import time
from collections import defaultdict
from pprint import pprint

import hdbscan
import leetcode
from sklearn.feature_extraction.text import TfidfVectorizer
from sklearn.preprocessing import normalize

makslevental

import dis
import inspect


def my_generator():
    frame = inspect.currentframe()
    print(frame.f_code.co_consts)
    x = yield
    frame = inspect.currentframe()
    print(frame.f_code.co_consts)

makslevental

  %1085 = tail call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.f16(<8 x half> %1056, <8 x half> %1052, <16 x float> %1084, i32 0, i32 0, i32 0), !dbg !62
  %1947 = shufflevector <2 x float> %1478, <2 x float> poison, <16 x i32> zeroinitializer, !dbg !62
  %1948 = fmul <16 x float> %1085, %1947, !dbg !62
  %1949 = tail call <16 x float> @llvm.amdgcn.mfma.f32.32x32x16.f16(<8 x half> %1931, <8 x half> %1906, <16 x float> %1948, i32 0, i32 0, i32 0), !dbg !62

makslevental

/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\
|*                                                                            *|
|* Target Register Enum Values                                                *|
|*                                                                            *|
|* Automatically generated file, do not edit!                                 *|
|*                                                                            *|
\*===----------------------------------------------------------------------===*/


#ifdef GET_REGINFO_ENUM

makslevental

	.section	.AMDGPU.config,"",@progbits
	.long	47176
	.long	11468865
	.long	47180
	.long	5008
	.long	47200
	.long	0
	.long	4
	.long	0
	.long	8

makslevental

from enum import Flag
from pprint import pprint


class SchedGroupMask(Flag):
    NONE = 0
    ALU = 1 << 0
    VALU = 1 << 1
    SALU = 1 << 2
    MFMA = 1 << 3

makslevental

; Function Attrs: mustprogress nofree norecurse nosync nounwind willreturn memory(argmem: readwrite)
define amdgpu_kernel void @add_kernel(ptr addrspace(1) nocapture readonly %0, ptr addrspace(1) nocapture readonly %1, ptr addrspace(1) nocapture writeonly %2, i32 %3) local_unnamed_addr #0 {
  %5 = tail call i32 @llvm.amdgcn.workgroup.id.x()
  %6 = shl i32 %5, 10
  %7 = tail call i32 @llvm.amdgcn.workitem.id.x()
  %8 = shl i32 %7, 2
  %9 = and i32 %8, 1020
  %10 = or disjoint i32 %9, %6
  %11 = icmp slt i32 %10, %3
  br i1 %11, label %.critedge, label %.critedge2

makslevental

diff --git a/CMakeLists.txt b/CMakeLists.txt
--- a/CMakeLists.txt	(revision 7fb35319d38e57f7341e8434a4f5b2049aec8657)
+++ b/CMakeLists.txt	(date 1744728290525)
@@ -318,6 +318,9 @@
   endif()
 
   target_link_options(triton PRIVATE ${PYTHON_LDFLAGS})
+  set_target_properties(triton PROPERTIES ARCHIVE_OUTPUT_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/python/triton/_C)
+  set_target_properties(triton PROPERTIES LIBRARY_OUTPUT_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/python/triton/_C)
+  set_target_properties(triton PROPERTIES RUNTIME_OUTPUT_DIRECTORY ${CMAKE_CURRENT_SOURCE_DIR}/python/triton/_C)