| title | Untitled Post |
|---|---|
| date | 2026-06-07 |
| excerpt | What should your first public milestone be? |
| tags | [blog,quick-post] |
| privacy | public |
What should your first public milestone be?
A realistic first goal:
Goal 1
Finish Nand2Tetris.
Goal 2
Build a basic RISC-V CPU in Verilog.
Goal 3
Run C programs on it.
Goal 4
Open-source it on GitHub.
Goal 5
Write detailed technical articles about the design.
At that point, you have something concrete to show.
That's actually a fair challenge.
The answer is: Nand2Tetris does not teach RISC-V directly.
If someone told you:
Finish Nand2Tetris → magically understand RISC-V
that would be wrong.
What Nand2Tetris teaches is the fundamental concepts underneath every CPU, including RISC-V, ARM, and x86.
Think of it like this:
- Logic gates
- ALU
- Registers
- Memory
- CPU datapath
- Instruction decoding
- Machine language
- Assembly
- Compiler basics
- Operating system basics
These concepts exist in every processor.
For example, in Nand2Tetris you build an ALU.
A RISC-V CPU also has an ALU.
When a RISC-V instruction says:
add x1, x2, x3the CPU:
- Decodes the instruction.
- Reads registers x2 and x3.
- Sends them to the ALU.
- ALU performs addition.
- Stores result into x1.
The exact same ideas exist in Nand2Tetris.
What Nand2Tetris does not teach:
- RISC-V instruction formats
- Verilog
- FPGA design
- Modern cache systems
- Branch prediction
- Out-of-order execution
- Linux boot process
Those come afterward.
A more realistic roadmap is:
Nand2Tetris
Learn:
What a CPU fundamentally is.
RISC-V Assembly
Learn:
- Registers
- Instructions
- Memory model
- Calling conventions
Example:
add x5, x6, x7You'll understand why that instruction works because of Nand2Tetris.
Computer Architecture
Read:
Computer Organization and Design
This book is almost exactly the bridge you're looking for.
It takes you from:
"I know what an ALU is"
to
"I understand how a real RISC-V processor is designed."
Learn Verilog
Now you can actually implement:
- Register file
- ALU
- Decoder
- Control unit
for a RISC-V CPU.
If your long-term dream is "one day build processors," then the first milestone I would set is actually:
- Finish Nand2Tetris.
- Learn basic RISC-V assembly.
- Read the RISC-V edition of Patterson & Hennessy.
- Build a simple RV32I processor in Verilog.
That sequence is much tighter and more realistic than jumping straight from Nand2Tetris to "startup pitching investors."
And honestly, if you got to step 4, you'd already be in a tiny minority of software engineers. Most developers never get far enough to build even a simple CPU that can execute RISC-V instructions.