Created
October 3, 2021 12:50
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| /dts-v1/; | |
| / { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| model = "SAMSUNG K PROJECT REV14"; | |
| compatible = "qcom,msm8974-mtp", "qcom,msm8974", "qcom,mtp"; | |
| interrupt-parent = <0x1>; | |
| qcom,msm-id = <0xc208ff01 0xe 0x10000>; | |
| chosen { | |
| }; | |
| aliases { | |
| spi0 = "/soc/spi@f9923000"; | |
| spi7 = "/soc/spi@f9966000"; | |
| sdhc1 = "/soc/sdhci@f9824900"; | |
| sdhc2 = "/soc/sdhci@f98a4900"; | |
| sdhc3 = "/soc/sdhci@f9864900"; | |
| sdhc4 = "/soc/sdhci@f98e4900"; | |
| smd0 = "/soc/qcom,smdtty/qcom,smdtty-ds"; | |
| smd1 = "/soc/qcom,smdtty/qcom,smdtty-apps-fm"; | |
| smd2 = "/soc/qcom,smdtty/smdtty-apps-riva-bt-acl"; | |
| smd3 = "/soc/qcom,smdtty/qcom,smdtty-apps-riva-bt-cmd"; | |
| smd4 = "/soc/qcom,smdtty/qcom,smdtty-mbalbridge"; | |
| smd5 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-cmd"; | |
| smd6 = "/soc/qcom,smdtty/smdtty-apps-riva-ant-data"; | |
| smd7 = "/soc/qcom,smdtty/qcom,smdtty-data1"; | |
| smd11 = "/soc/qcom,smdtty/qcom,smdtty-data11"; | |
| smd21 = "/soc/qcom,smdtty/qcom,smdtty-data21"; | |
| smd27 = "/soc/qcom,smdtty/smdtty-gpsnmea"; | |
| smd36 = "/soc/qcom,smdtty/smdtty-loopback"; | |
| serial0 = "/soc/serial@f991e000"; | |
| serial1 = "/soc/serial@f995d000"; | |
| uart3 = "/soc/uart@f991d000"; | |
| }; | |
| memory { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| device_type = "memory"; | |
| reg = <0x0 0x0>; | |
| secure_region { | |
| linux,contiguous-region; | |
| reg = <0x0 0xa500000>; | |
| label = "secure_mem"; | |
| linux,phandle = <0x1f>; | |
| phandle = <0x1f>; | |
| }; | |
| adsp_region { | |
| linux,contiguous-region; | |
| reg = <0x0 0x4b00000>; | |
| label = "adsp_mem"; | |
| linux,phandle = <0x20>; | |
| phandle = <0x20>; | |
| }; | |
| qsecom_region { | |
| linux,contiguous-region; | |
| reg = <0x0 0x1100000>; | |
| label = "qseecom_mem"; | |
| linux,phandle = <0x21>; | |
| phandle = <0x21>; | |
| }; | |
| }; | |
| cpus { | |
| #size-cells = <0x0>; | |
| #address-cells = <0x1>; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "qcom,krait"; | |
| reg = <0x0>; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "qcom,krait"; | |
| reg = <0x1>; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "qcom,krait"; | |
| reg = <0x2>; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "qcom,krait"; | |
| reg = <0x3>; | |
| }; | |
| }; | |
| soc { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,msm-cam@fd8C0000 { | |
| compatible = "qcom,msm-cam"; | |
| reg = <0xfd8c0000 0x10000>; | |
| reg-names = "msm-cam"; | |
| }; | |
| qcom,cam_dummy { | |
| compatible = "qcom,cam_dummy"; | |
| }; | |
| qcom,csiphy@fda0ac00 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,csiphy"; | |
| reg = <0xfda0ac00 0x200 0xfda00030 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupts = <0x0 0x4e 0x0>; | |
| interrupt-names = "csiphy"; | |
| }; | |
| qcom,csiphy@fda0b000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,csiphy"; | |
| reg = <0xfda0b000 0x200 0xfda00038 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupts = <0x0 0x4f 0x0>; | |
| interrupt-names = "csiphy"; | |
| }; | |
| qcom,csiphy@fda0b400 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,csiphy"; | |
| reg = <0xfda0b400 0x200 0xfda00040 0x4>; | |
| reg-names = "csiphy", "csiphy_clk_mux"; | |
| interrupts = <0x0 0x50 0x0>; | |
| interrupt-names = "csiphy"; | |
| }; | |
| qcom,csid@fda08000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,csid"; | |
| reg = <0xfda08000 0x100>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x33 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| }; | |
| qcom,csid@fda08400 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,csid"; | |
| reg = <0xfda08400 0x100>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x34 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| }; | |
| qcom,csid@fda08800 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,csid"; | |
| reg = <0xfda08800 0x100>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x35 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| }; | |
| qcom,csid@fda08C00 { | |
| cell-index = <0x3>; | |
| compatible = "qcom,csid"; | |
| reg = <0xfda08c00 0x100>; | |
| reg-names = "csid"; | |
| interrupts = <0x0 0x36 0x0>; | |
| interrupt-names = "csid"; | |
| qcom,csi-vdd-voltage = <0x1b7740>; | |
| qcom,mipi-csi-vdd-supply = <0x2>; | |
| }; | |
| qcom,ispif@fda0A000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,ispif-v3.0", "qcom,ispif"; | |
| reg = <0xfda0a000 0x500 0xfda00020 0x10>; | |
| reg-names = "ispif", "csi_clk_mux"; | |
| interrupts = <0x0 0x37 0x0>; | |
| interrupt-names = "ispif"; | |
| qcom,num-isps = <0x2>; | |
| }; | |
| qcom,vfe@fda10000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0xfda10000 0x1000 0xfda40000 0x200 0xfd4a8000 0x4>; | |
| reg-names = "vfe", "vfe_vbif", "tcsr"; | |
| interrupts = <0x0 0x39 0x0>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x3>; | |
| }; | |
| qcom,vfe@fda14000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,vfe40"; | |
| reg = <0xfda14000 0x1000 0xfda40000 0x200 0xfd4a8000 0x4>; | |
| reg-names = "vfe", "vfe_vbif", "tcsr"; | |
| interrupts = <0x0 0x3a 0x0>; | |
| interrupt-names = "vfe"; | |
| vdd-supply = <0x3>; | |
| }; | |
| qcom,jpeg@fda1c000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0xfda1c000 0x400>; | |
| reg-names = "jpeg"; | |
| interrupts = <0x0 0x3b 0x0>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| }; | |
| qcom,jpeg@fda20000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0xfda20000 0x400>; | |
| reg-names = "jpeg"; | |
| interrupts = <0x0 0x3c 0x0>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| }; | |
| qcom,jpeg@fda24000 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,jpeg"; | |
| reg = <0xfda24000 0x400>; | |
| reg-names = "jpeg"; | |
| interrupts = <0x0 0x3d 0x0>; | |
| interrupt-names = "jpeg"; | |
| vdd-supply = <0x4>; | |
| }; | |
| qcom,irqrouter@fda00000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,irqrouter"; | |
| reg = <0xfda00000 0x100>; | |
| reg-names = "irqrouter"; | |
| }; | |
| qcom,cpp@fda04000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,cpp"; | |
| reg = <0xfda04000 0x100 0xfda40000 0x200 0xfda18000 0x18>; | |
| reg-names = "cpp", "cpp_vbif", "cpp_hw"; | |
| interrupts = <0x0 0x31 0x0>; | |
| interrupt-names = "cpp"; | |
| vdd-supply = <0x3>; | |
| }; | |
| qcom,camera-led-flash { | |
| cell-index = <0x0>; | |
| compatible = "qcom,camera-led-flash"; | |
| qcom,flash-type = <0x1>; | |
| linux,phandle = <0x6>; | |
| phandle = <0x6>; | |
| }; | |
| qcom,cci@fda0C000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,cci"; | |
| reg = <0xfda0c000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "cci"; | |
| interrupts = <0x0 0x32 0x0>; | |
| interrupt-names = "cci"; | |
| gpios = <0x5 0x13 0x0 0x5 0x14 0x0 0x5 0x15 0x0 0x5 0x16 0x0>; | |
| qcom,gpio-tbl-num = <0x0 0x1 0x2 0x3>; | |
| qcom,gpio-tbl-flags = <0x1 0x1 0x1 0x1>; | |
| qcom,gpio-tbl-label = "CCI_I2C_DATA0", "CCI_I2C_CLK0", "CCI_I2C_DATA1", "CCI_I2C_CLK1"; | |
| qcom,hw-thigh = <0x14>; | |
| qcom,hw-tlow = <0x1c>; | |
| qcom,hw-tsu-sto = <0x6>; | |
| qcom,hw-tsu-sta = <0x7>; | |
| qcom,hw-thd-dat = <0xd>; | |
| qcom,hw-thd-sta = <0xb>; | |
| qcom,hw-tbuf = <0x19>; | |
| qcom,hw-scl-stretch-en = <0x0>; | |
| qcom,hw-trdhld = <0x6>; | |
| qcom,hw-tsp = <0x3>; | |
| qcom,companion@1 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,companion"; | |
| reg = <0x1>; | |
| qcom,slave-id = <0x7a 0x0 0x73c1>; | |
| qcom,cci-master = <0x0>; | |
| status = "ok"; | |
| linux,phandle = <0xe>; | |
| phandle = <0xe>; | |
| }; | |
| qcom,camera@5a { | |
| compatible = "qcom,s5k2p2xx"; | |
| reg = <0x5a>; | |
| qcom,slave-id = <0x5a 0x0 0x2102>; | |
| qcom,csiphy-sd-index = <0x0>; | |
| qcom,csid-sd-index = <0x0>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,sensor-name = "s5k2p2xx"; | |
| qcom,led-flash-src = <0x6>; | |
| qcom,actuator-src = <0x7>; | |
| qcom,eeprom-src = <0x8>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vaf-supply = <0xa>; | |
| qcom,cam-vreg-name = "cam_vdig", "max77826_ldo8", "cam_vaf", "max77826_ldo11", "max77826_ldo2", "max77826_ldo9"; | |
| qcom,cam-vreg-type = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980 0x2d0370 0xf4240 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980 0x2d0370 0xf4240 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x1388 0xc350 0xc350 0xc350 0xc350>; | |
| qcom,gpio-no-mux = <0x0>; | |
| gpios = <0x5 0xf 0x0 0xb 0x12 0x1 0xc 0x2 0x0 0xc 0x5 0x0 0xc 0x7 0x0 0xb 0xd 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-comp = <0x2>; | |
| qcom,gpio-comprstn = <0x3>; | |
| qcom,gpio-ext-torch-en = <0x4>; | |
| qcom,gpio-ext-flash-en = <0x5>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2 0x3 0x4 0x5>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_COMP_GPIO", "CAM_COMPRSTN_GPIO", "CAM_TORCH_EN", "CAM_FLASH_EN"; | |
| qcom,gpio-set-tbl-num = <0x1 0x1>; | |
| qcom,gpio-set-tbl-flags = <0x0 0x1>; | |
| qcom,gpio-set-tbl-delay = <0x3e8 0x7530>; | |
| qcom,csi-lane-assign = <0x4320>; | |
| qcom,csi-lane-mask = <0x1f>; | |
| qcom,sensor-position = <0x0>; | |
| qcom,sensor-mode = <0x0>; | |
| qcom,sensor-type = <0x0>; | |
| qcom,cci-master = <0x0>; | |
| status = "ok"; | |
| }; | |
| qcom,camera@0 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,camera"; | |
| reg = <0x0>; | |
| qcom,csiphy-sd-index = <0x0>; | |
| qcom,csid-sd-index = <0x0>; | |
| qcom,mount-angle = <0x5a>; | |
| qcom,actuator-src = <0x7>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vaf-supply = <0xa>; | |
| qcom,led-flash-src = <0x6>; | |
| qcom,eeprom-src = <0x8>; | |
| qcom,companion-src = <0xd 0xe>; | |
| qcom,cam-vreg-name = "cam_vdig", "max77826_ldo8", "cam_vaf", "max77826_ldo11", "max77826_ldo2", "max77826_ldo9"; | |
| qcom,cam-vreg-type = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x2ab980 0x2d0370 0xf4240 0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x2ab980 0x2d0370 0xf4240 0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x1388 0xc350 0xc350 0xc350 0xc350>; | |
| qcom,gpio-no-mux = <0x0>; | |
| gpios = <0x5 0xf 0x0 0xb 0x12 0x1 0xc 0x2 0x0 0xc 0x5 0x0 0xc 0x7 0x0 0xb 0xd 0x0>; | |
| qcom,gpio-reset = <0x1>; | |
| qcom,gpio-comp = <0x2>; | |
| qcom,gpio-comprstn = <0x3>; | |
| qcom,gpio-ext-torch-en = <0x4>; | |
| qcom,gpio-ext-flash-en = <0x5>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2 0x3 0x4 0x5>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAMIF_MCLK", "CAM_RESET1", "CAM_COMP_GPIO", "CAM_COMPRSTN_GPIO", "CAM_TORCH_EN", "CAM_FLASH_EN"; | |
| qcom,gpio-set-tbl-delay = <0x3e8 0x7530>; | |
| qcom,gpio-comp-spi-irq = <0x1c>; | |
| qcom,cci-master = <0x0>; | |
| status = "ok"; | |
| }; | |
| qcom,camera@2 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,camera"; | |
| reg = <0x2>; | |
| qcom,csiphy-sd-index = <0x2>; | |
| qcom,csid-sd-index = <0x2>; | |
| qcom,mount-angle = <0x10e>; | |
| cam_vaf-supply = <0xa>; | |
| qcom,cam-vreg-name = "max77826_ldo1", "max77826_ldo5", "cam_vaf", "max77826_ldo10"; | |
| qcom,cam-vreg-type = <0x0 0x0 0x1 0x0>; | |
| qcom,cam-vreg-min-voltage = <0x124f80 0x1b7740 0x0 0x2ab980>; | |
| qcom,cam-vreg-max-voltage = <0x124f80 0x1b7740 0x0 0x2ab980>; | |
| qcom,cam-vreg-op-mode = <0x30d40 0x30d40 0x0 0xc350>; | |
| qcom,gpio-no-mux = <0x0>; | |
| gpios = <0x5 0x11 0x0 0xf 0x6 0x0 0xf 0xe 0x0>; | |
| qcom,gpio-vt-reset = <0x1>; | |
| qcom,gpio-vt-standby = <0x2>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1 0x2>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x0 0x0>; | |
| qcom,gpio-req-tbl-label = "CAM_VT_MCLK", "CAM_VT_RESET", "CAM_VT_STNBY"; | |
| qcom,gpio-set-tbl-delay = <0x3e8 0x3e8 0x7530>; | |
| qcom,cci-master = <0x1>; | |
| status = "ok"; | |
| }; | |
| qcom,camera@6e { | |
| qcom,vdd-cx-supply = <0x10>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vana-supply = <0xa>; | |
| cam_vaf-supply = <0x11>; | |
| }; | |
| qcom,camera@20 { | |
| qcom,vdd-cx-supply = <0x10>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vana-supply = <0xa>; | |
| cam_vaf-supply = <0x11>; | |
| }; | |
| qcom,camera@6c { | |
| qcom,vdd-cx-supply = <0x10>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vana-supply = <0xa>; | |
| }; | |
| qcom,camera@90 { | |
| qcom,vdd-cx-supply = <0x10>; | |
| cam_vdig-supply = <0x9>; | |
| cam_vana-supply = <0xa>; | |
| }; | |
| }; | |
| tmc@fc322000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0xfc322000 0x1000 0xfc37c000 0x3000>; | |
| reg-names = "tmc-base", "bam-base"; | |
| interrupts = <0x0 0xa6 0x0>; | |
| interrupt-names = "byte-cntr-irq"; | |
| qcom,memory-size = <0x100000>; | |
| coresight-id = <0x0>; | |
| coresight-name = "coresight-tmc-etr"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-ctis = <0x12 0x13>; | |
| linux,phandle = <0x16>; | |
| phandle = <0x16>; | |
| }; | |
| tpiu@fc318000 { | |
| compatible = "arm,coresight-tpiu"; | |
| reg = <0xfc318000 0x1000>; | |
| reg-names = "tpiu-base"; | |
| coresight-id = <0x1>; | |
| coresight-name = "coresight-tpiu"; | |
| coresight-nr-inports = <0x1>; | |
| vdd-supply = <0x14>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| qcom,vdd-io-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| vdd-io-supply = <0x15>; | |
| linux,phandle = <0x17>; | |
| phandle = <0x17>; | |
| }; | |
| replicator@fc31c000 { | |
| compatible = "qcom,coresight-replicator"; | |
| reg = <0xfc31c000 0x1000>; | |
| reg-names = "replicator-base"; | |
| coresight-id = <0x2>; | |
| coresight-name = "coresight-replicator"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-outports = <0x0 0x1>; | |
| coresight-child-list = <0x16 0x17>; | |
| coresight-child-ports = <0x0 0x0>; | |
| linux,phandle = <0x18>; | |
| phandle = <0x18>; | |
| }; | |
| tmc@fc307000 { | |
| compatible = "arm,coresight-tmc"; | |
| reg = <0xfc307000 0x1000>; | |
| reg-names = "tmc-base"; | |
| coresight-id = <0x3>; | |
| coresight-name = "coresight-tmc-etf"; | |
| coresight-nr-inports = <0x1>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x18>; | |
| coresight-child-ports = <0x0>; | |
| coresight-default-sink; | |
| coresight-ctis = <0x12 0x13>; | |
| linux,phandle = <0x19>; | |
| phandle = <0x19>; | |
| }; | |
| funnel@fc31b000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0xfc31b000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x4>; | |
| coresight-name = "coresight-funnel-merg"; | |
| coresight-nr-inports = <0x2>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x19>; | |
| coresight-child-ports = <0x0>; | |
| linux,phandle = <0x1a>; | |
| phandle = <0x1a>; | |
| }; | |
| funnel@fc319000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0xfc319000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x5>; | |
| coresight-name = "coresight-funnel-in0"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1a>; | |
| coresight-child-ports = <0x0>; | |
| linux,phandle = <0x1d>; | |
| phandle = <0x1d>; | |
| }; | |
| funnel@fc31a000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0xfc31a000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x6>; | |
| coresight-name = "coresight-funnel-in1"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1a>; | |
| coresight-child-ports = <0x1>; | |
| linux,phandle = <0x1b>; | |
| phandle = <0x1b>; | |
| }; | |
| funnel@fc345000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0xfc345000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x7>; | |
| coresight-name = "coresight-funnel-kpss"; | |
| coresight-nr-inports = <0x4>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1b>; | |
| coresight-child-ports = <0x5>; | |
| linux,phandle = <0x1c>; | |
| phandle = <0x1c>; | |
| }; | |
| funnel@fc364000 { | |
| compatible = "arm,coresight-funnel"; | |
| reg = <0xfc364000 0x1000>; | |
| reg-names = "funnel-base"; | |
| coresight-id = <0x8>; | |
| coresight-name = "coresight-funnel-mmss"; | |
| coresight-nr-inports = <0x8>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1b>; | |
| coresight-child-ports = <0x1>; | |
| linux,phandle = <0x25>; | |
| phandle = <0x25>; | |
| }; | |
| stm@fc321000 { | |
| compatible = "arm,coresight-stm"; | |
| reg = <0xfc321000 0x1000 0xfa280000 0x180000>; | |
| reg-names = "stm-base", "stm-data-base"; | |
| coresight-id = <0x9>; | |
| coresight-name = "coresight-stm"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1b>; | |
| coresight-child-ports = <0x7>; | |
| }; | |
| etm@fc33c000 { | |
| compatible = "arm,coresight-etm"; | |
| reg = <0xfc33c000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xa>; | |
| coresight-name = "coresight-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1c>; | |
| coresight-child-ports = <0x0>; | |
| qcom,pc-save; | |
| qcom,round-robin; | |
| }; | |
| etm@fc33d000 { | |
| compatible = "arm,coresight-etm"; | |
| reg = <0xfc33d000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xb>; | |
| coresight-name = "coresight-etm1"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1c>; | |
| coresight-child-ports = <0x1>; | |
| qcom,pc-save; | |
| qcom,round-robin; | |
| }; | |
| etm@fc33e000 { | |
| compatible = "arm,coresight-etm"; | |
| reg = <0xfc33e000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xc>; | |
| coresight-name = "coresight-etm2"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1c>; | |
| coresight-child-ports = <0x2>; | |
| qcom,pc-save; | |
| qcom,round-robin; | |
| }; | |
| etm@fc33f000 { | |
| compatible = "arm,coresight-etm"; | |
| reg = <0xfc33f000 0x1000>; | |
| reg-names = "etm-base"; | |
| coresight-id = <0xd>; | |
| coresight-name = "coresight-etm3"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1c>; | |
| coresight-child-ports = <0x3>; | |
| qcom,pc-save; | |
| qcom,round-robin; | |
| }; | |
| audio_etm0 { | |
| compatible = "qcom,coresight-audio-etm"; | |
| coresight-id = <0xe>; | |
| coresight-name = "coresight-audio-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x2>; | |
| }; | |
| modem_etm0 { | |
| compatible = "qcom,coresight-modem-etm"; | |
| coresight-id = <0xf>; | |
| coresight-name = "coresight-modem-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x1>; | |
| }; | |
| wcn_etm0 { | |
| compatible = "qcom,coresight-wcn-etm"; | |
| coresight-id = <0x10>; | |
| coresight-name = "coresight-wcn-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1b>; | |
| coresight-child-ports = <0x2>; | |
| }; | |
| rpm_etm0 { | |
| compatible = "qcom,coresight-rpm-etm"; | |
| coresight-id = <0x11>; | |
| coresight-name = "coresight-rpm-etm0"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x0>; | |
| }; | |
| csr@fc302000 { | |
| compatible = "qcom,coresight-csr"; | |
| reg = <0xfc302000 0x1000>; | |
| reg-names = "csr-base"; | |
| coresight-id = <0x12>; | |
| coresight-name = "coresight-csr"; | |
| coresight-nr-inports = <0x0>; | |
| qcom,blk-size = <0x3>; | |
| }; | |
| cti@fc308000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc308000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x13>; | |
| coresight-name = "coresight-cti0"; | |
| coresight-nr-inports = <0x0>; | |
| linux,phandle = <0x12>; | |
| phandle = <0x12>; | |
| }; | |
| cti@fc309000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc309000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x14>; | |
| coresight-name = "coresight-cti1"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30a000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30a000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x15>; | |
| coresight-name = "coresight-cti2"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30b000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30b000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x16>; | |
| coresight-name = "coresight-cti3"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30c000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30c000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x17>; | |
| coresight-name = "coresight-cti4"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30d000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30d000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x18>; | |
| coresight-name = "coresight-cti5"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30e000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30e000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x19>; | |
| coresight-name = "coresight-cti6"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc30f000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc30f000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1a>; | |
| coresight-name = "coresight-cti7"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc310000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc310000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1b>; | |
| coresight-name = "coresight-cti8"; | |
| coresight-nr-inports = <0x0>; | |
| linux,phandle = <0x13>; | |
| phandle = <0x13>; | |
| }; | |
| cti@fc340000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc340000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1c>; | |
| coresight-name = "coresight-cti-l2"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc341000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc341000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1d>; | |
| coresight-name = "coresight-cti-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc342000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc342000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1e>; | |
| coresight-name = "coresight-cti-cpu1"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc343000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc343000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x1f>; | |
| coresight-name = "coresight-cti-cpu2"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc344000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc344000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x20>; | |
| coresight-name = "coresight-cti-cpu3"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc348000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc348000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x21>; | |
| coresight-name = "coresight-cti-video-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc34d000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc34d000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x22>; | |
| coresight-name = "coresight-cti-wcn-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc350000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc350000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x23>; | |
| coresight-name = "coresight-cti-modem-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc354000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc354000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x24>; | |
| coresight-name = "coresight-cti-audio-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| cti@fc358000 { | |
| compatible = "arm,coresight-cti"; | |
| reg = <0xfc358000 0x1000>; | |
| reg-names = "cti-base"; | |
| coresight-id = <0x25>; | |
| coresight-name = "coresight-cti-rpm-cpu0"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| hwevent@fdf30018 { | |
| compatible = "qcom,coresight-hwevent"; | |
| reg = <0xfdf30018 0x80 0xf9011080 0x80 0xfd4ab160 0x80 0xfc401600 0x80>; | |
| reg-names = "mmss-mux", "apcs-mux", "ppss-mux", "gcc-mux"; | |
| coresight-id = <0x26>; | |
| coresight-name = "coresight-hwevent"; | |
| coresight-nr-inports = <0x0>; | |
| qcom,hwevent-clks = "core_mmss_clk"; | |
| }; | |
| fuse@fc4be024 { | |
| compatible = "arm,coresight-fuse"; | |
| reg = <0xfc4be024 0x8>; | |
| reg-names = "fuse-base"; | |
| coresight-id = <0x27>; | |
| coresight-name = "coresight-fuse"; | |
| coresight-nr-inports = <0x0>; | |
| }; | |
| qcom,gdsc@fd8c1024 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus"; | |
| reg = <0xfd8c1024 0x4>; | |
| status = "ok"; | |
| qcom,clock-names = "core_clk"; | |
| qcom,skip-logic-collapse; | |
| linux,phandle = <0x44>; | |
| phandle = <0x44>; | |
| }; | |
| qcom,gdsc@fd8c1040 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core0"; | |
| reg = <0xfd8c1040 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fd8c1044 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_venus_core1"; | |
| reg = <0xfd8c1044 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fd8c1404 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vpu"; | |
| reg = <0xfd8c1404 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fd8c2304 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_mdss"; | |
| reg = <0xfd8c2304 0x4>; | |
| status = "ok"; | |
| qcom,clock-names = "core_clk", "lut_clk"; | |
| linux,phandle = <0x26>; | |
| phandle = <0x26>; | |
| }; | |
| qcom,gdsc@fd8c35a4 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_jpeg"; | |
| reg = <0xfd8c35a4 0x4>; | |
| status = "ok"; | |
| qcom,clock-names = "core0_clk", "core1_clk", "core2_clk"; | |
| linux,phandle = <0x4>; | |
| phandle = <0x4>; | |
| }; | |
| qcom,gdsc@fd8c36a4 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vfe"; | |
| reg = <0xfd8c36a4 0x4>; | |
| status = "ok"; | |
| qcom,clock-names = "core0_clk", "core1_clk", "csi0_clk", "csi1_clk", "cpp_clk"; | |
| linux,phandle = <0x3>; | |
| phandle = <0x3>; | |
| }; | |
| qcom,gdsc@fd8c4024 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_gx"; | |
| reg = <0xfd8c4024 0x4>; | |
| status = "ok"; | |
| parent-supply = <0x1e>; | |
| qcom,clock-names = "core_clk"; | |
| linux,phandle = <0x23>; | |
| phandle = <0x23>; | |
| }; | |
| qcom,gdsc@fd8c4034 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_oxili_cx"; | |
| reg = <0xfd8c4034 0x4>; | |
| status = "ok"; | |
| linux,phandle = <0x22>; | |
| phandle = <0x22>; | |
| }; | |
| qcom,gdsc@fc400404 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb_hsic"; | |
| reg = <0xfc400404 0x4>; | |
| status = "ok"; | |
| }; | |
| qcom,gdsc@fc401ac4 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_pcie_0"; | |
| reg = <0xfc401ac4 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fc401b44 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_pcie_1"; | |
| reg = <0xfc401b44 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fc401e84 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30"; | |
| reg = <0xfc401e84 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fc401ec0 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_usb30_sec"; | |
| reg = <0xfc401ec0 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,gdsc@fd8c1804 { | |
| compatible = "qcom,gdsc"; | |
| regulator-name = "gdsc_vcap"; | |
| reg = <0xfd8c1804 0x4>; | |
| status = "disabled"; | |
| }; | |
| qcom,ion { | |
| compatible = "qcom,msm-ion"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| qcom,ion-heap@20 { | |
| reg = <0x14>; | |
| qcom,ion-heap-type = "IOMMUCA"; | |
| }; | |
| qcom,ion-heap@25 { | |
| reg = <0x19>; | |
| qcom,ion-heap-type = "SYSTEM"; | |
| }; | |
| qcom,ion-heap@21 { | |
| reg = <0x15>; | |
| qcom,ion-heap-type = "SYSTEM_CONTIG"; | |
| }; | |
| qcom,ion-heap@8 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x8>; | |
| qcom,heap-align = <0x1000>; | |
| linux,contiguous-region = <0x1f>; | |
| qcom,ion-heap-type = "SECURE_DMA"; | |
| qcom,default-prefetch-size = <0x6c00000>; | |
| }; | |
| qcom,ion-heap@22 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x16>; | |
| qcom,heap-align = <0x1000>; | |
| linux,contiguous-region = <0x20>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| qcom,ion-heap@27 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x1b>; | |
| linux,contiguous-region = <0x21>; | |
| qcom,ion-heap-type = "DMA"; | |
| }; | |
| qcom,ion-heap@28 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x1c>; | |
| qcom,heap-align = <0x1000>; | |
| qcom,memory-reservation-type = "EBI1"; | |
| qcom,memory-reservation-size = <0x614000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| }; | |
| qcom,ion-heap@23 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x17>; | |
| qcom,heap-align = <0x1000>; | |
| qcom,memory-fixed = <0x4d00000 0x1d00000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| }; | |
| qcom,ion-heap@26 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x1a>; | |
| qcom,heap-align = <0x1000>; | |
| qcom,memory-fixed = <0x8000000 0x5100000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| }; | |
| qcom,ion-heap@30 { | |
| compatible = "qcom,msm-ion-reserve"; | |
| reg = <0x1e>; | |
| qcom,heap-align = <0x1000>; | |
| qcom,memory-reservation-type = "EBI1"; | |
| qcom,memory-reservation-size = <0x9600000>; | |
| qcom,ion-heap-type = "CARVEOUT"; | |
| }; | |
| }; | |
| qcom,kgsl-3d0@fdb00000 { | |
| label = "kgsl-3d0"; | |
| compatible = "qcom,kgsl-3d0", "qcom,kgsl-3d"; | |
| reg = <0xfdb00000 0x10000 0xfdb20000 0x10000>; | |
| reg-names = "kgsl_3d0_reg_memory", "kgsl_3d0_shader_memory"; | |
| interrupts = <0x0 0x21 0x0>; | |
| interrupt-names = "kgsl_3d0_irq"; | |
| qcom,id = <0x0>; | |
| qcom,chipid = <0x3030002>; | |
| qcom,initial-pwrlevel = <0x4>; | |
| qcom,idle-timeout = <0x8>; | |
| qcom,strtstp-sleepwake; | |
| qcom,clk-map = <0x6>; | |
| qcom,msm-bus,name = "grp3d"; | |
| qcom,msm-bus,num-cases = <0xf>; | |
| qcom,msm-bus,num-paths = <0x2>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x59 0x25c 0x0 0x0 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x30d400 0x1a 0x200 0x124f80 0x2579c0 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x509100 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x71e440 0x59 0x25c 0x0 0x5ef880 0x1a 0x200 0x0 0x382700 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x71e440 0x59 0x25c 0x0 0x70e270 0x1a 0x200 0x0 0x4af380 0x59 0x25c 0x0 0x8d1d00 0x1a 0x200 0x0 0x71e440 0x59 0x25c 0x0 0x8d1d00>; | |
| vddcx-supply = <0x22>; | |
| vdd-supply = <0x23>; | |
| iommu = <0x24>; | |
| coresight-id = <0x43>; | |
| coresight-name = "coresight-gfx"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x25>; | |
| coresight-child-ports = <0x7>; | |
| qcom,bus-control; | |
| qcom,gpu-pwrlevels { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,gpu-pwrlevels"; | |
| qcom,gpu-pwrlevel@0 { | |
| reg = <0x0>; | |
| qcom,gpu-freq = <0x22739480>; | |
| qcom,bus-freq = <0xe>; | |
| qcom,io-fraction = <0x21>; | |
| }; | |
| qcom,gpu-pwrlevel@1 { | |
| reg = <0x1>; | |
| qcom,gpu-freq = <0x1b8faa00>; | |
| qcom,bus-freq = <0xb>; | |
| qcom,io-fraction = <0x42>; | |
| }; | |
| qcom,gpu-pwrlevel@2 { | |
| reg = <0x2>; | |
| qcom,gpu-freq = <0x172fab40>; | |
| qcom,bus-freq = <0x8>; | |
| qcom,io-fraction = <0x42>; | |
| }; | |
| qcom,gpu-pwrlevel@3 { | |
| reg = <0x3>; | |
| qcom,gpu-freq = <0x1312d000>; | |
| qcom,bus-freq = <0x5>; | |
| qcom,io-fraction = <0x64>; | |
| }; | |
| qcom,gpu-pwrlevel@4 { | |
| reg = <0x4>; | |
| qcom,gpu-freq = <0xfdad680>; | |
| qcom,bus-freq = <0x2>; | |
| qcom,io-fraction = <0x64>; | |
| }; | |
| qcom,gpu-pwrlevel@5 { | |
| reg = <0x5>; | |
| qcom,gpu-freq = <0xbebc200>; | |
| qcom,bus-freq = <0x2>; | |
| qcom,io-fraction = <0x64>; | |
| }; | |
| qcom,gpu-pwrlevel@6 { | |
| reg = <0x6>; | |
| qcom,gpu-freq = <0x19bfcc0>; | |
| qcom,bus-freq = <0x0>; | |
| qcom,io-fraction = <0x0>; | |
| }; | |
| }; | |
| qcom,dcvs-core-info { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| compatible = "qcom,dcvs-core-info"; | |
| qcom,num-cores = <0x1>; | |
| qcom,sensors = <0x0>; | |
| qcom,core-core-type = <0x1>; | |
| qcom,algo-disable-pc-threshold = <0x0>; | |
| qcom,algo-em-win-size-min-us = <0x186a0>; | |
| qcom,algo-em-win-size-max-us = <0x493e0>; | |
| qcom,algo-em-max-util-pct = <0x61>; | |
| qcom,algo-group-id = <0x5f>; | |
| qcom,algo-max-freq-chg-time-us = <0x186a0>; | |
| qcom,algo-slack-mode-dynamic = <0x186a0>; | |
| qcom,algo-slack-weight-thresh-pct = <0x0>; | |
| qcom,algo-slack-time-min-us = <0x9858>; | |
| qcom,algo-slack-time-max-us = <0x9858>; | |
| qcom,algo-ss-win-size-min-us = <0xf4240>; | |
| qcom,algo-ss-win-size-max-us = <0xf4240>; | |
| qcom,algo-ss-util-pct = <0x5f>; | |
| qcom,algo-ss-no-corr-below-freq = <0x0>; | |
| qcom,energy-active-coeff-a = <0x9bc>; | |
| qcom,energy-active-coeff-b = <0x0>; | |
| qcom,energy-active-coeff-c = <0x0>; | |
| qcom,energy-leakage-coeff-a = <0xb>; | |
| qcom,energy-leakage-coeff-b = <0x265de>; | |
| qcom,energy-leakage-coeff-c = <0x0>; | |
| qcom,energy-leakage-coeff-d = <0x0>; | |
| qcom,power-current-temp = <0x19>; | |
| qcom,power-num-freq = <0x4>; | |
| qcom,dcvs-freq@0 { | |
| reg = <0x0>; | |
| qcom,freq = <0x0>; | |
| qcom,voltage = <0x0>; | |
| qcom,is_trans_level = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| }; | |
| qcom,dcvs-freq@1 { | |
| reg = <0x1>; | |
| qcom,freq = <0x0>; | |
| qcom,voltage = <0x0>; | |
| qcom,is_trans_level = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| }; | |
| qcom,dcvs-freq@2 { | |
| reg = <0x2>; | |
| qcom,freq = <0x0>; | |
| qcom,voltage = <0x0>; | |
| qcom,is_trans_level = <0x0>; | |
| qcom,active-energy-offset = <0x64>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| }; | |
| qcom,dcvs-freq@3 { | |
| reg = <0x3>; | |
| qcom,freq = <0x0>; | |
| qcom,voltage = <0x0>; | |
| qcom,is_trans_level = <0x0>; | |
| qcom,active-energy-offset = <0xce301>; | |
| qcom,leakage-energy-offset = <0x0>; | |
| }; | |
| }; | |
| }; | |
| qcom,mdss_mdp@fd900000 { | |
| compatible = "qcom,mdss_mdp"; | |
| reg = <0xfd900000 0x22100 0xfd924000 0x1000>; | |
| reg-names = "mdp_phys", "vbif_phys"; | |
| interrupts = <0x0 0x48 0x0>; | |
| vdd-supply = <0x26>; | |
| qcom,max-bandwidth-low-kbps = <0x29f630>; | |
| qcom,max-bandwidth-high-kbps = <0x2dc6c0>; | |
| qcom,msm-bus,name = "mdss_mdp"; | |
| qcom,msm-bus,num-cases = <0x3>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x61a800 0x16 0x200 0x0 0x61a800>; | |
| qcom,mdss-ab-factor = <0x2 0x1>; | |
| qcom,mdss-ib-factor = <0x6 0x5>; | |
| qcom,mdss-clk-factor = <0x5 0x4>; | |
| qcom,mdss-ib-factor-overlap = <0x7 0x4>; | |
| qcom,max-clk-rate = <0x1312d000>; | |
| qcom,mdss-pipe-vig-off = <0x1200 0x1600 0x1a00>; | |
| qcom,mdss-pipe-rgb-off = <0x1e00 0x2200 0x2600>; | |
| qcom,mdss-pipe-dma-off = <0x2a00 0x2e00>; | |
| qcom,mdss-pipe-vig-fetch-id = <0x1 0x4 0x7>; | |
| qcom,mdss-pipe-rgb-fetch-id = <0x10 0x11 0x12>; | |
| qcom,mdss-pipe-dma-fetch-id = <0xa 0xd>; | |
| qcom,mdss-pipe-vig-xin-id = <0x0 0x4 0x8>; | |
| qcom,mdss-pipe-rgb-xin-id = <0x1 0x5 0x9>; | |
| qcom,mdss-pipe-dma-xin-id = <0x2 0xa>; | |
| qcom,mdss-pipe-vig-clk-ctrl-offsets = <0x3ac 0x0 0x0 0x3b4 0x0 0x0 0x3bc 0x0 0x0>; | |
| qcom,mdss-pipe-rgb-clk-ctrl-offsets = <0x3ac 0x4 0x8 0x3b4 0x4 0x8 0x3bc 0x4 0x8>; | |
| qcom,mdss-pipe-dma-clk-ctrl-offsets = <0x3ac 0x8 0xc 0x3b4 0x8 0xc>; | |
| qcom,mdss-smp-data = <0x16 0x1000>; | |
| qcom,mdss-ctl-off = <0x600 0x700 0x800 0x900 0xa00>; | |
| qcom,mdss-mixer-intf-off = <0x3200 0x3600 0x3a00>; | |
| qcom,mdss-mixer-wb-off = <0x3e00 0x4200>; | |
| qcom,mdss-dspp-off = <0x4600 0x4a00 0x4e00>; | |
| qcom,mdss-wb-off = <0x11100 0x11500 0x11900 0x11d00 0x12100>; | |
| qcom,mdss-intf-off = <0x12500 0x12700 0x12900 0x12b00>; | |
| qcom,mdss-has-wfd-blk; | |
| qcom,vbif-settings = <0x4 0x1>; | |
| qcom,mdp-settings = <0x2e0 0xe9 0x2e4 0x55 0x3ac 0xc0000ccc 0x3b4 0xc0000ccc 0x3bc 0xcccccc 0x4a8 0xcccc0c0 0x4b0 0xccccc0c0 0x4b8 0xccccc000>; | |
| qcom,mdss-prefill-outstanding-buffer-bytes = <0x400>; | |
| qcom,mdss-prefill-y-buffer-bytes = <0x1000>; | |
| qcom,mdss-prefill-scaler-buffer-lines-bilinear = <0x2>; | |
| qcom,mdss-prefill-scaler-buffer-lines-caf = <0x4>; | |
| qcom,mdss-prefill-post-scaler-buffer-pixels = <0x0>; | |
| qcom,mdss-prefill-pingpong-buffer-pixels = <0x1000>; | |
| qcom,mdss-prefill-fbc-lines = <0x2>; | |
| qcom,mdss-pingpong-off = <0x12d00 0x12e00 0x12f00>; | |
| qcom,mdss-has-decimation; | |
| vdd-cx-supply = <0x27>; | |
| qcom,mdss-pref-prim-intf = "dsi"; | |
| linux,phandle = <0x2d>; | |
| phandle = <0x2d>; | |
| qcom,mdss_fb_primary { | |
| cell-index = <0x0>; | |
| compatible = "qcom,mdss-fb"; | |
| qcom,memory-reservation-type = "EBI1"; | |
| qcom,memory-reservation-size = <0x0>; | |
| qcom,memory-alt-reservation-size = <0x1f00000>; | |
| qcom,memblock-reserve = <0x3200000 0xf00000>; | |
| qcom,mdss-fb-split = <0x2d0 0x2d0>; | |
| linux,phandle = <0x2c>; | |
| phandle = <0x2c>; | |
| }; | |
| qcom,mdss_fb_external { | |
| cell-index = <0x1>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x33>; | |
| phandle = <0x33>; | |
| }; | |
| qcom,mdss_fb_wfd { | |
| cell-index = <0x2>; | |
| compatible = "qcom,mdss-fb"; | |
| linux,phandle = <0x37>; | |
| phandle = <0x37>; | |
| }; | |
| wqhd_cmd0 { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dual_dsi-panel"; | |
| label = "samsung amoled wqhd command mode dis0 S6E3HA0 panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| qcom,mdss-pan-broadcast-mode = <0x1>; | |
| qcom,mdss-pan-res = <0x2d0 0xa00>; | |
| qcom,mdss-pan-size = <0x41 0x73>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-clk-rate = <0x35866480>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-pan-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-wr-mem-start = <0x2c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x35866480>; | |
| qcom,mdss-pan-porch-values = <0x6c 0xf 0xd4 0x3 0x2 0xd>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x1c 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xfa4b4100 0x6681344b 0x410304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 05 ff 00 00 20 00 29 01 00 00 00 00 03 fc a5 a5 05 01 00 00 14 00 02 11 00 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 03 b6 88 04 29 01 00 00 00 00 15 b6 98 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 02 22 22 10 29 01 00 00 00 00 02 b5 41 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 35 00 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 04 bd 85 02 03 29 01 00 00 00 00 02 ff 02 29 01 00 00 00 00 03 fc a5 a5 29 01 00 00 78 00 05 c0 30 00 d8 d8 05 01 00 00 00 00 02 2c 00 05 01 00 00 00 00 02 3c 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| qcom,on-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-hsync-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 04 bd 85 02 0c 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-test-key-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-test-key-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-hbm-cmds = [06 01 00 00 00 00 01 c8 07 21]; | |
| samsung,panel-nv-mtp-read-hbm2-cmds = [06 01 00 00 00 00 01 c8 0f 48]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 14]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a>; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 c8 02 28]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 00 c8 03 20 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 32 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 32 00 02 28 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00 29 01 00 00 00 00 02 b6 8c]; | |
| samsung,panel-elvss-lowtemp2-cmds-list = [29 01 00 00 00 00 02 b0 14 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-gamma-hbm-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-etc-hbm-revB-cmds = <0x29010000 0x5b2 0x60006 0x29010000 0x17b6 0x88040000 0x3 0x55542000 0x6666c0c 0x76543210 0x2901 0x0 0x2550229 0x1000000 0x2f703>; | |
| samsung,panel-etc-hbm-revC-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 00 00 00 00 02 22 22 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-revE-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 08 88 8f 0f 01 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-revF-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 01 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-force-500cd-cmds = [29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-aid-cmds-revF-list = <0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9980006 0x29010000 0x5b2 0x9820006 0x29010000 0x5b2 0x96c0006 0x29010000 0x5b2 0x9580006 0x29010000 0x5b2 0x9420006 0x29010000 0x5b2 0x92e0006 0x29010000 0x5b2 0x9170006 0x29010000 0x5b2 0x9020006 0x29010000 0x5b2 0x8ec0006 0x29010000 0x5b2 0x8d40006 0x29010000 0x5b2 0x8bd0006 0x29010000 0x5b2 0x8a90006 0x29010000 0x5b2 0x8930006 0x29010000 0x5b2 0x8660006 0x29010000 0x5b2 0x8500006 0x29010000 0x5b2 0x83a0006 0x29010000 0x5b2 0x8240006 0x29010000 0x5b2 0x7f70006 0x29010000 0x5b2 0x7e10006 0x29010000 0x5b2 0x7980006 0x29010000 0x5b2 0x7810006 0x29010000 0x5b2 0x7690006 0x29010000 0x5b2 0x73b0006 0x29010000 0x5b2 0x70d0006 0x29010000 0x5b2 0x6c70006 0x29010000 0x5b2 0x69c0006 0x29010000 0x5b2 0x66d0006 0x29010000 0x5b2 0x6270006 0x29010000 0x5b2 0x5df0006 0x29010000 0x5b2 0x5970006 0x29010000 0x5b2 0x54c0006 0x29010000 0x5b2 0x5040006 0x29010000 0x5b2 0x4a40006 0x29010000 0x5b2 0x43d0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3f30006 0x29010000 0x5b2 0x3940006 0x29010000 0x5b2 0x3130006 0x29010000 0x5b2 0x2880006 0x29010000 0x5b2 0x1f50006 0x29010000 0x5b2 0x14f0006 0x29010000 0x5b2 0xa00006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-revF-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x25 0x4d 0x25 0x52 0x25 0x57 0x25 0x5d 0x25 0x62 0x25 0x69 0x25 0x6f 0x25 0x77 0x25 0x7e 0x25 0x86 0x25 0x8f 0x25 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aid-cmds-revE-list = <0x29010000 0x5b2 0x94f0006 0x29010000 0x5b2 0x9c70006 0x29010000 0x5b2 0x9b10006 0x29010000 0x5b2 0x99c0006 0x29010000 0x5b2 0x9840006 0x29010000 0x5b2 0x96e0006 0x29010000 0x5b2 0x9580006 0x29010000 0x5b2 0x9420006 0x29010000 0x5b2 0x92e0006 0x29010000 0x5b2 0x9170006 0x29010000 0x5b2 0x9020006 0x29010000 0x5b2 0x8ec0006 0x29010000 0x5b2 0x8d40006 0x29010000 0x5b2 0x8bd0006 0x29010000 0x5b2 0x8a90006 0x29010000 0x5b2 0x8930006 0x29010000 0x5b2 0x8660006 0x29010000 0x5b2 0x8500006 0x29010000 0x5b2 0x83a0006 0x29010000 0x5b2 0x8240006 0x29010000 0x5b2 0x7f70006 0x29010000 0x5b2 0x7e10006 0x29010000 0x5b2 0x7980006 0x29010000 0x5b2 0x7810006 0x29010000 0x5b2 0x7690006 0x29010000 0x5b2 0x73b0006 0x29010000 0x5b2 0x70d0006 0x29010000 0x5b2 0x6c70006 0x29010000 0x5b2 0x69c0006 0x29010000 0x5b2 0x66d0006 0x29010000 0x5b2 0x6270006 0x29010000 0x5b2 0x5df0006 0x29010000 0x5b2 0x5970006 0x29010000 0x5b2 0x54c0006 0x29010000 0x5b2 0x5040006 0x29010000 0x5b2 0x4a40006 0x29010000 0x5b2 0x43d0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3f30006 0x29010000 0x5b2 0x3940006 0x29010000 0x5b2 0x3130006 0x29010000 0x5b2 0x2880006 0x29010000 0x5b2 0x1f50006 0x29010000 0x5b2 0x14f0006 0x29010000 0x5b2 0xa00006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-revE-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x25 0x4d 0x25 0x52 0x25 0x57 0x25 0x5d 0x25 0x62 0x25 0x69 0x25 0x6f 0x25 0x77 0x25 0x7e 0x25 0x86 0x25 0x8f 0x25 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0x9d80006 0x29010000 0x5b2 0x9c10006 0x29010000 0x5b2 0x9ab0006 0x29010000 0x5b2 0x98c0006 0x29010000 0x5b2 0x9740006 0x29010000 0x5b2 0x95f0006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9300006 0x29010000 0x5b2 0x9140006 0x29010000 0x5b2 0x8fc0006 0x29010000 0x5b2 0x8e40006 0x29010000 0x5b2 0x8cb0006 0x29010000 0x5b2 0x8b30006 0x29010000 0x5b2 0x89b0006 0x29010000 0x5b2 0x8820006 0x29010000 0x5b2 0x86a0006 0x29010000 0x5b2 0x8390006 0x29010000 0x5b2 0x81e0006 0x29010000 0x5b2 0x8060006 0x29010000 0x5b2 0x7ed0006 0x29010000 0x5b2 0x7bb0006 0x29010000 0x5b2 0x7a20006 0x29010000 0x5b2 0x76a0006 0x29010000 0x5b2 0x73f0006 0x29010000 0x5b2 0x7320006 0x29010000 0x5b2 0x6f30006 0x29010000 0x5b2 0x6c00006 0x29010000 0x5b2 0x6790006 0x29010000 0x5b2 0x6450006 0x29010000 0x5b2 0x6110006 0x29010000 0x5b2 0x5c90006 0x29010000 0x5b2 0x57b0006 0x29010000 0x5b2 0x52b0006 0x29010000 0x5b2 0x4dc0006 0x29010000 0x5b2 0x4860006 0x29010000 0x5b2 0x41f0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3da0006 0x29010000 0x5b2 0x36c0006 0x29010000 0x5b2 0x30b0006 0x29010000 0x5b2 0x2970006 0x29010000 0x5b2 0x2120006 0x29010000 0x5b2 0x17b0006 0x29010000 0x5b2 0xe80006 0x29010000 0x5b2 0x3b0006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x24 0x48 0x24 0x4d 0x24 0x52 0x24 0x57 0x24 0x5d 0x24 0x62 0x24 0x69 0x24 0x6f 0x24 0x77 0x24 0x7e 0x24 0x86 0x24 0x8f 0x24 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 02 b5 51]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 00 00 02 b5 41 29 01 00 00 00 00 02 55 00]; | |
| samsung,panel-acl-map-table = <0x2 0x2 0x3 0x2 0x4 0x2 0x5 0x2 0x6 0x2 0x7 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xb 0x2 0xc 0x2 0xd 0x2 0xe 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x16 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 11 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 11 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x2 0x0 0x3 0x0 0x4 0x0 0x5 0x0 0x6 0x0 0x7 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x16 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x0 0x52 0x0 0x57 0x0 0x5d 0x0 0x62 0x0 0x69 0x0 0x6f 0x1 0x77 0x2 0x7e 0x3 0x86 0x4 0x8f 0x5 0x98 0x6 0xa2 0x7 0xac 0x8 0xb7 0x9 0xc3 0xa 0xcf 0xb 0xdc 0xc 0xea 0xd 0xf9 0xe 0x109 0xf 0x11a 0x10 0x12c 0x11 0x13c 0x12 0x14d 0x13 0x15e 0x14>; | |
| samsung,panel-candella-mapping-table = <0x0 0x0 0x0 0x2 0x1 0x2 0x2 0x3 0x2 0x3 0x3 0x4 0x3 0x4 0x4 0x5 0x4 0x5 0x5 0x6 0x5 0x5 0x5 0x7 0x6 0x6 0x6 0x8 0x7 0x7 0x7 0x9 0x8 0x8 0x8 0xa 0x9 0x8 0x8 0xb 0xa 0x9 0x9 0xc 0xb 0xa 0xa 0xd 0xc 0xa 0xa 0xe 0xd 0xb 0xb 0xf 0xe 0xc 0xc 0x10 0xf 0xd 0xd 0x11 0x10 0xe 0xe 0x13 0x11 0xf 0xf 0x14 0x12 0x10 0x10 0x15 0x13 0x10 0x10 0x16 0x14 0x11 0x11 0x18 0x15 0x12 0x12 0x19 0x16 0x13 0x13 0x1b 0x17 0x14 0x15 0x1d 0x18 0x16 0x17 0x1e 0x19 0x18 0x18 0x20 0x1a 0x19 0x1a 0x22 0x1b 0x1b 0x1c 0x25 0x1c 0x1d 0x1d 0x27 0x1d 0x1e 0x20 0x29 0x1e 0x21 0x22 0x2c 0x1f 0x23 0x24 0x2f 0x20 0x25 0x26 0x32 0x21 0x27 0x28 0x35 0x22 0x29 0x2b 0x38 0x23 0x2c 0x2e 0x3c 0x24 0x2f 0x31 0x40 0x25 0x32 0x34 0x44 0x26 0x35 0x38 0x48 0x27 0x39 0x3b 0x4d 0x28 0x3c 0x3f 0x52 0x29 0x40 0x43 0x57 0x2a 0x44 0x47 0x5d 0x2b 0x48 0x4c 0x62 0x2c 0x4d 0x50 0x69 0x2d 0x51 0x56 0x6f 0x2e 0x57 0x5b 0x77 0x2f 0x5c 0x61 0x7e 0x30 0x62 0x68 0x86 0x31 0x69 0x6e 0x8f 0x32 0x6f 0x76 0x98 0x33 0x77 0x7d 0xa2 0x34 0x7e 0x85 0xac 0x35 0x86 0x8e 0xb7 0x36 0x8f 0x96 0xc3 0x37 0x97 0xa0 0xcf 0x38 0xa1 0xaa 0xdc 0x39 0xab 0xb5 0xea 0x3a 0xb6 0xc1 0xf9 0x3b 0xc2 0xcd 0x109 0x3c 0xce 0xda 0x11a 0x3d 0xdb 0xe6 0x12c 0x3e 0xe7 0xf2 0x13c 0x3f 0xf3 0xfe 0x14d 0x40 0xff 0xff 0x15e>; | |
| linux,phandle = <0x2f>; | |
| phandle = <0x2f>; | |
| }; | |
| wqhd_cmd1 { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dual_dsi-panel"; | |
| label = "samsung amoled wqhd command mode dsi1 S6E3HA0 panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x29>; | |
| qcom,mdss-dsi-panel-type = "dsi_cmd_mode"; | |
| qcom,mdss-pan-dest = "display_2"; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| qcom,mdss-pan-broadcast-mode = <0x1>; | |
| qcom,mdss-pan-res = <0x2d0 0xa00>; | |
| qcom,mdss-pan-size = <0x41 0x73>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-clk-rate = <0x35866480>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-pan-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-wr-mem-start = <0x2c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x35866480>; | |
| qcom,mdss-pan-porch-values = <0x6c 0xf 0xd4 0x3 0x2 0xd>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x1c 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xfa4b3400 0x6681344b 0x410304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 05 ff 00 00 20 00 29 01 00 00 00 00 03 fc a5 a5 05 01 00 00 14 00 02 11 00 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 03 b6 88 04 29 01 00 00 00 00 15 b6 98 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 02 22 22 10 29 01 00 00 00 00 02 b5 41 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 35 00 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 04 bd 85 02 03 29 01 00 00 00 00 02 ff 02 29 01 00 00 00 00 03 fc a5 a5 29 01 00 00 78 00 05 c0 30 00 d8 d8 05 01 00 00 00 00 02 2c 00 05 01 00 00 00 00 02 3c 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| qcom,on-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| samsung,panel-alpm-on-seq = [05 01 00 00 14 00 02 28 00 29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 55 cb 18 41 01 00 00 01 23 00 00 d2 04 00 d2 01 00 00 41 8f 14 8f 00 00 00 00 01 00 00 00 00 00 00 d2 01 00 00 82 00 00 c0 00 00 00 e0 00 00 00 e0 e0 ed e0 63 02 04 05 00 00 00 00 00 00 00 00 00 00 0b 00 0f 0e 04 05 00 d3 01 01 d3 72 48 72 48 72 48 01 04 01 29 01 00 00 00 00 02 f7 03 29 01 00 00 00 00 03 bb 00 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 05 30 00 00 00 00 29 01 00 00 00 00 02 12 00 29 01 00 00 14 00 02 39 00]; | |
| samsung,panel-alpm-off-seq = <0x5010000 0x14000228 0x290100 0x2 0x38002901 0x0 0x2130029 0x1000000 0x3f05a 0x5a290100 0x55 0xcb184101 0x123 0xd204 0xd20100 0x418f14 0x8f000000 0x10000 0x0 0xd2010000 0x820000c0 0xe0 0xe0 0xe0e1e063 0x2040500 0x0 0x0 0xb000f 0xe040500 0xd30101d3 0x72487248 0x72480101 0x1290100 0x2 0xf7032901 0x1400 0x3f0a5a5>; | |
| samsung,panel-alpm-partial-area = [29 01 00 00 00 00 05 30 00 00 00 00 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-alpm-partial-area-index = <0x6>; | |
| samsung,panel-test-key-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-test-key-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-hbm-cmds = [06 01 00 00 00 00 01 c8 07 21]; | |
| samsung,panel-nv-mtp-read-hbm2-cmds = [06 01 00 00 00 00 01 c8 0f 48]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 14]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a>; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 c8 02 28]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 00 c8 03 20 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 32 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 32 00 02 28 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00 29 01 00 00 00 00 02 b6 8c]; | |
| samsung,panel-elvss-lowtemp2-cmds-list = [29 01 00 00 00 00 02 b0 14 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-gamma-hbm-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-etc-hbm-revB-cmds = <0x29010000 0x5b2 0x60006 0x29010000 0x17b6 0x88040000 0x3 0x55542000 0x6666c0c 0x76543210 0x2901 0x0 0x2550229 0x1000000 0x2f703>; | |
| samsung,panel-etc-hbm-revC-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 00 00 00 00 02 22 22 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-revE-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 08 88 8f 0f 01 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-revF-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 01 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-force-500cd-cmds = [29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-aid-cmds-revF-list = <0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9980006 0x29010000 0x5b2 0x9820006 0x29010000 0x5b2 0x96c0006 0x29010000 0x5b2 0x9580006 0x29010000 0x5b2 0x9420006 0x29010000 0x5b2 0x92e0006 0x29010000 0x5b2 0x9170006 0x29010000 0x5b2 0x9020006 0x29010000 0x5b2 0x8ec0006 0x29010000 0x5b2 0x8d40006 0x29010000 0x5b2 0x8bd0006 0x29010000 0x5b2 0x8a90006 0x29010000 0x5b2 0x8930006 0x29010000 0x5b2 0x8660006 0x29010000 0x5b2 0x8500006 0x29010000 0x5b2 0x83a0006 0x29010000 0x5b2 0x8240006 0x29010000 0x5b2 0x7f70006 0x29010000 0x5b2 0x7e10006 0x29010000 0x5b2 0x7980006 0x29010000 0x5b2 0x7810006 0x29010000 0x5b2 0x7690006 0x29010000 0x5b2 0x73b0006 0x29010000 0x5b2 0x70d0006 0x29010000 0x5b2 0x6c70006 0x29010000 0x5b2 0x69c0006 0x29010000 0x5b2 0x66d0006 0x29010000 0x5b2 0x6270006 0x29010000 0x5b2 0x5df0006 0x29010000 0x5b2 0x5970006 0x29010000 0x5b2 0x54c0006 0x29010000 0x5b2 0x5040006 0x29010000 0x5b2 0x4a40006 0x29010000 0x5b2 0x43d0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3f30006 0x29010000 0x5b2 0x3940006 0x29010000 0x5b2 0x3130006 0x29010000 0x5b2 0x2880006 0x29010000 0x5b2 0x1f50006 0x29010000 0x5b2 0x14f0006 0x29010000 0x5b2 0xa00006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-revF-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x25 0x4d 0x25 0x52 0x25 0x57 0x25 0x5d 0x25 0x62 0x25 0x69 0x25 0x6f 0x25 0x77 0x25 0x7e 0x25 0x86 0x25 0x8f 0x25 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aid-cmds-revE-list = <0x29010000 0x5b2 0x94f0006 0x29010000 0x5b2 0x9c70006 0x29010000 0x5b2 0x9b10006 0x29010000 0x5b2 0x99c0006 0x29010000 0x5b2 0x9840006 0x29010000 0x5b2 0x96e0006 0x29010000 0x5b2 0x9580006 0x29010000 0x5b2 0x9420006 0x29010000 0x5b2 0x92e0006 0x29010000 0x5b2 0x9170006 0x29010000 0x5b2 0x9020006 0x29010000 0x5b2 0x8ec0006 0x29010000 0x5b2 0x8d40006 0x29010000 0x5b2 0x8bd0006 0x29010000 0x5b2 0x8a90006 0x29010000 0x5b2 0x8930006 0x29010000 0x5b2 0x8660006 0x29010000 0x5b2 0x8500006 0x29010000 0x5b2 0x83a0006 0x29010000 0x5b2 0x8240006 0x29010000 0x5b2 0x7f70006 0x29010000 0x5b2 0x7e10006 0x29010000 0x5b2 0x7980006 0x29010000 0x5b2 0x7810006 0x29010000 0x5b2 0x7690006 0x29010000 0x5b2 0x73b0006 0x29010000 0x5b2 0x70d0006 0x29010000 0x5b2 0x6c70006 0x29010000 0x5b2 0x69c0006 0x29010000 0x5b2 0x66d0006 0x29010000 0x5b2 0x6270006 0x29010000 0x5b2 0x5df0006 0x29010000 0x5b2 0x5970006 0x29010000 0x5b2 0x54c0006 0x29010000 0x5b2 0x5040006 0x29010000 0x5b2 0x4a40006 0x29010000 0x5b2 0x43d0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3f30006 0x29010000 0x5b2 0x3940006 0x29010000 0x5b2 0x3130006 0x29010000 0x5b2 0x2880006 0x29010000 0x5b2 0x1f50006 0x29010000 0x5b2 0x14f0006 0x29010000 0x5b2 0xa00006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-revE-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x25 0x4d 0x25 0x52 0x25 0x57 0x25 0x5d 0x25 0x62 0x25 0x69 0x25 0x6f 0x25 0x77 0x25 0x7e 0x25 0x86 0x25 0x8f 0x25 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0x9d80006 0x29010000 0x5b2 0x9c10006 0x29010000 0x5b2 0x9ab0006 0x29010000 0x5b2 0x98c0006 0x29010000 0x5b2 0x9740006 0x29010000 0x5b2 0x95f0006 0x29010000 0x5b2 0x9480006 0x29010000 0x5b2 0x9300006 0x29010000 0x5b2 0x9140006 0x29010000 0x5b2 0x8fc0006 0x29010000 0x5b2 0x8e40006 0x29010000 0x5b2 0x8cb0006 0x29010000 0x5b2 0x8b30006 0x29010000 0x5b2 0x89b0006 0x29010000 0x5b2 0x8820006 0x29010000 0x5b2 0x86a0006 0x29010000 0x5b2 0x8390006 0x29010000 0x5b2 0x81e0006 0x29010000 0x5b2 0x8060006 0x29010000 0x5b2 0x7ed0006 0x29010000 0x5b2 0x7bb0006 0x29010000 0x5b2 0x7a20006 0x29010000 0x5b2 0x76a0006 0x29010000 0x5b2 0x73f0006 0x29010000 0x5b2 0x7320006 0x29010000 0x5b2 0x6f30006 0x29010000 0x5b2 0x6c00006 0x29010000 0x5b2 0x6790006 0x29010000 0x5b2 0x6450006 0x29010000 0x5b2 0x6110006 0x29010000 0x5b2 0x5c90006 0x29010000 0x5b2 0x57b0006 0x29010000 0x5b2 0x52b0006 0x29010000 0x5b2 0x4dc0006 0x29010000 0x5b2 0x4860006 0x29010000 0x5b2 0x41f0006 0x29010000 0x5b2 0x4060006 0x29010000 0x5b2 0x3da0006 0x29010000 0x5b2 0x36c0006 0x29010000 0x5b2 0x30b0006 0x29010000 0x5b2 0x2970006 0x29010000 0x5b2 0x2120006 0x29010000 0x5b2 0x17b0006 0x29010000 0x5b2 0xe80006 0x29010000 0x5b2 0x3b0006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-table = <0x2 0x0 0x3 0x1 0x4 0x2 0x5 0x3 0x6 0x4 0x7 0x5 0x8 0x6 0x9 0x7 0xa 0x8 0xb 0x9 0xc 0xa 0xd 0xb 0xe 0xc 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x16 0x13 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x24 0x48 0x24 0x4d 0x24 0x52 0x24 0x57 0x24 0x5d 0x24 0x62 0x24 0x69 0x24 0x6f 0x24 0x77 0x24 0x7e 0x24 0x86 0x24 0x8f 0x24 0x98 0x25 0xa2 0x26 0xac 0x27 0xb7 0x28 0xc3 0x29 0xcf 0x2a 0xdc 0x2b 0xea 0x2c 0xf9 0x2d 0x109 0x2d 0x11a 0x2d 0x12c 0x2d 0x13c 0x2d 0xde 0x2d 0x15e 0x2d>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 02 b5 51]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 00 00 02 b5 41 29 01 00 00 00 00 02 55 00]; | |
| samsung,panel-acl-map-table = <0x2 0x2 0x3 0x2 0x4 0x2 0x5 0x2 0x6 0x2 0x7 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xb 0x2 0xc 0x2 0xd 0x2 0xe 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x16 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 11 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 11 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x2 0x0 0x3 0x0 0x4 0x0 0x5 0x0 0x6 0x0 0x7 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x16 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x0 0x52 0x0 0x57 0x0 0x5d 0x0 0x62 0x0 0x69 0x0 0x6f 0x1 0x77 0x2 0x7e 0x3 0x86 0x4 0x8f 0x5 0x98 0x6 0xa2 0x7 0xac 0x8 0xb7 0x9 0xc3 0xa 0xcf 0xb 0xdc 0xc 0xea 0xd 0xf9 0xe 0x109 0xf 0x11a 0x10 0x12c 0x11 0x13c 0x12 0x14d 0x13 0x15e 0x14>; | |
| samsung,panel-candella-mapping-table = <0x0 0x0 0x2 0x2 0x1 0x3 0x3 0x3 0x2 0x4 0x4 0x4 0x3 0x5 0x5 0x5 0x4 0x6 0x6 0x6 0x5 0x7 0x7 0x7 0x6 0x8 0x8 0x8 0x7 0x9 0x9 0x9 0x8 0xa 0xa 0xa 0x9 0xb 0xb 0xb 0xa 0xc 0xc 0xc 0xb 0xd 0xd 0xd 0xc 0xe 0xe 0xe 0xd 0xf 0xf 0xf 0xe 0x10 0x10 0x10 0xf 0x11 0x12 0x11 0x10 0x13 0x13 0x13 0x11 0x14 0x14 0x14 0x12 0x15 0x15 0x15 0x13 0x16 0x17 0x16 0x14 0x18 0x18 0x18 0x15 0x19 0x1a 0x19 0x16 0x1b 0x1c 0x1b 0x17 0x1d 0x1d 0x1d 0x18 0x1e 0x1f 0x1e 0x19 0x20 0x20 0x20 0x1a 0x21 0x24 0x22 0x1b 0x25 0x26 0x25 0x1c 0x27 0x28 0x27 0x1d 0x29 0x2b 0x29 0x1e 0x2c 0x2e 0x2c 0x1f 0x2f 0x31 0x2f 0x20 0x32 0x34 0x32 0x21 0x35 0x37 0x35 0x22 0x38 0x3b 0x38 0x23 0x3c 0x3f 0x3c 0x24 0x40 0x43 0x40 0x25 0x44 0x47 0x44 0x26 0x48 0x4c 0x48 0x27 0x4d 0x51 0x4d 0x28 0x52 0x56 0x52 0x29 0x57 0x5c 0x57 0x2a 0x5d 0x61 0x5d 0x2b 0x62 0x68 0x62 0x2c 0x69 0x6e 0x69 0x2d 0x6f 0x76 0x6f 0x2e 0x77 0x7d 0x77 0x2f 0x7e 0x85 0x7e 0x30 0x86 0x8e 0x86 0x31 0x8f 0x95 0x8f 0x32 0x96 0xa1 0x98 0x33 0xa2 0xab 0xa2 0x34 0xac 0xb5 0xac 0x35 0xb6 0xc1 0xb7 0x36 0xc2 0xcd 0xc3 0x37 0xce 0xda 0xcf 0x38 0xdb 0xe5 0xdc 0x39 0xe6 0xed 0xea 0x3a 0xee 0xf1 0xf9 0x3b 0xf2 0xf4 0x109 0x3c 0xf5 0xf7 0x11a 0x3d 0xf8 0xf9 0x12c 0x3e 0xfa 0xfb 0x13c 0x3f 0xfc 0xfd 0x14d 0x40 0xfe 0xff 0x15e>; | |
| samsung,panel-aid-cmds-list-hmt = <0x29010000 0xfb2 0x38c0006 0x10606 0x60018ff 0xffff2901 0x0 0xfb2038c 0x60001 0x6060600 0x18ffffff 0x29010000 0xfb2 0x30c0006 0x10606 0x60018ff 0xffff2901 0x0 0xfb2030c 0x60001 0x6060600 0x18ffffff>; | |
| samsung,panel-aid-cmds-list-hmt-single = <0x29010000 0xfb2 0x70c0006 0x10606 0x60018ff 0xffff2901 0x0 0xfb2070c 0x60001 0x6060600 0x18ffffff 0x29010000 0xfb2 0x60c0006 0x10606 0x60018ff 0xffff2901 0x0 0xfb2060c 0x60001 0x6060600 0x18ffffff>; | |
| samsung,panel-aid-map-table-hmt = <0x50 0x0 0x5f 0x1 0x73 0x2 0x82 0x3>; | |
| samsung,panel-candella-mapping-table-hmt = <0x0 0x0 0x50 0x50 0x1 0x51 0x5f 0x5f 0x2 0x60 0x73 0x73 0x3 0x74 0x82 0x82>; | |
| samsung,panel-hmt-aid = <0x29010000 0x3f0 0x5a5a2901 0x0 0x22ca0100 0x1000100 0x80808080 0x80808080 0x80808080 0x80808080 0x80808080 0x80808080 0x29 0x1000000 0xfb200 0x600 0x1060606 0x18ffff 0xff230100 0x2 0xf7032901 0x0 0x3f0a5a5>; | |
| samsung,panel-hmt-aid-ready-to-foward = [29 01 00 00 00 00 02 b0 09 29 01 00 00 00 00 02 cb 03 29 01 00 00 00 00 02 b0 23 29 01 00 00 00 00 02 cb 0d 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-hmt-dual-scan-enable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 01 29 01 00 00 00 00 07 f2 00 01 a4 05 1b 4f 29 01 00 00 00 00 05 2b 00 00 04 ff 29 01 00 00 00 00 02 b0 01 29 01 00 00 00 00 02 f2 04 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-dual-scan-disable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 01 29 01 00 00 00 00 07 f2 00 01 a4 05 0b a0 29 01 00 00 00 00 05 2b 00 00 09 ff 29 01 00 00 00 00 02 b0 01 29 01 00 00 00 00 02 f2 04 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-reverse-enable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 12 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb b0 29 01 00 00 00 00 02 f7 03 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-reverse-disable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 0c 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb 30 29 01 00 00 00 00 02 f7 03 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-aid-ready-to-reverse = [29 01 00 00 00 00 02 b0 09 29 01 00 00 00 00 02 cb 04 29 01 00 00 00 00 02 b0 23 29 01 00 00 00 00 02 cb 10 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-hmt-dual-scan-half-enable = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x2290100 0x2 0xf2772901 0x0 0x2b00029 0x1000000 0x2f205 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-hmt-hbm-etc-cmds = [29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 02 55 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-hmt-porch-cmds = [29 01 00 00 00 00 06 f2 00 0d 03 77 05 29 01 00 00 00 00 05 2b 00 00 03 bf]; | |
| samsung,panel-level-enable = [29 01 00 00 00 00 03 fc 5a 5a]; | |
| samsung,panel-level-disable = [29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 12]; | |
| samsung,panel-hmt-ldi-fps-write-cmds = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 12 29 01 00 00 00 00 02 d7 00 29 01 00 00 00 00 02 fe 00 29 01 00 00 00 00 02 fe 80 29 01 00 00 00 00 03 fc a5 a5]; | |
| linux,phandle = <0x32>; | |
| phandle = <0x32>; | |
| }; | |
| mdss_dsi_samsung_1080p_cmd_fa2 { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dsi-panel"; | |
| label = "samsung amoled 1080p command mode dsi S6E3FA2 panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,cont-splash-enabled = <0x1>; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| qcom,panel-roi-alignment = <0x8 0x8 0x1 0x1 0x1 0x1>; | |
| qcom,partial-update-enabled; | |
| mdss-pan-broadcast-mode = <0x0>; | |
| qcom,mdss-pan-res = <0x438 0x780>; | |
| qcom,mdss-pan-size = <0x41 0x73>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,mdss-clk-rate = <0x35866480>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-pan-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-wr-mem-start = <0x2c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x35866480>; | |
| qcom,mdss-pan-porch-values = <0x24 0xa 0xa2 0x3 0x2 0xd>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x30 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-tx-eot-append = <0x1>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xfa4b4100 0x6681344b 0x410304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 05 01 00 00 00 00 02 f2 07 05 01 00 00 05 00 02 f9 09 05 01 00 00 14 00 02 11 00 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 05 b2 00 0e 00 0e 29 01 00 00 00 00 15 b6 98 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 02 22 22 10 29 01 00 00 00 00 02 b5 41 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 02 b0 02 29 01 00 00 00 00 02 fd 0a 29 01 00 00 00 00 02 fe 80 29 01 00 00 00 00 02 fe 00 29 01 00 00 00 00 02 35 00 29 01 00 00 00 00 04 bd 05 02 02 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| qcom,on-cmds-dsi-state = "dsi_lp_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-hsync-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 04 bd 85 02 0c 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-set-te-osc-b = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 fd b8 29 01 00 00 00 00 02 b0 14 29 01 00 00 00 00 02 d7 75 29 01 00 00 00 00 02 b0 20 29 01 00 00 00 00 02 d7 00 29 01 00 00 00 00 02 fe 80 29 01 00 00 00 00 02 fe 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-set-te-restore = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 fd 8c 29 01 00 00 00 00 02 fe 80 29 01 00 00 00 00 02 fe 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-set-te1 = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x14290100 0x2 0xd7002901 0x0 0x2fe8029 0x1000000 0x2fe00 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-set-te2 = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x14290100 0x2 0xd7002901 0x0 0x2fe8029 0x1000000 0x2fe00 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-set-te = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 fd b8 29 01 00 00 00 00 02 b0 14 29 01 00 00 00 00 02 d7 00 29 01 00 00 00 00 02 b0 20 29 01 00 00 00 00 02 d7 00 29 01 00 00 00 00 02 fe 80 29 01 00 00 64 00 02 fe 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-osc-type-read = [06 01 00 00 00 00 01 fd 01 00]; | |
| samsung,panel-alpm-on-seq = <0x5010000 0x14000228 0x290100 0x3 0xf05a5a29 0x1000000 0xabb01 0x7 0x804d4a5b 0x29010000 0x3f0 0xa5a52901 0x0 0x5300000 0x2901 0x0 0x2120029 0x1000014 0x23900>; | |
| samsung,panel-alpm-off-seq = [05 01 00 00 14 00 02 28 00 29 01 00 00 00 00 02 38 00 29 01 00 00 00 00 02 13 00]; | |
| samsung,panel-alpm-partial-area = [29 01 00 00 00 00 05 30 00 00 00 00 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-alpm-gamma-10cd = [29 01 00 00 00 00 0a bb 01 00 00 00 70 80 00 00 00]; | |
| samsung,panel-alpm-gamma-60cd = [29 01 00 00 00 00 0a bb 01 00 00 00 70 80 00 00 00]; | |
| samsung,panel-alpm-gamma-cmds = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 0a bb 01 00 00 00 07 80 00 00 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-alpm-gamma-read-cmd = [06 01 00 00 00 00 01 bc 06 00]; | |
| samsung,panel-alpm-partial-area-index = <0x4>; | |
| samsung,panel-alpm-gamma-index = <0x2>; | |
| samsung,panel-alpm-gamma-para-index = <0x7>; | |
| samsung,panel-alpm-gamma-para-length = <0x3>; | |
| samsung,panel-test-key-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-test-key-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-hbm-cmds = [06 01 00 00 00 00 01 c8 07 21]; | |
| samsung,panel-nv-mtp-read-hbm2-cmds = [06 01 00 00 00 00 01 c8 0f 48]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 14]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-mtp-read-sysfs-cmds = [06 01 00 00 00 00 01 00 00 00]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 c8 02 28]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-rddpm-read-cmds = [06 01 00 00 00 00 01 0a 01 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 00 c8 03 20 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 00 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 00 00 02 28 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00]; | |
| samsung,panel-elvss-lowtemp2-cmds-list = [29 01 00 00 00 00 02 b0 14 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00]; | |
| samsung,panel-gamma-hbm-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-etc-hbm-revE-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 08 88 8f 0f 02 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 b5 51 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00]; | |
| samsung,panel-etc-hbm-cmds = [29 01 00 00 00 00 05 b2 00 0e 00 0e 29 01 00 00 00 00 16 b6 88 04 00 00 00 00 00 03 55 54 20 00 0a aa af 0f 02 11 11 10 00 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 b5 51 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00]; | |
| samsung,panel-force-500cd-cmds = <0x29010000 0x12b6 0x880a0000 0x3 0x55542000 0x6666c0c 0x290100 0x2 0x55002301 0x0 0x2f70323 0x1000000 0x2f700>; | |
| samsung,panel-aid-cmds-revF-list = <0x29010000 0x5b2 0x7600006 0x29010000 0x5b2 0x7530006 0x29010000 0x5b2 0x7420006 0x29010000 0x5b2 0x7310006 0x29010000 0x5b2 0x71d0006 0x29010000 0x5b2 0x70c0006 0x29010000 0x5b2 0x6fa0006 0x29010000 0x5b2 0x6e90006 0x29010000 0x5b2 0x6d10006 0x29010000 0x5b2 0x6c70006 0x29010000 0x5b2 0x6b50006 0x29010000 0x5b2 0x6a30006 0x29010000 0x5b2 0x6930006 0x29010000 0x5b2 0x6820006 0x29010000 0x5b2 0x66e0006 0x29010000 0x5b2 0x65d0006 0x29010000 0x5b2 0x63a0006 0x29010000 0x5b2 0x61b0006 0x29010000 0x5b2 0x6130006 0x29010000 0x5b2 0x6030006 0x29010000 0x5b2 0x5e00006 0x29010000 0x5b2 0x5cb0006 0x29010000 0x5b2 0x5a60006 0x29010000 0x5b2 0x5820006 0x29010000 0x5b2 0x5700006 0x29010000 0x5b2 0x54a0006 0x29010000 0x5b2 0x5220006 0x29010000 0x5b2 0x4ea0006 0x29010000 0x5b2 0x4c40006 0x29010000 0x5b2 0x4aa0006 0x29010000 0x5b2 0x46e0006 0x29010000 0x5b2 0x4350006 0x29010000 0x5b2 0x3fb0006 0x29010000 0x5b2 0x3c20006 0x29010000 0x5b2 0x3890006 0x29010000 0x5b2 0x33d0006 0x29010000 0x5b2 0x2f20006 0x29010000 0x5b2 0x2ad0006 0x29010000 0x5b2 0x2540006 0x29010000 0x5b2 0x3060006 0x29010000 0x5b2 0x2c20006 0x29010000 0x5b2 0x2750006 0x29010000 0x5b2 0x2240006 0x29010000 0x5b2 0x1c20006 0x29010000 0x5b2 0x15a0006 0x29010000 0x5b2 0xf50006 0x29010000 0x5b2 0x7b0006 0x29010000 0x5b2 0x60006>; | |
| samsung,panel-aid-map-revF-table = <0x2 0x0 0x4 0x2 0x5 0x3 0x6 0x4 0x8 0x6 0x9 0x7 0xa 0x8 0xc 0xa 0xd 0xb 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x26 0x4d 0x27 0x52 0x27 0x57 0x27 0x5d 0x27 0x62 0x27 0x69 0x27 0x6f 0x27 0x77 0x27 0x7e 0x27 0x86 0x27 0x8f 0x27 0x98 0x27 0xa2 0x28 0xac 0x29 0xb7 0x2a 0xc3 0x2b 0xcf 0x2c 0xdc 0x2d 0xea 0x2e 0xf9 0x2f 0x109 0x2f 0x11a 0x2f 0x12c 0x2f 0x13c 0x2f 0x14d 0x2f 0x15e 0x2f>; | |
| samsung,panel-aid-cmds-revG-list = <0x29010000 0x5b2 0x769000e 0x29010000 0x5b2 0x759000e 0x29010000 0x5b2 0x745000e 0x29010000 0x5b2 0x736000e 0x29010000 0x5b2 0x724000e 0x29010000 0x5b2 0x713000e 0x29010000 0x5b2 0x701000e 0x29010000 0x5b2 0x6f1000e 0x29010000 0x5b2 0x6df000e 0x29010000 0x5b2 0x6cf000e 0x29010000 0x5b2 0x6bf000e 0x29010000 0x5b2 0x6ab000e 0x29010000 0x5b2 0x69c000e 0x29010000 0x5b2 0x68b000e 0x29010000 0x5b2 0x679000e 0x29010000 0x5b2 0x667000e 0x29010000 0x5b2 0x643000e 0x29010000 0x5b2 0x633000e 0x29010000 0x5b2 0x621000e 0x29010000 0x5b2 0x610000e 0x29010000 0x5b2 0x5ed000e 0x29010000 0x5b2 0x5da000e 0x29010000 0x5b2 0x5b5000e 0x29010000 0x5b2 0x594000e 0x29010000 0x5b2 0x57f000e 0x29010000 0x5b2 0x55d000e 0x29010000 0x5b2 0x539000e 0x29010000 0x5b2 0x503000e 0x29010000 0x5b2 0x4db000e 0x29010000 0x5b2 0x4b7000e 0x29010000 0x5b2 0x481000e 0x29010000 0x5b2 0x44b000e 0x29010000 0x5b2 0x411000e 0x29010000 0x5b2 0x3d6000e 0x29010000 0x5b2 0x39d000e 0x29010000 0x5b2 0x351000e 0x29010000 0x5b2 0x30a000e 0x29010000 0x5b2 0x2b5000e 0x29010000 0x5b2 0x256000e 0x29010000 0x5b2 0x1ef000e 0x29010000 0x5b2 0x185000e 0x29010000 0x5b2 0x110000e 0x29010000 0x5b2 0x8f000e 0x29010000 0x5b2 0xe000e>; | |
| samsung,panel-aid-map-revG-table = <0x2 0x0 0x4 0x2 0x5 0x3 0x6 0x4 0x8 0x6 0x9 0x7 0xa 0x8 0xc 0xa 0xd 0xb 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x25 0x4d 0x25 0x52 0x25 0x57 0x25 0x5d 0x25 0x62 0x25 0x69 0x25 0x6f 0x25 0x77 0x25 0x7e 0x25 0x86 0x25 0x8f 0x25 0x98 0x25 0xa2 0x25 0xac 0x25 0xb7 0x26 0xc3 0x27 0xcf 0x28 0xdc 0x29 0xea 0x2a 0xf9 0x2b 0x109 0x2b 0x11a 0x2b 0x12c 0x2b 0x13c 0x2b 0x14d 0x2b 0x15e 0x2b>; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0x768000e 0x29010000 0x5b2 0x758000e 0x29010000 0x5b2 0x749000e 0x29010000 0x5b2 0x739000e 0x29010000 0x5b2 0x729000e 0x29010000 0x5b2 0x719000e 0x29010000 0x5b2 0x709000e 0x29010000 0x5b2 0x6f8000e 0x29010000 0x5b2 0x6e7000e 0x29010000 0x5b2 0x6d7000e 0x29010000 0x5b2 0x6c8000e 0x29010000 0x5b2 0x6b7000e 0x29010000 0x5b2 0x6a5000e 0x29010000 0x5b2 0x695000e 0x29010000 0x5b2 0x683000e 0x29010000 0x5b2 0x673000e 0x29010000 0x5b2 0x653000e 0x29010000 0x5b2 0x62f000e 0x29010000 0x5b2 0x627000e 0x29010000 0x5b2 0x617000e 0x29010000 0x5b2 0x5ff000e 0x29010000 0x5b2 0x5ef000e 0x29010000 0x5b2 0x5cc000e 0x29010000 0x5b2 0x5ab000e 0x29010000 0x5b2 0x598000e 0x29010000 0x5b2 0x576000e 0x29010000 0x5b2 0x553000e 0x29010000 0x5b2 0x51d000e 0x29010000 0x5b2 0x4fb000e 0x29010000 0x5b2 0x4d2000e 0x29010000 0x5b2 0x49e000e 0x29010000 0x5b2 0x462000e 0x29010000 0x5b2 0x42b000e 0x29010000 0x5b2 0x3ed000e 0x29010000 0x5b2 0x3ad000e 0x29010000 0x5b2 0x356000e 0x29010000 0x5b2 0x329000e 0x29010000 0x5b2 0x2be000e 0x29010000 0x5b2 0x267000e 0x29010000 0x5b2 0x21d000e 0x29010000 0x5b2 0x1bd000e 0x29010000 0x5b2 0x14e000e 0x29010000 0x5b2 0xd6000e 0x29010000 0x5b2 0x53000e 0x29010000 0x5b2 0xe000e>; | |
| samsung,panel-aid-map-table = <0x2 0x0 0x4 0x2 0x5 0x3 0x6 0x4 0x8 0x6 0x9 0x7 0xa 0x8 0xc 0xa 0xd 0xb 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x24 0x48 0x24 0x4d 0x24 0x52 0x24 0x57 0x24 0x5d 0x24 0x62 0x24 0x69 0x24 0x6f 0x24 0x77 0x24 0x7e 0x24 0x86 0x24 0x8f 0x24 0x98 0x24 0xa2 0x25 0xac 0x26 0xb7 0x27 0xc3 0x28 0xcf 0x29 0xdc 0x2a 0xea 0x2b 0xf9 0x2c 0x109 0x2c 0x11a 0x2c 0x12c 0x2c 0x13c 0x2c 0x14d 0x2c 0x15e 0x2c>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 02 b5 51]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 00 00 02 b5 41 29 01 00 00 00 00 02 55 00]; | |
| samsung,panel-acl-map-table = <0x2 0x2 0x4 0x2 0x5 0x2 0x6 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xc 0x2 0xd 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-revG-list = <0x29010000 0x3b6 0x88102901 0x0 0x3b6880f 0x29010000 0x3b6 0x880f2901 0x0 0x3b6880f 0x29010000 0x3b6 0x880e2901 0x0 0x3b6880e 0x29010000 0x3b6 0x880d2901 0x0 0x3b6880d 0x29010000 0x3b6 0x880c2901 0x0 0x3b6880c 0x29010000 0x3b6 0x880b2901 0x0 0x3b6880a 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88082901 0x0 0x3b68807 0x29010000 0x3b6 0x88062901 0x0 0x3b68806 0x29010000 0x3b6 0x88052901 0x0 0x3b68804>; | |
| samsung,panel-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-cmds-revG-list = <0x29010000 0x3b6 0x88102901 0x0 0x3b6880f 0x29010000 0x3b6 0x880f2901 0x0 0x3b6880f 0x29010000 0x3b6 0x880e2901 0x0 0x3b6880e 0x29010000 0x3b6 0x880d2901 0x0 0x3b6880d 0x29010000 0x3b6 0x880c2901 0x0 0x3b6880c 0x29010000 0x3b6 0x880b2901 0x0 0x3b6880a 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88092901 0x0 0x3b68809 0x29010000 0x3b6 0x88082901 0x0 0x3b68807 0x29010000 0x3b6 0x88062901 0x0 0x3b68806 0x29010000 0x3b6 0x88052901 0x0 0x3b68804>; | |
| samsung,panel-smart-acl-elvss-map-revG-table = <0x2 0x0 0x4 0x0 0x5 0x0 0x6 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xc 0x0 0xd 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x0 0x52 0x1 0x57 0x2 0x5d 0x3 0x62 0x4 0x69 0x5 0x6f 0x6 0x77 0x7 0x7e 0x8 0x86 0x9 0x8f 0xa 0x98 0xb 0xa2 0xc 0xac 0xd 0xb7 0xe 0xc3 0xf 0xcf 0x10 0xdc 0x11 0xea 0x12 0xf9 0x13 0x109 0x14 0x11a 0x15 0x12c 0x16 0x13c 0x17 0x14d 0x18 0x15e 0x19>; | |
| samsung,panel-smart-acl-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0e 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0d 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0c 29 01 00 00 00 00 03 b6 88 0b 29 01 00 00 00 00 03 b6 88 0a 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 09 29 01 00 00 00 00 03 b6 88 08 29 01 00 00 00 00 03 b6 88 07 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 06 29 01 00 00 00 00 03 b6 88 05 29 01 00 00 00 00 03 b6 88 04]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x2 0x0 0x4 0x0 0x5 0x0 0x6 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xc 0x0 0xd 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x1 0x2c 0x2 0x2f 0x3 0x32 0x4 0x35 0x5 0x38 0x6 0x3c 0x7 0x40 0x7 0x44 0x7 0x48 0x7 0x4d 0x7 0x52 0x8 0x57 0x8 0x5d 0x8 0x62 0x9 0x69 0xa 0x6f 0xb 0x77 0xc 0x7e 0xd 0x86 0xe 0x8f 0xf 0x98 0x10 0xa2 0x11 0xac 0x12 0xb7 0x13 0xc3 0x14 0xcf 0x15 0xdc 0x16 0xea 0x17 0xf9 0x18 0x109 0x19 0x11a 0x1a 0x12c 0x1b 0x13c 0x1c 0x14d 0x1d 0x15e 0x1e>; | |
| samsung,panel-candella-mapping-table = <0x0 0x2 0x2 0x2 0x1 0x3 0x3 0x4 0x2 0x4 0x4 0x5 0x3 0x5 0x5 0x6 0x4 0x6 0x6 0x8 0x5 0x7 0x7 0x9 0x6 0x8 0x8 0xa 0x7 0x9 0x9 0xc 0x8 0xa 0xa 0xd 0x9 0xb 0xb 0xf 0xa 0xc 0xc 0x10 0xb 0xd 0xd 0x11 0xc 0xe 0xe 0x13 0xd 0xf 0xf 0x14 0xe 0x10 0x10 0x15 0xf 0x11 0x11 0x18 0x10 0x12 0x12 0x19 0x11 0x13 0x13 0x1b 0x12 0x14 0x15 0x1d 0x13 0x16 0x17 0x1e 0x14 0x18 0x18 0x20 0x15 0x19 0x1a 0x22 0x16 0x1b 0x1c 0x25 0x17 0x1d 0x1d 0x27 0x18 0x1e 0x20 0x29 0x19 0x21 0x22 0x2c 0x1a 0x23 0x24 0x2f 0x1b 0x25 0x26 0x32 0x1c 0x27 0x28 0x35 0x1d 0x29 0x2b 0x38 0x1e 0x2c 0x2e 0x3c 0x1f 0x2f 0x31 0x40 0x20 0x32 0x34 0x44 0x21 0x35 0x38 0x48 0x22 0x39 0x3b 0x4d 0x23 0x3c 0x3f 0x52 0x24 0x40 0x43 0x57 0x25 0x44 0x47 0x5d 0x26 0x48 0x4c 0x62 0x27 0x4d 0x50 0x69 0x28 0x51 0x56 0x6f 0x29 0x57 0x5b 0x77 0x2a 0x5c 0x61 0x7e 0x2b 0x62 0x68 0x86 0x2c 0x69 0x6e 0x8f 0x2d 0x6f 0x76 0x98 0x2e 0x77 0x7d 0xa2 0x2f 0x7e 0x85 0xac 0x30 0x86 0x8e 0xb7 0x31 0x8f 0x96 0xc3 0x32 0x97 0xa0 0xcf 0x33 0xa1 0xaa 0xdc 0x34 0xab 0xb5 0xea 0x35 0xb6 0xc1 0xf9 0x36 0xc2 0xcd 0x109 0x37 0xce 0xda 0x11a 0x38 0xdb 0xe6 0x12c 0x39 0xe7 0xf2 0x13c 0x3a 0xf3 0xfe 0x14d 0x3b 0xff 0xff 0x15e>; | |
| samsung,panel-aid-cmds-list-hmt = <0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-cmds-list-hmt-single = <0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-map-table-hmt = <0x50 0x0 0x5f 0x1 0x73 0x2 0x82 0x3>; | |
| samsung,panel-candella-mapping-table-hmt = <0x0 0x0 0x50 0x50 0x1 0x51 0x5f 0x5f 0x2 0x60 0x73 0x73 0x3 0x74 0x82 0x82>; | |
| samsung,panel-hmt-aid = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 0d b2 00 00 e0 06 e0 06 06 00 18 ff ff ff 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-hmt-aid-ready-to-foward = [29 01 00 00 00 00 02 b0 09 29 01 00 00 00 00 02 cb 03 29 01 00 00 00 00 02 b0 23 29 01 00 00 00 00 02 cb 0d 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00]; | |
| samsung,panel-hmt-dual-scan-enable = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x2290100 0x2 0xf2772901 0x0 0x52b0000 0x3bf2901 0x0 0x2b00029 0x1000000 0x2f205 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-hmt-dual-scan-disable = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x290100 0x2 0xf2012901 0x0 0x52b0000 0x77f2901 0x0 0x2b00229 0x1000000 0x2f2f0 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-hmt-reverse-enable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 12 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb b0 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-reverse-disable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 0c 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb 30 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-reverse-revG-enable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 0d 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb f0 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-reverse-revG-disable = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 18 29 01 00 00 00 00 02 cb 00 29 01 00 00 00 00 02 b0 26 29 01 00 00 00 00 02 cb 70 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00 29 01 00 00 00 00 03 f0 a5 a5 29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-aid-ready-to-reverse = [29 01 00 00 00 00 02 b0 09 29 01 00 00 00 00 02 cb 04 29 01 00 00 00 00 02 b0 23 29 01 00 00 00 00 02 cb 10 23 01 00 00 00 00 02 f7 03 23 01 00 00 00 00 02 f7 00]; | |
| samsung,panel-hmt-dual-scan-half-enable = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a 0x29010000 0x2b0 0x2290100 0x2 0xf2772901 0x0 0x2b00029 0x1000000 0x2f205 0x29010000 0x3f0 0xa5a52901 0x0 0x3fca5a5>; | |
| samsung,panel-hmt-hbm-etc-cmds = <0x29010000 0x12b6 0x880a0000 0x3 0x55542000 0x6666c0c 0x290100 0x2 0x55002301 0x0 0x2f70323 0x1000000 0x2f700>; | |
| samsung,panel-hmt-porch-cmds = [29 01 00 00 00 00 06 f2 00 0d 03 77 05 29 01 00 00 00 00 05 2b 00 00 03 bf]; | |
| samsung,panel-level-enable = [29 01 00 00 00 00 03 fc 5a 5a]; | |
| samsung,panel-level-disable = [29 01 00 00 00 00 03 fc a5 a5]; | |
| samsung,panel-hmt-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 12]; | |
| samsung,panel-hmt-ldi-fps-write-cmds = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 02 b0 12 29 01 00 00 00 00 02 d7 00 29 01 00 00 00 00 02 fe 00 29 01 00 00 00 00 02 fe 80 29 01 00 00 00 00 03 fc a5 a5]; | |
| linux,phandle = <0x30>; | |
| phandle = <0x30>; | |
| }; | |
| mdss_dsi_samsung_octa_1080p_cmd { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dsi-panel"; | |
| label = "samsung amoled 1080p command mode dsi S6E3FA2 panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| mdss-pan-broadcast-mode = <0x0>; | |
| qcom,mdss-pan-res = <0x438 0x780>; | |
| qcom,mdss-pan-size = <0x47 0x7e>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,mdss-clk-rate = <0x35866480>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-pan-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-wr-mem-start = <0x2c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x35866480>; | |
| qcom,mdss-pan-porch-values = <0x24 0xa 0xa2 0x3 0x2 0xd>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x1c 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xe0482500 0x666d2a4b 0x3f0304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = <0x29010000 0x3f0 0x5a5a0501 0x1400 0x2110029 0x1000000 0x2f200 0x29010000 0x22ca 0x1000100 0x1008080 0x80808080 0x80808080 0x80808080 0x80808080 0x80808080 0x80800000 0x290100 0x5 0xb2000c00 0xc290100 0x3 0xb6880a23 0x1000000 0x2f703 0x23010000 0x235 0x290100 0xd 0xc0000203 0x32034444 0xc0001c20 0xe8290100 0x5 0xe3ffffff 0xff290100 0x3 0xfe000329 0x1000000 0x2b02b 0x29010000 0x2fe 0xe4290100 0x3 0xfc5a5a29 0x1000000 0x3ed0c 0x4230100 0x2 0xff012901 0x0 0x3fca5a5>; | |
| qcom,on-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| samsung,panel-test-key-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-test-key-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-hbm-cmds = [06 01 00 00 00 00 01 c8 07 21]; | |
| samsung,panel-nv-mtp-read-hbm2-cmds = [06 01 00 00 00 00 01 c8 0f 48]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3fc5a5a>; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 02 83 04 ff 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 32 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 32 00 02 28 00]; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 72 00 02 55 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00 29 01 00 00 00 00 02 b6 8c]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-gamma-hbm-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-etc-hbm-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 03 b6 88 00 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-evt0-second-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 03 bc 20 38 29 01 00 00 00 00 02 55 42 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-evt1-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 02 55 42 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-evt1-second-cmds = [29 01 00 00 00 00 05 b2 00 0c 00 0c 29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 02 55 42 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-evt1-revI-cmds = [29 01 00 00 00 00 05 b2 00 08 00 08 29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 02 55 42 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-evt1-revJ-cmds = [29 01 00 00 00 00 05 b2 00 06 00 06 29 01 00 00 00 00 12 b6 88 0a 00 00 00 00 00 03 55 54 20 00 06 66 6c 0c 00 29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a 29 01 00 00 00 00 02 55 42 29 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0x60006 0x29010000 0x5b2 0x60306 0x29010000 0x5b2 0x60008 0x29010000 0x5b2 0x60077 0x29010000 0x5b2 0x600e5 0x29010000 0x5b2 0x60150 0x29010000 0x5b2 0x601b3 0x29010000 0x5b2 0x60215 0x29010000 0x5b2 0x60276 0x29010000 0x5b2 0x602b2 0x29010000 0x5b2 0x60301 0x29010000 0x5b2 0x60365 0x29010000 0x5b2 0x603ae 0x29010000 0x5b2 0x603e5 0x29010000 0x5b2 0x6041c 0x29010000 0x5b2 0x60454 0x29010000 0x5b2 0x6048c 0x29010000 0x5b2 0x604c5 0x29010000 0x5b2 0x604e9 0x29010000 0x5b2 0x6050c 0x29010000 0x5b2 0x60541 0x29010000 0x5b2 0x60564 0x29010000 0x5b2 0x60588 0x29010000 0x5b2 0x60599 0x29010000 0x5b2 0x605bc 0x29010000 0x5b2 0x605e0 0x29010000 0x5b2 0x605f1 0x29010000 0x5b2 0x60614 0x29010000 0x5b2 0x60626 0x29010000 0x5b2 0x60638 0x29010000 0x5b2 0x60648 0x29010000 0x5b2 0x60669 0x29010000 0x5b2 0x6067a 0x29010000 0x5b2 0x6068b 0x29010000 0x5b2 0x6069b 0x29010000 0x5b2 0x606ac 0x29010000 0x5b2 0x606bc 0x29010000 0x5b2 0x606cd 0x29010000 0x5b2 0x606de 0x29010000 0x5b2 0x606ef 0x29010000 0x5b2 0x60700 0x29010000 0x5b2 0x60711 0x29010000 0x5b2 0x60722 0x29010000 0x5b2 0x60731 0x29010000 0x5b2 0x60008>; | |
| samsung,panel-aid-map-table = <0x5 0x2b 0x6 0x2a 0x7 0x29 0x8 0x28 0x9 0x27 0xa 0x26 0xb 0x25 0xc 0x24 0xd 0x23 0xe 0x22 0xf 0x21 0x10 0x20 0x11 0x1f 0x13 0x1e 0x14 0x1d 0x15 0x1c 0x16 0x1b 0x18 0x1a 0x19 0x19 0x1b 0x18 0x1d 0x17 0x1e 0x16 0x20 0x15 0x22 0x14 0x25 0x13 0x27 0x12 0x29 0x11 0x2c 0x10 0x2f 0xf 0x32 0xe 0x35 0xd 0x38 0xc 0x3c 0xb 0x40 0xa 0x44 0x9 0x48 0x8 0x4d 0x7 0x52 0x6 0x57 0x5 0x5d 0x4 0x62 0x3 0x69 0x2 0x6f 0x1 0x77 0x1 0x7e 0x1 0x86 0x1 0x8f 0x1 0x98 0x1 0xa2 0x1 0xac 0x1 0xb7 0x0 0xc3 0x0 0xcf 0x0 0xdc 0x0 0xea 0x0 0xf9 0x0 0x109 0x0 0x11a 0x0 0x12c 0x0 0x13c 0x0 0x14d 0x0 0x15e 0x0>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 07 b5 03 99 27 1f 45 0a]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-map-table = <0x5 0x2 0x6 0x2 0x7 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xb 0x2 0xc 0x2 0xd 0x2 0xe 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x16 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-list = <0x29010000 0x3b6 0x88152901 0x0 0x3b68814 0x29010000 0x3b6 0x88132901 0x0 0x3b68812 0x29010000 0x3b6 0x88112901 0x0 0x3b68810 0x29010000 0x3b6 0x880f2901 0x0 0x3b6880e 0x29010000 0x3b6 0x880d2901 0x0 0x3b6880c 0x29010000 0x3b6 0x880b2901 0x0 0x3b6880a>; | |
| samsung,panel-elvss-map-table = <0x5 0x0 0x6 0x0 0x7 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x16 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x0 0x52 0x0 0x57 0x0 0x5d 0x0 0x62 0x0 0x69 0x0 0x6f 0x1 0x77 0x2 0x7e 0x2 0x86 0x3 0x8f 0x4 0x98 0x4 0xa2 0x5 0xac 0x6 0xb7 0x5 0xc3 0x6 0xcf 0x6 0xdc 0x7 0xea 0x7 0xf9 0x8 0x109 0x8 0x11a 0x9 0x12c 0x9 0x13c 0xa 0x14d 0xa 0x15e 0xb>; | |
| samsung,panel-smart-acl-elvss-cmds-list = [29 01 00 00 00 00 03 b6 88 18 29 01 00 00 00 00 03 b6 88 17 29 01 00 00 00 00 03 b6 88 16 29 01 00 00 00 00 03 b6 88 15 29 01 00 00 00 00 03 b6 88 14 29 01 00 00 00 00 03 b6 88 13 29 01 00 00 00 00 03 b6 88 12 29 01 00 00 00 00 03 b6 88 11 29 01 00 00 00 00 03 b6 88 10 29 01 00 00 00 00 03 b6 88 0f 29 01 00 00 00 00 03 b6 88 0e]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x5 0x0 0x6 0x0 0x7 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xb 0x0 0xc 0x0 0xd 0x0 0xe 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x16 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x0 0x52 0x0 0x57 0x0 0x5d 0x0 0x62 0x0 0x69 0x0 0x6f 0x1 0x77 0x2 0x7e 0x2 0x86 0x3 0x8f 0x4 0x98 0x4 0xa2 0x5 0xac 0x6 0xb7 0x5 0xc3 0x6 0xcf 0x6 0xdc 0x7 0xea 0x7 0xf9 0x8 0x109 0x8 0x11a 0x8 0x12c 0x8 0x13c 0x9 0x14d 0x9 0x15e 0xa>; | |
| samsung,panel-candella-mapping-table = <0x0 0x0 0x5 0x5 0x1 0x6 0x6 0x6 0x2 0x7 0x7 0x7 0x3 0x8 0x8 0x8 0x4 0x9 0x9 0x9 0x5 0xa 0xa 0xa 0x6 0xb 0xb 0xb 0x7 0xc 0xc 0xc 0x8 0xd 0xd 0xd 0x9 0xe 0xe 0xe 0xa 0xf 0xf 0xf 0xb 0x10 0x10 0x10 0xc 0x11 0x12 0x11 0xd 0x13 0x13 0x13 0xe 0x14 0x14 0x14 0xf 0x15 0x15 0x15 0x10 0x16 0x17 0x16 0x11 0x18 0x18 0x18 0x12 0x19 0x1a 0x19 0x13 0x1b 0x1c 0x1b 0x14 0x1d 0x1d 0x1d 0x15 0x1e 0x1f 0x1e 0x16 0x20 0x20 0x20 0x17 0x21 0x24 0x22 0x18 0x25 0x26 0x25 0x19 0x27 0x28 0x27 0x1a 0x29 0x2b 0x29 0x1b 0x2c 0x2e 0x2c 0x1c 0x2f 0x31 0x2f 0x1d 0x32 0x34 0x32 0x1e 0x35 0x37 0x35 0x1f 0x38 0x3b 0x38 0x20 0x3c 0x3f 0x3c 0x21 0x40 0x43 0x40 0x22 0x44 0x47 0x44 0x23 0x48 0x4c 0x48 0x24 0x4d 0x51 0x4d 0x25 0x52 0x56 0x52 0x26 0x57 0x5c 0x57 0x27 0x5d 0x61 0x5d 0x28 0x62 0x68 0x62 0x29 0x69 0x6e 0x69 0x2a 0x6f 0x76 0x6f 0x2b 0x77 0x7d 0x77 0x2c 0x7e 0x85 0x7e 0x2d 0x86 0x8e 0x86 0x2e 0x8f 0x95 0x8f 0x2f 0x96 0xa1 0x98 0x30 0xa2 0xab 0xa2 0x31 0xac 0xb5 0xac 0x32 0xb6 0xc1 0xb7 0x33 0xc2 0xcd 0xc3 0x34 0xce 0xda 0xcf 0x35 0xdb 0xe5 0xdc 0x36 0xe6 0xed 0xea 0x37 0xee 0xf1 0xf9 0x38 0xf2 0xf4 0x109 0x39 0xf5 0xf7 0x11a 0x3a 0xf8 0xf9 0x12c 0x3b 0xfa 0xfb 0x13c 0x3c 0xfc 0xfd 0x14d 0x3d 0xfe 0xff 0x15e>; | |
| samsung,panel-smart-dimming-lux-table = <0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x13 0x14 0x15 0x16 0x18 0x19 0x1b 0x1d 0x1e 0x20 0x22 0x25 0x27 0x29 0x2c 0x2f 0x32 0x35 0x38 0x3c 0x40 0x44 0x48 0x4d 0x52 0x57 0x5d 0x62 0x69 0x6f 0x77 0x7e 0x86 0x8f 0x98 0xa2 0xac 0xb7 0xc3 0xcf 0xdc 0xea 0xf9 0x109 0x11a 0x12c>; | |
| }; | |
| mdss_dsi_magna_hd_cmd { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-mag-dsi-panel"; | |
| label = "magna amoled hd command mode dsi ea8064g panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,cont-splash-enabled = <0x1>; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| qcom,esd-irq-gpio = <0xb 0x4 0x1>; | |
| qcom,pcd-irq-gpio = <0x5 0x64 0x1>; | |
| mdss-pan-broadcast-mode = <0x0>; | |
| qcom,mdss-pan-res = <0x2d0 0x500>; | |
| qcom,mdss-pan-size = <0x3b 0x68>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,mdss-clk-rate = <0x1ab3f000>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-dsi-wr-mem-start = <0x2c>; | |
| qcom,mdss-dsi-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x1ab3f000>; | |
| qcom,panel-roi-alignment = <0x4 0x4 0x1 0x1 0x1 0x1>; | |
| qcom,partial-update-enabled; | |
| qcom,mdss-pan-porch-values = <0x60 0x2e 0x60 0x8 0x2 0xa>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x30 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-tx-eot-append = <0x1>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xe0302500 0x416e1c34 0x200304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 03 f1 5a 5a 29 01 00 00 00 00 03 fc 5a 5a 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 05 b2 00 08 00 08 29 01 00 00 00 00 03 b6 5c 84 29 01 00 00 00 00 02 b5 21 29 01 00 00 00 00 02 53 00 23 01 00 00 00 00 02 f7 01 05 01 00 00 14 00 02 11 00 29 01 00 00 00 00 03 cc 57 32 29 01 00 00 00 00 02 cb 56 29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 ff 20 29 01 00 00 00 00 03 b8 19 04 29 01 00 00 00 00 04 ba 32 30 01 29 01 00 00 00 00 02 35 00 29 01 00 00 00 00 05 2a 00 00 02 cf 29 01 00 00 00 00 05 2b 00 00 04 ff 29 01 00 00 00 00 04 b9 03 15 1b 29 01 00 00 00 00 03 f1 a5 a5 29 01 00 00 00 00 03 fc a5 a5 29 01 00 00 00 00 03 f0 a5 a5]; | |
| qcom,on-cmds-dsi-state = "dsi_lp_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| samsung,panel-alpm-on-seq = <0x5010000 0x14000228 0x290100 0x3 0xf05a5a29 0x1000000 0x251ff 0x29010000 0x3f0 0xa5a52901 0x0 0x5300000 0x2901 0x0 0x2390029 0x1000000 0x21200>; | |
| samsung,panel-alpm-off-seq = [05 01 00 00 14 00 02 28 00 29 01 00 00 00 00 02 38 00 29 01 00 00 00 00 02 13 00]; | |
| samsung,panel-alpm-partial-area = [29 01 00 00 00 00 05 30 00 00 00 00 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-alpm-gamma-10cd = [29 01 00 00 00 00 02 51 7f]; | |
| samsung,panel-alpm-gamma-60cd = [29 01 00 00 00 00 02 51 ff]; | |
| samsung,panel-alpm-gamma-cmds = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 02 51 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-alpm-gamma-read-cmd = [06 01 00 00 00 00 01 bc 06 00]; | |
| samsung,panel-alpm-partial-area-index = <0x4>; | |
| samsung,panel-alpm-gamma-index = <0x2>; | |
| samsung,panel-alpm-gamma-para-index = <0x1>; | |
| samsung,panel-alpm-gamma-para-length = <0x1>; | |
| samsung,panel-test-key-enable-cmds = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3f15a5a>; | |
| samsung,panel-test-key-disable-cmds = <0x29010000 0x3f1 0xa5a52901 0x0 0x3f0a5a5>; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 03]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-mtp-read-sysfs-cmds = [06 01 00 00 00 00 01 00 00 00]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 a1 02 04]; | |
| samsung,panel-rddpm-read-cmds = [06 01 00 00 00 00 01 0a 01 00]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 00 c8 03 20 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 00 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 00 00 02 28 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00]; | |
| samsung,panel-elvss-lowtemp2-cmds-list = [29 01 00 00 00 00 02 b0 03 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 23 01 00 00 00 00 02 f7 01]; | |
| samsung,panel-etc-hbm-cmds = [29 01 00 00 00 00 02 b5 29 29 01 00 00 00 00 02 55 02 29 01 00 00 00 00 03 b6 4c 84 29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 29 01 00 00 00 00 02 f7 01 29 01 00 00 00 00 02 53 d0]; | |
| samsung,panel-hbm-off-enable-cmds = [29 01 00 00 00 00 02 53 00]; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0x80522 0x29010000 0x5b2 0x80517 0x29010000 0x5b2 0x8050d 0x29010000 0x5b2 0x80500 0x29010000 0x5b2 0x804f4 0x29010000 0x5b2 0x804e9 0x29010000 0x5b2 0x804dc 0x29010000 0x5b2 0x804d0 0x29010000 0x5b2 0x804c4 0x29010000 0x5b2 0x804b9 0x29010000 0x5b2 0x804ad 0x29010000 0x5b2 0x804a0 0x29010000 0x5b2 0x80495 0x29010000 0x5b2 0x80488 0x29010000 0x5b2 0x8047e 0x29010000 0x5b2 0x80472 0x29010000 0x5b2 0x8045b 0x29010000 0x5b2 0x8044e 0x29010000 0x5b2 0x80443 0x29010000 0x5b2 0x80437 0x29010000 0x5b2 0x8041f 0x29010000 0x5b2 0x80412 0x29010000 0x5b2 0x803fa 0x29010000 0x5b2 0x803e3 0x29010000 0x5b2 0x803d7 0x29010000 0x5b2 0x803be 0x29010000 0x5b2 0x803a6 0x29010000 0x5b2 0x80383 0x29010000 0x5b2 0x80368 0x29010000 0x5b2 0x8034e 0x29010000 0x5b2 0x8032b 0x29010000 0x5b2 0x80300 0x29010000 0x5b2 0x802df 0x29010000 0x5b2 0x802bd 0x29010000 0x5b2 0x80297 0x29010000 0x5b2 0x80265 0x29010000 0x5b2 0x80232 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x801c4 0x29010000 0x5b2 0x80186 0x29010000 0x5b2 0x80142 0x29010000 0x5b2 0x80100 0x29010000 0x5b2 0x800b4 0x29010000 0x5b2 0x80066 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008>; | |
| samsung,panel-aid-cmds-revD-list = <0x29010000 0x5b2 0x80522 0x29010000 0x5b2 0x80517 0x29010000 0x5b2 0x8050d 0x29010000 0x5b2 0x80500 0x29010000 0x5b2 0x804f4 0x29010000 0x5b2 0x804e9 0x29010000 0x5b2 0x804dc 0x29010000 0x5b2 0x804d0 0x29010000 0x5b2 0x804c4 0x29010000 0x5b2 0x804b9 0x29010000 0x5b2 0x804ad 0x29010000 0x5b2 0x804a0 0x29010000 0x5b2 0x80495 0x29010000 0x5b2 0x80488 0x29010000 0x5b2 0x8047e 0x29010000 0x5b2 0x80472 0x29010000 0x5b2 0x8045b 0x29010000 0x5b2 0x8044e 0x29010000 0x5b2 0x80443 0x29010000 0x5b2 0x80437 0x29010000 0x5b2 0x8041f 0x29010000 0x5b2 0x80412 0x29010000 0x5b2 0x803fa 0x29010000 0x5b2 0x803e3 0x29010000 0x5b2 0x803d7 0x29010000 0x5b2 0x803be 0x29010000 0x5b2 0x803a6 0x29010000 0x5b2 0x80383 0x29010000 0x5b2 0x80368 0x29010000 0x5b2 0x8034e 0x29010000 0x5b2 0x8032b 0x29010000 0x5b2 0x80300 0x29010000 0x5b2 0x802df 0x29010000 0x5b2 0x802bd 0x29010000 0x5b2 0x80297 0x29010000 0x5b2 0x80265 0x29010000 0x5b2 0x80232 0x29010000 0x5b2 0x80200 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801fb 0x29010000 0x5b2 0x801c6 0x29010000 0x5b2 0x80187 0x29010000 0x5b2 0x80142 0x29010000 0x5b2 0x800fc 0x29010000 0x5b2 0x800b4 0x29010000 0x5b2 0x80062 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008>; | |
| samsung,panel-aid-cmds-revF-list = <0x29010000 0x5b2 0x80526 0x29010000 0x5b2 0x8051a 0x29010000 0x5b2 0x80510 0x29010000 0x5b2 0x80504 0x29010000 0x5b2 0x804f8 0x29010000 0x5b2 0x804ee 0x29010000 0x5b2 0x804e2 0x29010000 0x5b2 0x804d6 0x29010000 0x5b2 0x804ca 0x29010000 0x5b2 0x804c0 0x29010000 0x5b2 0x804b2 0x29010000 0x5b2 0x804a8 0x29010000 0x5b2 0x8049a 0x29010000 0x5b2 0x80490 0x29010000 0x5b2 0x80483 0x29010000 0x5b2 0x80478 0x29010000 0x5b2 0x8045e 0x29010000 0x5b2 0x80454 0x29010000 0x5b2 0x80446 0x29010000 0x5b2 0x8043a 0x29010000 0x5b2 0x80422 0x29010000 0x5b2 0x80416 0x29010000 0x5b2 0x803fe 0x29010000 0x5b2 0x803e6 0x29010000 0x5b2 0x803da 0x29010000 0x5b2 0x803c2 0x29010000 0x5b2 0x803aa 0x29010000 0x5b2 0x80386 0x29010000 0x5b2 0x8036e 0x29010000 0x5b2 0x80356 0x29010000 0x5b2 0x80330 0x29010000 0x5b2 0x8030d 0x29010000 0x5b2 0x802e7 0x29010000 0x5b2 0x802c2 0x29010000 0x5b2 0x8029c 0x29010000 0x5b2 0x8026c 0x29010000 0x5b2 0x80236 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x80201 0x29010000 0x5b2 0x801c4 0x29010000 0x5b2 0x80184 0x29010000 0x5b2 0x80140 0x29010000 0x5b2 0x800fa 0x29010000 0x5b2 0x800b6 0x29010000 0x5b2 0x80065 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008>; | |
| samsung,panel-aid-cmds-revG-list = <0x29010000 0x5b2 0x80526 0x29010000 0x5b2 0x8051a 0x29010000 0x5b2 0x8050e 0x29010000 0x5b2 0x80504 0x29010000 0x5b2 0x804f8 0x29010000 0x5b2 0x804ec 0x29010000 0x5b2 0x804e0 0x29010000 0x5b2 0x804d4 0x29010000 0x5b2 0x804c8 0x29010000 0x5b2 0x804be 0x29010000 0x5b2 0x804b0 0x29010000 0x5b2 0x804a4 0x29010000 0x5b2 0x80498 0x29010000 0x5b2 0x8048c 0x29010000 0x5b2 0x8047e 0x29010000 0x5b2 0x80472 0x29010000 0x5b2 0x8045a 0x29010000 0x5b2 0x8044e 0x29010000 0x5b2 0x80440 0x29010000 0x5b2 0x80434 0x29010000 0x5b2 0x8041e 0x29010000 0x5b2 0x80411 0x29010000 0x5b2 0x803f8 0x29010000 0x5b2 0x803e0 0x29010000 0x5b2 0x803d4 0x29010000 0x5b2 0x803bc 0x29010000 0x5b2 0x803a4 0x29010000 0x5b2 0x8037e 0x29010000 0x5b2 0x80366 0x29010000 0x5b2 0x8034c 0x29010000 0x5b2 0x80328 0x29010000 0x5b2 0x80302 0x29010000 0x5b2 0x802dd 0x29010000 0x5b2 0x802b8 0x29010000 0x5b2 0x80290 0x29010000 0x5b2 0x8025e 0x29010000 0x5b2 0x8022c 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801f8 0x29010000 0x5b2 0x801c2 0x29010000 0x5b2 0x80184 0x29010000 0x5b2 0x80140 0x29010000 0x5b2 0x800fa 0x29010000 0x5b2 0x800b3 0x29010000 0x5b2 0x80062 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008 0x29010000 0x5b2 0x80008>; | |
| samsung,panel-aid-map-table = <0x2 0x0 0x4 0x2 0x5 0x3 0x6 0x4 0x8 0x6 0x9 0x7 0xa 0x8 0xc 0xa 0xd 0xb 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x25 0x48 0x26 0x4d 0x27 0x52 0x28 0x57 0x29 0x5d 0x2a 0x62 0x2b 0x69 0x2c 0x6f 0x2d 0x77 0x2e 0x7e 0x2f 0x86 0x30 0x8f 0x31 0x98 0x32 0xa2 0x33 0xac 0x34 0xb7 0x35 0xc3 0x36 0xcf 0x37 0xdc 0x38 0xea 0x39 0xf9 0x3a 0x109 0x3b 0x11a 0x3c 0x12c 0x3d 0x13c 0x3e 0x14d 0x3f 0x15e 0x40>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 02 b5 29]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 00 00 02 b5 21 29 01 00 00 00 00 02 55 00]; | |
| samsung,panel-acl-map-table = <0x2 0x2 0x4 0x2 0x5 0x2 0x6 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xc 0x2 0xd 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-list = <0x29010000 0x3b6 0x4c8d2901 0x0 0x3b64c8c 0x29010000 0x3b6 0x4c8b2901 0x0 0x3b64c8b 0x29010000 0x3b6 0x4c8b2901 0x0 0x3b64c8a 0x29010000 0x3b6 0x4c8a2901 0x0 0x3b64c89 0x29010000 0x3b6 0x4c892901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c87 0x29010000 0x3b6 0x4c872901 0x0 0x3b64c87 0x29010000 0x3b6 0x4c862901 0x0 0x3b64c86 0x29010000 0x3b6 0x4c852901 0x0 0x3b64c85 0x29010000 0x3b6 0x4c842901 0x0 0x3b64c84>; | |
| samsung,panel-smart-acl-elvss-cmds-list = <0x29010000 0x3b6 0x4c8d2901 0x0 0x3b64c8c 0x29010000 0x3b6 0x4c8b2901 0x0 0x3b64c8b 0x29010000 0x3b6 0x4c8b2901 0x0 0x3b64c8a 0x29010000 0x3b6 0x4c8a2901 0x0 0x3b64c89 0x29010000 0x3b6 0x4c892901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c88 0x29010000 0x3b6 0x4c882901 0x0 0x3b64c87 0x29010000 0x3b6 0x4c872901 0x0 0x3b64c87 0x29010000 0x3b6 0x4c862901 0x0 0x3b64c86 0x29010000 0x3b6 0x4c852901 0x0 0x3b64c85 0x29010000 0x3b6 0x4c842901 0x0 0x3b64c84>; | |
| samsung,panel-smart-acl-elvss-map-table = <0x2 0x16 0x4 0x14 0x5 0x14 0x6 0x12 0x8 0xf 0x9 0xf 0xa 0x9 0xc 0x7 0xd 0x7 0xf 0x5 0x10 0x2 0x11 0x2 0x13 0x1 0x14 0x1 0x15 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x0 0x2c 0x0 0x2f 0x0 0x32 0x0 0x35 0x0 0x38 0x0 0x3c 0x0 0x40 0x0 0x44 0x0 0x48 0x0 0x4d 0x1 0x52 0x1 0x57 0x1 0x5d 0x1 0x62 0x2 0x69 0x3 0x6f 0x4 0x77 0x5 0x7e 0x6 0x86 0x7 0x8f 0x8 0x98 0x9 0xa2 0xa 0xac 0xb 0xb7 0xc 0xc3 0xd 0xcf 0xe 0xdc 0xf 0xea 0x10 0xf9 0x11 0x109 0x12 0x11a 0x13 0x12c 0x14 0x13c 0x15 0x14d 0x16 0x15e 0x17>; | |
| samsung,panel-candella-mapping-table = <0x0 0x2 0x2 0x2 0x1 0x3 0x3 0x4 0x2 0x4 0x4 0x5 0x3 0x5 0x5 0x6 0x4 0x6 0x6 0x8 0x5 0x7 0x7 0x9 0x6 0x8 0x8 0xa 0x7 0x9 0x9 0xc 0x8 0xa 0xa 0xd 0x9 0xb 0xb 0xf 0xa 0xc 0xc 0x10 0xb 0xd 0xd 0x11 0xc 0xe 0xe 0x13 0xd 0xf 0xf 0x14 0xe 0x10 0x10 0x15 0xf 0x11 0x11 0x18 0x10 0x12 0x12 0x19 0x11 0x13 0x13 0x1b 0x12 0x14 0x15 0x1d 0x13 0x16 0x17 0x1e 0x14 0x18 0x18 0x20 0x15 0x19 0x1a 0x22 0x16 0x1b 0x1c 0x25 0x17 0x1d 0x1d 0x27 0x18 0x1e 0x20 0x29 0x19 0x21 0x22 0x2c 0x1a 0x23 0x24 0x2f 0x1b 0x25 0x26 0x32 0x1c 0x27 0x28 0x35 0x1d 0x29 0x2b 0x38 0x1e 0x2c 0x2e 0x3c 0x1f 0x2f 0x31 0x40 0x20 0x32 0x34 0x44 0x21 0x35 0x38 0x48 0x22 0x39 0x3b 0x4d 0x23 0x3c 0x3f 0x52 0x24 0x40 0x43 0x57 0x25 0x44 0x47 0x5d 0x26 0x48 0x4c 0x62 0x27 0x4d 0x50 0x69 0x28 0x51 0x56 0x6f 0x29 0x57 0x5b 0x77 0x2a 0x5c 0x61 0x7e 0x2b 0x62 0x68 0x86 0x2c 0x69 0x6e 0x8f 0x2d 0x6f 0x76 0x98 0x2e 0x77 0x7d 0xa2 0x2f 0x7e 0x85 0xac 0x30 0x86 0x8e 0xb7 0x31 0x8f 0x96 0xc3 0x32 0x97 0xa0 0xcf 0x33 0xa1 0xaa 0xdc 0x34 0xab 0xb5 0xea 0x35 0xb6 0xc1 0xf9 0x36 0xc2 0xcd 0x109 0x37 0xce 0xda 0x11a 0x38 0xdb 0xe6 0x12c 0x39 0xe7 0xf2 0x13c 0x3a 0xf3 0xfe 0x14d 0x3b 0xff 0xff 0x15e>; | |
| samsung,panel-aid-cmds-list-hmt = <0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-cmds-list-hmt-single = <0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-map-table-hmt = <0x50 0x0 0x5f 0x1 0x73 0x2 0x82 0x3>; | |
| }; | |
| mdss_dsi_samsung_1080p_cmd_mag { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dsi-panel"; | |
| label = "magna amoled 1080p command mode dsi ea8064g panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,cont-splash-enabled = <0x1>; | |
| qcom,enable-gpio = <0xb 0xe 0x0>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,te-gpio = <0x5 0xc 0x0>; | |
| qcom,panel-roi-alignment = <0x4 0x4 0x1 0x1 0x1 0x1>; | |
| qcom,partial-update-enabled; | |
| mdss-pan-broadcast-mode = <0x0>; | |
| qcom,mdss-pan-res = <0x438 0x780>; | |
| qcom,mdss-pan-size = <0x41 0x73>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,mdss-clk-rate = <0x35866480>; | |
| qcom,mdss-vsync-enable = <0x1>; | |
| qcom,mdss-hw-vsync-mode = <0x1>; | |
| qcom,mdss-pan-insert-dcs-cmd = <0x1>; | |
| qcom,mdss-pan-wr-mem-continue = <0x3c>; | |
| qcom,mdss-pan-wr-mem-start = <0x2c>; | |
| qcom,mdss-pan-te-sel = <0x1>; | |
| qcom,mdss-pan-clk-rate = <0x35866480>; | |
| qcom,mdss-pan-porch-values = <0x24 0xa 0xa2 0x3 0x2 0xd>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x1>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x8>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x0>; | |
| samsung,mdss-early-lcd-on = <0x1>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x30 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-tx-eot-append = <0x1>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0xfa4b4100 0x6681344b 0x410304a0>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3f15a5a 0x29010000 0x22ca 0x1000100 0x1008080 0x80808080 0x80808080 0x80808080 0x80808080 0x80808080 0x80800000 0x290100 0x5 0xb2000e00 0xe290100 0x3 0xb6588429 0x1000000 0x2b521 0x29010000 0x253 0x230100 0x2 0xf7032901 0x0 0x2b00129 0x1000000 0x2b804 0x29010000 0x4ba 0x32300129 0x1000000 0x23500 0x29010000 0x4b9 0x5171b05 0x1000078 0x21100 0x29010000 0x3f1 0xa5a52901 0x0 0x3f0a5a5>; | |
| qcom,on-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-display-off-seq = [05 01 00 00 0a 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| samsung,panel-alpm-on-seq = <0x5010000 0x14000228 0x290100 0x3 0xf05a5a29 0x1000000 0xabb01 0x7 0x804d4a5b 0x29010000 0x3f0 0xa5a52901 0x0 0x5300000 0x2901 0x0 0x2120029 0x1000014 0x23900>; | |
| samsung,panel-alpm-off-seq = [05 01 00 00 14 00 02 28 00 29 01 00 00 00 00 02 38 00 29 01 00 00 00 00 02 13 00]; | |
| samsung,panel-alpm-partial-area = [29 01 00 00 00 00 05 30 00 00 00 00 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-alpm-gamma-10cd = [29 01 00 00 00 00 0a bb 01 00 00 00 70 80 00 00 00]; | |
| samsung,panel-alpm-gamma-60cd = [29 01 00 00 00 00 0a bb 01 00 00 00 70 80 00 00 00]; | |
| samsung,panel-alpm-gamma-cmds = [29 01 00 00 00 00 03 f0 5a 5a 29 01 00 00 00 00 0a bb 01 00 00 00 07 80 00 00 00 29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-alpm-gamma-read-cmd = [06 01 00 00 00 00 01 bc 06 00]; | |
| samsung,panel-alpm-partial-area-index = <0x4>; | |
| samsung,panel-alpm-gamma-index = <0x2>; | |
| samsung,panel-alpm-gamma-para-index = <0x7>; | |
| samsung,panel-alpm-gamma-para-length = <0x3>; | |
| samsung,panel-test-key-enable-cmds = <0x29010000 0x3f0 0x5a5a2901 0x0 0x3f15a5a>; | |
| samsung,panel-test-key-disable-cmds = <0x29010000 0x3f1 0xa5a52901 0x0 0x3f0a5a5>; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 03]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = [29 01 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-nv-read-disable-cmds = [29 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-mtp-read-sysfs-cmds = [06 01 00 00 00 00 01 00 00 00]; | |
| samsung,panel-manufacture-id-read-cmds = [06 01 00 00 00 00 01 da 01 00 06 01 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 a1 02 04]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-ldi-debug-read-cmds = [06 01 00 00 00 00 01 0a 01 00 06 01 00 00 00 00 01 0e 01 00 06 01 00 00 00 00 01 ea 08 00]; | |
| samsung,panel-ldi-fps-write-cmds = [29 01 00 00 00 00 02 b0 1a 29 01 00 00 00 00 02 d7 00]; | |
| samsung,panel-ldi-fps-read-cmds = [06 01 00 00 00 00 01 d7 01 1a]; | |
| samsung,panel-ldi-partial-disp-on = [29 01 00 00 00 00 05 30 00 c8 03 20 29 01 00 00 00 00 02 12 00]; | |
| samsung,panel-ldi-partial-disp-off = [29 01 00 00 00 00 02 13 00]; | |
| qcom,panel-display-on-cmds = [05 01 00 00 32 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [05 01 00 00 32 00 02 28 00]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 05 29 01 00 00 00 00 02 b8 00]; | |
| samsung,panel-elvss-lowtemp2-cmds-list = [29 01 00 00 00 00 02 b0 03 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-gamma-cmds-list = [29 01 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 23 01 00 00 00 00 02 f7 03]; | |
| samsung,panel-etc-hbm-cmds = [29 01 00 00 00 00 02 b5 29 29 01 00 00 00 00 02 53 d0]; | |
| samsung,panel-hbm-off-enable-cmds = [29 01 00 00 00 00 02 53 00]; | |
| samsung,panel-aid-cmds-list = <0x29010000 0x5b2 0xe0768 0x29010000 0x5b2 0xe0758 0x29010000 0x5b2 0xe0749 0x29010000 0x5b2 0xe0739 0x29010000 0x5b2 0xe0729 0x29010000 0x5b2 0xe0719 0x29010000 0x5b2 0xe0709 0x29010000 0x5b2 0xe06f8 0x29010000 0x5b2 0xe06e7 0x29010000 0x5b2 0xe06d7 0x29010000 0x5b2 0xe06c8 0x29010000 0x5b2 0xe06b7 0x29010000 0x5b2 0xe06a5 0x29010000 0x5b2 0xe0695 0x29010000 0x5b2 0xe0683 0x29010000 0x5b2 0xe0673 0x29010000 0x5b2 0xe0653 0x29010000 0x5b2 0xe062f 0x29010000 0x5b2 0xe0627 0x29010000 0x5b2 0xe0617 0x29010000 0x5b2 0xe05ff 0x29010000 0x5b2 0xe05ef 0x29010000 0x5b2 0xe05cc 0x29010000 0x5b2 0xe05ab 0x29010000 0x5b2 0xe0598 0x29010000 0x5b2 0xe0576 0x29010000 0x5b2 0xe0553 0x29010000 0x5b2 0xe051d 0x29010000 0x5b2 0xe04fb 0x29010000 0x5b2 0xe04d2 0x29010000 0x5b2 0xe049e 0x29010000 0x5b2 0xe0462 0x29010000 0x5b2 0xe042b 0x29010000 0x5b2 0xe03ed 0x29010000 0x5b2 0xe03ad 0x29010000 0x5b2 0xe0356 0x29010000 0x5b2 0xe0329 0x29010000 0x5b2 0xe02be 0x29010000 0x5b2 0xe0267 0x29010000 0x5b2 0xe021d 0x29010000 0x5b2 0xe01bd 0x29010000 0x5b2 0xe014e 0x29010000 0x5b2 0xe00d6 0x29010000 0x5b2 0xe0053 0x29010000 0x5b2 0xe000e>; | |
| samsung,panel-aid-map-table = <0x2 0x0 0x4 0x2 0x5 0x3 0x6 0x4 0x8 0x6 0x9 0x7 0xa 0x8 0xc 0xa 0xd 0xb 0xf 0xd 0x10 0xe 0x11 0xf 0x13 0x10 0x14 0x11 0x15 0x12 0x18 0x14 0x19 0x15 0x1b 0x16 0x1d 0x17 0x1e 0x18 0x20 0x19 0x22 0x1a 0x25 0x1b 0x27 0x1c 0x29 0x1d 0x2c 0x1e 0x2f 0x1f 0x32 0x20 0x35 0x21 0x38 0x22 0x3c 0x23 0x40 0x24 0x44 0x24 0x48 0x24 0x4d 0x24 0x52 0x24 0x57 0x24 0x5d 0x24 0x62 0x24 0x69 0x24 0x6f 0x24 0x77 0x24 0x7e 0x24 0x86 0x24 0x8f 0x24 0x98 0x24 0xa2 0x25 0xac 0x26 0xb7 0x27 0xc3 0x28 0xcf 0x29 0xdc 0x2a 0xea 0x2b 0xf9 0x2c 0x109 0x2c 0x11a 0x2c 0x12c 0x2c 0x13c 0x2c 0x14d 0x2c 0x15e 0x2c>; | |
| samsung,panel-aclcont-cmds-list = [29 01 00 00 00 00 02 b5 29]; | |
| samsung,panel-acl-cmds-list = <0x29010000 0x255 0x290100 0x2 0x55012901 0x0 0x2550229 0x1000000 0x25503>; | |
| samsung,panel-acl-off-cmds = [29 01 00 00 00 00 02 b5 21 29 01 00 00 00 00 02 55 00]; | |
| samsung,panel-acl-map-table = <0x2 0x2 0x4 0x2 0x5 0x2 0x6 0x2 0x8 0x2 0x9 0x2 0xa 0x2 0xc 0x2 0xd 0x2 0xf 0x2 0x10 0x2 0x11 0x2 0x13 0x2 0x14 0x2 0x15 0x2 0x18 0x2 0x19 0x2 0x1b 0x2 0x1d 0x2 0x1e 0x2 0x20 0x2 0x22 0x2 0x25 0x2 0x27 0x2 0x29 0x2 0x2c 0x2 0x2f 0x2 0x32 0x2 0x35 0x2 0x38 0x2 0x3c 0x2 0x40 0x2 0x44 0x2 0x48 0x2 0x4d 0x2 0x52 0x2 0x57 0x2 0x5d 0x2 0x62 0x2 0x69 0x2 0x6f 0x2 0x77 0x2 0x7e 0x2 0x86 0x2 0x8f 0x2 0x98 0x2 0xa2 0x2 0xac 0x2 0xb7 0x2 0xc3 0x2 0xcf 0x2 0xdc 0x2 0xea 0x2 0xf9 0x2 0x109 0x2 0x11a 0x2 0x12c 0x2 0x13c 0x2 0x14d 0x2 0x15e 0x2>; | |
| samsung,panel-elvss-cmds-list = [29 01 00 00 00 00 03 b6 48 8b 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8f 29 01 00 00 00 00 03 b6 48 90 29 01 00 00 00 00 03 b6 48 8f 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8b 29 01 00 00 00 00 03 b6 48 8a 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 88 29 01 00 00 00 00 03 b6 48 87 29 01 00 00 00 00 03 b6 48 86 29 01 00 00 00 00 03 b6 48 86 29 01 00 00 00 00 03 b6 48 85 29 01 00 00 00 00 03 b6 48 84]; | |
| samsung,panel-smart-acl-elvss-cmds-list = [29 01 00 00 00 00 03 b6 48 8b 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8f 29 01 00 00 00 00 03 b6 48 90 29 01 00 00 00 00 03 b6 48 8f 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8e 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8d 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8c 29 01 00 00 00 00 03 b6 48 8b 29 01 00 00 00 00 03 b6 48 8a 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 89 29 01 00 00 00 00 03 b6 48 88 29 01 00 00 00 00 03 b6 48 87 29 01 00 00 00 00 03 b6 48 86 29 01 00 00 00 00 03 b6 48 86 29 01 00 00 00 00 03 b6 48 85 29 01 00 00 00 00 03 b6 48 84]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x2 0x0 0x4 0x0 0x5 0x0 0x6 0x0 0x8 0x0 0x9 0x0 0xa 0x0 0xc 0x0 0xd 0x0 0xf 0x0 0x10 0x0 0x11 0x0 0x13 0x0 0x14 0x0 0x15 0x0 0x18 0x0 0x19 0x0 0x1b 0x0 0x1d 0x0 0x1e 0x0 0x20 0x0 0x22 0x0 0x25 0x0 0x27 0x0 0x29 0x1 0x2c 0x2 0x2f 0x3 0x32 0x4 0x35 0x5 0x38 0x6 0x3c 0x7 0x40 0x7 0x44 0x7 0x48 0x7 0x4d 0x7 0x52 0x8 0x57 0x8 0x5d 0x8 0x62 0x9 0x69 0xa 0x6f 0xb 0x77 0xc 0x7e 0xd 0x86 0xe 0x8f 0xf 0x98 0x10 0xa2 0x11 0xac 0x12 0xb7 0x13 0xc3 0x14 0xcf 0x15 0xdc 0x16 0xea 0x17 0xf9 0x18 0x109 0x19 0x11a 0x1a 0x12c 0x1b 0x13c 0x1c 0x14d 0x1d 0x15e 0x1e>; | |
| samsung,panel-candella-mapping-table = <0x0 0x2 0x2 0x2 0x1 0x3 0x3 0x4 0x2 0x4 0x4 0x5 0x3 0x5 0x5 0x6 0x4 0x6 0x6 0x8 0x5 0x7 0x7 0x9 0x6 0x8 0x8 0xa 0x7 0x9 0x9 0xc 0x8 0xa 0xa 0xd 0x9 0xb 0xb 0xf 0xa 0xc 0xc 0x10 0xb 0xd 0xd 0x11 0xc 0xe 0xe 0x13 0xd 0xf 0xf 0x14 0xe 0x10 0x10 0x15 0xf 0x11 0x11 0x18 0x10 0x12 0x12 0x19 0x11 0x13 0x13 0x1b 0x12 0x14 0x15 0x1d 0x13 0x16 0x17 0x1e 0x14 0x18 0x18 0x20 0x15 0x19 0x1a 0x22 0x16 0x1b 0x1c 0x25 0x17 0x1d 0x1d 0x27 0x18 0x1e 0x20 0x29 0x19 0x21 0x22 0x2c 0x1a 0x23 0x24 0x2f 0x1b 0x25 0x26 0x32 0x1c 0x27 0x28 0x35 0x1d 0x29 0x2b 0x38 0x1e 0x2c 0x2e 0x3c 0x1f 0x2f 0x31 0x40 0x20 0x32 0x34 0x44 0x21 0x35 0x38 0x48 0x22 0x39 0x3b 0x4d 0x23 0x3c 0x3f 0x52 0x24 0x40 0x43 0x57 0x25 0x44 0x47 0x5d 0x26 0x48 0x4c 0x62 0x27 0x4d 0x50 0x69 0x28 0x51 0x56 0x6f 0x29 0x57 0x5b 0x77 0x2a 0x5c 0x61 0x7e 0x2b 0x62 0x68 0x86 0x2c 0x69 0x6e 0x8f 0x2d 0x6f 0x76 0x98 0x2e 0x77 0x7d 0xa2 0x2f 0x7e 0x85 0xac 0x30 0x86 0x8e 0xb7 0x31 0x8f 0x96 0xc3 0x32 0x97 0xa0 0xcf 0x33 0xa1 0xaa 0xdc 0x34 0xab 0xb5 0xea 0x35 0xb6 0xc1 0xf9 0x36 0xc2 0xcd 0x109 0x37 0xce 0xda 0x11a 0x38 0xdb 0xe6 0x12c 0x39 0xe7 0xf2 0x13c 0x3a 0xf3 0xfe 0x14d 0x3b 0xff 0xff 0x15e>; | |
| samsung,panel-aid-cmds-list-hmt = <0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x2a6e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x244e006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-cmds-list-hmt-single = <0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x54ce006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff 0x29010000 0xdb2 0x48ae006 0xe0060608 0x18ffffff>; | |
| samsung,panel-aid-map-table-hmt = <0x50 0x0 0x5f 0x1 0x73 0x2 0x82 0x3>; | |
| linux,phandle = <0x31>; | |
| phandle = <0x31>; | |
| }; | |
| mdss_dsi_magna_wxga_video_dual { | |
| qcom,mdss-dsi-panel-name = "samsung,mdss-amoled-dsi-panel"; | |
| label = "samsung amoled wxga video mode dsi EA8061V panel"; | |
| status = "disable"; | |
| qcom,mdss-dsi-panel-controller = <0x28>; | |
| qcom,rst-gpio = <0xb 0x11 0x0>; | |
| qcom,esd-irq-gpio = <0xb 0x4 0x0>; | |
| qcom,lcd-crack-det-gpio = <0x5 0x40 0x0>; | |
| qcom,lcd-sel-gpio = <0x5 0x39 0x0>; | |
| qcom,mdss-pan-clk-rate = <0x1dcd6500>; | |
| qcom,mdss-pan-res = <0x300 0x500>; | |
| qcom,mdss-pan-size = <0x3c 0x6a>; | |
| qcom,mdss-pan-bpp = <0x18>; | |
| qcom,mdss-pan-dest = "display_1"; | |
| qcom,mdss-pan-porch-values = <0x64 0x60 0x64 0x8 0x2 0xe>; | |
| qcom,mdss-pan-underflow-clr = <0xff>; | |
| qcom,mdss-pan-bl-ctrl = "bl_ctrl_dcs_cmds"; | |
| qcom,mdss-pan-bl-levels = <0x1 0xff>; | |
| qcom,mdss-pan-dsi-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-pulse-mode = <0x0>; | |
| qcom,mdss-pan-dsi-h-power-stop = <0x0 0x0 0x0>; | |
| qcom,mdss-pan-dsi-bllp-power-stop = <0x1 0x1>; | |
| qcom,mdss-pan-dsi-traffic-mode = <0x2>; | |
| qcom,mdss-pan-dsi-dst-format = <0x3>; | |
| qcom,mdss-pan-dsi-vc = <0x0>; | |
| qcom,mdss-pan-dsi-rgb-swap = <0x0>; | |
| qcom,mdss-force-clk-lane-hs = <0x1>; | |
| samsung,mdss-early-lcd-on = <0x0>; | |
| qcom,mdss-pan-dsi-data-lanes = <0x1 0x1 0x1 0x1>; | |
| qcom,mdss-pan-dsi-dlane-swap = <0x0>; | |
| qcom,mdss-pan-dsi-t-clk = <0x34 0x4>; | |
| qcom,mdss-pan-dsi-stream = <0x0>; | |
| qcom,mdss-pan-dsi-mdp-tr = <0x0>; | |
| qcom,mdss-pan-dsi-dma-tr = <0x4>; | |
| qcom,mdss-pan-dsi-tx-eot-append = <0x1>; | |
| qcom,mdss-pan-dsi-frame-rate = <0x3c>; | |
| qcom,cont-splash-enabled; | |
| qcom,panel-phy-regulatorSettings = [07 09 03 00 20 00 01]; | |
| qcom,panel-phy-timingSettings = <0x8b1e1400 0x444a2835 0x29030400>; | |
| qcom,panel-phy-strengthCtrl = [ff 06]; | |
| qcom,panel-phy-bistCtrl = [00 00 b1 ff 00 00]; | |
| qcom,panel-phy-laneConfig = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,panel-display-on-seq = [39 00 00 00 00 00 03 f0 5a 5a 39 00 00 00 00 00 03 f1 5a 5a 39 00 00 00 00 00 03 b8 00 00 39 00 00 00 00 00 02 ba 56 39 00 00 00 00 00 03 fc 5a 5a 39 00 00 00 00 00 02 b0 0b 39 00 00 00 00 00 03 d2 00 85 39 00 00 00 00 00 02 b0 05 39 00 00 00 00 00 02 fe 0c 39 00 00 00 00 00 03 fc a5 a5 39 00 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 39 00 00 00 00 00 05 b2 00 06 00 0b 39 00 00 00 00 00 03 b6 58 8a 39 00 00 00 00 00 02 f7 01 39 00 00 00 00 00 02 b5 21 39 00 00 00 00 00 02 55 00 39 00 00 00 00 00 02 f7 01 39 00 00 00 00 00 02 b9 05 39 00 00 00 78 00 02 11 00 39 00 00 00 00 00 03 f0 a5 a5 39 01 00 00 00 00 03 f1 a5 a5]; | |
| qcom,on-cmds-dsi-state = "dsi_hs_mode"; | |
| qcom,panel-display-off-seq = [05 00 00 00 24 00 02 28 00 05 01 00 00 78 00 02 10 00]; | |
| qcom,off-cmds-dsi-state = "dsi_hs_mode"; | |
| samsung,panel-test-key-enable-cmds = [39 00 00 00 00 00 03 f0 5a 5a]; | |
| samsung,panel-test-key-disable-cmds = [39 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-nv-mtp-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-mtp-read-hbm-cmds = [06 01 00 00 00 00 01 c8 07 21]; | |
| samsung,panel-nv-mtp-read-hbm2-cmds = [06 01 00 00 00 00 01 c8 0f 2a]; | |
| samsung,panel-nv-mdnie-read-cmds = [06 01 00 00 00 00 01 a1 04 00]; | |
| samsung,panel-nv-read-cmds = [06 01 00 00 00 00 01 c8 21 00]; | |
| samsung,panel-nv-read-enable-cmds = [39 00 00 00 00 00 03 f0 5a 5a 39 00 00 00 00 00 03 fc 5a 5a 39 01 00 00 00 00 03 f1 5a 5a]; | |
| samsung,panel-nv-read-disable-cmds = [39 01 00 00 00 00 03 f0 a5 a5]; | |
| samsung,panel-mtp-read-sysfs-cmds = [06 01 00 00 00 00 01 00 00 00]; | |
| samsung,panel-temp-read-cmd = [06 00 00 00 00 00 01 c8 01 00]; | |
| samsung,panel-nv-mtp-read-elvss-cmds = [06 01 00 00 00 00 01 b6 01 03]; | |
| samsung,panel-manufacture-id-read-cmds = [06 00 00 00 00 00 01 da 01 00 06 00 00 00 00 00 01 db 01 00 06 01 00 00 00 00 01 dc 01 00]; | |
| samsung,panel-manufacture-date-read-cmds = [06 01 00 00 00 00 01 c8 02 28]; | |
| samsung,panel-ddi-id-read-cmds = [06 01 00 00 00 00 01 d6 05 00]; | |
| samsung,panel-rddpm-read-cmds = [06 01 00 00 00 00 01 0a 01 00]; | |
| qcom,panel-display-on-cmds = [39 01 00 00 00 00 02 29 00]; | |
| qcom,panel-display-off-cmds = [39 01 00 00 32 00 02 28 00]; | |
| qcom,panel-display-unblank-cmds = [39 01 00 00 32 00 02 13 00]; | |
| qcom,panel-display-blank-cmds = [39 01 00 00 45 00 02 22 00]; | |
| samsung,panel-acl-off-cmds = [39 00 00 00 72 00 02 55 00]; | |
| samsung,panel-gamma-cmds-list = [39 00 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00 39 00 00 00 00 00 02 f7 01]; | |
| samsung,panel-gamma-hbm-cmds-list-main = [39 00 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-gamma-hbm-cmds-list-sub = [39 00 00 00 00 00 22 ca 01 00 01 00 01 00 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 80 00 00 00]; | |
| samsung,panel-etc-hbm-cmds = [39 00 00 00 00 00 05 b2 00 06 00 0b 39 00 00 00 00 00 03 b6 48 8a 39 00 00 00 00 00 02 b0 03 39 00 00 00 00 00 02 b6 00 39 00 00 00 00 00 02 b5 29 39 00 00 00 00 00 02 55 01 39 00 00 00 00 00 02 f7 01]; | |
| samsung,panel-etc-hbm-cmds-main = [39 00 00 00 00 00 05 b2 00 06 00 0b 39 00 00 00 00 00 03 b6 48 8a 39 00 00 00 00 00 02 b0 03 39 00 00 00 00 00 02 b6 00 39 00 00 00 00 00 02 b5 29 39 00 00 00 00 00 02 55 01 39 00 00 00 00 00 02 f7 01]; | |
| samsung,panel-etc-hbm-cmds-sub = [39 00 00 00 00 00 05 b2 00 06 00 0b 39 00 00 00 00 00 03 b6 48 8a 39 00 00 00 00 00 02 b0 03 39 00 00 00 00 00 02 b6 00 39 00 00 00 00 00 02 b5 29 39 00 00 00 00 00 02 55 01 39 00 00 00 00 00 02 f7 01]; | |
| samsung,panel-aid-cmds-list = <0x39000000 0x5b2 0x604de 0x39000000 0x5b2 0x604d3 0x39000000 0x5b2 0x604c7 0x39000000 0x5b2 0x604bd 0x39000000 0x5b2 0x604b1 0x39000000 0x5b2 0x604a5 0x39000000 0x5b2 0x60499 0x39000000 0x5b2 0x6048f 0x39000000 0x5b2 0x60482 0x39000000 0x5b2 0x60476 0x39000000 0x5b2 0x6046a 0x39000000 0x5b2 0x6045e 0x39000000 0x5b2 0x60452 0x39000000 0x5b2 0x6043b 0x39000000 0x5b2 0x6042e 0x39000000 0x5b2 0x60422 0x39000000 0x5b2 0x60418 0x39000000 0x5b2 0x60401 0x39000000 0x5b2 0x603f5 0x39000000 0x5b2 0x603dd 0x39000000 0x5b2 0x603c4 0x39000000 0x5b2 0x603b8 0x39000000 0x5b2 0x603a1 0x39000000 0x5b2 0x6038a 0x39000000 0x5b2 0x60366 0x39000000 0x5b2 0x6034c 0x39000000 0x5b2 0x60335 0x39000000 0x5b2 0x60310 0x39000000 0x5b2 0x602ed 0x39000000 0x5b2 0x602c8 0x39000000 0x5b2 0x602a5 0x39000000 0x5b2 0x6027e 0x39000000 0x5b2 0x60250 0x39000000 0x5b2 0x6021d 0x39000000 0x5b2 0x601eb 0x39000000 0x5b2 0x601eb 0x39000000 0x5b2 0x601b5 0x39000000 0x5b2 0x60179 0x39000000 0x5b2 0x60136 0x39000000 0x5b2 0x600f4 0x39000000 0x5b2 0x600aa 0x39000000 0x5b2 0x60061 0x39000000 0x5b2 0x6000b>; | |
| samsung,panel-aid-map-table = <0x5 0x0 0x6 0x1 0x7 0x2 0x8 0x3 0x9 0x4 0xa 0x5 0xb 0x6 0xc 0x7 0xd 0x8 0xe 0x9 0xf 0xa 0x10 0xb 0x11 0xc 0x13 0xd 0x14 0xe 0x15 0xf 0x16 0x10 0x18 0x11 0x19 0x12 0x1b 0x13 0x1d 0x14 0x1e 0x15 0x20 0x16 0x22 0x17 0x25 0x18 0x27 0x19 0x29 0x1a 0x2c 0x1b 0x2f 0x1c 0x32 0x1d 0x35 0x1e 0x38 0x1f 0x3c 0x20 0x40 0x21 0x44 0x22 0x48 0x22 0x4d 0x22 0x52 0x22 0x57 0x22 0x5d 0x22 0x62 0x22 0x69 0x22 0x6f 0x22 0x77 0x22 0x7e 0x22 0x86 0x22 0x8f 0x22 0x98 0x22 0xa2 0x23 0xac 0x24 0xb7 0x25 0xc3 0x26 0xcf 0x27 0xdc 0x28 0xea 0x29 0xf9 0x2a 0x109 0x2a 0x11a 0x2a 0x12c 0x2a 0x13c 0x2a 0x14d 0x2a 0x15e 0x2a>; | |
| samsung,panel-aclcont-cmds-list = [39 00 00 00 00 00 02 b5 29]; | |
| samsung,panel-acl-cmds-list = <0x39000000 0x255 0x390000 0x2 0x55013900 0x0 0x2550239 0x0 0x25503>; | |
| samsung,panel-acl-map-table = <0x2 0x1 0x3 0x1 0x4 0x1 0x5 0x1 0x6 0x1 0x7 0x1 0x8 0x1 0x9 0x1 0xa 0x1 0xb 0x1 0xc 0x1 0xd 0x1 0xe 0x1 0xf 0x1 0x10 0x1 0x11 0x1 0x13 0x1 0x14 0x1 0x15 0x1 0x16 0x1 0x18 0x1 0x19 0x1 0x1b 0x1 0x1d 0x1 0x1e 0x1 0x20 0x1 0x22 0x1 0x25 0x1 0x27 0x1 0x29 0x1 0x2c 0x1 0x2f 0x1 0x32 0x1 0x35 0x1 0x38 0x1 0x3c 0x1 0x40 0x1 0x44 0x1 0x48 0x1 0x4d 0x1 0x52 0x1 0x57 0x1 0x5d 0x1 0x62 0x1 0x69 0x1 0x6f 0x1 0x77 0x1 0x7e 0x1 0x86 0x1 0x8f 0x1 0x98 0x1 0xa2 0x1 0xac 0x1 0xb7 0x1 0xc3 0x1 0xcf 0x1 0xdc 0x1 0xea 0x1 0xf9 0x1 0x109 0x1 0x11a 0x1 0x12c 0x1 0x13c 0x1 0x14d 0x1 0x15e 0x1>; | |
| samsung,panel-elvss-common-cmds-list = [29 01 00 00 00 00 02 b8 00 29 01 00 00 00 00 03 b6 00 00]; | |
| samsung,panel-smart-elvss-hightemp-cmds-list = [29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8c 29 01 00 00 00 00 03 b6 00 8c 29 01 00 00 00 00 03 b6 00 8d 29 01 00 00 00 00 03 b6 00 8e 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 90 29 01 00 00 00 00 03 b6 00 91 29 01 00 00 00 00 03 b6 00 91 29 01 00 00 00 00 03 b6 00 92 29 01 00 00 00 00 03 b6 00 92 29 01 00 00 00 00 03 b6 00 93 29 01 00 00 00 00 03 b6 00 93 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 95 29 01 00 00 00 00 03 b6 00 95]; | |
| samsung,panel-smart-acl-hightemp-cmds-list = [29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8c 29 01 00 00 00 00 03 b6 00 8c 29 01 00 00 00 00 03 b6 00 8d 29 01 00 00 00 00 03 b6 00 8e 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 8f 29 01 00 00 00 00 03 b6 00 90 29 01 00 00 00 00 03 b6 00 91 29 01 00 00 00 00 03 b6 00 91 29 01 00 00 00 00 03 b6 00 92 29 01 00 00 00 00 03 b6 00 92 29 01 00 00 00 00 03 b6 00 93 29 01 00 00 00 00 03 b6 00 93 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 94 29 01 00 00 00 00 03 b6 00 95 29 01 00 00 00 00 03 b6 00 95]; | |
| samsung,panel-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 02 b0 03 29 01 00 00 00 00 02 b6 00]; | |
| samsung,panel-smart-elvss-lowtemp-cmds-list = [29 01 00 00 00 00 03 b6 00 80 29 01 00 00 00 00 03 b6 00 81 29 01 00 00 00 00 03 b6 00 81 29 01 00 00 00 00 03 b6 00 82 29 01 00 00 00 00 03 b6 00 82 29 01 00 00 00 00 03 b6 00 83 29 01 00 00 00 00 03 b6 00 84 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 86 29 01 00 00 00 00 03 b6 00 87 29 01 00 00 00 00 03 b6 00 87 29 01 00 00 00 00 03 b6 00 88 29 01 00 00 00 00 03 b6 00 88 29 01 00 00 00 00 03 b6 00 89 29 01 00 00 00 00 03 b6 00 89 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8b]; | |
| samsung,panel-smart-acl-lowtemp-cmds-list = [29 01 00 00 00 00 03 b6 00 80 29 01 00 00 00 00 03 b6 00 81 29 01 00 00 00 00 03 b6 00 81 29 01 00 00 00 00 03 b6 00 82 29 01 00 00 00 00 03 b6 00 82 29 01 00 00 00 00 03 b6 00 83 29 01 00 00 00 00 03 b6 00 84 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 85 29 01 00 00 00 00 03 b6 00 86 29 01 00 00 00 00 03 b6 00 87 29 01 00 00 00 00 03 b6 00 87 29 01 00 00 00 00 03 b6 00 88 29 01 00 00 00 00 03 b6 00 88 29 01 00 00 00 00 03 b6 00 89 29 01 00 00 00 00 03 b6 00 89 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8a 29 01 00 00 00 00 03 b6 00 8b 29 01 00 00 00 00 03 b6 00 8b]; | |
| samsung,panel-smart-acl-elvss-map-table = <0x5 0x1a 0x6 0x1a 0x7 0x1a 0x8 0x1a 0x9 0x1a 0xa 0x1a 0xb 0x1a 0xc 0x1a 0xd 0x1a 0xe 0x1a 0xf 0x1a 0x10 0x1a 0x11 0x1a 0x13 0x1a 0x14 0x1a 0x15 0x1a 0x16 0x1a 0x18 0x1a 0x19 0x1a 0x1b 0x1a 0x1d 0x1a 0x1e 0x1a 0x20 0x1a 0x22 0x1a 0x25 0x1a 0x27 0x1a 0x29 0x1a 0x2c 0x1a 0x2f 0x1a 0x32 0x1a 0x35 0x1a 0x38 0x1a 0x3c 0x1a 0x40 0x1a 0x44 0x1a 0x48 0x1a 0x4d 0x19 0x52 0x18 0x57 0x17 0x5d 0x16 0x62 0x15 0x69 0x14 0x6f 0x13 0x77 0x12 0x7e 0x11 0x86 0x10 0x8f 0xf 0x98 0xe 0xa2 0xd 0xac 0xc 0xb7 0xb 0xc3 0xa 0xcf 0x9 0xdc 0x8 0xea 0x7 0xf9 0x6 0x109 0x5 0x11a 0x4 0x12c 0x3 0x13c 0x2 0x14d 0x1 0x168 0x0>; | |
| samsung,panel-candella-mapping-table = <0x0 0x0 0x0 0x5 0x1 0x1 0x1 0x6 0x2 0x2 0x2 0x7 0x3 0x3 0x3 0x8 0x4 0x4 0x4 0x9 0x5 0x5 0x5 0xa 0x6 0x6 0x6 0xb 0x7 0x7 0x7 0xc 0x8 0x8 0x8 0xd 0x9 0x9 0x9 0xe 0xa 0xa 0xa 0xf 0xb 0xb 0xb 0x10 0xc 0xc 0xc 0x11 0xd 0xd 0xd 0x13 0xe 0xe 0xe 0x14 0xf 0xf 0xf 0x15 0x10 0x10 0x10 0x16 0x11 0x11 0x11 0x18 0x12 0x12 0x12 0x19 0x13 0x13 0x13 0x1b 0x14 0x14 0x15 0x1d 0x15 0x16 0x17 0x1e 0x16 0x18 0x18 0x20 0x17 0x19 0x1a 0x22 0x18 0x1b 0x1c 0x25 0x19 0x1d 0x1d 0x27 0x1a 0x1e 0x20 0x29 0x1b 0x21 0x22 0x2c 0x1c 0x23 0x24 0x2f 0x1d 0x25 0x26 0x32 0x1e 0x27 0x28 0x35 0x1f 0x29 0x2b 0x38 0x20 0x2c 0x2e 0x3c 0x21 0x2f 0x31 0x40 0x22 0x32 0x34 0x44 0x23 0x35 0x38 0x48 0x24 0x39 0x3b 0x4d 0x25 0x3c 0x3f 0x52 0x26 0x40 0x43 0x57 0x27 0x44 0x47 0x5d 0x28 0x48 0x4c 0x62 0x29 0x4d 0x50 0x69 0x2a 0x51 0x56 0x6f 0x2b 0x57 0x5b 0x77 0x2c 0x5c 0x61 0x7e 0x2d 0x62 0x68 0x86 0x2e 0x69 0x6e 0x8f 0x2f 0x6f 0x76 0x98 0x30 0x77 0x7d 0xa2 0x31 0x7e 0x85 0xac 0x32 0x86 0x8e 0xb7 0x33 0x8f 0x96 0xc3 0x34 0x97 0xa0 0xcf 0x35 0xa1 0xaa 0xdc 0x36 0xab 0xb5 0xea 0x37 0xb6 0xc1 0xf9 0x38 0xc2 0xcd 0x109 0x39 0xce 0xda 0x11a 0x3a 0xdb 0xe6 0x12c 0x3b 0xe7 0xf2 0x13c 0x3c 0xf3 0xfe 0x14d 0x3d 0xff 0xff 0x168>; | |
| }; | |
| }; | |
| qcom,mdss_dsi@fd922800 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->0"; | |
| cell-index = <0x0>; | |
| reg = <0xfd922800 0x1f8 0xfd922b00 0x2b0 0xfdf30000 0x108>; | |
| reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys"; | |
| vdd-supply = <0x2a>; | |
| vddio-supply = <0x2>; | |
| vdda-supply = <0x2b>; | |
| qcom,mdss-fb-map = <0x2c>; | |
| qcom,mdss-mdp = <0x2d>; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [03 09 03 00 20 00 01]; | |
| qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,platform-reset-gpio = <0xb 0x14 0x0>; | |
| iovdd-supply = <0x2e>; | |
| qcom,dsi-pref-prim-pan-dual = <0x2f>; | |
| qcom,dsi-pref-prim-pan = <0x30>; | |
| qcom,dsi-pref-prim-pan-magna = <0x31>; | |
| linux,phandle = <0x28>; | |
| phandle = <0x28>; | |
| qcom,platform-supply-entry1 { | |
| qcom,supply-name = "vdd"; | |
| qcom,supply-min-voltage = <0x2dc6c0>; | |
| qcom,supply-max-voltage = <0x2dc6c0>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| qcom,platform-supply-entry2 { | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| qcom,platform-supply-entry3 { | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| }; | |
| qcom,mdss_dsi@fd922e00 { | |
| compatible = "qcom,mdss-dsi-ctrl"; | |
| label = "MDSS DSI CTRL->1"; | |
| cell-index = <0x1>; | |
| reg = <0xfd922e00 0x1f8 0xfd923100 0x2b0 0xfdf30000 0x108>; | |
| reg-names = "dsi_ctrl", "dsi_phy", "mmss_misc_phys"; | |
| vdd-supply = <0x2a>; | |
| vddio-supply = <0x2>; | |
| vdda-supply = <0x2b>; | |
| qcom,mdss-fb-map = <0x2c>; | |
| qcom,mdss-mdp = <0x2d>; | |
| qcom,platform-strength-ctrl = [ff 06]; | |
| qcom,platform-bist-ctrl = [00 00 b1 ff 00 00]; | |
| qcom,platform-regulator-settings = [03 09 03 00 20 00 01]; | |
| qcom,platform-lane-config = [00 00 00 00 00 00 00 01 97 00 00 00 00 05 00 00 01 97 00 00 00 00 0a 00 00 01 97 00 00 00 00 0f 00 00 01 97 00 c0 00 00 00 00 00 01 bb]; | |
| qcom,dsi-pref-prim-pan-dual = <0x32>; | |
| linux,phandle = <0x29>; | |
| phandle = <0x29>; | |
| qcom,platform-supply-entry1 { | |
| qcom,supply-name = "vdd"; | |
| qcom,supply-min-voltage = <0x2dc6c0>; | |
| qcom,supply-max-voltage = <0x2dc6c0>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| qcom,platform-supply-entry2 { | |
| qcom,supply-name = "vddio"; | |
| qcom,supply-min-voltage = <0x1b7740>; | |
| qcom,supply-max-voltage = <0x1b7740>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x14>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| qcom,platform-supply-entry3 { | |
| qcom,supply-name = "vdda"; | |
| qcom,supply-min-voltage = <0x124f80>; | |
| qcom,supply-max-voltage = <0x124f80>; | |
| qcom,supply-enable-load = <0x186a0>; | |
| qcom,supply-disable-load = <0x64>; | |
| qcom,supply-pre-on-sleep = <0x0>; | |
| qcom,supply-post-on-sleep = <0x0>; | |
| qcom,supply-pre-off-sleep = <0x0>; | |
| qcom,supply-post-off-sleep = <0x0>; | |
| }; | |
| }; | |
| qcom,hdmi_tx@fd922100 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,hdmi-tx"; | |
| reg = <0xfd922100 0x370 0xfd922500 0x7c 0xfc4b8000 0x60f0>; | |
| reg-names = "core_physical", "phy_physical", "qfprom_physical"; | |
| hpd-gdsc-supply = <0x26>; | |
| qcom,hdmi-tx-supply-names = "hpd-gdsc", "hpd-5v", "core-vdda", "core-vcc"; | |
| qcom,hdmi-tx-min-voltage-level = <0x0 0x0 0x1b7740 0x1b7740>; | |
| qcom,hdmi-tx-max-voltage-level = <0x0 0x0 0x1b7740 0x1b7740>; | |
| qcom,hdmi-tx-peak-current = <0x0 0x0 0x493e0 0x0>; | |
| qcom,hdmi-tx-hpd = <0x5 0x22 0x0>; | |
| qcom,mdss-fb-map = <0x33>; | |
| hpd-5v-supply = <0x34>; | |
| core-vdda-supply = <0x2>; | |
| core-vcc-supply = <0x35>; | |
| qcom,hdmi-tx-ddc-clk = <0x5 0x20 0x0>; | |
| qcom,hdmi-tx-ddc-data = <0x5 0x21 0x0>; | |
| mhl,sec-mhl-map = <0x36>; | |
| status = "ok"; | |
| linux,phandle = <0x58>; | |
| phandle = <0x58>; | |
| qcom,msm-hdmi-audio-rx { | |
| compatible = "qcom,msm-hdmi-audio-codec-rx"; | |
| }; | |
| }; | |
| qcom,mdss_wb_panel { | |
| compatible = "qcom,mdss_wb"; | |
| qcom,mdss_pan_res = <0x780 0x438>; | |
| qcom,mdss_pan_bpp = <0x18>; | |
| qcom,mdss-fb-map = <0x37>; | |
| }; | |
| qcom,mdss_edp@fd923400 { | |
| compatible = "qcom,mdss-edp"; | |
| reg = <0xfd923400 0x700 0xfd8c2000 0x1000>; | |
| reg-names = "edp_base", "mmss_cc_base"; | |
| status = "disable"; | |
| qcom,mdss-fb-map = <0x2c>; | |
| gpio-panel-hpd = <0x5 0x66 0x0>; | |
| vdda-supply = <0x2>; | |
| }; | |
| qcom,smp2p-modem { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xf9011008 0x4>; | |
| qcom,remote-pid = <0x1>; | |
| qcom,irq-bitmask = <0x4000>; | |
| interrupts = <0x0 0x1b 0x1>; | |
| }; | |
| qcom,smp2p-adsp { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xf9011008 0x4>; | |
| qcom,remote-pid = <0x2>; | |
| qcom,irq-bitmask = <0x400>; | |
| interrupts = <0x0 0x9e 0x1>; | |
| }; | |
| qcom,smp2p-wcnss { | |
| compatible = "qcom,smp2p"; | |
| reg = <0xf9011008 0x4>; | |
| qcom,remote-pid = <0x4>; | |
| qcom,irq-bitmask = <0x40000>; | |
| interrupts = <0x0 0x8f 0x1>; | |
| }; | |
| qcom,smp2pgpio-smp2p-7-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x7>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x38>; | |
| phandle = <0x38>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_7_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_7_in"; | |
| gpios = <0x38 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-7-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x7>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x39>; | |
| phandle = <0x39>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_7_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_7_out"; | |
| gpios = <0x39 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3a>; | |
| phandle = <0x3a>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_in"; | |
| gpios = <0x3a 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x1>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3b>; | |
| phandle = <0x3b>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_1_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_1_out"; | |
| gpios = <0x3b 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x67>; | |
| phandle = <0x67>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x1>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x68>; | |
| phandle = <0x68>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3c>; | |
| phandle = <0x3c>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_in"; | |
| gpios = <0x3c 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x2>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3d>; | |
| phandle = <0x3d>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_2_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_2_out"; | |
| gpios = <0x3d 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x63>; | |
| phandle = <0x63>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x2>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x64>; | |
| phandle = <0x64>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3e>; | |
| phandle = <0x3e>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_in { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_in"; | |
| gpios = <0x3e 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "smp2p"; | |
| qcom,remote-pid = <0x4>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x3f>; | |
| phandle = <0x3f>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "slave-kernel"; | |
| qcom,remote-pid = <0x4>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x69>; | |
| phandle = <0x69>; | |
| }; | |
| qcom,smp2pgpio-ssr-smp2p-4-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "master-kernel"; | |
| qcom,remote-pid = <0x4>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x6a>; | |
| phandle = <0x6a>; | |
| }; | |
| qcom,smp2pgpio_test_smp2p_4_out { | |
| compatible = "qcom,smp2pgpio_test_smp2p_4_out"; | |
| gpios = <0x3f 0x0 0x0>; | |
| }; | |
| msm-mmss-noc@fc478000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc478000 0x4000>; | |
| cell-id = <0x800>; | |
| label = "msm_mmss_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| coresight-id = <0x34>; | |
| coresight-name = "coresight-mnoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x5>; | |
| mas-gfx3d { | |
| cell-id = <0x1a>; | |
| label = "mas-gfx3d"; | |
| qcom,masterp = <0x2 0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mode = "Bypass"; | |
| qcom,ws = <0x2710>; | |
| qcom,qport = <0x2 0x3>; | |
| qcom,mas-hw-id = <0x6>; | |
| }; | |
| mas-jpeg { | |
| cell-id = <0x3e>; | |
| label = "mas-jpeg"; | |
| qcom,masterp = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mode = "Bypass"; | |
| qcom,qport = <0x0>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x7>; | |
| }; | |
| mas-mdp-port0 { | |
| cell-id = <0x16>; | |
| label = "mas-mdp-port0"; | |
| qcom,masterp = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mode = "Bypass"; | |
| qcom,qport = <0x1>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x8>; | |
| }; | |
| mas-video-p0 { | |
| cell-id = <0x3f>; | |
| label = "mas-video-p0"; | |
| qcom,masterp = <0x6 0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mode = "Bypass"; | |
| qcom,ws = <0x2710>; | |
| qcom,qport = <0x4 0x5>; | |
| qcom,mas-hw-id = <0x9>; | |
| }; | |
| mas-vfe { | |
| cell-id = <0x1d>; | |
| label = "mas-vfe"; | |
| qcom,masterp = <0x10>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,perm-mode = "Bypass"; | |
| qcom,mode = "Bypass"; | |
| qcom,ws = <0x2710>; | |
| qcom,qport = <0x6>; | |
| qcom,mas-hw-id = <0xb>; | |
| }; | |
| fab-cnoc { | |
| cell-id = <0x1400>; | |
| label = "fab-cnoc"; | |
| qcom,gateway; | |
| qcom,masterp = <0x0 0x1>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "RPM"; | |
| qcom,mas-hw-id = <0x4>; | |
| }; | |
| fab-bimc { | |
| cell-id = <0x0>; | |
| label = "fab-bimc"; | |
| qcom,gateway; | |
| qcom,slavep = <0x10 0x11>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x10>; | |
| }; | |
| slv-camera-cfg { | |
| cell-id = <0x24d>; | |
| label = "slv-camera-cfg"; | |
| qcom,slavep = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x3>; | |
| }; | |
| slv-display-cfg { | |
| cell-id = <0x24e>; | |
| label = "slv-display-cfg"; | |
| qcom,slavep = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x4>; | |
| }; | |
| slv-ocmem-cfg { | |
| cell-id = <0x24f>; | |
| label = "slv-ocmem-cfg"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x5>; | |
| }; | |
| slv-cpr-cfg { | |
| cell-id = <0x250>; | |
| label = "slv-cpr-cfg"; | |
| qcom,slavep = <0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x6>; | |
| }; | |
| slv-cpr-xpu-cfg { | |
| cell-id = <0x251>; | |
| label = "slv-cpr-xpu-cfg"; | |
| qcom,slavep = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x7>; | |
| }; | |
| slv-misc-cfg { | |
| cell-id = <0x252>; | |
| label = "slv-misc-cfg"; | |
| qcom,slavep = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x8>; | |
| }; | |
| slv-misc-xpu-cfg { | |
| cell-id = <0x253>; | |
| label = "slv-misc-xpu-cfg"; | |
| qcom,slavep = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x9>; | |
| }; | |
| slv-venus-cfg { | |
| cell-id = <0x254>; | |
| label = "slv-venus-cfg"; | |
| qcom,slavep = <0x8>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xa>; | |
| }; | |
| slv-gfx3d-cfg { | |
| cell-id = <0x256>; | |
| label = "slv-gfx3d-cfg"; | |
| qcom,slavep = <0x9>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xb>; | |
| }; | |
| slv-mmss-clk-cfg { | |
| cell-id = <0x257>; | |
| label = "slv-mmss-clk-cfg"; | |
| qcom,slavep = <0xb>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xc>; | |
| }; | |
| slv-mmss-clk-xpu-cfg { | |
| cell-id = <0x258>; | |
| label = "slv-mmss-clk-xpu-cfg"; | |
| qcom,slavep = <0xc>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xd>; | |
| }; | |
| slv-mnoc-mpu-cfg { | |
| cell-id = <0x259>; | |
| label = "slv-mnoc-mpu-cfg"; | |
| qcom,slavep = <0xd>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xe>; | |
| }; | |
| slv-onoc-mpu-cfg { | |
| cell-id = <0x25a>; | |
| label = "slv-onoc-mpu-cfg"; | |
| qcom,slavep = <0xe>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0xf>; | |
| }; | |
| slv-service-mnoc { | |
| cell-id = <0x25b>; | |
| label = "slv-service-mnoc"; | |
| qcom,slavep = <0x12>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,slv-hw-id = <0x11>; | |
| }; | |
| }; | |
| msm-sys-noc@fc460000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc460000 0x4000>; | |
| cell-id = <0x400>; | |
| label = "msm_sys_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| coresight-id = <0x32>; | |
| coresight-name = "coresight-snoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x3>; | |
| msm-lpass-ahb { | |
| cell-id = <0x34>; | |
| label = "mas-lpass-ahb"; | |
| qcom,masterp = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,qport = <0x0>; | |
| qcom,mas-hw-id = <0x12>; | |
| qcom,mode = "Fixed"; | |
| qcom,prio1 = <0x2>; | |
| qcom,prio0 = <0x2>; | |
| }; | |
| mas-qdss-bam { | |
| cell-id = <0x35>; | |
| label = "mas-qdss-bam"; | |
| qcom,masterp = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x1>; | |
| qcom,mas-hw-id = <0x13>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| mas-snoc-cfg { | |
| cell-id = <0x36>; | |
| label = "mas-snoc-cfg"; | |
| qcom,masterp = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,mas-hw-id = <0x14>; | |
| }; | |
| fab-bimc { | |
| cell-id = <0x0>; | |
| label = "fab-bimc"; | |
| qcom,gateway; | |
| qcom,slavep = <0x7 0x8>; | |
| qcom,masterp = <0x3>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x15>; | |
| qcom,slv-hw-id = <0x18>; | |
| }; | |
| fab-cnoc { | |
| cell-id = <0x1400>; | |
| label = "fab-cnoc"; | |
| qcom,gateway; | |
| qcom,slavep = <0x9>; | |
| qcom,masterp = <0x4>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x16>; | |
| qcom,slv-hw-id = <0x19>; | |
| }; | |
| fab-pnoc { | |
| cell-id = <0x1000>; | |
| label = "fab-pnoc"; | |
| qcom,gateway; | |
| qcom,slavep = <0xc>; | |
| qcom,masterp = <0xb>; | |
| qcom,buswidth = <0x8>; | |
| qcom,qport = <0x8>; | |
| qcom,mas-hw-id = <0x1d>; | |
| qcom,slv-hw-id = <0x1c>; | |
| qcom,mode = "Fixed"; | |
| qcom,prio1 = <0x2>; | |
| qcom,prio0 = <0x2>; | |
| }; | |
| fab-ovnoc { | |
| cell-id = <0x1800>; | |
| label = "fab-ovnoc"; | |
| qcom,gateway; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x35>; | |
| qcom,slv-hw-id = <0x4d>; | |
| }; | |
| mas-crypto-core0 { | |
| cell-id = <0x37>; | |
| label = "mas-crypto-core0"; | |
| qcom,masterp = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x2>; | |
| qcom,mas-hw-id = <0x17>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| }; | |
| mas-crypto-core1 { | |
| cell-id = <0x38>; | |
| label = "mas-crypto-core1"; | |
| qcom,masterp = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x3>; | |
| qcom,mas-hw-id = <0x18>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| }; | |
| mas-lpass-proc { | |
| cell-id = <0xb>; | |
| label = "mas-lpass-proc"; | |
| qcom,masterp = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,qport = <0x4>; | |
| qcom,mas-hw-id = <0x19>; | |
| qcom,mode = "Fixed"; | |
| qcom,prio1 = <0x2>; | |
| qcom,prio0 = <0x2>; | |
| }; | |
| mas-mss { | |
| cell-id = <0x26>; | |
| label = "mas-mss"; | |
| qcom,masterp = <0x8>; | |
| qcom,tier = <0x2>; | |
| qcom,mas-hw-id = <0x1a>; | |
| }; | |
| mas-mss-nav { | |
| cell-id = <0x39>; | |
| label = "mas-mss-nav"; | |
| qcom,masterp = <0x9>; | |
| qcom,tier = <0x2>; | |
| qcom,mas-hw-id = <0x1b>; | |
| }; | |
| mas-ocmem-dma { | |
| cell-id = <0x3a>; | |
| label = "mas-ocmem-dma"; | |
| qcom,masterp = <0xa>; | |
| qcom,tier = <0x2>; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x7>; | |
| qcom,mas-hw-id = <0x1c>; | |
| }; | |
| mas-wcss { | |
| cell-id = <0x3b>; | |
| label = "mas-wcss"; | |
| qcom,masterp = <0xc>; | |
| qcom,tier = <0x2>; | |
| qcom,mas-hw-id = <0x1e>; | |
| }; | |
| mas-qdss-etr { | |
| cell-id = <0x3c>; | |
| label = "mas-qdss-etr"; | |
| qcom,masterp = <0xd>; | |
| qcom,tier = <0x2>; | |
| qcom,qport = <0xa>; | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0x1f>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| mas-usb3 { | |
| cell-id = <0x3d>; | |
| label = "mas-usb3"; | |
| qcom,masterp = <0xe>; | |
| qcom,tier = <0x2>; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0xb>; | |
| qcom,mas-hw-id = <0x20>; | |
| qcom,prio1 = <0x1>; | |
| qcom,prio0 = <0x1>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,iface-clk-node = "msm_usb3"; | |
| }; | |
| slv-ampss { | |
| cell-id = <0x208>; | |
| label = "slv-ampss"; | |
| qcom,slavep = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x14>; | |
| }; | |
| slv-lpass { | |
| cell-id = <0x20a>; | |
| label = "slv-lpass"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x15>; | |
| }; | |
| slv-usb3 { | |
| cell-id = <0x247>; | |
| label = "slv-usb3"; | |
| qcom,slavep = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x16>; | |
| }; | |
| slv-wcss { | |
| cell-id = <0x248>; | |
| label = "slv-wcss"; | |
| qcom,slavep = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x17>; | |
| }; | |
| slv-ocimem { | |
| cell-id = <0x249>; | |
| label = "slv-ocimem"; | |
| qcom,slavep = <0xa>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1a>; | |
| }; | |
| slv-snoc-ocmem { | |
| cell-id = <0x24a>; | |
| label = "slv-snoc-ocmem"; | |
| qcom,slavep = <0xb>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1b>; | |
| }; | |
| slv-service-snoc { | |
| cell-id = <0x24b>; | |
| label = "slv-service-snoc"; | |
| qcom,slavep = <0xd>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1d>; | |
| }; | |
| slv-qdss-stm { | |
| cell-id = <0x24c>; | |
| label = "slv-qdss-stm"; | |
| qcom,slavep = <0xe>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1e>; | |
| }; | |
| }; | |
| msm-periph-noc@fc468000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc468000 0x4000>; | |
| cell-id = <0x1000>; | |
| label = "msm_periph_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| coresight-id = <0x36>; | |
| coresight-name = "coresight-pnoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x6>; | |
| mas-pnoc-cfg { | |
| cell-id = <0x58>; | |
| label = "mas-pnoc-cfg"; | |
| qcom,masterp = <0xa>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x2b>; | |
| }; | |
| mas-sdcc-1 { | |
| cell-id = <0x4e>; | |
| label = "mas-sdcc-1"; | |
| qcom,masterp = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x21>; | |
| }; | |
| mas-sdcc-3 { | |
| cell-id = <0x4f>; | |
| label = "mas-sdcc-3"; | |
| qcom,masterp = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x22>; | |
| }; | |
| mas-sdcc-4 { | |
| cell-id = <0x50>; | |
| label = "mas-sdcc-4"; | |
| qcom,masterp = <0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x24>; | |
| }; | |
| mas-sdcc-2 { | |
| cell-id = <0x51>; | |
| label = "mas-sdcc-2"; | |
| qcom,masterp = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x23>; | |
| }; | |
| mas-tsif { | |
| cell-id = <0x52>; | |
| label = "mas-tsif"; | |
| qcom,masterp = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x25>; | |
| }; | |
| mas-bam-dma { | |
| cell-id = <0x53>; | |
| label = "mas-bam-dma"; | |
| qcom,masterp = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x26>; | |
| }; | |
| mas-blsp-2 { | |
| cell-id = <0x54>; | |
| label = "mas-blsp-2"; | |
| qcom,masterp = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x27>; | |
| }; | |
| mas-usb-hsic { | |
| cell-id = <0x55>; | |
| label = "mas-usb-hsic"; | |
| qcom,masterp = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x28>; | |
| }; | |
| mas-blsp-1 { | |
| cell-id = <0x56>; | |
| label = "mas-blsp-1"; | |
| qcom,masterp = <0x8>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x29>; | |
| }; | |
| mas-usb-hs { | |
| cell-id = <0x57>; | |
| label = "mas-usb-hs"; | |
| qcom,masterp = <0x9>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x2a>; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,gateway; | |
| qcom,slavep = <0xe>; | |
| qcom,masterp = <0xb>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2d>; | |
| qcom,mas-hw-id = <0x2c>; | |
| }; | |
| slv-sdcc-1 { | |
| cell-id = <0x25e>; | |
| label = "slv-sdcc-1"; | |
| qcom,slavep = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1f>; | |
| }; | |
| slv-sdcc-3 { | |
| cell-id = <0x25f>; | |
| label = "slv-sdcc-3"; | |
| qcom,slavep = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x20>; | |
| }; | |
| slv-sdcc-2 { | |
| cell-id = <0x260>; | |
| label = "slv-sdcc-2"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x21>; | |
| }; | |
| slv-sdcc-4 { | |
| cell-id = <0x261>; | |
| label = "slv-sdcc-4"; | |
| qcom,slavep = <0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x22>; | |
| }; | |
| slv-tsif { | |
| cell-id = <0x23f>; | |
| label = "slv-tsif"; | |
| qcom,slavep = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x23>; | |
| }; | |
| slv-bam-dma { | |
| cell-id = <0x262>; | |
| label = "slv-bam-dma"; | |
| qcom,slavep = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x24>; | |
| }; | |
| slv-blsp-2 { | |
| cell-id = <0x263>; | |
| label = "slv-blsp-2"; | |
| qcom,slavep = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x25>; | |
| }; | |
| slv-usb-hsic { | |
| cell-id = <0x264>; | |
| label = "slv-usb-hsic"; | |
| qcom,slavep = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x26>; | |
| }; | |
| slv-blsp-1 { | |
| cell-id = <0x265>; | |
| label = "slv-blsp-1"; | |
| qcom,slavep = <0x8>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x27>; | |
| }; | |
| slv-usb-hs { | |
| cell-id = <0x266>; | |
| label = "slv-usb-hs"; | |
| qcom,slavep = <0x9>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x28>; | |
| }; | |
| slv-pdm { | |
| cell-id = <0x267>; | |
| label = "slv-pdm"; | |
| qcom,slavep = <0xa>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x29>; | |
| }; | |
| slv-periph-apu-cfg { | |
| cell-id = <0x268>; | |
| label = "slv-periph-apu-cfg"; | |
| qcom,slavep = <0xb>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2a>; | |
| }; | |
| slv-pnoc-mpu-cfg { | |
| cell-id = <0x269>; | |
| label = "slv-pnoc-mpu-cfg"; | |
| qcom,slavep = <0xc>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2b>; | |
| }; | |
| slv-prng { | |
| cell-id = <0x26a>; | |
| label = "slv-prng"; | |
| qcom,slavep = <0xd>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2c>; | |
| }; | |
| slv-service-pnoc { | |
| cell-id = <0x26b>; | |
| label = "slv-service-pnoc"; | |
| qcom,slavep = <0xf>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2e>; | |
| }; | |
| }; | |
| msm-config-noc@fc480000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc480000 0x4000>; | |
| cell-id = <0x1400>; | |
| label = "msm_config_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| mas-rpm-inst { | |
| cell-id = <0x48>; | |
| label = "mas-rpm-inst"; | |
| qcom,masterp = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x2d>; | |
| }; | |
| mas-rpm-data { | |
| cell-id = <0x49>; | |
| label = "mas-rpm-data"; | |
| qcom,masterp = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x2e>; | |
| }; | |
| mas-rpm-sys { | |
| cell-id = <0x4a>; | |
| label = "mas-rpm-sys"; | |
| qcom,masterp = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x2f>; | |
| }; | |
| mas-dehr { | |
| cell-id = <0x4b>; | |
| label = "mas-dehr"; | |
| qcom,masterp = <0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x30>; | |
| }; | |
| mas-qdss-dsp { | |
| cell-id = <0x4c>; | |
| label = "mas-qdss-dap"; | |
| qcom,masterp = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x31>; | |
| }; | |
| mas-spdm { | |
| cell-id = <0x24>; | |
| label = "mas-spdm"; | |
| qcom,masterp = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x32>; | |
| }; | |
| mas-tic { | |
| cell-id = <0x4d>; | |
| label = "mas-tic"; | |
| qcom,masterp = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x33>; | |
| }; | |
| slv-clk-ctl { | |
| cell-id = <0x26c>; | |
| label = "slv-clk-ctl"; | |
| qcom,slavep = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x2f>; | |
| }; | |
| slv-cnoc-mss { | |
| cell-id = <0x26d>; | |
| label = "slv-cnoc-mss"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x30>; | |
| }; | |
| slv-security { | |
| cell-id = <0x26e>; | |
| label = "slv-security"; | |
| qcom,slavep = <0x3>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x31>; | |
| }; | |
| slv-tcsr { | |
| cell-id = <0x26f>; | |
| label = "slv-tcsr"; | |
| qcom,slavep = <0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x32>; | |
| }; | |
| slv-tlmm { | |
| cell-id = <0x270>; | |
| label = "slv-tlmm"; | |
| qcom,slavep = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x33>; | |
| }; | |
| slv-crypto-0-cfg { | |
| cell-id = <0x271>; | |
| label = "slv-crypto-0-cfg"; | |
| qcom,slavep = <0x6>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x34>; | |
| }; | |
| slv-crypto-1-cfg { | |
| cell-id = <0x272>; | |
| label = "slv-crypto-1-cfg"; | |
| qcom,slavep = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x35>; | |
| }; | |
| slv-imem-cfg { | |
| cell-id = <0x273>; | |
| label = "slv-imem-cfg"; | |
| qcom,slavep = <0x8>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x36>; | |
| }; | |
| slv-message-ram { | |
| cell-id = <0x274>; | |
| label = "slv-message-ram"; | |
| qcom,slavep = <0x9>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x37>; | |
| }; | |
| slv-bimc-cfg { | |
| cell-id = <0x275>; | |
| label = "slv-bimc-cfg"; | |
| qcom,slavep = <0xa>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x38>; | |
| }; | |
| slv-boot-rom { | |
| cell-id = <0x276>; | |
| label = "slv-boot-rom"; | |
| qcom,slavep = <0xb>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x39>; | |
| }; | |
| slv-pmic-arb { | |
| cell-id = <0x278>; | |
| label = "slv-pmic-arb"; | |
| qcom,slavep = <0xd>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3b>; | |
| }; | |
| slv-spdm-wrapper { | |
| cell-id = <0x279>; | |
| label = "slv-spdm-wrapper"; | |
| qcom,slavep = <0xe>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3c>; | |
| }; | |
| slv-dehr-cfg { | |
| cell-id = <0x27a>; | |
| label = "slv-dehr-cfg"; | |
| qcom,slavep = <0xf>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3d>; | |
| }; | |
| slv-mpm { | |
| cell-id = <0x218>; | |
| label = "slv-mpm"; | |
| qcom,slavep = <0x10>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3e>; | |
| }; | |
| slv-qdss-cfg { | |
| cell-id = <0x27b>; | |
| label = "slv-qdss-cfg"; | |
| qcom,slavep = <0x11>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3f>; | |
| }; | |
| slv-rbcpr-cfg { | |
| cell-id = <0x27c>; | |
| label = "slv-rbcpr-cfg"; | |
| qcom,slavep = <0x12>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x40>; | |
| }; | |
| slv-rbcpr-qdss-apu-cfg { | |
| cell-id = <0x27d>; | |
| label = "slv-rbcpr-qdss-apu-cfg"; | |
| qcom,slavep = <0x13>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x41>; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,gateway; | |
| qcom,slavep = <0x1d>; | |
| qcom,masterp = <0x7>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x34>; | |
| qcom,slv-hw-id = <0x4b>; | |
| }; | |
| slv-cnoc-onoc-cfg { | |
| cell-id = <0x27f>; | |
| label = "slv-cnoc-onoc-cfg"; | |
| qcom,slavep = <0x16>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x44>; | |
| }; | |
| slv-cnoc-mnoc-mmss-cfg { | |
| cell-id = <0x277>; | |
| label = "slv-cnoc-mnoc-mmss-cfg"; | |
| qcom,slavep = <0xc>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x3a>; | |
| }; | |
| slv-cnoc-mnoc-cfg { | |
| cell-id = <0x280>; | |
| label = "slv-cnoc-mnoc-cfg"; | |
| qcom,slavep = <0x14>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x42>; | |
| }; | |
| slv-pnoc-cfg { | |
| cell-id = <0x281>; | |
| label = "slv-pnoc-cfg"; | |
| qcom,slavep = <0x17>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x45>; | |
| }; | |
| slv-snoc-mpu-cfg { | |
| cell-id = <0x27e>; | |
| label = "slv-snoc-mpu-cfg"; | |
| qcom,slavep = <0x15>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x43>; | |
| }; | |
| slv-snoc-cfg { | |
| cell-id = <0x282>; | |
| label = "slv-snoc-cfg"; | |
| qcom,slavep = <0x18>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x46>; | |
| }; | |
| slv-ebi1-dll-cfg { | |
| cell-id = <0x283>; | |
| label = "slv-ebi1-dll-cfg"; | |
| qcom,slavep = <0x19>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x47>; | |
| }; | |
| slv-phy-apu-cfg { | |
| cell-id = <0x284>; | |
| label = "slv-phy-apu-cfg"; | |
| qcom,slavep = <0x1a>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x48>; | |
| }; | |
| slv-ebi1-phy-cfg { | |
| cell-id = <0x285>; | |
| label = "slv-ebi1-phy-cfg"; | |
| qcom,slavep = <0x1b>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x49>; | |
| }; | |
| slv-rpm { | |
| cell-id = <0x216>; | |
| label = "slv-rpm"; | |
| qcom,slavep = <0x1c>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x4a>; | |
| }; | |
| slv-service-cnoc { | |
| cell-id = <0x286>; | |
| label = "slv-service-cnoc"; | |
| qcom,slavep = <0x1e>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x4c>; | |
| }; | |
| }; | |
| msm-bimc@0xfc380000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc380000 0x6a000>; | |
| cell-id = <0x0>; | |
| label = "msm_bimc"; | |
| qcom,fabclk-dual = "mem_clk"; | |
| qcom,fabclk-active = "mem_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,qos-freq = <0x4b00>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,rpm-en; | |
| coresight-id = <0x37>; | |
| coresight-name = "coresight-bimc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1b>; | |
| coresight-child-ports = <0x3>; | |
| mas-ampss-m0 { | |
| cell-id = <0x1>; | |
| label = "mas-ampss-m0"; | |
| qcom,masterp = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,mode = "Limiter"; | |
| qcom,qport = <0x0>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x0>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,prio-wr = <0x0>; | |
| qcom,mode-thresh = "Fixed"; | |
| qcom,thresh = <0x1e8480 0x2579c0>; | |
| qcom,dual-conf; | |
| qcom,bimc,bw = <0x493e0 0x6ddd0>; | |
| qcom,bimc,gp = <0x1388>; | |
| qcom,bimc,thmp = <0x32>; | |
| }; | |
| mas-ampss-m1 { | |
| cell-id = <0x2>; | |
| label = "mas-ampss-m1"; | |
| qcom,masterp = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,mode = "Limiter"; | |
| qcom,qport = <0x1>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x0>; | |
| qcom,prio-rd = <0x0>; | |
| qcom,prio-wr = <0x0>; | |
| qcom,mode-thresh = "Fixed"; | |
| qcom,thresh = <0x1e8480 0x2579c0>; | |
| qcom,dual-conf; | |
| qcom,bimc,bw = <0x493e0 0x6ddd0>; | |
| qcom,bimc,gp = <0x1388>; | |
| qcom,bimc,thmp = <0x32>; | |
| }; | |
| mas-mss-proc { | |
| cell-id = <0x41>; | |
| label = "mas-mss-proc"; | |
| qcom,masterp = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,hw-sel = "RPM"; | |
| qcom,mas-hw-id = <0x1>; | |
| }; | |
| fab-mmss-noc { | |
| cell-id = <0x800>; | |
| label = "fab_mmss_noc"; | |
| qcom,gateway; | |
| qcom,masterp = <0x3 0x4>; | |
| qcom,qport = <0x3 0x4>; | |
| qcom,buswidth = <0x8>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x2>; | |
| qcom,hw-sel = "BIMC"; | |
| qcom,mode = "Bypass"; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,gateway; | |
| qcom,slavep = <0x3>; | |
| qcom,masterp = <0x5 0x6>; | |
| qcom,qport = <0x5 0x6>; | |
| qcom,buswidth = <0x8>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x3>; | |
| qcom,slv-hw-id = <0x2>; | |
| qcom,mode = "Bypass"; | |
| qcom,hw-sel = "RPM"; | |
| }; | |
| slv-ebi-ch0 { | |
| cell-id = <0x200>; | |
| label = "slv-ebi-ch0"; | |
| qcom,slavep = <0x0 0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x0>; | |
| qcom,mode = "Bypass"; | |
| }; | |
| slv-ampss-l2 { | |
| cell-id = <0x202>; | |
| label = "slv-ampss-l2"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,slv-hw-id = <0x1>; | |
| }; | |
| }; | |
| msm-ocmem-vnoc@6144 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0x6144 0x2>; | |
| cell-id = <0x1800>; | |
| label = "msm-ocmem-vnoc"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| qcom,virt; | |
| mas-v-ocmem-gfx3d { | |
| cell-id = <0x59>; | |
| label = "mas-v-ocmem-gfx3d"; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x8>; | |
| qcom,mas-hw-id = <0x37>; | |
| }; | |
| slv-ocmem { | |
| cell-id = <0x25c>; | |
| label = "slv-ocmem"; | |
| qcom,slavep = <0x0 0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,slv-hw-id = <0x12>; | |
| qcom,slaveclk-dual = "ocmem_clk"; | |
| qcom,slaveclk-active = "ocmem_a_clk"; | |
| }; | |
| fab-snoc { | |
| cell-id = <0x400>; | |
| label = "fab-snoc"; | |
| qcom,gateway; | |
| qcom,buswidth = <0x8>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x39>; | |
| qcom,slv-hw-id = <0x50>; | |
| }; | |
| fab-onoc { | |
| cell-id = <0xc00>; | |
| label = "fab-onoc"; | |
| qcom,gateway; | |
| qcom,buswidth = <0x10>; | |
| qcom,ws = <0x2710>; | |
| qcom,mas-hw-id = <0x38>; | |
| qcom,slv-hw-id = <0x4f>; | |
| }; | |
| }; | |
| msm-ocmem-noc@fc470000 { | |
| compatible = "msm-bus-fabric"; | |
| reg = <0xfc470000 0x4000>; | |
| cell-id = <0xc00>; | |
| label = "msm_ocmem_noc"; | |
| qcom,fabclk-dual = "bus_clk"; | |
| qcom,fabclk-active = "bus_a_clk"; | |
| qcom,ntieredslaves = <0x0>; | |
| qcom,qos-freq = <0x12c0>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,rpm-en; | |
| coresight-id = <0x33>; | |
| coresight-name = "coresight-onoc"; | |
| coresight-nr-inports = <0x0>; | |
| coresight-outports = <0x0>; | |
| coresight-child-list = <0x1d>; | |
| coresight-child-ports = <0x4>; | |
| fab-ocmem-vnoc { | |
| cell-id = <0x1800>; | |
| label = "fab-ocmem-vnoc"; | |
| qcom,gateway; | |
| qcom,buswidth = <0x10>; | |
| qcom,mas-hw-id = <0x36>; | |
| qcom,slv-hw-id = <0x4e>; | |
| }; | |
| mas-jpeg-ocmem { | |
| cell-id = <0x42>; | |
| label = "mas-jpeg-ocmem"; | |
| qcom,masterp = <0x1>; | |
| qcom,tier = <0x2>; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x0>; | |
| qcom,mas-hw-id = <0xd>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| mas-mdp-ocmem { | |
| cell-id = <0x43>; | |
| label = "mas-mdp-ocmem"; | |
| qcom,masterp = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mode = "Fixed"; | |
| qcom,mas-hw-id = <0xe>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| mas-video-ocmem { | |
| cell-id = <0x44>; | |
| label = "mas-video-ocmem"; | |
| qcom,masterp = <0x3 0x4>; | |
| qcom,tier = <0x2>; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x2 0x3>; | |
| qcom,mas-hw-id = <0xf>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| mas-vfe-ocmem { | |
| cell-id = <0x46>; | |
| label = "mas-vfe-ocmem"; | |
| qcom,masterp = <0x5>; | |
| qcom,tier = <0x2>; | |
| qcom,perm-mode = "Fixed"; | |
| qcom,mode = "Fixed"; | |
| qcom,qport = <0x4>; | |
| qcom,mas-hw-id = <0x11>; | |
| qcom,hw-sel = "NoC"; | |
| qcom,prio-rd = <0x1>; | |
| qcom,prio-wr = <0x1>; | |
| }; | |
| mas-cnoc-onoc-cfg { | |
| cell-id = <0x47>; | |
| label = "mas-cnoc-onoc-cfg"; | |
| qcom,masterp = <0x0>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,mas-hw-id = <0xc>; | |
| qcom,hw-sel = "NoC"; | |
| }; | |
| slv-service-onoc { | |
| cell-id = <0x25d>; | |
| label = "slv-service-onoc"; | |
| qcom,slavep = <0x2>; | |
| qcom,tier = <0x2>; | |
| qcom,buswidth = <0x10>; | |
| qcom,slv-hw-id = <0x13>; | |
| }; | |
| }; | |
| qcom,smp2pgpio-rdbg-2-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| qcom,remote-pid = <0x2>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x40>; | |
| phandle = <0x40>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_2_in { | |
| compatible = "qcom,smp2pgpio_client_rdbg_2_in"; | |
| gpios = <0x40 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-rdbg-2-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| qcom,remote-pid = <0x2>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x41>; | |
| phandle = <0x41>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_2_out { | |
| compatible = "qcom,smp2pgpio_client_rdbg_2_out"; | |
| gpios = <0x41 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-rdbg-1-in { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| qcom,remote-pid = <0x1>; | |
| qcom,is-inbound; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x42>; | |
| phandle = <0x42>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_1_in { | |
| compatible = "qcom,smp2pgpio_client_rdbg_1_in"; | |
| gpios = <0x42 0x0 0x0>; | |
| }; | |
| qcom,smp2pgpio-rdbg-1-out { | |
| compatible = "qcom,smp2pgpio"; | |
| qcom,entry-name = "rdbg"; | |
| qcom,remote-pid = <0x1>; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| linux,phandle = <0x43>; | |
| phandle = <0x43>; | |
| }; | |
| qcom,smp2pgpio_client_rdbg_1_out { | |
| compatible = "qcom,smp2pgpio_client_rdbg_1_out"; | |
| gpios = <0x43 0x0 0x0>; | |
| }; | |
| interrupt-controller@F9000000 { | |
| compatible = "qcom,msm-qgic2"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| reg = <0xf9000000 0x1000 0xf9002000 0x1000>; | |
| linux,phandle = <0x1>; | |
| phandle = <0x1>; | |
| }; | |
| gpio@fd510000 { | |
| compatible = "qcom,msm-gpio"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x2>; | |
| reg = <0xfd510000 0x4000>; | |
| ngpio = <0x92>; | |
| interrupts = <0x0 0xd0 0x0>; | |
| qcom,direct-connect-irqs = <0x8>; | |
| linux,phandle = <0x5>; | |
| phandle = <0x5>; | |
| }; | |
| wcd9xxx-irq { | |
| compatible = "qcom,wcd9xxx-irq"; | |
| interrupt-controller; | |
| #interrupt-cells = <0x1>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x48 0x0>; | |
| interrupt-names = "cdc-int"; | |
| linux,phandle = <0x52>; | |
| phandle = <0x52>; | |
| }; | |
| timer { | |
| compatible = "arm,armv7-timer"; | |
| interrupts = <0x1 0x2 0x0 0x1 0x3 0x0>; | |
| clock-frequency = <0x124f800>; | |
| }; | |
| timer@f9020000 { | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| compatible = "arm,armv7-timer-mem"; | |
| reg = <0xf9020000 0x1000>; | |
| clock-frequency = <0x124f800>; | |
| frame@f9021000 { | |
| frame-number = <0x0>; | |
| interrupts = <0x0 0x8 0x4 0x0 0x7 0x4>; | |
| reg = <0xf9021000 0x1000 0xf9022000 0x1000>; | |
| }; | |
| frame@f9023000 { | |
| frame-number = <0x1>; | |
| interrupts = <0x0 0x9 0x4>; | |
| reg = <0xf9023000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@f9024000 { | |
| frame-number = <0x2>; | |
| interrupts = <0x0 0xa 0x4>; | |
| reg = <0xf9024000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@f9025000 { | |
| frame-number = <0x3>; | |
| interrupts = <0x0 0xb 0x4>; | |
| reg = <0xf9025000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@f9026000 { | |
| frame-number = <0x4>; | |
| interrupts = <0x0 0xc 0x4>; | |
| reg = <0xf9026000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@f9027000 { | |
| frame-number = <0x5>; | |
| interrupts = <0x0 0xd 0x4>; | |
| reg = <0xf9027000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| frame@f9028000 { | |
| frame-number = <0x6>; | |
| interrupts = <0x0 0xe 0x4>; | |
| reg = <0xf9028000 0x1000>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| qcom,mpm2-sleep-counter@fc4a3000 { | |
| compatible = "qcom,mpm2-sleep-counter"; | |
| reg = <0xfc4a3000 0x1000>; | |
| clock-frequency = <0x8000>; | |
| }; | |
| qcom,vidc@fdc00000 { | |
| compatible = "qcom,msm-vidc"; | |
| reg = <0xfdc00000 0xff000>; | |
| interrupts = <0x0 0x2c 0x0>; | |
| vdd-supply = <0x44>; | |
| qcom,hfi = "venus"; | |
| qcom,ocmem-size = <0x80000>; | |
| qcom,max-hw-load = <0x138e40>; | |
| qcom,vidc-ns-map = <0x40000000 0x40000000>; | |
| qcom,load-freq-tbl = <0xfd200 0x1bb75640 0xbf400 0x1bb75640 0x77880 0xfe50fb0 0x3bc40 0x7f27450>; | |
| qcom,reg-presets = <0x80004 0x1 0x80070 0x11fff 0x80074 0xa4 0x800a8 0x1fff 0x80124 0x3 0xe0020 0x5555556 0xe0024 0x0>; | |
| qcom,bus-ports = <0x1>; | |
| qcom,enc-ocmem-ab-ib = <0x0 0x0 0x21b10 0xfc710 0x65130 0xfc710 0xe57e0 0xfc710 0x1cafc0 0x1f8e20 0x2de600 0x327dc8 0x395f80 0x3f1c40 0x442d20 0x257da8>; | |
| qcom,dec-ocmem-ab-ib = <0x0 0x0 0x2af80 0x7eb58 0x6f540 0x7eb58 0xd2f00 0x99908 0x1a5e00 0xfd6b0 0x2a34b0 0x195848 0x34bc00 0x1fad60 0x37e0b0 0x2189f0>; | |
| qcom,enc-ddr-ab-ib = <0x0 0x0 0x1d4c0 0x49bb0 0x58de0 0x49bb0 0xc44a0 0x49bb0 0x188940 0x93760 0x274e80 0xec158 0x476940 0x156c60 0x4c1c60 0x16d3c0>; | |
| qcom,dec-ddr-ab-ib = <0x0 0x0 0x32c80 0x49f98 0x82dc0 0x186a00 0xf7120 0x186a00 0x1ee240 0x186a00 0x317040 0x186a00 0x3dc480 0x186a00 0x411040 0x186a00>; | |
| qcom,buffer-type-tz-usage-table = <0x241 0x1 0x106 0x2 0x480 0x3>; | |
| qcom,vidc-iommu-domains { | |
| qcom,domain-ns { | |
| qcom,vidc-domain-phandle = <0x45>; | |
| qcom,vidc-partition-buffer-types = <0x7ff 0x800>; | |
| }; | |
| qcom,domain-sec-bs { | |
| qcom,vidc-domain-phandle = <0x46>; | |
| qcom,vidc-partition-buffer-types = <0x241>; | |
| }; | |
| qcom,domain-sec-px { | |
| qcom,vidc-domain-phandle = <0x47>; | |
| qcom,vidc-partition-buffer-types = <0x106>; | |
| }; | |
| qcom,domain-sec-np { | |
| qcom,vidc-domain-phandle = <0x48>; | |
| qcom,vidc-partition-buffer-types = <0x480>; | |
| }; | |
| }; | |
| }; | |
| qcom,vidc { | |
| compatible = "qcom,msm-vidc"; | |
| qcom,hfi = "q6"; | |
| qcom,max-hw-load = <0x3b538>; | |
| }; | |
| qcom,wfd { | |
| compatible = "qcom,msm-wfd"; | |
| }; | |
| serial@f991f000 { | |
| compatible = "qcom,msm-lsuart-v14"; | |
| reg = <0xf991f000 0x1000>; | |
| interrupts = <0x0 0x6d 0x0>; | |
| status = "disabled"; | |
| }; | |
| serial@f991e000 { | |
| compatible = "qcom,msm-lsuart-v14"; | |
| reg = <0xf991e000 0x1000>; | |
| interrupts = <0x0 0x6c 0x0>; | |
| status = "ok"; | |
| qcom,msm-bus,name = "serial_uart2"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x56 0x200 0x0 0x0 0x56 0x200 0x1f4 0x320>; | |
| }; | |
| serial@f995d000 { | |
| compatible = "qcom,msm-lsuart-v14"; | |
| reg = <0xf995d000 0x1000>; | |
| interrupts = <0x0 0x71 0x0>; | |
| status = "ok"; | |
| qcom,msm-bus,name = "serial_uart3"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x56 0x200 0x0 0x0 0x56 0x200 0x1f4 0x320>; | |
| }; | |
| usb@f9a55000 { | |
| compatible = "qcom,hsusb-otg"; | |
| status = "disabled"; | |
| reg = <0xf9a55000 0x400>; | |
| interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>; | |
| interrupt-names = "core_irq", "async_irq"; | |
| HSUSB_VDDCX-supply = <0x27>; | |
| qcom,vdd-voltage-level = <0x1 0x5 0x7>; | |
| qcom,hsusb-otg-phy-type = <0x2>; | |
| qcom,hsusb-otg-phy-init-seq = <0x63 0x81 0xffffffff>; | |
| qcom,hsusb-otg-mode = <0x1>; | |
| qcom,hsusb-otg-otg-control = <0x2>; | |
| qcom,hsusb-otg-disable-reset; | |
| qcom,hsusb-otg-mpm-dpsehv-int = <0x31>; | |
| qcom,hsusb-otg-mpm-dmsehv-int = <0x3a>; | |
| qcom,msm-bus,name = "usb2"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x57 0x200 0x0 0x0 0x57 0x200 0xea60 0xea600>; | |
| HSUSB_1p8-supply = <0x49>; | |
| HSUSB_3p3-supply = <0x4a>; | |
| }; | |
| rmtfs_sharedmem { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0xfd80000 0x180000>; | |
| reg-names = "rmtfs"; | |
| }; | |
| dsp_sharedmem { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0xfd60000 0x20000>; | |
| reg-names = "rfsa_dsp"; | |
| }; | |
| mdm_sharedmem { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0xfd60000 0x20000>; | |
| reg-names = "rfsa_mdm"; | |
| }; | |
| qcom,sdcc@f9824000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,msm-sdcc"; | |
| reg = <0xf9824000 0x800 0xf9824800 0x100 0xf9804000 0x7000>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| interrupts = <0x0 0x7b 0x0 0x0 0x89 0x0>; | |
| interrupt-names = "core_irq", "bam_irq"; | |
| qcom,vdd-always-on; | |
| qcom,vdd-lpm-sup; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x320 0x7a120>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0xfa 0x25990>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| qcom,bus-width = <0x8>; | |
| qcom,nonremovable; | |
| qcom,bus-speed-mode = "HS200_1p8v", "DDR_1p8v"; | |
| qcom,msm-bus,name = "sdcc1"; | |
| qcom,msm-bus,num-cases = <0x9>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x640 0xc80 0x4e 0x200 0x13880 0x27100 0x4e 0x200 0x186a0 0x30d40 0x4e 0x200 0x30d40 0x61a80 0x4e 0x200 0x61a80 0xc3500 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>; | |
| qcom,dat1-mpm-int = <0x2a>; | |
| status = "disabled"; | |
| vdd-supply = <0x4b>; | |
| vdd-io-supply = <0x35>; | |
| }; | |
| qcom,sdcc@f98a4000 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,msm-sdcc"; | |
| reg = <0xf98a4000 0x800 0xf98a4800 0x100 0xf9884000 0x7000>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| interrupts = <0x0 0x1 0x2>; | |
| interrupt-names = "core_irq", "bam_irq", "status_irq"; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| qcom,bus-width = <0x4>; | |
| qcom,xpc; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50", "SDR104"; | |
| qcom,current-limit = <0x320>; | |
| qcom,msm-bus,name = "sdcc2"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x640 0xc80 0x51 0x200 0x13880 0x27100 0x51 0x200 0x186a0 0x30d40 0x51 0x200 0x30d40 0x61a80 0x51 0x200 0x61a80 0xc3500 0x51 0x200 0xc3500 0x186a00 0x51 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| qcom,dat1-mpm-int = <0x2c>; | |
| status = "disabled"; | |
| vdd-supply = <0x14>; | |
| vdd-io-supply = <0x15>; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x4c>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x7d 0x0 0x1 0x1 0x0 0xdc 0x0 0x2 0x5 0x3e 0x3>; | |
| cd-gpios = <0x5 0x3e 0x1>; | |
| linux,phandle = <0x4c>; | |
| phandle = <0x4c>; | |
| }; | |
| qcom,sdcc@f9864000 { | |
| cell-index = <0x3>; | |
| compatible = "qcom,msm-sdcc"; | |
| reg = <0xf9864000 0x800 0xf9864800 0x100 0xf9844000 0x7000>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x4d>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x7f 0x0 0x1 0x1 0x0 0xdf 0x0 0x2 0x5 0x25 0x8>; | |
| interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq"; | |
| gpios = <0x5 0x28 0x0 0x5 0x27 0x0 0x5 0x26 0x0 0x5 0x25 0x0 0x5 0x24 0x0 0x5 0x23 0x0>; | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,sup-voltages = <0x708 0x708>; | |
| qcom,bus-width = <0x4>; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; | |
| qcom,msm-bus,name = "sdcc3"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4f 0x200 0x0 0x0 0x4f 0x200 0x640 0xc80 0x4f 0x200 0x13880 0x27100 0x4f 0x200 0x186a0 0x30d40 0x4f 0x200 0x30d40 0x61a80 0x4f 0x200 0x61a80 0xc3500 0x4f 0x200 0xc3500 0x186a00 0x4f 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| status = "disable"; | |
| linux,phandle = <0x4d>; | |
| phandle = <0x4d>; | |
| }; | |
| qcom,sdcc@f98e4000 { | |
| cell-index = <0x4>; | |
| compatible = "qcom,msm-sdcc"; | |
| reg = <0xf98e4000 0x800 0xf98e4800 0x100 0xf98c4000 0x7000>; | |
| reg-names = "core_mem", "dml_mem", "bam_mem"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x4e>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x81 0x0 0x1 0x1 0x0 0xe2 0x0 0x2 0x5 0x5f 0x8>; | |
| interrupt-names = "core_irq", "bam_irq", "sdiowakeup_irq"; | |
| gpios = <0x5 0x5d 0x0 0x5 0x5b 0x0 0x5 0x60 0x0 0x5 0x5f 0x0 0x5 0x5e 0x0 0x5 0x5c 0x0>; | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,sup-voltages = <0x708 0x708>; | |
| qcom,bus-width = <0x4>; | |
| qcom,bus-speed-mode = "SDR12", "SDR25", "SDR50", "DDR50"; | |
| qcom,msm-bus,name = "sdcc4"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x50 0x200 0x0 0x0 0x50 0x200 0x640 0xc80 0x50 0x200 0x13880 0x27100 0x50 0x200 0x186a0 0x30d40 0x50 0x200 0x30d40 0x61a80 0x50 0x200 0x61a80 0xc3500 0x50 0x200 0xc3500 0x186a00 0x50 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| status = "disable"; | |
| linux,phandle = <0x4e>; | |
| phandle = <0x4e>; | |
| }; | |
| sdhci@f9824900 { | |
| qcom,bus-width = <0x8>; | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0xf9824900 0x11c 0xf9824000 0x800>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupts = <0x0 0x7b 0x0 0x0 0x8a 0x0>; | |
| interrupt-names = "hc_irq", "pwr_irq"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xb71b000 0x16e36000>; | |
| qcom,bus-speed-mode = "HS400_1p8v", "HS200_1p8v", "DDR_1p8v"; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| qcom,msm-bus,name = "sdhc1"; | |
| qcom,msm-bus,num-cases = <0x9>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4e 0x200 0x0 0x0 0x4e 0x200 0x640 0xc80 0x4e 0x200 0x13880 0x27100 0x4e 0x200 0x186a0 0x30d40 0x4e 0x200 0x30d40 0x61a80 0x4e 0x200 0x61a80 0xc3500 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0xc3500 0x186a00 0x4e 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0x17d78400 0xffffffff>; | |
| qcom,dat1-mpm-int = <0x2a>; | |
| status = "ok"; | |
| vdd-supply = <0x4b>; | |
| vdd-io-supply = <0x35>; | |
| qcom,vdd-always-on; | |
| qcom,vdd-lpm-sup; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x320 0x7a120>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0xfa 0x25990>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3 0x1>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3 0x1>; | |
| qcom,pad-drv-on = <0x4 0x4 0x4>; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| qcom,nonremovable; | |
| }; | |
| sdhci@f98a4900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0xf98a4900 0x11c 0xf98a4000 0x800>; | |
| reg-names = "hc_mem", "core_mem"; | |
| interrupts = <0x0 0x1>; | |
| interrupt-names = "hc_irq", "pwr_irq"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200>; | |
| qcom,bus-width = <0x4>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| qcom,msm-bus,name = "sdhc2"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x51 0x200 0x0 0x0 0x51 0x200 0x640 0xc80 0x51 0x200 0x13880 0x27100 0x51 0x200 0x186a0 0x30d40 0x51 0x200 0x30d40 0x61a80 0x51 0x200 0x61a80 0xc3500 0x51 0x200 0xc3500 0x186a00 0x51 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| qcom,dat1-mpm-int = <0x2c>; | |
| status = "ok"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x4f>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x7d 0x0 0x1 0x1 0x0 0xdd 0x0>; | |
| vdd-supply = <0x35>; | |
| vdd-io-supply = <0x35>; | |
| qcom,vdd-always-on; | |
| qcom,vdd-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-current-level = <0x7d0 0x3e80>; | |
| qcom,vdd-io-always-on; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x1b7740>; | |
| qcom,vdd-io-current-level = <0x7d0 0x3e80>; | |
| qcom,pad-pull-on = <0x0 0x3 0x3>; | |
| qcom,pad-pull-off = <0x0 0x3 0x3>; | |
| qcom,pad-drv-on = <0x7 0x4 0x4>; | |
| qcom,pad-drv-off = <0x0 0x0 0x0>; | |
| qcom,current-limit = <0x3e80>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| status-cb = <0x2>; | |
| linux,phandle = <0x4f>; | |
| phandle = <0x4f>; | |
| }; | |
| sdhci@f9864900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0xf9864900 0x11c 0xf9864000 0x800>; | |
| reg-names = "hc_mem", "core_mem"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x50>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x7f 0x0 0x1 0x1 0x0 0xe0 0x0 0x2 0x5 0x3e 0x3>; | |
| interrupt-names = "hc_irq", "pwr_irq", "status_irq"; | |
| gpios = <0x5 0x28 0x0 0x5 0x27 0x0 0x5 0x26 0x0 0x5 0x25 0x0 0x5 0x24 0x0 0x5 0x23 0x0>; | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,bus-width = <0x4>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| qcom,msm-bus,name = "sdhc3"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x4f 0x200 0x0 0x0 0x4f 0x200 0x640 0xc80 0x4f 0x200 0x13880 0x27100 0x4f 0x200 0x186a0 0x30d40 0x4f 0x200 0x30d40 0x61a80 0x4f 0x200 0x61a80 0xc3500 0x4f 0x200 0xc3500 0x186a00 0x4f 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| status = "ok"; | |
| cd-gpios = <0x5 0x3e 0x1>; | |
| vdd-supply = <0x14>; | |
| vdd-io-supply = <0x15>; | |
| qcom,vdd-voltage-level = <0x2d0370 0x2d0370>; | |
| qcom,vdd-current-level = <0x2328 0xc3500>; | |
| qcom,vdd-io-voltage-level = <0x1b7740 0x2d0370>; | |
| qcom,vdd-io-current-level = <0x6 0x55f0>; | |
| qcom,sup-voltages = <0xb86 0xb86>; | |
| linux,phandle = <0x50>; | |
| phandle = <0x50>; | |
| }; | |
| sdhci@f98e4900 { | |
| compatible = "qcom,sdhci-msm"; | |
| reg = <0xf98e4900 0x11c 0xf98e4000 0x800>; | |
| reg-names = "hc_mem", "core_mem"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x51>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x81 0x0 0x1 0x1 0x0 0xe3 0x0 0x2 0x5 0x5f 0x8>; | |
| interrupt-names = "hc_irq", "pwr_irq", "sdiowakeup_irq"; | |
| gpios = <0x5 0x5d 0x0 0x5 0x5b 0x0 0x5 0x60 0x0 0x5 0x5f 0x0 0x5 0x5e 0x0 0x5 0x5c 0x0>; | |
| qcom,gpio-names = "CLK", "CMD", "DAT0", "DAT1", "DAT2", "DAT3"; | |
| qcom,clk-rates = <0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100>; | |
| qcom,bus-width = <0x4>; | |
| qcom,cpu-dma-latency-us = <0xc8>; | |
| qcom,msm-bus,name = "sdhc4"; | |
| qcom,msm-bus,num-cases = <0x8>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x50 0x200 0x0 0x0 0x50 0x200 0x640 0xc80 0x50 0x200 0x13880 0x27100 0x50 0x200 0x186a0 0x30d40 0x50 0x200 0x30d40 0x61a80 0x50 0x200 0x61a80 0xc3500 0x50 0x200 0xc3500 0x186a00 0x50 0x200 0x1f4000 0x3e8000>; | |
| qcom,bus-bw-vectors-bps = <0x0 0x61a80 0x1312d00 0x17d7840 0x2faf080 0x5f5e100 0xbebc200 0xffffffff>; | |
| status = "disable"; | |
| linux,phandle = <0x51>; | |
| phandle = <0x51>; | |
| }; | |
| qcom,sps@f9980000 { | |
| compatible = "qcom,msm_sps"; | |
| reg = <0xf9984000 0x15000 0xf9999000 0xb000>; | |
| interrupts = <0x0 0x5e 0x0>; | |
| qcom,bam-dma-res-pipes = <0x6>; | |
| }; | |
| spi@f9966000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "spi_physical", "spi_bam_physical"; | |
| reg = <0xf9966000 0x1000 0xf9944000 0x19000>; | |
| interrupt-names = "spi_irq", "spi_bam_irq"; | |
| interrupts = <0x0 0x68 0x0 0x0 0xef 0x0>; | |
| spi-max-frequency = <0x2dc6c00>; | |
| qcom,gpio-mosi = <0x5 0x35 0x0>; | |
| qcom,gpio-miso = <0x5 0x36 0x0>; | |
| qcom,gpio-clk = <0x5 0x38 0x0>; | |
| qcom,gpio-cs0 = <0x5 0x37 0x0>; | |
| qcom,infinite-mode = <0x0>; | |
| qcom,use-bam; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x12>; | |
| qcom,bam-producer-pipe-index = <0x13>; | |
| qcom,master-id = <0x54>; | |
| qcom,gpio-cs3 = <0x5 0x5a 0x0>; | |
| qcom,companion@0 { | |
| compatible = "qcom,companion"; | |
| cell-index = <0x0>; | |
| reg = <0x0>; | |
| spi-max-frequency = <0x2dc6c00>; | |
| gpios = <0x5 0x1c 0x0>; | |
| qcom,gpio-irq = <0x1c>; | |
| qcom,gpio-comp-en = <0xc 0x2 0x0>; | |
| qcom,companion-id = <0x73c1>; | |
| qcom,spiop-read = <0x3 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-readseq = <0x3 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-queryid = <0x90 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-pprog = <0x2 0x2 0x0 0x0 0x0>; | |
| qcom,spiop-wenable = <0x6 0x0 0x0 0x0 0x0>; | |
| qcom,spiop-readst = <0x5 0x0 0x0 0x0 0x0>; | |
| qcom,spiop-erase = <0x20 0x2 0x0 0xa 0x1e>; | |
| qcom,spi-busy-mask = <0x1>; | |
| qcom,spi-page-size = <0x256>; | |
| qcom,spi-erase-size = <0x4096>; | |
| linux,phandle = <0xd>; | |
| phandle = <0xd>; | |
| }; | |
| qcom,eeprom@3 { | |
| compatible = "qcom,eeprom"; | |
| reg = <0x3>; | |
| cell-index = <0x0>; | |
| spi-max-frequency = <0x2dc6c00>; | |
| qcom,eeprom-name = "fidelix"; | |
| qcom,eeprom-id0 = <0xf8 0x15>; | |
| qcom,eeprom-id1 = <0xef 0x15>; | |
| qcom,eeprom-id2 = <0xc2 0x36>; | |
| qcom,eeprom-id3 = <0xc8 0x15>; | |
| qcom,cal-num-blocks = <0x10>; | |
| qcom,cal-page0 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll0 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem0 = <0xe0 0x0 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page1 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll1 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem1 = <0x4 0xffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page2 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll2 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem2 = <0x140 0x1000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page3 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll3 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem3 = <0x4 0x1ffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page4 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll4 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem4 = <0x20 0x2000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page5 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll5 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem5 = <0x4 0x2ffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page6 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll6 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem6 = <0x19f0 0x3000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page7 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll7 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem7 = <0x4 0x4ffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page8 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll8 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem8 = <0x410 0x5000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page9 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll9 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem9 = <0x4 0x8ffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page10 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll10 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem10 = <0x6240 0x9000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page11 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll11 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem11 = <0x4 0xfffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page12 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll12 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem12 = <0x19f0 0x15000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page13 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll13 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem13 = <0x4 0x16ffc 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page14 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll14 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem14 = <0x13ffc 0x17000 0x3 0x0 0x1 0x0>; | |
| qcom,cal-page15 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-poll15 = <0x0 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,cal-mem15 = <0x4 0x2affc 0x3 0x0 0x1 0x0>; | |
| qcom,cam-vreg-name = "max77826_ldo8"; | |
| qcom,cam-vreg-type = <0x0>; | |
| qcom,camvreg-min-voltage = <0x1b7740>; | |
| qcom,cam-vreg-max-voltage = <0x1b7740>; | |
| qcom,cam-vreg-op-mode = <0x1388>; | |
| qcom,cam-power-seq-type = "sensor_vreg"; | |
| qcom,cam-power-seq-val = "max77826_ldo8"; | |
| qcom,cam-power-seq-cfg-val = <0x1>; | |
| qcom,cam-power-seq-delay = <0x1>; | |
| qcom,spiop-read = <0x3 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-readseq = <0x3 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-queryid = <0x90 0x3 0x0 0x0 0x0>; | |
| qcom,spiop-pprog = <0x2 0x3 0x0 0x3 0x3>; | |
| qcom,spiop-wenable = <0x6 0x0 0x0 0x0 0x0>; | |
| qcom,spiop-readst = <0x5 0x0 0x0 0x0 0x0>; | |
| qcom,spiop-erase = <0x20 0x3 0x0 0xa 0x1e>; | |
| qcom,spi-busy-mask = <0x1>; | |
| qcom,spi-page-size = <0x100>; | |
| qcom,spi-erase-size = <0x1000>; | |
| linux,phandle = <0x8>; | |
| phandle = <0x8>; | |
| }; | |
| }; | |
| msm_tspp@f99d8000 { | |
| compatible = "qcom,msm_tspp"; | |
| cell-index = <0x0>; | |
| reg = <0xf99d8000 0x1000 0xf99d9000 0x1000 0xf99da000 0x1000 0xf99c4000 0x14000>; | |
| reg-names = "MSM_TSIF0_PHYS", "MSM_TSIF1_PHYS", "MSM_TSPP_PHYS", "MSM_TSPP_BAM_PHYS"; | |
| interrupts = <0x0 0x79 0x0 0x0 0x77 0x0 0x0 0x78 0x0 0x0 0x7a 0x0>; | |
| interrupt-names = "TSIF_TSPP_IRQ", "TSIF0_IRQ", "TSIF1_IRQ", "TSIF_BAM_IRQ"; | |
| qcom,tsif-pclk = "iface_clk"; | |
| qcom,tsif-ref-clk = "ref_clk"; | |
| gpios = <0x5 0x59 0x0 0x5 0x5a 0x0 0x5 0x5b 0x0 0x5 0x5c 0x0 0x5 0x5d 0x0 0x5 0x5e 0x0 0x5 0x5f 0x0 0x5 0x60 0x0>; | |
| qcom,gpio-names = "tsif_clk", "tsif_en", "tsif_data", "tsif_sync", "tsif_clk", "tsif_en", "tsif_data", "tsif_sync"; | |
| qcom,gpios-func = <0x1>; | |
| qcom,msm-bus,name = "tsif"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x52 0x200 0x0 0x0 0x52 0x200 0x3000 0x6000>; | |
| vdd_cx-supply = <0x27>; | |
| }; | |
| slim@fe12f000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,slim-ngd"; | |
| reg = <0xfe12f000 0x35000 0xfe104000 0x20000>; | |
| reg-names = "slimbus_physical", "slimbus_bam_physical"; | |
| interrupts = <0x0 0xa3 0x0 0x0 0xa4 0x0>; | |
| interrupt-names = "slimbus_irq", "slimbus_bam_irq"; | |
| qcom,apps-ch-pipes = <0x60000000>; | |
| qcom,ea-pc = <0x30>; | |
| taiko_codec { | |
| compatible = "qcom,taiko-slim-pgd"; | |
| elemental-addr = [00 01 a0 00 17 02]; | |
| interrupt-parent = <0x52>; | |
| interrupts = <0x0 0x1 0x2 0x3 0x4 0x5 0x6 0x7 0x8 0x9 0xa 0xb 0xc 0xd 0xe 0xf 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d 0x1e>; | |
| qcom,cdc-reset-gpio = <0x5 0x4e 0x0>; | |
| qcom,cdc-vdd-buck-voltage = <0x20ce70 0x20ce70>; | |
| qcom,cdc-vdd-buck-current = <0x9eb10>; | |
| qcom,cdc-vdd-tx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-tx-h-current = <0x61a8>; | |
| qcom,cdc-vdd-rx-h-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vdd-rx-h-current = <0x61a8>; | |
| qcom,cdc-vddpx-1-voltage = <0x1b7740 0x1b7740>; | |
| qcom,cdc-vddpx-1-current = <0x2710>; | |
| qcom,cdc-vdd-a-1p2v-voltage = <0x12b128 0x12b128>; | |
| qcom,cdc-vdd-a-1p2v-current = <0x2710>; | |
| qcom,cdc-vddcx-1-voltage = <0x12b128 0x12b128>; | |
| qcom,cdc-vddcx-1-current = <0x2710>; | |
| qcom,cdc-vddcx-2-voltage = <0x12b128 0x12b128>; | |
| qcom,cdc-vddcx-2-current = <0x2710>; | |
| qcom,cdc-static-supplies = "cdc-vdd-buck", "cdc-vdd-tx-h", "cdc-vdd-rx-h", "cdc-vddpx-1", "cdc-vdd-a-1p2v", "cdc-vddcx-1", "cdc-vddcx-2"; | |
| qcom,cdc-micbias-ldoh-v = <0x3>; | |
| qcom,cdc-micbias-cfilt1-mv = <0x708>; | |
| qcom,cdc-micbias-cfilt2-mv = <0xaf0>; | |
| qcom,cdc-micbias-cfilt3-mv = <0xa8c>; | |
| qcom,cdc-micbias1-cfilt-sel = <0x0>; | |
| qcom,cdc-micbias2-cfilt-sel = <0x0>; | |
| qcom,cdc-micbias3-cfilt-sel = <0x0>; | |
| qcom,cdc-micbias4-cfilt-sel = <0x0>; | |
| qcom,cdc-mclk-clk-rate = <0x927c00>; | |
| qcom,cdc-slim-ifd = "taiko-slim-ifd"; | |
| qcom,cdc-slim-ifd-elemental-addr = [00 00 a0 00 17 02]; | |
| qcom,cdc-dmic-sample-rate = <0x249f00>; | |
| cdc-vdd-buck-supply = <0x53>; | |
| cdc-vdd-tx-h-supply = <0x35>; | |
| cdc-vdd-rx-h-supply = <0x35>; | |
| cdc-vddpx-1-supply = <0x35>; | |
| cdc-vdd-a-1p2v-supply = <0x54>; | |
| cdc-vddcx-1-supply = <0x54>; | |
| cdc-vddcx-2-supply = <0x54>; | |
| qcom,cdc-micbias1-ext-cap; | |
| qcom,cdc-micbias2-ext-cap; | |
| qcom,cdc-micbias3-ext-cap; | |
| qcom,cdc-micbias4-ext-cap; | |
| cdc-vdd-spkdrv-supply = <0x55>; | |
| qcom,cdc-vdd-spkdrv-voltage = <0x0 0x0>; | |
| qcom,cdc-vdd-spkdrv-current = <0x0>; | |
| qcom,cdc-on-demand-supplies = "cdc-vdd-spkdrv"; | |
| }; | |
| es705-codec { | |
| compatible = "es705-codec-gen0"; | |
| elemental-addr = [00 01 83 00 be 02]; | |
| es705-gpioa-gpio = <0x5 0x4c 0x0>; | |
| es705-gpiob-gpio = <0x5 0x4f 0x0>; | |
| es705-uart-tx = <0x5 0x0 0x0>; | |
| es705-uart-rx = <0x5 0x1 0x0>; | |
| es705-reset-expander-gpio = <0x12c>; | |
| es705-slim-ifd = "es705-ifd"; | |
| es705-slim-ifd-elemental-addr = [00 00 03 00 be 02]; | |
| }; | |
| }; | |
| sound { | |
| compatible = "qcom,msm8974-audio-taiko"; | |
| qcom,model = "msm8974-taiko-mtp-snd-card"; | |
| qcom,hdmi-audio-rx; | |
| reg = <0xfe02c000 0x4 0xfe02d000 0x4 0xfe02e000 0x4 0xfe02f000 0x4>; | |
| reg-names = "lpaif_pri_mode_muxsel", "lpaif_sec_mode_muxsel", "lpaif_tert_mode_muxsel", "lpaif_quat_mode_muxsel"; | |
| qcom,audio-routing = "RX_BIAS", "MCLK", "LDO_H", "MCLK", "AIF4 MAD", "MCLK", "AMIC2", "MIC BIAS2 External", "MIC BIAS2 External", "Headset Mic", "DMIC1", "MIC BIAS1 External", "MIC BIAS1 External", "Digital Mic1", "DMIC2", "Main Mic Bias", "Main Mic Bias", "Main Mic", "DMIC3", "MIC BIAS3 External", "MIC BIAS3 External", "Digital Mic3", "DMIC4", "MIC BIAS1 External", "MIC BIAS1 External", "Sub Mic", "DMIC5", "MIC BIAS4 External", "MIC BIAS4 External", "Digital Mic5", "DMIC6", "MIC BIAS3 External", "MIC BIAS3 External", "Third Mic"; | |
| qcom,taiko-mclk-clk-freq = <0x927c00>; | |
| qcom,prim-auxpcm-gpio-clk = <0x5 0x41 0x0>; | |
| qcom,prim-auxpcm-gpio-sync = <0x5 0x42 0x0>; | |
| qcom,prim-auxpcm-gpio-din = <0x5 0x43 0x0>; | |
| qcom,prim-auxpcm-gpio-dout = <0x5 0x44 0x0>; | |
| qcom,prim-auxpcm-gpio-set = "prim-gpio-prim"; | |
| qcom,sec-auxpcm-gpio-clk = <0x5 0x4f 0x0>; | |
| qcom,sec-auxpcm-gpio-sync = <0x5 0x50 0x0>; | |
| qcom,sec-auxpcm-gpio-din = <0x5 0x51 0x0>; | |
| qcom,sec-auxpcm-gpio-dout = <0x5 0x52 0x0>; | |
| qcom,micbias-en-msm-gpio = <0xb 0x7 0x0>; | |
| qcom,micbias-en-msm-jpn-gpio = <0x5 0x7b 0x0>; | |
| qcom,cdc-mclk-gpios = <0xb 0xf 0x0>; | |
| qcom,cdc-micbias2-headset-only; | |
| }; | |
| qcom,spmi@fc4c0000 { | |
| cell-index = <0x0>; | |
| compatible = "qcom,spmi-pmic-arb"; | |
| reg-names = "core", "intr", "cnfg"; | |
| reg = <0xfc4cf000 0x1000 0xfc4cb000 0x1000 0xfc4ca000 0x1000>; | |
| interrupts = <0x0 0xbe 0x0 0x0 0xbb 0x0>; | |
| qcom,pmic-arb-ee = <0x0>; | |
| qcom,pmic-arb-channel = <0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupt-controller; | |
| #interrupt-cells = <0x3>; | |
| linux,phandle = <0x62>; | |
| phandle = <0x62>; | |
| qcom,pma8084@0 { | |
| spmi-slave-container; | |
| reg = <0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,revid@100 { | |
| compatible = "qcom,qpnp-revid"; | |
| reg = <0x100 0x100>; | |
| }; | |
| qcom,power-on@800 { | |
| compatible = "qcom,qpnp-power-on"; | |
| reg = <0x800 0x100>; | |
| interrupts = <0x0 0x8 0x0 0x0 0x8 0x1 0x0 0x8 0x4 0x0 0x8 0x5>; | |
| interrupt-names = "kpdpwr", "resin", "resin-bark", "kpdpwr-resin-bark"; | |
| qcom,pon-dbc-delay = <0x3d09>; | |
| qcom,system-reset; | |
| qcom,s3-debounce = <0x80>; | |
| qcom,pon_1 { | |
| qcom,pon-type = <0x0>; | |
| qcom,pull-up = <0x1>; | |
| linux,code = <0x74>; | |
| qcom,disable-reset = <0x1>; | |
| }; | |
| qcom,pon_2 { | |
| qcom,pon-type = <0x1>; | |
| qcom,support-reset = <0x0>; | |
| qcom,pull-up = <0x0>; | |
| qcom,s1-timer = <0x0>; | |
| qcom,s2-timer = <0x7d0>; | |
| qcom,s2-type = <0x1>; | |
| linux,code = <0x0>; | |
| qcom,disable-reset = <0x1>; | |
| }; | |
| qcom,pon_3 { | |
| qcom,pon-type = <0x3>; | |
| qcom,support-reset = <0x1>; | |
| qcom,s1-timer = <0x1a40>; | |
| qcom,s2-timer = <0x3e8>; | |
| qcom,s2-type = <0x1>; | |
| qcom,pull-up = <0x1>; | |
| qcom,s1-timer2 = <0x2810>; | |
| qcom,s2-timer2 = <0x64>; | |
| }; | |
| }; | |
| qcom,misc@900 { | |
| compatible = "qcom,qpnp-misc"; | |
| reg = <0x900 0x100>; | |
| }; | |
| qcom,temp-alarm@2400 { | |
| compatible = "qcom,qpnp-temp-alarm"; | |
| reg = <0x2400 0x100>; | |
| interrupts = <0x0 0x24 0x0>; | |
| label = "pma8084_tz"; | |
| qcom,threshold-set = <0x0>; | |
| qcom,temp_alarm-vadc = <0x56>; | |
| }; | |
| qcom,coincell@2800 { | |
| compatible = "qcom,qpnp-coincell"; | |
| reg = <0x2800 0x100>; | |
| }; | |
| gpios { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pma8084-gpio"; | |
| linux,phandle = <0xb>; | |
| phandle = <0xb>; | |
| gpio@c000 { | |
| reg = <0xc000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| qcom,mode = <0x0>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x2>; | |
| qcom,src-sel = <0x3>; | |
| qcom,pull = <0x5>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c100 { | |
| reg = <0xc100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c200 { | |
| reg = <0xc200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c300 { | |
| reg = <0xc300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c400 { | |
| reg = <0xc400 0x100>; | |
| qcom,pin-num = <0x5>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c500 { | |
| reg = <0xc500 0x100>; | |
| qcom,pin-num = <0x6>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,master-en = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x2>; | |
| qcom.src-sel = <0x3>; | |
| }; | |
| gpio@c600 { | |
| reg = <0xc600 0x100>; | |
| qcom,pin-num = <0x7>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,invert = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,out-strength = <0x2>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c700 { | |
| reg = <0xc700 0x100>; | |
| qcom,pin-num = <0x8>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c800 { | |
| reg = <0xc800 0x100>; | |
| qcom,pin-num = <0x9>; | |
| qcom,mode = <0x1>; | |
| qcom,out-strength = <0x1>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@c900 { | |
| reg = <0xc900 0x100>; | |
| qcom,pin-num = <0xa>; | |
| status = "ok"; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x4>; | |
| qcom,src-sel = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@ca00 { | |
| reg = <0xca00 0x100>; | |
| qcom,pin-num = <0xb>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@cb00 { | |
| reg = <0xcb00 0x100>; | |
| qcom,pin-num = <0xc>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,invert = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,out-strength = <0x2>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@cc00 { | |
| reg = <0xcc00 0x100>; | |
| qcom,pin-num = <0xd>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x4>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@cd00 { | |
| reg = <0xcd00 0x100>; | |
| qcom,pin-num = <0xe>; | |
| qcom,mode = <0x1>; | |
| qcom,out-strength = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@ce00 { | |
| reg = <0xce00 0x100>; | |
| qcom,pin-num = <0xf>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x1>; | |
| qcom,src-sel = <0x2>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@cf00 { | |
| reg = <0xcf00 0x100>; | |
| qcom,pin-num = <0x10>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,out-strength = <0x3>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x3>; | |
| qcom,master_en = <0x1>; | |
| }; | |
| gpio@d000 { | |
| reg = <0xd000 0x100>; | |
| qcom,pin-num = <0x11>; | |
| qcom,mode = <0x1>; | |
| qcom,pull = <0x5>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@d100 { | |
| reg = <0xd100 0x100>; | |
| qcom,pin-num = <0x12>; | |
| qcom,mode = <0x1>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,out-strength = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@d200 { | |
| reg = <0xd200 0x100>; | |
| qcom,pin-num = <0x13>; | |
| }; | |
| gpio@d300 { | |
| reg = <0xd300 0x100>; | |
| qcom,pin-num = <0x14>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@d400 { | |
| reg = <0xd400 0x100>; | |
| qcom,pin-num = <0x15>; | |
| qcom,mode = <0x0>; | |
| qcom,pull = <0x5>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| gpio@d500 { | |
| reg = <0xd500 0x100>; | |
| qcom,pin-num = <0x16>; | |
| }; | |
| }; | |
| mpps { | |
| spmi-dev-container; | |
| compatible = "qcom,qpnp-pin"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| label = "pma8084-mpp"; | |
| linux,phandle = <0xc>; | |
| phandle = <0xc>; | |
| mpp@a000 { | |
| reg = <0xa000 0x100>; | |
| qcom,pin-num = <0x1>; | |
| status = "disabled"; | |
| }; | |
| mpp@a100 { | |
| reg = <0xa100 0x100>; | |
| qcom,pin-num = <0x2>; | |
| qcom,mode = <0x1>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| mpp@a200 { | |
| reg = <0xa200 0x100>; | |
| qcom,pin-num = <0x3>; | |
| }; | |
| mpp@a300 { | |
| reg = <0xa300 0x100>; | |
| qcom,pin-num = <0x4>; | |
| qcom,mode = <0x4>; | |
| qcom,ain-route = <0x3>; | |
| qcom,master-en = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| }; | |
| mpp@a400 { | |
| reg = <0xa400 0x100>; | |
| qcom,pin-num = <0x5>; | |
| qcom,mode = <0x1>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| mpp@a500 { | |
| reg = <0xa500 0x100>; | |
| qcom,pin-num = <0x6>; | |
| qcom,mode = <0x1>; | |
| qcom,output-type = <0x0>; | |
| qcom,vin-sel = <0x2>; | |
| qcom,src-sel = <0x0>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| mpp@a600 { | |
| reg = <0xa600 0x100>; | |
| qcom,pin-num = <0x7>; | |
| qcom,mode = <0x1>; | |
| qcom,out-strength = <0x1>; | |
| qcom,master-en = <0x1>; | |
| }; | |
| mpp@a700 { | |
| reg = <0xa700 0x100>; | |
| qcom,pin-num = <0x8>; | |
| qcom,mode = <0x4>; | |
| qcom,ain-route = <0x3>; | |
| qcom,master-en = <0x1>; | |
| qcom,src-sel = <0x0>; | |
| }; | |
| }; | |
| vadc@3100 { | |
| compatible = "qcom,qpnp-vadc"; | |
| reg = <0x3100 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupts = <0x0 0x31 0x0>; | |
| interrupt-names = "eoc-int-en-set"; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,vadc-poll-eoc; | |
| linux,phandle = <0x56>; | |
| phandle = <0x56>; | |
| chan@8 { | |
| label = "die_temp"; | |
| reg = <0x8>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x3>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@9 { | |
| label = "ref_625mv"; | |
| reg = <0x9>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@a { | |
| label = "ref_1250v"; | |
| reg = <0xa>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@c { | |
| label = "ref_buf_625mv"; | |
| reg = <0xc>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@27 { | |
| label = "vf_div3"; | |
| reg = <0x27>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "absolute"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@74 { | |
| label = "emmc_therm"; | |
| reg = <0x74>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@23 { | |
| label = "mpp4_div3"; | |
| reg = <0x23>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x1>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x0>; | |
| qcom,hw-settle-time = <0x0>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@73 { | |
| label = "msm_therm"; | |
| reg = <0x73>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@75 { | |
| label = "pa_therm0"; | |
| reg = <0x75>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@77 { | |
| label = "pa_therm1"; | |
| reg = <0x77>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| chan@78 { | |
| label = "quiet_therm"; | |
| reg = <0x78>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| }; | |
| }; | |
| vadc@3400 { | |
| compatible = "qcom,qpnp-adc-tm"; | |
| reg = <0x3400 0x100>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| interrupts = <0x0 0x34 0x0 0x0 0x34 0x3 0x0 0x34 0x4>; | |
| interrupt-names = "eoc-int-en-set", "high-thr-en-set", "low-thr-en-set"; | |
| qcom,adc-bit-resolution = <0xf>; | |
| qcom,adc-vdd-reference = <0x708>; | |
| qcom,adc_tm-vadc = <0x56>; | |
| chan@73 { | |
| label = "msm_therm"; | |
| reg = <0x73>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x48>; | |
| qcom,thermal-node; | |
| }; | |
| chan@75 { | |
| label = "pa_therm0"; | |
| reg = <0x75>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x68>; | |
| qcom,thermal-node; | |
| }; | |
| chan@77 { | |
| label = "pa_therm1"; | |
| reg = <0x77>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x70>; | |
| qcom,thermal-node; | |
| }; | |
| chan@78 { | |
| label = "quiet_therm"; | |
| reg = <0x78>; | |
| qcom,decimation = <0x0>; | |
| qcom,pre-div-channel-scaling = <0x0>; | |
| qcom,calibration-type = "ratiometric"; | |
| qcom,scale-function = <0x2>; | |
| qcom,hw-settle-time = <0x2>; | |
| qcom,fast-avg-setup = <0x0>; | |
| qcom,btm-channel-number = <0x78>; | |
| qcom,thermal-node; | |
| }; | |
| }; | |
| qcom,rtc { | |
| compatible = "qcom,qpnp-rtc"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| qcom,qpnp-rtc-write = <0x0>; | |
| qcom,qpnp-rtc-alarm-pwrup = <0x0>; | |
| qcom,rtc_rw@6000 { | |
| reg = <0x6000 0x100>; | |
| }; | |
| qcom,rtc_alarm@6100 { | |
| reg = <0x6100 0x100>; | |
| interrupts = <0x0 0x61 0x1>; | |
| }; | |
| }; | |
| }; | |
| qcom,pma8084@1 { | |
| spmi-slave-container; | |
| reg = <0x1>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| regulator@1400 { | |
| regulator-name = "8084_s1"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x1400 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@1400 { | |
| reg = <0x1400 0x100>; | |
| }; | |
| qcom,ps@1500 { | |
| reg = <0x1500 0x100>; | |
| }; | |
| qcom,freq@1600 { | |
| reg = <0x1600 0x100>; | |
| }; | |
| }; | |
| regulator@1700 { | |
| regulator-name = "8084_s2"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x1700 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@1700 { | |
| reg = <0x1700 0x100>; | |
| }; | |
| qcom,ps@1800 { | |
| reg = <0x1800 0x100>; | |
| }; | |
| qcom,freq@1900 { | |
| reg = <0x1900 0x100>; | |
| }; | |
| }; | |
| regulator@1a00 { | |
| regulator-name = "8084_s3"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x1a00 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@1a00 { | |
| reg = <0x1a00 0x100>; | |
| }; | |
| qcom,ps@1b00 { | |
| reg = <0x1b00 0x100>; | |
| }; | |
| qcom,freq@1c00 { | |
| reg = <0x1c00 0x100>; | |
| }; | |
| }; | |
| regulator@1d00 { | |
| regulator-name = "8084_s4"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x1d00 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@1d00 { | |
| reg = <0x1d00 0x100>; | |
| }; | |
| qcom,ps@1e00 { | |
| reg = <0x1e00 0x100>; | |
| }; | |
| qcom,freq@1f00 { | |
| reg = <0x1f00 0x100>; | |
| }; | |
| }; | |
| regulator@2000 { | |
| regulator-name = "8084_s5"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2000 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2000 { | |
| reg = <0x2000 0x100>; | |
| }; | |
| qcom,ps@2100 { | |
| reg = <0x2100 0x100>; | |
| }; | |
| qcom,freq@2200 { | |
| reg = <0x2200 0x100>; | |
| }; | |
| }; | |
| regulator@2300 { | |
| regulator-name = "8084_s6"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2300 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2300 { | |
| reg = <0x2300 0x100>; | |
| }; | |
| qcom,ps@2400 { | |
| reg = <0x2400 0x100>; | |
| }; | |
| qcom,freq@2500 { | |
| reg = <0x2500 0x100>; | |
| }; | |
| }; | |
| regulator@2600 { | |
| regulator-name = "8084_s7"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2600 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2600 { | |
| reg = <0x2600 0x100>; | |
| }; | |
| qcom,ps@2700 { | |
| reg = <0x2700 0x100>; | |
| }; | |
| qcom,freq@2800 { | |
| reg = <0x2800 0x100>; | |
| }; | |
| }; | |
| regulator@2900 { | |
| regulator-name = "8084_s8"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2900 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2900 { | |
| reg = <0x2900 0x100>; | |
| }; | |
| qcom,ps@2a00 { | |
| reg = <0x2a00 0x100>; | |
| }; | |
| qcom,freq@2b00 { | |
| reg = <0x2b00 0x100>; | |
| }; | |
| }; | |
| regulator@2c00 { | |
| regulator-name = "8084_s9"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2c00 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2c00 { | |
| reg = <0x2c00 0x100>; | |
| }; | |
| qcom,ps@2d00 { | |
| reg = <0x2d00 0x100>; | |
| }; | |
| qcom,freq@2e00 { | |
| reg = <0x2e00 0x100>; | |
| }; | |
| }; | |
| regulator@2f00 { | |
| regulator-name = "8084_s10"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x2f00 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@2f00 { | |
| reg = <0x2f00 0x100>; | |
| }; | |
| qcom,ps@3000 { | |
| reg = <0x3000 0x100>; | |
| }; | |
| qcom,freq@3100 { | |
| reg = <0x3100 0x100>; | |
| }; | |
| }; | |
| regulator@3200 { | |
| regulator-name = "8084_s11"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x3200 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@3200 { | |
| reg = <0x3200 0x100>; | |
| }; | |
| qcom,ps@3300 { | |
| reg = <0x3300 0x100>; | |
| }; | |
| qcom,freq@3400 { | |
| reg = <0x3400 0x100>; | |
| }; | |
| }; | |
| regulator@3500 { | |
| regulator-name = "8084_s12"; | |
| spmi-dev-container; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| compatible = "qcom,qpnp-regulator"; | |
| reg = <0x3500 0x300>; | |
| status = "disabled"; | |
| qcom,ctl@3500 { | |
| reg = <0x3500 0x100>; | |
| }; | |
| qcom,ps@3600 { | |
| reg = <0x3600 0x100>; | |
| }; | |
| qcom,freq@3700 { | |
| reg = <0x3700 0x100>; | |
| }; | |
| }; | |
| regulator@4000 { | |
| regulator-name = "8084_l1"; | |
| reg = <0x4000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4100 { | |
| regulator-name = "8084_l2"; | |
| reg = <0x4100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4200 { | |
| regulator-name = "8084_l3"; | |
| reg = <0x4200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4300 { | |
| regulator-name = "8084_l4"; | |
| reg = <0x4300 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4400 { | |
| regulator-name = "8084_l5"; | |
| reg = <0x4400 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4500 { | |
| regulator-name = "8084_l6"; | |
| reg = <0x4500 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4600 { | |
| regulator-name = "8084_l7"; | |
| reg = <0x4600 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4700 { | |
| regulator-name = "8084_l8"; | |
| reg = <0x4700 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4800 { | |
| regulator-name = "8084_l9"; | |
| reg = <0x4800 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4900 { | |
| regulator-name = "8084_l10"; | |
| reg = <0x4900 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4a00 { | |
| regulator-name = "8084_l11"; | |
| reg = <0x4a00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4b00 { | |
| regulator-name = "8084_l12"; | |
| reg = <0x4b00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4c00 { | |
| regulator-name = "8084_l13"; | |
| reg = <0x4c00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4d00 { | |
| regulator-name = "8084_l14"; | |
| reg = <0x4d00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4e00 { | |
| regulator-name = "8084_l15"; | |
| reg = <0x4e00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@4f00 { | |
| regulator-name = "8084_l16"; | |
| reg = <0x4f00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5000 { | |
| regulator-name = "8084_l17"; | |
| reg = <0x5000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5100 { | |
| regulator-name = "8084_l18"; | |
| reg = <0x5100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5200 { | |
| regulator-name = "8084_l19"; | |
| reg = <0x5200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5300 { | |
| regulator-name = "8084_l20"; | |
| reg = <0x5300 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5400 { | |
| regulator-name = "8084_l21"; | |
| reg = <0x5400 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5500 { | |
| regulator-name = "8084_l22"; | |
| reg = <0x5500 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5600 { | |
| regulator-name = "8084_l23"; | |
| reg = <0x5600 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5700 { | |
| regulator-name = "8084_l24"; | |
| reg = <0x5700 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5800 { | |
| regulator-name = "8084_l25"; | |
| reg = <0x5800 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5900 { | |
| regulator-name = "8084_l26"; | |
| reg = <0x5900 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@5a00 { | |
| regulator-name = "8084_l27"; | |
| reg = <0x5a00 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@8000 { | |
| regulator-name = "8084_lvs1"; | |
| reg = <0x8000 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@8100 { | |
| regulator-name = "8084_lvs2"; | |
| reg = <0x8100 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@8200 { | |
| regulator-name = "8084_lvs3"; | |
| reg = <0x8200 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@8300 { | |
| regulator-name = "8084_lvs4"; | |
| reg = <0x8300 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "disabled"; | |
| }; | |
| regulator@8400 { | |
| regulator-name = "8084_mvs1"; | |
| reg = <0x8400 0x100>; | |
| compatible = "qcom,qpnp-regulator"; | |
| status = "okay"; | |
| qcom,enable-time = <0x3e8>; | |
| qcom,pull-down-enable = <0x1>; | |
| interrupts = <0x1 0x84 0x2>; | |
| interrupt-names = "ocp"; | |
| qcom,ocp-enable = <0x1>; | |
| qcom,ocp-max-retries = <0xa>; | |
| qcom,ocp-retry-delay = <0x1e>; | |
| qcom,soft-start-enable = <0x1>; | |
| qcom,vs-soft-start-strength = <0x0>; | |
| qcom,hpm-enable = <0x1>; | |
| qcom,auto-mode-enable = <0x0>; | |
| linux,phandle = <0x34>; | |
| phandle = <0x34>; | |
| }; | |
| qcom,krait-regulator-pmic@2900 { | |
| spmi-dev-container; | |
| compatible = "qcom,krait-regulator-pmic"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| status = "ok"; | |
| qcom,ctl@2900 { | |
| reg = <0x2900 0x100>; | |
| status = "ok"; | |
| }; | |
| qcom,ps@2a00 { | |
| reg = <0x2a00 0x100>; | |
| status = "ok"; | |
| }; | |
| qcom,freq@2b00 { | |
| reg = <0x2b00 0x100>; | |
| status = "ok"; | |
| }; | |
| }; | |
| pwm@b100 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb100 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x0>; | |
| }; | |
| pwm@b200 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb200 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x1>; | |
| }; | |
| pwm@b300 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb300 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x2>; | |
| }; | |
| pwm@b400 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb400 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x3>; | |
| }; | |
| pwm@b500 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb500 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x4>; | |
| }; | |
| pwm@b600 { | |
| compatible = "qcom,qpnp-pwm"; | |
| reg = <0xb600 0x100 0xb042 0x7e>; | |
| reg-names = "qpnp-lpg-channel-base", "qpnp-lpg-lut-base"; | |
| qcom,channel-id = <0x5>; | |
| }; | |
| }; | |
| }; | |
| i2c@f9923000 { | |
| cell-index = <0x1>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9923000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x5f 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x61a80>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,scl-gpio = <0x5 0x3 0x0>; | |
| qcom,sda-gpio = <0x5 0x2 0x0>; | |
| qcom,master-id = <0x56>; | |
| status = "ok"; | |
| bcm2079x-i2c@77 { | |
| compatible = "bcm2079x-i2c"; | |
| reg = <0x77>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x3b 0x0>; | |
| bcm2079x-i2c,irq-gpio = <0x5 0x3b 0x0>; | |
| bcm2079x-i2c,en-gpio = <0xb 0x9 0x0>; | |
| bcm2079x-i2c,wake-expander-gpio = <0x137>; | |
| }; | |
| pn547@29 { | |
| compatible = "pn547"; | |
| reg = <0x29>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x3b 0x0>; | |
| pn547,irq-gpio = <0x5 0x3b 0x0>; | |
| pn547,ven-gpio = <0xb 0x9 0x0>; | |
| pn547,firm-expander-gpio = <0x137>; | |
| }; | |
| ncp6335b@1c { | |
| compatible = "ncp6335b,camera-dcdc"; | |
| reg = <0x1c>; | |
| }; | |
| max86900@51 { | |
| compatible = "max86900"; | |
| reg = <0x51>; | |
| interrupt-parent = <0xb>; | |
| interrupts = <0xc 0x0>; | |
| max86900,hrm_int-gpio = <0xb 0xc 0x0>; | |
| max86900,sub_ldo4 = "max77826_ldo4"; | |
| }; | |
| }; | |
| i2c@f9924000 { | |
| cell-index = <0x2>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9924000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x60 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x61a80>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,master-id = <0x56>; | |
| synaptics_rmi4_i2c@20 { | |
| compatible = "synaptics,rmi4-ts"; | |
| reg = <0x20>; | |
| interrupt-parent = <0xb>; | |
| interrupts = <0x8 0x0>; | |
| vcc_en-supply = <0x57>; | |
| synaptics,supply-num = <0x2>; | |
| synaptics,supply-name = "max77826_ldo13", "8084_lvs2"; | |
| synaptics,scl-gpio = <0x5 0x7 0x0>; | |
| synaptics,sda-gpio = <0x5 0x6 0x0>; | |
| synaptics,irq-gpio = <0xb 0x8 0x1>; | |
| synaptics,tsp-coords = <0x437 0x77f>; | |
| synaptics,i2c-pull-up = <0x1>; | |
| synaptics,tsp-project = [4b 00]; | |
| synaptics,tsp-extra_config = <0x0 0x0 0x81 0x0>; | |
| }; | |
| }; | |
| i2c@f9925000 { | |
| cell-index = <0x3>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9925000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x61 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,scl-gpio = <0x5 0xb 0x0>; | |
| qcom,sda-gpio = <0x5 0xa 0x0>; | |
| qcom,master-id = <0x56>; | |
| gpios = <0x5 0xa 0x0 0x5 0xb 0x0>; | |
| sii8240tmds@39 { | |
| compatible = "sii8240,tmds"; | |
| reg = <0x39>; | |
| sii8240,client_id = <0x0>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x1f 0x1>; | |
| sii8240,gpio_mhl_reset = <0xc 0x6 0x0>; | |
| sii8240,gpio_mhl_reset_type = "pm_mpps"; | |
| sii8240,swing_level = <0x25>; | |
| sii8240,gpio_mhl_irq = <0x5 0x1f 0x0>; | |
| sii8240,gpio_mhl_wakeup = <0x0>; | |
| sii8240,gpio_mhl_scl = <0x5 0xb 0x0>; | |
| sii8240,gpio_mhl_sda = <0x5 0xa 0x0>; | |
| sii8240,drm_workaround; | |
| qcom,hdmi-tx-map = <0x58>; | |
| linux,phandle = <0x36>; | |
| phandle = <0x36>; | |
| }; | |
| sii8240hdmi@49 { | |
| compatible = "sii8240,hdmi"; | |
| reg = <0x49>; | |
| sii8240,client_id = <0x1>; | |
| }; | |
| sii8240disc@4D { | |
| compatible = "sii8240,disc"; | |
| reg = <0x4d>; | |
| sii8240,client_id = <0x2>; | |
| }; | |
| sii8240tpi@59 { | |
| compatible = "sii8240,tpi"; | |
| reg = <0x59>; | |
| sii8240,client_id = <0x3>; | |
| }; | |
| sii8240cbus@64 { | |
| compatible = "sii8240,cbus"; | |
| reg = <0x64>; | |
| sii8240,client_id = <0x4>; | |
| }; | |
| }; | |
| i2c@f9928000 { | |
| cell-index = <0x6>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9928000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x64 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,scl-gpio = <0x5 0x1e 0x0>; | |
| qcom,sda-gpio = <0x5 0x1d 0x0>; | |
| qcom,master-id = <0x56>; | |
| }; | |
| i2c@f9965000 { | |
| status = "ok"; | |
| cell-index = <0x63>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9965000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x67 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,scl-gpio = <0x5 0x34 0x0>; | |
| qcom,sda-gpio = <0x5 0x33 0x0>; | |
| qcom,master-id = <0x54>; | |
| }; | |
| spi@f9923000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "spi_physical", "spi_bam_physical"; | |
| reg = <0xf9923000 0x1000 0xf9904000 0x19000>; | |
| interrupt-names = "spi_irq", "spi_bam_irq"; | |
| interrupts = <0x0 0x5f 0x0 0x0 0xee 0x0>; | |
| spi-max-frequency = <0xb71b00>; | |
| qcom,gpio-mosi = <0x5 0x0 0x0>; | |
| qcom,gpio-miso = <0x5 0x1 0x0>; | |
| qcom,gpio-clk = <0x5 0x3 0x0>; | |
| qcom,gpio-cs0 = <0x5 0x2 0x0>; | |
| qcom,infinite-mode = <0x0>; | |
| qcom,use-bam; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0xc>; | |
| qcom,bam-producer-pipe-index = <0xd>; | |
| qcom,master-id = <0x56>; | |
| status = "disabled"; | |
| ethernet-switch@2 { | |
| compatible = "micrel,ks8851"; | |
| reg = <0x2>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x5e 0x0>; | |
| spi-max-frequency = <0x493e00>; | |
| rst-gpio = <0xc 0x6 0x0>; | |
| vdd-io-supply = <0x59>; | |
| vdd-phy-supply = <0x59>; | |
| }; | |
| }; | |
| qcom,acpuclk@f9000000 { | |
| compatible = "qcom,acpuclk-8974"; | |
| krait0-supply = <0x5a>; // krait-regulator 1 | |
| krait1-supply = <0x5b>; | |
| krait2-supply = <0x5c>; | |
| krait3-supply = <0x5d>; // krait regulator 4 | |
| krait0_mem-supply = <0x5e>; | |
| krait1_mem-supply = <0x5e>; | |
| krait2_mem-supply = <0x5e>; | |
| krait3_mem-supply = <0x5e>; | |
| krait0_dig-supply = <0x5f>; | |
| krait1_dig-supply = <0x5f>; | |
| krait2_dig-supply = <0x5f>; | |
| krait3_dig-supply = <0x5f>; | |
| krait0_hfpll-supply = <0x60>; | |
| krait1_hfpll-supply = <0x60>; | |
| krait2_hfpll-supply = <0x60>; | |
| krait3_hfpll-supply = <0x60>; | |
| l2_hfpll-supply = <0x60>; | |
| }; | |
| qcom,clock-krait@f9016000 { | |
| compatible = "qcom,clock-krait-8974"; | |
| reg = <0xf9016000 0x20 0xf908a000 0x20 0xf909a000 0x20 0xf90aa000 0x20 0xf90ba000 0x20 0xfc4b80b0 0x8>; | |
| reg-names = "hfpll_l2_clk", "hfpll0_clk", "hfpll1_clk", "hfpll2_clk", "hfpll3_clk", "efuse"; | |
| cpu0-supply = <0x5a>; | |
| cpu1-supply = <0x5b>; | |
| cpu2-supply = <0x5c>; | |
| cpu3-supply = <0x5d>; | |
| l2-dig-supply = <0x5f>; | |
| hfpll-dig-supply = <0x5f>; | |
| hfpll-analog-supply = <0x60>; | |
| qcom,hfpll-config-val = <0x4d0405d>; | |
| qcom,hfpll-user-vco-mask = <0x100000>; | |
| qcom,l2-fmax = <0x0 0x0 0x22551000 0x4 0x3dcc5000 0x5 0x66ff3000 0x7>; | |
| qcom,speed0-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc6f98 0x49 0x14997000 0xc96a8 0x55 0x192d5000 0xcbdb8 0x68 0x1dc13000 0xce4c8 0x7c 0x22551000 0xd0bd8 0x90 0x26e8f000 0xd32e8 0xa5 0x2b7cd000 0xd59f8 0xba 0x3010b000 0xd9490 0xd0 0x34a49000 0xdbba0 0xe5 0x39387000 0xdf638 0xfc 0x3dcc5000 0xe1d48 0x113 0x42603000 0xe57e0 0x12a 0x46f41000 0xe7ef0 0x141 0x4b87f000 0xeb988 0x15a 0x501bd000 0xef420 0x173 0x54afb000 0xf2eb8 0x18d 0x59439000 0xf6950 0x1a7 0x5dd77000 0xfa3e8 0x1c2 0x626b5000 0xfde80 0x1dd 0x66ff3000 0x101918 0x1fa 0x6b931000 0x1053b0 0x218 0x7026f000 0x108e48 0x237 0x74bad000 0x10c8e0 0x256>; | |
| qcom,speed0-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x49 0x14997000 0xc5c10 0x55 0x192d5000 0xc8320 0x68 0x1dc13000 0xcaa30 0x7c 0x22551000 0xcd140 0x90 0x26e8f000 0xcf850 0xa5 0x2b7cd000 0xd1f60 0xba 0x3010b000 0xd59f8 0xd0 0x34a49000 0xd8108 0xe5 0x39387000 0xda818 0xfc 0x3dcc5000 0xde2b0 0x113 0x42603000 0xe09c0 0x12a 0x46f41000 0xe30d0 0x141 0x4b87f000 0xe6b68 0x15a 0x501bd000 0xea600 0x173 0x54afb000 0xee098 0x18d 0x59439000 0xf1b30 0x1a7 0x5dd77000 0xf55c8 0x1c2 0x626b5000 0xf9060 0x1dd 0x66ff3000 0xfb770 0x1fa 0x6b931000 0xff208 0x218 0x7026f000 0x102ca0 0x237 0x74bad000 0x106738 0x256>; | |
| qcom,speed0-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbfa68 0x49 0x14997000 0xc2178 0x55 0x192d5000 0xc4888 0x68 0x1dc13000 0xc6f98 0x7c 0x22551000 0xc96a8 0x90 0x26e8f000 0xcbdb8 0xa5 0x2b7cd000 0xce4c8 0xba 0x3010b000 0xd0bd8 0xd0 0x34a49000 0xd32e8 0xe5 0x39387000 0xd59f8 0xfc 0x3dcc5000 0xd9490 0x113 0x42603000 0xdbba0 0x12a 0x46f41000 0xde2b0 0x141 0x4b87f000 0xe1d48 0x15a 0x501bd000 0xe57e0 0x173 0x54afb000 0xe9278 0x18d 0x59439000 0xecd10 0x1a7 0x5dd77000 0xef420 0x1c2 0x626b5000 0xf2eb8 0x1dd 0x66ff3000 0xf55c8 0x1fa 0x6b931000 0xf9060 0x218 0x7026f000 0xfcaf8 0x237 0x74bad000 0x100590 0x256>; | |
| qcom,speed0-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x49 0x14997000 0xbe6e0 0x55 0x192d5000 0xc0df0 0x68 0x1dc13000 0xc3500 0x7c 0x22551000 0xc5c10 0x90 0x26e8f000 0xc8320 0xa5 0x2b7cd000 0xcaa30 0xba 0x3010b000 0xcd140 0xd0 0x34a49000 0xcf850 0xe5 0x39387000 0xd1f60 0xfc 0x3dcc5000 0xd59f8 0x113 0x42603000 0xd8108 0x12a 0x46f41000 0xda818 0x141 0x4b87f000 0xde2b0 0x15a 0x501bd000 0xe1d48 0x173 0x54afb000 0xe4458 0x18d 0x59439000 0xe7ef0 0x1a7 0x5dd77000 0xea600 0x1c2 0x626b5000 0xecd10 0x1dd 0x66ff3000 0xf07a8 0x1fa 0x6b931000 0xf2eb8 0x218 0x7026f000 0xf6950 0x237 0x74bad000 0xfa3e8 0x256>; | |
| qcom,speed0-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x49 0x14997000 0xbd358 0x55 0x192d5000 0xbe6e0 0x68 0x1dc13000 0xc0df0 0x7c 0x22551000 0xc3500 0x90 0x26e8f000 0xc5c10 0xa5 0x2b7cd000 0xc8320 0xba 0x3010b000 0xcaa30 0xd0 0x34a49000 0xcd140 0xe5 0x39387000 0xcf850 0xfc 0x3dcc5000 0xd1f60 0x113 0x42603000 0xd4670 0x12a 0x46f41000 0xd6d80 0x141 0x4b87f000 0xda818 0x15a 0x501bd000 0xde2b0 0x173 0x54afb000 0xe09c0 0x18d 0x59439000 0xe30d0 0x1a7 0x5dd77000 0xe57e0 0x1c2 0x626b5000 0xe7ef0 0x1dd 0x66ff3000 0xea600 0x1fa 0x6b931000 0xee098 0x218 0x7026f000 0xf07a8 0x237 0x74bad000 0xf4240 0x256>; | |
| qcom,speed0-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x49 0x14997000 0xb98c0 0x55 0x192d5000 0xbbfd0 0x68 0x1dc13000 0xbe6e0 0x7c 0x22551000 0xc0df0 0x90 0x26e8f000 0xc3500 0xa5 0x2b7cd000 0xc5c10 0xba 0x3010b000 0xc8320 0xd0 0x34a49000 0xcaa30 0xe5 0x39387000 0xcd140 0xfc 0x3dcc5000 0xcf850 0x113 0x42603000 0xd1f60 0x12a 0x46f41000 0xd4670 0x141 0x4b87f000 0xd6d80 0x15a 0x501bd000 0xd9490 0x173 0x54afb000 0xdbba0 0x18d 0x59439000 0xde2b0 0x1a7 0x5dd77000 0xe09c0 0x1c2 0x626b5000 0xe30d0 0x1dd 0x66ff3000 0xe57e0 0x1fa 0x6b931000 0xe9278 0x218 0x7026f000 0xeb988 0x237 0x74bad000 0xee098 0x256>; | |
| qcom,speed0-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x49 0x14997000 0xb71b0 0x55 0x192d5000 0xb98c0 0x68 0x1dc13000 0xbbfd0 0x7c 0x22551000 0xbe6e0 0x90 0x26e8f000 0xc0df0 0xa5 0x2b7cd000 0xc3500 0xba 0x3010b000 0xc5c10 0xd0 0x34a49000 0xc8320 0xe5 0x39387000 0xcaa30 0xfc 0x3dcc5000 0xcd140 0x113 0x42603000 0xcf850 0x12a 0x46f41000 0xd1f60 0x141 0x4b87f000 0xd4670 0x15a 0x501bd000 0xd59f8 0x173 0x54afb000 0xd8108 0x18d 0x59439000 0xda818 0x1a7 0x5dd77000 0xdcf28 0x1c2 0x626b5000 0xdf638 0x1dd 0x66ff3000 0xe09c0 0x1fa 0x6b931000 0xe30d0 0x218 0x7026f000 0xe57e0 0x237 0x74bad000 0xe7ef0 0x256>; | |
| qcom,speed2-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x48 0x14997000 0xc3500 0x53 0x192d5000 0xc4888 0x66 0x1dc13000 0xc6f98 0x79 0x22551000 0xc96a8 0x8d 0x26e8f000 0xcbdb8 0xa1 0x2b7cd000 0xce4c8 0xb5 0x3010b000 0xd0bd8 0xca 0x34a49000 0xd32e8 0xdf 0x39387000 0xd59f8 0xf5 0x3dcc5000 0xd9490 0x10b 0x42603000 0xdbba0 0x121 0x46f41000 0xdf638 0x139 0x4b87f000 0xe1d48 0x150 0x501bd000 0xe57e0 0x168 0x54afb000 0xe7ef0 0x17f 0x59439000 0xeb988 0x199 0x5dd77000 0xef420 0x1b3 0x626b5000 0xf2eb8 0x1cd 0x66ff3000 0xf6950 0x1e8 0x6b931000 0xfa3e8 0x204 0x7026f000 0xfde80 0x21f 0x74bad000 0x101918 0x23d 0x794eb000 0x1053b0 0x25c 0x7de29000 0x108e48 0x27c 0x802c8000 0x10c8e0 0x290>; | |
| qcom,speed2-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x48 0x14997000 0xc3500 0x53 0x192d5000 0xc3500 0x66 0x1dc13000 0xc3500 0x79 0x22551000 0xc5c10 0x8d 0x26e8f000 0xc8320 0xa1 0x2b7cd000 0xcaa30 0xb5 0x3010b000 0xcd140 0xca 0x34a49000 0xcf850 0xdf 0x39387000 0xd1f60 0xf5 0x3dcc5000 0xd59f8 0x10b 0x42603000 0xd8108 0x121 0x46f41000 0xda818 0x139 0x4b87f000 0xde2b0 0x150 0x501bd000 0xe09c0 0x168 0x54afb000 0xe30d0 0x17f 0x59439000 0xe6b68 0x199 0x5dd77000 0xea600 0x1b3 0x626b5000 0xee098 0x1cd 0x66ff3000 0xf1b30 0x1e8 0x6b931000 0xf55c8 0x204 0x7026f000 0xf9060 0x21f 0x74bad000 0xfb770 0x23d 0x794eb000 0xff208 0x25c 0x7de29000 0x102ca0 0x27c 0x802c8000 0x106738 0x290>; | |
| qcom,speed2-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbfa68 0x79 0x22551000 0xc2178 0x8d 0x26e8f000 0xc4888 0xa1 0x2b7cd000 0xc6f98 0xb5 0x3010b000 0xc96a8 0xca 0x34a49000 0xcbdb8 0xdf 0x39387000 0xce4c8 0xf5 0x3dcc5000 0xd0bd8 0x10b 0x42603000 0xd32e8 0x121 0x46f41000 0xd59f8 0x139 0x4b87f000 0xd9490 0x150 0x501bd000 0xdbba0 0x168 0x54afb000 0xde2b0 0x17f 0x59439000 0xe1d48 0x199 0x5dd77000 0xe57e0 0x1b3 0x626b5000 0xe9278 0x1cd 0x66ff3000 0xecd10 0x1e8 0x6b931000 0xef420 0x204 0x7026f000 0xf2eb8 0x21f 0x74bad000 0xf55c8 0x23d 0x794eb000 0xf9060 0x25c 0x7de29000 0xfcaf8 0x27c 0x802c8000 0x100590 0x290>; | |
| qcom,speed2-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbd358 0x79 0x22551000 0xbe6e0 0x8d 0x26e8f000 0xc0df0 0xa1 0x2b7cd000 0xc3500 0xb5 0x3010b000 0xc5c10 0xca 0x34a49000 0xc8320 0xdf 0x39387000 0xcaa30 0xf5 0x3dcc5000 0xcd140 0x10b 0x42603000 0xcf850 0x121 0x46f41000 0xd1f60 0x139 0x4b87f000 0xd59f8 0x150 0x501bd000 0xd8108 0x168 0x54afb000 0xda818 0x17f 0x59439000 0xde2b0 0x199 0x5dd77000 0xe1d48 0x1b3 0x626b5000 0xe4458 0x1cd 0x66ff3000 0xe7ef0 0x1e8 0x6b931000 0xea600 0x204 0x7026f000 0xecd10 0x21f 0x74bad000 0xf07a8 0x23d 0x794eb000 0xf2eb8 0x25c 0x7de29000 0xf6950 0x27c 0x802c8000 0xfa3e8 0x290>; | |
| qcom,speed2-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x48 0x14997000 0xbd358 0x53 0x192d5000 0xbd358 0x66 0x1dc13000 0xbd358 0x79 0x22551000 0xbd358 0x8d 0x26e8f000 0xbe6e0 0xa1 0x2b7cd000 0xc0df0 0xb5 0x3010b000 0xc3500 0xca 0x34a49000 0xc5c10 0xdf 0x39387000 0xc8320 0xf5 0x3dcc5000 0xcaa30 0x10b 0x42603000 0xcd140 0x121 0x46f41000 0xcf850 0x139 0x4b87f000 0xd1f60 0x150 0x501bd000 0xd4670 0x168 0x54afb000 0xd6d80 0x17f 0x59439000 0xda818 0x199 0x5dd77000 0xde2b0 0x1b3 0x626b5000 0xe09c0 0x1cd 0x66ff3000 0xe30d0 0x1e8 0x6b931000 0xe57e0 0x204 0x7026f000 0xe7ef0 0x21f 0x74bad000 0xea600 0x23d 0x794eb000 0xee098 0x25c 0x7de29000 0xf07a8 0x27c 0x802c8000 0xf4240 0x290>; | |
| qcom,speed2-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x48 0x14997000 0xb71b0 0x53 0x192d5000 0xb71b0 0x66 0x1dc13000 0xb71b0 0x79 0x22551000 0xb98c0 0x8d 0x26e8f000 0xbbfd0 0xa1 0x2b7cd000 0xbe6e0 0xb5 0x3010b000 0xc0df0 0xca 0x34a49000 0xc3500 0xdf 0x39387000 0xc5c10 0xf5 0x3dcc5000 0xc8320 0x10b 0x42603000 0xcaa30 0x121 0x46f41000 0xcd140 0x139 0x4b87f000 0xcf850 0x150 0x501bd000 0xd1f60 0x168 0x54afb000 0xd4670 0x17f 0x59439000 0xd6d80 0x199 0x5dd77000 0xd9490 0x1b3 0x626b5000 0xdbba0 0x1cd 0x66ff3000 0xde2b0 0x1e8 0x6b931000 0xe09c0 0x204 0x7026f000 0xe30d0 0x21f 0x74bad000 0xe57e0 0x23d 0x794eb000 0xe9278 0x25c 0x7de29000 0xeb988 0x27c 0x802c8000 0xee098 0x290>; | |
| qcom,speed2-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x48 0x14997000 0xb71b0 0x53 0x192d5000 0xb71b0 0x66 0x1dc13000 0xb71b0 0x79 0x22551000 0xb71b0 0x8d 0x26e8f000 0xb98c0 0xa1 0x2b7cd000 0xbbfd0 0xb5 0x3010b000 0xbe6e0 0xca 0x34a49000 0xc0df0 0xdf 0x39387000 0xc3500 0xf5 0x3dcc5000 0xc5c10 0x10b 0x42603000 0xc8320 0x121 0x46f41000 0xcaa30 0x139 0x4b87f000 0xcd140 0x150 0x501bd000 0xcf850 0x168 0x54afb000 0xd1f60 0x17f 0x59439000 0xd4670 0x199 0x5dd77000 0xd59f8 0x1b3 0x626b5000 0xd8108 0x1cd 0x66ff3000 0xda818 0x1e8 0x6b931000 0xdcf28 0x204 0x7026f000 0xdf638 0x21f 0x74bad000 0xe09c0 0x23d 0x794eb000 0xe30d0 0x25c 0x7de29000 0xe57e0 0x27c 0x802c8000 0xe7ef0 0x290>; | |
| qcom,speed1-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4a 0x14997000 0xbd358 0x55 0x192d5000 0xbd358 0x68 0x1dc13000 0xbe6e0 0x7c 0x22551000 0xc0df0 0x90 0x26e8f000 0xc3500 0xa4 0x2b7cd000 0xc5c10 0xb8 0x3010b000 0xc8320 0xce 0x34a49000 0xcaa30 0xe3 0x39387000 0xcd140 0xf9 0x3dcc5000 0xcf850 0x10f 0x42603000 0xd32e8 0x127 0x46f41000 0xd59f8 0x13e 0x4b87f000 0xd9490 0x156 0x501bd000 0xdbba0 0x16d 0x54afb000 0xdf638 0x188 0x59439000 0xe1d48 0x1a0 0x5dd77000 0xe57e0 0x1ba 0x626b5000 0xe9278 0x1d5 0x66ff3000 0xecd10 0x1f1 0x6b931000 0xf07a8 0x20d 0x7026f000 0xf4240 0x22a 0x74bad000 0xf7cd8 0x247 0x794eb000 0xfb770 0x265 0x7de29000 0xff208 0x282 0x802c8000 0x102ca0 0x297 0x82767000 0x102ca0 0x2a3 0x870a5000 0x106738 0x2c4>; | |
| qcom,speed1-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4a 0x14997000 0xbd358 0x55 0x192d5000 0xbd358 0x68 0x1dc13000 0xbd358 0x7c 0x22551000 0xbd358 0x90 0x26e8f000 0xbfa68 0xa4 0x2b7cd000 0xc2178 0xb8 0x3010b000 0xc4888 0xce 0x34a49000 0xc6f98 0xe3 0x39387000 0xc96a8 0xf9 0x3dcc5000 0xcbdb8 0x10f 0x42603000 0xcf850 0x127 0x46f41000 0xd1f60 0x13e 0x4b87f000 0xd4670 0x156 0x501bd000 0xd8108 0x16d 0x54afb000 0xda818 0x188 0x59439000 0xdcf28 0x1a0 0x5dd77000 0xe09c0 0x1ba 0x626b5000 0xe4458 0x1d5 0x66ff3000 0xe7ef0 0x1f1 0x6b931000 0xeb988 0x20d 0x7026f000 0xef420 0x22a 0x74bad000 0xf2eb8 0x247 0x794eb000 0xf55c8 0x265 0x7de29000 0xf9060 0x282 0x802c8000 0xfcaf8 0x297 0x82767000 0xfcaf8 0x2a3 0x870a5000 0x100590 0x2c4>; | |
| qcom,speed1-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb98c0 0x90 0x26e8f000 0xbbfd0 0xa4 0x2b7cd000 0xbe6e0 0xb8 0x3010b000 0xc0df0 0xce 0x34a49000 0xc3500 0xe3 0x39387000 0xc5c10 0xf9 0x3dcc5000 0xc8320 0x10f 0x42603000 0xcaa30 0x127 0x46f41000 0xcd140 0x13e 0x4b87f000 0xcf850 0x156 0x501bd000 0xd32e8 0x16d 0x54afb000 0xd59f8 0x188 0x59439000 0xd8108 0x1a0 0x5dd77000 0xdbba0 0x1ba 0x626b5000 0xdf638 0x1d5 0x66ff3000 0xe30d0 0x1f1 0x6b931000 0xe6b68 0x20d 0x7026f000 0xe9278 0x22a 0x74bad000 0xecd10 0x247 0x794eb000 0xef420 0x265 0x7de29000 0xf2eb8 0x282 0x802c8000 0xf6950 0x297 0x82767000 0xf6950 0x2a3 0x870a5000 0xfa3e8 0x2c4>; | |
| qcom,speed1-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb71b0 0x90 0x26e8f000 0xb8538 0xa4 0x2b7cd000 0xbac48 0xb8 0x3010b000 0xbd358 0xce 0x34a49000 0xbfa68 0xe3 0x39387000 0xc2178 0xf9 0x3dcc5000 0xc4888 0x10f 0x42603000 0xc6f98 0x127 0x46f41000 0xc96a8 0x13e 0x4b87f000 0xcbdb8 0x156 0x501bd000 0xcf850 0x16d 0x54afb000 0xd1f60 0x188 0x59439000 0xd4670 0x1a0 0x5dd77000 0xd8108 0x1ba 0x626b5000 0xdbba0 0x1d5 0x66ff3000 0xde2b0 0x1f1 0x6b931000 0xe1d48 0x20d 0x7026f000 0xe4458 0x22a 0x74bad000 0xe6b68 0x247 0x794eb000 0xea600 0x265 0x7de29000 0xecd10 0x282 0x802c8000 0xf07a8 0x297 0x82767000 0xf07a8 0x2a3 0x870a5000 0xf4240 0x2c4>; | |
| qcom,speed1-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4a 0x14997000 0xb71b0 0x55 0x192d5000 0xb71b0 0x68 0x1dc13000 0xb71b0 0x7c 0x22551000 0xb71b0 0x90 0x26e8f000 0xb71b0 0xa4 0x2b7cd000 0xb8538 0xb8 0x3010b000 0xbac48 0xce 0x34a49000 0xbd358 0xe3 0x39387000 0xbfa68 0xf9 0x3dcc5000 0xc2178 0x10f 0x42603000 0xc4888 0x127 0x46f41000 0xc6f98 0x13e 0x4b87f000 0xc96a8 0x156 0x501bd000 0xcbdb8 0x16d 0x54afb000 0xce4c8 0x188 0x59439000 0xd0bd8 0x1a0 0x5dd77000 0xd4670 0x1ba 0x626b5000 0xd8108 0x1d5 0x66ff3000 0xda818 0x1f1 0x6b931000 0xdcf28 0x20d 0x7026f000 0xdf638 0x22a 0x74bad000 0xe1d48 0x247 0x794eb000 0xe4458 0x265 0x7de29000 0xe7ef0 0x282 0x802c8000 0xea600 0x297 0x82767000 0xea600 0x2a3 0x870a5000 0xee098 0x2c4>; | |
| qcom,speed1-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb1008 0x4a 0x14997000 0xb1008 0x55 0x192d5000 0xb1008 0x68 0x1dc13000 0xb1008 0x7c 0x22551000 0xb1008 0x90 0x26e8f000 0xb3718 0xa4 0x2b7cd000 0xb5e28 0xb8 0x3010b000 0xb8538 0xce 0x34a49000 0xbac48 0xe3 0x39387000 0xbd358 0xf9 0x3dcc5000 0xbfa68 0x10f 0x42603000 0xc2178 0x127 0x46f41000 0xc4888 0x13e 0x4b87f000 0xc6f98 0x156 0x501bd000 0xc96a8 0x16d 0x54afb000 0xcbdb8 0x188 0x59439000 0xce4c8 0x1a0 0x5dd77000 0xd0bd8 0x1ba 0x626b5000 0xd32e8 0x1d5 0x66ff3000 0xd59f8 0x1f1 0x6b931000 0xd8108 0x20d 0x7026f000 0xda818 0x22a 0x74bad000 0xdcf28 0x247 0x794eb000 0xdf638 0x265 0x7de29000 0xe30d0 0x282 0x802c8000 0xe57e0 0x297 0x82767000 0xe57e0 0x2a3 0x870a5000 0xe7ef0 0x2c4>; | |
| qcom,speed1-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb1008 0x4a 0x14997000 0xb1008 0x55 0x192d5000 0xb1008 0x68 0x1dc13000 0xb1008 0x7c 0x22551000 0xb1008 0x90 0x26e8f000 0xb1008 0xa4 0x2b7cd000 0xb3718 0xb8 0x3010b000 0xb5e28 0xce 0x34a49000 0xb8538 0xe3 0x39387000 0xbac48 0xf9 0x3dcc5000 0xbd358 0x10f 0x42603000 0xbfa68 0x127 0x46f41000 0xc2178 0x13e 0x4b87f000 0xc4888 0x156 0x501bd000 0xc6f98 0x16d 0x54afb000 0xc96a8 0x188 0x59439000 0xcbdb8 0x1a0 0x5dd77000 0xce4c8 0x1ba 0x626b5000 0xcf850 0x1d5 0x66ff3000 0xd1f60 0x1f1 0x6b931000 0xd4670 0x20d 0x7026f000 0xd6d80 0x22a 0x74bad000 0xd9490 0x247 0x794eb000 0xda818 0x265 0x7de29000 0xdcf28 0x282 0x802c8000 0xdf638 0x297 0x82767000 0xdf638 0x2a3 0x870a5000 0xe1d48 0x2c4>; | |
| qcom,speed3-pvs0-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7d 0x22551000 0xc3500 0x91 0x26e8f000 0xc5c10 0xa5 0x2b7cd000 0xc8320 0xba 0x3010b000 0xcaa30 0xd0 0x34a49000 0xcd140 0xe5 0x39387000 0xcf850 0xfb 0x3dcc5000 0xd1f60 0x111 0x42603000 0xd4670 0x128 0x46f41000 0xd6d80 0x13f 0x4b87f000 0xd9490 0x156 0x501bd000 0xdbba0 0x16d 0x54afb000 0xde2b0 0x186 0x59439000 0xe09c0 0x19f 0x5dd77000 0xe30d0 0x1b7 0x626b5000 0xe6b68 0x1d1 0x66ff3000 0xea600 0x1ed 0x6b931000 0xee098 0x209 0x7026f000 0xf1b30 0x225 0x74bad000 0xf55c8 0x243 0x794eb000 0xf9060 0x260 0x7de29000 0xfcaf8 0x27e 0x802c8000 0x100590 0x29b 0x82767000 0x100590 0x29b 0x870a5000 0x104028 0x2bc 0x8b9e3000 0x107ac0 0x2de 0x90321000 0x10b558 0x301 0x927c0000 0x10c8e0 0x311>; | |
| qcom,speed3-pvs1-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7d 0x22551000 0xc3500 0x91 0x26e8f000 0xc3500 0xa5 0x2b7cd000 0xc3500 0xba 0x3010b000 0xc4888 0xd0 0x34a49000 0xc6f98 0xe5 0x39387000 0xc96a8 0xfb 0x3dcc5000 0xcbdb8 0x111 0x42603000 0xce4c8 0x128 0x46f41000 0xd0bd8 0x13f 0x4b87f000 0xd32e8 0x156 0x501bd000 0xd59f8 0x16d 0x54afb000 0xd8108 0x186 0x59439000 0xda818 0x19f 0x5dd77000 0xdcf28 0x1b7 0x626b5000 0xe09c0 0x1d1 0x66ff3000 0xe4458 0x1ed 0x6b931000 0xe7ef0 0x209 0x7026f000 0xeb988 0x225 0x74bad000 0xef420 0x243 0x794eb000 0xf2eb8 0x260 0x7de29000 0xf6950 0x27e 0x802c8000 0xfa3e8 0x29b 0x82767000 0xfa3e8 0x29b 0x870a5000 0xfde80 0x2bc 0x8b9e3000 0x101918 0x2de 0x90321000 0x1053b0 0x301 0x927c0000 0x106738 0x311>; | |
| qcom,speed3-pvs2-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbe6e0 0xd0 0x34a49000 0xc0df0 0xe5 0x39387000 0xc3500 0xfb 0x3dcc5000 0xc5c10 0x111 0x42603000 0xc8320 0x128 0x46f41000 0xcaa30 0x13f 0x4b87f000 0xcd140 0x156 0x501bd000 0xcf850 0x16d 0x54afb000 0xd1f60 0x186 0x59439000 0xd4670 0x19f 0x5dd77000 0xd6d80 0x1b7 0x626b5000 0xda818 0x1d1 0x66ff3000 0xde2b0 0x1ed 0x6b931000 0xe1d48 0x209 0x7026f000 0xe57e0 0x225 0x74bad000 0xe9278 0x243 0x794eb000 0xecd10 0x260 0x7de29000 0xf07a8 0x27e 0x802c8000 0xf4240 0x29b 0x82767000 0xf4240 0x29b 0x870a5000 0xf7cd8 0x2bc 0x8b9e3000 0xfb770 0x2de 0x90321000 0xff208 0x301 0x927c0000 0x100590 0x311>; | |
| qcom,speed3-pvs3-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbd358 0xd0 0x34a49000 0xbd358 0xe5 0x39387000 0xbe6e0 0xfb 0x3dcc5000 0xbfa68 0x111 0x42603000 0xc2178 0x128 0x46f41000 0xc4888 0x13f 0x4b87f000 0xc6f98 0x156 0x501bd000 0xc96a8 0x16d 0x54afb000 0xcbdb8 0x186 0x59439000 0xce4c8 0x19f 0x5dd77000 0xd0bd8 0x1b7 0x626b5000 0xd4670 0x1d1 0x66ff3000 0xd8108 0x1ed 0x6b931000 0xdbba0 0x209 0x7026f000 0xdf638 0x225 0x74bad000 0xe30d0 0x243 0x794eb000 0xe6b68 0x260 0x7de29000 0xea600 0x27e 0x802c8000 0xee098 0x29b 0x82767000 0xee098 0x29b 0x870a5000 0xf1b30 0x2bc 0x8b9e3000 0xf55c8 0x2de 0x90321000 0xf9060 0x301 0x927c0000 0xfa3e8 0x311>; | |
| qcom,speed3-pvs4-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7d 0x22551000 0xbd358 0x91 0x26e8f000 0xbd358 0xa5 0x2b7cd000 0xbd358 0xba 0x3010b000 0xbd358 0xd0 0x34a49000 0xbd358 0xe5 0x39387000 0xbd358 0xfb 0x3dcc5000 0xbd358 0x111 0x42603000 0xbd358 0x128 0x46f41000 0xbe6e0 0x13f 0x4b87f000 0xc0df0 0x156 0x501bd000 0xc3500 0x16d 0x54afb000 0xc5c10 0x186 0x59439000 0xc8320 0x19f 0x5dd77000 0xcaa30 0x1b7 0x626b5000 0xce4c8 0x1d1 0x66ff3000 0xd1f60 0x1ed 0x6b931000 0xd59f8 0x209 0x7026f000 0xd9490 0x225 0x74bad000 0xdcf28 0x243 0x794eb000 0xe09c0 0x260 0x7de29000 0xe4458 0x27e 0x802c8000 0xe7ef0 0x29b 0x82767000 0xe7ef0 0x29b 0x870a5000 0xeb988 0x2bc 0x8b9e3000 0xef420 0x2de 0x90321000 0xf2eb8 0x301 0x927c0000 0xf4240 0x311>; | |
| qcom,speed3-pvs5-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7d 0x22551000 0xb71b0 0x91 0x26e8f000 0xb71b0 0xa5 0x2b7cd000 0xb71b0 0xba 0x3010b000 0xb71b0 0xd0 0x34a49000 0xb71b0 0xe5 0x39387000 0xb71b0 0xfb 0x3dcc5000 0xb71b0 0x111 0x42603000 0xb71b0 0x128 0x46f41000 0xb98c0 0x13f 0x4b87f000 0xbbfd0 0x156 0x501bd000 0xbe6e0 0x16d 0x54afb000 0xc0df0 0x186 0x59439000 0xc3500 0x19f 0x5dd77000 0xc5c10 0x1b7 0x626b5000 0xc8320 0x1d1 0x66ff3000 0xcbdb8 0x1ed 0x6b931000 0xcf850 0x209 0x7026f000 0xd32e8 0x225 0x74bad000 0xd6d80 0x243 0x794eb000 0xda818 0x260 0x7de29000 0xde2b0 0x27e 0x802c8000 0xe1d48 0x29b 0x82767000 0xe1d48 0x29b 0x870a5000 0xe57e0 0x2bc 0x8b9e3000 0xe9278 0x2de 0x90321000 0xecd10 0x301 0x927c0000 0xee098 0x311>; | |
| qcom,speed3-pvs6-bin-v0 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7d 0x22551000 0xb71b0 0x91 0x26e8f000 0xb71b0 0xa5 0x2b7cd000 0xb71b0 0xba 0x3010b000 0xb71b0 0xd0 0x34a49000 0xb71b0 0xe5 0x39387000 0xb71b0 0xfb 0x3dcc5000 0xb71b0 0x111 0x42603000 0xb71b0 0x128 0x46f41000 0xb71b0 0x13f 0x4b87f000 0xb8538 0x156 0x501bd000 0xbac48 0x16d 0x54afb000 0xbd358 0x186 0x59439000 0xbfa68 0x19f 0x5dd77000 0xc2178 0x1b7 0x626b5000 0xc4888 0x1d1 0x66ff3000 0xc6f98 0x1ed 0x6b931000 0xc96a8 0x209 0x7026f000 0xcd140 0x225 0x74bad000 0xd0bd8 0x243 0x794eb000 0xd4670 0x260 0x7de29000 0xd8108 0x27e 0x802c8000 0xdbba0 0x29b 0x82767000 0xdbba0 0x29b 0x870a5000 0xdf638 0x2bc 0x8b9e3000 0xe30d0 0x2de 0x90321000 0xe6b68 0x301 0x927c0000 0xe7ef0 0x311>; | |
| qcom,speed1-pvs0-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc5c10 0x57 0x192d5000 0xc8320 0x6c 0x1dc13000 0xcaa30 0x81 0x22551000 0xcd140 0x96 0x26e8f000 0xcf850 0xab 0x2b7cd000 0xd1f60 0xc1 0x3010b000 0xd4670 0xd7 0x34a49000 0xd6d80 0xed 0x39387000 0xd9490 0x104 0x3dcc5000 0xdbba0 0x11a 0x42603000 0xde2b0 0x132 0x46f41000 0xe09c0 0x14a 0x4b87f000 0xe30d0 0x162 0x501bd000 0xe57e0 0x17a 0x54afb000 0xe9278 0x194 0x59439000 0xecd10 0x1af 0x5dd77000 0xf07a8 0x1ca 0x626b5000 0xf4240 0x1e6 0x66ff3000 0xf7cd8 0x203 0x6b931000 0xfb770 0x21f 0x7026f000 0xff208 0x23c 0x74bad000 0x102ca0 0x25c 0x794eb000 0x106738 0x27c 0x7de29000 0x10a1d0 0x29d 0x802c8000 0x10dc68 0x2bf 0x82767000 0x10dc68 0x2bf 0x870a5000 0x111700 0x2e2>; | |
| qcom,speed1-pvs1-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc5c10 0x6c 0x1dc13000 0xc8320 0x81 0x22551000 0xcaa30 0x96 0x26e8f000 0xcd140 0xab 0x2b7cd000 0xcf850 0xc1 0x3010b000 0xd1f60 0xd7 0x34a49000 0xd4670 0xed 0x39387000 0xd6d80 0x104 0x3dcc5000 0xd9490 0x11a 0x42603000 0xdbba0 0x132 0x46f41000 0xde2b0 0x14a 0x4b87f000 0xe09c0 0x162 0x501bd000 0xe30d0 0x17a 0x54afb000 0xe6b68 0x194 0x59439000 0xea600 0x1af 0x5dd77000 0xee098 0x1ca 0x626b5000 0xf1b30 0x1e6 0x66ff3000 0xf55c8 0x203 0x6b931000 0xf9060 0x21f 0x7026f000 0xfcaf8 0x23c 0x74bad000 0x100590 0x25c 0x794eb000 0x104028 0x27c 0x7de29000 0x107ac0 0x29d 0x802c8000 0x10b558 0x2bf 0x82767000 0x10b558 0x2bf 0x870a5000 0x10eff0 0x2e2>; | |
| qcom,speed1-pvs2-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6c 0x1dc13000 0xc5c10 0x81 0x22551000 0xc8320 0x96 0x26e8f000 0xcaa30 0xab 0x2b7cd000 0xcd140 0xc1 0x3010b000 0xcf850 0xd7 0x34a49000 0xd1f60 0xed 0x39387000 0xd4670 0x104 0x3dcc5000 0xd6d80 0x11a 0x42603000 0xd9490 0x132 0x46f41000 0xdbba0 0x14a 0x4b87f000 0xde2b0 0x162 0x501bd000 0xe09c0 0x17a 0x54afb000 0xe4458 0x194 0x59439000 0xe7ef0 0x1af 0x5dd77000 0xeb988 0x1ca 0x626b5000 0xef420 0x1e6 0x66ff3000 0xf2eb8 0x203 0x6b931000 0xf6950 0x21f 0x7026f000 0xfa3e8 0x23c 0x74bad000 0xfde80 0x25c 0x794eb000 0x101918 0x27c 0x7de29000 0x1053b0 0x29d 0x802c8000 0x108e48 0x2bf 0x82767000 0x108e48 0x2bf 0x870a5000 0x10c8e0 0x2e2>; | |
| qcom,speed1-pvs3-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6c 0x1dc13000 0xc3500 0x81 0x22551000 0xc5c10 0x96 0x26e8f000 0xc8320 0xab 0x2b7cd000 0xcaa30 0xc1 0x3010b000 0xcd140 0xd7 0x34a49000 0xcf850 0xed 0x39387000 0xd1f60 0x104 0x3dcc5000 0xd4670 0x11a 0x42603000 0xd6d80 0x132 0x46f41000 0xd9490 0x14a 0x4b87f000 0xdbba0 0x162 0x501bd000 0xde2b0 0x17a 0x54afb000 0xe1d48 0x194 0x59439000 0xe57e0 0x1af 0x5dd77000 0xe9278 0x1ca 0x626b5000 0xecd10 0x1e6 0x66ff3000 0xf07a8 0x203 0x6b931000 0xf4240 0x21f 0x7026f000 0xf7cd8 0x23c 0x74bad000 0xfb770 0x25c 0x794eb000 0xff208 0x27c 0x7de29000 0x102ca0 0x29d 0x802c8000 0x106738 0x2bf 0x82767000 0x106738 0x2bf 0x870a5000 0x10a1d0 0x2e2>; | |
| qcom,speed1-pvs4-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6c 0x1dc13000 0xc3500 0x81 0x22551000 0xc3500 0x96 0x26e8f000 0xc5c10 0xab 0x2b7cd000 0xc8320 0xc1 0x3010b000 0xcaa30 0xd7 0x34a49000 0xcd140 0xed 0x39387000 0xcf850 0x104 0x3dcc5000 0xd1f60 0x11a 0x42603000 0xd4670 0x132 0x46f41000 0xd6d80 0x14a 0x4b87f000 0xd9490 0x162 0x501bd000 0xdbba0 0x17a 0x54afb000 0xdf638 0x194 0x59439000 0xe30d0 0x1af 0x5dd77000 0xe6b68 0x1ca 0x626b5000 0xea600 0x1e6 0x66ff3000 0xee098 0x203 0x6b931000 0xf1b30 0x21f 0x7026f000 0xf55c8 0x23c 0x74bad000 0xf9060 0x25c 0x794eb000 0xfcaf8 0x27c 0x7de29000 0x100590 0x29d 0x802c8000 0x104028 0x2bf 0x82767000 0x104028 0x2bf 0x870a5000 0x107ac0 0x2e2>; | |
| qcom,speed1-pvs5-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6c 0x1dc13000 0xc3500 0x81 0x22551000 0xc3500 0x96 0x26e8f000 0xc3500 0xab 0x2b7cd000 0xc5c10 0xc1 0x3010b000 0xc8320 0xd7 0x34a49000 0xcaa30 0xed 0x39387000 0xcd140 0x104 0x3dcc5000 0xcf850 0x11a 0x42603000 0xd1f60 0x132 0x46f41000 0xd4670 0x14a 0x4b87f000 0xd6d80 0x162 0x501bd000 0xd9490 0x17a 0x54afb000 0xdcf28 0x194 0x59439000 0xe09c0 0x1af 0x5dd77000 0xe4458 0x1ca 0x626b5000 0xe7ef0 0x1e6 0x66ff3000 0xeb988 0x203 0x6b931000 0xef420 0x21f 0x7026f000 0xf2eb8 0x23c 0x74bad000 0xf6950 0x25c 0x794eb000 0xfa3e8 0x27c 0x7de29000 0xfde80 0x29d 0x802c8000 0x101918 0x2bf 0x82767000 0x101918 0x2bf 0x870a5000 0x1053b0 0x2e2>; | |
| qcom,speed1-pvs6-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbfa68 0x96 0x26e8f000 0xc2178 0xab 0x2b7cd000 0xc4888 0xc1 0x3010b000 0xc6f98 0xd7 0x34a49000 0xc96a8 0xed 0x39387000 0xcbdb8 0x104 0x3dcc5000 0xce4c8 0x11a 0x42603000 0xd0bd8 0x132 0x46f41000 0xd32e8 0x14a 0x4b87f000 0xd59f8 0x162 0x501bd000 0xd8108 0x17a 0x54afb000 0xda818 0x194 0x59439000 0xde2b0 0x1af 0x5dd77000 0xe1d48 0x1ca 0x626b5000 0xe57e0 0x1e6 0x66ff3000 0xe9278 0x203 0x6b931000 0xecd10 0x21f 0x7026f000 0xf07a8 0x23c 0x74bad000 0xf4240 0x25c 0x794eb000 0xf7cd8 0x27c 0x7de29000 0xfb770 0x29d 0x802c8000 0xff208 0x2bf 0x82767000 0xff208 0x2bf 0x870a5000 0x102ca0 0x2e2>; | |
| qcom,speed1-pvs7-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbe6e0 0x96 0x26e8f000 0xc0df0 0xab 0x2b7cd000 0xc3500 0xc1 0x3010b000 0xc5c10 0xd7 0x34a49000 0xc8320 0xed 0x39387000 0xcaa30 0x104 0x3dcc5000 0xcd140 0x11a 0x42603000 0xcf850 0x132 0x46f41000 0xd1f60 0x14a 0x4b87f000 0xd4670 0x162 0x501bd000 0xd6d80 0x17a 0x54afb000 0xd9490 0x194 0x59439000 0xdbba0 0x1af 0x5dd77000 0xdf638 0x1ca 0x626b5000 0xe30d0 0x1e6 0x66ff3000 0xe6b68 0x203 0x6b931000 0xea600 0x21f 0x7026f000 0xee098 0x23c 0x74bad000 0xf1b30 0x25c 0x794eb000 0xf55c8 0x27c 0x7de29000 0xf9060 0x29d 0x802c8000 0xfcaf8 0x2bf 0x82767000 0xfcaf8 0x2bf 0x870a5000 0x100590 0x2e2>; | |
| qcom,speed1-pvs8-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbe6e0 0xab 0x2b7cd000 0xc0df0 0xc1 0x3010b000 0xc3500 0xd7 0x34a49000 0xc5c10 0xed 0x39387000 0xc8320 0x104 0x3dcc5000 0xcaa30 0x11a 0x42603000 0xcd140 0x132 0x46f41000 0xcf850 0x14a 0x4b87f000 0xd1f60 0x162 0x501bd000 0xd4670 0x17a 0x54afb000 0xd6d80 0x194 0x59439000 0xd9490 0x1af 0x5dd77000 0xdcf28 0x1ca 0x626b5000 0xe09c0 0x1e6 0x66ff3000 0xe4458 0x203 0x6b931000 0xe7ef0 0x21f 0x7026f000 0xeb988 0x23c 0x74bad000 0xef420 0x25c 0x794eb000 0xf2eb8 0x27c 0x7de29000 0xf6950 0x29d 0x802c8000 0xfa3e8 0x2bf 0x82767000 0xfa3e8 0x2bf 0x870a5000 0xfde80 0x2e2>; | |
| qcom,speed1-pvs9-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbd358 0xab 0x2b7cd000 0xbfa68 0xc1 0x3010b000 0xc2178 0xd7 0x34a49000 0xc4888 0xed 0x39387000 0xc6f98 0x104 0x3dcc5000 0xc96a8 0x11a 0x42603000 0xcbdb8 0x132 0x46f41000 0xce4c8 0x14a 0x4b87f000 0xd0bd8 0x162 0x501bd000 0xd32e8 0x17a 0x54afb000 0xd59f8 0x194 0x59439000 0xd8108 0x1af 0x5dd77000 0xda818 0x1ca 0x626b5000 0xde2b0 0x1e6 0x66ff3000 0xe1d48 0x203 0x6b931000 0xe57e0 0x21f 0x7026f000 0xe9278 0x23c 0x74bad000 0xecd10 0x25c 0x794eb000 0xf07a8 0x27c 0x7de29000 0xf4240 0x29d 0x802c8000 0xf7cd8 0x2bf 0x82767000 0xf7cd8 0x2bf 0x870a5000 0xfb770 0x2e2>; | |
| qcom,speed1-pvs10-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbd358 0xab 0x2b7cd000 0xbe6e0 0xc1 0x3010b000 0xc0df0 0xd7 0x34a49000 0xc3500 0xed 0x39387000 0xc5c10 0x104 0x3dcc5000 0xc8320 0x11a 0x42603000 0xcaa30 0x132 0x46f41000 0xcd140 0x14a 0x4b87f000 0xcf850 0x162 0x501bd000 0xd1f60 0x17a 0x54afb000 0xd4670 0x194 0x59439000 0xd6d80 0x1af 0x5dd77000 0xd9490 0x1ca 0x626b5000 0xdbba0 0x1e6 0x66ff3000 0xdf638 0x203 0x6b931000 0xe30d0 0x21f 0x7026f000 0xe6b68 0x23c 0x74bad000 0xea600 0x25c 0x794eb000 0xee098 0x27c 0x7de29000 0xf1b30 0x29d 0x802c8000 0xf55c8 0x2bf 0x82767000 0xf55c8 0x2bf 0x870a5000 0xf9060 0x2e2>; | |
| qcom,speed1-pvs11-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbd358 0xab 0x2b7cd000 0xbd358 0xc1 0x3010b000 0xbfa68 0xd7 0x34a49000 0xc2178 0xed 0x39387000 0xc4888 0x104 0x3dcc5000 0xc6f98 0x11a 0x42603000 0xc96a8 0x132 0x46f41000 0xcbdb8 0x14a 0x4b87f000 0xce4c8 0x162 0x501bd000 0xd0bd8 0x17a 0x54afb000 0xd32e8 0x194 0x59439000 0xd59f8 0x1af 0x5dd77000 0xd8108 0x1ca 0x626b5000 0xda818 0x1e6 0x66ff3000 0xdcf28 0x203 0x6b931000 0xe09c0 0x21f 0x7026f000 0xe4458 0x23c 0x74bad000 0xe7ef0 0x25c 0x794eb000 0xeb988 0x27c 0x7de29000 0xef420 0x29d 0x802c8000 0xf2eb8 0x2bf 0x82767000 0xf2eb8 0x2bf 0x870a5000 0xf6950 0x2e2>; | |
| qcom,speed1-pvs12-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbd358 0xab 0x2b7cd000 0xbd358 0xc1 0x3010b000 0xbe6e0 0xd7 0x34a49000 0xc0df0 0xed 0x39387000 0xc3500 0x104 0x3dcc5000 0xc5c10 0x11a 0x42603000 0xc8320 0x132 0x46f41000 0xcaa30 0x14a 0x4b87f000 0xcd140 0x162 0x501bd000 0xcf850 0x17a 0x54afb000 0xd1f60 0x194 0x59439000 0xd4670 0x1af 0x5dd77000 0xd6d80 0x1ca 0x626b5000 0xd9490 0x1e6 0x66ff3000 0xdbba0 0x203 0x6b931000 0xde2b0 0x21f 0x7026f000 0xe1d48 0x23c 0x74bad000 0xe57e0 0x25c 0x794eb000 0xe9278 0x27c 0x7de29000 0xecd10 0x29d 0x802c8000 0xf07a8 0x2bf 0x82767000 0xf07a8 0x2bf 0x870a5000 0xf4240 0x2e2>; | |
| qcom,speed1-pvs13-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6c 0x1dc13000 0xbd358 0x81 0x22551000 0xbd358 0x96 0x26e8f000 0xbd358 0xab 0x2b7cd000 0xbd358 0xc1 0x3010b000 0xbd358 0xd7 0x34a49000 0xbfa68 0xed 0x39387000 0xc2178 0x104 0x3dcc5000 0xc4888 0x11a 0x42603000 0xc6f98 0x132 0x46f41000 0xc96a8 0x14a 0x4b87f000 0xcbdb8 0x162 0x501bd000 0xce4c8 0x17a 0x54afb000 0xd0bd8 0x194 0x59439000 0xd32e8 0x1af 0x5dd77000 0xd59f8 0x1ca 0x626b5000 0xd8108 0x1e6 0x66ff3000 0xda818 0x203 0x6b931000 0xdcf28 0x21f 0x7026f000 0xdf638 0x23c 0x74bad000 0xe30d0 0x25c 0x794eb000 0xe6b68 0x27c 0x7de29000 0xea600 0x29d 0x802c8000 0xee098 0x2bf 0x82767000 0xee098 0x2bf 0x870a5000 0xf1b30 0x2e2>; | |
| qcom,speed1-pvs14-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6c 0x1dc13000 0xb71b0 0x81 0x22551000 0xb71b0 0x96 0x26e8f000 0xb71b0 0xab 0x2b7cd000 0xb98c0 0xc1 0x3010b000 0xbbfd0 0xd7 0x34a49000 0xbe6e0 0xed 0x39387000 0xc0df0 0x104 0x3dcc5000 0xc3500 0x11a 0x42603000 0xc5c10 0x132 0x46f41000 0xc8320 0x14a 0x4b87f000 0xcaa30 0x162 0x501bd000 0xcd140 0x17a 0x54afb000 0xcf850 0x194 0x59439000 0xd1f60 0x1af 0x5dd77000 0xd4670 0x1ca 0x626b5000 0xd6d80 0x1e6 0x66ff3000 0xd9490 0x203 0x6b931000 0xdbba0 0x21f 0x7026f000 0xde2b0 0x23c 0x74bad000 0xe09c0 0x25c 0x794eb000 0xe4458 0x27c 0x7de29000 0xe7ef0 0x29d 0x802c8000 0xeb988 0x2bf 0x82767000 0xeb988 0x2bf 0x870a5000 0xef420 0x2e2>; | |
| qcom,speed1-pvs15-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6c 0x1dc13000 0xb71b0 0x81 0x22551000 0xb71b0 0x96 0x26e8f000 0xb71b0 0xab 0x2b7cd000 0xb8538 0xc1 0x3010b000 0xbac48 0xd7 0x34a49000 0xbd358 0xed 0x39387000 0xbfa68 0x104 0x3dcc5000 0xc2178 0x11a 0x42603000 0xc4888 0x132 0x46f41000 0xc6f98 0x14a 0x4b87f000 0xc96a8 0x162 0x501bd000 0xcbdb8 0x17a 0x54afb000 0xce4c8 0x194 0x59439000 0xd0bd8 0x1af 0x5dd77000 0xd32e8 0x1ca 0x626b5000 0xd59f8 0x1e6 0x66ff3000 0xd8108 0x203 0x6b931000 0xda818 0x21f 0x7026f000 0xdcf28 0x23c 0x74bad000 0xdf638 0x25c 0x794eb000 0xe1d48 0x27c 0x7de29000 0xe57e0 0x29d 0x802c8000 0xe9278 0x2bf 0x82767000 0xe9278 0x2bf 0x870a5000 0xecd10 0x2e2>; | |
| qcom,speed3-pvs0-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc5c10 0x7e 0x22551000 0xc8320 0x93 0x26e8f000 0xcaa30 0xa8 0x2b7cd000 0xcd140 0xbd 0x3010b000 0xcf850 0xd3 0x34a49000 0xd1f60 0xe9 0x39387000 0xd4670 0x100 0x3dcc5000 0xd6d80 0x116 0x42603000 0xd9490 0x12d 0x46f41000 0xdbba0 0x144 0x4b87f000 0xde2b0 0x15c 0x501bd000 0xe09c0 0x174 0x54afb000 0xe30d0 0x18c 0x59439000 0xe57e0 0x1a5 0x5dd77000 0xe7ef0 0x1be 0x626b5000 0xeb988 0x1d9 0x66ff3000 0xef420 0x1f5 0x6b931000 0xf2eb8 0x211 0x7026f000 0xf6950 0x22e 0x74bad000 0xfa3e8 0x24c 0x794eb000 0xfde80 0x269 0x7de29000 0x101918 0x289 0x802c8000 0x1053b0 0x2aa 0x82767000 0x1053b0 0x2aa 0x870a5000 0x108e48 0x2cc 0x8b9e3000 0x10c8e0 0x2ef 0x90321000 0x110378 0x312 0x927c0000 0x111700 0x322>; | |
| qcom,speed3-pvs1-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc5c10 0x93 0x26e8f000 0xc8320 0xa8 0x2b7cd000 0xcaa30 0xbd 0x3010b000 0xcd140 0xd3 0x34a49000 0xcf850 0xe9 0x39387000 0xd1f60 0x100 0x3dcc5000 0xd4670 0x116 0x42603000 0xd6d80 0x12d 0x46f41000 0xd9490 0x144 0x4b87f000 0xdbba0 0x15c 0x501bd000 0xde2b0 0x174 0x54afb000 0xe09c0 0x18c 0x59439000 0xe30d0 0x1a5 0x5dd77000 0xe57e0 0x1be 0x626b5000 0xe9278 0x1d9 0x66ff3000 0xecd10 0x1f5 0x6b931000 0xf07a8 0x211 0x7026f000 0xf4240 0x22e 0x74bad000 0xf7cd8 0x24c 0x794eb000 0xfb770 0x269 0x7de29000 0xff208 0x289 0x802c8000 0x102ca0 0x2aa 0x82767000 0x102ca0 0x2aa 0x870a5000 0x106738 0x2cc 0x8b9e3000 0x10a1d0 0x2ef 0x90321000 0x10dc68 0x312 0x927c0000 0x10eff0 0x322>; | |
| qcom,speed3-pvs2-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc5c10 0xa8 0x2b7cd000 0xc8320 0xbd 0x3010b000 0xcaa30 0xd3 0x34a49000 0xcd140 0xe9 0x39387000 0xcf850 0x100 0x3dcc5000 0xd1f60 0x116 0x42603000 0xd4670 0x12d 0x46f41000 0xd6d80 0x144 0x4b87f000 0xd9490 0x15c 0x501bd000 0xdbba0 0x174 0x54afb000 0xde2b0 0x18c 0x59439000 0xe09c0 0x1a5 0x5dd77000 0xe30d0 0x1be 0x626b5000 0xe6b68 0x1d9 0x66ff3000 0xea600 0x1f5 0x6b931000 0xee098 0x211 0x7026f000 0xf1b30 0x22e 0x74bad000 0xf55c8 0x24c 0x794eb000 0xf9060 0x269 0x7de29000 0xfcaf8 0x289 0x802c8000 0x100590 0x2aa 0x82767000 0x100590 0x2aa 0x870a5000 0x104028 0x2cc 0x8b9e3000 0x107ac0 0x2ef 0x90321000 0x10b558 0x312 0x927c0000 0x10c8e0 0x322>; | |
| qcom,speed3-pvs3-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc5c10 0xbd 0x3010b000 0xc8320 0xd3 0x34a49000 0xcaa30 0xe9 0x39387000 0xcd140 0x100 0x3dcc5000 0xcf850 0x116 0x42603000 0xd1f60 0x12d 0x46f41000 0xd4670 0x144 0x4b87f000 0xd6d80 0x15c 0x501bd000 0xd9490 0x174 0x54afb000 0xdbba0 0x18c 0x59439000 0xde2b0 0x1a5 0x5dd77000 0xe09c0 0x1be 0x626b5000 0xe4458 0x1d9 0x66ff3000 0xe7ef0 0x1f5 0x6b931000 0xeb988 0x211 0x7026f000 0xef420 0x22e 0x74bad000 0xf2eb8 0x24c 0x794eb000 0xf6950 0x269 0x7de29000 0xfa3e8 0x289 0x802c8000 0xfde80 0x2aa 0x82767000 0xfde80 0x2aa 0x870a5000 0x101918 0x2cc 0x8b9e3000 0x1053b0 0x2ef 0x90321000 0x108e48 0x312 0x927c0000 0x10a1d0 0x322>; | |
| qcom,speed3-pvs4-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc3500 0xbd 0x3010b000 0xc5c10 0xd3 0x34a49000 0xc8320 0xe9 0x39387000 0xcaa30 0x100 0x3dcc5000 0xcd140 0x116 0x42603000 0xcf850 0x12d 0x46f41000 0xd1f60 0x144 0x4b87f000 0xd4670 0x15c 0x501bd000 0xd6d80 0x174 0x54afb000 0xd9490 0x18c 0x59439000 0xdbba0 0x1a5 0x5dd77000 0xde2b0 0x1be 0x626b5000 0xe1d48 0x1d9 0x66ff3000 0xe57e0 0x1f5 0x6b931000 0xe9278 0x211 0x7026f000 0xecd10 0x22e 0x74bad000 0xf07a8 0x24c 0x794eb000 0xf4240 0x269 0x7de29000 0xf7cd8 0x289 0x802c8000 0xfb770 0x2aa 0x82767000 0xfb770 0x2aa 0x870a5000 0xff208 0x2cc 0x8b9e3000 0x102ca0 0x2ef 0x90321000 0x106738 0x312 0x927c0000 0x107ac0 0x322>; | |
| qcom,speed3-pvs5-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xc3500 0x4c 0x14997000 0xc3500 0x57 0x192d5000 0xc3500 0x6a 0x1dc13000 0xc3500 0x7e 0x22551000 0xc3500 0x93 0x26e8f000 0xc3500 0xa8 0x2b7cd000 0xc3500 0xbd 0x3010b000 0xc3500 0xd3 0x34a49000 0xc5c10 0xe9 0x39387000 0xc8320 0x100 0x3dcc5000 0xcaa30 0x116 0x42603000 0xcd140 0x12d 0x46f41000 0xcf850 0x144 0x4b87f000 0xd1f60 0x15c 0x501bd000 0xd4670 0x174 0x54afb000 0xd6d80 0x18c 0x59439000 0xd9490 0x1a5 0x5dd77000 0xdbba0 0x1be 0x626b5000 0xdf638 0x1d9 0x66ff3000 0xe30d0 0x1f5 0x6b931000 0xe6b68 0x211 0x7026f000 0xea600 0x22e 0x74bad000 0xee098 0x24c 0x794eb000 0xf1b30 0x269 0x7de29000 0xf55c8 0x289 0x802c8000 0xf9060 0x2aa 0x82767000 0xf9060 0x2aa 0x870a5000 0xfcaf8 0x2cc 0x8b9e3000 0x100590 0x2ef 0x90321000 0x104028 0x312 0x927c0000 0x1053b0 0x322>; | |
| qcom,speed3-pvs6-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbe6e0 0xbd 0x3010b000 0xc0df0 0xd3 0x34a49000 0xc3500 0xe9 0x39387000 0xc5c10 0x100 0x3dcc5000 0xc8320 0x116 0x42603000 0xcaa30 0x12d 0x46f41000 0xcd140 0x144 0x4b87f000 0xcf850 0x15c 0x501bd000 0xd1f60 0x174 0x54afb000 0xd4670 0x18c 0x59439000 0xd6d80 0x1a5 0x5dd77000 0xd9490 0x1be 0x626b5000 0xdcf28 0x1d9 0x66ff3000 0xe09c0 0x1f5 0x6b931000 0xe4458 0x211 0x7026f000 0xe7ef0 0x22e 0x74bad000 0xeb988 0x24c 0x794eb000 0xef420 0x269 0x7de29000 0xf2eb8 0x289 0x802c8000 0xf6950 0x2aa 0x82767000 0xf6950 0x2aa 0x870a5000 0xfa3e8 0x2cc 0x8b9e3000 0xfde80 0x2ef 0x90321000 0x101918 0x312 0x927c0000 0x102ca0 0x322>; | |
| qcom,speed3-pvs7-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbe6e0 0xbd 0x3010b000 0xbfa68 0xd3 0x34a49000 0xc2178 0xe9 0x39387000 0xc4888 0x100 0x3dcc5000 0xc6f98 0x116 0x42603000 0xc96a8 0x12d 0x46f41000 0xcbdb8 0x144 0x4b87f000 0xce4c8 0x15c 0x501bd000 0xd0bd8 0x174 0x54afb000 0xd32e8 0x18c 0x59439000 0xd59f8 0x1a5 0x5dd77000 0xd8108 0x1be 0x626b5000 0xda818 0x1d9 0x66ff3000 0xde2b0 0x1f5 0x6b931000 0xe1d48 0x211 0x7026f000 0xe57e0 0x22e 0x74bad000 0xe9278 0x24c 0x794eb000 0xecd10 0x269 0x7de29000 0xf07a8 0x289 0x802c8000 0xf4240 0x2aa 0x82767000 0xf4240 0x2aa 0x870a5000 0xf7cd8 0x2cc 0x8b9e3000 0xfb770 0x2ef 0x90321000 0xff208 0x312 0x927c0000 0x100590 0x322>; | |
| qcom,speed3-pvs8-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbe6e0 0xd3 0x34a49000 0xbfa68 0xe9 0x39387000 0xc2178 0x100 0x3dcc5000 0xc4888 0x116 0x42603000 0xc6f98 0x12d 0x46f41000 0xc96a8 0x144 0x4b87f000 0xcbdb8 0x15c 0x501bd000 0xce4c8 0x174 0x54afb000 0xd0bd8 0x18c 0x59439000 0xd32e8 0x1a5 0x5dd77000 0xd59f8 0x1be 0x626b5000 0xd8108 0x1d9 0x66ff3000 0xdbba0 0x1f5 0x6b931000 0xdf638 0x211 0x7026f000 0xe30d0 0x22e 0x74bad000 0xe6b68 0x24c 0x794eb000 0xea600 0x269 0x7de29000 0xee098 0x289 0x802c8000 0xf1b30 0x2aa 0x82767000 0xf1b30 0x2aa 0x870a5000 0xf55c8 0x2cc 0x8b9e3000 0xf9060 0x2ef 0x90321000 0xfcaf8 0x312 0x927c0000 0xfde80 0x322>; | |
| qcom,speed3-pvs9-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbe6e0 0xe9 0x39387000 0xc0df0 0x100 0x3dcc5000 0xc3500 0x116 0x42603000 0xc5c10 0x12d 0x46f41000 0xc8320 0x144 0x4b87f000 0xcaa30 0x15c 0x501bd000 0xcd140 0x174 0x54afb000 0xcf850 0x18c 0x59439000 0xd1f60 0x1a5 0x5dd77000 0xd4670 0x1be 0x626b5000 0xd6d80 0x1d9 0x66ff3000 0xd9490 0x1f5 0x6b931000 0xdcf28 0x211 0x7026f000 0xe09c0 0x22e 0x74bad000 0xe4458 0x24c 0x794eb000 0xe7ef0 0x269 0x7de29000 0xeb988 0x289 0x802c8000 0xef420 0x2aa 0x82767000 0xef420 0x2aa 0x870a5000 0xf2eb8 0x2cc 0x8b9e3000 0xf6950 0x2ef 0x90321000 0xfa3e8 0x312 0x927c0000 0xfb770 0x322>; | |
| qcom,speed3-pvs10-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbe6e0 0xe9 0x39387000 0xbfa68 0x100 0x3dcc5000 0xc2178 0x116 0x42603000 0xc4888 0x12d 0x46f41000 0xc6f98 0x144 0x4b87f000 0xc96a8 0x15c 0x501bd000 0xcbdb8 0x174 0x54afb000 0xce4c8 0x18c 0x59439000 0xd0bd8 0x1a5 0x5dd77000 0xd32e8 0x1be 0x626b5000 0xd59f8 0x1d9 0x66ff3000 0xd8108 0x1f5 0x6b931000 0xda818 0x211 0x7026f000 0xde2b0 0x22e 0x74bad000 0xe1d48 0x24c 0x794eb000 0xe57e0 0x269 0x7de29000 0xe9278 0x289 0x802c8000 0xecd10 0x2aa 0x82767000 0xecd10 0x2aa 0x870a5000 0xf07a8 0x2cc 0x8b9e3000 0xf4240 0x2ef 0x90321000 0xf7cd8 0x312 0x927c0000 0xf9060 0x322>; | |
| qcom,speed3-pvs11-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbe6e0 0x100 0x3dcc5000 0xc0df0 0x116 0x42603000 0xc3500 0x12d 0x46f41000 0xc5c10 0x144 0x4b87f000 0xc8320 0x15c 0x501bd000 0xcaa30 0x174 0x54afb000 0xcd140 0x18c 0x59439000 0xcf850 0x1a5 0x5dd77000 0xd1f60 0x1be 0x626b5000 0xd4670 0x1d9 0x66ff3000 0xd6d80 0x1f5 0x6b931000 0xd9490 0x211 0x7026f000 0xdbba0 0x22e 0x74bad000 0xdf638 0x24c 0x794eb000 0xe30d0 0x269 0x7de29000 0xe6b68 0x289 0x802c8000 0xea600 0x2aa 0x82767000 0xea600 0x2aa 0x870a5000 0xee098 0x2cc 0x8b9e3000 0xf1b30 0x2ef 0x90321000 0xf55c8 0x312 0x927c0000 0xf6950 0x322>; | |
| qcom,speed3-pvs12-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbe6e0 0x100 0x3dcc5000 0xbfa68 0x116 0x42603000 0xc2178 0x12d 0x46f41000 0xc4888 0x144 0x4b87f000 0xc6f98 0x15c 0x501bd000 0xc96a8 0x174 0x54afb000 0xcbdb8 0x18c 0x59439000 0xce4c8 0x1a5 0x5dd77000 0xd0bd8 0x1be 0x626b5000 0xd32e8 0x1d9 0x66ff3000 0xd59f8 0x1f5 0x6b931000 0xd8108 0x211 0x7026f000 0xda818 0x22e 0x74bad000 0xdcf28 0x24c 0x794eb000 0xe09c0 0x269 0x7de29000 0xe4458 0x289 0x802c8000 0xe7ef0 0x2aa 0x82767000 0xe7ef0 0x2aa 0x870a5000 0xeb988 0x2cc 0x8b9e3000 0xef420 0x2ef 0x90321000 0xf2eb8 0x312 0x927c0000 0xf4240 0x322>; | |
| qcom,speed3-pvs13-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xbd358 0x4c 0x14997000 0xbd358 0x57 0x192d5000 0xbd358 0x6a 0x1dc13000 0xbd358 0x7e 0x22551000 0xbd358 0x93 0x26e8f000 0xbd358 0xa8 0x2b7cd000 0xbd358 0xbd 0x3010b000 0xbd358 0xd3 0x34a49000 0xbd358 0xe9 0x39387000 0xbd358 0x100 0x3dcc5000 0xbe6e0 0x116 0x42603000 0xc0df0 0x12d 0x46f41000 0xc3500 0x144 0x4b87f000 0xc5c10 0x15c 0x501bd000 0xc8320 0x174 0x54afb000 0xcaa30 0x18c 0x59439000 0xcd140 0x1a5 0x5dd77000 0xcf850 0x1be 0x626b5000 0xd1f60 0x1d9 0x66ff3000 0xd4670 0x1f5 0x6b931000 0xd6d80 0x211 0x7026f000 0xd9490 0x22e 0x74bad000 0xdbba0 0x24c 0x794eb000 0xde2b0 0x269 0x7de29000 0xe1d48 0x289 0x802c8000 0xe57e0 0x2aa 0x82767000 0xe57e0 0x2aa 0x870a5000 0xe9278 0x2cc 0x8b9e3000 0xecd10 0x2ef 0x90321000 0xf07a8 0x312 0x927c0000 0xf1b30 0x322>; | |
| qcom,speed3-pvs14-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7e 0x22551000 0xb71b0 0x93 0x26e8f000 0xb71b0 0xa8 0x2b7cd000 0xb71b0 0xbd 0x3010b000 0xb71b0 0xd3 0x34a49000 0xb8538 0xe9 0x39387000 0xbac48 0x100 0x3dcc5000 0xbd358 0x116 0x42603000 0xbfa68 0x12d 0x46f41000 0xc2178 0x144 0x4b87f000 0xc4888 0x15c 0x501bd000 0xc6f98 0x174 0x54afb000 0xc96a8 0x18c 0x59439000 0xcbdb8 0x1a5 0x5dd77000 0xce4c8 0x1be 0x626b5000 0xd0bd8 0x1d9 0x66ff3000 0xd32e8 0x1f5 0x6b931000 0xd59f8 0x211 0x7026f000 0xd8108 0x22e 0x74bad000 0xda818 0x24c 0x794eb000 0xdcf28 0x269 0x7de29000 0xdf638 0x289 0x802c8000 0xe30d0 0x2aa 0x82767000 0xe30d0 0x2aa 0x870a5000 0xe6b68 0x2cc 0x8b9e3000 0xea600 0x2ef 0x90321000 0xee098 0x312 0x927c0000 0xef420 0x322>; | |
| qcom,speed3-pvs15-bin-v1 = <0x0 0x0 0x0 0x11e1a300 0xb71b0 0x4c 0x14997000 0xb71b0 0x57 0x192d5000 0xb71b0 0x6a 0x1dc13000 0xb71b0 0x7e 0x22551000 0xb71b0 0x93 0x26e8f000 0xb71b0 0xa8 0x2b7cd000 0xb71b0 0xbd 0x3010b000 0xb71b0 0xd3 0x34a49000 0xb8538 0xe9 0x39387000 0xb98c0 0x100 0x3dcc5000 0xbbfd0 0x116 0x42603000 0xbe6e0 0x12d 0x46f41000 0xc0df0 0x144 0x4b87f000 0xc3500 0x15c 0x501bd000 0xc5c10 0x174 0x54afb000 0xc8320 0x18c 0x59439000 0xcaa30 0x1a5 0x5dd77000 0xcd140 0x1be 0x626b5000 0xcf850 0x1d9 0x66ff3000 0xd1f60 0x1f5 0x6b931000 0xd4670 0x211 0x7026f000 0xd6d80 0x22e 0x74bad000 0xd9490 0x24c 0x794eb000 0xdbba0 0x269 0x7de29000 0xde2b0 0x289 0x802c8000 0xe09c0 0x2aa 0x82767000 0xe09c0 0x2aa 0x870a5000 0xe4458 0x2cc 0x8b9e3000 0xe7ef0 0x2ef 0x90321000 0xeb988 0x312 0x927c0000 0xecd10 0x322>; | |
| }; | |
| qcom,cpubw@0 { | |
| reg = <0x0 0x4>; | |
| compatible = "qcom,cpubw"; | |
| qcom,cpu-mem-ports = <0x1 0x200 0x2 0x200>; | |
| qcom,bw-tbl = <0x17d 0x23c 0x2fa 0x478 0x5f5 0x926 0xdb5 0x124c 0x17d7 0x1bbe>; | |
| }; | |
| qcom,kraitbw-l2pm { | |
| compatible = "qcom,kraitbw-l2pm"; | |
| interrupts = <0x0 0x1 0x1>; | |
| qcom,bytes-per-beat = <0x8>; | |
| }; | |
| qcom,msm-cpufreq@0 { | |
| reg = <0x0 0x4>; | |
| compatible = "qcom,msm-cpufreq"; | |
| qcom,cpufreq-table = <0x493e0 0x493e0 0x23c 0x67200 0x67200 0x478 0x9f600 0x79e00 0x5f5 0xb2200 0x8ca00 0x926 0xd7a00 0x8ca00 0x926 0xea600 0xea600 0xdb5 0xfd200 0xfd200 0xdb5 0x122a00 0xfd200 0xdb5 0x135600 0x135600 0x124c 0x16da00 0x16da00 0x124c 0x180600 0x180600 0x17d7 0x1a5e00 0x193200 0x17d7 0x1de200 0x1a5e00 0x1bbe 0x229200 0x1a5e00 0x1bbe 0x258000 0x1a5e00 0x1bbe>; | |
| }; | |
| usb3: qcom,ssusb@f9200000 { | |
| compatible = "qcom,dwc-usb3-msm"; | |
| reg = <0xf9200000 0xfc000>, <0xfd4ab000 0x4>; // 2nd - TCSR memory resource | |
| // ^^ Enable USB3 on the primary USB port: writel_relaxed(0x1, tcsr); | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| interrupt-parent = <0x61>; // interrupt-parent = <&usb3>; // self | |
| interrupts = <0x0 0x1>; // interrupts = <0 1>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0x0 0xffffffff>; | |
| interrupt-map = <0x0 0x0 0x1 0x0 0x85 0x0 0x0 0x1 0x62 0x0 0x0 0x9 0x0>; | |
| // interrupt-map = <0x0 0 &intc 0 133 0 0x0 1 &spmi_bus 0x0 0x0 0x9 0x0>; | |
| interrupt-names = "hs_phy_irq", "pmic_id_irq"; | |
| // DWC3 has separate IRQ line for OTG events - hs_phy_irq | |
| ssusb_vdd_dig-supply = <0x27>; // <&pma8084_s2_corner>; | |
| hsusb_vdd_dig-supply = <0x27>; // <&pma8084_s2_corner>; | |
| qcom,dwc-usb3-msm-dbm-eps = <0x4>; | |
| qcom,vdd-voltage-level = <0x1 0x5 0x7>; // vdd_no_vol_level, vdd_low_vol_level, vdd_high_vol_level | |
| qcom,dwc-hsphy-init = <0xd194e4>; | |
| qcom,dwc-usb3-msm-tx-fifo-size = <0x7400>; // 29696 | |
| qcom,dwc-usb3-msm-qdss-tx-fifo-size = <0x2000>; // 8192 | |
| qcom,otg-capability = <0x1>; | |
| qcom,msm-bus,name = "usb3"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x3d 0x200 0x0 0x0 0x3d 0x200 0x3a980 0xea600>; | |
| SSUSB_1p8-supply = <0x49>; // <&pma8084_l6>; | |
| HSUSB_1p8-supply = <0x49>; // <&pma8084_l6>; | |
| HSUSB_3p3-supply = <0x4a>; // <&pma8084_l24>; | |
| qcom,gpio_usb_rdrv_en = <0x138>; // 312 // "USB 3.0 redriver GPIO address" | |
| linux,phandle = <0x61>; | |
| phandle = <0x61>; | |
| dwc3@f9200000 { | |
| compatible = "synopsys,dwc3"; | |
| reg = <0xf9200000 0xfc000>; | |
| interrupt-parent = <0x1>; // interrupt-parent = <&intc>; | |
| interrupts = <0x0 0x83 0x0 0x0 0xb3 0x0>; // interrupts = <0 131 0>, <0 179 0>; | |
| interrupt-names = "irq", "otg_irq"; | |
| tx-fifo-resize; | |
| }; | |
| }; | |
| host-notifier { | |
| compatible = "sec,host-notifier"; | |
| }; | |
| qcom,ehci-host@f9a55000 { | |
| compatible = "qcom,ehci-host"; | |
| status = "disabled"; | |
| reg = <0xf9a55000 0x400>; | |
| interrupts = <0x0 0x86 0x0 0x0 0x8c 0x0>; | |
| interrupt-names = "core_irq", "async_irq"; | |
| HSUSB_VDDCX-supply = <0x10>; | |
| qcom,usb2-enable-hsphy2; | |
| qcom,usb2-power-budget = <0x1f4>; | |
| HSUSB_1p8-supply = <0x49>; | |
| HSUSB_3p3-supply = <0x4a>; | |
| hsusb_vdd_dig-supply = <0x27>; | |
| qcom,vdd-voltage-level = <0x1 0x2 0x3 0x5 0x7>; | |
| }; | |
| qcom,lpass@fe200000 { | |
| compatible = "qcom,pil-q6v5-lpass"; | |
| reg = <0xfe200000 0x100 0xfd485100 0x10 0xfc4016c0 0x4>; | |
| reg-names = "qdsp6_base", "halt_base", "restart_reg"; | |
| vdd_cx-supply = <0x27>; | |
| interrupts = <0x0 0xa2 0x1>; | |
| qcom,firmware-name = "adsp"; | |
| qcom,gpio-err-fatal = <0x63 0x0 0x0>; | |
| qcom,gpio-proxy-unvote = <0x63 0x2 0x0>; | |
| qcom,gpio-err-ready = <0x63 0x1 0x0>; | |
| qcom,gpio-force-stop = <0x64 0x0 0x0>; | |
| }; | |
| qcom,msm-adsp-loader { | |
| compatible = "qcom,adsp-loader"; | |
| qcom,adsp-state = <0x0>; | |
| }; | |
| qcom,msm-audio-ion { | |
| compatible = "qcom,msm-audio-ion"; | |
| }; | |
| qti,msm-pcm { | |
| compatible = "qti,msm-pcm-dsp"; | |
| qti,msm-pcm-dsp-id = <0x0>; | |
| }; | |
| qti,msm-pcm-low-latency { | |
| compatible = "qti,msm-pcm-dsp"; | |
| qti,msm-pcm-dsp-id = <0x1>; | |
| qti,msm-pcm-low-latency; | |
| qti,latency-level = "regular"; | |
| }; | |
| qcom,msm-pcm-routing { | |
| compatible = "qcom,msm-pcm-routing"; | |
| }; | |
| qcom,msm-pcm-lpa { | |
| compatible = "qcom,msm-pcm-lpa"; | |
| }; | |
| qcom,msm-compr-dsp { | |
| compatible = "qcom,msm-compr-dsp"; | |
| }; | |
| qcom,msm-voip-dsp { | |
| compatible = "qcom,msm-voip-dsp"; | |
| }; | |
| qcom,msm-pcm-voice { | |
| compatible = "qcom,msm-pcm-voice"; | |
| }; | |
| qcom,msm-stub-codec { | |
| compatible = "qcom,msm-stub-codec"; | |
| }; | |
| qcom,msm-dai-fe { | |
| compatible = "qcom,msm-dai-fe"; | |
| }; | |
| qcom,msm-pcm-afe { | |
| compatible = "qcom,msm-pcm-afe"; | |
| }; | |
| qcom,msm-dai-q6-hdmi { | |
| compatible = "qcom,msm-dai-q6-hdmi"; | |
| qcom,msm-dai-q6-dev-id = <0x8>; | |
| }; | |
| qcom,msm-lsm-client { | |
| compatible = "qcom,msm-lsm-client"; | |
| }; | |
| qti,msm-pcm-loopback { | |
| compatible = "qti,msm-pcm-loopback"; | |
| }; | |
| qcom,msm-voice-svc { | |
| compatible = "qcom,msm-voice-svc"; | |
| }; | |
| qcom,msm-dai-q6 { | |
| compatible = "qcom,msm-dai-q6"; | |
| qcom,msm-dai-q6-sb-0-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4000>; | |
| }; | |
| qcom,msm-dai-q6-sb-0-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4001>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4002>; | |
| }; | |
| qcom,msm-dai-q6-sb-1-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4003>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4004>; | |
| }; | |
| qcom,msm-dai-q6-sb-2-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4005>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4006>; | |
| }; | |
| qcom,msm-dai-q6-sb-3-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4007>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4008>; | |
| }; | |
| qcom,msm-dai-q6-sb-4-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x4009>; | |
| }; | |
| qcom,msm-dai-q6-sb-5-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x400b>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3000>; | |
| }; | |
| qcom,msm-dai-q6-bt-sco-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3001>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3004>; | |
| }; | |
| qcom,msm-dai-q6-int-fm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x3005>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe0>; | |
| }; | |
| qcom,msm-dai-q6-be-afe-pcm-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xe1>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf1>; | |
| }; | |
| qcom,msm-dai-q6-afe-proxy-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0xf0>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8003>; | |
| }; | |
| qcom,msm-dai-q6-incall-record-tx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8004>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8005>; | |
| }; | |
| qcom,msm-dai-q6-incall-music-2-rx { | |
| compatible = "qcom,msm-dai-q6-dev"; | |
| qcom,msm-dai-q6-dev-id = <0x8002>; | |
| }; | |
| }; | |
| qcom,msm-pri-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>; | |
| qcom,msm-cpudai-auxpcm-slot = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-data = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "primary"; | |
| }; | |
| qcom,msm-sec-auxpcm { | |
| compatible = "qcom,msm-auxpcm-dev"; | |
| qcom,msm-cpudai-auxpcm-mode = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-sync = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-frame = <0x5 0x4>; | |
| qcom,msm-cpudai-auxpcm-quant = <0x2 0x2>; | |
| qcom,msm-cpudai-auxpcm-slot = <0x1 0x1>; | |
| qcom,msm-cpudai-auxpcm-data = <0x0 0x0>; | |
| qcom,msm-cpudai-auxpcm-pcm-clk-rate = <0x1f4000 0x1f4000>; | |
| qcom,msm-auxpcm-interface = "secondary"; | |
| }; | |
| qcom,msm-dai-mi2s { | |
| compatible = "qcom,msm-dai-mi2s"; | |
| qcom,msm-dai-q6-mi2s-quat { | |
| compatible = "qcom,msm-dai-q6-mi2s"; | |
| qcom,msm-dai-q6-mi2s-dev-id = <0x3>; | |
| qcom,msm-mi2s-rx-lines = <0x1>; | |
| qcom,msm-mi2s-tx-lines = <0x2>; | |
| }; | |
| }; | |
| qcom,msm-pcm-hostless { | |
| compatible = "qcom,msm-pcm-hostless"; | |
| }; | |
| qcom,msm-compress-dsp { | |
| compatible = "qcom,msm-compress-dsp"; | |
| }; | |
| qcom,msm-ocmem-audio { | |
| compatible = "qcom,msm-ocmem-audio"; | |
| qcom,msm-bus,name = "audio-ocmem"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0xb 0x25c 0x0 0x0 0xb 0x25c 0x7efa 0x7efa>; | |
| }; | |
| qcom,msm-adsp-sensors { | |
| compatible = "qcom,msm-adsp-sensors"; | |
| qcom,src-id = <0xb>; | |
| qcom,dst-id = <0x25c>; | |
| qcom,ab = <0x1f00000>; | |
| qcom,ib = <0x1f00000>; | |
| }; | |
| qcom,mss@fc880000 { | |
| compatible = "qcom,pil-q6v5-mss"; | |
| reg = <0xfc880000 0x100 0xfd485000 0x400 0xfc820000 0x20 0xfc401680 0x4>; | |
| reg-names = "qdsp6_base", "halt_base", "rmb_base", "restart_reg"; | |
| interrupts = <0x0 0x18 0x1>; | |
| vdd_mss-supply = <0x65>; | |
| vdd_cx-supply = <0x27>; | |
| vdd_mx-supply = <0x66>; | |
| qcom,vdd_pll = <0x1b7740>; | |
| qcom,firmware-name = "mba"; | |
| qcom,pil-self-auth; | |
| qcom,gpio-err-fatal = <0x67 0x0 0x0>; | |
| qcom,gpio-err-ready = <0x67 0x1 0x0>; | |
| qcom,gpio-proxy-unvote = <0x67 0x2 0x0>; | |
| qcom,gpio-stop-ack = <0x67 0x3 0x0>; | |
| qcom,gpio-force-stop = <0x68 0x0 0x0>; | |
| vdd_pll-supply = <0x2>; | |
| }; | |
| qcom,pronto@fb21b000 { | |
| compatible = "qcom,pil-pronto"; | |
| reg = <0xfb21b000 0x3000 0xfc401700 0x4 0xfd485300 0xc>; | |
| reg-names = "pmu_base", "clk_base", "halt_base"; | |
| interrupts = <0x0 0x95 0x1>; | |
| qcom,firmware-name = "wcnss"; | |
| qcom,gpio-err-fatal = <0x69 0x0 0x0>; | |
| qcom,gpio-err-ready = <0x69 0x1 0x0>; | |
| qcom,gpio-proxy-unvote = <0x69 0x2 0x0>; | |
| qcom,gpio-force-stop = <0x6a 0x0 0x0>; | |
| vdd_pronto_pll-supply = <0x2>; | |
| }; | |
| qcom,iris-fm { | |
| compatible = "qcom,iris_fm"; | |
| }; | |
| qcom,wcnss-wlan@fb000000 { | |
| compatible = "qcom,wcnss_wlan"; | |
| reg = <0xfb000000 0x280000 0xf9011008 0x4>; | |
| reg-names = "wcnss_mmio", "wcnss_fiq"; | |
| interrupts = <0x0 0x91 0x0 0x0 0x92 0x0>; | |
| interrupt-names = "wcnss_wlantx_irq", "wcnss_wlanrx_irq"; | |
| gpios = <0x5 0x24 0x0 0x5 0x25 0x0 0x5 0x26 0x0 0x5 0x27 0x0 0x5 0x28 0x0>; | |
| qcom,has-48mhz-xo; | |
| qcom,has-pronto-hw; | |
| qcom,pronto-vddmx-supply = <0x66>; | |
| qcom,pronto-vddcx-supply = <0x10>; | |
| qcom,pronto-vddpx-supply = <0x35>; | |
| qcom,iris-vddxo-supply = <0x49>; | |
| qcom,iris-vddrfa-supply = <0x6b>; | |
| qcom,iris-vddpa-supply = <0x6c>; | |
| qcom,iris-vdddig-supply = <0x35>; | |
| }; | |
| qcom,ocmem@fdd00000 { | |
| compatible = "qcom,msm-ocmem"; | |
| reg = <0xfdd00000 0x2000 0xfdd02000 0x2000 0xfe039000 0x400 0xfec00000 0x180000>; | |
| reg-names = "ocmem_ctrl_physical", "dm_ctrl_physical", "br_ctrl_physical", "ocmem_physical"; | |
| interrupts = <0x0 0x4c 0x0 0x0 0x4d 0x0>; | |
| interrupt-names = "ocmem_irq", "dm_irq"; | |
| qcom,ocmem-num-regions = <0x3>; | |
| qcom,ocmem-num-macros = <0x18>; | |
| qcom,resource-type = <0x706d636f>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges = <0x0 0xfec00000 0x180000>; | |
| partition@0 { | |
| reg = <0x0 0x100000>; | |
| qcom,ocmem-part-name = "graphics"; | |
| qcom,ocmem-part-min = <0x80000>; | |
| }; | |
| partition@80000 { | |
| reg = <0x100000 0x80000>; | |
| qcom,ocmem-part-name = "lp_audio"; | |
| qcom,ocmem-part-min = <0x80000>; | |
| }; | |
| partition@100000 { | |
| reg = <0x100000 0x80000>; | |
| qcom,ocmem-part-name = "video"; | |
| qcom,ocmem-part-min = <0x55000>; | |
| }; | |
| }; | |
| qcom,rpm-smd { | |
| compatible = "qcom,rpm-smd"; | |
| rpm-channel-name = "rpm_requests"; | |
| rpm-channel-type = <0xf>; | |
| rpm-regulator-smpa1 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x1>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s1 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s1"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xa4cb8>; | |
| regulator-max-microvolt = <0x100590>; | |
| linux,phandle = <0x66>; | |
| phandle = <0x66>; | |
| }; | |
| regulator-s1-ao { | |
| regulator-name = "8084_s1_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0xa4cb8>; | |
| regulator-max-microvolt = <0x100590>; | |
| status = "okay"; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| linux,phandle = <0x5e>; | |
| phandle = <0x5e>; | |
| }; | |
| regulator-s1-so { | |
| regulator-name = "8084_s1_so"; | |
| qcom,set = <0x2>; | |
| regulator-min-microvolt = <0xa4cb8>; | |
| regulator-max-microvolt = <0x100590>; | |
| qcom,init-voltage = <0xa4cb8>; | |
| status = "okay"; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| }; | |
| }; | |
| rpm-regulator-smpa2 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x2>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s2 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s2"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-max-microvolt = <0x100590>; | |
| linux,phandle = <0x10>; | |
| phandle = <0x10>; | |
| }; | |
| regulator-s2-corner { | |
| regulator-name = "8084_s2_corner"; | |
| qcom,set = <0x3>; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,use-voltage-corner; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| qcom,consumer-supplies = "vdd_dig", ""; | |
| linux,phandle = <0x27>; | |
| phandle = <0x27>; | |
| }; | |
| regulator-s2-corner-ao { | |
| regulator-name = "8084_s2_corner_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,use-voltage-corner; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| linux,phandle = <0x5f>; | |
| phandle = <0x5f>; | |
| }; | |
| regulator-s2-floor-corner { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s2_floor_corner"; | |
| qcom,set = <0x3>; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,use-voltage-floor-corner; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0x6d>; | |
| phandle = <0x6d>; | |
| }; | |
| }; | |
| rpm-regulator-smpa3 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x3>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s3 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s3"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x13d620>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,init-voltage = <0x13d620>; | |
| }; | |
| }; | |
| rpm-regulator-smpa4 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x4>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s4 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s4"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0x35>; | |
| phandle = <0x35>; | |
| }; | |
| }; | |
| rpm-regulator-smpa5 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x5>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s5 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s5"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x20ce70>; | |
| regulator-max-microvolt = <0x20ce70>; | |
| qcom,init-voltage = <0x20ce70>; | |
| linux,phandle = <0x53>; | |
| phandle = <0x53>; | |
| }; | |
| }; | |
| rpm-regulator-smpa6 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x6>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s6 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s6"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x100590>; | |
| regulator-max-microvolt = <0x100590>; | |
| qcom,init-voltage = <0x100590>; | |
| linux,phandle = <0x65>; | |
| phandle = <0x65>; | |
| }; | |
| }; | |
| rpm-regulator-smpa7 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x7>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "okay"; | |
| regulator-s7 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s7"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xc6f98>; | |
| regulator-max-microvolt = <0xdbba0>; | |
| }; | |
| regulator-s7-corner { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s7_corner"; | |
| qcom,set = <0x3>; | |
| qcom,use-voltage-corner; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,init-voltage-corner = <0x3>; | |
| linux,phandle = <0x1e>; | |
| phandle = <0x1e>; | |
| }; | |
| regulator-s7-floor-corner { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s7_floor_corner"; | |
| qcom,set = <0x3>; | |
| regulator-min-microvolt = <0x1>; | |
| regulator-max-microvolt = <0x7>; | |
| qcom,use-voltage-floor-corner; | |
| qcom,always-send-voltage; | |
| linux,phandle = <0x6e>; | |
| phandle = <0x6e>; | |
| }; | |
| }; | |
| rpm-regulator-smpa8 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x8>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "disabled"; | |
| regulator-s8 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s8"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-smpa9 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0x9>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "disabled"; | |
| regulator-s9 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s9"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-smpa10 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0xa>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "disabled"; | |
| regulator-s10 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s10"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-smpa11 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0xb>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "disabled"; | |
| regulator-s11 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s11"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-smpa12 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "smpa"; | |
| qcom,resource-id = <0xc>; | |
| qcom,regulator-type = <0x1>; | |
| qcom,hpm-min-load = <0x186a0>; | |
| status = "disabled"; | |
| regulator-s12 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_s12"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| rpm-regulator-ldoa1 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x1>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l1 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l1"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x12b128>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x12b128>; | |
| linux,phandle = <0x54>; | |
| phandle = <0x54>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa2 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x2>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l2 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l2"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0x2b>; | |
| phandle = <0x2b>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa3 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x3>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l3 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l3"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x100590>; | |
| regulator-max-microvolt = <0x124f80>; | |
| qcom,init-voltage = <0x124f80>; | |
| linux,phandle = <0x9>; | |
| phandle = <0x9>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa4 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x4>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l4 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l4"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x124f80>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x12b128>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa5 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x5>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l5 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l5"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa6 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x6>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l6 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l6"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| linux,phandle = <0x49>; | |
| phandle = <0x49>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa7 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x7>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l7 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l7"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa8 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x8>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l8 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l8"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa9 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x9>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l9 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l9"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa10 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xa>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l10 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l10"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa11 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xb>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l11 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l11"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x13d620>; | |
| regulator-max-microvolt = <0x13d620>; | |
| qcom,init-voltage = <0x13d620>; | |
| linux,phandle = <0x6b>; | |
| phandle = <0x6b>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa12 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xc>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l12 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l12"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| linux,phandle = <0x2>; | |
| phandle = <0x2>; | |
| }; | |
| regulator-l12-ao { | |
| regulator-name = "8084_l12_ao"; | |
| qcom,set = <0x1>; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| status = "okay"; | |
| compatible = "qcom,rpm-regulator-smd"; | |
| linux,phandle = <0x60>; | |
| phandle = <0x60>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa13 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xd>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l13 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l13"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| linux,phandle = <0x15>; | |
| phandle = <0x15>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa14 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xe>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l14 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l14"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| qcom,init-voltage = <0x1b7740>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa15 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0xf>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l15 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l15"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1f47d0>; | |
| regulator-max-microvolt = <0x1f47d0>; | |
| qcom,init-voltage = <0x1f47d0>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa16 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x10>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l16 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l16"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2932e0>; | |
| regulator-max-microvolt = <0x2932e0>; | |
| qcom,init-voltage = <0x2932e0>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa17 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x11>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l17 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l17"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| regulator-max-microvolt = <0x2b7cd0>; | |
| qcom,init-voltage = <0x2b7cd0>; | |
| linux,phandle = <0xa>; | |
| phandle = <0xa>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa18 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x12>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l18 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l18"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2b7cd0>; | |
| regulator-max-microvolt = <0x2b7cd0>; | |
| qcom,init-voltage = <0x2b7cd0>; | |
| linux,phandle = <0x77>; | |
| phandle = <0x77>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa19 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x13>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l19 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l19"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2c4020>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x2c4020>; | |
| linux,phandle = <0x6c>; | |
| phandle = <0x6c>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa20 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x14>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l20 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l20"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2d0370>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| linux,phandle = <0x4b>; | |
| phandle = <0x4b>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa21 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x15>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l21 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l21"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2d0370>; | |
| regulator-max-microvolt = <0x2d0370>; | |
| qcom,init-voltage = <0x2d0370>; | |
| linux,phandle = <0x14>; | |
| phandle = <0x14>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa22 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x16>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l22 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l22"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x325aa0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| linux,phandle = <0x2a>; | |
| phandle = <0x2a>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa23 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x17>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l23 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l23"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2dc6c0>; | |
| regulator-max-microvolt = <0x2dc6c0>; | |
| qcom,init-voltage = <0x2dc6c0>; | |
| linux,phandle = <0x11>; | |
| phandle = <0x11>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa24 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x18>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l24 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l24"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x2eebb8>; | |
| regulator-max-microvolt = <0x2eebb8>; | |
| qcom,init-voltage = <0x2eebb8>; | |
| linux,phandle = <0x4a>; | |
| phandle = <0x4a>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa25 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x19>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l25 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l25"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x200b20>; | |
| regulator-max-microvolt = <0x200b20>; | |
| qcom,init-voltage = <0x200b20>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa26 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x1a>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l26 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l26"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1f47d0>; | |
| qcom,init-voltage = <0x1f47d0>; | |
| }; | |
| }; | |
| rpm-regulator-ldoa27 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "ldoa"; | |
| qcom,resource-id = <0x1b>; | |
| qcom,regulator-type = <0x0>; | |
| qcom,hpm-min-load = <0x2710>; | |
| status = "okay"; | |
| regulator-l27 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_l27"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| regulator-min-microvolt = <0xf4240>; | |
| regulator-max-microvolt = <0x12b128>; | |
| qcom,init-voltage = <0x124f80>; | |
| }; | |
| }; | |
| rpm-regulator-vsa1 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x1>; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs1 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_lvs1"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| linux,phandle = <0x76>; | |
| phandle = <0x76>; | |
| }; | |
| }; | |
| rpm-regulator-vsa2 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x2>; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs2 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_lvs2"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| linux,phandle = <0x57>; | |
| phandle = <0x57>; | |
| }; | |
| }; | |
| rpm-regulator-vsa3 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x3>; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs3 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_lvs3"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| }; | |
| }; | |
| rpm-regulator-vsa4 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x4>; | |
| qcom,regulator-type = <0x2>; | |
| status = "okay"; | |
| regulator-lvs4 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_lvs4"; | |
| qcom,set = <0x3>; | |
| status = "okay"; | |
| linux,phandle = <0x2e>; | |
| phandle = <0x2e>; | |
| }; | |
| }; | |
| rpm-regulator-vsa5 { | |
| compatible = "qcom,rpm-regulator-smd-resource"; | |
| qcom,resource-name = "vsa"; | |
| qcom,resource-id = <0x5>; | |
| qcom,regulator-type = <0x2>; | |
| status = "disabled"; | |
| regulator-mvs1 { | |
| compatible = "qcom,rpm-regulator-smd"; | |
| regulator-name = "8084_mvs1"; | |
| qcom,set = <0x3>; | |
| status = "disabled"; | |
| }; | |
| }; | |
| }; | |
| qcom,msm-rng@f9bff000 { | |
| compatible = "qcom,msm-rng"; | |
| reg = <0xf9bff000 0x200>; | |
| qcom,msm-bus,name = "msm-rng-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x58 0x26a 0x0 0x0 0x58 0x26a 0x0 0x320>; | |
| }; | |
| qcom,qseecom@7300000 { | |
| compatible = "qcom,qseecom"; | |
| reg = <0x7300000 0xd00000>; | |
| reg-names = "secapp-region"; | |
| qcom,disk-encrypt-pipe-pair = <0x2>; | |
| qcom,file-encrypt-pipe-pair = <0x0>; | |
| qcom,hlos-ce-hw-instance = <0x1>; | |
| qcom,qsee-ce-hw-instance = <0x0>; | |
| qcom,support-bus-scaling; | |
| qcom,msm-bus,name = "qseecom-noc"; | |
| qcom,msm-bus,num-cases = <0x4>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,support-fde; | |
| qcom,support-pfe; | |
| qcom,msm-bus,vectors-KBps = <0x37 0x200 0x0 0x0 0x37 0x200 0x0 0x0 0x37 0x200 0x1d4c0 0x124f80 0x37 0x200 0x60180 0x3c0f00>; | |
| }; | |
| qcom,wdt@f9017000 { | |
| compatible = "qcom,msm-watchdog"; | |
| qcom,memblock-reserve = <0x0 0x4000>; | |
| reg = <0xf9017000 0x1000>; | |
| interrupts = <0x0 0x3 0x0 0x0 0x4 0x0>; // <0 3 0>, <0 4 0>; | |
| qcom,bark-time = <0x3a98>; // 15000 | |
| qcom,pet-time = <0x2710>; // 10000 | |
| qcom,ipi-ping; | |
| }; | |
| qcom,tz-log@fe805720 { | |
| compatible = "qcom,tz-log"; | |
| reg = <0xfe805720 0x1000>; | |
| }; | |
| qcom,venus@fdce0000 { | |
| compatible = "qcom,pil-venus"; | |
| reg = <0xfdce0000 0x4000 0xfdc80000 0x400>; | |
| reg-names = "wrapper_base", "vbif_base"; | |
| vdd-supply = <0x44>; | |
| qcom,firmware-name = "venus"; | |
| }; | |
| qcom,cache_erp@f9012000 { | |
| reg = <0xf9012000 0x80 0xf9089000 0x80 0xf9099000 0x80 0xf90a9000 0x80 0xf90b9000 0x80 0xf9088000 0x40 0xf9098000 0x40 0xf90a8000 0x40 0xf90b8000 0x40>; | |
| reg-names = "l2_saw", "krait0_saw", "krait1_saw", "krait2_saw", "krait3_saw", "krait0_acs", "krait1_acs", "krait2_acs", "krait3_acs"; | |
| compatible = "qcom,cache_erp"; | |
| interrupts = <0x1 0x9 0x0 0x0 0x2 0x0>; | |
| interrupt-names = "l1_irq", "l2_irq"; | |
| }; | |
| qcom,cache_dump { | |
| compatible = "qcom,cache_dump"; | |
| qcom,l1-dump-size = <0x100000>; | |
| qcom,l2-dump-size = <0x500000>; | |
| }; | |
| tsens@fc4a8000 { | |
| compatible = "qcom,msm-tsens"; | |
| reg = <0xfc4a8000 0x2000 0xfc4bc000 0x1000>; | |
| reg-names = "tsens_physical", "tsens_eeprom_physical"; | |
| interrupts = <0x0 0xb8 0x0>; | |
| qcom,sensors = <0xb>; | |
| qcom,slope = <0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80 0xc80>; | |
| qcom,calib-mode = "fuse_map1"; | |
| }; | |
| jtagfuse@fc4be024 { | |
| compatible = "qcom,jtag-fuse"; | |
| reg = <0xfc4be024 0x8>; | |
| reg-names = "fuse-base"; | |
| }; | |
| qcom,msm-rtb { | |
| compatible = "qcom,msm-rtb"; | |
| qcom,memory-reservation-type = "EBI1"; | |
| qcom,memory-reservation-size = <0x100000>; | |
| }; | |
| qcom,msm-contig-mem { | |
| compatible = "qcom,msm-contig-mem"; | |
| qcom,memory-reservation-type = "EBI1"; | |
| qcom,memory-reservation-size = <0x280000>; | |
| }; | |
| qcom,qcedev@fd440000 { | |
| compatible = "qcom,qcedev"; | |
| reg = <0xfd440000 0x20000 0xfd444000 0x1b000>; | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| interrupts = <0x0 0xec 0x0>; | |
| qcom,bam-pipe-pair = <0x1>; | |
| qcom,ce-hw-instance = <0x1>; | |
| qcom,ce-device = <0x0>; | |
| qcom,msm-bus,name = "qcedev-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x38 0x200 0x0 0x0 0x38 0x200 0x3c0f00 0x60180>; | |
| }; | |
| qcom,qcrypto@fd440000 { | |
| compatible = "qcom,qcrypto"; | |
| reg = <0xfd440000 0x20000 0xfd444000 0x1b000>; | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| interrupts = <0x0 0xec 0x0>; | |
| qcom,bam-pipe-pair = <0x2>; | |
| qcom,ce-hw-instance = <0x1>; | |
| qcom,ce-device = <0x0>; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,use-sw-ahash-algo; | |
| qcom,msm-bus,vectors-KBps = <0x38 0x200 0x0 0x0 0x38 0x200 0x3c0f00 0x60180>; | |
| }; | |
| qcom,qcrypto1@fd440000 { | |
| compatible = "qcom,qcrypto"; | |
| reg = <0xfd440000 0x20000 0xfd444000 0x1b000>; | |
| reg-names = "crypto-base", "crypto-bam-base"; | |
| interrupts = <0x0 0xec 0x0>; | |
| qcom,bam-pipe-pair = <0x0>; | |
| qcom,ce-hw-instance = <0x1>; | |
| qcom,ce-device = <0x1>; | |
| qcom,clk-mgmt-sus-res; | |
| qcom,msm-bus,name = "qcrypto-noc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,use-sw-aes-cbc-ecb-ctr-algo; | |
| qcom,use-sw-aes-xts-algo; | |
| qcom,use-sw-ahash-algo; | |
| qcom,msm-bus,vectors-KBps = <0x38 0x200 0x0 0x0 0x38 0x200 0x3c0f00 0x60180>; | |
| }; | |
| qcom,usbbam@f9304000 { | |
| compatible = "qcom,usb-bam-msm"; | |
| reg = <0xf9304000 0x5000 0xf9a44000 0x11000 0xf92f880c 0x4>; | |
| reg-names = "ssusb", "hsusb", "qscratch_ram1_reg"; | |
| interrupts = <0x0 0x84 0x0 0x0 0x87 0x0>; | |
| interrupt-names = "ssusb", "hsusb"; | |
| qcom,usb-bam-num-pipes = <0x10>; | |
| qcom,usb-bam-fifo-baseaddr = <0xf9200000>; | |
| qcom,ignore-core-reset-ack; | |
| qcom,disable-clk-gating; | |
| qcom,pipe0 { | |
| label = "ssusb-qdss-in-0"; | |
| qcom,usb-bam-mem-type = <0x1>; | |
| qcom,bam-type = <0x0>; | |
| qcom,dir = <0x1>; | |
| qcom,pipe-num = <0x0>; | |
| qcom,peer-bam = <0x1>; | |
| qcom,src-bam-physical-address = <0xfc37c000>; | |
| qcom,src-bam-pipe-index = <0x0>; | |
| qcom,dst-bam-physical-address = <0xf9304000>; | |
| qcom,dst-bam-pipe-index = <0x2>; | |
| qcom,data-fifo-offset = <0xf0000>; | |
| qcom,data-fifo-size = <0x1800>; | |
| qcom,descriptor-fifo-offset = <0xf4000>; | |
| qcom,descriptor-fifo-size = <0x1400>; | |
| qcom,reset-bam-on-connect; | |
| }; | |
| qcom,pipe1 { | |
| label = "hsusb-qdss-in-0"; | |
| qcom,usb-bam-mem-type = <0x1>; | |
| qcom,bam-type = <0x1>; | |
| qcom,dir = <0x1>; | |
| qcom,pipe-num = <0x0>; | |
| qcom,peer-bam = <0x1>; | |
| qcom,src-bam-physical-address = <0xfc37c000>; | |
| qcom,src-bam-pipe-index = <0x0>; | |
| qcom,dst-bam-physical-address = <0xf9a44000>; | |
| qcom,dst-bam-pipe-index = <0x2>; | |
| qcom,data-fifo-offset = <0xf4000>; | |
| qcom,data-fifo-size = <0x1000>; | |
| qcom,descriptor-fifo-offset = <0xf5000>; | |
| qcom,descriptor-fifo-size = <0x400>; | |
| }; | |
| }; | |
| qcom,msm-thermal { | |
| compatible = "qcom,msm-thermal"; | |
| qcom,sensor-id = <0x5>; | |
| qcom,poll-ms = <0xfa>; | |
| qcom,limit-temp = <0x50>; | |
| qcom,temp-hysteresis = <0xa>; | |
| qcom,freq-step = <0x2>; | |
| qcom,freq-control-mask = <0xf>; | |
| qcom,core-limit-temp = <0x55>; | |
| qcom,core-temp-hysteresis = <0xa>; | |
| qcom,core-control-mask = <0xe>; | |
| qcom,hotplug-temp = <0x6e>; | |
| qcom,hotplug-temp-hysteresis = <0x14>; | |
| qcom,cpu-sensors = "tsens_tz_sensor5", "tsens_tz_sensor6", "tsens_tz_sensor7", "tsens_tz_sensor8"; | |
| qcom,freq-mitigation-temp = <0x6e>; | |
| qcom,freq-mitigation-temp-hysteresis = <0x14>; | |
| qcom,freq-mitigation-value = <0xea600>; | |
| qcom,freq-mitigation-control-mask = <0x1>; | |
| qcom,vdd-restriction-temp = <0x5>; | |
| qcom,vdd-restriction-temp-hysteresis = <0xa>; | |
| vdd-dig-supply = <0x6d>; | |
| vdd-gfx-supply = <0x6e>; | |
| qti,pmic-opt-curr-temp = <0x55>; | |
| qti,pmic-opt-curr-temp-hysteresis = <0xa>; | |
| qti,pmic-opt-curr-regs = "vdd-dig"; | |
| qcom,vdd-dig-rstr { | |
| qcom,vdd-rstr-reg = "vdd-dig"; | |
| qcom,levels = <0x5 0x7 0x7>; | |
| qcom,min-level = <0x1>; | |
| }; | |
| qcom,vdd-gfx-rstr { | |
| qcom,vdd-rstr-reg = "vdd-gfx"; | |
| qcom,levels = <0x5 0x7 0x7>; | |
| qcom,min-level = <0x1>; | |
| }; | |
| qcom,vdd-apps-rstr { | |
| qcom,vdd-rstr-reg = "vdd-apps"; | |
| qcom,levels = <0x1cb600 0x1de200 0x229200>; | |
| qcom,freq-req; | |
| }; | |
| }; | |
| qcom,bam_dmux@fc834000 { | |
| compatible = "qcom,bam_dmux"; | |
| reg = <0xfc834000 0x7000>; | |
| interrupts = <0x0 0x1d 0x1>; | |
| qcom,rx-ring-size = <0x40>; | |
| }; | |
| qcom,msm-mem-hole { | |
| compatible = "qcom,msm-mem-hole"; | |
| qcom,memblock-remove = <0x4d00000 0x8500000 0xfa00000 0x800000>; | |
| }; | |
| ram_console { | |
| compatible = "ram_console"; | |
| bootinfo = <0x0>; | |
| }; | |
| uart@f995e000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| status = "ok"; | |
| reg = <0xf995e000 0x1000 0xf9944000 0x19000>; | |
| reg-names = "core_mem", "bam_mem"; | |
| interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x6f>; | |
| interrupts = <0x0 0x1>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x72 0x0 0x1 0x1 0x0 0xef 0x0 0x2 0x5 0x2e 0x0>; | |
| qcom,bam-tx-ep-pipe-index = <0x2>; | |
| qcom,bam-rx-ep-pipe-index = <0x3>; | |
| qcom,msm-bus,name = "uart8"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x54 0x200 0x0 0x0 0x54 0x200 0x1f4 0x320>; | |
| linux,phandle = <0x6f>; | |
| phandle = <0x6f>; | |
| }; | |
| qcom,smem@fa00000 { | |
| compatible = "qcom,smem"; | |
| reg = <0xfa00000 0x200000 0xf9011000 0x1000 0xfc428000 0x4000>; | |
| reg-names = "smem", "irq-reg-base", "aux-mem1"; | |
| qcom,smd-modem { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x0>; | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,smd-irq-bitmask = <0x1000>; | |
| qcom,pil-string = "modem"; | |
| interrupts = <0x0 0x19 0x1>; | |
| }; | |
| qcom,smsm-modem { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x0>; | |
| qcom,smsm-irq-offset = <0x8>; | |
| qcom,smsm-irq-bitmask = <0x2000>; | |
| interrupts = <0x0 0x1a 0x1>; | |
| }; | |
| qcom,smd-adsp { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x1>; | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,smd-irq-bitmask = <0x100>; | |
| qcom,pil-string = "adsp"; | |
| interrupts = <0x0 0x9c 0x1>; | |
| }; | |
| qcom,smsm-adsp { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x1>; | |
| qcom,smsm-irq-offset = <0x8>; | |
| qcom,smsm-irq-bitmask = <0x200>; | |
| interrupts = <0x0 0x9d 0x1>; | |
| }; | |
| qcom,smd-wcnss { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0x6>; | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,smd-irq-bitmask = <0x20000>; | |
| qcom,pil-string = "wcnss"; | |
| interrupts = <0x0 0x8e 0x1>; | |
| }; | |
| qcom,smsm-wcnss { | |
| compatible = "qcom,smsm"; | |
| qcom,smsm-edge = <0x6>; | |
| qcom,smsm-irq-offset = <0x8>; | |
| qcom,smsm-irq-bitmask = <0x80000>; | |
| interrupts = <0x0 0x90 0x1>; | |
| }; | |
| qcom,smd-rpm { | |
| compatible = "qcom,smd"; | |
| qcom,smd-edge = <0xf>; | |
| qcom,smd-irq-offset = <0x8>; | |
| qcom,smd-irq-bitmask = <0x1>; | |
| interrupts = <0x0 0xa8 0x1>; | |
| qcom,irq-no-suspend; | |
| }; | |
| }; | |
| qcom,bcl { | |
| compatible = "qcom,bcl"; | |
| }; | |
| qcom,ssm { | |
| compatible = "qcom,ssm"; | |
| qcom,channel-name = "SSM_RTR"; | |
| }; | |
| qcom,ipc-spinlock@fd484000 { | |
| compatible = "qcom,ipc-spinlock-sfpb"; | |
| reg = <0xfd484000 0x400>; | |
| qcom,num-locks = <0x8>; | |
| }; | |
| qcom,ipc-spinlock@fa00000 { | |
| compatible = "qcom,ipc-spinlock-ldrex"; | |
| reg = <0xfa00000 0x200000>; | |
| status = "disable"; | |
| }; | |
| cpu-pmu { | |
| compatible = "qcom,krait-pmu"; | |
| qcom,irq-is-percpu; | |
| interrupts = <0x1 0x7 0xf00>; | |
| }; | |
| l2-pmu { | |
| compatible = "qcom,l2-pmu"; | |
| interrupts = <0x0 0x1 0x0>; | |
| }; | |
| bimc_sharedmem { | |
| compatible = "qcom,sharedmem-uio"; | |
| reg = <0xfc380000 0x100000>; | |
| reg-names = "bimc"; | |
| }; | |
| qcom,smdtty { | |
| compatible = "qcom,smdtty"; | |
| qcom,smdtty-ds { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DS"; | |
| }; | |
| qcom,smdtty-apps-fm { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_FM"; | |
| }; | |
| smdtty-apps-riva-bt-acl { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_ACL"; | |
| }; | |
| qcom,smdtty-apps-riva-bt-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_BT_CMD"; | |
| }; | |
| qcom,smdtty-mbalbridge { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "MBALBRIDGE"; | |
| }; | |
| smdtty-apps-riva-ant-cmd { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_CMD"; | |
| }; | |
| smdtty-apps-riva-ant-data { | |
| qcom,smdtty-remote = "wcnss"; | |
| qcom,smdtty-port-name = "APPS_RIVA_ANT_DATA"; | |
| }; | |
| qcom,smdtty-data1 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA1"; | |
| }; | |
| qcom,smdtty-data11 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA11"; | |
| }; | |
| qcom,smdtty-data21 { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "DATA21"; | |
| }; | |
| smdtty-gpsnmea { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "GPSNMEA"; | |
| }; | |
| smdtty-loopback { | |
| qcom,smdtty-remote = "modem"; | |
| qcom,smdtty-port-name = "LOOPBACK"; | |
| qcom,smdtty-dev-name = "LOOPBACK_TTY"; | |
| }; | |
| }; | |
| qcom,avtimer { | |
| compatible = "qcom,avtimer"; | |
| reg = <0xfe053008 0x4 0xfe05300c 0x4>; | |
| reg-names = "avtimer_lsb_addr", "avtimer_msb_addr"; | |
| }; | |
| qcom,iommu@fda64000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfda64000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x43 0x0>; | |
| qcom,needs-alt-core-clk; | |
| label = "jpeg_iommu"; | |
| status = "ok"; | |
| qcom,msm-bus,name = "jpeg_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x3e 0x200 0x0 0x0 0x3e 0x200 0x0 0x3e8>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x20ac 0x215c 0x220c 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,iommu-bfb-data = <0xffff 0x0 0x4 0x4 0x0 0x0 0x10 0x50 0x0 0x2804 0x9614 0x0 0x0 0x0 0x0>; | |
| vdd-supply = <0x4>; | |
| qcom,iommu-enable-halt; | |
| qcom,iommu-ctx@fda6c000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda6c000 0x1000>; | |
| interrupts = <0x0 0x46 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "jpeg_enc0"; | |
| }; | |
| qcom,iommu-ctx@fda6d000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda6d000 0x1000>; | |
| interrupts = <0x0 0x46 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "jpeg_enc1"; | |
| }; | |
| qcom,iommu-ctx@fda6e000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda6e000 0x1000>; | |
| interrupts = <0x0 0x46 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "jpeg_dec"; | |
| }; | |
| }; | |
| qcom,iommu@fd928000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfd928000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x49 0x0>; | |
| qcom,iommu-secure-id = <0x1>; | |
| label = "mdp_iommu"; | |
| qcom,msm-bus,name = "mdp_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x16 0x200 0x0 0x0 0x16 0x200 0x0 0x0>; | |
| status = "ok"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020>; | |
| qcom,iommu-bfb-data = <0xffffffff 0x0 0x4 0x10 0x0 0x6800 0x6221 0x16231 0x0 0x34 0x74 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| vdd-supply = <0x26>; | |
| qcom,iommu-enable-halt; | |
| qcom,iommu-ctx@fd930000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfd930000 0x1000>; | |
| interrupts = <0x0 0x2f 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "mdp_0"; | |
| }; | |
| qcom,iommu-ctx@fd931000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfd931000 0x1000>; | |
| interrupts = <0x0 0x2f 0x0 0x0 0x2e 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "mdp_1"; | |
| qcom,secure-context; | |
| }; | |
| qcom,iommu-ctx@fd932000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfd932000 0x1000>; | |
| interrupts = <0x0 0x2f 0x0 0x0 0x2e 0x0>; | |
| qcom,iommu-ctx-sids; | |
| label = "mdp_2"; | |
| qcom,secure-context; | |
| }; | |
| }; | |
| qcom,iommu@fdc84000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfdc84000 0x10000 0xfdce0004 0x4>; | |
| reg-names = "iommu_base", "clk_base"; | |
| interrupts = <0x0 0x2d 0x0>; | |
| qcom,iommu-secure-id = <0x0>; | |
| qcom,needs-alt-core-clk; | |
| label = "venus_iommu"; | |
| qcom,msm-bus,name = "venus_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x3f 0x200 0x0 0x0 0x3f 0x200 0x0 0x3e8>; | |
| status = "ok"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020 0x2024 0x2028 0x202c 0x2030 0x2034 0x2038>; | |
| qcom,iommu-bfb-data = <0xffffffff 0xffffffff 0x4 0x8 0x0 0x13205 0x4000 0x14020 0x0 0x94 0x114 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| vdd-supply = <0x44>; | |
| qcom,iommu-enable-halt; | |
| qcom,iommu-ctx@fdc8c000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdc8c000 0x1000>; | |
| interrupts = <0x0 0x2a 0x0>; | |
| qcom,iommu-ctx-sids = <0x0 0x1 0x2 0x3 0x4 0x5 0x7>; | |
| label = "venus_ns"; | |
| linux,phandle = <0x70>; | |
| phandle = <0x70>; | |
| }; | |
| qcom,iommu-ctx@fdc8d000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdc8d000 0x1000>; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| qcom,iommu-ctx-sids = <0x80 0x81 0x82 0x83 0x84>; | |
| label = "venus_sec_bitstream"; | |
| qcom,secure-context; | |
| linux,phandle = <0x71>; | |
| phandle = <0x71>; | |
| }; | |
| qcom,iommu-ctx@fdc8e000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdc8e000 0x1000>; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| qcom,iommu-ctx-sids = <0xc0 0xc6>; | |
| label = "venus_fw"; | |
| qcom,secure-context; | |
| }; | |
| qcom,iommu-ctx@fdc8f000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdc8f000 0x1000>; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| qcom,iommu-ctx-sids = <0x85>; | |
| label = "venus_sec_pixel"; | |
| qcom,secure-context; | |
| linux,phandle = <0x72>; | |
| phandle = <0x72>; | |
| }; | |
| qcom,iommu-ctx@fdc90000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdc90000 0x1000>; | |
| interrupts = <0x0 0x2a 0x0 0x0 0x2b 0x0>; | |
| qcom,iommu-ctx-sids = <0x87 0xa0>; | |
| label = "venus_sec_non_pixel"; | |
| qcom,secure-context; | |
| linux,phandle = <0x73>; | |
| phandle = <0x73>; | |
| }; | |
| }; | |
| qcom,iommu@fdb10000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfdb10000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x26 0x0>; | |
| label = "kgsl_iommu"; | |
| qcom,msm-bus,name = "kgsl_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x1a 0x200 0x0 0x0 0x1a 0x200 0x0 0x3e8>; | |
| status = "ok"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x2314 0x2394 0x2414 0x2008>; | |
| qcom,iommu-bfb-data = <0x3 0x0 0x4 0x10 0x0 0x0 0x0 0x20 0x0 0x1 0x81 0x0>; | |
| vdd-supply = <0x22>; | |
| qcom,alt-vdd-supply = <0x23>; | |
| qcom,iommu-enable-halt; | |
| qcom,needs-alt-core-clk; | |
| linux,phandle = <0x24>; | |
| phandle = <0x24>; | |
| qcom,iommu-ctx@fdb18000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdb18000 0x1000>; | |
| interrupts = <0x0 0xf1 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "gfx3d_user"; | |
| }; | |
| qcom,iommu-ctx@fdb19000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdb19000 0x1000>; | |
| interrupts = <0x0 0xf1 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "gfx3d_priv"; | |
| }; | |
| qcom,iommu-ctx@fdb1a000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdb1a000 0x1000>; | |
| interrupts = <0x0 0xf1 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "gfx3d_spare"; | |
| }; | |
| }; | |
| qcom,iommu@fda44000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfda44000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x3e 0x0>; | |
| qcom,needs-alt-core-clk; | |
| label = "vfe_iommu"; | |
| qcom,msm-bus,name = "vfe_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x1d 0x200 0x0 0x0 0x1d 0x200 0x0 0x3e8>; | |
| status = "ok"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2050 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x20ac 0x215c 0x220c 0x2008 0x200c 0x2010 0x2014 0x2018 0x201c 0x2020>; | |
| qcom,iommu-bfb-data = <0xffffffff 0x0 0x4 0x8 0x0 0x0 0x20 0x78 0x0 0x3c08 0xb41e 0x0 0x0 0x0 0x0 0x0 0x0 0x0>; | |
| vdd-supply = <0x3>; | |
| qcom,iommu-enable-halt; | |
| qcom,iommu-ctx@fda4c000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda4c000 0x1000>; | |
| interrupts = <0x0 0x41 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "vfe0"; | |
| }; | |
| qcom,iommu-ctx@fda4d000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda4d000 0x1000>; | |
| interrupts = <0x0 0x41 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "vfe1"; | |
| }; | |
| qcom,iommu-ctx@fda4e000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfda4e000 0x1000>; | |
| interrupts = <0x0 0x41 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "cpp"; | |
| }; | |
| }; | |
| qcom,iommu@f9bc4000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xf9bc4000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x99 0x0>; | |
| label = "copss_iommu"; | |
| qcom,msm-bus,name = "copss_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x58 0x200 0x0 0x0 0x58 0x200 0x0 0x3e8>; | |
| status = "disabled"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x1 0x0 0x0 0x40 0x44 0x0 0x0>; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0x5 0x0 0x1 0x0 0x0 0x40 0x44 0x0>; | |
| qcom,iommu-ctx@f9bcc000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bcc000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "copss_cb_0"; | |
| }; | |
| qcom,iommu-ctx@f9bcd000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bcd000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "copss_cb_1"; | |
| }; | |
| qcom,iommu-ctx@f9bce000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bce000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "copss_cb_2"; | |
| }; | |
| qcom,iommu-ctx@f9bcf000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bcf000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x3>; | |
| label = "copss_cb_3"; | |
| }; | |
| qcom,iommu-ctx@f9bd0000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bd0000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x4>; | |
| label = "copss_cb_4"; | |
| }; | |
| qcom,iommu-ctx@f9bd1000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bd1000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x5>; | |
| label = "copss_cb_5"; | |
| }; | |
| qcom,iommu-ctx@f9bd2000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bd2000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x6>; | |
| label = "copss_cb_6"; | |
| }; | |
| qcom,iommu-ctx@f9bd3000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xf9bd3000 0x1000>; | |
| interrupts = <0x0 0x8e 0x0>; | |
| qcom,iommu-ctx-sids = <0x7>; | |
| label = "copss_cb_7"; | |
| }; | |
| }; | |
| qcom,iommu@fdee4000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfdee4000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x93 0x0>; | |
| label = "vpu_iommu"; | |
| qcom,msm-bus,name = "vpu_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x5d 0x200 0x0 0x0 0x5d 0x200 0x0 0x3e8>; | |
| status = "disabled"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,iommu-bfb-data = <0xffff 0x4 0x10 0x0 0x0 0xf 0x4b 0x0 0x1e00 0x1e00 0x5a0f 0x0 0x0 0x0 0x0 0x0>; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c 0x2010 0x2014>; | |
| qcom,iommu-lpae-bfb-data = <0xffff 0x0 0x4 0x10 0x0 0x0 0xf 0x4b 0x1e00 0x5a2d 0x1e00 0x5a0f 0x0 0x0 0x0 0x0>; | |
| qcom,iommu-ctx@fdeec000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdeec000 0x1000>; | |
| interrupts = <0x0 0x91 0x0>; | |
| qcom,iommu-ctx-sids = <0x0 0x1 0x3>; | |
| label = "vpu_cb_0"; | |
| }; | |
| qcom,iommu-ctx@fdeed000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdeed000 0x1000>; | |
| interrupts = <0x0 0x91 0x0>; | |
| qcom,iommu-ctx-sids = <0x8 0x9>; | |
| label = "vpu_cb_1"; | |
| }; | |
| qcom,iommu-ctx@fdeee000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdeee000 0x1000>; | |
| interrupts = <0x0 0x91 0x0>; | |
| qcom,iommu-ctx-sids = <0x5 0x7 0xf>; | |
| label = "vpu_cb_2"; | |
| }; | |
| }; | |
| qcom,iommu@fe054000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfe054000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0xca 0x0>; | |
| label = "lpass_qdsp_iommu"; | |
| qcom,msm-bus,name = "lpass_qdsp_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0xb 0x200 0x0 0x0 0xb 0x200 0x0 0x3e8>; | |
| status = "disabled"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x10 0x0 0x0 0x15e 0x19e 0x0 0x0>; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0x20 0x0 0x10 0x0 0x0 0x15e 0x19e 0x0>; | |
| qcom,iommu-ctx@fe05c000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe05c000 0x1000>; | |
| interrupts = <0x0 0x109 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "lpass_qdsp_cb_0"; | |
| }; | |
| qcom,iommu-ctx@fe05d000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe05d000 0x1000>; | |
| interrupts = <0x0 0x109 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "lpass_qdsp_cb_1"; | |
| }; | |
| qcom,iommu-ctx@fe05e000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe05e000 0x1000>; | |
| interrupts = <0x0 0x109 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "lpass_qdsp_cb_2"; | |
| }; | |
| qcom,iommu-ctx@fe05f000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe05f000 0x1000>; | |
| interrupts = <0x0 0x109 0x0>; | |
| qcom,iommu-ctx-sids = <0x3>; | |
| label = "lpass_qdsp_cb_3"; | |
| }; | |
| }; | |
| qcom,iommu@fe064000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfe064000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0xa6 0x0>; | |
| label = "lpass_core_iommu"; | |
| qcom,msm-bus,name = "lpass_core_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x34 0x200 0x0 0x0 0x34 0x200 0x0 0x3e8>; | |
| status = "disabled"; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-bfb-data = <0x3 0x4 0x4 0x0 0x0 0x0 0x4 0x0 0x0 0x40 0x50 0x0 0x0>; | |
| qcom,iommu-lpae-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x20ac 0x215c 0x220c 0x22bc 0x2314 0x2394 0x2414 0x2494 0x2008>; | |
| qcom,iommu-lpae-bfb-data = <0x3 0x0 0x4 0x4 0x0 0xc 0x0 0x4 0x0 0x0 0x40 0x50 0x0>; | |
| qcom,iommu-ctx@fe06c000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe06c000 0x1000>; | |
| interrupts = <0x0 0x10b 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "lpass_core_cb_0"; | |
| }; | |
| qcom,iommu-ctx@fe06d000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe06d000 0x1000>; | |
| interrupts = <0x0 0x10b 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "lpass_core_cb_1"; | |
| }; | |
| qcom,iommu-ctx@fe06e000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfe06e000 0x1000>; | |
| interrupts = <0x0 0x10b 0x0>; | |
| qcom,iommu-ctx-sids = <0x2>; | |
| label = "lpass_core_cb_2"; | |
| }; | |
| }; | |
| qcom,iommu@fdfb6000 { | |
| compatible = "qcom,msm-smmu-v1"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfdfb6000 0x10000>; | |
| reg-names = "iommu_base"; | |
| interrupts = <0x0 0x13b 0x0>; | |
| qcom,needs-alt-core-clk; | |
| label = "vcap_iommu"; | |
| status = "disabled"; | |
| qcom,msm-bus,name = "vcap_ebi"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x30 0x200 0x0 0x0 0x30 0x200 0x0 0x3e8>; | |
| qcom,iommu-pmu-ngroups = <0x1>; | |
| qcom,iommu-pmu-ncounters = <0x8>; | |
| qcom,iommu-pmu-event-classes = <0x0 0x1 0x8 0x9 0xa 0x10 0x11 0x12 0x80 0x81 0x82 0x83 0x90 0x91 0x92 0xb0 0xb1>; | |
| qcom,iommu-bfb-regs = <0x204c 0x2514 0x2540 0x256c 0x2314 0x2394 0x2414 0x2494 0x20ac 0x215c 0x220c 0x22bc 0x2008 0x200c>; | |
| qcom,iommu-bfb-data = <0xff 0x4 0x8 0x0 0x0 0x8 0x28 0x0 0x1000 0x1000 0x3008 0x0 0x0 0x0>; | |
| qcom,iommu-ctx@fdfbe000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdfbe000 0x1000>; | |
| interrupts = <0x0 0x139 0x0>; | |
| qcom,iommu-ctx-sids = <0x0>; | |
| label = "vcap_cb0"; | |
| }; | |
| qcom,iommu-ctx@fdfbf000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdfbf000 0x1000>; | |
| interrupts = <0x0 0x139 0x0>; | |
| qcom,iommu-ctx-sids = <0x1>; | |
| label = "vcap_cb1"; | |
| }; | |
| qcom,iommu-ctx@fdfc0000 { | |
| compatible = "qcom,msm-smmu-v1-ctx"; | |
| reg = <0xfdfc0000 0x1000>; | |
| interrupts = <0x0 0x139 0x0>; | |
| qcom,iommu-ctx-sids; | |
| label = "vcap_cb2"; | |
| }; | |
| }; | |
| qcom,iommu-domains { | |
| compatible = "qcom,iommu-domains"; | |
| qcom,iommu-domain1 { | |
| label = "venus_ns"; | |
| qcom,iommu-contexts = <0x70>; | |
| qcom,virtual-addr-pool = <0x5dc00000 0x7f000000 0xdcc00000 0x1000000>; | |
| linux,phandle = <0x45>; | |
| phandle = <0x45>; | |
| }; | |
| qcom,iommu-domain2 { | |
| label = "venus_sec_bitstream"; | |
| qcom,iommu-contexts = <0x71>; | |
| qcom,virtual-addr-pool = <0x4b000000 0x12c00000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0x46>; | |
| phandle = <0x46>; | |
| }; | |
| qcom,iommu-domain3 { | |
| label = "venus_sec_pixel"; | |
| qcom,iommu-contexts = <0x72>; | |
| qcom,virtual-addr-pool = <0x25800000 0x25800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0x47>; | |
| phandle = <0x47>; | |
| }; | |
| qcom,iommu-domain4 { | |
| label = "venus_sec_non_pixel"; | |
| qcom,iommu-contexts = <0x73>; | |
| qcom,virtual-addr-pool = <0x1000000 0x24800000>; | |
| qcom,secure-domain; | |
| linux,phandle = <0x48>; | |
| phandle = <0x48>; | |
| }; | |
| }; | |
| qcom,spm@f9089000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xf9089000 0x1000>; | |
| qcom,core-id = <0x0>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x1>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| }; | |
| qcom,spm@f9099000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xf9099000 0x1000>; | |
| qcom,core-id = <0x1>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x1>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| }; | |
| qcom,spm@f90a9000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xf90a9000 0x1000>; | |
| qcom,core-id = <0x2>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x1>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| }; | |
| qcom,spm@f90b9000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xf90b9000 0x1000>; | |
| qcom,core-id = <0x3>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x1>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-spm-cmd-wfi = [03 0b 0f]; | |
| qcom,saw2-spm-cmd-ret = [42 1b 00 d8 5b 03 d8 5b 0b 00 42 1b 0f]; | |
| qcom,saw2-spm-cmd-spc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| qcom,saw2-spm-cmd-pc = [00 20 80 10 e8 5b 03 3b e8 5b 82 10 0b 30 06 26 30 0f]; | |
| }; | |
| qcom,spm@f9012000 { | |
| compatible = "qcom,spm-v2"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| reg = <0xf9012000 0x1000>; | |
| qcom,core-id = <0xffff>; | |
| qcom,saw2-ver-reg = <0xfd0>; | |
| qcom,saw2-cfg = <0x14>; | |
| qcom,saw2-avs-ctl = <0x0>; | |
| qcom,saw2-avs-hysteresis = <0x0>; | |
| qcom,saw2-avs-limit = <0x0>; | |
| qcom,saw2-avs-dly = <0x0>; | |
| qcom,saw2-spm-dly = <0x3c102800>; | |
| qcom,saw2-spm-ctl = <0x1>; | |
| qcom,saw2-pmic-data0 = <0x2030080>; | |
| qcom,saw2-pmic-data1 = <0x30000>; | |
| qcom,vctl-timeout-us = <0x32>; | |
| qcom,vctl-port = <0x0>; | |
| qcom,phase-port = <0x1>; | |
| qcom,pfm-port = <0x2>; | |
| qcom,saw2-spm-cmd-ret = [1f 00 03 00 0f]; | |
| qcom,saw2-spm-cmd-gdhs = [00 32 42 03 44 50 02 32 50 0f]; | |
| qcom,saw2-spm-cmd-pc = <0x1032b0 0x11420701 0xb0124450 0x232500f>; | |
| qcom,L2-spm-is-apcs-master; | |
| }; | |
| qcom,lpm-levels { | |
| compatible = "qcom,lpm-levels"; | |
| qcom,allow-synced-levels; | |
| qcom,default-l2-state = "l2_cache_retention"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| linux,phandle = <0x74>; | |
| phandle = <0x74>; | |
| qcom,cpu-modes { | |
| compatible = "qcom,cpu-modes"; | |
| qcom,cpu-mode@0 { | |
| qcom,mode = "wfi"; | |
| qcom,latency-us = <0x1>; | |
| qcom,ss-power = <0x2cb>; | |
| qcom,energy-overhead = <0x4524>; | |
| qcom,time-overhead = <0x2>; | |
| }; | |
| qcom,cpu-mode@1 { | |
| qcom,mode = "retention"; | |
| qcom,latency-us = <0x23>; | |
| qcom,ss-power = <0x21e>; | |
| qcom,energy-overhead = <0x8868>; | |
| qcom,time-overhead = <0x28>; | |
| }; | |
| qcom,cpu-mode@2 { | |
| qcom,mode = "standalone_pc"; | |
| qcom,latency-us = <0x12c>; | |
| qcom,ss-power = <0x1dc>; | |
| qcom,energy-overhead = <0x37014>; | |
| qcom,time-overhead = <0x15e>; | |
| }; | |
| qcom,cpu-mode@3 { | |
| qcom,mode = "pc"; | |
| qcom,latency-us = <0x1f4>; | |
| qcom,ss-power = <0x190>; | |
| qcom,energy-overhead = <0x445c0>; | |
| qcom,time-overhead = <0x1f4>; | |
| qcom,use-broadcast-timer; | |
| }; | |
| }; | |
| qcom,system-modes { | |
| compatible = "qcom,system-modes"; | |
| qcom,system-mode@0 { | |
| qcom,l2 = "l2_cache_gdhs"; | |
| qcom,latency-us = <0x1f4>; | |
| qcom,ss-power = <0xa3>; | |
| qcom,energy-overhead = <0x8d0c8>; | |
| qcom,time-overhead = <0x3e8>; | |
| qcom,min-cpu-mode = "standalone_pc"; | |
| qcom,sync-cpus; | |
| }; | |
| qcom,system-mode@1 { | |
| qcom,l2 = "l2_cache_pc"; | |
| qcom,latency-us = <0x7530>; | |
| qcom,ss-power = <0x53>; | |
| qcom,energy-overhead = <0x22b474>; | |
| qcom,time-overhead = <0x19cd>; | |
| qcom,min-cpu-mode = "pc"; | |
| qcom,sync-cpus; | |
| qcom,send-rpm-sleep-set; | |
| }; | |
| }; | |
| }; | |
| qcom,pm-boot { | |
| compatible = "qcom,pm-boot"; | |
| qcom,mode = "tz"; | |
| }; | |
| qcom,mpm@fc4281d0 { | |
| compatible = "qcom,mpm-v2"; | |
| reg = <0xfc4281d0 0x1000 0xf9011008 0x4>; | |
| reg-names = "vmpm", "ipc"; | |
| interrupts = <0x0 0xab 0x1>; | |
| qcom,ipc-bit-offset = <0x1>; | |
| qcom,gic-parent = <0x1>; | |
| qcom,gic-map = <0x2 0xd8 0x2f 0xa5 0x32 0xac 0x35 0x68 0x3e 0xde 0xff 0x12 0xff 0x13 0xff 0x19 0xff 0x21 0xff 0x22 0xff 0x23 0xff 0x28 0xff 0x38 0xff 0x39 0xff 0x3a 0xff 0x3b 0xff 0x3c 0xff 0x3d 0xff 0x46 0xff 0x4a 0xff 0x4b 0xff 0x4d 0xff 0x4e 0xff 0x4f 0xff 0x5e 0xff 0x61 0xff 0x63 0xff 0x66 0xff 0x69 0xff 0x6d 0xff 0x7e 0xff 0x8c 0xff 0x92 0xff 0x9b 0xff 0x9d 0xff 0x9f 0xff 0xa3 0xff 0xaa 0xff 0xad 0xff 0xae 0xff 0xaf 0xff 0xb0 0xff 0xb1 0xff 0xb2 0xff 0xb3 0xff 0xb5 0xff 0xbc 0xff 0xbd 0xff 0xbe 0xff 0xbf 0xff 0xc0 0xff 0xc1 0xff 0xc2 0xff 0xc3 0xff 0xc4 0xff 0xc5 0xff 0xc6 0xff 0xc8 0xff 0xc9 0xff 0xca 0xff 0xcb 0xff 0xcc 0xff 0xcd 0xff 0xce 0xff 0xcf 0xff 0xd3 0xff 0xf0 0xff 0xfd 0xff 0x100 0xff 0x10c 0xff 0x10e 0xff 0x10f>; | |
| qcom,gpio-parent = <0x5>; | |
| qcom,gpio-map = <0x3 0x66 0x4 0x1 0x5 0x5 0x6 0x9 0x7 0x12 0x8 0x14 0x9 0x18 0xa 0x1b 0xb 0x1c 0xc 0x22 0xd 0x23 0xe 0x25 0xf 0x2a 0x10 0x2c 0x11 0x2e 0x12 0x32 0x13 0x36 0x14 0x3b 0x15 0x3d 0x16 0x3e 0x17 0x40 0x18 0x41 0x19 0x42 0x1a 0x43 0x1b 0x44 0x1c 0x47 0x1d 0x48 0x1e 0x49 0x1f 0x4a 0x20 0x4b 0x21 0x4d 0x22 0x4f 0x23 0x50 0x24 0x52 0x25 0x56 0x26 0x5c 0x27 0x5d 0x28 0x5f 0x29 0x90>; | |
| }; | |
| qcom,pm-8x60@fe805664 { | |
| compatible = "qcom,pm-8x60"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| reg = <0xfe805664 0x40>; | |
| qcom,pc-mode = "tz_l2_int"; | |
| qcom,cpus-as-clocks; | |
| qcom,lpm-levels = <0x74>; | |
| qcom,pm-snoc-client { | |
| compatible = "qcom,pm-snoc-client"; | |
| qcom,msm-bus,name = "ocimem_snoc"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,active-only; | |
| qcom,msm-bus,vectors-KBps = <0x36 0x249 0x0 0x0 0x36 0x249 0x0 0xc3500>; | |
| }; | |
| }; | |
| qcom,cpu-sleep-status@f9088008 { | |
| compatible = "qcom,cpu-sleep-status"; | |
| reg = <0xf9088008 0x100>; | |
| qcom,cpu-alias-addr = <0x10000>; | |
| qcom,sleep-status-mask = <0x80000>; | |
| }; | |
| qcom,rpm-log@fc19dc00 { | |
| compatible = "qcom,rpm-log"; | |
| reg = <0xfc19dc00 0x4000>; | |
| qcom,rpm-addr-phys = <0xfc000000>; | |
| qcom,offset-version = <0x4>; | |
| qcom,offset-page-buffer-addr = <0x24>; | |
| qcom,offset-log-len = <0x28>; | |
| qcom,offset-log-len-mask = <0x2c>; | |
| qcom,offset-page-indices = <0x38>; | |
| }; | |
| qcom,rpm-stats@fc19dba0 { | |
| compatible = "qcom,rpm-stats"; | |
| reg = <0xfc19dba0 0x1000>; | |
| reg-names = "phys_addr_base"; | |
| qcom,sleep-stats-version = <0x2>; | |
| }; | |
| qcom,rpm-rbcpr-stats@fc000000 { | |
| compatible = "qcom,rpmrbcpr-stats"; | |
| reg = <0xfc000000 0x1a0000>; | |
| qcom,start-offset = <0x190010>; | |
| }; | |
| qcom,rpm-master-stats@fc428150 { | |
| compatible = "qcom,rpm-master-stats"; | |
| reg = <0xfc428150 0x3200>; | |
| qcom,masters = "APSS", "MPSS", "LPSS", "PRONTO"; | |
| qcom,master-stats-version = <0x2>; | |
| qcom,master-offset = <0xa00>; | |
| }; | |
| krait-pdn@f9011000 { | |
| reg = <0xf9011000 0x1000 0xfc4b80b0 0x8>; | |
| reg-names = "apcs_gcc", "phase-scaling-efuse"; | |
| compatible = "qcom,krait-pdn"; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x1>; | |
| ranges; | |
| qcom,pfm-threshold = <0x4c>; | |
| qcom,use-phase-scaling-factor; | |
| qcom,phase-scaling-factor-bits-pos = <0x10>; | |
| qcom,valid-scaling-factor-versions = <0x0 0x1 0x1 0x0>; | |
| qcom,force-auto-mode; | |
| qcom,use-phase-switching; | |
| regulator@f9088000 { | |
| compatible = "qcom,krait-regulator"; | |
| regulator-name = "krait0"; | |
| reg = <0xf9088000 0x1000 0xf908a800 0x1000>; | |
| reg-names = "acs", "mdd"; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-max-microvolt = <0x111700>; | |
| qcom,headroom-voltage = <0x249f0>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| qcom,ldo-delta-voltage = <0x30d4>; | |
| qcom,cpu-num = <0x0>; | |
| linux,phandle = <0x5a>; | |
| phandle = <0x5a>; | |
| }; | |
| regulator@f9098000 { | |
| compatible = "qcom,krait-regulator"; | |
| regulator-name = "krait1"; | |
| reg = <0xf9098000 0x1000 0xf909a800 0x1000>; | |
| reg-names = "acs", "mdd"; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-max-microvolt = <0x111700>; | |
| qcom,headroom-voltage = <0x249f0>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| qcom,ldo-delta-voltage = <0x30d4>; | |
| qcom,cpu-num = <0x1>; | |
| linux,phandle = <0x5b>; | |
| phandle = <0x5b>; | |
| }; | |
| regulator@f90a8000 { | |
| compatible = "qcom,krait-regulator"; | |
| regulator-name = "krait2"; | |
| reg = <0xf90a8000 0x1000 0xf90aa800 0x1000>; | |
| reg-names = "acs", "mdd"; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-max-microvolt = <0x111700>; | |
| qcom,headroom-voltage = <0x249f0>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| qcom,ldo-delta-voltage = <0x30d4>; | |
| qcom,cpu-num = <0x2>; | |
| linux,phandle = <0x5c>; | |
| phandle = <0x5c>; | |
| }; | |
| regulator@f90b8000 { | |
| compatible = "qcom,krait-regulator"; | |
| regulator-name = "krait3"; | |
| reg = <0xf90b8000 0x1000 0xf90ba800 0x1000>; | |
| reg-names = "acs", "mdd"; | |
| regulator-min-microvolt = <0x7a120>; | |
| regulator-max-microvolt = <0x111700>; | |
| qcom,headroom-voltage = <0x249f0>; | |
| qcom,retention-voltage = <0xa4cb8>; | |
| qcom,ldo-default-voltage = <0xb71b0>; | |
| qcom,ldo-threshold-voltage = <0xcf850>; | |
| qcom,ldo-delta-voltage = <0x30d4>; | |
| qcom,cpu-num = <0x3>; | |
| linux,phandle = <0x5d>; | |
| phandle = <0x5d>; | |
| }; | |
| }; | |
| spi_eth_phy_vreg { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "ethernet_phy"; | |
| regulator-always-on; | |
| linux,phandle = <0x59>; | |
| phandle = <0x59>; | |
| }; | |
| vph_pwr_vreg { | |
| compatible = "regulator-fixed"; | |
| status = "ok"; | |
| regulator-name = "vph_pwr"; | |
| regulator-always-on; | |
| linux,phandle = <0x55>; | |
| phandle = <0x55>; | |
| }; | |
| android_usb@fe8050c8 { | |
| compatible = "qcom,android-usb"; | |
| reg = <0xfe8050c8 0xc8>; | |
| qcom,android-usb-swfi-latency = <0x1>; | |
| qcom,android-usb-uicc-nluns = [01]; | |
| }; | |
| qcom,msm-imem@fe805000 { | |
| compatible = "qcom,msm-imem"; | |
| reg = <0xfe805000 0x1000>; | |
| }; | |
| qcom,lpm-resources { | |
| qcom,lpm-resources@0 { | |
| qcom,name = "vdd-dig"; | |
| qcom,type = <0x61706d73>; | |
| qcom,id = <0x2>; | |
| }; | |
| qcom,lpm-resources@1 { | |
| qcom,name = "vdd-mem"; | |
| qcom,type = <0x61706d73>; | |
| qcom,id = <0x1>; | |
| }; | |
| }; | |
| max77804k_haptic_driver { | |
| haptic,max_timeout = <0x2710>; | |
| haptic,duty = <0xabe0>; | |
| haptic,period = <0xae62>; | |
| haptic,pwm_id = <0x1>; | |
| linux,phandle = <0x75>; | |
| phandle = <0x75>; | |
| }; | |
| i2c@13 { | |
| cell-index = <0xd>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x3c 0x0 0x5 0x3d 0x0>; | |
| i2c-gpio,delay-us = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| max77804k@66 { | |
| compatible = "max77804k,i2c"; | |
| reg = <0x66>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x66 0x0>; | |
| max77804k,irq-gpio = <0x5 0x66 0x0>; | |
| max77804k,irq-base = <0x1f4>; | |
| max77804k,wc-irq-gpio = <0x0>; | |
| max77804k,wakeup = <0x1>; | |
| max77804k,haptic = <0x75>; | |
| }; | |
| }; | |
| i2c@19 { | |
| cell-index = <0x13>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x57 0x0 0x5 0x58 0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| sec-fuelgauge@36 { | |
| compatible = "sec-fuelgauge,i2c"; | |
| reg = <0x36>; | |
| fuelgauge,fuel_int = <0xb 0x15 0x1>; | |
| fuelgauge,bat_int = <0xc 0x8 0x0>; | |
| fuelgauge,capacity_max = <0x3e8>; | |
| fuelgauge,capacity_max_margin = <0x32>; | |
| fuelgauge,capacity_min = <0x0>; | |
| fuelgauge,capacity_calculation_type = <0x17>; | |
| fuelgauge,fuel_alert_soc = <0x2>; | |
| qcom,sec-fuelgauge-vadc = <0x56>; | |
| }; | |
| smb1357-charger@1c { | |
| compatible = "smb1357-charger,i2c"; | |
| reg = <0x1c>; | |
| interrupt-parent = <0xb>; | |
| interrupts = <0x7 0x0>; | |
| #qcom,float-voltage-mv = <0x1068>; | |
| #qcom,iterm-ma = <0x64>; | |
| #qcom,dc-psy-type = <0x8>; | |
| #qcom,dc-psy-ma = <0x320>; | |
| #qcom,charging-disabled; | |
| #qcom,recharge-thresh-mv = <0x64>; | |
| }; | |
| }; | |
| i2c@f9963000 { | |
| cell-index = <0x7>; | |
| compatible = "qcom,i2c-qup"; | |
| reg = <0xf9963000 0x1000>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg-names = "qup_phys_addr"; | |
| interrupts = <0x0 0x65 0x0>; | |
| interrupt-names = "qup_err_intr"; | |
| qcom,i2c-bus-freq = <0x186a0>; | |
| qcom,i2c-src-freq = <0x2faf080>; | |
| qcom,master-id = <0x54>; | |
| qcom,actuator@36 { | |
| compatible = "qcom,actuator"; | |
| cell-index = <0x1>; | |
| reg = <0x36>; | |
| gpios = <0x5 0x2b 0x0 0x5 0x2c 0x0>; | |
| qcom,gpio-req-tbl-num = <0x0 0x1>; | |
| qcom,gpio-req-tbl-flags = <0x1 0x1>; | |
| qcom,gpio-req-tbl-label = "I2C_DATA0", "I2C_CLK0"; | |
| linux,phandle = <0x7>; | |
| phandle = <0x7>; | |
| }; | |
| }; | |
| aliases { | |
| spi5 = "/soc/spi@f9927000"; | |
| spi11 = "/soc/spi@f9967000"; | |
| }; | |
| spi@f9927000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| cell-index = <0x5>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0xf9927000 0x1000 0xf9904000 0x19000>; | |
| reg-names = "spi_physical", "spi_bam_physical"; | |
| interrupt-names = "spi_irq", "spi_bam_irq"; | |
| interrupts = <0x0 0x63 0x0 0x0 0xee 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| qcom,gpio-mosi = <0x5 0x17 0x0>; | |
| qcom,gpio-miso = <0x5 0x18 0x0>; | |
| qcom,gpio-clk = <0x5 0x1a 0x0>; | |
| qcom,gpio-cs0 = <0x5 0x19 0x0>; | |
| qcom,infinite-mode = <0x0>; | |
| qcom,use-bam; | |
| qcom,ver-reg-exists; | |
| qcom,bam-consumer-pipe-index = <0x14>; | |
| qcom,bam-producer-pipe-index = <0x15>; | |
| qcom,master-id = <0x56>; | |
| vfsspi-spi@0 { | |
| compatible = "vfsspi,vfs61xx"; | |
| reg = <0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| vfsspi-sleepPin = <0x5 0x39 0x0>; | |
| vfsspi-drdyPin = <0x5 0x40 0x1>; | |
| vfsspi-ldoPin = <0x5 0x82 0x0>; | |
| vfsspi-ocpen = <0x5 0x3f 0x0>; | |
| vfsspi-ocpen-jpn = <0x5 0x29 0x0>; | |
| vfsspi-mosipin = <0x17>; | |
| vfsspi-misopin = <0x18>; | |
| vfsspi-cspin = <0x19>; | |
| vfsspi-clkpin = <0x1a>; | |
| vfsspi-orient = <0x1>; | |
| vfsspi-ldocontrol = <0x1>; | |
| }; | |
| }; | |
| onewire { | |
| compatible = "w1-gpio-msm"; | |
| gpios = <0x5 0x45 0x0>; | |
| linux,open-drain = <0x1>; | |
| linux,slave-speed = <0x1>; | |
| }; | |
| ds28el15 { | |
| compatible = "w1-ds28el15"; | |
| ds28el15,id-min = <0x0>; | |
| ds28el15,id-max = <0x5>; | |
| ds28el15,id-default = <0x1>; | |
| ds28el15,color-min = <0x0>; | |
| ds28el15,color-max = <0xd>; | |
| ds28el15,color-default = <0x1>; | |
| }; | |
| samsung,vibrator { | |
| compatible = "vibrator"; | |
| samsung,pmic_vib_pwm = <0x5 0x1b 0x0>; | |
| samsung,pmic_vib_pwm_jpn = <0x5 0x3b 0x0>; | |
| samsung,vib_model = <0x1>; | |
| samsung,pmic_vib_en = <0x0>; | |
| samsung,pmic_haptic_pwr_en = <0x0>; | |
| samsung,is_pmic_vib_pwm = <0x0>; | |
| samsung,pwm_period_us = <0x28>; | |
| samsung,duty_us = <0x24>; | |
| status = "ok"; | |
| }; | |
| i2c@f9967000 { | |
| isa1200@48 { | |
| status = "okay"; | |
| reg = <0x48>; | |
| vcc_i2c-supply = <0x35>; | |
| compatible = "imagis,isa1200"; | |
| label = "vibrator"; | |
| imagis,chip-en; | |
| imagis,need-pwm-clk; | |
| imagis,ext-clk-en; | |
| imagis,hap-en-gpio = <0x5 0x56 0x0>; | |
| imagis,max-timeout = <0x3a98>; | |
| imagis,pwm-div = <0x100>; | |
| imagis,mode-ctrl = <0x2>; | |
| imagis,regulator { | |
| regulator-name = "vcc_i2c"; | |
| regulator-min-microvolt = <0x1b7740>; | |
| regulator-max-microvolt = <0x1b7740>; | |
| regulator-max-microamp = <0x2490>; | |
| }; | |
| }; | |
| }; | |
| i2c@15 { | |
| cell-index = <0xf>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x5f 0x0 0x5 0x60 0x0>; | |
| i2c-gpio,delay-us = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| status = "disabled"; | |
| templete@25 { | |
| compatible = "templete,i2c"; | |
| reg = <0x25>; | |
| interrupt-parent = <0x5>; | |
| interupts = <0x52 0x0>; | |
| }; | |
| }; | |
| i2c@16 { | |
| cell-index = <0x10>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x1d 0x0 0x5 0x1e 0x0>; | |
| i2c-gpio,delay-us = <0x2>; | |
| }; | |
| i2c@17 { | |
| cell-index = <0x11>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x78 0x0 0x5 0x79 0x0>; | |
| i2c-gpio,delay-us = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| an30259a@30 { | |
| compatible = "an30259a,led"; | |
| reg = <0x30>; | |
| }; | |
| pcal6416a@20 { | |
| compatible = "pcal6416a,gpio-expander"; | |
| gpio-controller; | |
| #gpio-cells = <0x2>; | |
| reg = <0x20>; | |
| pcal6416a,gpio_start = <0x12c>; | |
| pcal6416a,ngpio = <0x10>; | |
| pcal6416a,reset-gpio = <0x5 0x91 0x0>; | |
| pcal6416a,support_initialize = <0x1>; | |
| pcal6416a,config = <0xa0b0>; | |
| pcal6416a,data_out = <0x8>; | |
| pcal6416a,pull_reg = <0x40401>; | |
| linux,phandle = <0xf>; | |
| phandle = <0xf>; | |
| }; | |
| }; | |
| i2c@21 { | |
| cell-index = <0x15>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x5f 0x0 0x5 0x60 0x0>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| cypress_touchkey@20 { | |
| compatible = "cypress,cypress-tkey"; | |
| reg = <0x20>; | |
| interrupt-parent = <0xb>; | |
| interrupts = <0x6 0x0>; | |
| vdd_led-supply = <0x6c>; | |
| cypress,scl-gpio = <0x5 0x60 0x0>; | |
| cypress,sda-gpio = <0x5 0x5f 0x0>; | |
| cypress,irq-gpio = <0xb 0x6 0x1>; | |
| cypress,tkey-keycodes = <0xfe 0x9e>; | |
| cypress,i2c-pull-up = <0x1>; | |
| }; | |
| }; | |
| i2c@22 { | |
| cell-index = <0x16>; | |
| compatible = "i2c-gpio"; | |
| gpios = <0x5 0x6d 0x0 0x5 0x6c 0x0>; | |
| i2c-gpio,delay-us = <0x2>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| irda_ice40@50 { | |
| compatible = "irda_ice40"; | |
| reg = <0x50>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x65 0x0>; | |
| irda_ice40,fw_ver = <0x2>; | |
| irda_ice40,reset_n = <0xf 0x3 0x0>; | |
| irda_ice40,scl-gpio = <0x5 0x6c 0x0>; | |
| irda_ice40,sda-gpio = <0x5 0x6d 0x0>; | |
| irda_ice40,irq-gpio = <0x5 0x65 0x0>; | |
| irda_ice40,cresetb = <0xb 0xb 0x1>; | |
| irda_ice40,i2c-pull-up = <0x1>; | |
| tunable,support = <0x0>; | |
| tunable,cresetb = <0x5 0x32 0x0>; | |
| }; | |
| }; | |
| gpio_keys { | |
| compatible = "gpio-keys"; | |
| input-name = "gpio-keys"; | |
| home_key { | |
| label = "home_key"; | |
| gpios = <0xb 0x3 0x1>; | |
| linux,input-type = <0x1>; | |
| linux,code = <0xac>; | |
| gpio-key,wakeup; | |
| debounce-interval = <0xf>; | |
| }; | |
| vol_down { | |
| label = "volume_down"; | |
| gpios = <0xb 0x2 0x1>; | |
| linux,input-type = <0x1>; | |
| linux,code = <0x72>; | |
| debounce-interval = <0xf>; | |
| }; | |
| vol_up { | |
| label = "volume_up"; | |
| gpios = <0xb 0x5 0x1>; | |
| linux,input-type = <0x1>; | |
| linux,code = <0x73>; | |
| debounce-interval = <0xf>; | |
| }; | |
| hall_flip { | |
| label = "hall_flip"; | |
| gpios = <0xb 0x1 0x0>; | |
| linux,input-type = <0x1>; | |
| linux,code = <0x15>; | |
| gpio-key,wakeup; | |
| debounce-interval = <0xf>; | |
| hall_wa_disable; | |
| }; | |
| }; | |
| spi@f9967000 { | |
| compatible = "qcom,spi-qup-v2"; | |
| cell-index = <0xb>; | |
| #address-cells = <0x1>; | |
| #size-cells = <0x0>; | |
| reg = <0xf9967000 0x1000>; | |
| interrupt-names = "spi_irq"; | |
| interrupts = <0x0 0x69 0x0>; | |
| spi-max-frequency = <0x124f800>; | |
| qcom,gpio-mosi = <0x5 0x51 0x0>; | |
| qcom,gpio-miso = <0x5 0x52 0x0>; | |
| qcom,gpio-clk = <0x5 0x54 0x0>; | |
| qcom,gpio-cs0 = <0x5 0x53 0x0>; | |
| qcom,master-id = <0x54>; | |
| STM32F@0 { | |
| compatible = "ssp,STM32F"; | |
| reg = <0x0>; | |
| spi-max-frequency = <0x493e00>; | |
| interrupt-parent = <0x5>; | |
| interrupts = <0x4a 0x0>; | |
| hub_vreg-supply = <0x76>; | |
| psns_vreg-supply = <0x77>; | |
| ssp,mcu_int1-gpio = <0x5 0x4a 0x0>; | |
| ssp,mcu_int2-gpio = <0x5 0x56 0x0>; | |
| ssp,ap_int-gpio = <0x5 0x59 0x0>; | |
| ssp,rst-gpio = <0x5 0x9 0x0>; | |
| ssp,acc-position = <0x6>; | |
| ssp,mag-position = <0x7>; | |
| ssp,ap-rev = <0x5>; | |
| qcom,temphumidity_sensor-vadc = <0x56>; | |
| }; | |
| }; | |
| qcom,wqhd_cmd0 { | |
| status = "ok"; | |
| }; | |
| qcom,wqhd_cmd1 { | |
| status = "ok"; | |
| }; | |
| qcom,mdss_dsi_samsung_1080p_cmd_fa2 { | |
| status = "ok"; | |
| }; | |
| uart@f991d000 { | |
| compatible = "qcom,msm-hsuart-v14"; | |
| status = "ok"; | |
| reg = <0xf991d000 0x1000 0xf9904000 0x19000>; | |
| reg-names = "core_mem", "bam_mem"; | |
| interrupt-names = "core_irq", "bam_irq", "wakeup_irq"; | |
| #address-cells = <0x0>; | |
| interrupt-parent = <0x78>; | |
| interrupts = <0x0 0x1 0x2>; | |
| #interrupt-cells = <0x1>; | |
| interrupt-map-mask = <0xffffffff>; | |
| interrupt-map = <0x0 0x1 0x0 0x6b 0x0 0x1 0x1 0x0 0xee 0x0 0x2 0x5 0x1 0x0>; | |
| qcom,tx-gpio = <0x5 0x0 0x0>; | |
| qcom,rx-gpio = <0x5 0x1 0x0>; | |
| qcom,bam-tx-ep-pipe-index = <0x0>; | |
| qcom,bam-rx-ep-pipe-index = <0x1>; | |
| qcom,msm-bus,name = "uart1"; | |
| qcom,msm-bus,num-cases = <0x2>; | |
| qcom,msm-bus,num-paths = <0x1>; | |
| qcom,msm-bus,vectors-KBps = <0x56 0x200 0x0 0x0 0x56 0x200 0x1f4 0x320>; | |
| linux,phandle = <0x78>; | |
| phandle = <0x78>; | |
| }; | |
| det_zones { | |
| #list-det-cells = <0x4>; | |
| linux,phandle = <0x79>; | |
| phandle = <0x79>; | |
| }; | |
| but_zones { | |
| #list-but-cells = <0x3>; | |
| linux,phandle = <0x7a>; | |
| phandle = <0x7a>; | |
| }; | |
| earjack { | |
| compatible = "sec_jack"; | |
| qcom,earjack-read-vadc = <0x56>; | |
| qcom,earjack-detect-gpio = <0xb 0x14 0x0>; | |
| qcom,earjack-micbias-gpio = <0x5 0x55 0x0>; | |
| qcom,earjack-sendend-gpio = <0x5 0x4d 0x0>; | |
| qcom,earjack-fsa_en-expander-gpio = <0x136>; | |
| qcom,send-end-active-high; | |
| det-zones-list = <0x79 0x3 0x2710 0xa 0x0 0x79 0x3b6 0x2710 0xa 0x0 0x79 0x960 0x2710 0xa 0x1 0x79 0x270f 0x2710 0xa 0x1>; | |
| but-zones-list = <0x7a 0x0 0x0 0x9b 0x7a 0x1 0x9c 0x139 0x7a 0x2 0x13a 0x283>; | |
| mpp-channel-scaling = <0x4 0x1 0x3>; | |
| }; | |
| battery { | |
| status = "okay"; | |
| compatible = "samsung,sec-battery"; | |
| battery,vendor = "SDI SDI"; | |
| battery,charger_name = "sec-charger"; | |
| battery,fuelgauge_name = "sec-fuelgauge"; | |
| battery,technology = <0x2>; | |
| battery,bat_irq = <0x1fd>; | |
| battery,bat_irq_attr = <0x2>; | |
| battery,chip_vendor = "QCOM"; | |
| battery,temp_adc_type = <0x1>; | |
| battery,polling_time = <0xa 0x1e 0x1e 0x1e 0xe10>; | |
| battery,adc_check_count = <0x5>; | |
| battery,cable_check_type = <0x6>; | |
| battery,cable_source_type = <0x1>; | |
| battery,event_check; | |
| battery,event_waiting_time = <0x258>; | |
| battery,polling_type = <0x1>; | |
| battery,monitor_initial_count = <0x3>; | |
| battery,battery_check_type = <0x1>; | |
| battery,check_count = <0x0>; | |
| battery,check_adc_max = <0x5a0>; | |
| battery,check_adc_min = <0x0>; | |
| battery,ovp_uvlo_check_type = <0x3>; | |
| battery,thermal_source = <0x2>; | |
| battery,temp_check_type = <0x2>; | |
| battery,temp_check_count = <0x1>; | |
| battery,temp_high_threshold_event = <0x28a>; | |
| battery,temp_high_recovery_event = <0x1b8>; | |
| battery,temp_low_threshold_event = <0xffffffd3>; | |
| battery,temp_low_recovery_event = <0x0>; | |
| battery,temp_high_threshold_normal = <0x28a>; | |
| battery,temp_high_recovery_normal = <0x1b8>; | |
| battery,temp_low_threshold_normal = <0xffffffd3>; | |
| battery,temp_low_recovery_normal = <0x0>; | |
| battery,temp_high_threshold_lpm = <0x28a>; | |
| battery,temp_high_recovery_lpm = <0x1b8>; | |
| battery,temp_low_threshold_lpm = <0xffffffd3>; | |
| battery,temp_low_recovery_lpm = <0x0>; | |
| battery,full_check_type = <0x7>; | |
| battery,full_check_type_2nd = <0x3>; | |
| battery,full_check_count = <0x1>; | |
| battery,chg_gpio_full_check = <0x0>; | |
| battery,chg_polarity_full_check = <0x1>; | |
| battery,full_condition_type = <0xd>; | |
| battery,full_condition_soc = <0x5d>; | |
| battery,full_condition_vcell = <0x10cc>; | |
| battery,recharge_check_count = <0x1>; | |
| battery,recharge_condition_type = <0x4>; | |
| battery,recharge_condition_soc = <0x62>; | |
| battery,recharge_condition_vcell = <0x10fe>; | |
| battery,charging_total_time = <0x5460>; | |
| battery,recharging_total_time = <0x1518>; | |
| battery,charging_reset_time = <0x0>; | |
| charger { | |
| status = "disable"; | |
| battery,charger_name = "sec-charger"; | |
| battery,chg_gpio_en = <0x0>; | |
| battery,chg_polarity_en = <0x0>; | |
| battery,chg_gpio_status = <0x0>; | |
| battery,chg_polarity_status = <0x0>; | |
| battery,chg_float_voltage = <0x1130>; | |
| battery,ovp_uvlo_check_type = <0x3>; | |
| battery,full_check_type = <0x7>; | |
| battery,input_current_limit = <0x708 0x1cc 0x1cc 0x708 0x1cc 0x384 0x3e8 0x1cc 0x1cc 0x3e8 0x2f8 0x708 0x708 0x1cc 0x514 0x190 0x2bc 0x514 0x12c 0x3e8 0x708 0x1cc 0x1cc>; | |
| battery,fast_charging_current = <0x834 0x0 0x1cc 0x834 0x1cc 0x4b0 0x3e8 0x1cc 0x0 0x4b0 0x384 0x834 0x834 0x0 0x514 0x190 0x2bc 0x514 0x12c 0x3e8 0x834 0x0 0x0>; | |
| battery,full_check_current_1st = <0xc8 0x0 0xc8 0xc8 0xc8 0xc8 0xc8 0xc8 0x0 0xc8 0xc8 0xc8 0xc8 0x0 0xc8 0xc8 0xc8 0xc8 0xc8 0xc8 0xc8 0x0 0x0>; | |
| battery,full_check_current_2nd = <0x960 0x0 0x960 0x960 0x960 0x960 0x960 0x960 0x0 0x960 0x960 0x960 0x960 0x0 0x960 0x960 0x960 0x960 0x960 0x960 0x960 0x0 0x0>; | |
| }; | |
| }; | |
| }; | |
| }; |
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