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@mithro
Created April 17, 2019 01:58
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{
"creator": "Yosys 0.8+319 (git sha1 2c7e2541, x86_64-conda_cos6-linux-gnu-gcc 1.23.0.449-a04d0 -fvisibility-inlines-hidden -fmessage-length=0 -march=nocona -mtune=haswell -ftree-vectorize -fPIC -fstack-protector-strong -fno-plt -O2 -ffunction-sections -fdebug-prefix-map=/tmp/really-really-really-really-really-really-really-really-really-really-really-really-really-long-path/conda/conda-bld/yosys_1555106055240/work=/usr/local/src/conda/yosys-0.8 -fdebug-prefix-map=/github/SymbiFlow/symbiflow-arch-defs/build/env/conda=/usr/local/src/conda-prefix -fPIC -Os)",
"modules": {
"A5FFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/N5ffmux/a5ffmux.sim.v:9"
},
"ports": {
"IN_B": {
"direction": "input",
"bits": [ 2 ]
},
"IN_A": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/N5ffmux/a5ffmux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN_A": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/a5ffmux.sim.v:12"
}
},
"IN_B": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/a5ffmux.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/a5ffmux.sim.v:16"
}
}
}
},
"ACY0": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/Ncy0/acy0.sim.v:8"
},
"ports": {
"O5": {
"direction": "input",
"bits": [ 2 ]
},
"AX": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Ncy0/acy0.sim.v:17"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"AX": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/acy0.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/acy0.sim.v:15"
}
},
"O5": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/acy0.sim.v:10"
}
}
}
},
"AFFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/affmux/affmux.sim.v:8"
},
"ports": {
"XOR": {
"direction": "input",
"bits": [ 2 ]
},
"O6": {
"direction": "input",
"bits": [ 3 ]
},
"O5": {
"direction": "input",
"bits": [ 4 ]
},
"F7": {
"direction": "input",
"bits": [ 5 ]
},
"CY": {
"direction": "input",
"bits": [ 6 ]
},
"AX": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/affmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"AX": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:15"
}
},
"CY": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:14"
}
},
"F7": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:13"
}
},
"O5": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:12"
}
},
"O6": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:11"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/affmux/affmux.sim.v:10"
}
}
}
},
"ALUT": {
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:5"
},
"ports": {
"A1": {
"direction": "input",
"bits": [ 2 ]
},
"A2": {
"direction": "input",
"bits": [ 3 ]
},
"A3": {
"direction": "input",
"bits": [ 4 ]
},
"A4": {
"direction": "input",
"bits": [ 5 ]
},
"A5": {
"direction": "input",
"bits": [ 6 ]
},
"A6": {
"direction": "input",
"bits": [ 7 ]
},
"O6": {
"direction": "output",
"bits": [ "0" ]
},
"O5": {
"direction": "output",
"bits": [ "0" ]
}
},
"cells": {
},
"netnames": {
"A1": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:7"
}
},
"A2": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:8"
}
},
"A3": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:9"
}
},
"A4": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:10"
}
},
"A5": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:11"
}
},
"A6": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:12"
}
},
"O5": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:15"
}
},
"O6": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/alut.sim.v:14"
}
}
}
},
"AOUTMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:8"
},
"ports": {
"A5Q": {
"direction": "input",
"bits": [ 2 ]
},
"XOR": {
"direction": "input",
"bits": [ 3 ]
},
"O6": {
"direction": "input",
"bits": [ 4 ]
},
"O5": {
"direction": "input",
"bits": [ 5 ]
},
"F7": {
"direction": "input",
"bits": [ 6 ]
},
"CY": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"A5Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:10"
}
},
"CY": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:15"
}
},
"F7": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:14"
}
},
"O5": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:13"
}
},
"O6": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:12"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/aoutmux/aoutmux.sim.v:11"
}
}
}
},
"AUSED": {
"attributes": {
"src": "../common_slice/routing/Nused/aused.sim.v:3"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"O": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Nused/aused.sim.v:11"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ "0" ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Nused/aused.sim.v:5"
}
},
"O": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Nused/aused.sim.v:9"
}
}
}
},
"B5FFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/N5ffmux/b5ffmux.sim.v:9"
},
"ports": {
"IN_B": {
"direction": "input",
"bits": [ 2 ]
},
"IN_A": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/N5ffmux/b5ffmux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN_A": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/b5ffmux.sim.v:12"
}
},
"IN_B": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/b5ffmux.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/b5ffmux.sim.v:16"
}
}
}
},
"BCY0": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/Ncy0/bcy0.sim.v:8"
},
"ports": {
"O5": {
"direction": "input",
"bits": [ 2 ]
},
"BX": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Ncy0/bcy0.sim.v:17"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"BX": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/bcy0.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/bcy0.sim.v:15"
}
},
"O5": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/bcy0.sim.v:10"
}
}
}
},
"BFFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/bffmux/bffmux.sim.v:8"
},
"ports": {
"XOR": {
"direction": "input",
"bits": [ 2 ]
},
"O6": {
"direction": "input",
"bits": [ 3 ]
},
"O5": {
"direction": "input",
"bits": [ 4 ]
},
"F8": {
"direction": "input",
"bits": [ 5 ]
},
"CY": {
"direction": "input",
"bits": [ 6 ]
},
"BX": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/bffmux/bffmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"BX": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:15"
}
},
"CY": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:14"
}
},
"F8": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:13"
}
},
"O5": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:12"
}
},
"O6": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:11"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/bffmux/bffmux.sim.v:10"
}
}
}
},
"BLUT": {
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:5"
},
"ports": {
"A1": {
"direction": "input",
"bits": [ 2 ]
},
"A2": {
"direction": "input",
"bits": [ 3 ]
},
"A3": {
"direction": "input",
"bits": [ 4 ]
},
"A4": {
"direction": "input",
"bits": [ 5 ]
},
"A5": {
"direction": "input",
"bits": [ 6 ]
},
"A6": {
"direction": "input",
"bits": [ 7 ]
},
"O6": {
"direction": "output",
"bits": [ "0" ]
},
"O5": {
"direction": "output",
"bits": [ "0" ]
}
},
"cells": {
},
"netnames": {
"A1": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:7"
}
},
"A2": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:8"
}
},
"A3": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:9"
}
},
"A4": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:10"
}
},
"A5": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:11"
}
},
"A6": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:12"
}
},
"O5": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:15"
}
},
"O6": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/blut.sim.v:14"
}
}
}
},
"BOUTMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/boutmux/boutmux.sim.v:8"
},
"ports": {
"B5Q": {
"direction": "input",
"bits": [ 2 ]
},
"XOR": {
"direction": "input",
"bits": [ 3 ]
},
"O6": {
"direction": "input",
"bits": [ 4 ]
},
"O5": {
"direction": "input",
"bits": [ 5 ]
},
"F8": {
"direction": "input",
"bits": [ 6 ]
},
"CY": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/boutmux/boutmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"B5Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:10"
}
},
"CY": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:15"
}
},
"F8": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:14"
}
},
"O5": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:13"
}
},
"O6": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:12"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/boutmux/boutmux.sim.v:11"
}
}
}
},
"BUSED": {
"attributes": {
"src": "../common_slice/routing/Nused/bused.sim.v:3"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"O": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Nused/bused.sim.v:11"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ "0" ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Nused/bused.sim.v:5"
}
},
"O": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Nused/bused.sim.v:9"
}
}
}
},
"C5FFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/N5ffmux/c5ffmux.sim.v:9"
},
"ports": {
"IN_B": {
"direction": "input",
"bits": [ 2 ]
},
"IN_A": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/N5ffmux/c5ffmux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN_A": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/c5ffmux.sim.v:12"
}
},
"IN_B": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/c5ffmux.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/c5ffmux.sim.v:16"
}
}
}
},
"CARRY": {
"attributes": {
"blackbox": 1,
"src": "../common_slice/carry/carry.sim.v:2"
},
"ports": {
"O": {
"direction": "output",
"bits": [ 2 ]
},
"CO_CHAIN": {
"direction": "output",
"bits": [ 3 ]
},
"CO_FABRIC": {
"direction": "output",
"bits": [ 3 ]
},
"CI": {
"direction": "input",
"bits": [ 4 ]
},
"DI": {
"direction": "input",
"bits": [ 5 ]
},
"S": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$ternary$../common_slice/carry/carry.sim.v:13$49": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../common_slice/carry/carry.sim.v:13"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ 4 ],
"S": [ 6 ],
"Y": [ 3 ]
}
},
"$xor$../common_slice/carry/carry.sim.v:15$50": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../common_slice/carry/carry.sim.v:15"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 4 ],
"B": [ 6 ],
"Y": [ 2 ]
}
}
},
"netnames": {
"$ternary$../common_slice/carry/carry.sim.v:13$49_Y": {
"hide_name": 1,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/carry/carry.sim.v:13"
}
},
"$xor$../common_slice/carry/carry.sim.v:15$50_Y": {
"hide_name": 1,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/carry/carry.sim.v:15"
}
},
"CI": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/carry/carry.sim.v:11"
}
},
"CO_CHAIN": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_DI": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry.sim.v:10"
}
},
"CO_FABRIC": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_DI": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry.sim.v:10"
}
},
"DI": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/carry/carry.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry.sim.v:5"
}
},
"S": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/carry/carry.sim.v:11"
}
}
}
},
"CARRY0_CONST": {
"attributes": {
"blackbox": 1,
"src": "../common_slice/carry/carry0.sim.v:2"
},
"ports": {
"O": {
"direction": "output",
"bits": [ 2 ]
},
"CO_CHAIN": {
"direction": "output",
"bits": [ 3 ]
},
"CO_FABRIC": {
"direction": "output",
"bits": [ 3 ]
},
"CI_INIT": {
"direction": "input",
"bits": [ 4 ]
},
"CI": {
"direction": "input",
"bits": [ 5 ]
},
"DI": {
"direction": "input",
"bits": [ 6 ]
},
"S": {
"direction": "input",
"bits": [ 7 ]
}
},
"cells": {
"$or$../common_slice/carry/carry0.sim.v:17$46": {
"hide_name": 1,
"type": "$or",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ 4 ],
"Y": [ 8 ]
}
},
"$ternary$../common_slice/carry/carry0.sim.v:18$47": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:18"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 6 ],
"B": [ 8 ],
"S": [ 7 ],
"Y": [ 3 ]
}
},
"$xor$../common_slice/carry/carry0.sim.v:20$48": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:20"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 8 ],
"B": [ 7 ],
"Y": [ 2 ]
}
}
},
"netnames": {
"$or$../common_slice/carry/carry0.sim.v:17$46_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:17"
}
},
"$ternary$../common_slice/carry/carry0.sim.v:18$47_Y": {
"hide_name": 1,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:18"
}
},
"$xor$../common_slice/carry/carry0.sim.v:20$48_Y": {
"hide_name": 1,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:20"
}
},
"CI": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:13"
}
},
"CI_COMBINE": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:15"
}
},
"CI_INIT": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:13"
}
},
"CO_CHAIN": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_CI_INIT": "10e-12",
"DELAY_CONST_DI": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry0.sim.v:12"
}
},
"CO_FABRIC": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_CI_INIT": "10e-12",
"DELAY_CONST_DI": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry0.sim.v:12"
}
},
"DI": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:13"
}
},
"O": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"DELAY_CONST_CI": "10e-12",
"DELAY_CONST_CI_INIT": "10e-12",
"DELAY_CONST_S": "10e-12",
"src": "../common_slice/carry/carry0.sim.v:6"
}
},
"S": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/carry/carry0.sim.v:13"
}
}
}
},
"CCY0": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/Ncy0/ccy0.sim.v:8"
},
"ports": {
"O5": {
"direction": "input",
"bits": [ 2 ]
},
"CX": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Ncy0/ccy0.sim.v:17"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"CX": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/ccy0.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/ccy0.sim.v:15"
}
},
"O5": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/ccy0.sim.v:10"
}
}
}
},
"CEUSEDMUX": {
"attributes": {
"src": "../common_slice/routing/ceusedmux/ceusedmux.sim.v:3"
},
"ports": {
"IN": {
"direction": "input",
"bits": [ 2 ]
},
"OUT": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/ceusedmux/ceusedmux.sim.v:9"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ "1" ],
"I1": [ 2 ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/ceusedmux/ceusedmux.sim.v:4"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/ceusedmux/ceusedmux.sim.v:7"
}
}
}
},
"CFFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/cffmux/cffmux.sim.v:8"
},
"ports": {
"XOR": {
"direction": "input",
"bits": [ 2 ]
},
"O6": {
"direction": "input",
"bits": [ 3 ]
},
"O5": {
"direction": "input",
"bits": [ 4 ]
},
"F7": {
"direction": "input",
"bits": [ 5 ]
},
"CY": {
"direction": "input",
"bits": [ 6 ]
},
"CX": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/cffmux/cffmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"CX": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:15"
}
},
"CY": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:14"
}
},
"F7": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:13"
}
},
"O5": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:12"
}
},
"O6": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:11"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/cffmux/cffmux.sim.v:10"
}
}
}
},
"CLKINV": {
"attributes": {
"src": "../common_slice/routing/clkinv/clkinv.sim.v:3"
},
"ports": {
"CLK": {
"direction": "input",
"bits": [ 2 ]
},
"OUT": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"$not$../common_slice/routing/clkinv/clkinv.sim.v:11$51": {
"hide_name": 1,
"type": "$not",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../common_slice/routing/clkinv/clkinv.sim.v:11"
},
"port_directions": {
"A": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"Y": [ 4 ]
}
},
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/clkinv/clkinv.sim.v:9"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 4 ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"$not$../common_slice/routing/clkinv/clkinv.sim.v:11$51_Y": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/clkinv/clkinv.sim.v:11"
}
},
"CLK": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/clkinv/clkinv.sim.v:4"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/clkinv/clkinv.sim.v:7"
}
}
}
},
"CLUT": {
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:5"
},
"ports": {
"A1": {
"direction": "input",
"bits": [ 2 ]
},
"A2": {
"direction": "input",
"bits": [ 3 ]
},
"A3": {
"direction": "input",
"bits": [ 4 ]
},
"A4": {
"direction": "input",
"bits": [ 5 ]
},
"A5": {
"direction": "input",
"bits": [ 6 ]
},
"A6": {
"direction": "input",
"bits": [ 7 ]
},
"O6": {
"direction": "output",
"bits": [ "0" ]
},
"O5": {
"direction": "output",
"bits": [ "0" ]
}
},
"cells": {
},
"netnames": {
"A1": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:7"
}
},
"A2": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:8"
}
},
"A3": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:9"
}
},
"A4": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:10"
}
},
"A5": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:11"
}
},
"A6": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:12"
}
},
"O5": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:15"
}
},
"O6": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/clut.sim.v:14"
}
}
}
},
"COUTMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/coutmux/coutmux.sim.v:8"
},
"ports": {
"C5Q": {
"direction": "input",
"bits": [ 2 ]
},
"XOR": {
"direction": "input",
"bits": [ 3 ]
},
"O6": {
"direction": "input",
"bits": [ 4 ]
},
"O5": {
"direction": "input",
"bits": [ 5 ]
},
"F7": {
"direction": "input",
"bits": [ 6 ]
},
"CY": {
"direction": "input",
"bits": [ 7 ]
},
"OUT": {
"direction": "output",
"bits": [ 8 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX6",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/coutmux/coutmux.sim.v:21"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"I5": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"I5": [ 7 ],
"O": [ 8 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"C5Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:10"
}
},
"CY": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:15"
}
},
"F7": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:14"
}
},
"O5": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:13"
}
},
"O6": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:12"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:19"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/coutmux/coutmux.sim.v:11"
}
}
}
},
"COUTUSED": {
"attributes": {
"src": "../common_slice/routing/coutused/coutused.sim.v:3"
},
"ports": {
"IN": {
"direction": "input",
"bits": [ 2 ]
},
"OUT": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/coutused/coutused.sim.v:9"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ "0" ],
"I1": [ 2 ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/coutused/coutused.sim.v:4"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/coutused/coutused.sim.v:7"
}
}
}
},
"CUSED": {
"attributes": {
"src": "../common_slice/routing/Nused/cused.sim.v:3"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"O": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Nused/cused.sim.v:11"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ "0" ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Nused/cused.sim.v:5"
}
},
"O": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Nused/cused.sim.v:9"
}
}
}
},
"D5FFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/N5ffmux/d5ffmux.sim.v:9"
},
"ports": {
"IN_B": {
"direction": "input",
"bits": [ 2 ]
},
"IN_A": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/N5ffmux/d5ffmux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN_A": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/d5ffmux.sim.v:12"
}
},
"IN_B": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/d5ffmux.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/N5ffmux/d5ffmux.sim.v:16"
}
}
}
},
"DCY0": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/Ncy0/dcy0.sim.v:8"
},
"ports": {
"O5": {
"direction": "input",
"bits": [ 2 ]
},
"DX": {
"direction": "input",
"bits": [ 3 ]
},
"O": {
"direction": "output",
"bits": [ 4 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Ncy0/dcy0.sim.v:17"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 4 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"DX": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/dcy0.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/dcy0.sim.v:15"
}
},
"O5": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Ncy0/dcy0.sim.v:10"
}
}
}
},
"DFFMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/dffmux/dffmux.sim.v:8"
},
"ports": {
"XOR": {
"direction": "input",
"bits": [ 2 ]
},
"O6": {
"direction": "input",
"bits": [ 3 ]
},
"O5": {
"direction": "input",
"bits": [ 4 ]
},
"DX": {
"direction": "input",
"bits": [ 5 ]
},
"CY": {
"direction": "input",
"bits": [ 6 ]
},
"OUT": {
"direction": "output",
"bits": [ 7 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX5",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/dffmux.sim.v:20"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"O": [ 7 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"CY": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:14"
}
},
"DX": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:13"
}
},
"O5": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:12"
}
},
"O6": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:11"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:18"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/dffmux/dffmux.sim.v:10"
}
}
}
},
"DLUT": {
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:5"
},
"ports": {
"A1": {
"direction": "input",
"bits": [ 2 ]
},
"A2": {
"direction": "input",
"bits": [ 3 ]
},
"A3": {
"direction": "input",
"bits": [ 4 ]
},
"A4": {
"direction": "input",
"bits": [ 5 ]
},
"A5": {
"direction": "input",
"bits": [ 6 ]
},
"A6": {
"direction": "input",
"bits": [ 7 ]
},
"O6": {
"direction": "output",
"bits": [ "0" ]
},
"O5": {
"direction": "output",
"bits": [ "0" ]
}
},
"cells": {
},
"netnames": {
"A1": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:7"
}
},
"A2": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:8"
}
},
"A3": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:9"
}
},
"A4": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:10"
}
},
"A5": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:11"
}
},
"A6": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:12"
}
},
"O5": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:15"
}
},
"O6": {
"hide_name": 0,
"bits": [ "0" ],
"attributes": {
"src": "../common_slice/Nlut/dlut.sim.v:14"
}
}
}
},
"DOUTMUX": {
"attributes": {
"CLASS": "routing",
"blackbox": 1,
"src": "../common_slice/routing/doutmux/doutmux.sim.v:8"
},
"ports": {
"D5Q": {
"direction": "input",
"bits": [ 2 ]
},
"XOR": {
"direction": "input",
"bits": [ 3 ]
},
"O6": {
"direction": "input",
"bits": [ 4 ]
},
"O5": {
"direction": "input",
"bits": [ 5 ]
},
"CY": {
"direction": "input",
"bits": [ 6 ]
},
"OUT": {
"direction": "output",
"bits": [ 7 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX5",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/doutmux/doutmux.sim.v:20"
},
"port_directions": {
"I0": "input",
"I1": "input",
"I2": "input",
"I3": "input",
"I4": "input",
"O": "output",
"S0": "input",
"S1": "input",
"S2": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"I2": [ 4 ],
"I3": [ 5 ],
"I4": [ 6 ],
"O": [ 7 ],
"S0": [ "0" ],
"S1": [ "0" ],
"S2": [ "0" ]
}
}
},
"netnames": {
"CY": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:14"
}
},
"D5Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:10"
}
},
"O5": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:13"
}
},
"O6": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:12"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:18"
}
},
"XOR": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/doutmux/doutmux.sim.v:11"
}
}
}
},
"DUSED": {
"attributes": {
"src": "../common_slice/routing/Nused/dused.sim.v:3"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"O": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/Nused/dused.sim.v:11"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ "0" ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/Nused/dused.sim.v:5"
}
},
"O": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/Nused/dused.sim.v:9"
}
}
}
},
"F7AMUX": {
"attributes": {
"blackbox": 1,
"CLASS": "mux",
"cells_not_processed": 1,
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:9"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"S": {
"direction": "input",
"bits": [ 4 ]
},
"O": {
"direction": "output",
"bits": [ 5 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 5 ],
"S0": [ 4 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:11"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:12"
}
},
"O": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:16"
}
},
"S": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/f7amux.sim.v:14"
}
}
}
},
"F7BMUX": {
"attributes": {
"CLASS": "mux",
"blackbox": 1,
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:9"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"S": {
"direction": "input",
"bits": [ 4 ]
},
"O": {
"direction": "output",
"bits": [ 5 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 5 ],
"S0": [ 4 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:11"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:12"
}
},
"O": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:16"
}
},
"S": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/muxes/f7bmux/f7bmux.sim.v:14"
}
}
}
},
"F8MUX": {
"attributes": {
"CLASS": "mux",
"blackbox": 1,
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:9"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"S": {
"direction": "input",
"bits": [ 4 ]
},
"O": {
"direction": "output",
"bits": [ 5 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:18"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 5 ],
"S0": [ 4 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:11"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:12"
}
},
"O": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:16"
}
},
"S": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/muxes/f8mux/f8mux.sim.v:14"
}
}
}
},
"FDCE_ZINI": {
"attributes": {
"blackbox": 1,
"CLASS": "flipflop",
"cells_not_processed": 1,
"src": "../ff/fdce_zini.sim.v:2"
},
"ports": {
"Q": {
"direction": "output",
"bits": [ 2 ]
},
"C": {
"direction": "input",
"bits": [ 3 ]
},
"CE": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"CLR": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$procdff$92": {
"hide_name": 1,
"type": "$adff",
"parameters": {
"ARST_POLARITY": 1,
"ARST_VALUE": 0,
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdce_zini.sim.v:17"
},
"port_directions": {
"ARST": "input",
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"ARST": [ 6 ],
"CLK": [ 3 ],
"D": [ 7 ],
"Q": [ 2 ]
}
},
"$procmux$76": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdce_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 8 ],
"S": [ 4 ],
"Y": [ 7 ]
}
},
"$xor$../ff/fdce_zini.sim.v:17$64": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdce_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ "0" ],
"Y": [ 8 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:17"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:15"
}
},
"$procmux$76_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$procmux$77_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$xor$../ff/fdce_zini.sim.v:17$64_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:17"
}
},
"C": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:5"
}
},
"CE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:6"
}
},
"CLR": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:8"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/fdce_zini.sim.v:7"
}
},
"Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"init": 1,
"src": "../ff/fdce_zini.sim.v:3"
}
}
}
},
"FDPE_ZINI": {
"attributes": {
"blackbox": 1,
"CLASS": "flipflop",
"cells_not_processed": 1,
"src": "../ff/fdpe_zini.sim.v:2"
},
"ports": {
"Q": {
"direction": "output",
"bits": [ 2 ]
},
"C": {
"direction": "input",
"bits": [ 3 ]
},
"CE": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"PRE": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$procdff$93": {
"hide_name": 1,
"type": "$adff",
"parameters": {
"ARST_POLARITY": 1,
"ARST_VALUE": 1,
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdpe_zini.sim.v:17"
},
"port_directions": {
"ARST": "input",
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"ARST": [ 6 ],
"CLK": [ 3 ],
"D": [ 7 ],
"Q": [ 2 ]
}
},
"$procmux$78": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdpe_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 8 ],
"S": [ 4 ],
"Y": [ 7 ]
}
},
"$xor$../ff/fdpe_zini.sim.v:17$61": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdpe_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ "0" ],
"Y": [ 8 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:17"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:15"
}
},
"$procmux$78_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$procmux$79_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$xor$../ff/fdpe_zini.sim.v:17$61_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:17"
}
},
"C": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:5"
}
},
"CE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:6"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:7"
}
},
"PRE": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/fdpe_zini.sim.v:8"
}
},
"Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"init": 1,
"src": "../ff/fdpe_zini.sim.v:3"
}
}
}
},
"FDRE_ZINI": {
"attributes": {
"blackbox": 1,
"CLASS": "flipflop",
"cells_not_processed": 1,
"src": "../ff/fdre_zini.sim.v:2"
},
"ports": {
"Q": {
"direction": "output",
"bits": [ 2 ]
},
"C": {
"direction": "input",
"bits": [ 3 ]
},
"CE": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"R": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$eq$../ff/fdre_zini.sim.v:17$53": {
"hide_name": 1,
"type": "$eq",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 6 ],
"B": [ "1" ],
"Y": [ 7 ]
}
},
"$procdff$95": {
"hide_name": 1,
"type": "$dff",
"parameters": {
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
},
"port_directions": {
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"CLK": [ 3 ],
"D": [ 8 ],
"Q": [ 2 ]
}
},
"$procmux$85": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 9 ],
"S": [ 4 ],
"Y": [ 10 ]
}
},
"$procmux$88": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 10 ],
"B": [ "0" ],
"S": [ 7 ],
"Y": [ 8 ]
}
},
"$xor$../ff/fdre_zini.sim.v:17$54": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ "0" ],
"Y": [ 9 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:15"
}
},
"$eq$../ff/fdre_zini.sim.v:17$53_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
}
},
"$procmux$85_Y": {
"hide_name": 1,
"bits": [ 10 ],
"attributes": {
}
},
"$procmux$86_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$procmux$88_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
}
},
"$procmux$89_CMP": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$xor$../ff/fdre_zini.sim.v:17$54_Y": {
"hide_name": 1,
"bits": [ 9 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:17"
}
},
"C": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:5"
}
},
"CE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:6"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:7"
}
},
"Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"init": 1,
"src": "../ff/fdre_zini.sim.v:3"
}
},
"R": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/fdre_zini.sim.v:8"
}
}
}
},
"FDSE_ZINI": {
"attributes": {
"CLASS": "flipflop",
"blackbox": 1,
"src": "../ff/fdse_zini.sim.v:2"
},
"ports": {
"Q": {
"direction": "output",
"bits": [ 2 ]
},
"C": {
"direction": "input",
"bits": [ 3 ]
},
"CE": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"S": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$eq$../ff/fdse_zini.sim.v:17$57": {
"hide_name": 1,
"type": "$eq",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 6 ],
"B": [ "1" ],
"Y": [ 7 ]
}
},
"$procdff$94": {
"hide_name": 1,
"type": "$dff",
"parameters": {
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
},
"port_directions": {
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"CLK": [ 3 ],
"D": [ 8 ],
"Q": [ 2 ]
}
},
"$procmux$80": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 9 ],
"S": [ 4 ],
"Y": [ 10 ]
}
},
"$procmux$83": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 10 ],
"B": [ "1" ],
"S": [ 7 ],
"Y": [ 8 ]
}
},
"$xor$../ff/fdse_zini.sim.v:17$58": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ "0" ],
"Y": [ 9 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:15"
}
},
"$eq$../ff/fdse_zini.sim.v:17$57_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
}
},
"$procmux$80_Y": {
"hide_name": 1,
"bits": [ 10 ],
"attributes": {
}
},
"$procmux$81_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$procmux$83_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
}
},
"$procmux$84_CMP": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$xor$../ff/fdse_zini.sim.v:17$58_Y": {
"hide_name": 1,
"bits": [ 9 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:17"
}
},
"C": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:5"
}
},
"CE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:6"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:7"
}
},
"Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"init": 1,
"src": "../ff/fdse_zini.sim.v:3"
}
},
"S": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/fdse_zini.sim.v:8"
}
}
}
},
"FF_SYNC": {
"attributes": {
"MODES": "FDSE; FDRE",
"src": "../ff/ff_sync.sim.v:5"
},
"ports": {
"C": {
"direction": "input",
"bits": [ 2 ]
},
"CE": {
"direction": "input",
"bits": [ 3 ]
},
"SR": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"Q": {
"direction": "output",
"bits": [ 6 ]
}
},
"cells": {
"ff": {
"hide_name": 0,
"type": "FDSE_ZINI",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/ff_sync.sim.v:18"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"S": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 5 ],
"Q": [ 6 ],
"S": [ 4 ]
}
}
},
"netnames": {
"C": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"CLOCK": 1,
"src": "../ff/ff_sync.sim.v:7"
}
},
"CE": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/ff_sync.sim.v:8"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/ff_sync.sim.v:12"
}
},
"Q": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/ff_sync.sim.v:13"
}
},
"SR": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/ff_sync.sim.v:9"
}
}
}
},
"LDCE_ZINI": {
"attributes": {
"blackbox": 1,
"CLASS": "flipflop",
"cells_not_processed": 1,
"src": "../ff/ldce_zini.sim.v:3"
},
"ports": {
"Q": {
"direction": "output",
"bits": [ 2 ]
},
"G": {
"direction": "input",
"bits": [ 3 ]
},
"GE": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5 ]
},
"CLR": {
"direction": "input",
"bits": [ 6 ]
}
},
"cells": {
"$procdff$90": {
"hide_name": 1,
"type": "$adff",
"parameters": {
"ARST_POLARITY": 1,
"ARST_VALUE": 0,
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/ldce_zini.sim.v:18"
},
"port_directions": {
"ARST": "input",
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"ARST": [ 6 ],
"CLK": [ 3 ],
"D": [ 7 ],
"Q": [ 2 ]
}
},
"$procmux$72": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/ldce_zini.sim.v:18"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 8 ],
"S": [ 4 ],
"Y": [ 7 ]
}
},
"$xor$../ff/ldce_zini.sim.v:18$70": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/ldce_zini.sim.v:18"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 5 ],
"B": [ "0" ],
"Y": [ 8 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:18"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:16"
}
},
"$procmux$72_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$procmux$73_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$xor$../ff/ldce_zini.sim.v:18$70_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:18"
}
},
"CLR": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:9"
}
},
"D": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:8"
}
},
"G": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:6"
}
},
"GE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/ldce_zini.sim.v:7"
}
},
"Q": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"init": 1,
"src": "../ff/ldce_zini.sim.v:4"
}
}
}
},
"LDPE_ZINI": {
"attributes": {
"blackbox": 1,
"CLASS": "flipflop",
"cells_not_processed": 1,
"src": "../ff/ldpe_zini.sim.v:3"
},
"ports": {
"D": {
"direction": "input",
"bits": [ 2 ]
},
"G": {
"direction": "input",
"bits": [ 3 ]
},
"GE": {
"direction": "input",
"bits": [ 4 ]
},
"PRE": {
"direction": "input",
"bits": [ 5 ]
},
"Q": {
"direction": "output",
"bits": [ 6 ]
}
},
"cells": {
"$procdff$91": {
"hide_name": 1,
"type": "$adff",
"parameters": {
"ARST_POLARITY": 1,
"ARST_VALUE": 0,
"CLK_POLARITY": 1,
"WIDTH": 1
},
"attributes": {
"src": "../ff/ldpe_zini.sim.v:18"
},
"port_directions": {
"ARST": "input",
"CLK": "input",
"D": "input",
"Q": "output"
},
"connections": {
"ARST": [ 5 ],
"CLK": [ 3 ],
"D": [ 7 ],
"Q": [ 6 ]
}
},
"$procmux$74": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../ff/ldpe_zini.sim.v:18"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 6 ],
"B": [ 8 ],
"S": [ 4 ],
"Y": [ 7 ]
}
},
"$xor$../ff/ldpe_zini.sim.v:18$67": {
"hide_name": 1,
"type": "$xor",
"parameters": {
"A_SIGNED": 0,
"A_WIDTH": 1,
"B_SIGNED": 0,
"B_WIDTH": 1,
"Y_WIDTH": 1
},
"attributes": {
"src": "../ff/ldpe_zini.sim.v:18"
},
"port_directions": {
"A": "input",
"B": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ "0" ],
"Y": [ 8 ]
}
}
},
"netnames": {
"$0\\Q[0:0]": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:18"
}
},
"$1\\Q[0:0]": {
"hide_name": 1,
"bits": [ "1" ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:16"
}
},
"$procmux$74_Y": {
"hide_name": 1,
"bits": [ 7 ],
"attributes": {
}
},
"$procmux$75_CMP": {
"hide_name": 1,
"bits": [ 4 ],
"attributes": {
}
},
"$xor$../ff/ldpe_zini.sim.v:18$67_Y": {
"hide_name": 1,
"bits": [ 8 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:18"
}
},
"D": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:8"
}
},
"G": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:6"
}
},
"GE": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:7"
}
},
"PRE": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../ff/ldpe_zini.sim.v:9"
}
},
"Q": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"init": 1,
"src": "../ff/ldpe_zini.sim.v:4"
}
}
}
},
"MUX2": {
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:4"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"S0": {
"direction": "input",
"bits": [ 4 ]
},
"O": {
"direction": "output",
"bits": [ 5 ]
}
},
"cells": {
"$ternary$../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:10$45": {
"hide_name": 1,
"type": "$mux",
"parameters": {
"WIDTH": 1
},
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:10"
},
"port_directions": {
"A": "input",
"B": "input",
"S": "input",
"Y": "output"
},
"connections": {
"A": [ 2 ],
"B": [ 3 ],
"S": [ 4 ],
"Y": [ 5 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:5"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:6"
}
},
"O": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:8"
}
},
"S0": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/muxes/f7amux/../../../../../../vpr/muxes/logic/mux2/mux2.sim.v:7"
}
}
}
},
"MUX5": {
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:6"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"I2": {
"direction": "input",
"bits": [ 4 ]
},
"I3": {
"direction": "input",
"bits": [ 5 ]
},
"I4": {
"direction": "input",
"bits": [ 6 ]
},
"S0": {
"direction": "input",
"bits": [ 7 ]
},
"S1": {
"direction": "input",
"bits": [ 8 ]
},
"S2": {
"direction": "input",
"bits": [ 9 ]
},
"O": {
"direction": "output",
"bits": [ 10 ]
}
},
"cells": {
"mux0": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:22"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 11 ],
"S0": [ 7 ]
}
},
"mux1": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:23"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 4 ],
"I1": [ 5 ],
"O": [ 12 ],
"S0": [ 7 ]
}
},
"mux3": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:25"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 6 ],
"I1": [ 11 ],
"O": [ 13 ],
"S0": [ 8 ]
}
},
"mux4": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:26"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 6 ],
"I1": [ 12 ],
"O": [ 14 ],
"S0": [ 8 ]
}
},
"mux5": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:28"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 13 ],
"I1": [ 14 ],
"O": [ 10 ],
"S0": [ 9 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:7"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:8"
}
},
"I2": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:9"
}
},
"I3": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:10"
}
},
"I4": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:11"
}
},
"O": {
"hide_name": 0,
"bits": [ 10 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:15"
}
},
"S0": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:12"
}
},
"S1": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:13"
}
},
"S2": {
"hide_name": 0,
"bits": [ 9 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:14"
}
},
"m0": {
"hide_name": 0,
"bits": [ 11 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:17"
}
},
"m1": {
"hide_name": 0,
"bits": [ 12 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:18"
}
},
"m2": {
"hide_name": 0,
"bits": [ 13 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:19"
}
},
"m3": {
"hide_name": 0,
"bits": [ 14 ],
"attributes": {
"src": "../common_slice/routing/dffmux/../../../../../../vpr/muxes/logic/mux5/mux5.sim.v:20"
}
}
}
},
"MUX6": {
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:6"
},
"ports": {
"I0": {
"direction": "input",
"bits": [ 2 ]
},
"I1": {
"direction": "input",
"bits": [ 3 ]
},
"I2": {
"direction": "input",
"bits": [ 4 ]
},
"I3": {
"direction": "input",
"bits": [ 5 ]
},
"I4": {
"direction": "input",
"bits": [ 6 ]
},
"I5": {
"direction": "input",
"bits": [ 7 ]
},
"S0": {
"direction": "input",
"bits": [ 8 ]
},
"S1": {
"direction": "input",
"bits": [ 9 ]
},
"S2": {
"direction": "input",
"bits": [ 10 ]
},
"O": {
"direction": "output",
"bits": [ 11 ]
}
},
"cells": {
"mux0": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:24"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 2 ],
"I1": [ 3 ],
"O": [ 12 ],
"S0": [ 8 ]
}
},
"mux1": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:25"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 4 ],
"I1": [ 5 ],
"O": [ 13 ],
"S0": [ 8 ]
}
},
"mux2": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:26"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 6 ],
"I1": [ 7 ],
"O": [ 14 ],
"S0": [ 8 ]
}
},
"mux3": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:28"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 12 ],
"I1": [ 13 ],
"O": [ 15 ],
"S0": [ 9 ]
}
},
"mux4": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:29"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 13 ],
"I1": [ 14 ],
"O": [ 16 ],
"S0": [ 9 ]
}
},
"mux5": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:31"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ 15 ],
"I1": [ 16 ],
"O": [ 11 ],
"S0": [ 10 ]
}
}
},
"netnames": {
"I0": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:7"
}
},
"I1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:8"
}
},
"I2": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:9"
}
},
"I3": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:10"
}
},
"I4": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:11"
}
},
"I5": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:12"
}
},
"O": {
"hide_name": 0,
"bits": [ 11 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:16"
}
},
"S0": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:13"
}
},
"S1": {
"hide_name": 0,
"bits": [ 9 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:14"
}
},
"S2": {
"hide_name": 0,
"bits": [ 10 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:15"
}
},
"m0": {
"hide_name": 0,
"bits": [ 12 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:18"
}
},
"m1": {
"hide_name": 0,
"bits": [ 13 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:19"
}
},
"m2": {
"hide_name": 0,
"bits": [ 14 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:20"
}
},
"m3": {
"hide_name": 0,
"bits": [ 15 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:21"
}
},
"m4": {
"hide_name": 0,
"bits": [ 16 ],
"attributes": {
"src": "../common_slice/routing/affmux/../../../../../../vpr/muxes/logic/mux6/mux6.sim.v:22"
}
}
}
},
"PRECYINIT_MUX": {
"attributes": {
"blackbox": 1,
"src": "../common_slice/routing/precyinit_mux/precyinit_mux.sim.v:2"
},
"ports": {
"I": {
"direction": "input",
"bits": [ 2 ]
},
"O": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
},
"netnames": {
"I": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/precyinit_mux/precyinit_mux.sim.v:3"
}
},
"O": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/precyinit_mux/precyinit_mux.sim.v:4"
}
}
}
},
"SLICEL": {
"attributes": {
"top": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:47"
},
"ports": {
"DX": {
"direction": "input",
"bits": [ 2 ]
},
"D1": {
"direction": "input",
"bits": [ 3 ]
},
"D2": {
"direction": "input",
"bits": [ 4 ]
},
"D3": {
"direction": "input",
"bits": [ 5 ]
},
"D4": {
"direction": "input",
"bits": [ 6 ]
},
"D5": {
"direction": "input",
"bits": [ 7 ]
},
"D6": {
"direction": "input",
"bits": [ 8 ]
},
"DMUX": {
"direction": "output",
"bits": [ 9 ]
},
"D": {
"direction": "output",
"bits": [ 10 ]
},
"DQ": {
"direction": "output",
"bits": [ 11 ]
},
"CX": {
"direction": "input",
"bits": [ 12 ]
},
"C1": {
"direction": "input",
"bits": [ 13 ]
},
"C2": {
"direction": "input",
"bits": [ 14 ]
},
"C3": {
"direction": "input",
"bits": [ 15 ]
},
"C4": {
"direction": "input",
"bits": [ 16 ]
},
"C5": {
"direction": "input",
"bits": [ 17 ]
},
"C6": {
"direction": "input",
"bits": [ 18 ]
},
"CMUX": {
"direction": "output",
"bits": [ 19 ]
},
"C": {
"direction": "output",
"bits": [ 20 ]
},
"CQ": {
"direction": "output",
"bits": [ 21 ]
},
"BX": {
"direction": "input",
"bits": [ 22 ]
},
"B1": {
"direction": "input",
"bits": [ 23 ]
},
"B2": {
"direction": "input",
"bits": [ 24 ]
},
"B3": {
"direction": "input",
"bits": [ 25 ]
},
"B4": {
"direction": "input",
"bits": [ 26 ]
},
"B5": {
"direction": "input",
"bits": [ 27 ]
},
"B6": {
"direction": "input",
"bits": [ 28 ]
},
"BMUX": {
"direction": "output",
"bits": [ 29 ]
},
"B": {
"direction": "output",
"bits": [ 30 ]
},
"BQ": {
"direction": "output",
"bits": [ 31 ]
},
"AX": {
"direction": "input",
"bits": [ 32 ]
},
"A1": {
"direction": "input",
"bits": [ 33 ]
},
"A2": {
"direction": "input",
"bits": [ 34 ]
},
"A3": {
"direction": "input",
"bits": [ 35 ]
},
"A4": {
"direction": "input",
"bits": [ 36 ]
},
"A5": {
"direction": "input",
"bits": [ 37 ]
},
"A6": {
"direction": "input",
"bits": [ 38 ]
},
"AMUX": {
"direction": "output",
"bits": [ 39 ]
},
"A": {
"direction": "output",
"bits": [ 40 ]
},
"AQ": {
"direction": "output",
"bits": [ 41 ]
},
"SR": {
"direction": "input",
"bits": [ 42 ]
},
"CE": {
"direction": "input",
"bits": [ 43 ]
},
"CLK": {
"direction": "input",
"bits": [ 44 ]
},
"CIN": {
"direction": "input",
"bits": [ 45 ]
},
"COUT": {
"direction": "output",
"bits": [ 46 ]
}
},
"cells": {
"a5ffmux": {
"hide_name": 0,
"type": "A5FFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:152"
},
"port_directions": {
"IN_A": "input",
"IN_B": "input",
"O": "output"
},
"connections": {
"IN_A": [ 47 ],
"IN_B": [ 32 ],
"O": [ 48 ]
}
},
"acy0": {
"hide_name": 0,
"type": "ACY0",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:162"
},
"port_directions": {
"AX": "input",
"O": "output",
"O5": "input"
},
"connections": {
"AX": [ 32 ],
"O": [ 49 ],
"O5": [ 47 ]
}
},
"affmux": {
"hide_name": 0,
"type": "AFFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:240"
},
"port_directions": {
"AX": "input",
"CY": "input",
"F7": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"AX": [ 32 ],
"CY": [ 50 ],
"F7": [ 51 ],
"O5": [ 47 ],
"O6": [ 52 ],
"OUT": [ 53 ],
"XOR": [ 54 ]
}
},
"alut": {
"hide_name": 0,
"type": "ALUT",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:139"
},
"port_directions": {
"A1": "input",
"A2": "input",
"A3": "input",
"A4": "input",
"A5": "input",
"A6": "input",
"O5": "output",
"O6": "output"
},
"connections": {
"A1": [ 33 ],
"A2": [ 34 ],
"A3": [ 35 ],
"A4": [ 36 ],
"A5": [ 37 ],
"A6": [ 38 ],
"O5": [ 47 ],
"O6": [ 52 ]
}
},
"aoutmux": {
"hide_name": 0,
"type": "AOUTMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:222"
},
"port_directions": {
"A5Q": "input",
"CY": "input",
"F7": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"A5Q": [ 55 ],
"CY": [ 50 ],
"F7": [ 51 ],
"O5": [ 47 ],
"O6": [ 52 ],
"OUT": [ 39 ],
"XOR": [ 54 ]
}
},
"aused": {
"hide_name": 0,
"type": "AUSED",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:271"
},
"port_directions": {
"I0": "input",
"O": "output"
},
"connections": {
"I0": [ 52 ],
"O": [ 40 ]
}
},
"b5ffmux": {
"hide_name": 0,
"type": "B5FFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:153"
},
"port_directions": {
"IN_A": "input",
"IN_B": "input",
"O": "output"
},
"connections": {
"IN_A": [ 56 ],
"IN_B": [ 22 ],
"O": [ 57 ]
}
},
"bcy0": {
"hide_name": 0,
"type": "BCY0",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:163"
},
"port_directions": {
"BX": "input",
"O": "output",
"O5": "input"
},
"connections": {
"BX": [ 22 ],
"O": [ 58 ],
"O5": [ 56 ]
}
},
"bffmux": {
"hide_name": 0,
"type": "BFFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:243"
},
"port_directions": {
"BX": "input",
"CY": "input",
"F8": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"BX": [ 22 ],
"CY": [ 59 ],
"F8": [ 60 ],
"O5": [ 56 ],
"O6": [ 61 ],
"OUT": [ 62 ],
"XOR": [ 63 ]
}
},
"blut": {
"hide_name": 0,
"type": "BLUT",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:140"
},
"port_directions": {
"A1": "input",
"A2": "input",
"A3": "input",
"A4": "input",
"A5": "input",
"A6": "input",
"O5": "output",
"O6": "output"
},
"connections": {
"A1": [ 23 ],
"A2": [ 24 ],
"A3": [ 25 ],
"A4": [ 26 ],
"A5": [ 27 ],
"A6": [ 28 ],
"O5": [ 56 ],
"O6": [ 61 ]
}
},
"boutmux": {
"hide_name": 0,
"type": "BOUTMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:225"
},
"port_directions": {
"B5Q": "input",
"CY": "input",
"F8": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"B5Q": [ 64 ],
"CY": [ 59 ],
"F8": [ 60 ],
"O5": [ 56 ],
"O6": [ 61 ],
"OUT": [ 29 ],
"XOR": [ 63 ]
}
},
"bused": {
"hide_name": 0,
"type": "BUSED",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:272"
},
"port_directions": {
"I0": "input",
"O": "output"
},
"connections": {
"I0": [ 61 ],
"O": [ 30 ]
}
},
"c5ffmux": {
"hide_name": 0,
"type": "C5FFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:154"
},
"port_directions": {
"IN_A": "input",
"IN_B": "input",
"O": "output"
},
"connections": {
"IN_A": [ 65 ],
"IN_B": [ 12 ],
"O": [ 66 ]
}
},
"carry_a": {
"hide_name": 0,
"type": "CARRY0_CONST",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:181"
},
"port_directions": {
"CI": "input",
"CI_INIT": "input",
"CO_CHAIN": "output",
"CO_FABRIC": "output",
"DI": "input",
"O": "output",
"S": "input"
},
"connections": {
"CI": [ 45 ],
"CI_INIT": [ 67 ],
"CO_CHAIN": [ 68 ],
"CO_FABRIC": [ 50 ],
"DI": [ 49 ],
"O": [ 54 ],
"S": [ 52 ]
}
},
"carry_b": {
"hide_name": 0,
"type": "CARRY",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:190"
},
"port_directions": {
"CI": "input",
"CO_CHAIN": "output",
"CO_FABRIC": "output",
"DI": "input",
"O": "output",
"S": "input"
},
"connections": {
"CI": [ 68 ],
"CO_CHAIN": [ 69 ],
"CO_FABRIC": [ 59 ],
"DI": [ 58 ],
"O": [ 63 ],
"S": [ 61 ]
}
},
"carry_c": {
"hide_name": 0,
"type": "CARRY",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:198"
},
"port_directions": {
"CI": "input",
"CO_CHAIN": "output",
"CO_FABRIC": "output",
"DI": "input",
"O": "output",
"S": "input"
},
"connections": {
"CI": [ 69 ],
"CO_CHAIN": [ 70 ],
"CO_FABRIC": [ 71 ],
"DI": [ 72 ],
"O": [ 73 ],
"S": [ 74 ]
}
},
"carry_d": {
"hide_name": 0,
"type": "CARRY",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:206"
},
"port_directions": {
"CI": "input",
"CO_CHAIN": "output",
"CO_FABRIC": "output",
"DI": "input",
"O": "output",
"S": "input"
},
"connections": {
"CI": [ 70 ],
"CO_CHAIN": [ 75 ],
"CO_FABRIC": [ 76 ],
"DI": [ 77 ],
"O": [ 78 ],
"S": [ 79 ]
}
},
"ccy0": {
"hide_name": 0,
"type": "CCY0",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:164"
},
"port_directions": {
"CX": "input",
"O": "output",
"O5": "input"
},
"connections": {
"CX": [ 12 ],
"O": [ 72 ],
"O5": [ 65 ]
}
},
"ceusedmux": {
"hide_name": 0,
"type": "CEUSEDMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:258"
},
"port_directions": {
"IN": "input",
"OUT": "output"
},
"connections": {
"IN": [ 43 ],
"OUT": [ 80 ]
}
},
"cffmux": {
"hide_name": 0,
"type": "CFFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:246"
},
"port_directions": {
"CX": "input",
"CY": "input",
"F7": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"CX": [ 12 ],
"CY": [ 71 ],
"F7": [ 81 ],
"O5": [ 65 ],
"O6": [ 74 ],
"OUT": [ 82 ],
"XOR": [ 73 ]
}
},
"clkinv": {
"hide_name": 0,
"type": "CLKINV",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:257"
},
"port_directions": {
"CLK": "input",
"OUT": "output"
},
"connections": {
"CLK": [ 44 ],
"OUT": [ 83 ]
}
},
"clut": {
"hide_name": 0,
"type": "CLUT",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:141"
},
"port_directions": {
"A1": "input",
"A2": "input",
"A3": "input",
"A4": "input",
"A5": "input",
"A6": "input",
"O5": "output",
"O6": "output"
},
"connections": {
"A1": [ 13 ],
"A2": [ 14 ],
"A3": [ 15 ],
"A4": [ 16 ],
"A5": [ 17 ],
"A6": [ 18 ],
"O5": [ 65 ],
"O6": [ 74 ]
}
},
"coutmux": {
"hide_name": 0,
"type": "COUTMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:228"
},
"port_directions": {
"C5Q": "input",
"CY": "input",
"F7": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"C5Q": [ 84 ],
"CY": [ 71 ],
"F7": [ 81 ],
"O5": [ 65 ],
"O6": [ 74 ],
"OUT": [ 19 ],
"XOR": [ 73 ]
}
},
"coutused": {
"hide_name": 0,
"type": "COUTUSED",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:215"
},
"port_directions": {
"IN": "input",
"OUT": "output"
},
"connections": {
"IN": [ 75 ],
"OUT": [ 46 ]
}
},
"cused": {
"hide_name": 0,
"type": "CUSED",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:273"
},
"port_directions": {
"I0": "input",
"O": "output"
},
"connections": {
"I0": [ 74 ],
"O": [ 20 ]
}
},
"d5ffmux": {
"hide_name": 0,
"type": "D5FFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:155"
},
"port_directions": {
"IN_A": "input",
"IN_B": "input",
"O": "output"
},
"connections": {
"IN_A": [ 85 ],
"IN_B": [ 2 ],
"O": [ 86 ]
}
},
"dcy0": {
"hide_name": 0,
"type": "DCY0",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:165"
},
"port_directions": {
"DX": "input",
"O": "output",
"O5": "input"
},
"connections": {
"DX": [ 2 ],
"O": [ 77 ],
"O5": [ 85 ]
}
},
"dffmux": {
"hide_name": 0,
"type": "DFFMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:249"
},
"port_directions": {
"CY": "input",
"DX": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"CY": [ 76 ],
"DX": [ 2 ],
"O5": [ 85 ],
"O6": [ 79 ],
"OUT": [ 87 ],
"XOR": [ 78 ]
}
},
"dlut": {
"hide_name": 0,
"type": "DLUT",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:142"
},
"port_directions": {
"A1": "input",
"A2": "input",
"A3": "input",
"A4": "input",
"A5": "input",
"A6": "input",
"O5": "output",
"O6": "output"
},
"connections": {
"A1": [ 3 ],
"A2": [ 4 ],
"A3": [ 5 ],
"A4": [ 6 ],
"A5": [ 7 ],
"A6": [ 8 ],
"O5": [ 85 ],
"O6": [ 79 ]
}
},
"doutmux": {
"hide_name": 0,
"type": "DOUTMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:231"
},
"port_directions": {
"CY": "input",
"D5Q": "input",
"O5": "input",
"O6": "input",
"OUT": "output",
"XOR": "input"
},
"connections": {
"CY": [ 76 ],
"D5Q": [ 88 ],
"O5": [ 85 ],
"O6": [ 79 ],
"OUT": [ 9 ],
"XOR": [ 78 ]
}
},
"dused": {
"hide_name": 0,
"type": "DUSED",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:274"
},
"port_directions": {
"I0": "input",
"O": "output"
},
"connections": {
"I0": [ 79 ],
"O": [ 10 ]
}
},
"f7amux": {
"hide_name": 0,
"type": "F7BMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:170"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S": "input"
},
"connections": {
"I0": [ 61 ],
"I1": [ 52 ],
"O": [ 51 ],
"S": [ 32 ]
}
},
"f7bmux": {
"hide_name": 0,
"type": "F7BMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:168"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S": "input"
},
"connections": {
"I0": [ 79 ],
"I1": [ 74 ],
"O": [ 81 ],
"S": [ 12 ]
}
},
"f8mux": {
"hide_name": 0,
"type": "F8MUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:172"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S": "input"
},
"connections": {
"I0": [ 81 ],
"I1": [ 51 ],
"O": [ 60 ],
"S": [ 22 ]
}
},
"precyinit_mux": {
"hide_name": 0,
"type": "PRECYINIT_MUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:175"
},
"port_directions": {
"I": "input",
"O": "output"
},
"connections": {
"I": [ 32 ],
"O": [ 67 ]
}
},
"slice_ff": {
"hide_name": 0,
"type": "SLICE_FF",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:261"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"D5": "input",
"Q": "output",
"Q5": "output",
"SR": "input"
},
"connections": {
"C": [ 83 ],
"CE": [ 80 ],
"D": [ 87, 82, 62, 53 ],
"D5": [ 86, 66, 57, 48 ],
"Q": [ 11, 21, 31, 41 ],
"Q5": [ 88, 84, 64, 55 ],
"SR": [ 89 ]
}
},
"srusedmux": {
"hide_name": 0,
"type": "SRUSEDMUX",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:259"
},
"port_directions": {
"IN": "input",
"OUT": "output"
},
"connections": {
"IN": [ 42 ],
"OUT": [ 89 ]
}
}
},
"netnames": {
"A": {
"hide_name": 0,
"bits": [ 40 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:106"
}
},
"A1": {
"hide_name": 0,
"bits": [ 33 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:99"
}
},
"A2": {
"hide_name": 0,
"bits": [ 34 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:100"
}
},
"A3": {
"hide_name": 0,
"bits": [ 35 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:101"
}
},
"A4": {
"hide_name": 0,
"bits": [ 36 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:102"
}
},
"A5": {
"hide_name": 0,
"bits": [ 37 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:103"
}
},
"A5FFMUX_OUT": {
"hide_name": 0,
"bits": [ 48 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:147"
}
},
"A5FF_Q": {
"hide_name": 0,
"bits": [ 55 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:217"
}
},
"A5LUT_O5": {
"hide_name": 0,
"bits": [ 47 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:130"
}
},
"A6": {
"hide_name": 0,
"bits": [ 38 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:104"
}
},
"A6LUT_O6": {
"hide_name": 0,
"bits": [ 52 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:137"
}
},
"ACY0_OUT": {
"hide_name": 0,
"bits": [ 49 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:157"
}
},
"AFFMUX_OUT": {
"hide_name": 0,
"bits": [ 53 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:235"
}
},
"AMUX": {
"hide_name": 0,
"bits": [ 39 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:105"
}
},
"AQ": {
"hide_name": 0,
"bits": [ 41 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:107"
}
},
"AX": {
"hide_name": 0,
"bits": [ 32 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:98"
}
},
"B": {
"hide_name": 0,
"bits": [ 30 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:94"
}
},
"B1": {
"hide_name": 0,
"bits": [ 23 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:87"
}
},
"B2": {
"hide_name": 0,
"bits": [ 24 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:88"
}
},
"B3": {
"hide_name": 0,
"bits": [ 25 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:89"
}
},
"B4": {
"hide_name": 0,
"bits": [ 26 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:90"
}
},
"B5": {
"hide_name": 0,
"bits": [ 27 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:91"
}
},
"B5FFMUX_OUT": {
"hide_name": 0,
"bits": [ 57 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:148"
}
},
"B5FF_Q": {
"hide_name": 0,
"bits": [ 64 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:218"
}
},
"B5LUT_O5": {
"hide_name": 0,
"bits": [ 56 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:131"
}
},
"B6": {
"hide_name": 0,
"bits": [ 28 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:92"
}
},
"B6LUT_O6": {
"hide_name": 0,
"bits": [ 61 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:136"
}
},
"BCY0_OUT": {
"hide_name": 0,
"bits": [ 58 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:158"
}
},
"BFFMUX_OUT": {
"hide_name": 0,
"bits": [ 62 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:236"
}
},
"BMUX": {
"hide_name": 0,
"bits": [ 29 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:93"
}
},
"BQ": {
"hide_name": 0,
"bits": [ 31 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:95"
}
},
"BX": {
"hide_name": 0,
"bits": [ 22 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:86"
}
},
"C": {
"hide_name": 0,
"bits": [ 20 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:82"
}
},
"C1": {
"hide_name": 0,
"bits": [ 13 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:75"
}
},
"C2": {
"hide_name": 0,
"bits": [ 14 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:76"
}
},
"C3": {
"hide_name": 0,
"bits": [ 15 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:77"
}
},
"C4": {
"hide_name": 0,
"bits": [ 16 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:78"
}
},
"C5": {
"hide_name": 0,
"bits": [ 17 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:79"
}
},
"C5FFMUX_OUT": {
"hide_name": 0,
"bits": [ 66 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:149"
}
},
"C5FF_Q": {
"hide_name": 0,
"bits": [ 84 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:219"
}
},
"C5LUT_O5": {
"hide_name": 0,
"bits": [ 65 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:132"
}
},
"C6": {
"hide_name": 0,
"bits": [ 18 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:80"
}
},
"C6LUT_O6": {
"hide_name": 0,
"bits": [ 74 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:135"
}
},
"CARRY_CO_CHAIN": {
"hide_name": 0,
"bits": [ 68, 69, 70, 75 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:177"
}
},
"CARRY_CO_FABRIC": {
"hide_name": 0,
"bits": [ 50, 59, 71, 76 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:178"
}
},
"CARRY_O": {
"hide_name": 0,
"bits": [ 54, 63, 73, 78 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:179"
}
},
"CCY0_OUT": {
"hide_name": 0,
"bits": [ 72 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:159"
}
},
"CE": {
"hide_name": 0,
"bits": [ 43 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:112"
}
},
"CEUSEDMUX_OUT": {
"hide_name": 0,
"bits": [ 80 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:253"
}
},
"CFFMUX_OUT": {
"hide_name": 0,
"bits": [ 82 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:237"
}
},
"CIN": {
"hide_name": 0,
"bits": [ 45 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:126"
}
},
"CI_INIT": {
"hide_name": 0,
"bits": [ 67 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:174"
}
},
"CLK": {
"hide_name": 0,
"bits": [ 44 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:110"
}
},
"CLKINV_OUT": {
"hide_name": 0,
"bits": [ 83 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:255"
}
},
"CMUX": {
"hide_name": 0,
"bits": [ 19 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:81"
}
},
"COUT": {
"hide_name": 0,
"bits": [ 46 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:127"
}
},
"CQ": {
"hide_name": 0,
"bits": [ 21 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:83"
}
},
"CX": {
"hide_name": 0,
"bits": [ 12 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:74"
}
},
"D": {
"hide_name": 0,
"bits": [ 10 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:64"
}
},
"D1": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:57"
}
},
"D2": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:58"
}
},
"D3": {
"hide_name": 0,
"bits": [ 5 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:59"
}
},
"D4": {
"hide_name": 0,
"bits": [ 6 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:60"
}
},
"D5": {
"hide_name": 0,
"bits": [ 7 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:61"
}
},
"D5FFMUX_OUT": {
"hide_name": 0,
"bits": [ 86 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:150"
}
},
"D5FF_Q": {
"hide_name": 0,
"bits": [ 88 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:220"
}
},
"D5LUT_O5": {
"hide_name": 0,
"bits": [ 85 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:133"
}
},
"D6": {
"hide_name": 0,
"bits": [ 8 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:62"
}
},
"D6LUT_O6": {
"hide_name": 0,
"bits": [ 79 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:134"
}
},
"DCY0_OUT": {
"hide_name": 0,
"bits": [ 77 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:160"
}
},
"DFFMUX_OUT": {
"hide_name": 0,
"bits": [ 87 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:238"
}
},
"DMUX": {
"hide_name": 0,
"bits": [ 9 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:63"
}
},
"DQ": {
"hide_name": 0,
"bits": [ 11 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:65"
}
},
"DX": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:56"
}
},
"F7AMUX_OUT": {
"hide_name": 0,
"bits": [ 51 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:144"
}
},
"F7BMUX_OUT": {
"hide_name": 0,
"bits": [ 81 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:167"
}
},
"F8MUX_OUT": {
"hide_name": 0,
"bits": [ 60 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:145"
}
},
"SR": {
"hide_name": 0,
"bits": [ 42 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:111"
}
},
"SRUSEDMUX_OUT": {
"hide_name": 0,
"bits": [ 89 ],
"attributes": {
"src": "/github/SymbiFlow/symbiflow-arch-defs/build/xc7/primitives/slicel/slicel.sim.v:254"
}
}
}
},
"SLICE_FF": {
"attributes": {
"MODES": "FF_SYNC; FF_ASYNC; LATCH",
"src": "../ff/slice_ff.sim.v:6"
},
"ports": {
"C": {
"direction": "input",
"bits": [ 2 ]
},
"CE": {
"direction": "input",
"bits": [ 3 ]
},
"SR": {
"direction": "input",
"bits": [ 4 ]
},
"D": {
"direction": "input",
"bits": [ 5, 6, 7, 8 ]
},
"Q": {
"direction": "output",
"bits": [ 9, 10, 11, 12 ]
},
"D5": {
"direction": "input",
"bits": [ 13, 14, 15, 16 ]
},
"Q5": {
"direction": "output",
"bits": [ 17, 18, 19, 20 ]
}
},
"cells": {
"a5ff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:28"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 13 ],
"Q": [ 17 ],
"SR": [ 4 ]
}
},
"aff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:24"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 5 ],
"Q": [ 9 ],
"SR": [ 4 ]
}
},
"b5ff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:29"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 14 ],
"Q": [ 18 ],
"SR": [ 4 ]
}
},
"bff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:25"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 6 ],
"Q": [ 10 ],
"SR": [ 4 ]
}
},
"c5ff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:30"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 15 ],
"Q": [ 19 ],
"SR": [ 4 ]
}
},
"cff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:26"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 7 ],
"Q": [ 11 ],
"SR": [ 4 ]
}
},
"d5ff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:31"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 16 ],
"Q": [ 20 ],
"SR": [ 4 ]
}
},
"dff": {
"hide_name": 0,
"type": "FF_SYNC",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../ff/slice_ff.sim.v:27"
},
"port_directions": {
"C": "input",
"CE": "input",
"D": "input",
"Q": "output",
"SR": "input"
},
"connections": {
"C": [ 2 ],
"CE": [ 3 ],
"D": [ 8 ],
"Q": [ 12 ],
"SR": [ 4 ]
}
}
},
"netnames": {
"C": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"CLOCK": 1,
"src": "../ff/slice_ff.sim.v:9"
}
},
"CE": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:10"
}
},
"D": {
"hide_name": 0,
"bits": [ 5, 6, 7, 8 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:14"
}
},
"D5": {
"hide_name": 0,
"bits": [ 13, 14, 15, 16 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:18"
}
},
"Q": {
"hide_name": 0,
"bits": [ 9, 10, 11, 12 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:15"
}
},
"Q5": {
"hide_name": 0,
"bits": [ 17, 18, 19, 20 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:19"
}
},
"SR": {
"hide_name": 0,
"bits": [ 4 ],
"attributes": {
"src": "../ff/slice_ff.sim.v:11"
}
}
}
},
"SRUSEDMUX": {
"attributes": {
"src": "../common_slice/routing/srusedmux/srusedmux.sim.v:3"
},
"ports": {
"IN": {
"direction": "input",
"bits": [ 2 ]
},
"OUT": {
"direction": "output",
"bits": [ 3 ]
}
},
"cells": {
"mux": {
"hide_name": 0,
"type": "MUX2",
"parameters": {
},
"attributes": {
"module_not_derived": 1,
"src": "../common_slice/routing/srusedmux/srusedmux.sim.v:9"
},
"port_directions": {
"I0": "input",
"I1": "input",
"O": "output",
"S0": "input"
},
"connections": {
"I0": [ "0" ],
"I1": [ 2 ],
"O": [ 3 ],
"S0": [ "0" ]
}
}
},
"netnames": {
"IN": {
"hide_name": 0,
"bits": [ 2 ],
"attributes": {
"src": "../common_slice/routing/srusedmux/srusedmux.sim.v:4"
}
},
"OUT": {
"hide_name": 0,
"bits": [ 3 ],
"attributes": {
"src": "../common_slice/routing/srusedmux/srusedmux.sim.v:7"
}
}
}
}
}
}
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