/SymbiFlow-symbiflow-arch-defs-clean-ice40-tests-blink-build-ice40-top-routing-virt-lp8k-example.net
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| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:4f677e37c2eb41c5ca4d4ca832b1238a2cad5db9aa7f77d79414427e0b4af7d4" atom_netlist_id="SHA256:d580395e60a9d2f1fead66314d0861412355648fda2c12ab20ed041864660bb3"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$0\counter[28:0][28]" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[23] $abc$1426$n75_1 counter[22] counter[24]</port> | |
| <port name="lutff_1/in">$abc$1426$n71_1 counter[21] counter[19] counter[20]</port> | |
| <port name="lutff_2/in">open counter[25] $abc$1426$n79_1 open</port> | |
| <port name="lutff_3/in">counter[25] open $abc$1426$n79_1 counter[26]</port> | |
| <port name="lutff_4/in">counter[26] $abc$1426$n79_1 counter[25] counter[27]</port> | |
| <port name="lutff_5/in">counter[23] counter[22] $abc$1426$n75_1 counter[24]</port> | |
| <port name="lutff_6/in">counter[27] counter[25] open counter[26]</port> | |
| <port name="lutff_7/in">open counter[28] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 open</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 open BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 open BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][24]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 3 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n75_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n75_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][25]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] open BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][26]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][26]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[26]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][27]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 3 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][27]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[27]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n79_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n79_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] open BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">BLK_IG-LC5[0].O[0]->LCCO5</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">open</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n83_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n83_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][28]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][28]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[28]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[5].LCOUT[0]->LCCI5</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC5[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n71_1" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[13] $abc$1426$n61_1 counter[14] open</port> | |
| <port name="lutff_1/in">counter[15] counter[14] $abc$1426$n61_1 counter[13]</port> | |
| <port name="lutff_2/in">$abc$1426$n62_1 counter[11] counter[12] counter[10]</port> | |
| <port name="lutff_3/in">open $abc$1426$n67_1 counter[16] open</port> | |
| <port name="lutff_4/in">counter[16] open $abc$1426$n67_1 counter[17]</port> | |
| <port name="lutff_5/in">counter[17] counter[16] $abc$1426$n67_1 counter[18]</port> | |
| <port name="lutff_6/in">counter[15] $abc$1426$n61_1 counter[14] counter[13]</port> | |
| <port name="lutff_7/in">counter[17] counter[16] open counter[18]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 open BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][14]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">1 2 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][15]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 1 3 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n61_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n61_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][16]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] open BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][17]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][18]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n67_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 1 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n67_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] open BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n71_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n71_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open counter[0] counter[1] open</port> | |
| <port name="lutff_1/in">counter[2] open counter[0] counter[1]</port> | |
| <port name="lutff_2/in">counter[2] counter[1] counter[0] counter[3]</port> | |
| <port name="lutff_3/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_4/in">open counter[4] open open</port> | |
| <port name="lutff_5/in">counter[5] open $abc$1426$n64 counter[4]</port> | |
| <port name="lutff_6/in">counter[5] counter[4] $abc$1426$n64 counter[6]</port> | |
| <port name="lutff_7/in">counter[6] counter[4] $abc$1426$n64 counter[5]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 open BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 open open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][1]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] open BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][2]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][3]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n64" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n64</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][4]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][4]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][4]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][4]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][4]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[4]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][5]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][6]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n63</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n62_1" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">$abc$1426$n61_1 open counter[13] open</port> | |
| <port name="lutff_1/in">counter[10] counter[11] counter[12] $abc$1426$n62_1</port> | |
| <port name="lutff_2/in">open counter[11] $abc$1426$n62_1 counter[10]</port> | |
| <port name="lutff_3/in">open open $abc$1426$n62_1 counter[10]</port> | |
| <port name="lutff_4/in">open counter[7] $abc$1426$n63 open</port> | |
| <port name="lutff_5/in">counter[7] open $abc$1426$n63 counter[8]</port> | |
| <port name="lutff_6/in">counter[8] counter[7] $abc$1426$n63 counter[9]</port> | |
| <port name="lutff_7/in">counter[8] counter[7] $abc$1426$n63 counter[9]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">open open BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] open BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][13]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">1 open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][12]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][11]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][10]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][7]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][8]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][9]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n62_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][22]" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open counter[19] $abc$1426$n71_1 open</port> | |
| <port name="lutff_4/in">open $abc$1426$n71_1 counter[19] counter[20]</port> | |
| <port name="lutff_5/in">counter[20] counter[19] $abc$1426$n71_1 counter[21]</port> | |
| <port name="lutff_6/in">open $abc$1426$n75_1 counter[23] counter[22]</port> | |
| <port name="lutff_7/in">open $abc$1426$n75_1 counter[22] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="$0\counter[28:0][19]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][19]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][19]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][19]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][19]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[19]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][20]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 2 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][21]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][23]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 2 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][0]" instance="BLK_TL-PLB[5]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">open counter[0] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open open open open</port> | |
| <port name="I4">open open open open</port> | |
| <port name="I5">open open open open</port> | |
| <port name="I6">open open open open</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">open</port> | |
| <port name="O4">open</port> | |
| <port name="O5">open</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[3]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[4]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[5]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[6]" /> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][0]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">open 0 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="out:LED2" instance="BLK_TL-PIO[6]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[3] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED2" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED2" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED5" instance="BLK_TL-PIO[7]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[0] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED5" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED5" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED4" instance="BLK_TL-PIO[8]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[1] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED4" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED4" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED3" instance="BLK_TL-PIO[9]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[2] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED3" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED3" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_TL-PLB[10]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">counter[25] open open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open open open open</port> | |
| <port name="I4">open open open open</port> | |
| <port name="I5">open open open open</port> | |
| <port name="I6">open open open open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 open open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">open</port> | |
| <port name="O4">open</port> | |
| <port name="O5">open</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[3]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[4]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[5]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[6]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BLK_TL-PLB[11]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">counter[26] open open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open open open open</port> | |
| <port name="I4">open open open open</port> | |
| <port name="I5">open open open open</port> | |
| <port name="I6">open open open open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 open open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">open</port> | |
| <port name="O4">open</port> | |
| <port name="O5">open</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[3]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[4]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[5]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[6]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_TL-PLB[12]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">counter[28] open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">counter[27] open open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open open open open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 open open open</port> | |
| <port name="I5">open open open open</port> | |
| <port name="I6">open open open open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 open open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">open</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">open</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[3]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[5]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[6]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="clk" instance="BLK_TL-PIO[13]" mode="PAD_IS_INPUT"> | |
| <inputs> | |
| <port name="D_OUT">open open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">PAD[0].D_IN[0]->BLK_TL-PIO-D_IN[0] open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="clk" instance="PAD[0]" mode="default"> | |
| <inputs /> | |
| <outputs> | |
| <port name="D_IN">input[0].inpad[0]->PAD-D_IN[0] open</port> | |
| <port name="PIN">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="clk" instance="input[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs /> | |
| <outputs> | |
| <port name="inpad">clk</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| </block> |
| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:4f677e37c2eb41c5ca4d4ca832b1238a2cad5db9aa7f77d79414427e0b4af7d4" atom_netlist_id="SHA256:d580395e60a9d2f1fead66314d0861412355648fda2c12ab20ed041864660bb3"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$0\counter[28:0][28]" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[23] $abc$1426$n75_1 counter[22] counter[24]</port> | |
| <port name="lutff_1/in">$abc$1426$n71_1 counter[21] counter[19] counter[20]</port> | |
| <port name="lutff_2/in">open counter[25] $abc$1426$n79_1 open</port> | |
| <port name="lutff_3/in">counter[25] open $abc$1426$n79_1 counter[26]</port> | |
| <port name="lutff_4/in">counter[26] $abc$1426$n79_1 counter[25] counter[27]</port> | |
| <port name="lutff_5/in">counter[23] counter[22] $abc$1426$n75_1 counter[24]</port> | |
| <port name="lutff_6/in">counter[27] counter[25] open counter[26]</port> | |
| <port name="lutff_7/in">open counter[28] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 open</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 open BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 open BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][24]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 3 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n75_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n75_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][25]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] open BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][26]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][26]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[26]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][27]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 3 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][27]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[27]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n79_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n79_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] open BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">BLK_IG-LC5[0].O[0]->LCCO5</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">open</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n83_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n83_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][28]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][28]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[28]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[5].LCOUT[0]->LCCI5</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC5[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n71_1" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[13] $abc$1426$n61_1 counter[14] open</port> | |
| <port name="lutff_1/in">counter[15] counter[14] $abc$1426$n61_1 counter[13]</port> | |
| <port name="lutff_2/in">$abc$1426$n62_1 counter[11] counter[12] counter[10]</port> | |
| <port name="lutff_3/in">open $abc$1426$n67_1 counter[16] open</port> | |
| <port name="lutff_4/in">counter[16] open $abc$1426$n67_1 counter[17]</port> | |
| <port name="lutff_5/in">counter[17] counter[16] $abc$1426$n67_1 counter[18]</port> | |
| <port name="lutff_6/in">counter[15] $abc$1426$n61_1 counter[14] counter[13]</port> | |
| <port name="lutff_7/in">counter[17] counter[16] open counter[18]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 open BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][14]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">1 2 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][15]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 1 3 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n61_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n61_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][16]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] open BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][17]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][18]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n67_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 1 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n67_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] open BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n71_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n71_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open counter[0] counter[1] open</port> | |
| <port name="lutff_1/in">counter[2] open counter[0] counter[1]</port> | |
| <port name="lutff_2/in">counter[2] counter[1] counter[0] counter[3]</port> | |
| <port name="lutff_3/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_4/in">open counter[4] open open</port> | |
| <port name="lutff_5/in">counter[5] open $abc$1426$n64 counter[4]</port> | |
| <port name="lutff_6/in">counter[5] counter[4] $abc$1426$n64 counter[6]</port> | |
| <port name="lutff_7/in">counter[6] counter[4] $abc$1426$n64 counter[5]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 open BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 open open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][1]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] open BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][2]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][3]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n64" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n64</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][4]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][4]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][4]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][4]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][4]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[4]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][5]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][6]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n63</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n62_1" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">$abc$1426$n61_1 open counter[13] open</port> | |
| <port name="lutff_1/in">counter[10] counter[11] counter[12] $abc$1426$n62_1</port> | |
| <port name="lutff_2/in">open counter[11] $abc$1426$n62_1 counter[10]</port> | |
| <port name="lutff_3/in">open open $abc$1426$n62_1 counter[10]</port> | |
| <port name="lutff_4/in">open counter[7] $abc$1426$n63 open</port> | |
| <port name="lutff_5/in">counter[7] open $abc$1426$n63 counter[8]</port> | |
| <port name="lutff_6/in">counter[8] counter[7] $abc$1426$n63 counter[9]</port> | |
| <port name="lutff_7/in">counter[8] counter[7] $abc$1426$n63 counter[9]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">open open BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] open BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][13]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">1 open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][12]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][11]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 0 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][10]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][7]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][8]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][9]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n62_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][22]" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open counter[26]</port> | |
| <port name="lutff_1/in">counter[25] open open open</port> | |
| <port name="lutff_2/in">open open counter[0] open</port> | |
| <port name="lutff_3/in">open $abc$1426$n71_1 counter[19] open</port> | |
| <port name="lutff_4/in">open $abc$1426$n71_1 counter[19] counter[20]</port> | |
| <port name="lutff_5/in">counter[21] counter[19] $abc$1426$n71_1 counter[20]</port> | |
| <port name="lutff_6/in">$abc$1426$n75_1 counter[22] counter[23] open</port> | |
| <port name="lutff_7/in">open counter[22] $abc$1426$n75_1 open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 open open open</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 open</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 open</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open open open BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][0]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][19]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][19]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][19]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][19]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][19]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[19]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][20]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 2 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][21]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][23]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">2 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="out:LED2" instance="BLK_TL-PIO[5]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[3] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED2" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED2" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED5" instance="BLK_TL-PIO[6]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[0] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED5" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED5" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED4" instance="BLK_TL-PIO[7]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[1] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED4" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED4" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED3" instance="BLK_TL-PIO[8]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[2] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED3" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED3" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_TL-PLB[9]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">counter[27] open open open</port> | |
| <port name="lutff_5/in">open open open counter[28]</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">open open open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">open</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open open open</port> | |
| <port name="I3">open open open open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 open open open</port> | |
| <port name="I5">open open open BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">open open open open</port> | |
| <port name="I7">open open open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">open</port> | |
| <port name="O3">open</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">open</port> | |
| <port name="O7">open</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-MODE_CLK[0]" mode="BLK_IG-PCLK" pb_type_num_modes="8"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </inputs> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-BUF[0].O[0]->BLK_IG-MODE_CLK-PCLK</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-BUF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-MODE_CLK.I[0]->BLK_IG-BUF-I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-BUF[0].I[0]->BLK_IG-BUF-O</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[2]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[3]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] open open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[0]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open open open BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-MODE_CLK[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-LUTFF.PCLK[0]->FF.PCLK</port> | |
| <port name="NCLK">open</port> | |
| <port name="PCLK+CEN">open</port> | |
| <port name="NCLK+CEN">open</port> | |
| <port name="PCLK+SR">open</port> | |
| <port name="NCLK+SR">open</port> | |
| <port name="PCLK+CEN+SR">open</port> | |
| <port name="NCLK+CEN+SR">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.PCLK[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUTFF[6]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[7]" /> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| </block> | |
| </block> | |
| <block name="clk" instance="BLK_TL-PIO[10]" mode="PAD_IS_INPUT"> | |
| <inputs> | |
| <port name="D_OUT">open open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">PAD[0].D_IN[0]->BLK_TL-PIO-D_IN[0] open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="clk" instance="PAD[0]" mode="default"> | |
| <inputs /> | |
| <outputs> | |
| <port name="D_IN">input[0].inpad[0]->PAD-D_IN[0] open</port> | |
| <port name="PIN">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="clk" instance="input[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs /> | |
| <outputs> | |
| <port name="inpad">clk</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| </block> |
| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:4f8ba12e7f437e3fd3c902dccc5c82902789e94c772107e9e805a6a282142461" atom_netlist_id="SHA256:6e24b4cccb5650fc5bbfbc4c8a8240daddcba45d14bc4816a1f0192498d709cc"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$0\counter[25:0][15]" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open counter[10] $abc$1289$n56_1 open</port> | |
| <port name="lutff_1/in">open counter[10] $abc$1289$n56_1 counter[11]</port> | |
| <port name="lutff_2/in">counter[12] $abc$1289$n56_1 counter[10] counter[11]</port> | |
| <port name="lutff_3/in">counter[12] counter[10] $abc$1289$n56_1 counter[11]</port> | |
| <port name="lutff_4/in">counter[15] counter[14] open counter[13]</port> | |
| <port name="lutff_5/in">open counter[13] $abc$1289$n55 open</port> | |
| <port name="lutff_6/in">counter[14] open $abc$1289$n55 counter[13]</port> | |
| <port name="lutff_7/in">counter[15] counter[14] $abc$1289$n55 counter[13]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">open BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->lutff_4/in BLK_TL-PLB.lutff_4/in[1]->lutff_4/in open BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->lutff_5/in BLK_TL-PLB.lutff_5/in[2]->lutff_5/in open</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in open BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][10]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][11]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][11]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][12]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][12]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n55" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n55" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n55" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n55" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n55</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n60_1" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] open BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n60_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n60_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n60_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n60_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][13]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][13]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] open BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][14]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][15]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n56_1" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $abc$1289$n58 counter[4] open</port> | |
| <port name="lutff_1/in">open counter[4] $abc$1289$n58 counter[5]</port> | |
| <port name="lutff_2/in">counter[5] counter[4] $abc$1289$n58 counter[6]</port> | |
| <port name="lutff_3/in">counter[5] counter[4] $abc$1289$n58 counter[6]</port> | |
| <port name="lutff_4/in">open counter[7] open open</port> | |
| <port name="lutff_5/in">open counter[7] $abc$1289$n57_1 counter[8]</port> | |
| <port name="lutff_6/in">counter[9] counter[7] $abc$1289$n57_1 counter[8]</port> | |
| <port name="lutff_7/in">counter[8] counter[7] $abc$1289$n57_1 counter[9]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">open BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->lutff_4/in open open</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->lutff_5/in BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][4]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][4]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][4]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][4]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[4]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][5]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][5]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][6]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][6]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n57_1" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n57_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n57_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n57_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n57_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][7]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][7]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][8]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][8]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][9]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][9]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n56_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n56_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n56_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n58" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $abc$1289$n60_1 counter[16] open</port> | |
| <port name="lutff_1/in">counter[16] $abc$1289$n60_1 open counter[17]</port> | |
| <port name="lutff_2/in">open open counter[0] open</port> | |
| <port name="lutff_3/in">counter[18] $abc$1289$n60_1 counter[16] counter[17]</port> | |
| <port name="lutff_4/in">open counter[0] counter[1] open</port> | |
| <port name="lutff_5/in">counter[1] open counter[0] counter[2]</port> | |
| <port name="lutff_6/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_7/in">counter[2] counter[1] counter[0] counter[3]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n58" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->lutff_1/in BLK_TL-PLB.lutff_1/in[1]->lutff_1/in open BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->lutff_2/in open</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->lutff_4/in BLK_TL-PLB.lutff_4/in[2]->lutff_4/in open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->lutff_5/in open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][16]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][16]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] open BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][17]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][17]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I open BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 open 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][0]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][0]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][18]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][18]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][1]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][1]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][2]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][2]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][3]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][3]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n58" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n58" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n58" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n58" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n58</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n64_1" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">$abc$1289$n68_1 counter[22] counter[23] counter[24]</port> | |
| <port name="lutff_1/in">$abc$1289$n68_1 counter[22] counter[23] open</port> | |
| <port name="lutff_2/in">counter[19] counter[20] counter[21] $abc$1289$n64_1</port> | |
| <port name="lutff_3/in">open $abc$1289$n68_1 counter[22] open</port> | |
| <port name="lutff_4/in">counter[19] counter[21] counter[20] $abc$1289$n64_1</port> | |
| <port name="lutff_5/in">counter[19] open $abc$1289$n64_1 counter[20]</port> | |
| <port name="lutff_6/in">counter[19] $abc$1289$n64_1 open open</port> | |
| <port name="lutff_7/in">$abc$1289$n60_1 counter[16] counter[18] counter[17]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->lutff_0/in BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in BLK_TL-PLB.lutff_0/in[3]->lutff_0/in</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->lutff_1/in BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in open</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->lutff_4/in BLK_TL-PLB.lutff_4/in[1]->lutff_4/in BLK_TL-PLB.lutff_4/in[2]->lutff_4/in BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->lutff_5/in open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in open open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n72_1" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n72_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n72_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n72_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 2 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n72_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][23]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][23]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][23]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">2 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][21]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][21]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][22]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][22]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n68_1" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n68_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n68_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n68_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 1 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n68_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][20]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][20]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][20]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][19]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][19]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][19]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][19]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">0 1 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][19]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[19]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n64_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n64_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 2 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n64_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][24]" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open counter[23] open</port> | |
| <port name="lutff_3/in">open open counter[25] open</port> | |
| <port name="lutff_4/in">open open open $abc$1289$n72_1</port> | |
| <port name="lutff_5/in">open open counter[22] open</port> | |
| <port name="lutff_6/in">open open counter[24] open</port> | |
| <port name="lutff_7/in">counter[24] counter[23] counter[22] $abc$1289$n68_1</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->lutff_2/in open</port> | |
| <port name="I3">open open BLK_TL-PLB.lutff_3/in[2]->lutff_3/in open</port> | |
| <port name="I4">open open open BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">open open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in open</port> | |
| <port name="I6">open open BLK_TL-PLB.lutff_6/in[2]->lutff_6/in open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][25]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open open open BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][25]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][25]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I5[2]->I5[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I6[2]->I6[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][24]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 1 2 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED2" instance="BLK_TL-PIO[5]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[3] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED2" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED2" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED3" instance="BLK_TL-PIO[6]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[2] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED3" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED3" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED4" instance="BLK_TL-PIO[7]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[1] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED4" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED4" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED5" instance="BLK_TL-PIO[8]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[0] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED5" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED5" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="clk" instance="BLK_TL-PIO[9]" mode="PAD_IS_INPUT"> | |
| <inputs> | |
| <port name="D_OUT">open open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">PAD[0].D_IN[0]->D_IN[0] open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="clk" instance="PAD[0]" mode="default"> | |
| <inputs /> | |
| <outputs> | |
| <port name="D_IN">input[0].inpad[0]->D_IN[0] open</port> | |
| <port name="PIN">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="clk" instance="input[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs /> | |
| <outputs> | |
| <port name="inpad">clk</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| </block> |
| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:72f42a53a2b9194fa00a4afaabe737b928e1515e884bbdd3f5e4ab71aa8d6b79" atom_netlist_id="SHA256:6e24b4cccb5650fc5bbfbc4c8a8240daddcba45d14bc4816a1f0192498d709cc"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$0\counter[25:0][15]" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open counter[10] $abc$1289$n56_1 open</port> | |
| <port name="lutff_1/in">open counter[10] $abc$1289$n56_1 counter[11]</port> | |
| <port name="lutff_2/in">counter[12] $abc$1289$n56_1 counter[10] counter[11]</port> | |
| <port name="lutff_3/in">counter[12] counter[10] $abc$1289$n56_1 counter[11]</port> | |
| <port name="lutff_4/in">counter[15] counter[14] open counter[13]</port> | |
| <port name="lutff_5/in">open counter[13] $abc$1289$n55 open</port> | |
| <port name="lutff_6/in">counter[14] open $abc$1289$n55 counter[13]</port> | |
| <port name="lutff_7/in">counter[15] counter[14] $abc$1289$n55 counter[13]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">open BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->lutff_4/in BLK_TL-PLB.lutff_4/in[1]->lutff_4/in open BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->lutff_5/in BLK_TL-PLB.lutff_5/in[2]->lutff_5/in open</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in open BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][10]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][11]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][11]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][12]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][12]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n55" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n55" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n55" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n55" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n55</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n60_1" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] open BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n60_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n60_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n60_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n60_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][13]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][13]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] open BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][14]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][15]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][15]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n56_1" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $abc$1289$n58 counter[4] open</port> | |
| <port name="lutff_1/in">open counter[4] $abc$1289$n58 counter[5]</port> | |
| <port name="lutff_2/in">counter[5] counter[4] $abc$1289$n58 counter[6]</port> | |
| <port name="lutff_3/in">counter[5] counter[4] $abc$1289$n58 counter[6]</port> | |
| <port name="lutff_4/in">open counter[7] open open</port> | |
| <port name="lutff_5/in">open counter[7] $abc$1289$n57_1 counter[8]</port> | |
| <port name="lutff_6/in">counter[9] counter[7] $abc$1289$n57_1 counter[8]</port> | |
| <port name="lutff_7/in">counter[8] counter[7] $abc$1289$n57_1 counter[9]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">open BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->lutff_4/in open open</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->lutff_5/in BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][4]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][4]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][4]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][4]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[4]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][5]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][5]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][6]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][6]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n57_1" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n57_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n57_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n57_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n57_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][7]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][7]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][8]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][8]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][9]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][9]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n56_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n56_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n56_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n56_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n58" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $abc$1289$n60_1 counter[16] open</port> | |
| <port name="lutff_1/in">counter[16] $abc$1289$n60_1 open counter[17]</port> | |
| <port name="lutff_2/in">open open counter[0] open</port> | |
| <port name="lutff_3/in">counter[18] $abc$1289$n60_1 counter[16] counter[17]</port> | |
| <port name="lutff_4/in">open counter[0] counter[1] open</port> | |
| <port name="lutff_5/in">counter[1] open counter[0] counter[2]</port> | |
| <port name="lutff_6/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_7/in">counter[2] counter[1] counter[0] counter[3]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n58" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->lutff_1/in BLK_TL-PLB.lutff_1/in[1]->lutff_1/in open BLK_TL-PLB.lutff_1/in[3]->lutff_1/in</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->lutff_2/in open</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->lutff_3/in BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in BLK_TL-PLB.lutff_3/in[3]->lutff_3/in</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->lutff_4/in BLK_TL-PLB.lutff_4/in[2]->lutff_4/in open</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->lutff_5/in open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in BLK_TL-PLB.lutff_6/in[2]->lutff_6/in BLK_TL-PLB.lutff_6/in[3]->lutff_6/in</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][16]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][16]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] open BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][17]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][17]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I open BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 open 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][0]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][0]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][18]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][18]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][1]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][1]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][2]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][2]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][3]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][3]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n58" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n58" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n58" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n58" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n58</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1289$n64_1" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">$abc$1289$n68_1 counter[22] counter[23] counter[24]</port> | |
| <port name="lutff_1/in">$abc$1289$n68_1 counter[22] counter[23] open</port> | |
| <port name="lutff_2/in">counter[19] counter[20] counter[21] $abc$1289$n64_1</port> | |
| <port name="lutff_3/in">open $abc$1289$n68_1 counter[22] open</port> | |
| <port name="lutff_4/in">counter[19] counter[21] counter[20] $abc$1289$n64_1</port> | |
| <port name="lutff_5/in">counter[19] open $abc$1289$n64_1 counter[20]</port> | |
| <port name="lutff_6/in">counter[19] $abc$1289$n64_1 open open</port> | |
| <port name="lutff_7/in">$abc$1289$n60_1 counter[16] counter[18] counter[17]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->lutff_0/in BLK_TL-PLB.lutff_0/in[1]->lutff_0/in BLK_TL-PLB.lutff_0/in[2]->lutff_0/in BLK_TL-PLB.lutff_0/in[3]->lutff_0/in</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->lutff_1/in BLK_TL-PLB.lutff_1/in[1]->lutff_1/in BLK_TL-PLB.lutff_1/in[2]->lutff_1/in open</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->lutff_2/in BLK_TL-PLB.lutff_2/in[1]->lutff_2/in BLK_TL-PLB.lutff_2/in[2]->lutff_2/in BLK_TL-PLB.lutff_2/in[3]->lutff_2/in</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->lutff_3/in BLK_TL-PLB.lutff_3/in[2]->lutff_3/in open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->lutff_4/in BLK_TL-PLB.lutff_4/in[1]->lutff_4/in BLK_TL-PLB.lutff_4/in[2]->lutff_4/in BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->lutff_5/in open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in BLK_TL-PLB.lutff_5/in[3]->lutff_5/in</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->lutff_6/in BLK_TL-PLB.lutff_6/in[1]->lutff_6/in open open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="$abc$1289$n72_1" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n72_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n72_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n72_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 2 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n72_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][23]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][23]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][23]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">2 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][21]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][21]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][22]" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][22]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n68_1" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n68_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n68_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n68_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 1 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n68_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][20]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][20]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][20]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][19]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][19]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][19]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][19]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">0 1 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][19]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[19]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1289$n64_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n64_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1289$n64_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 2 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1289$n64_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$0\counter[25:0][24]" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open counter[23] open</port> | |
| <port name="lutff_3/in">open open counter[25] open</port> | |
| <port name="lutff_4/in">open open open $abc$1289$n72_1</port> | |
| <port name="lutff_5/in">open open counter[22] open</port> | |
| <port name="lutff_6/in">open open counter[24] open</port> | |
| <port name="lutff_7/in">counter[24] counter[23] counter[22] $abc$1289$n68_1</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open open open open</port> | |
| <port name="I1">open open open open</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->lutff_2/in open</port> | |
| <port name="I3">open open BLK_TL-PLB.lutff_3/in[2]->lutff_3/in open</port> | |
| <port name="I4">open open open BLK_TL-PLB.lutff_4/in[3]->lutff_4/in</port> | |
| <port name="I5">open open BLK_TL-PLB.lutff_5/in[2]->lutff_5/in open</port> | |
| <port name="I6">open open BLK_TL-PLB.lutff_6/in[2]->lutff_6/in open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->lutff_7/in BLK_TL-PLB.lutff_7/in[1]->lutff_7/in BLK_TL-PLB.lutff_7/in[2]->lutff_7/in BLK_TL-PLB.lutff_7/in[3]->lutff_7/in</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">open</port> | |
| <port name="O1">open</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->lutff_global/clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUTFF[0]" /> | |
| <block name="open" instance="BLK_IG-LUTFF[1]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][25]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open open open BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][25]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][25]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I5[2]->I5[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I6[2]->I6[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->I open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[25:0][24]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->O</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][24]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->I BEL_LT-LUT.in[1]->I BEL_LT-LUT.in[2]->I BEL_LT-LUT.in[3]->I</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[25:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 1 2 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[25:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs-clean/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED2" instance="BLK_TL-PIO[5]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[3] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED2" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED2" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED3" instance="BLK_TL-PIO[6]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[2] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED3" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED3" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED4" instance="BLK_TL-PIO[7]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[1] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED4" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED4" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED5" instance="BLK_TL-PIO[8]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[0] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED5" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED5" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="clk" instance="BLK_TL-PIO[9]" mode="PAD_IS_INPUT"> | |
| <inputs> | |
| <port name="D_OUT">open open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">PAD[0].D_IN[0]->D_IN[0] open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="clk" instance="PAD[0]" mode="default"> | |
| <inputs /> | |
| <outputs> | |
| <port name="D_IN">input[0].inpad[0]->D_IN[0] open</port> | |
| <port name="PIN">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="clk" instance="input[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs /> | |
| <outputs> | |
| <port name="inpad">clk</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| </block> |
| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:450b28bc2bd4e94e88873c151ec5bebbed5f01805002b6bcb380c65b39ce21dd" atom_netlist_id="SHA256:f0f8f0886742d71ea1e602f4eb023be8860bac1815bc650faefa46d3c0490c03"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[22].carry" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[22] $abc$818$n54</port> | |
| <port name="lutff_1/in">open $false counter[23] open</port> | |
| <port name="lutff_2/in">open $false counter[24] open</port> | |
| <port name="lutff_3/in">open $false counter[25] open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open counter[25] $abc$818$n66 open</port> | |
| <port name="lutff_6/in">open $abc$818$n62 counter[24] open</port> | |
| <port name="lutff_7/in">open $abc$818$n58 counter[23] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-LUT4[4].out[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] BLK_TL-PLB.lutff_0/in[3]->BLK_IG-LUT4[0]-in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[4]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[3].CO[0]->BLK_IG-LUT4[4].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[4].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUT4[5]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] BLK_TL-PLB.lutff_5/in[2]->BLK_IG-LUT4[5].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[22].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n58</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[23].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n62</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[24].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n66</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[25].carry" instance="SB_CARRY[3]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_3/in[2]->SB_CARRY[3]-I1</port> | |
| <port name="CI">SB_CARRY[2].CO[0]->SB_CARRY[3]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_3/in[1]->SB_CARRY[3]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n70</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[10].carry" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[10] $abc$818$n6</port> | |
| <port name="lutff_1/in">open $false counter[11] open</port> | |
| <port name="lutff_2/in">open $false counter[12] open</port> | |
| <port name="lutff_3/in">open $false counter[13] open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open counter[13] $abc$818$n18 open</port> | |
| <port name="lutff_6/in">open $abc$818$n14 counter[12] open</port> | |
| <port name="lutff_7/in">open $abc$818$n10 counter[11] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-LUT4[4].out[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] BLK_TL-PLB.lutff_0/in[3]->BLK_IG-LUT4[0]-in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[4]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[3].CO[0]->BLK_IG-LUT4[4].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[4].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUT4[5]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] BLK_TL-PLB.lutff_5/in[2]->BLK_IG-LUT4[5].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[10].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n10</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[11].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n14</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[12].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n18</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[13].carry" instance="SB_CARRY[3]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_3/in[2]->SB_CARRY[3]-I1</port> | |
| <port name="CI">SB_CARRY[2].CO[0]->SB_CARRY[3]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_3/in[1]->SB_CARRY[3]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n22</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[14].carry" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[14] $abc$818$n22</port> | |
| <port name="lutff_1/in">open $false counter[15] open</port> | |
| <port name="lutff_2/in">open $false counter[16] open</port> | |
| <port name="lutff_3/in">open $false counter[17] open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open counter[17] $abc$818$n34 open</port> | |
| <port name="lutff_6/in">open $abc$818$n30 counter[16] open</port> | |
| <port name="lutff_7/in">open $abc$818$n26 counter[15] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-LUT4[4].out[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] BLK_TL-PLB.lutff_0/in[3]->BLK_IG-LUT4[0]-in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[4]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[3].CO[0]->BLK_IG-LUT4[4].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[4].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUT4[5]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] BLK_TL-PLB.lutff_5/in[2]->BLK_IG-LUT4[5].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[14].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n26</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[15].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n30</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[16].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n34</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[17].carry" instance="SB_CARRY[3]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_3/in[2]->SB_CARRY[3]-I1</port> | |
| <port name="CI">SB_CARRY[2].CO[0]->SB_CARRY[3]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_3/in[1]->SB_CARRY[3]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n38</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[18].carry" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[18] $abc$818$n38</port> | |
| <port name="lutff_1/in">open $false counter[19] open</port> | |
| <port name="lutff_2/in">open $false counter[20] open</port> | |
| <port name="lutff_3/in">open $false counter[21] open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open counter[21] $abc$818$n50 open</port> | |
| <port name="lutff_6/in">open $abc$818$n46 counter[20] open</port> | |
| <port name="lutff_7/in">open $abc$818$n42 counter[19] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-LUT4[4].out[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] BLK_TL-PLB.lutff_0/in[3]->BLK_IG-LUT4[0]-in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[4]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[3].CO[0]->BLK_IG-LUT4[4].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[4].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUT4[5]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] BLK_TL-PLB.lutff_5/in[2]->BLK_IG-LUT4[5].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][19]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][19]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][19]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[19]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[18].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n42</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[19].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n46</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[20].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n50</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[21].carry" instance="SB_CARRY[3]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_3/in[2]->SB_CARRY[3]-I1</port> | |
| <port name="CI">SB_CARRY[2].CO[0]->SB_CARRY[3]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_3/in[1]->SB_CARRY[3]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n54</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[1].carry" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[1] counter[0]</port> | |
| <port name="lutff_1/in">open $false counter[2] open</port> | |
| <port name="lutff_2/in">open $false counter[3] open</port> | |
| <port name="lutff_3/in">open $false counter[4] open</port> | |
| <port name="lutff_4/in">open $false counter[5] open</port> | |
| <port name="lutff_5/in">open $false counter[6] open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">open counter[1] open open</port> | |
| <port name="lutff_global/cen">counter[0]</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-LUT4[0].out[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-LUT4[4].out[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-LUT4[5].out[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-LUT4[6].out[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$false" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$false" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$false</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[4]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[3].CO[0]->BLK_IG-LUT4[4].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[4].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[5]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[4].CO[0]->BLK_IG-LUT4[5].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[5].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[6]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[5].CO[0]->BLK_IG-LUT4[6].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[6].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">open 0 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BLK_IG-FF_MODE[0]" mode="PCLK+CEN"> | |
| <inputs> | |
| <port name="E">BLK_TL-PLB.lutff_global/cen[0]->BLK_IG-FF_MODE-E</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">open open open open open open open BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">open open open open open open open BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[5]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[6]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[7]" mode="SB_DFFE"> | |
| <inputs> | |
| <port name="E">BLK_IG-FF_MODE.E[0]->BEL_FF-SB_FF[7]-E</port> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFFE[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFFE[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:8"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="E">BEL_FF-SB_FF.E[0]->SB_DFFE-E</port> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFFE-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFFE-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[1].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n82</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[2].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n86</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[3].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n90</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[4].carry" instance="SB_CARRY[3]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_3/in[2]->SB_CARRY[3]-I1</port> | |
| <port name="CI">SB_CARRY[2].CO[0]->SB_CARRY[3]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_3/in[1]->SB_CARRY[3]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n94</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[5].carry" instance="SB_CARRY[4]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_4/in[2]->SB_CARRY[4]-I1</port> | |
| <port name="CI">SB_CARRY[3].CO[0]->SB_CARRY[4]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_4/in[1]->SB_CARRY[4]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n98</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[6].carry" instance="SB_CARRY[5]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_5/in[2]->SB_CARRY[5]-I1</port> | |
| <port name="CI">SB_CARRY[4].CO[0]->SB_CARRY[5]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_5/in[1]->SB_CARRY[5]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n102</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$0\counter[28:0][28]" instance="BLK_TL-PLB[5]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">$abc$818$n74 $false counter[27] $abc$818$n74</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open counter[27] open open</port> | |
| <port name="lutff_6/in">open counter[28] open open</port> | |
| <port name="lutff_7/in">$abc$818$n78 open open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-LUT4[0]-in[0] open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">0 open 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][27]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" /> | |
| <block name="open" instance="BLK_IG-LUT4[3]" /> | |
| <block name="open" instance="BLK_IG-LUT4[4]" /> | |
| <block name="open" instance="BLK_IG-LUT4[5]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[5].in[1]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[6]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[6].in[1]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-LUT4[7]-in[0] open BLK_IG-LUT4[6].out[0]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">0 open 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][28]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[27]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$94" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$95" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$95" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[28]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[27].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n78</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[1]" /> | |
| <block name="open" instance="SB_CARRY[2]" /> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[26].carry" instance="BLK_TL-PLB[6]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[26] $abc$818$n70</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open counter[25]</port> | |
| <port name="lutff_7/in">open $abc$818$n70 counter[26] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-FF_MODE[0].Q[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_0/in[2]->BLK_IG-LUT4[0]-in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" /> | |
| <block name="open" instance="BLK_IG-LUT4[3]" /> | |
| <block name="open" instance="BLK_IG-LUT4[4]" /> | |
| <block name="open" instance="BLK_IG-LUT4[5]" /> | |
| <block name="open" instance="BLK_IG-LUT4[6]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open BLK_TL-PLB.lutff_6/in[3]->BLK_IG-LUT4[6].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[6].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][26]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BLK_IG-LUT4[0].out[0]->BLK_IG-FF_MODE-D[0] open open open open open BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">BEL_FF-SB_FF[0].Q[0]->BLK_IG-FF_MODE-Q[0] open open open open open BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[0]->BEL_FF-SB_FF[0]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[0]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[5]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[26]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[26].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n74</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[1]" /> | |
| <block name="open" instance="SB_CARRY[2]" /> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[7].carry" instance="BLK_TL-PLB[7]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $false counter[7] $abc$818$n102</port> | |
| <port name="lutff_1/in">open $false counter[8] open</port> | |
| <port name="lutff_2/in">open $false counter[9] open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">$abc$818$n86 open counter[3] open</port> | |
| <port name="lutff_5/in">open $abc$818$n102 counter[7] open</port> | |
| <port name="lutff_6/in">open $abc$818$n110 counter[9] open</port> | |
| <port name="lutff_7/in">open $abc$818$n106 counter[8] open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">BLK_IG-LUT4[1].out[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-LUT4[2].out[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-LUT4[3].out[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-FF_MODE[0].Q[4]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-FF_MODE[0].Q[5]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUT4[0]" /> | |
| <block name="open" instance="BLK_IG-LUT4[1]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[0].CO[0]->BLK_IG-LUT4[1].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[1].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[2]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[1].CO[0]->BLK_IG-LUT4[2].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[2].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LUT4[3]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open open SB_CARRY[2].CO[0]->BLK_IG-LUT4[3].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[3].in[3]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUT4[4]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-LUT4[4]-in[0] open BLK_TL-PLB.lutff_4/in[2]->BLK_IG-LUT4[4].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">0 open 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUT4[5]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-LUT4[5]-in[1] BLK_TL-PLB.lutff_5/in[2]->BLK_IG-LUT4[5].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-LUT4[6]-in[1] BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] BLK_TL-PLB.lutff_7/in[2]->BLK_IG-LUT4[7].in[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">open open open open BLK_IG-LUT4[4].out[0]->BLK_IG-FF_MODE-D[4] BLK_IG-LUT4[5].out[0]->BLK_IG-FF_MODE-D[5] BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">open open open open BEL_FF-SB_FF[4].Q[0]->BLK_IG-FF_MODE-Q[4] BEL_FF-SB_FF[5].Q[0]->BLK_IG-FF_MODE-Q[5] BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="BEL_FF-SB_FF[4]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[4]->BEL_FF-SB_FF[4]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[4]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$66" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[5]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[5]->BEL_FF-SB_FF[5]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[5]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[7].carry" instance="SB_CARRY[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_0/in[2]->SB_CARRY[0]-I1</port> | |
| <port name="CI">BLK_TL-PLB.lutff_0/in[3]->SB_CARRY[0]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[1]->SB_CARRY[0]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n106</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[8].carry" instance="SB_CARRY[1]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[2]->SB_CARRY[1]-I1</port> | |
| <port name="CI">SB_CARRY[0].CO[0]->SB_CARRY[1]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_1/in[1]->SB_CARRY[1]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n110</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="$auto$alumacc.cc:474:replace_alu$7.slice[9].carry" instance="SB_CARRY[2]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/arith_map.v:47"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="I1">BLK_TL-PLB.lutff_2/in[2]->SB_CARRY[2]-I1</port> | |
| <port name="CI">SB_CARRY[1].CO[0]->SB_CARRY[2]-CI</port> | |
| <port name="I0">BLK_TL-PLB.lutff_2/in[1]->SB_CARRY[2]-I0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="CO">$abc$818$n6</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$0\counter[28:0][6]" instance="BLK_TL-PLB[8]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open counter[4] $abc$818$n90</port> | |
| <port name="lutff_7/in">$abc$818$n98 counter[6] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUT4[0]" /> | |
| <block name="open" instance="BLK_IG-LUT4[1]" /> | |
| <block name="open" instance="BLK_IG-LUT4[2]" /> | |
| <block name="open" instance="BLK_IG-LUT4[3]" /> | |
| <block name="open" instance="BLK_IG-LUT4[4]" /> | |
| <block name="open" instance="BLK_IG-LUT4[5]" /> | |
| <block name="$0\counter[28:0][4]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] BLK_TL-PLB.lutff_6/in[3]->BLK_IG-LUT4[6].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][4]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][4]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-LUT4[7]-in[0] BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">0 1 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">open open open open open open BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">open open open open open open BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[5]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[4]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="SB_CARRY[1]" /> | |
| <block name="open" instance="SB_CARRY[2]" /> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$0\counter[28:0][5]" instance="BLK_TL-PLB[9]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open counter[2] $abc$818$n82</port> | |
| <port name="lutff_7/in">$abc$818$n94 counter[5] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">BLK_IG-FF_MODE[0].Q[6]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUT4[0]" /> | |
| <block name="open" instance="BLK_IG-LUT4[1]" /> | |
| <block name="open" instance="BLK_IG-LUT4[2]" /> | |
| <block name="open" instance="BLK_IG-LUT4[3]" /> | |
| <block name="open" instance="BLK_IG-LUT4[4]" /> | |
| <block name="open" instance="BLK_IG-LUT4[5]" /> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUT4[6]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_TL-PLB.lutff_6/in[2]->BLK_IG-LUT4[6].in[2] BLK_TL-PLB.lutff_6/in[3]->BLK_IG-LUT4[6].in[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open open 1 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-LUT4[7]-in[0] BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">0 1 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">open open open open open open BLK_IG-LUT4[6].out[0]->BLK_IG-FF_MODE-D[6] BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">open open open open open open BEL_FF-SB_FF[6].Q[0]->BLK_IG-FF_MODE-Q[6] BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[5]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[6]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[6]->BEL_FF-SB_FF[6]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[6]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="SB_CARRY[1]" /> | |
| <block name="open" instance="SB_CARRY[2]" /> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="$0\counter[28:0][0]" instance="BLK_TL-PLB[10]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open open open open</port> | |
| <port name="lutff_1/in">open open open open</port> | |
| <port name="lutff_2/in">open open open open</port> | |
| <port name="lutff_3/in">open open open open</port> | |
| <port name="lutff_4/in">open open open open</port> | |
| <port name="lutff_5/in">open open open open</port> | |
| <port name="lutff_6/in">open open open open</port> | |
| <port name="lutff_7/in">open counter[0] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">open</port> | |
| <port name="lutff_1/out">open</port> | |
| <port name="lutff_2/out">open</port> | |
| <port name="lutff_3/out">open</port> | |
| <port name="lutff_4/out">open</port> | |
| <port name="lutff_5/out">open</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-FF_MODE[0].Q[7]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-LUT4[0]" /> | |
| <block name="open" instance="BLK_IG-LUT4[1]" /> | |
| <block name="open" instance="BLK_IG-LUT4[2]" /> | |
| <block name="open" instance="BLK_IG-LUT4[3]" /> | |
| <block name="open" instance="BLK_IG-LUT4[4]" /> | |
| <block name="open" instance="BLK_IG-LUT4[5]" /> | |
| <block name="open" instance="BLK_IG-LUT4[6]" /> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUT4[7]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-LUT4[7]-in[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open open</port> | |
| <port_rotation_map name="in">open 0 open open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BLK_IG-FF_MODE[0]" mode="PCLK"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">open open open open open open open BLK_IG-LUT4[7].out[0]->BLK_IG-FF_MODE-D[7]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">open open open open open open open BEL_FF-SB_FF[7].Q[0]->BLK_IG-FF_MODE-Q[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-FF_MODE-C</port> | |
| </clocks> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[1]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[2]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[3]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[4]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[5]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[6]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[7]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="D">BLK_IG-FF_MODE.D[7]->BEL_FF-SB_FF[7]-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-FF_MODE.C[0]->BEL_FF-SB_FF[7]-C</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="SB_CARRY[1]" /> | |
| <block name="open" instance="SB_CARRY[2]" /> | |
| <block name="open" instance="SB_CARRY[3]" /> | |
| <block name="open" instance="SB_CARRY[4]" /> | |
| <block name="open" instance="SB_CARRY[5]" /> | |
| <block name="open" instance="SB_CARRY[6]" /> | |
| <block name="open" instance="SB_CARRY[7]" /> | |
| </block> | |
| <block name="out:LED2" instance="BLK_TL-PIO[11]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[3] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED2" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED2" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED5" instance="BLK_TL-PIO[12]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[0] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED5" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED5" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED4" instance="BLK_TL-PIO[13]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[1] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED4" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED4" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="out:LED3" instance="BLK_TL-PIO[14]" mode="PAD_IS_OUTPUT"> | |
| <inputs> | |
| <port name="D_OUT">outcnt[2] open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">open open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="out:LED3" instance="PAD[0]" mode="default"> | |
| <inputs> | |
| <port name="D_OUT">BLK_TL-PIO.D_OUT[0]->PAD-D_OUT[0] open</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| <block name="out:LED3" instance="output[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="outpad">PAD.D_OUT[0]->D_OUT</port> | |
| </inputs> | |
| <outputs /> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="clk" instance="BLK_TL-PIO[15]" mode="PAD_IS_INPUT"> | |
| <inputs> | |
| <port name="D_OUT">open open</port> | |
| <port name="OUT_ENB">open</port> | |
| <port name="CEN">open</port> | |
| <port name="LATCH">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="D_IN">PAD[0].D_IN[0]->BLK_TL-PIO-D_IN[0] open</port> | |
| <port name="PACKAGE_PIN">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="INCLK">open</port> | |
| <port name="OUTCLK">open</port> | |
| </clocks> | |
| <block name="clk" instance="PAD[0]" mode="default"> | |
| <inputs /> | |
| <outputs> | |
| <port name="D_IN">input[0].inpad[0]->PAD-D_IN[0] open</port> | |
| <port name="PIN">open</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="clk" instance="input[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs /> | |
| <outputs> | |
| <port name="inpad">clk</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| </block> |
| <?xml version="1.0"?> | |
| <block name="example.net" instance="FPGA_packed_netlist[0]" architecture_id="SHA256:b77eb1fe3c6e1215c7fd75831dc996f3b90b87af3de5c06abc901b8f24c5738c" atom_netlist_id="SHA256:3b199c7da05f32da99ac13f98d79362428da0826599d2b9ff1a8e9a23c406174"> | |
| <inputs>clk</inputs> | |
| <outputs>out:LED2 out:LED3 out:LED4 out:LED5</outputs> | |
| <clocks>clk</clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BLK_TL-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[8] counter[7] counter[9] $abc$1426$n63</port> | |
| <port name="lutff_1/in">counter[12] counter[11] open counter[10]</port> | |
| <port name="lutff_2/in">counter[13] counter[15] open counter[14]</port> | |
| <port name="lutff_3/in">counter[17] counter[18] open counter[16]</port> | |
| <port name="lutff_4/in">counter[19] counter[21] open counter[20]</port> | |
| <port name="lutff_5/in">counter[22] counter[24] open counter[23]</port> | |
| <port name="lutff_6/in">counter[26] counter[27] open counter[25]</port> | |
| <port name="lutff_7/in">open counter[28] open open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">open</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 open BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 open BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 open BLK_TL-PLB.lutff_3/in[3]->BLK_IG-PLB-I3</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 open BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 open BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">open</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n62_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n62_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n62_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] open BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">BLK_IG-LC0[0].O[0]->LCCO0</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n61_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n61_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n61_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] open BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">BLK_IG-LC1[0].O[0]->LCCO1</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n67_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n67_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n67_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] open BLK_IG-PLB.I3[3]->I3[3]</port> | |
| <port name="LCIN">BLK_IG-LC2[0].O[0]->LCCO2</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n71_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n71_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 0 3 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n71_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] open BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">BLK_IG-LC3[0].O[0]->LCCO3</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n75_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n75_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n75_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] open BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">BLK_IG-LC4[0].O[0]->LCCO4</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n79_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n79_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n79_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] open BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">BLK_IG-LC5[0].O[0]->LCCO5</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">open</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n83_1" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n83_1" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 0 3 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n83_1</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] open open</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][28]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][28]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][28]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$90" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[28]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[0].LCOUT[0]->LCCI0</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC0[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC1[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[1].LCOUT[0]->LCCI1</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC1[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC2[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[2].LCOUT[0]->LCCI2</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC2[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC3[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[3].LCOUT[0]->LCCI3</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC3[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC4[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[4].LCOUT[0]->LCCI4</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC4[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC5[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[5].LCOUT[0]->LCCI5</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC5[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_TL-PLB[1]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[4] $abc$1426$n64 open counter[5]</port> | |
| <port name="lutff_1/in">counter[5] counter[4] $abc$1426$n64 counter[6]</port> | |
| <port name="lutff_2/in">open open counter[0] open</port> | |
| <port name="lutff_3/in">open counter[1] counter[0] open</port> | |
| <port name="lutff_4/in">counter[1] open counter[0] counter[2]</port> | |
| <port name="lutff_5/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_6/in">counter[3] counter[1] counter[0] counter[2]</port> | |
| <port name="lutff_7/in">counter[5] counter[4] open counter[6]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 open BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open open BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 open</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 open BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] open BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][5]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in open BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][5]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 open 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][5]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$67" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[5]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][6]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][6]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][6]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$68" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[6]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][0]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][0]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open open 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][0]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$62" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][1]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][1]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][1]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$63" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] open BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][2]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][2]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 open 2 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][2]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$64" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][3]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][3]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][3]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$65" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[3]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">BEL_LT-LUT[0].out[0]->LCOUT</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n64" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n64" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 2 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n64</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] open BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">BLK_IG-LC6[0].O[0]->LCCO6</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-DISABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">open</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$abc$1426$n63" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.LCIN[0]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$abc$1426$n63" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$abc$1426$n63</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="open" instance="BEL_FF-SB_FF[0]" /> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" /> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_LT-LUT[0].out[0]->DISABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-DISABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BLK_IG-LUTFF[6].LCOUT[0]->LCCI6</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-LC6[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BLK_TL-PLB[2]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open $abc$1426$n75_1 counter[23] counter[22]</port> | |
| <port name="lutff_1/in">counter[24] $abc$1426$n75_1 counter[23] counter[22]</port> | |
| <port name="lutff_2/in">open counter[25] open open</port> | |
| <port name="lutff_3/in">open open counter[26] open</port> | |
| <port name="lutff_4/in">open open counter[27] open</port> | |
| <port name="lutff_5/in">open $abc$1426$n79_1 counter[25] open</port> | |
| <port name="lutff_6/in">$abc$1426$n79_1 counter[27] counter[26] counter[25]</port> | |
| <port name="lutff_7/in">open counter[25] counter[26] $abc$1426$n79_1</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 open open</port> | |
| <port name="I3">open open BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">open open BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 open</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 open</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][23]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][23]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 2 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][23]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$85" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[23]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][24]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][24]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 3 1 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][24]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$86" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[24]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] open open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in open open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[1]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$91" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[0]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$92" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[1]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open open BLK_IG-PLB.I4[2]->I4[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="open" instance="BEL_LT-LUT[0]" mode="VPR_LUT4" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="open" instance="BLK_IG-LUT4[0]" mode="wire" pb_type_num_modes="2"> | |
| <inputs> | |
| <port name="in">open open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].in[2]->complete:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$93" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">outcnt[2]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] BLK_IG-PLB.I5[2]->I5[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][25]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][25]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][25]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$87" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[25]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][27]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][27]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">3 0 1 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][27]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$89" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[27]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][26]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][26]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 1 0 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][26]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$88" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[26]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BLK_TL-PLB[3]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">counter[18] counter[17] $abc$1426$n67_1 counter[16]</port> | |
| <port name="lutff_1/in">counter[13] counter[15] $abc$1426$n61_1 counter[14]</port> | |
| <port name="lutff_2/in">counter[19] counter[20] counter[21] $abc$1426$n71_1</port> | |
| <port name="lutff_3/in">open $abc$1426$n67_1 counter[16] open</port> | |
| <port name="lutff_4/in">open $abc$1426$n67_1 counter[17] counter[16]</port> | |
| <port name="lutff_5/in">open counter[22] open $abc$1426$n75_1</port> | |
| <port name="lutff_6/in">open $abc$1426$n61_1 counter[13] open</port> | |
| <port name="lutff_7/in">counter[13] $abc$1426$n61_1 open counter[14]</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">BLK_TL-PLB.lutff_0/in[0]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[3]->BLK_IG-PLB-I0</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[1]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">BLK_TL-PLB.lutff_2/in[0]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[3]->BLK_IG-PLB-I2</port> | |
| <port name="I3">open BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">open BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">open BLK_TL-PLB.lutff_5/in[1]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">open BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 open</port> | |
| <port name="I7">BLK_TL-PLB.lutff_7/in[0]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 open BLK_TL-PLB.lutff_7/in[3]->BLK_IG-PLB-I7</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I0[0]->I0[0] BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] BLK_IG-PLB.I0[3]->I0[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][18]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][18]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 1 3 2</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][18]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$80" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[18]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] BLK_IG-PLB.I1[1]->I1[1] BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][15]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][15]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 0 3 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][15]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$77" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[15]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I2[0]->I2[0] BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] BLK_IG-PLB.I2[3]->I2[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][21]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][21]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 0 3</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][21]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$83" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[21]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][16]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][16]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][16]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$78" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[16]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][17]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][17]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 2 0 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][17]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$79" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[17]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I5[1]->I5[1] open BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][22]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in open BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][22]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">open 0 open 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][22]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$84" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[22]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][13]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][13]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 1 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][13]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$75" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[13]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I7[0]->I7[0] BLK_IG-PLB.I7[1]->I7[1] open BLK_IG-PLB.I7[3]->I7[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][14]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] open BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in open BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][14]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 open 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][14]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$76" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[14]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="open" instance="BLK_IG-LC0[0]" /> | |
| <block name="open" instance="BLK_IG-LC1[0]" /> | |
| <block name="open" instance="BLK_IG-LC2[0]" /> | |
| <block name="open" instance="BLK_IG-LC3[0]" /> | |
| <block name="open" instance="BLK_IG-LC4[0]" /> | |
| <block name="open" instance="BLK_IG-LC5[0]" /> | |
| <block name="open" instance="BLK_IG-LC6[0]" /> | |
| <block name="open" instance="BLK_IG-CLKINV[0]" mode="POS_CLK" pb_type_num_modes="2"> | |
| <inputs /> | |
| <outputs> | |
| <port name="PCLK">BLK_IG-CLKPOS[0].O[0]->O</port> | |
| <port name="NCLK">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="ICLK">BLK_IG-PLB.CLK[0]->CLK</port> | |
| </clocks> | |
| <block name="open" instance="BLK_IG-CLKPOS[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs /> | |
| <outputs> | |
| <port name="O">BLK_IG-CLKPOS[0].I[0]->_</port> | |
| </outputs> | |
| <clocks> | |
| <port name="I">BLK_IG-CLKINV.ICLK[0]->I</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="$0\counter[28:0][20]" instance="BLK_TL-PLB[4]" mode="default"> | |
| <inputs> | |
| <port name="lutff_0/in">open counter[10] $abc$1426$n62_1 open</port> | |
| <port name="lutff_1/in">counter[11] open $abc$1426$n62_1 counter[10]</port> | |
| <port name="lutff_2/in">open counter[7] $abc$1426$n63 open</port> | |
| <port name="lutff_3/in">counter[7] $abc$1426$n63 counter[8] open</port> | |
| <port name="lutff_4/in">counter[7] counter[8] $abc$1426$n63 counter[9]</port> | |
| <port name="lutff_5/in">counter[20] open $abc$1426$n71_1 counter[19]</port> | |
| <port name="lutff_6/in">counter[11] counter[10] $abc$1426$n62_1 counter[12]</port> | |
| <port name="lutff_7/in">open counter[19] $abc$1426$n71_1 open</port> | |
| <port name="lutff_global/cen">open</port> | |
| <port name="lutff_global/s_r">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="lutff_0/out">BLK_IG-PLB[0].O0[0]->BLK_TL-PLB-lutff_0/out</port> | |
| <port name="lutff_1/out">BLK_IG-PLB[0].O1[0]->BLK_TL-PLB-lutff_1/out</port> | |
| <port name="lutff_2/out">BLK_IG-PLB[0].O2[0]->BLK_TL-PLB-lutff_2/out</port> | |
| <port name="lutff_3/out">BLK_IG-PLB[0].O3[0]->BLK_TL-PLB-lutff_3/out</port> | |
| <port name="lutff_4/out">BLK_IG-PLB[0].O4[0]->BLK_TL-PLB-lutff_4/out</port> | |
| <port name="lutff_5/out">BLK_IG-PLB[0].O5[0]->BLK_TL-PLB-lutff_5/out</port> | |
| <port name="lutff_6/out">BLK_IG-PLB[0].O6[0]->BLK_TL-PLB-lutff_6/out</port> | |
| <port name="lutff_7/out">BLK_IG-PLB[0].O7[0]->BLK_TL-PLB-lutff_7/out</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="lutff_global/clk">clk</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-PLB[0]" mode="default"> | |
| <inputs> | |
| <port name="I0">open BLK_TL-PLB.lutff_0/in[1]->BLK_IG-PLB-I0 BLK_TL-PLB.lutff_0/in[2]->BLK_IG-PLB-I0 open</port> | |
| <port name="I1">BLK_TL-PLB.lutff_1/in[0]->BLK_IG-PLB-I1 open BLK_TL-PLB.lutff_1/in[2]->BLK_IG-PLB-I1 BLK_TL-PLB.lutff_1/in[3]->BLK_IG-PLB-I1</port> | |
| <port name="I2">open BLK_TL-PLB.lutff_2/in[1]->BLK_IG-PLB-I2 BLK_TL-PLB.lutff_2/in[2]->BLK_IG-PLB-I2 open</port> | |
| <port name="I3">BLK_TL-PLB.lutff_3/in[0]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[1]->BLK_IG-PLB-I3 BLK_TL-PLB.lutff_3/in[2]->BLK_IG-PLB-I3 open</port> | |
| <port name="I4">BLK_TL-PLB.lutff_4/in[0]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[1]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[2]->BLK_IG-PLB-I4 BLK_TL-PLB.lutff_4/in[3]->BLK_IG-PLB-I4</port> | |
| <port name="I5">BLK_TL-PLB.lutff_5/in[0]->BLK_IG-PLB-I5 open BLK_TL-PLB.lutff_5/in[2]->BLK_IG-PLB-I5 BLK_TL-PLB.lutff_5/in[3]->BLK_IG-PLB-I5</port> | |
| <port name="I6">BLK_TL-PLB.lutff_6/in[0]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[1]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[2]->BLK_IG-PLB-I6 BLK_TL-PLB.lutff_6/in[3]->BLK_IG-PLB-I6</port> | |
| <port name="I7">open BLK_TL-PLB.lutff_7/in[1]->BLK_IG-PLB-I7 BLK_TL-PLB.lutff_7/in[2]->BLK_IG-PLB-I7 open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O0">BLK_IG-LUTFF[0].O[0]->O0</port> | |
| <port name="O1">BLK_IG-LUTFF[1].O[0]->O1</port> | |
| <port name="O2">BLK_IG-LUTFF[2].O[0]->O2</port> | |
| <port name="O3">BLK_IG-LUTFF[3].O[0]->O3</port> | |
| <port name="O4">BLK_IG-LUTFF[4].O[0]->O4</port> | |
| <port name="O5">BLK_IG-LUTFF[5].O[0]->O5</port> | |
| <port name="O6">BLK_IG-LUTFF[6].O[0]->O6</port> | |
| <port name="O7">BLK_IG-LUTFF[7].O[0]->O7</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="CLK">BLK_TL-PLB.lutff_global/clk[0]->BLK_IG-PLB-CLK</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BLK_IG-LUTFF[0]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I0[1]->I0[1] BLK_IG-PLB.I0[2]->I0[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC0</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][10]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][10]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][10]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$72" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[10]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BLK_IG-LUTFF[1]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I1[0]->I1[0] open BLK_IG-PLB.I1[2]->I1[2] BLK_IG-PLB.I1[3]->I1[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC1</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][11]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][11]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][11]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$73" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[11]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BLK_IG-LUTFF[2]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I2[1]->I2[1] BLK_IG-PLB.I2[2]->I2[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC2</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][7]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">open BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][7]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">open BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">open 0 1 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][7]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$69" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[7]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BLK_IG-LUTFF[3]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I3[0]->I3[0] BLK_IG-PLB.I3[1]->I3[1] BLK_IG-PLB.I3[2]->I3[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC3</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][8]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][8]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 open</port> | |
| <port_rotation_map name="in">1 2 0 open</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][8]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$70" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[8]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUTFF[4]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I4[0]->I4[0] BLK_IG-PLB.I4[1]->I4[1] BLK_IG-PLB.I4[2]->I4[2] BLK_IG-PLB.I4[3]->I4[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC4</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][9]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][9]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">2 1 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][9]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$71" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[9]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUTFF[5]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I5[0]->I5[0] open BLK_IG-PLB.I5[2]->I5[2] BLK_IG-PLB.I5[3]->I5[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC5</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][20]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] open BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in open BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][20]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 open BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">0 open 2 1</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][20]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$82" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[20]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUTFF[6]" mode="default"> | |
| <inputs> | |
| <port name="I">BLK_IG-PLB.I6[0]->I6[0] BLK_IG-PLB.I6[1]->I6[1] BLK_IG-PLB.I6[2]->I6[2] BLK_IG-PLB.I6[3]->I6[3]</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC6</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][12]" instance="BEL_LT-LUT[0]" mode="VPR_LUT4"> | |
| <inputs> | |
| <port name="in">BLK_IG-LUTFF.I[0]->LUT.I[0] BLK_IG-LUTFF.I[1]->LUT.I[1] BLK_IG-LUTFF.I[2]->LUT.I[2] BLK_IG-LUTFF.I[3]->LUT.I[3]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">BLK_IG-LUT4[0].out[0]->BEL_LT-LUT-out</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="BLK_IG-LUT4[0]" mode="BLK_IG-LUT4"> | |
| <inputs> | |
| <port name="in">BEL_LT-LUT.in[0]->BLK_IG-LUT4-in BEL_LT-LUT.in[1]->BLK_IG-LUT4-in BEL_LT-LUT.in[2]->BLK_IG-LUT4-in BEL_LT-LUT.in[3]->BLK_IG-LUT4-in</port> | |
| </inputs> | |
| <outputs> | |
| <port name="out">lut[0].out[0]->direct:BLK_IG-LUT4</port> | |
| </outputs> | |
| <clocks /> | |
| <block name="$0\counter[28:0][12]" instance="lut[0]"> | |
| <attributes /> | |
| <parameters /> | |
| <inputs> | |
| <port name="in">BLK_IG-LUT4.in[0]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[1]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[2]->direct:BLK_IG-LUT4 BLK_IG-LUT4.in[3]->direct:BLK_IG-LUT4</port> | |
| <port_rotation_map name="in">1 2 3 0</port_rotation_map> | |
| </inputs> | |
| <outputs> | |
| <port name="out">$0\counter[28:0][12]</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| </block> | |
| </block> | |
| <block name="open" instance="SB_CARRY[0]" /> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="BEL_FF-SB_FF[0]" mode="SB_DFF"> | |
| <inputs> | |
| <port name="E">open</port> | |
| <port name="S">open</port> | |
| <port name="R">open</port> | |
| <port name="D">BEL_LT-LUT[0].out[0]->FF.D[0]</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">SB_DFF[0].Q[0]->BEL_FF-SB_FF-Q</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BLK_IG-LUTFF.PCLK[0]->FF.C[0]</port> | |
| <port name="N">open</port> | |
| </clocks> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$74" instance="SB_DFF[0]"> | |
| <attributes> | |
| <attribute name="src">"SymbiFlow/symbiflow-arch-defs/env/conda/bin/../share/yosys/ice40/cells_map.v:2"</attribute> | |
| </attributes> | |
| <parameters /> | |
| <inputs> | |
| <port name="D">BEL_FF-SB_FF.D[0]->SB_DFF-D</port> | |
| </inputs> | |
| <outputs> | |
| <port name="Q">counter[12]</port> | |
| </outputs> | |
| <clocks> | |
| <port name="C">BEL_FF-SB_FF.C[0]->SB_DFF-C</port> | |
| </clocks> | |
| </block> | |
| </block> | |
| <block name="open" instance="BLK_IG-ENABLE_FF[0]" mode="default" pb_type_num_modes="1"> | |
| <inputs> | |
| <port name="I">BEL_FF-SB_FF[0].Q[0]->ENABLE_FF</port> | |
| </inputs> | |
| <outputs> | |
| <port name="O">BLK_IG-ENABLE_FF[0].I[0]->I</port> | |
| </outputs> | |
| <clocks /> | |
| </block> | |
| <block name="open" instance="BLK_IG-DISABLE_FF[0]" /> | |
| </block> | |
| <block name="$auto$simplemap.cc:420:simplemap_dff$81" instance="BLK_IG-LUTFF[7]" mode="default"> | |
| <inputs> | |
| <port name="I">open BLK_IG-PLB.I7[1]->I7[1] BLK_IG-PLB.I7[2]->I7[2] open</port> | |
| <port name="LCIN">open</port> | |
| <port name="EN">open</port> | |
| <port name="SR">open</port> | |
| <port name="FCIN">open</port> | |
| </inputs> | |
| <outputs> | |
| <port name="LCOUT">open</port> | |
| <port name="O">BLK_IG-ENABLE_FF[0].O[0]->O</port> | |
| <port name="FCOUT">open</port> | |
| </outputs> | |
| <clocks> | |
| <port name="PCLK">BLK_IG-CLKINV[0].PCLK[0]->PC7</port> | |
| <port name="NCLK">open</port> | |
| </clocks> | |
| <block name="$0\counter[28:0][19]" instance="BEL_LT |
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(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
(Sorry about that, but we can’t show files that are this big right now.)
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