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March 19, 2022 13:16
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| [MT6357] 1 3,64 | |
| [MT6357] 1 5,80 | |
| [MT6357] get volt 3, 64, 918750 | |
| [MT6357] get volt 5, 80, 1018750 | |
| [MT6357] get volt 5, 80, 1018750 | |
| [MT6357] get volt 3, 64, 918750 | |
| [MT6357] 1 3,63 | |
| [MT6357] 1 5,79 | |
| [MT6357] get volt 3, 63, 912500 | |
| [MT6357] get volt 5, 79, 1012500 | |
| [PICACHU] L Freq: 2001 | |
| [MT6357] get volt 5, 79, 1012500 | |
| [MT6357] get volt 3, 63, 912500 | |
| [MT6357] 1 3,51 | |
| [MT6357] 1 5,67 | |
| [MT6357] 1 3,45 | |
| [MT6357] 1 5,61 | |
| [MT6357] 1 5,61 | |
| [MT6357] get volt 3, 45, 800000 | |
| [MT6357] get volt 3, 45, 800000 | |
| [MT6357] get volt 5, 61, 900000 | |
| [PICACHU] L Freq: 2001 | |
| [PLFM],64S3,boot_opt=0x0 | |
| [PLFM],32N2,boot_opt=0x6 | |
| [PLFM],64N2,boot_opt=0x4 | |
| lastpc[0][0] = FFD91FE2 | |
| lastpc[0][1] = 2881BFF0 | |
| lastpc[0][2] = 8100A291 | |
| lastpc[0][3] = 800020D4 | |
| lastpc[0][4] = 80E1900 | |
| lastpc[0][5] = 490D6024 | |
| lastpc[0][6] = 1941E981 | |
| lastpc[0][7] = 61C88000 | |
| lastpc[1][0] = 0 | |
| lastpc[1][1] = 0 | |
| lastpc[1][2] = 0 | |
| lastpc[1][3] = 0 | |
| lastpc[1][4] = 0 | |
| lastpc[1][5] = 0 | |
| lastpc[1][6] = 0 | |
| lastpc[1][7] = 0 | |
| lastpc[2][0] = 0 | |
| lastpc[2][1] = 0 | |
| lastpc[2][2] = 0 | |
| lastpc[2][3] = 0 | |
| lastpc[2][4] = 0 | |
| lastpc[2][5] = 0 | |
| lastpc[2][6] = 0 | |
| lastpc[2][7] = 0 | |
| lastpc[3][0] = 0 | |
| lastpc[3][1] = 0 | |
| lastpc[3][2] = 0 | |
| lastpc[3][3] = 0 | |
| lastpc[3][4] = 0 | |
| lastpc[3][5] = 0 | |
| lastpc[3][6] = 0 | |
| lastpc[3][7] = 0 | |
| [PLFM] boot to LK by ATAG. | |
| PL_VERSION = 0.1.00 | |
| [mt_charger_type_detection] Got data !!, 1 | |
| emmc ocr = 0xC0FF8080 | |
| emmc cid: 0x15010041 0x4A544434 0x5206436A 0xBCE0A76F | |
| emmc csd: 0xD0270132 0xF5903FF 0xF6DBFFEF 0x8E40400D | |
| BOOT_REASON: 0 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285224960 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 1 | |
| MEM_NUM: 2 | |
| MEM_SIZE: 0x3FFC0000 | |
| MEM_SIZE: 0x40000000 | |
| mblock num: 0x5 | |
| mblock start: 0x0000000040000000 | |
| mblock size: 0x000000003FFC0000 | |
| mblock rank: 0x0 | |
| mblock start: 0x0000000080000000 | |
| mblock size: 0x0000000040000000 | |
| mblock rank: 0x0 | |
| mblock start: 0x00000000C0000000 | |
| mblock size: 0x000000003EF00000 | |
| mblock rank: 0x1 | |
| mblock start: 0x00000000FF000000 | |
| mblock size: 0x00000000009C0000 | |
| mblock rank: 0x1 | |
| orig_dram num: 0x2 | |
| orig_dram start: 0x0000000040000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x00000000C0000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| lca start: 0x0000000000000000 | |
| lca size: 0x0000000000000000 | |
| tee start: 0x00000000FF9C0000 | |
| tee size: 0x0000000000040000 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| BOOT_TIME: 5927 | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| PART_NUM: 3 | |
| PART_INFO: 0x42058A24 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DRAM_BUF: 1576896 | |
| SMC: 0x0 | |
| SMC: 0x6 | |
| SMC: 0x4 | |
| SRAM satrt: 0x111D00 | |
| SRAM size: 0x300 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0xDB45 | |
| PLAT_DBG_INFO base: 0x111E0C | |
| PLAT_DBG_INFO size: 0x10 | |
| [TZ_INIT] hwuid[0] : 0xA8D2FEC5 | |
| [TZ_INIT] hwuid[1] : 0x105DD9EE | |
| [TZ_INIT] hwuid[2] : 0xD6C12CE7 | |
| [TZ_INIT] hwuid[3] : 0xD8FB6547 | |
| [TZ_INIT] HRID[0] : 0xA2A0D71F | |
| [TZ_INIT] HRID[1] : 0x804C73ED | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [TZ_INIT] ATF log buffer start : 0xFF9C0000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0xFF9FC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| Device APC: sec_postinit Infra MAS_SEC_0=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x56000000 | |
| [BLDR] <0x56000000>=0xEA000007 | |
| [BLDR] <0x56000004>=0xEA007FC7 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x10011C00 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 1 0x30000 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 2 0x38000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 2 0xB680000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 5 0xB690000 | |
| [TZeserve dbg[3]: 1, 0, 1, 1 | |
| [222] mblock[4].start: 0x80000000, sz: 0x40000000, limit: 0x4c880000, max_addr: 0x54000000, target: 0, reserved_addr: 0x40080000,reserved_size: 0xc800000 | |
| [224] mblock_reserve dbg[4]: 1, 0, 1, 1 | |
| [224] mblock[5].start: 0xc0000000, sz: 0x3ef00000, limit: 0x4c880000, max_addr: 0x54000000, target: 0, reserved_addr: 0x40080000,reserved_size: 0xc800000 | |
| [226] mblock_reserve dbg[5]: 1, 0, 1, 1 | |
| [226] mblock[6].start: 0xff000000, sz: 0x9c0000, limit: 0x4c880000, max_addr: 0x 54000000, target: 0, reserved_addr: 0x40080000,reserved_size: 0xc800000 | |
| [228] mblock_reserve dbg[6]: 1, 0, 1, 1 | |
| [228] mblock[7].start: 0x100000000, sz: 0x40000000, limit: 0x4c880000, max_addr: 0x54000000, target: 0, reserved_addr: 0x40080000,reserved_size: 0xc800000 | |
| [230] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [231] mblock[0]: 40000000, 80000 from mblock | |
| mblock[1]: 4c880000, 7780000 from mblock | |
| [232] mblock_reserve: 40080000 - 4c880000 from mblock 0 | |
| [232] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [233] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [233] mblock_reserve [2].start: 0x54080000, sz: 0x1f80000 | |
| [234] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [235] mblock_reserve [4].start: 0x5f900000, sz: 0x206c0000 | |
| [235] mblock_reserve [5].start: 0x80000000, sz: 0x40000000 | |
| [236] mblock_reserve [6].start: 0xc0000000, sz: 0x3ef00000 | |
| [237] mblock_reserve [7].start: 0xff000000, sz: 0x9c0000 | |
| [237] mblock_reserve [8].start: 0x100000000, sz: 0x40000000 | |
| [238] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [239] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [240] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [241] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [241] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_ad dr_mb | |
| [242] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_a ddr_mb | |
| [243] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_add r_mb | |
| [244] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0x56000000, max_addr: 0x0 , target: -1, reserved_addr: 0x3f080000,reserved_size: 0x1000000 | |
| [246] mblock_reserve dbg[0]: 1, 0, 1, 1 | |
| [246] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0x56000000, max_addr: 0 x0, target: -1, reserved_addr: 0x53000000,reserved_size: 0x1000000 | |
| [248] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [248] mblock[2].start: 0x54080000, sz: 0x1f80000, limit: 0x56000000, max_addr: 0 x54000000, target: 1, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [250] mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| [251] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0x56000000, max_addr: 0x 56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [252] mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| [253] mblock[4].start: 0x5f900000, sz: 0x206c0000, limit: 0x56000000, max_addr: 0x56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [254] mblock_reserve dbg[4]: 1, 0, 1, 1 | |
| [255] mblock[5].start: 0x80000000, sz: 0x40000000, limit: 0x56000000, max_addr: 0x56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [256] mblock_reserve dbg[5]: 1, 0, 1, 1 | |
| [257] mblock[6].start: 0xc0000000, sz: 0x3ef00000, limit: 0x56000000, max_addr: 0x56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [259] mblock_reserve dbg[6]: 1, 0, 1, 1 | |
| [259] mblock[7].start: 0xff000000, sz: 0x9c0000, limit: 0x56000000, max_addr: 0x 56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [261] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [261] mblock[8].start: 0x100000000, sz: 0x40000000, limit: 0x56000000, max_addr: 0x56000000, target: 2, reserved_addr: 0x55000000,reserved_size: 0x1000000 | |
| [263] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [263] mblock_reserve: 55000000 - 56000000 from mblock 2 | |
| [264] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [2 | |
| [595] config color dirty = 0 | |
| [595] config ccorr dirty = 0 | |
| [595] config aal dirty = 0 | |
| [596] config gamma dirty = 0 | |
| [596] config dither dirty = 0 | |
| [596] disp_dither_bypass(bypass = 1)[597] config color dirty = 0 | |
| [597] config ccorr dirty = 0 | |
| [597] config aal dirty = 0 | |
| [598] config gamma dirty = 0 | |
| [598] config dither dirty = 0 | |
| [598] disp_dither_bypass(bypass = 1)[599] [lk logo: mt_disp_fill_rect 289] | |
| [599] [lk logo: init_fb_screen 59] | |
| [600] mt_get_logo_db_addr: 0x5e900000 | |
| [600] [lk logo: init_fb_screen 77]MTK_LCM_PHYSICAL_ROTATION = 270 | |
| [601] [lk logo: sync_anim_version 42] | |
| [601] [lk logo: init_fb_screen 100]pinfo[0]=0x0000002a, pinfo[1]=0x00189e3a, pin fo[2]=176 | |
| [602] [lk logo: init_fb_screen 102]define ANIMATION_NEW:show new animation with capacity num | |
| [603] [lk logo: init_fb_screen 103]CAPACITY_LEFT =172, CAPACITY_TOP =330 | |
| [604] [lk logo: init_fb_screen 104]LCM_HEIGHT=307, LCM_WIDTH=546 | |
| [605] [show_logo_common: fill_rect_with_color_by_32bit 388] | |
| [675] fb dump: 0x00000000, 0x00000000, 0x00000000, 0x00000000 | |
| [677] ovl start done idx = 0, addr = 0x1400b00c | |
| [677] ovl start done addr0 = 0x1000 | |
| [678] ovl start done addr1 = 0x0 | |
| [678] ovl start done addr2 = 0x1400b00c | |
| [679] ovl start done addr3 = 0x1400b00c | |
| [679] ovl start done addr4 = 0x1400b00c | |
| [680] s_mt65xx_gd.gdfIndex=3[680] mt_get_logo_db_addr_pa: 0x5e900000 | |
| [680] [PART_LK][get_part] logo | |
| [681] [PART_LK][get_part] logo | |
| [681] | |
| ========================================= | |
| [682] [LK_BOOT] logo magic number : 0x58881688 | |
| [682] [LK_BOOT] logo name : logo | |
| [683] [LK_BOOT] logo size : 1613370 | |
| [683] ========================================= | |
| SMART RESET: TRUE | |
| rst from: unknown | |
| kedump mini start | |
| kedump: current time: [2010/1/1 0:28:42] | |
| kedump: ddr reserve mode disabled | |
| kedump: ddr reserve mode failed | |
| [692] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0xc0000000, max_addr: 0x0 , target: -1, reserved_addr: 0x40000000,reserved_size: 0x80000 | |
| [693] mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| [694] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0xc0000000, max_addr: 0 x40080000, target: 0, reserved_addr: 0x53f80000,reserved_size: 0x80000 | |
| [696] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [696] mblock[2].start: 0x54080000, sz: 0xf80000, limit: 0xc0000000, max_addr: 0x 54000000, target: 1, reserved_addr: 0x54f80000,reserved_size: 0x80000 | |
| [698] mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| [698] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0xc0000000, max_addr: 0x 55000000, target: 2, reserved_addr: 0x56880000,reserved_size: 0x80000 | |
| [700] mblock_reserve dbg[3]: 1, 1, 1, 1 | |
| [700] mblock[4].start: 0x5f900000, sz: 0x1c1e0000, limit: 0xc0000000, max_addr: 0x56900000, target: 3, reserved_addr: 0x7ba60000,reserved_size: 0x80000 | |
| [702] mblock_reserve dbg[4]: 1, 1, 1, 1 | |
| [702] mblock[5].start: 0x7da00000, sz: 0x25c0000, limit: 0xc0000000, max_addr: 0 x7bae0000, target: 4, reserved_addr: 0x7ff40000,reserved_size: 0x80000 | |
| [704] mblock_reserve dbg[5]: 1, 1, 1, 1 | |
| [704] mblock[6].start: 0x80000000, sz: 0x40000000, limit: 0xc0000000, max_addr: 0x7ffc0000, target: 5, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [706] mblock_reserve dbg[6]: 1, 1, 1, 1 | |
| [707] mblock[7].start: 0xc0000000, sz: 0x3ef00000, limit: 0xc0000000, max_addr: 0xc0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [708] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [709] mblock[8].start: 0xff000000, sz: 0x9c0000, limit: 0xc0000000, max_addr: 0x c0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [710] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [711] mblock[9].start: 0x100000000, sz: 0x40000000, limit: 0xc0000000, max_addr: 0xc0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [712] mblock_reserve dbg[9]: 1, 0, 1, 1 | |
| [713] mblock_reserve: bff80000 - c0000000 from mblock 6 | |
| [713] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [714] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [715] mblock_reserve [2].start: 0x54080000, sz: 0xf80000 | |
| [715] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [716] mblock_reserve [4].start: 0x5f900000, sz: 0x1c1e0000 | |
| [717] mblock_reserve [5].start: 0x7da00000, sz: 0x25c0000 | |
| [717] mblock_reserve [6].start: 0x80000000, sz: 0x3ff80000 | |
| [718] mblock_reserve [7].start: 0xc0000000, sz: 0x3ef00000 | |
| [719] mblock_reserve [8].start: 0xff000000, sz: 0x9c0000 | |
| [719] mblock_reserve [9].start: 0x100000000, sz: 0x40000000 | |
| [720] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [721] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [722] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [722] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [723] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_ad dr_mb | |
| [724] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_a ddr_mb | |
| [725] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_add r_mb | |
| [726] mblock_reserve-R[7].start: 0x55000000, sz: 0x1000000 map:0 name:ramdisk_ad dr_mb | |
| [727] mblock_reserve-R[8].start: 0x7bae0000, sz: 0x1f20000 map:0 name:platform_i nit | |
| [728 | |
| [1028] [show_logo_common: fill_rect_with_content_by_32bit_argb8888 213] | |
| [1029] fb dump: 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff | |
| [1031] [LEDS]LK: mt65xx_backlight_on:level = 63 | |
| [1032] [LEDS]LK: lcd-backlight level is 63 | |
| [1033] cust->mode is 6 | |
| [1033] cust->mode E cust_data= 0x56017bfd; level =63 | |
| [1033] [LEDS]LK: mt65xx_leds_brightness_set is done | |
| [1034] mtk detect key function key = 0 | |
| [1034] [lk logo: mt_disp_show_boot_logo 135] | |
| [1035] [lk logo: init_fb_screen 59] | |
| [1035] mt_get_logo_db_addr: 0x5e900000 | |
| [1036] [lk logo: init_fb_screen 77]MTK_LCM_PHYSICAL_ROTATION = 270 | |
| [1037] [lk logo: sync_anim_version 42] | |
| [1037] [lk logo: init_fb_screen 100]pinfo[0]=0x0000002a, pinfo[1]=0x00189e3a, pi nfo[2]=176 | |
| [1038] [lk logo: init_fb_screen 102]define ANIMATION_NEW:show new animation with capacity num | |
| [1039] [lk logo: init_fb_screen 103]CAPACITY_LEFT =172, CAPACITY_TOP =330 | |
| [1040] [lk logo: init_fb_screen 104]LCM_HEIGHT=307, LCM_WIDTH=546 | |
| [1041] mt_get_tempfb_addr: 0x7ccb0000 ,fb_addr 0x7bae0000 | |
| [1041] [show_animation_common: check_logo_index_valid 71]logonum =42, index =0 | |
| [1042] show_animation_common, in_addr=0x5e9000b0, logolen=35427 | |
| [1043] [decompress_logo decompress_logo 48]in=0x5e9000b0, out=0x7ccb0000, inlen= 35427, logolen=9338880 | |
| [1084] [decompress_logo decompress_logo 97]have=9216000 | |
| [1085] [show_logo_common: fill_rect_with_content 474] | |
| [1085] [show_logo_common: fill_rect_with_content_by_32bit_argb8888 149] | |
| [1147] [show_logo_common: fill_rect_with_content_by_32bit_argb8888 213] | |
| [1148] fb dump: 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff | |
| [1150] [LEDS]LK: mt65xx_backlight_on:level = 63 | |
| [1150] [LEDS]LK: mt65xx_leds_brightness_set is done | |
| [1151] fb dump: 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff | |
| [LK_ENV]get_env MTK_DEVICE_ID | |
| [1154] [PART_LK][get_part] proinfo | |
| [1154] [LK_BOOT] Load 'proinfo' partition to 0x560A6788 (19 bytes in 0 ms) | |
| [1155] Serial #: "0L0V041811" | |
| [1157] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0xc0000000, max_addr: 0x 0, target: -1, reserved_addr: 0x39c80000,reserved_size: 0x6400000 | |
| [1158] mblock_reserve dbg[0]: 1, 0, 1, 1 | |
| [1159] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0xc0000000, max_addr: 0x0, target: -1, reserved_addr: 0x4dc00000,reserved_size: 0x6400000 | |
| [1160] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [1161] mblock[2].start: 0x54080000, sz: 0xf80000, limit: 0xc0000000, max_addr: 0 x54000000, target: 1, reserved_addr: 0x4ec00000,reserved_size: 0x6400000 | |
| [1162] mblock_reserve dbg[2]: 1, 0, 1, 1 | |
| [1163] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0xc0000000, max_addr: 0 x54000000, target: 1, reserved_addr: 0x50500000,reserved_size: 0x6400000 | |
| [1165] mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| [1165] mblock[4].start: 0x5f900000, sz: 0x1c1e0000, limit: 0xc0000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x756e0000,reserved_size: 0x6400000 | |
| [1167] mblock_reserve dbg[4]: 1, 1, 1, 1 | |
| [1167] mblock[5].start: 0x7da00000, sz: 0x25c0000, limit: 0xc0000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0x79bc0000,reserved_size: 0x6400000 | |
| [1169] mblock_reserve dbg[5]: 1, 0, 1, 1 | |
| [1169] mblock[6].start: 0x80000000, sz: 0x3ff80000, limit: 0xc0000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0xb9b80000,reserved_size: 0x6400000 | |
| [1171] mblock_reserve dbg[6]: 1, 1, 1, 1 | |
| [1171] mblock[7].start: 0xc0000000, sz: 0x3ef00000, limit: 0xc0000000, max_addr: 0xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1173] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [1174] mblock[8].start: 0xff000000, sz: 0x9c0000, limit: 0xc0000000, max_addr: 0 xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1175] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [1176] mblock[9].start: 0x100000000, sz: 0x40000000, limit: 0xc0000000, max_addr : 0xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1177] mblock_reserve dbg[9]: 1, 0, 1, 1 | |
| [1178] mblock_reserve: b9b80000 - bff80000 from mblock 6 | |
| [1179] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [1179] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [1180] mblock_reserve [2].start: 0x54080000, sz: 0xf80000 | |
| [1181] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [1181] mblock_reserve [4].start: 0x5f900000, sz: 0x1c1e0000 | |
| [1182] mblock_reserve [5].start: 0x7da00000, sz: 0x25c0000 | |
| [1183] mblock_reserve [6].start: 0x80000000, sz: 0x39b80000 | |
| [1183] mblock_reserve [7].start: 0xc0000000, sz: 0x3ef00000 | |
| [1184] mblock_reserve [8].start: 0xff000000, sz: 0x9c0000 | |
| [1185] mblock_reserve [9].start: 0x100000000, sz: 0x40000000 | |
| [1185] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [1186] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [1187] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [1188] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [1189] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_a ddr_mb | |
| [1190] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_ addr_mb | |
| [1191] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_ad dr_mb | |
| [1192] mblock_reserve-R[7].start: 0x55000000, sz: 0x1000000 map:0 name:ramdisk_a ddr_mb | |
| [1192] mblock_reserve-R[8].start: 0x7bae0000, sz: 0x1f20000 map:0 name:platform_ init | |
| [1193] mblock_reserve-R[9].start: 0xbff80000, sz: 0x80000 map:0 name:atf-ramdump -memory | |
| [1194] mblock_reserve-R[10].start: 0xb9b80000, sz: 0x6400000 map:0 name:avb | |
| [SBC] S-CHIP | |
| [1197] [SEC_POLICY] sboot_state = 0x1 | |
| [1197] [SEC_POLICY] lock_state = 0x4 | |
| [1197] [avb] img_auth_required = 1 | |
| [1411] [AVB20] lock_state = | |
| [1693] [PROFILE] ::: lvl(1) decompress_kernel takes 2 45 ms | |
| [1693] model=MT8168A | |
| [1694] efuse set max_clk_freq=1300000000 | |
| [1694] cluster-0: 4 core | |
| [1696] PASS memory DTS node | |
| [1696] LASTPC[0][0] = ffd91fe2 | |
| [1697] LASTPC[0][1] = 2881bff0 | |
| [1697] LASTPC[0][2] = 8100a291 | |
| [1697] LASTPC[0][3] = 800020d4 | |
| [1698] LASTPC[0][4] = 80e1900 | |
| [1698] LASTPC[0][5] = 490d6024 | |
| [1698] LASTPC[0][6] = 1941e981 | |
| [1699] LASTPC[0][7] = 61c88000 | |
| [1699] LASTPC[1][0] = 0 | |
| [1699] LASTPC[1][1] = 0 | |
| [1700] LASTPC[1][2] = 0 | |
| [1700] LASTPC[1][3] = 0 | |
| [1700] LASTPC[1][4] = 0 | |
| [1701] LASTPC[1][5] = 0 | |
| [1701] LASTPC[1][6] = 0 | |
| [1701] LASTPC[1][7] = 0 | |
| [1701] LASTPC[2][0] = 0 | |
| [1702] LASTPC[2][1] = 0 | |
| [1702] LASTPC[2][2] = 0 | |
| [1702] LASTPC[2][3] = 0 | |
| [1703] LASTPC[2][4] = 0 | |
| [1703] LASTPC[2][5] = 0 | |
| [1703] LASTPC[2][6] = 0 | |
| [1703] LASTPC[2][7] = 0 | |
| [1704] LASTPC[3][0] = 0 | |
| [1704] LASTPC[3][1] = 0 | |
| [1704] LASTPC[3][2] = 0 | |
| [1705] LASTPC[3][3] = 0 | |
| [1705] LASTPC[3][4] = 0 | |
| [1705] LASTPC[3][5] = 0 | |
| [1705] LASTPC[3][6] = 0 | |
| [1706] LASTPC[3][7] = 0 | |
| [1709] target_atag_imix_r:170 | |
| [1711] fg_swocv_v buf [0], [0x560c8128:0x560c8129:1] | |
| [1711] fg_swocv_i buf [0], [0x560c8128:0x560c8129:1] | |
| [1712] shutdown_time buf [0], [0x560c8128:0x560c8129:1] | |
| [1713] boot_voltage buf [0], [0x560c8128:0x560c8129:1] | |
| [1714] boot_voltage buf [0], [0x560c8128:0x560c8129:1] | |
| [1715] Not Support VCORE DVFS | |
| [1754] mt_disp_get_lcd_time, fps=5964 | |
| [1754] videolfb - fb_base = 0x7bae0000 | |
| [1754] videolfb - islcmfound = 1 | |
| [1755] videolfb - fps = 5964 | |
| [1755] videolfb - vram = 32636928 | |
| [1756] videolfb - lcmname = kd101n92_45ni_a003_dsi | |
| [1757] [ccci] modem mem arguments info using default | |
| [1758] PTP_INFO Only support in MT6795 | |
| start dump lk masp atag | |
| dump sw sbc:0x22, sw sdl:0x22 , hw sbc: 1 | |
| dump lock_state, 0x1 | |
| [1761] create masp atag OK | |
| [1761] tee_reserved_mem not supported | |
| [1762] [LK] non_secure_sram (0x111d00, 0x300) | |
| [1762] [PROFILE] ::: lvl(0) 1st logo takes 0 ms | |
| [1763] [PROFILE] ::: lvl(0) boot_time takes 1762 ms | |
| [1764] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0x100000000, max_addr: 0 x0, target: -1, reserved_addr: 0x40000000,reserved_size: 0x80000 | |
| [1765] mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| [1766] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0x100000000, max_addr: 0x40080000, target: 0, reserved_addr: 0x50000000,reserved_size: 0x80000 | |
| [1767] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [1768] mblock[2].start: 0x54080000, sz: 0xf80000, limit: 0x100000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x50000000,reserved_size: 0x80000 | |
| [1769] mblock_reserve dbg[2]: 1, 0, 1, 1 | |
| [1770] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0x100000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x50000000,reserved_size: 0x80000 | |
| [1772] mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| [1772] mblock[4].start: 0x5f900000, sz: 0x1c1e0000, limit: 0x100000000, max_addr : 0x54000000, target: 1, reserved_addr: 0x70000000,reserved_size: 0x80000 | |
| [1774] mblock_reserve dbg[4]: 1, 1, 1, 1 | |
| [1774] mblock[5].start: 0x7da00000, sz: 0x25c0000, limit: 0x100000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0x70000000,reserved_size: 0x80000 | |
| [1776] mblock_reserve dbg[5]: 1, 0, 1, 1 | |
| [1776] mblock[6].start: 0x80000000, sz: 0x3ff80000, limit: 0x100000000, max_addr : 0x7bae0000, target: 4, reserved_addr: 0xb0000000,reserved_size: 0x80000 | |
| [1778] mblock_reserve dbg[6]: 1, 1, 1, 1 | |
| [1778] mblock[7].start: 0xc0000000, sz: 0x3ef00000, limit: 0x100000000, max_addr : 0xbff80000, target: 6, reserved_addr: 0xf0000000,reserved_size: 0x80000 | |
| [1780] mblock_reserve dbg[7]: 1, 1, 1, 1 | |
| [1781] mblock[8].start: 0xff000000, sz: 0x9c0000, limit: 0x100000000, max_addr: 0xfef00000, target: 7, reserved_addr: 0xf0000000,reserved_size: 0x80000 | |
| [1782] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [1783] mblock[9].start: 0x100000000, sz: 0x40000000, limit: 0x100000000, max_add r: 0xfef00000, target: 7, reserved_addr: 0xf0000000,reserved_size: 0x80000 | |
| [1784] mblock_reserve dbg[9]: 1, 0, 1, 1 | |
| [1785] mblock[7]: c0000000, 30000000 from mblock | |
| mblock[8]: f0080000, ee80000 from mblock | |
| [1786] mblock_reserve: f0000000 - f0080000 from mblock 7 | |
| [1787] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [1787] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [1788] mblock_reserve [2].start: 0x54080000, sz: 0xf80000 | |
| [1788] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [1789] mblock_reserve [4].start: 0x5f900000, sz: 0x1c1e0000 | |
| [1790] mblock_reserve [5].start: 0x7da00000, sz: 0x25c0000 | |
| [1790] mblock_reserve [6].start: 0x80000000, sz: 0x3ff80000 | |
| [1791] mblock_reserve [7].start: 0xc0000000, sz: 0x30000000 | |
| [1792] mblock_reserve [8].start: 0xf0080000, sz: 0xee80000 | |
| [1792] mblock_reserve [9].start: 0xff000000, sz: 0x9c0000 | |
| [1793] mblock_reserve [10].start: 0x100000000, sz: 0x40000000 | |
| [1794] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [1795] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [1795] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [1796] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [1797] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_a ddr_mb | |
| [1798] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_ addr_mb | |
| [1799] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_ad dr_mb | |
| [1800] mblock_reserve-R[7].start: 0x55000000, sz: 0x1000000 map:0 name:ramdisk_a ddr_mb | |
| [1801] mblock_reserve-R[8].start: 0x7bae0000, sz: 0x1f20000 map:0 name:platform_ iniwapper/3]Detected VIPT I-cache on CPU3 | |
| [ 0.103776] -(3)[0:swapper/3]GICv3: CPU3: found redistributor 3 region 0:0x00 0000000c0e0000 | |
| [ 0.103805] -(3)[0:swapper/3]CPU3: Booted secondary processor [410fd034] | |
| [ 0.103960] -(0)[1:swapper/0]smp: Brought up 1 node, 4 CPUs | |
| [ 0.112681] -(0)[1:swapper/0]SMP: Total of 4 processors activated. | |
| [ 0.113482] -(0)[1:swapper/0]CPU features: detected feature: GIC system regis ter CPU interface | |
| [ 0.114597] -(0)[1:swapper/0]CPU features: detected feature: 32-bit EL0 Suppo rt | |
| [ 0.115551] -(0)[1:swapper/0]CPU features: detected feature: Kernel page tabl e isolation (KPTI) | |
| [ 0.118808] -(0)[1:swapper/0]CPU: All CPU(s) started at EL2 | |
| [ 0.119542] -(0)[11:migration/0]alternatives: patching kernel code | |
| [ 0.120545] -(0)[1:swapper/0]Sort hmp_domains from little to big: | |
| [ 0.121335] -(0)[1:swapper/0] cpumask: 0x0f | |
| [ 0.121911] -(0)[1:swapper/0]Initializing HMP scheduler: | |
| [ 0.122599] -(0)[1:swapper/0]Initializing HMP scheduler done | |
| [ 0.123385] -(0)[1:swapper/0]CPU3: update max cpu_capacity 1024 | |
| [ 0.123398] -(0)[1:swapper/0]WARN: cpu=0, domain=DIE: incr. energy eff 871[0] ->920[1] | |
| [ 0.125185] -(0)[1:swapper/0]WARN: cpu=0, domain=DIE: incr. energy eff 920[1] ->958[2] | |
| [ 0.126199] -(0)[1:swapper/0]WARN: cpu=0, domain=DIE: incr. energy eff 958[2] ->965[3] | |
| [ 0.127213] -(0)[1:swapper/0]WARN: cpu=0, domain=DIE: incr. energy eff 965[3] ->965[4] | |
| [ 0.136278] -(0)[1:swapper/0]Registered cp15_barrier emulation handler | |
| [ 0.137136] -(0)[1:swapper/0]Registered setend emulation handler | |
| [ 0.138073] -(1)[16:kworker/1:0]CPU1: update max cpu_capacity 1024 | |
| [ 0.138142] -(0)[1:swapper/0]clocksource: jiffies: mask: 0xffffffff max_cycle s: 0xffffffff, max_idle_ns: 7645041785100000 ns | |
| [ 0.140397] -(0)[1:swapper/0]futex hash table entries: 1024 (order: 4, 65536 bytes) | |
| [ 0.141537] -(0)[1:swapper/0]pinctrl core: initialized pinctrl subsystem | |
| [ 0.142923] -(0)[1:swapper/0]DMI not present or invalid. | |
| [ 0.143749] -(0)[1:swapper/0]NET: Registered protocol family 16 | |
| [ 0.145253] -(0)[1:swapper/0]schedtune: configured to support 5 boost groups | |
| [ 0.146249] -(0)[1:swapper/0]ramoops: using module parameters | |
| [ 0.147072] -(0)[1:swapper/0]ramoops: pstore:address is 0x54410000, size is 0 xe0000, console_size is 0x40000, pmsg_size is 0x10000 | |
| [ 0.151371] -(0)[1:swapper/0]pstore: using zlib compression | |
| [ 0.152482] -(0)[1:swapper/0]console [pstore-1] enabled | |
| [ 0.153212] -(0)[1:swapper/0]pstore: Registered ramoops as persistent store b ackend | |
| [ 0.154206] -(0)[1:swapper/0]ramoops: attached 0xe0000@0x54410000, ecc: 0/0 | |
| [ 0.155322] -(0)[1:swapper/0]mt_pwrap_init++++ | |
| [ 0.156007] -(0)[1:swapper/0]PWRAP reg: 0xffffff80096fc000, irq: 7 | |
| [ 0.157019] -(0)[1:swapper/0]is_pwrap_init_done 1 | |
| [ 0.157663] -(0)[1:swapper/0]mt_pwrap_init---- | |
| [ 0.158459] -(1)[1:swapper/0]cpuidle: using governor menu | |
| [ 0.159886] -(1)[1:swapper/0]vdso: 2 pages (1 code @ ffffff8008ca6000, 1 data @ ffffff80091b4000) | |
| [ 0.161042] -(1)[1:swapper/0]hw-breakpoint: found 6 breakpoint and 4 watchpoi nt registers. | |
| [ 0.162281] -(0)[1:swapper/0]DMA: preallocated 256 KiB pool for atomic alloca tions | |
| [ 0.163358] -(0)[1:swapper/0]mrdump_cblock_init: no mrdump_cb | |
| [ 0.164161] -(0)[1:swapper/0]mirdump: reserved 544f0000+8000->ffffff80097d300 0 | |
| [ 0.164306] -(0)[1:swapper/0]mrdump_full_init: MT-RAMDUMP no control block | |
| [ 0.166342] -(0)[1:swapper/0] | |
| [ 0.166342] MTK_SIP_KERNEL_WDT - 0xffffff80086add00 | |
| [ 0.167407] -(0)[1:swapper/0] | |
| [ 0.167407] atf_aee_debug_virt_addr = 0xffffff80097e8000 | |
| [ 0.168529] -(0)[1:swapper/0][CMDQ]cmdq_init enter | |
| [ 0.168578] -(0)[1:swapper/0][cmdq] cmdq_init enter | |
| [ 0.203909] -(0)[1:swapper/0]BOOTPROF: 203.905461:probe: probe=platform _drv_probe drv=clk-mt8168(ffffff8009226950) 18.246308ms | |
| [ 0.208919] -(0)[1:swapper/0]mtk pctrl init OK | |
| [ 0.212651] -(0)[1:sw | |
| ▒[kIJ | |
| ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
| INFRA_BUS_DCM_CTRL 5F7FE0 | |
| mtcmos Start.. | |
| before: WDT_SWSYSRST = 0x8000 | |
| after: WDT_SWSYSRST = 0x9000 | |
| P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
| [PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
| [PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
| [PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
| [PWRAP] Read Test pass, return_value=0x0 | |
| [PWRAP] Write Test pass | |
| [PWRAP] RECORD_CMD0: 0xA08 (Last one command addr) | |
| [PWRAP] RECORD_WDATA0:0x0 (Last one command wdata) | |
| [PWRAP] RECORD_CMD1: 0x5C2 (Last second command addr) | |
| [PWRAP] RECORD_WDATA1:0x1 (Last second command wdata) | |
| [PWRAP] RECORD_CMD2: 0x588 (Last third command addr) | |
| [PWRAP] RECORD_WDATA2:0x4321 (Last third command wdata) | |
| [PWRAP] init pass, ret=0. | |
| [PMIC]Preloader Start | |
| [PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
| [PMIC]POWER_HOLD :0x1 | |
| [PMIC]TOP_RST_STATUS[0x152]=0x4F | |
| [PMIC]PONSTS[0xC]=0x4 | |
| [PMIC]POFFSTS[0xE]=0x80 | |
| [PMIC]PGSTATUS0[0x14]=0xFFFE | |
| [PMIC]PSOCSTATUS[0x16]=0x0 | |
| [PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
| [PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
| [PMIC]THERMALSTATUS[0x18]=0x0 | |
| [PMIC]STRUP_CON4[0xA1C]=0x0 | |
| [PMIC]TOP_RST_MISC[0x14C]=0x200 | |
| [PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
| latch VPROC 800000 uV | |
| latch VSRAM_PROC 900000 uV | |
| latch VSRAM_OTHERS 900000 uV | |
| latch VCORE 800000 uV | |
| latch VMODEM 800000 uV | |
| [PMIC]just_rst = 0 | |
| No EFUSE SW Load | |
| [PMIC]pmic_wdt_set Reg[0x14C]=0x221 | |
| [rt5738_driver_probe] | |
| [rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
| mt6691_vdd2_hw_init | |
| [0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
| [rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
| register vs1 OK | |
| register vmodem OK | |
| register vcore OK | |
| register vproc OK | |
| register vpa OK | |
| register vsram_others OK | |
| register vsram_proc OK | |
| register vdram OK | |
| register vfe28 OK | |
| [PMIC]Init done | |
| ac 0,usb 1 | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20201104-090402 | |
| clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
| clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
| clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 A2B5 A2AA 9455 11 1 | |
| clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 A2B5 A2AA 9455 11 0 | |
| clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
| clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
| [RTC] enable_dcxo first con = 0x4A6, osc32con = 0xDE6E, sec = 0x202A | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3983 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
| [RTC] bbpu = 0x1, con = 0x4A6, osc32con = 0xDE6E, sec = 0x202A, yea = 0xC502 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC]switch to dcxo | |
| [RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
| [RTC] get_frequency_meter: input=0xF, ouput=810 | |
| [RTC] EOSC_Cali: val=0x32A | |
| [RTC] get_frequency_meter: input=0x7, ouput=700 | |
| [RTC] EOSC_Cali: val=0x2BC | |
| [RTC] get_frequency_meter: input=0xB, ouput=756 | |
| [RTC] EOSC_Cali: val=0x2F4 | |
| [RTC] get_frequency_meter: input=0xD, ouput=783 | |
| [RTC] EOSC_Cali: val=0x30F | |
| [RTC] get_frequency_meter: input=0xE, ouput=797 | |
| [RTC] EOSC_Cali: val=0x31D | |
| [RTC] get_frequency_meter: input=0xD, ouput=784 | |
| [RTC] get_frequency_meter: input=0xE, ouput=797 | |
| [RTC] EOSC cali val = 0xDE4E | |
| [RTC] RTC_SPAR0=0x0 | |
| [RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
| [RTC] 32k-less mode | |
| [RTC] rtc_2sec_reboot_check 0x202A, without 2sec reboot, type 0x0 | |
| [RTC] rtc 2sec reboot is not enabled | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [PMIC] pmic_init_setting end. v180413 | |
| [MT6357] 1 6,61 | |
| [MT6357] 1 2,45 | |
| [MT6357] 1 1,48 | |
| [MT6357] get volt 5, 61, 900000 | |
| vsram_others = 900000 uV | |
| [MT6357] get volt 3, 45, 800000 | |
| vproc = 800000 uV | |
| [MT6357] get volt 6, 61, 900000 | |
| vsram_proc = 900000 uV | |
| [MT6357] get volt 2, 45, 800000 | |
| vcore = 800000 uV | |
| [MT6357] get volt 1, 48, 800000 | |
| vmodem = 800000 uV | |
| [MT6357] 2 6,1 | |
| [MT6357] 2 5,1 | |
| [MT6357] 2 3,1 | |
| [MT6357] 2 2,1 | |
| [RGU] EMI_DCS_SUCCESS 0 | |
| [RGU] DVFSRC_SUCCESS 0 | |
| [RGU] MODE: 0x4D | |
| [RGU] STA: 0x0 | |
| [RGU] LENGTH: 0xFFE0 | |
| [RGU] INTERVAL: 0xFFF | |
| [RGU] SWSYSRST: 0x9000 | |
| [RGU] LATCH_CTL: 0x0 | |
| [RGU] NONRST_REG2: 0x0 | |
| [RGU] DEBUG_CTL: 0x200F1 | |
| [RGU] g_rgu_status: 0 (0x0) | |
| [RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| [RGU] rst from: ? | |
| [RGU] bypass pwrkey: wdt does not trigger rst | |
| [RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
| [RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1 | |
| [RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x100070A0, val: 0x2FF | |
| [RGU] rgu_update_reg: 1, bits: 0x200, addr: 0x100070A0, val: 0x2FF | |
| [RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL(0x200F1) | |
| [RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL2(0x2FF) | |
| [RGU] mtk_wdt_init: MTK_WDT_LATCH_CTL(0xB871) | |
| [RGU] mtk_wdt_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x0 ! | |
| [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
| [RTC] bbpu = 0x1, con = 0x486, cali = 0x202A, osc32con = | |
| [PLFM] Init Boot Device: OK(0) | |
| EMI_MPU_CTRL=0 1st | |
| EMI_MPU_CTRL=0 2nd | |
| [RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
| [RGU] WDT DDR reserve mode FAIL! 200F1 | |
| [RGU] DDR RESERVE Success 0 | |
| [RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
| [RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
| [GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
| [dramc] init partition address is 0x0000000000380000 | |
| init_dram:1660: init_dram Starting | |
| [MT6357] 2 8,0 | |
| [MT6357] 2 7,0 | |
| [set_dram_voltage]set dram voltage done!!! | |
| [MT6357] 1 2,25 | |
| [dramc]cold boot | |
| [dramc] read off[2] = 6 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
| [CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
| [CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 355 | |
| [CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
| [CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
| [CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
| [CH1][RK0][1600][CBT] Best CA Vref 18, Window Min 56 at CA4, Window Sum 351 | |
| [CH1][RK1][1600][CBT] Best CA Vref 18, Window Min 56 at CA4, Window Sum 349 | |
| [CH1][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ13, Window Sum 429 | |
| [CH1][RK0][1600][RX] Best Vref 29, Window Min 52 at DQ10, Window Sum 883 | |
| [CH1][RK1][1600][TX] Best Vref 8, Window Min 25 at DQ14, Window Sum 426 [FAST_K] Bypass saving calibration result to emmc | |
| [MT6357] 1 2,37 | |
| [dramc] read off[1] = 4 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0 | |
| [CH0][RK0][2666][CBT] Best CA Vref 18, Window Min 52 at CA4, Window Sum 332 | |
| [CH0][RK1][2666][CBT] Best CA Vref 16, Window Min 53 at CA4, Window Sum 338 | |
| [CH0][RK0][2666][TX] Best Vref 12, Window Min 23 at DQ14, Window Sum 428 | |
| [CH0][RK0][2666][RX] Best Vref 14, Window Min 33 at DQ0, Window Sum 563 | |
| [CH0][RK1][2666][TX] Best Vref 12, Window Min 23 at DQ11, Window Sum 411 | |
| [CH1][RK0][2666][CBT] Best CA Vref 18, Window Min 51 at CA4, Window Sum 335 | |
| [CH1][RK1][2666][CBT] Best CA Vref 16, Window Min 51 at CA4, Window Sum 333 | |
| [CH1][RK0][2666][TX] Best Vref 10, Window Min 23 at DQ15, Window Sum 419 | |
| [CH1][RK0][2666][RX] Best Vref 14, Window Min 34 at DQ4, Window Sum 594 | |
| [CH1][RK1][2666][TX] Best Vref 10, Window Min 21 at DQ6, Window Sum 401 [FAST_K] Bypass saving calibration result to emmc | |
| [MT6357] 1 2,45 | |
| [dramc] read off[0] = 2 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU0, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0 | |
| [CH0][RK0][3200][CBT] Best CA Vref 18, Window Min 51 at CA4, Window Sum 327 | |
| [CH0][RK1][3200][CBT] Best CA Vref 16, Window Min 52 at CA4, Window Sum 328 | |
| [CH0][RK0][3200][TX] Best Vref 12, Window Min 20 at DQ0, Window Sum 358 | |
| [CH0][RK0][3200][RX] Best Vref 14, Window Min 29 at DQ7, Window Sum 489 | |
| [CH0][RK1][3200][TX] Best Vref 14, Window Min 20 at DQ14, Window Sum 361 | |
| [CH1][RK0][3200][CBT] Best CA Vref 18, Window Min 51 at CA4, Window Sum 333 | |
| [CH1][RK1][3200][CBT] Best CA Vref 16, Window Min 51 at CA4, Window Sum 328 | |
| [CH1][RK0][3200][TX] Best Vref 12, Window Min 21 at DQ3, Window Sum 369 | |
| [CH1][RK0][3200][RX] Best Vref 14, Window Min 31 at DQ3, Window Sum 520 | |
| [CH1][RK1][3200][TX] Best Vref 10, Window Min 20 at DQ9, Window Sum 360 [FAST_K] Bypass saving calibration result to emmc | |
| [dramc_run_time_config] | |
| TX_TRACKING: ON | |
| RX_TRACKING: ON | |
| HW_GATING: ON | |
| HW_GATING DBG: OFF | |
| DUMMY_READ_FOR_TRACKING: ON | |
| ZQCS_ENABLE_LP4: ON | |
| LOWPOWER_GOLDEN_SETTINGS(DCM): ON | |
| DUMMY_READ_FOR_DQS_GATING_RETRY: OFF | |
| IMPEDANCE_TRACKING: ON | |
| TEMP_SENSOR: ON | |
| PER_BANK_REFRESH: ON | |
| HW_SAVE_FOR_SR: ON | |
| SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON | |
| CLK_FREE_FUN_FOR_DRAMC_PSEL: ON | |
| PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON | |
| Read ODT Tracking: ON | |
| DQS Precalculation for DVFS: ON | |
| Step1: Set DVFS HW enable | |
| Step2: Set jump ratio | |
| Step1: Set DVFS HW enable | |
| Step2: Set jump ratio | |
| ========================= | |
| [switch_dramc_voltage_to_auto_mode]switch dram voltage to auto mode done!!! | |
| [Dram_Buffer] dram size: 0x0 | |
| [Dram_Buffer] dram_buf_t size: 0x180FC0 | |
| [Dram_Buffer] part_hdr_t size: 0x200 | |
| [Dram_Buffer] g_dram_buf start addr: 0x42000000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x42180E00 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x42180EC0 | |
| RAM_CONSOLE using default | |
| RAM_CONSOLE start: 0x54400000, size: 0x10000, sig: 0xFFFFFFFF | |
| RAM_CONSOLE wdt status (0x0)=0x0 | |
| orig_dram_info[0] start: 0x0000000040000000, size: 0x0000000080000000 | |
| orig_dram_info[1] start: 0x00000000C0000000, size: 0x0000000080000000 | |
| CUSTOM_CONFIG_MAX_DRAM_SIZE: 0x0000000100000000 | |
| total_dram_size: 0x0000000100000000, max_dram_size: 0x0000000100000000 | |
| [GPT_PL]Parsing Primary GPT now... | |
| [GPT_PL][0]name=proinfo, part_id=8, start_sect=0x400, nr_sects=0x1800 | |
| [GPT_PL][1]name=boot_para, part_id=8, start_sect=0x1C00, nr_sects=0x800 | |
| [GPT_PL][2]name=cam_vpu1, part_id=8, start_sect=0x2400, nr_sects=0x7800 | |
| [GPT_PL][3]name=cam_vpu2, part_id=8, start_sect=0x9C00, nr_sects=0x7800 | |
| [GPT_PL][4]name=cam_vpu3, part_id=8, start_sect=0x11400, nr_sects=0x7800 | |
| [GPT_PL][5]name=nvram, part_id=8, start_sect=0x18C00, nr_sects=0x2800 | |
| [GPT_PL][6]name=protect1, part_id=8, start_sect=0x1B400, nr_sects=0x5000 | |
| [GPT_PL][7]name=protect2, part_id=8, start_sect=0x20400, nr_sects=0x5000 | |
| [GPT_PL][8]name=persist, part_id=8, start_sect=0x25400, nr_sects=0x18000 | |
| [GPT_PL][9]name=nvcfg, part_id=8, start_sect=0x3D400, nr_sects=0x4000 | |
| [GPT_PL][10]name=seccfg, part_id=8, start_sect=0x41400, nr_sects=0x200 | |
| [GPT_PL][11]name=lk, part_id=8, start_sect=0x41600, nr_sects=0x800 | |
| [GPT_PL][12]name=lk2, part_id=8, start_sect=0x41E00, nr_sects=0x800 | |
| [GPT_PL][13]name=boot, part_id=8, start_sect=0x42600, nr_sects=0x8000 | |
| [GPT_PL][14]name=recovery, part_id=8, start_sect=0x4A600, nr_sects=0x8000 | |
| [GPT_PL][15]name=para, part_id=8, start_sect=0x52600, nr_sects=0x400 | |
| [GPT_PL][16]name=logo, part_id=8, start_sect=0x52A00, nr_sects=0x4000 | |
| [GPT_PL][17]name=dtbo, part_id=8, start_sect=0x56A00, nr_sects=0x4000 | |
| [GPT_PL][18]name=expdb, part_id=8, start_sect=0x5AA00, nr_sects=0x5000 | |
| [GPT_PL][19]name=frp, part_id=8, start_sect=0x5FA00, nr_sects=0x800 | |
| [GPT_PL][20]name=nvdata, part_id=8, start_sect=0x60200, nr_sects=0x10000 | |
| [GPT_PL][21]name=tee1, part_id=8, start_sect=0x70200, nr_sects=0x2800 | |
| [GPT_PL][22]name=tee2, part_id=8, start_sect=0x72A00, nr_sects=0x2800 | |
| [GPT_PL][23]name=kb, part_id=8, start_sect=0x75200, nr_sects=0x1000 | |
| [GPT_PL][24]name=dkb, part_id=8, start_sect=0x76200, nr_sects=0x1000 | |
| [GPT_PL][25]name=metadata, part_id=8, start_sect=0x77200, nr_sects=0x10000 | |
| [GPT_PL][26]name=vbmeta, part_id=8, start_sect=0x87200, nr_sects=0x5A00 | |
| [GPT_PL][27]name=system, part_id=8, start_sect=0x8CC00, nr_sects=0x2A2000 | |
| [GPT_PL][28]name=vendor, part_id=8, start_sect=0x32EC00, nr_sects=0xC8000 | |
| [GPT_PL][29]name=factory, part_id=8, start_sect=0x3F6C00, nr_sects=0x8000 | |
| [GPT_PL][30]name=cache, part_id=8, start_sect=0x3FEC00, nr_sects=0x200000 | |
| [GPT_PL][31]name=userdata, part_id=8, start_sect=0x5FEC00, nr_sects=0x17203DF | |
| [GPT_PL][32]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][33]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][34]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][35]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][36]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][37]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][38]name=, par | |
| [PART] [0x0000000004A80000-0x0000000007A7FFFF] "persist" (98304 blocks) | |
| [PART] [0x0000000007A80000-0x000000000827FFFF] "nvcfg" (16384 blocks) | |
| [PART] [0x0000000008280000-0x00000000082BFFFF] "seccfg" (512 blocks) | |
| [PART] [0x00000000082C0000-0x00000000083BFFFF] "lk" (2048 blocks) | |
| [PART] [0x00000000083C0000-0x00000000084BFFFF] "lk2" (2048 blocks) | |
| [PART] [0x00000000084C0000-0x00000000094BFFFF] "boot" (32768 blocks) | |
| [PART] [0x00000000094C0000-0x000000000A4BFFFF] "recovery" (32768 blocks) | |
| [PART] [0x000000000A4C0000-0x000000000A53FFFF] "para" (1024 blocks) | |
| [PART] [0x000000000A540000-0x000000000AD3FFFF] "logo" (16384 blocks) | |
| [PART] [0x000000000AD40000-0x000000000B53FFFF] "dtbo" (16384 blocks) | |
| [PART] [0x000000000B540000-0x000000000BF3FFFF] "expdb" (20480 blocks) | |
| [PART] [0x000000000BF40000-0x000000000C03FFFF] "frp" (2048 blocks) | |
| [PART] [0x000000000C040000-0x000000000E03FFFF] "nvdata" (65536 blocks) | |
| [PART] [0x000000000E040000-0x000000000E53FFFF] "tee1" (10240 blocks) | |
| [PART] [0x000000000E540000-0x000000000EA3FFFF] "tee2" (10240 blocks) | |
| [PART] [0x000000000EA40000-0x000000000EC3FFFF] "kb" (4096 blocks) | |
| [PART] [0x000000000EC40000-0x000000000EE3FFFF] "dkb" (4096 blocks) | |
| [PART] [0x000000000EE40000-0x0000000010E3FFFF] "metadata" (65536 blocks) | |
| [PART] [0x0000000010E40000-0x000000001197FFFF] "vbmeta" (23040 blocks) | |
| [PART] [0x0000000011980000-0x0000000065D7FFFF] "system" (2760704 blocks) | |
| [PART] [0x0000000065D80000-0x000000007ED7FFFF] "vendor" (819200 blocks) | |
| [PART] [0x000000007ED80000-0x000000007FD7FFFF] "factory" (32768 blocks) | |
| [PART] [0x000000007FD80000-0x00000000BFD7FFFF] "cache" (2097152 blocks) | |
| [PART] [0x00000000BFD80000-0x00000003A3DFBDFF] "userdata" (24249311 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x0000000 | |
| [BLDR_MTEE] sha256 takes 1 (ms) for 122816 bytes | |
| [BLDR_MTEE] rsa2048 takes 57 (ms) | |
| [BLDR_MTEE] verify pkcs#1 pss takes 1 (ms) | |
| [BLDR_MTEE] aes128cbc takes 1 (ms) for 122816 | |
| [PART] partition name = tee1 | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x4 | |
| [PART] img_auth_required = 1 | |
| [PART] partition hdr (1) | |
| [PART] Image with part header | |
| [PART] name : tee | |
| [PART] addr : 600000h mode : 0 | |
| [PART] size : 2440192 | |
| [PART] magic: 58881688h | |
| sbc_en = 1 | |
| sbc_en = 1 | |
| [SBC] cert verify, part = tee1, img = tee...ok | |
| [PART] part: tee1 img: tee cert vfy(146 ms) | |
| mblock[0].start: 0x0000000040000000, sz: 0x000000003FFC0000, limit: 0x0000000100000000, max_addr: 0x0000000000000000, target: -1, reserved_addr: 0x000000007F980000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| mblock[1].start: 0x0000000080000000, sz: 0x0000000040000000, limit: 0x0000000100000000, max_addr: 0x000000007FFC0000, target: 0, reserved_addr: 0x00000000BF9C0000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| mblock[2].start: 0x00000000C0000000, sz: 0x0000000080000000, limit: 0x0000000100000000, max_addr: 0x00000000C0000000, target: 1, reserved_addr: 0x00000000FF9C0000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| mblock[2]: 00000000C0000000, 000000003F9C0000 from mblock | |
| mblock[3]: 0000000100000000, 0000000040000000 from mblock | |
| mblock_reserve: 00000000FF9C0000 - 0000000100000000 from mblock 2 | |
| mblock_reserve[0].start: 0x0000000040000000, sz: 0x000000003FFC0000 | |
| mblock_reserve[1].start: 0x0000000080000000, sz: 0x0000000040000000 | |
| mblock_reserve[2].start: 0x00000000C0000000, sz: 0x000000003F9C0000 | |
| mblock_reserve[3].start: 0x0000000100000000, sz: 0x0000000040000000 | |
| mblock_reserve-R[0].start: 0x000000007FFC0000, sz: 0x0000000000040000 map:1 name:log_store | |
| mblock_reserve-R[1].start: 0x00000000FF9C0000, sz: 0x0000000000640000 map:0 name:tee | |
| [PART] load "tee1" from 0x000000000E05F470 (dev) to 0xFFA00000 (mem) [SUCCESS] | |
| [PART] load speed: 41806KB/s, 2440192 bytes, 57ms | |
| [PART] img vfy...[SBC] img auth ok | |
| ok | |
| [PART] part: tee1 img: tee vfy(190 ms) | |
| [BLDR_MTEE] sha256 takes 12 (ms) for 2439616 bytes | |
| [BLDR_MTEE] rsa2048 takes 57 (ms) | |
| [BLDR_MTEE] verify pkcs#1 pss takes 1 (ms) | |
| [BLDR_MTEE] aes128cbc takes 15 (ms) for 2439616 | |
| [TZ_INIT] TEE start entry : 0xFFA00000 | |
| [TZ_INIT] MEID : 0xC5, 0xFE, 0xD2, 0xA8 | |
| [TZ_INIT] MEID : 0xEE, 0xD9, 0x5D, 0x10 | |
| [TZ_INIT] MEID : 0xE7, 0x2C, 0xC1, 0xD6 | |
| [TZ_INIT] MEID : 0x47, 0x65, 0xFB, 0xD8 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x54601000 | |
| [BLDR] part_load_raw_part ret=0x0 | |
| [BLDR] part_load_images ret=0x0 | |
| [BLDR] - wdt_rpmb_program_mode MTK_WDT_NONRST_REG2: 40000000 | |
| [PICACHU]start_picachu | |
| [PICACHU] dram_rank_size[0] = 0x0000000080000000 | |
| [PICACHU] dram_rank_size[1] = 0x0000000080000000 | |
| [PICACHU] before modify dram_size = 0x0000000100000000 | |
| [PICACHU] CFG_DRAM_ADDR = 0x40000000 | |
| [PICACHU] after modify dram_size = 0x00000000BF000000 | |
| [PICACHU] pi_dram_log_addr max address = 0xFF000000 | |
| mblock[0].start: 0x0000000040000000, sz: 0x000000003FFC0000, limit: 0x00000000FF000000, max_addr: 0x0000000000000000, target: -1, reserved_addr: 0x000000007FE00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| mblock[1].start: 0x0000000080000000, sz: 0x0000000040000000, limit: 0x00000000FF000000, max_addr: 0x000000007FFC0000, target: 0, reserved_addr: 0x00000000BFF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| mblock[2].start: 0x00000000C0000000, sz: 0x000000003F9C0000, limit: 0x00000000FF000000, max_addr: 0x00000000C0000000, target: 1, reserved_addr: 0x00000000FEF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| mblock[3].start: 0x0000000100000000, sz: 0x0000000040000000, limit: 0x00000000FF000000, max_addr: 0x00000000FF9C0000, target: 2, reserved_addr: 0x00000000FEF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| mblock[2]: 00000000C0000000, 000000003EF00000 from mblock | |
| mblock[3]: 00000000FF000000, 00000000009C0000 from mblock | |
| mblock_reserve: 00000000FEF00000 - 00000000FF000000 from mblock 2 | |
| mblock_reserve[0].start: 0x0000000040000000, sz: 0x000000003FFC0000 | |
| mblock_reserve[1].start: 0x0000000080000000, sz: 0x0000000040000000 | |
| mblock_reserve[2].start: 0x00000000C0000000, sz: 0x000000003EF00000 | |
| mblock_reserve[3].start: 0x00000000FF000000, sz: 0x00000000009C0000 | |
| mblock_reserve[4].start: 0x0000000100000000, sz: 0x0000000040000000 | |
| mblock_reserve-R[0].start: 0x000000007FFC0000, sz: 0x0000000000040000 map:1 name:log_store | |
| mblock_reserve-R[1].start: 0x00000000FF9C0000, sz: 0x0000000000640000 map:0 name:tee | |
| mblock_reserve-R[2].start: 0x00000000FEF00000, sz: 0x0000000000100000 map:0 name:PICACHU | |
| [pmic_get_auxadc_value] reg_val = 0x5FF1, adc_result = 4047 | |
| [DOE_ENV] No doconfig setting | |
| [DOE_ENV]read_env_area fail, ret = -1 | |
| [DOE_ENV]get_env PICACHU_DOE | |
| [PICACHU] L Freq: 2001 | |
| [PLFM],64S3,boot_opt=0x0 | |
| [PLFM],32N2,boot_opt=0x6 | |
| [PLFM],64N2,boot_opt=0x4 | |
| lastpc[0][0] = FFFA1FC2 | |
| lastpc[0][1] = FFFF7B2A | |
| lastpc[0][2] = 8100A281 | |
| lastpc[0][3] = 800020D0 | |
| lastpc[0][4] = 880C1910 | |
| lastpc[0][5] = 410D6025 | |
| lastpc[0][6] = 1941E985 | |
| lastpc[0][7] = 61C88000 | |
| lastpc[1][0] = 0 | |
| lastpc[1][1] = 0 | |
| lastpc[1][2] = 0 | |
| lastpc[1][3] = 0 | |
| lastpc[1][4] = 0 | |
| lastpc[1][5] = 0 | |
| lastpc[1][6] = 0 | |
| lastpc[1][7] = 0 | |
| lastpc[2][0] = 0 | |
| lastpc[2][1] = 0 | |
| lastpc[2][2] = 0 | |
| lastpc[2][3] = 0 | |
| lastpc[2][4] = 0 | |
| lastpc[2][5] = 0 | |
| lastpc[2][6] = 0 | |
| lastpc[2][7] = 0 | |
| lastpc[3][0] = 0 | |
| lastpc[3][1] = 0 | |
| lastpc[3][2] = 0 | |
| lastpc[3][3] = 0 | |
| lastpc[3][4] = 0 | |
| lastpc[3][5] = 0 | |
| lastpc[3][6] = 0 | |
| lastpc[3][7] = 0 | |
| [PLFM] boot to LK by ATAG. | |
| PL_VERSION = 0.1.00 | |
| emmc ocr = 0xC0FF8080 | |
| emmc cid: 0x15010041 0x4A544434 0x5206436A 0xBCE0A76F | |
| emmc csd: 0xD0270132 0xF5903FF 0xF6DBFFEF 0x8E40400D | |
| BOOT_REASON: 1 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285224960 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 1 | |
| MEM_NUM: 2 | |
| MEM_SIZE: 0x3FFC0000 | |
| MEM_SIZE: 0x40000000 | |
| mblock num: 0x5 | |
| mblock start: 0x0000000040000000 | |
| mblock size: 0x000000003FFC0000 | |
| mblock rank: 0x0 | |
| mblock start: 0x0000000080000000 | |
| mblock size: 0x0000000040000000 | |
| mblock rank: 0x0 | |
| mblock start: 0x00000000C0000000 | |
| mblock size: 0x000000003EF00000 | |
| mblock rank: 0x1 | |
| mblock start: 0x00000000FF000000 | |
| mblock size: 0x00000000009C0000 | |
| mblock rank: 0x1 | |
| orig_dram num: 0x2 | |
| orig_dram start: 0x0000000040000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x00000000C0000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| lca start: 0x0000000000000000 | |
| lca size: 0x0000000000000000 | |
| tee start: 0x00000000FF9C0000 | |
| tee size: 0x0000000000040000 | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| BOOT_TIME: 2336 | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| PART_NUM: 3 | |
| PART_INFO: 0x42058A24 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DRAM_BUF: 1576896 | |
| SMC: 0x0 | |
| SMC: 0x6 | |
| SMC: 0x4 | |
| SRAM satrt: 0x111D00 | |
| SRAM size: 0x300 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0xDB45 | |
| PLAT_DBG_INFO base: 0x111E0C | |
| PLAT_DBG_INFO size: 0x10 | |
| [TZ_INIT] hwuid[0] : 0xA8D2FEC5 | |
| [TZ_INIT] hwuid[1] : 0x105DD9EE | |
| [TZ_INIT] hwuid[2] : 0xD6C12CE7 | |
| [TZ_INIT] hwuid[3] : 0xD8FB6547 | |
| [TZ_INIT] HRID[0] : 0xA2A0D71F | |
| [TZ_INIT] HRID[1] : 0x804C73ED | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [TZ_INIT] ATF log buffer start : 0xFF9C0000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0xFF9FC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| Device APC: sec_postinit Infra MAS_SEC_0=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x56000000 | |
| [BLDR] <0x56000000>=0xEA000007 | |
| [BLDR] <0x56000004>=0xEA007FC7 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x10011C00 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 1 0x30000 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 2 0x38000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 2 0xB680000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 5 0xB690000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 6 0xB690000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xC0000B69 | |
| MPU [LOCK | |
| [TZ_EMI_MPU] MPU [0xFFA00000-0xFFFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0xFFA00000, 0xFFFFFFFF (OPT) | |
| MPU [LOCK | |
| [TZ_EMI_MPU] MPU [0x54600000-0x5462FFFF] | |
| [TZ_INIT] set secure memory protection : 0x54600000, 0x5462FFFF | |
| [TZ_INIT] Jump to ATF, then 0xFFA00000 and 0x56000000 | |
| INFO: [ATF](0)[2.478827]log_enable:1 | |
| INFO: [ATF](0)[2.479268]atf_log_port:0x11002000 | |
| INFO: [ATF](0)[2.479828]BOOT_REASON: 1 | |
| INFO: [ATF](0)[2.480291]IS_ABNORMAL_BOOT: 0 | |
| INFO: [ATF](0)[2.480808]CPUxGPT reg(0) | |
| INFO: [ATF](0)[2.481271][systimer] CNTCR_REG(0x505) | |
| INFO: [ATF](0)[2.481874]Secondary bootloader is AArch32 | |
| INFO: [ATF](0)[2.482520]bl31_plat_arch_setup() | |
| INFO: [ATF](0)[2.483069]mmap atf buffer : 0xff9c0000, 0x40000 | |
| [ATF](0)[2.484225]mmap: | |
| [ATF](0)[2.484484] VA:0x10f000 PA:0x10f000 size:0x2000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.485475] VA:0x11d000 PA:0x11d000 size:0x1000 attr:0x18 granularity:0x40000000 | |
| [ATF](0)[2.486477] VA:0xc000000 PA:0xc000000 size:0x600000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.487511] VA:0x10006000 PA:0x10006000 size:0x100000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.488566] VA:0x10000000 PA:0x10000000 size:0x400000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.489621] VA:0x10400000 PA:0x10400000 size:0x50000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.490666] VA:0x10480000 PA:0x10480000 size:0x10000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.491711] VA:0x11000000 PA:0x11000000 size:0x4000000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.492777] VA:0x54601000 PA:0x54601000 size:0x1c000 attr:0x2 granularity:0x40000000 | |
| [ATF](0)[2.493821] VA:0x5462f000 PA:0x5462f000 size:0x1000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.494855] VA:0x54600000 PA:0x54600000 size:0x30000 attr:0xa granularity:0x4000 | |
| kkJJI | |
| ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
| INFRA_BUS_DCM_CTRL 5F7FE0 | |
| mtcmos Start.. | |
| before: WDT_SWSYSRST = 0x8000 | |
| after: WDT_SWSYSRST = 0x9000 | |
| P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
| [PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
| [PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
| [PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
| [PWRAP] Read Test pass, return_value=0x0 | |
| [PWRAP] Write Test pass | |
| [PWRAP] RECORD_CMD0: 0xA08 (Last one command addr) | |
| [PWRAP] RECORD_WDATA0:0x0 (Last one command wdata) | |
| [PWRAP] RECORD_CMD1: 0x5C2 (Last second command addr) | |
| [PWRAP] RECORD_WDATA1:0x1 (Last second command wdata) | |
| [PWRAP] RECORD_CMD2: 0x588 (Last third command addr) | |
| [PWRAP] RECORD_WDATA2:0x4321 (Last third command wdata) | |
| [PWRAP] init pass, ret=0. | |
| [PMIC]Preloader Start | |
| [PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
| [PMIC]POWER_HOLD :0x1 | |
| [PMIC]TOP_RST_STATUS[0x152]=0x4F | |
| [PMIC]PONSTS[0xC]=0x1 | |
| [PMIC]POFFSTS[0xE]=0x80 | |
| [PMIC]PGSTATUS0[0x14]=0xFFFE | |
| [PMIC]PSOCSTATUS[0x16]=0x0 | |
| [PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
| [PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
| [PMIC]THERMALSTATUS[0x18]=0x0 | |
| [PMIC]STRUP_CON4[0xA1C]=0x0 | |
| [PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
| [PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
| latch VPROC 800000 uV | |
| latch VSRAM_PROC 900000 uV | |
| latch VSRAM_OTHERS 900000 uV | |
| latch VCORE 800000 uV | |
| latch VMODEM 800000 uV | |
| [PMIC]just_rst = 0 | |
| No EFUSE SW Load | |
| [PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
| [rt5738_driver_probe] | |
| [rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
| mt6691_vdd2_hw_init | |
| [0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
| [rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
| register vs1 OK | |
| register vmodem OK | |
| register vcore OK | |
| register vproc OK | |
| register vpa OK | |
| register vsram_others OK | |
| register vsram_proc OK | |
| register vdram OK | |
| register vfe28 OK | |
| [PMIC]Init done | |
| ac 1,usb 1 | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20201104-090402 | |
| clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
| clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
| clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
| clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
| clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
| clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
| [RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x202A | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3985 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
| [RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x202A, yea = 0xC502 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC]switch to dcxo | |
| [RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
| [RTC] get_frequency_meter: input=0xF, ouput=811 | |
| [RTC] EOSC_Cali: val=0x32B | |
| [RTC] get_frequency_meter: input=0x7, ouput=700 | |
| [RTC] EOSC_Cali: val=0x2BC | |
| [RTC] get_frequency_meter: input=0xB, ouput=757 | |
| [RTC] EOSC_Cali: val=0x2F5 | |
| [RTC] get_frequency_meter: input=0xD, ouput=784 | |
| [RTC] EOSC_Cali: val=0x310 | |
| [RTC] get_frequency_meter: input=0xE, ouput=797 | |
| [RTC] EOSC_Cali: val=0x31D | |
| [RTC] get_frequency_meter: input=0xD, ouput=783 | |
| [RTC] get_frequency_meter: input=0xE, ouput=796 | |
| [RTC] EOSC cali val = 0xDE4E | |
| [RTC] RTC_SPAR0=0x0 | |
| [RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
| [RTC] 32k-less mode | |
| [RTC] rtc_2sec_reboot_check 0x202A, without 2sec reboot, type 0x0 | |
| [RTC] rtc 2sec reboot is not enabled | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [PMIC] pmic_init_setting end. v180413 | |
| [MT6357] 1 6,61 | |
| [MT6357] 1 2,45 | |
| [MT6357] 1 1,48 | |
| [MT6357] get volt 5, 61, 900000 | |
| vsram_others = 900000 uV | |
| [MT6357] get volt 3, 45, 800000 | |
| vproc = 800000 uV | |
| [MT6357] get volt 6, 61, 900000 | |
| vsram_proc = 900000 uV | |
| [MT6357] get volt 2, 45, 800000 | |
| vcore = 800000 uV | |
| [MT6357] get volt 1, 48, 800000 | |
| vmodem = 800000 uV | |
| [MT6357] 2 6,1 | |
| [MT6357] 2 5,1 | |
| [MT6357] 2 3,1 | |
| [MT6357] 2 2,1 | |
| [RGU] EMI_DCS_SUCCESS 0 | |
| [RGU] DVFSRC_SUCCESS 0 | |
| [RGU] MODE: 0x4D | |
| [RGU] STA: 0x0 | |
| [RGU] LENGTH: 0xFFE0 | |
| [RGU] INTERVAL: 0xFFF | |
| [RGU] SWSYSRST: 0x9000 | |
| [RGU] LATCH_CTL: 0x0 | |
| [RGU] NONRST_REG2: 0x0 | |
| [RGU] DEBUG_CTL: 0x200F1 | |
| [RGU] g_rgu_status: 0 (0x0) | |
| [RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| [RGU] rst from: ? | |
| [RGU] bypass pwrkey: wdt does not trigger rst | |
| [RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
| [RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1 | |
| [RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x100070A0, val: 0x2FF | |
| [RGU] rgu_update_reg: 1, bits: 0x200, addr: 0x100070A0, val: 0x2FF | |
| [RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL(0x200F1) | |
| [RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL2(0x2FF) | |
| [RGU] mtk_wdt_init: MTK_WDT_LATCH_CTL(0xB871) | |
| [RGU] mtk_wdt_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x0 ! | |
| [RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
| [RTC] bbpu = 0x1, con = 0x486, cali = 0x202A, osc32con = | |
| [PLFM] Init Boot Device: OK(0) | |
| EMI_MPU_CTRL=0 1st | |
| EMI_MPU_CTRL=0 2nd | |
| [RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
| [RGU] WDT DDR reserve mode FAIL! 200F1 | |
| [RGU] DDR RESERVE Success 0 | |
| [RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
| [RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
| [GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
| [dramc] init partition address is 0x0000000000380000 | |
| init_dram:1660: init_dram Starting | |
| [MT6357] 2 8,0 | |
| [MT6357] 2 7,0 | |
| [set_dram_voltage]set dram voltage done!!! | |
| [MT6357] 1 2,25 | |
| [dramc]cold boot | |
| [dramc] read off[2] = 6 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
| [CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 350 | |
| [CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 355 | |
| [CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
| [CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
| [CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
| [CH1][RK0][1600][CBT] Best CA Vref 18, Window Min 56 at CA4, Window Sum 350 | |
| [CH1][RK1][1600][CBT] Best CA Vref 18, Window Min 56 at CA4, Window Sum 348 | |
| [CH1][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ13, Window Sum 429 | |
| [CH1][RK0][1600][RX] Best Vref 29, Window Min 52 at DQ10, Window Sum 883 | |
| [CH1][RK1][1600][TX] Best Vref 8, Window Min 25 at DQ14, Window Sum 426 [FAST_K] Bypass saving calibration result to emmc | |
| [MT6357] 1 2,37 | |
| [dramc] read off[1] = 4 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU1, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0 | |
| [CH0][RK0][2666][CBT] Best CA Vref 18, Window Min 52 at CA4, Window Sum 331 | |
| [CH0][RK1][2666][CBT] Best CA Vref 16, Window Min 53 at CA4, Window Sum 339 | |
| [CH0][RK0][2666][TX] Best Vref 12, Window Min 25 at DQ12, Window Sum 430 | |
| [CH0][RK0][2666][RX] Best Vref 14, Window Min 33 at DQ7, Window Sum 564 | |
| [CH0][RK1][2666][TX] Best Vref 12, Window Min 22 at DQ13, Window Sum 406 | |
| [CH1][RK0][2666][CBT] Best CA Vref 18, Window Min 52 at CA4, Window Sum 339 | |
| [CH1][RK1][2666][CBT] Best CA Vref 16, Window Min 52 at CA4, Window Sum 337 | |
| [CH1][RK0][2666][TX] Best Vref 10, Window Min 23 at DQ15, Window Sum 420 | |
| [CH1][RK0][2666][RX] Best Vref 14, Window Min 34 at DQ14, Window Sum 591 | |
| [CH1][RK1][2666][TX] Best Vref 10, Window Min 21 at DQ6, Window Sum 400 [FAST_K] Bypass saving calibration result to emmc | |
| [MT6357] 1 2,45 | |
| [dramc] read off[0] = 2 1024 | |
| [FAST_K] DramcSave_Time_For_Cal_Init SHU0, femmc_Ready=1 | |
| [FAST_K] Bypass_RDDQC 0, Bypass_RXWINDOW=0, Bypass_TXWINDOW=0 | |
| [CH0][RK0][3200][CBT] Best CA Vref 18, Window Min 52 at CA4, Window Sum 328 | |
| [CH0][RK1][3200][CBT] Best CA Vref 16, Window Min 53 at CA3, Window Sum 328 | |
| [CH0][RK0][3200][TX] Best Vref 12, Window Min 19 at DQ14, Window Sum 356 | |
| [CH0][RK0][3200][RX] Best Vref 14, Window Min 28 at DQ7, Window Sum 489 | |
| [CH0][RK1][3200][TX] Best Vref 14, Window Min 20 at DQ14, Window Sum 365 | |
| [CH1][RK0][3200][CBT] Best CA Vref 18, Window Min 51 at CA4, Window Sum 333 | |
| [CH1][RK1][3200][CBT] Best CA Vref 16, Window Min 50 at CA4, Window Sum 323 | |
| [CH1][RK0][3200][TX] Best Vref 12, Window Min 20 at DQ5, Window Sum 362 | |
| [CH1][RK0][3200][RX] Best Vref 14, Window Min 31 at DQ3, Window Sum 520 | |
| [CH1][RK1][3200][TX] Best Vref 10, Window Min 19 at DQ6, Window Sum 363 [FAST_K] Bypass saving calibration result to emmc | |
| [dramc_run_time_config] | |
| TX_TRACKING: ON | |
| RX_TRACKING: ON | |
| HW_GATING: ON | |
| HW_GATING DBG: OFF | |
| DUMMY_READ_FOR_TRACKING: ON | |
| ZQCS_ENABLE_LP4: ON | |
| LOWPOWER_GOLDEN_SETTINGS(DCM): ON | |
| DUMMY_READ_FOR_DQS_GATING_RETRY: OFF | |
| IMPEDANCE_TRACKING: ON | |
| TEMP_SENSOR: ON | |
| PER_BANK_REFRESH: ON | |
| HW_SAVE_FOR_SR: ON | |
| SET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON | |
| CLK_FREE_FUN_FOR_DRAMC_PSEL: ON | |
| PA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: ON | |
| Read ODT Tracking: ON | |
| DQS Precalculation for DVFS: ON | |
| Step1: Set DVFS HW enable | |
| Step2: Set jump ratio | |
| Step1: Set DVFS HW enable | |
| Step2: Set jump ratio | |
| ========================= | |
| [switch_dramc_voltage_to_auto_mode]switch dram voltage to auto mode done!!! | |
| [Dram_Buffer] dram size: 0x0 | |
| [Dram_Buffer] dram_buf_t size: 0x180FC0 | |
| [Dram_Buffer] part_hdr_t size: 0x200 | |
| [Dram_Buffer] g_dram_buf start addr: 0x42000000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x42180E00 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x42180EC0 | |
| RAM_CONSOLE using default | |
| RAM_CONSOLE start: 0x54400000, size: 0x10000, sig: 0xFFFFFFFF | |
| RAM_CONSOLE wdt status (0x0)=0x0 | |
| orig_dram_info[0] start: 0x0000000040000000, size: 0x0000000080000000 | |
| orig_dram_info[1] start: 0x00000000C0000000, size: 0x0000000080000000 | |
| CUSTOM_CONFIG_MAX_DRAM_SIZE: 0x0000000100000000 | |
| total_dram_size: 0x0000000100000000, max_dram_size: 0x0000000100000000 | |
| [GPT_PL]Parsing Primary GPT now... | |
| [GPT_PL][0]name=proinfo, part_id=8, start_sect=0x400, nr_sects=0x1800 | |
| [GPT_PL][1]name=boot_para, part_id=8, start_sect=0x1C00, nr_sects=0x800 | |
| [GPT_PL][2]name=cam_vpu1, part_id=8, start_sect=0x2400, nr_sects=0x7800 | |
| [GPT_PL][3]name=cam_vpu2, part_id=8, start_sect=0x9C00, nr_sects=0x7800 | |
| [GPT_PL][4]name=cam_vpu3, part_id=8, start_sect=0x11400, nr_sects=0x7800 | |
| [GPT_PL][5]name=nvram, part_id=8, start_sect=0x18C00, nr_sects=0x2800 | |
| [GPT_PL][6]name=protect1, part_id=8, start_sect=0x1B400, nr_sects=0x5000 | |
| [GPT_PL][7]name=protect2, part_id=8, start_sect=0x20400, nr_sects=0x5000 | |
| [GPT_PL][8]name=persist, part_id=8, start_sect=0x25400, nr_sects=0x18000 | |
| [GPT_PL][9]name=nvcfg, part_id=8, start_sect=0x3D400, nr_sects=0x4000 | |
| [GPT_PL][10]name=seccfg, part_id=8, start_sect=0x41400, nr_sects=0x200 | |
| [GPT_PL][11]name=lk, part_id=8, start_sect=0x41600, nr_sects=0x800 | |
| [GPT_PL][12]name=lk2, part_id=8, start_sect=0x41E00, nr_sects=0x800 | |
| [GPT_PL][13]name=boot, part_id=8, start_sect=0x42600, nr_sects=0x8000 | |
| [GPT_PL][14]name=recovery, part_id=8, start_sect=0x4A600, nr_sects=0x8000 | |
| [GPT_PL][15]name=para, part_id=8, start_sect=0x52600, nr_sects=0x400 | |
| [GPT_PL][16]name=logo, part_id=8, start_sect=0x52A00, nr_sects=0x4000 | |
| [GPT_PL][17]name=dtbo, part_id=8, start_sect=0x56A00, nr_sects=0x4000 | |
| [GPT_PL][18]name=expdb, part_id=8, start_sect=0x5AA00, nr_sects=0x5000 | |
| [GPT_PL][19]name=frp, part_id=8, start_sect=0x5FA00, nr_sects=0x800 | |
| [GPT_PL][20]name=nvdata, part_id=8, start_sect=0x60200, nr_sects=0x10000 | |
| [GPT_PL][21]name=tee1, part_id=8, start_sect=0x70200, nr_sects=0x2800 | |
| [GPT_PL][22]name=tee2, part_id=8, start_sect=0x72A00, nr_sects=0x2800 | |
| [GPT_PL][23]name=kb, part_id=8, start_sect=0x75200, nr_sects=0x1000 | |
| [GPT_PL][24]name=dkb, part_id=8, start_sect=0x76200, nr_sects=0x1000 | |
| [GPT_PL][25]name=metadata, part_id=8, start_sect=0x77200, nr_sects=0x10000 | |
| [GPT_PL][26]name=vbmeta, part_id=8, start_sect=0x87200, nr_sects=0x5A00 | |
| [GPT_PL][27]name=system, part_id=8, start_sect=0x8CC00, nr_sects=0x2A2000 | |
| [GPT_PL][28]name=vendor, part_id=8, start_sect=0x32EC00, nr_sects=0xC8000 | |
| [GPT_PL][29]name=factory, part_id=8, start_sect=0x3F6C00, nr_sects=0x8000 | |
| [GPT_PL][30]name=cache, part_id=8, start_sect=0x3FEC00, nr_sects=0x200000 | |
| [GPT_PL][31]name=userdata, part_id=8, start_sect=0x5FEC00, nr_sects=0x17203DF | |
| [GPT_PL][32]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][33]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][34]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][35]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][36]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][37]name=, part_id=8, start_sect=0x0, nr_sects=0x1 | |
| [GPT_PL][38]name=, pars | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x0000000000000000-0x00000000000001FF] "" (1 blocks) | |
| [PART] [0x000000D2DEE4E000-0x000000D3BDB1BBFF] "unknown" (7300718 blocks) | |
| [LIB] HW ENC | |
| [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00' | |
| [SEC] AES Legacy : 0 | |
| [SEC] SECCFG AC : 1 | |
| [LIB] Loading SEC config | |
| [LIB] Name = | |
| [LIB] Config = 0x22, 0x22 | |
| 0x31,0x41,0x35,0x32 | |
| [SEC] DBGPORT 00010051 0000000F 00000101 00000101 0022AD1F | |
| [SEC] DBGPORT (1 1) | |
| [SEC] DBGPORT 00010051 0000000F 00011111 00011111 0022AD63 | |
| [SEC] read '0x8280000' | |
| 0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0, | |
| [LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C' | |
| 0x4D4D4D4D | |
| [LIB] SEC CFG 'v4' exists | |
| [LIB] HW DEC | |
| [LIB] SEC CFG is valid. Lock state is 4 | |
| PL_LOG_STORE:sram->sig value 0x68B46C51! | |
| PL_LOG_STORE:sram header is not match, format all! | |
| PL_LOG_STORE:set ram_header->sig = 0xABCD1234 | |
| PL_LOG_STORE:expdb partition start addr 0xB540000, end addr 0xBF40000, partition size 0 | |
| [BLDR_MTEE] rsa2048 takes 57 (ms) | |
| [BLDR_MTEE] verify pkcs#1 pss takes 0 (ms) | |
| [BLDR_MTEE] aes128cbc takes 1 (ms) for 122816 | |
| [PART] partition name = tee1 | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x4 | |
| [PART] img_auth_required = 1 | |
| [PART] partition hdr (1) | |
| [PART] Image with part header | |
| [PART] name : tee | |
| [PART] addr : 600000h mode : 0 | |
| [PART] size : 2440192 | |
| [PART] magic: 58881688h | |
| sbc_en = 1 | |
| sbc_en = 1 | |
| [SBC] cert verify, part = tee1, img = tee...ok | |
| [PART] part: tee1 img: tee cert vfy(145 ms) | |
| mblock[0].start: 0x0000000040000000, sz: 0x000000003FFC0000, limit: 0x0000000100000000, max_addr: 0x0000000000000000, target: -1, reserved_addr: 0x000000007F980000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| mblock[1].start: 0x0000000080000000, sz: 0x0000000040000000, limit: 0x0000000100000000, max_addr: 0x000000007FFC0000, target: 0, reserved_addr: 0x00000000BF9C0000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| mblock[2].start: 0x00000000C0000000, sz: 0x0000000080000000, limit: 0x0000000100000000, max_addr: 0x00000000C0000000, target: 1, reserved_addr: 0x00000000FF9C0000,reserved_size: 0x0000000000640000 | |
| mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| mblock[2]: 00000000C0000000, 000000003F9C0000 from mblock | |
| mblock[3]: 0000000100000000, 0000000040000000 from mblock | |
| mblock_reserve: 00000000FF9C0000 - 0000000100000000 from mblock 2 | |
| mblock_reserve[0].start: 0x0000000040000000, sz: 0x000000003FFC0000 | |
| mblock_reserve[1].start: 0x0000000080000000, sz: 0x0000000040000000 | |
| mblock_reserve[2].start: 0x00000000C0000000, sz: 0x000000003F9C0000 | |
| mblock_reserve[3].start: 0x0000000100000000, sz: 0x0000000040000000 | |
| mblock_reserve-R[0].start: 0x000000007FFC0000, sz: 0x0000000000040000 map:1 name:log_store | |
| mblock_reserve-R[1].start: 0x00000000FF9C0000, sz: 0x0000000000640000 map:0 name:tee | |
| [PART] load "tee1" from 0x000000000E05F470 (dev) to 0xFFA00000 (mem) [SUCCESS] | |
| [PART] load speed: 41806KB/s, 2440192 bytes, 57ms | |
| [PART] img vfy...[SBC] img auth ok | |
| ok | |
| [PART] part: tee1 img: tee vfy(190 ms) | |
| [BLDR_MTEE] sha256 takes 12 (ms) for 2439616 bytes | |
| [BLDR_MTEE] rsa2048 takes 57 (ms) | |
| [BLDR_MTEE] verify pkcs#1 pss takes 1 (ms) | |
| [BLDR_MTEE] aes128cbc takes 15 (ms) for 2439616 | |
| [TZ_INIT] TEE start entry : 0xFFA00000 | |
| [TZ_INIT] MEID : 0xC5, 0xFE, 0xD2, 0xA8 | |
| [TZ_INIT] MEID : 0xEE, 0xD9, 0x5D, 0x10 | |
| [TZ_INIT] MEID : 0xE7, 0x2C, 0xC1, 0xD6 | |
| [TZ_INIT] MEID : 0x47, 0x65, 0xFB, 0xD8 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x54601000 | |
| [BLDR] part_load_raw_part ret=0x0 | |
| [BLDR] part_load_images ret=0x0 | |
| [BLDR] - wdt_rpmb_program_mode MTK_WDT_NONRST_REG2: 40000000 | |
| [PICACHU]start_picachu | |
| [PICACHU] dram_rank_size[0] = 0x0000000080000000 | |
| [PICACHU] dram_rank_size[1] = 0x0000000080000000 | |
| [PICACHU] before modify dram_size = 0x0000000100000000 | |
| [PICACHU] CFG_DRAM_ADDR = 0x40000000 | |
| [PICACHU] after modify dram_size = 0x00000000BF000000 | |
| [PICACHU] pi_dram_log_addr max address = 0xFF000000 | |
| mblock[0].start: 0x0000000040000000, sz: 0x000000003FFC0000, limit: 0x00000000FF000000, max_addr: 0x0000000000000000, target: -1, reserved_addr: 0x000000007FE00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| mblock[1].start: 0x0000000080000000, sz: 0x0000000040000000, limit: 0x00000000FF000000, max_addr: 0x000000007FFC0000, target: 0, reserved_addr: 0x00000000BFF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| mblock[2].start: 0x00000000C0000000, sz: 0x000000003F9C0000, limit: 0x00000000FF000000, max_addr: 0x00000000C0000000, target: 1, reserved_addr: 0x00000000FEF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| mblock[3].start: 0x0000000100000000, sz: 0x0000000040000000, limit: 0x00000000FF000000, max_addr: 0x00000000FF9C0000, target: 2, reserved_addr: 0x00000000FEF00000,reserved_size: 0x0000000000100000 | |
| mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| mblock[2]: 00000000C0000000, 000000003EF00000 from mblock | |
| mblock[3]: 00000000FF000000, 00000000009C0000 from mblock | |
| mblock_reserve: 00000000FEF00000 - 00000000FF000000 from mblock 2 | |
| mblock_reserve[0].start: 0x0000000040000000, sz: 0x000000003FFC0000 | |
| mblock_reserve[1].start: 0x0000000080000000, sz: 0x0000000040000000 | |
| mblock_reserve[2].start: 0x00000000C0000000, sz: 0x000000003EF00000 | |
| mblock_reserve[3].start: 0x00000000FF000000, sz: 0x00000000009C0000 | |
| mblock_reserve[4].start: 0x0000000100000000, sz: 0x0000000040000000 | |
| mblock_reserve-R[0].start: 0x000000007FFC0000, sz: 0x0000000000040000 map:1 name:log_store | |
| mblock_reserve-R[1].start: 0x00000000FF9C0000, sz: 0x0000000000640000 map:0 name:tee | |
| mblock_reserve-R[2].start: 0x00000000FEF00000, sz: 0x0000000000100000 map:0 name:PICACHU | |
| [pmic_get_auxadc_value] reg_val = 0x6004, adc_result = 4050 | |
| [DOE_ENV] No doconfig setting | |
| [DOE_ENV]read_env_area fail, ret = -1 | |
| [DOE_ENV]get_env PICACHU_DOE | |
| [PICACHU] L Freq: 2001 | |
| [PICACHU] L Freq: 2001 | |
| [MT6357] get volt 3, 45, 800000 | |
| [MT6357] get volt 5, 61, 900000 | |
| [MT6357] get volt 3, 45, 800000 | |
| [MT6357] get volt 5, 61, 900000 | |
| [MT6357] get volt 5, 61, 900000 | |
| [MT6357] get volt 3, 45, 800000 | |
| [MT6357] 1 5,73 | |
| [MT6357] 1 3,57 | |
| [MT6357] 1 5,85 | |
| [MT6357] 1 3,69 | |
| [MT6357] 1 5,85 | |
| [MT6357] 1 3,74 | |
| [MT6357] get volt 3, 74, 981250 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 3, 74, 981250 | |
| [MT6357] get volt 3, 74, 981250 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 3, 74, 981250 | |
| [MT6357] 1 3,72 | |
| [MT6357] 1 5,85 | |
| [MT6357] get volt 3, 72, 968750 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 3, 72, 968750 | |
| [MT6357] 1 3,70 | |
| [MT6357] 1 5,85 | |
| [MT6357] get volt 3, 70, 956250 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 5, 85, 1050000 | |
| [MT6357] get volt 3, 70, 956250 | |
| [MT6357] 1 3,68 | |
| [MT6357] 1 5,84 | |
| [MT6357] get volt 3, 68, 943750 | |
| [MT6357] get volt 5, 84, 1043750 | |
| [MT6357] get volt 5, 84, 1043750 | |
| [MT6357] get volt 3, 68, 943750 | |
| [MT6357] 1 3,66 | |
| [MT6357] 1 5,82 | |
| [MT6357] get volt 3, 66, 931250 | |
| [MT6357] get volt 5, 82, 1031250 | |
| [MT6357] get volt 5, 82, 1031250 | |
| [MT6357] get volt 3, 66, 931250 | |
| [MT6357] 1 3,64 | |
| [MT6357] 1 5,80 | |
| [MT6357] get volt 3, 64, 918750 | |
| [MT6357] get volt 5, 80, 1018750 | |
| [MT6357]lastpc[3][0] = 0 | |
| lastpc[3][1] = 0 | |
| lastpc[3][2] = 0 | |
| lastpc[3][3] = 0 | |
| lastpc[3][4] = 0 | |
| lastpc[3][5] = 0 | |
| lastpc[3][6] = 0 | |
| lastpc[3][7] = 0 | |
| [PLFM] boot to LK by ATAG. | |
| PL_VERSION = 0.1.00 | |
| emmc ocr = 0xC0FF8080 | |
| emmc cid: 0x15010041 0x4A544434 0x5206436A 0xBCE0A76F | |
| emmc csd: 0xD0270132 0xF5903FF 0xF6DBFFEF 0x8E40400D | |
| BOOT_REASON: 0 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285224960 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 1 | |
| MEM_NUM: 2 | |
| MEM_SIZE: 0x3FFC0000 | |
| MEM_SIZE: 0x40000000 | |
| mblock num: 0x5 | |
| mblock start: 0x0000000040000000 | |
| mblock size: 0x000000003FFC0000 | |
| mblock rank: 0x0 | |
| mblock start: 0x0000000080000000 | |
| mblock size: 0x0000000040000000 | |
| mblock rank: 0x0 | |
| mblock start: 0x00000000C0000000 | |
| mblock size: 0x000000003EF00000 | |
| mblock rank: 0x1 | |
| mblock start: 0x00000000FF000000 | |
| mblock size: 0x00000000009C0000 | |
| mblock rank: 0x1 | |
| orig_dram num: 0x2 | |
| orig_dram start: 0x0000000040000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x00000000C0000000 | |
| orig_dram size: 0x0000000080000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| orig_dram start: 0x0000000000000000 | |
| orig_dram size: 0x0000000000000000 | |
| lca start: 0x0000000000000000 | |
| lca size: 0x0000000000000000 | |
| tee start: 0x00000000FF9C0000 | |
| tee size: 0x0000000000040000 | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| MD_INFO: 0xFF | |
| BOOT_TIME: 2373 | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| DA_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| SEC_INFO: 0xFFFFFFFF | |
| PART_NUM: 3 | |
| PART_INFO: 0x42058A24 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DRAM_BUF: 1576896 | |
| SMC: 0x0 | |
| SMC: 0x6 | |
| SMC: 0x4 | |
| SRAM satrt: 0x111D00 | |
| SRAM size: 0x300 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0x0 | |
| PLAT_DBG_INFO base: 0x0 | |
| PLAT_DBG_INFO size: 0x0 | |
| PLAT_DBG_INFO key: 0xDB45 | |
| PLAT_DBG_INFO base: 0x111E0C | |
| PLAT_DBG_INFO size: 0x10 | |
| [TZ_INIT] hwuid[0] : 0xA8D2FEC5 | |
| [TZ_INIT] hwuid[1] : 0x105DD9EE | |
| [TZ_INIT] hwuid[2] : 0xD6C12CE7 | |
| [TZ_INIT] hwuid[3] : 0xD8FB6547 | |
| [TZ_INIT] HRID[0] : 0xA2A0D71F | |
| [TZ_INIT] HRID[1] : 0x804C73ED | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [TZ_INIT] ATF log buffer start : 0xFF9C0000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0xFF9FC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| Device APC: sec_postinit Infra MAS_SEC_0=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x56000000 | |
| [BLDR] <0x56000000>=0xEA000007 | |
| [BLDR] <0x56000004>=0xEA007FC7 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x10011C00 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 1 0x30000 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 2 0x38000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 2 0xB680000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 5 0xB690000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 6 0xB690000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xC0000B69 | |
| MPU [LOCK | |
| [TZ_EMI_MPU] MPU [0xFFA00000-0xFFFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0xFFA00000, 0xFFFFFFFF (OPT) | |
| MPU [LOCK | |
| [TZ_EMI_MPU] MPU [0x54600000-0x5462FFFF] | |
| [TZ_INIT] set secure memory protection : 0x54600000, 0x5462FFFF | |
| [TZ_INIT] Jump to ATF, then 0xFFA00000 and 0x56000000 | |
| INFO: [ATF](0)[2.515559]log_enable:1 | |
| INFO: [ATF](0)[2.516000]atf_log_port:0x11002000 | |
| INFO: [ATF](0)[2.516560]BOOT_REASON: 0 | |
| INFO: [ATF](0)[2.517023]IS_ABNORMAL_BOOT: 0 | |
| INFO: [ATF](0)[2.517540]CPUxGPT reg(0) | |
| INFO: [ATF](0)[2.518003][systimer] CNTCR_REG(0x505) | |
| INFO: [ATF](0)[2.518606]Secondary bootloader is AArch32 | |
| INFO: [ATF](0)[2.519252]bl31_plat_arch_setup() | |
| INFO: [ATF](0)[2.519801]mmap atf buffer : 0xff9c0000, 0x40000 | |
| [ATF](0)[2.520958]mmap: | |
| [ATF](0)[2.521217] VA:0x10f000 PA:0x10f000 size:0x2000 attr:0x8 granularity:0x40000000 | |
| [ATF](0)[2.522208] VA | |
| [595] config color dirty = 0 | |
| [595] config ccorr dirty = 0 | |
| [595] config aal dirty = 0 | |
| [596] config gamma dirty = 0 | |
| [596] config dither dirty = 0 | |
| [596] disp_dither_bypass(bypass = 1)[597] config color dirty = 0 | |
| [597] config ccorr dirty = 0 | |
| [597] config aal dirty = 0 | |
| [598] config gamma dirty = 0 | |
| [598] config dither dirty = 0 | |
| [598] disp_dither_bypass(bypass = 1)[599] [lk logo: mt_disp_fill_rect 289] | |
| [599] [lk logo: init_fb_screen 59] | |
| [600] mt_get_logo_db_addr: 0x5e900000 | |
| [600] [lk logo: init_fb_screen 77]MTK_LCM_PHYSICAL_ROTATION = 270 | |
| [601] [lk logo: sync_anim_version 42] | |
| [601] [lk logo: init_fb_screen 100]pinfo[0]=0xffffffff, pinfo[1]=0xffffffff, pinfo[2]=-1 | |
| [602] [lk logo: init_fb_screen 102]define ANIMATION_NEW:show new animation with capacity num | |
| [603] [lk logo: init_fb_screen 103]CAPACITY_LEFT =172, CAPACITY_TOP =330 | |
| [604] [lk logo: init_fb_screen 104]LCM_HEIGHT=307, LCM_WIDTH=546 | |
| [605] [show_logo_common: fill_rect_with_color_by_32bit 388] | |
| [675] fb dump: 0x00000000, 0x00000000, 0x00000000, 0x00000000 | |
| [677] ovl start done idx = 0, addr = 0x1400b00c | |
| [677] ovl start done addr0 = 0x1000 | |
| [678] ovl start done addr1 = 0x0 | |
| [678] ovl start done addr2 = 0x1400b00c | |
| [679] ovl start done addr3 = 0x1400b00c | |
| [679] ovl start done addr4 = 0x1400b00c | |
| [680] s_mt65xx_gd.gdfIndex=3[680] mt_get_logo_db_addr_pa: 0x5e900000 | |
| [680] [PART_LK][get_part] logo | |
| [681] [PART_LK][get_part] logo | |
| [681] | |
| ========================================= | |
| [682] [LK_BOOT] logo magic number : 0x58881688 | |
| [682] [LK_BOOT] logo name : logo | |
| [683] [LK_BOOT] logo size : 1613370 | |
| [683] ========================================= | |
| SMART RESET: FALSE | |
| rst from: unknown | |
| kedump mini start | |
| kedump: current time: [2022/3/19 13:15:13] | |
| kedump: ddr reserve mode disabled | |
| kedump: ddr reserve mode failed | |
| [692] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0xc0000000, max_addr: 0x0, target: -1, reserved_addr: 0x40000000,reserved_size: 0x80000 | |
| [694] mblock_reserve dbg[0]: 1, 1, 1, 1 | |
| [694] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0xc0000000, max_addr: 0x40080000, target: 0, reserved_addr: 0x53f80000,reserved_size: 0x80000 | |
| [696] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [696] mblock[2].start: 0x54080000, sz: 0xf80000, limit: 0xc0000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x54f80000,reserved_size: 0x80000 | |
| [698] mblock_reserve dbg[2]: 1, 1, 1, 1 | |
| [698] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0xc0000000, max_addr: 0x55000000, target: 2, reserved_addr: 0x56880000,reserved_size: 0x80000 | |
| [700] mblock_reserve dbg[3]: 1, 1, 1, 1 | |
| [700] mblock[4].start: 0x5f900000, sz: 0x1c1e0000, limit: 0xc0000000, max_addr: 0x56900000, target: 3, reserved_addr: 0x7ba60000,reserved_size: 0x80000 | |
| [702] mblock_reserve dbg[4]: 1, 1, 1, 1 | |
| [702] mblock[5].start: 0x7da00000, sz: 0x25c0000, limit: 0xc0000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0x7ff40000,reserved_size: 0x80000 | |
| [704] mblock_reserve dbg[5]: 1, 1, 1, 1 | |
| [704] mblock[6].start: 0x80000000, sz: 0x40000000, limit: 0xc0000000, max_addr: 0x7ffc0000, target: 5, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [706] mblock_reserve dbg[6]: 1, 1, 1, 1 | |
| [707] mblock[7].start: 0xc0000000, sz: 0x3ef00000, limit: 0xc0000000, max_addr: 0xc0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [708] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [709] mblock[8].start: 0xff000000, sz: 0x9c0000, limit: 0xc0000000, max_addr: 0xc0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [710] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [711] mblock[9].start: 0x100000000, sz: 0x40000000, limit: 0xc0000000, max_addr: 0xc0000000, target: 6, reserved_addr: 0xbff80000,reserved_size: 0x80000 | |
| [712] mblock_reserve dbg[9]: 1, 0, 1, 1 | |
| [713] mblock_reserve: bff80000 - c0000000 from mblock 6 | |
| [714] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [714] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [715] mblock_reserve [2].start: 0x54080000, sz: 0xf80000 | |
| [715] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [716] mblock_reserve [4].start: 0x5f900000, sz: 0x1c1e0000 | |
| [717] mblock_reserve [5].start: 0x7da00000, sz: 0x25c0000 | |
| [717] mblock_reserve [6].start: 0x80000000, sz: 0x3ff80000 | |
| [718] mblock_reserve [7].start: 0xc0000000, sz: 0x3ef00000 | |
| [719] mblock_reserve [8].start: 0xff000000, sz: 0x9c0000 | |
| [719] mblock_reserve [9].start: 0x100000000, sz: 0x40000000 | |
| [720] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [721] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [722] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [722] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [723] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_addr_mb | |
| [724] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_addr_mb | |
| [725] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_addr_mb | |
| [726] mblock_reserve-R[7].start: 0x55000000, sz: 0x1000000 map:0 name:ramdisk_addr_mb | |
| [727] mblock_reserve-R[8].start: 0x7bae0000, sz: 0x1f20000 map:0 name:platform_init | |
| [ | |
| [1148] [show_logo_common: fill_rect_with_content_by_32bit_argb8888 213] | |
| [1149] fb dump: 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff | |
| [1151] [LEDS]LK: mt65xx_backlight_on:level = 63 | |
| [1152] [LEDS]LK: mt65xx_leds_brightness_set is done | |
| [1152] fb dump: 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff | |
| [LK_ENV]get_env MTK_DEVICE_ID | |
| [1155] [PART_LK][get_part] proinfo | |
| [1155] [LK_BOOT] Load 'proinfo' partition to 0x560A6788 (19 bytes in 0 ms) | |
| [1156] Serial #: "0L0V041811" | |
| [1158] mblock[0].start: 0x40000000, sz: 0x80000, limit: 0xc0000000, max_addr: 0x0, target: -1, reserved_addr: 0x39c80000,reserved_size: 0x6400000 | |
| [1159] mblock_reserve dbg[0]: 1, 0, 1, 1 | |
| [1160] mblock[1].start: 0x4c880000, sz: 0x7780000, limit: 0xc0000000, max_addr: 0x0, target: -1, reserved_addr: 0x4dc00000,reserved_size: 0x6400000 | |
| [1161] mblock_reserve dbg[1]: 1, 1, 1, 1 | |
| [1162] mblock[2].start: 0x54080000, sz: 0xf80000, limit: 0xc0000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x4ec00000,reserved_size: 0x6400000 | |
| [1164] mblock_reserve dbg[2]: 1, 0, 1, 1 | |
| [1164] mblock[3].start: 0x56400000, sz: 0x500000, limit: 0xc0000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x50500000,reserved_size: 0x6400000 | |
| [1166] mblock_reserve dbg[3]: 1, 0, 1, 1 | |
| [1166] mblock[4].start: 0x5f900000, sz: 0x1c1e0000, limit: 0xc0000000, max_addr: 0x54000000, target: 1, reserved_addr: 0x756e0000,reserved_size: 0x6400000 | |
| [1168] mblock_reserve dbg[4]: 1, 1, 1, 1 | |
| [1168] mblock[5].start: 0x7da00000, sz: 0x25c0000, limit: 0xc0000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0x79bc0000,reserved_size: 0x6400000 | |
| [1170] mblock_reserve dbg[5]: 1, 0, 1, 1 | |
| [1170] mblock[6].start: 0x80000000, sz: 0x3ff80000, limit: 0xc0000000, max_addr: 0x7bae0000, target: 4, reserved_addr: 0xb9b80000,reserved_size: 0x6400000 | |
| [1172] mblock_reserve dbg[6]: 1, 1, 1, 1 | |
| [1173] mblock[7].start: 0xc0000000, sz: 0x3ef00000, limit: 0xc0000000, max_addr: 0xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1174] mblock_reserve dbg[7]: 1, 0, 1, 1 | |
| [1175] mblock[8].start: 0xff000000, sz: 0x9c0000, limit: 0xc0000000, max_addr: 0xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1176] mblock_reserve dbg[8]: 1, 0, 1, 1 | |
| [1177] mblock[9].start: 0x100000000, sz: 0x40000000, limit: 0xc0000000, max_addr: 0xbff80000, target: 6, reserved_addr: 0xb9c00000,reserved_size: 0x6400000 | |
| [1179] mblock_reserve dbg[9]: 1, 0, 1, 1 | |
| [1179] mblock_reserve: b9b80000 - bff80000 from mblock 6 | |
| [1180] mblock_reserve [0].start: 0x40000000, sz: 0x80000 | |
| [1180] mblock_reserve [1].start: 0x4c880000, sz: 0x7780000 | |
| [1181] mblock_reserve [2].start: 0x54080000, sz: 0xf80000 | |
| [1182] mblock_reserve [3].start: 0x56400000, sz: 0x500000 | |
| [1182] mblock_reserve [4].start: 0x5f900000, sz: 0x1c1e0000 | |
| [1183] mblock_reserve [5].start: 0x7da00000, sz: 0x25c0000 | |
| [1184] mblock_reserve [6].start: 0x80000000, sz: 0x39b80000 | |
| [1184] mblock_reserve [7].start: 0xc0000000, sz: 0x3ef00000 | |
| [1185] mblock_reserve [8].start: 0xff000000, sz: 0x9c0000 | |
| [1186] mblock_reserve [9].start: 0x100000000, sz: 0x40000000 | |
| [1186] mblock_reserve-R[0].start: 0x7ffc0000, sz: 0x40000 map:1 name:log_store | |
| [1187] mblock_reserve-R[1].start: 0xff9c0000, sz: 0x640000 map:0 name:tee | |
| [1188] mblock_reserve-R[2].start: 0xfef00000, sz: 0x100000 map:0 name:PICACHU | |
| [1189] mblock_reserve-R[3].start: 0x56000000, sz: 0x400000 map:0 name:lk_addr_mb | |
| [1190] mblock_reserve-R[4].start: 0x56900000, sz: 0x9000000 map:0 name:scratch_addr_mb | |
| [1191] mblock_reserve-R[5].start: 0x54000000, sz: 0x80000 map:0 name:dtb_kernel_addr_mb | |
| [1192] mblock_reserve-R[6].start: 0x40080000, sz: 0xc800000 map:0 name:kernel_addr_mb | |
| [1193] mblock_reserve-R[7].start: 0x55000000, sz: 0x1000000 map:0 name:ramdisk_addr_mb | |
| [1194] mblock_reserve-R[8].start: 0x7bae0000, sz: 0x1f20000 map:0 name:platform_init | |
| [1195] mblock_reserve-R[9].start: 0xbff80000, sz: 0x80000 map:0 name: | |
| [1697] [PROFILE] ::: lvl(1) decompress_kernel takes 242 ms | |
| [1697] model=MT8168A | |
| [1697] efuse set max_clk_freq=1300000000 | |
| [1698] cluster-0: 4 core | |
| [1700] PASS memory DTS node | |
| [1700] LASTPC[0][0] = ff781fca | |
| [1701] LASTPC[0][1] = 5883bbf0 | |
| [1701] LASTPC[0][2] = 8100a281 | |
| [1701] LASTPC[0][3] = 80000050 | |
| [1702] LASTPC[0][4] = 900a1910 | |
| [1702] LASTPC[0][5] = 410d6c25 | |
| [1702] LASTPC[0][6] = 1940e91d | |
| [1703] LASTPC[0][7] = 61e88240 | |
| [1703] LASTPC[1][0] = 0 | |
| [1703] LASTPC[1][1] = 0 | |
| [1704] LASTPC[1][2] = 0 | |
| [1704] LASTPC[1][3] = 0 | |
| [1704] LASTPC[1][4] = 0 | |
| [1704] LASTPC[1][5] = 0 | |
| [1705] LASTPC[1][6] = 0 | |
| [1705] LASTPC[1][7] = 0 | |
| [1705] LASTPC[2][0] = 0 | |
| [1706] LASTPC[2][1] = 0 | |
| [1706] LASTPC[2][2] = 0 | |
| [1706] LASTPC[2][3] = 0 | |
| [1706] LASTPC[2][4] = 0 | |
| [1707] LASTPC[2][5] = 0 | |
| [1707] LASTPC[2][6] = 0 | |
| [1707] LASTPC[2][7] = 0 | |
| [1707] LASTPC[3][0] = 0 | |
| [1708] LASTPC[3][1] = 0 | |
| [1708] LASTPC[3][2] = 0 | |
| [1708] LASTPC[3][3] = 0 | |
| [1709] LASTPC[3][4] = 0 | |
| [1709] LASTPC[3][5] = 0 | |
| [1709] LASTPC[3][6] = 0 | |
| [1709] LASTPC[3][7] = 0 | |
| [1713] target_atag_imix_r:170 | |
| [1714] fg_swocv_v buf [0], [0x560c8128:0x560c8129:1] | |
| [1715] fg_swocv_i buf [0], [0x560c8128:0x560c8129:1] | |
| [1716] shutdown_time buf [0], [0x560c8128:0x560c8129:1] | |
| [1717] boot_voltage buf [0], [0x560c8128:0x560c8129:1] | |
| [1718] boot_voltage buf [0], [0x560c8128:0x560c8129:1] | |
| [1719] Not Support VCORE DVFS | |
| [1754] mt_disp_get_lcd_time, fps=5964 | |
| [1754] videolfb - fb_base = 0x7bae0000 | |
| [1755] videolfb - islcmfound = 1 | |
| [1755] videolfb - fps = 5964 | |
| [1755] videolfb - vram = 32636928 | |
| [1756] videolfb - lcmname = kd101n92_45ni_a003_dsi | |
| [ | |
| [ 0.000000] <0>-(0)[0:swapper]psci: probing for conduit method from DT. | |
| [ 0.000000] <0>-(0)[0:swapper]psci: PSCIv1.1 detected in firmware. | |
| [ 0.000000] <0>-(0)[0:swapper]psci: Using standard PSCI v0.2 function IDs | |
| [ 0.000000] <0>-(0)[0:swapper]psci: Trusted OS migration not required | |
| [ 0.000000] <0>-(0)[0:swapper]psci: SMC Calling Convention v1.1 | |
| [ 0.000000] <0>-(0)[0:swapper]random: get_random_bytes called from start_kernel+0xa4/0x41c with crng_init=0 | |
| [ 0.000000] <0>-(0)[0:swapper]percpu: Embedded 26 pages/cpu @ffffffc0fff2b000 s67480 r8192 d30824 u106496 | |
| [ 0.000000] <0>-(0)[0:swapper]Detected VIPT I-cache on CPU0 | |
| [ 0.000000] <0>-(0)[0:swapper]CPU features: enabling workaround for ARM erratum 845719 | |
| [ 0.000000] <0>-(0)[0:swapper]Built 1 zonelists, mobility grouping on. Total pages: 1014128 | |
| [ 0.000000] <0>-(0)[0:swapper]Kernel command line: console=tty0 console=ttyS0,921600n1 earlycon=uart8250,mmio32,0x11002000 vmalloc=496M androidboot.hardware=mt8168 firmware_class.path=/vendor/firmware loop.max_part=7 has_battery_removed=0 skip_initramfs ro rootwait init=/init dm="1 vroot none ro 1,0 2716984 verity 1 PARTUUID=15947f6b-38aa-4e7c-8bdf-1adb98632d7e PARTUUID=15947f6b-38aa-4e7c-8bdf-1adb98632d7e 4096 4096 339623 339623 sha1 85a7824f7cf8e6c015432c657774ab9c9f2d92b9 95180092a2a9db10da47b2c8d0b5a239af3d9e3d9c49e87fccb81701cf2ee3c3 10 restart_on_corruption ignore_zero_blocks use_fec_from_device PARTUUID=15947f6b-38aa-4e7c-8bdf-1adb98632d7e fec_roots 2 fec_blocks 342299 fec_start 342299" root=/dev/dm-0 androidboot.vbmeta.device=PARTUUID=78630870-afb8-4e2c-9108-847a27e90dc9 androidboot.vbmeta.avb_version=1.1 androidboot.vbmeta.device_state=locked androidboot.vbmeta.invalidate_on_error=yes androidboot.veritymode=enforcing androidboot.verifiedbootstate=green bootopt=64S3,32N2,64N2 buildvar | |
| [ 0.000000] <0>-(0)[0:swapper]device-mapper: init: will configure 1 devices | |
| [ 0.000000] -(0)[0:swapper]PID hash table entries: 4096 (order: 3, 32768 bytes) | |
| [ 0.000000] -(0)[0:swapper]Dentry cache hash table entries: 524288 (order: 10, 4194304 bytes) | |
| [ 0.000000] -(0)[0:swapper]Inode-cache hash table entries: 262144 (order: 9, 2097152 bytes) | |
| [ 0.000000] -(0)[0:swapper]software IO TLB [mem 0xfaf00000-0xfef00000] (64MB) mapped at [ffffffc0baf00000-ffffffc0beefffff] | |
| [ 0.000000] -(0)[0:swapper]Memory: 3959384K/4122048K available (12412K kernel code, 1190K rwdata, 4164K rodata, 960K init, 3937K bss, 162664K reserved, 0K cma-reserved) | |
| [ 0.000000] -(0)[0:swapper]Virtual kernel memory layout: | |
| [ 0.000000] -(0)[0:062] -(0)[1:swapper/0]ramoops: pstore:address is 0x54410000, size is 0xe0000, console_size is 0x40000, pmsg_size is 0x10000 | |
| [ 0.148759] -(0)[1:swapper/0]pstore: using zlib compression | |
| [ 0.149872] -(0)[1:swapper/0]console [pstore-1] enabled | |
| [ 0.150599] -(0)[1:swapper/0]pstore: Registered ramoops as persistent store backend | |
| [ 0.151604] -(0)[1:swapper/0]ramoops: attached 0xe0000@0x54410000, ecc: 0/0 | |
| [ 0.152690] -(0)[1:swapper/0]mt_pwrap_init++++ | |
| [ 0.153375] -(0)[1:swapper/0]PWRAP reg: 0xffffff80096fc000, irq: 7 | |
| [ 0.154386] -(0)[1:swapper/0]is_pwrap_init_done 1 | |
| [ 0.155027] -(0)[1:swapper/0]mt_pwrap_init---- | |
| [ 0.155830] -(1)[1:swapper/0]cpuidle: using governor menu | |
| [ 0.157242] -(1)[1:swapper/0]vdso: 2 pages (1 code @ ffffff8008ca6000, 1 data @ ffffff80091b4000) | |
| [ 0.158397] -(1)[1:swapper/0]hw-breakpoint: found 6 breakpoint and 4 watchpoint registers. | |
| [ 0.159666] -(0)[1:swapper/0]DMA: preallocated 256 KiB pool for atomic allocations | |
| [ 0.160730] -(0)[1:swapper/0]mrdump_cblock_init: no mrdump_cb | |
| [ 0.161532] -(0)[1:swapper/0]mirdump: reserved 544f0000+8000->ffffff80097d3000 | |
| [ 0.161676] -(0)[1:swapper/0]mrdump_full_init: MT-RAMDUMP no control block | |
| [ 0.163741] -(0)[1:swapper/0] | |
| [ 0.163741] MTK_SIP_KERNEL_WDT - 0xffffff80086add00 | |
| [ 0.164777] -(0)[1:swapper/0] | |
| [ 0.164777] atf_aee_debug_virt_addr = 0xffffff80097e8000 | |
| [ 0.165896] -(0)[1:swapper/0][CMDQ]cmdq_init enter | |
| [ 0.165946] -(0)[1:swapper/0][cmdq] cmdq_init enter | |
| [ 0.201291] -(0)[1:swapper/0]BOOTPROF: 201.288153:probe: probe=platform_drv_probe drv=clk-mt8168(ffffff8009226950) 18.251077ms | |
| [ 0.206292] -(0)[1:swapper/0]mtk pctrl init OK | |
| [ 0.210026] -(0)[1:swapper/0][EMI] module probe. | |
| [ 0.21064 | |
| [ 0.392541] -(0)[1:swapper/0]Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled | |
| [ 0.394147] -(0)[1:swapper/0]console [ttyS0] disabled | |
| [ 0.415045] -(0)[1:swapper/0]11002000.uart0: ttyS0 at MMIO 0x11002000 (irq = 186, base_baud = 1625000) is a ST16650V2 | |
| [ 0.416482] -(0)[1:swapper/0]console [ttyS0] enabled | |
| [ 0.417137] -(0)[1:swapper/0]bootconsole [uart8250] disabled |
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