Created
September 6, 2022 12:21
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| [+] Version string: Linux version 4.14.87+ (user@PC-20190507A056) (gcc version 6.3.1 20170109 (Linaro GCC 6.3-2017.02)) #1 SMP PREEMPT Wed Nov 4 09:09:54 JST 2020 | |
| [+] Guessed architecture: aarch64 successfully in 2.20 seconds | |
| [+] Found kallsyms_token_table at file offset 0x00e500c0 | |
| [+] Found kallsyms_token_index at file offset 0x00e504c0 | |
| [+] Found kallsyms_markers at file offset 0x00e4f9c0 | |
| [+] Found kallsyms_names at file offset 0x00da62c0 | |
| [+] Found kallsyms_num_syms at file offset 0x00da61c0 | |
| [i] Negative offsets overall: 0 % | |
| [i] Null addresses overall: 0 % | |
| [+] Found kallsyms_offsets at file offset 0x00d71fc0 | |
| Symbol types => ['R', 'T', 'W', 't'] | |
| ffffff8008081000 T do_undefinstr | |
| ffffff8008081000 t efi_header_end | |
| ffffff8008081000 T _stext | |
| ffffff8008081000 T __exception_text_start | |
| ffffff8008081480 T do_sysinstr | |
| ffffff80080814f8 T do_mem_abort | |
| ffffff80080815c8 T do_el0_irq_bp_hardening | |
| ffffff8008081638 T do_el0_ia_bp_hardening | |
| ffffff80080816e8 T do_sp_pc_abort | |
| ffffff8008081870 T do_debug_exception | |
| ffffff80080819e8 t gic_handle_irq | |
| ffffff8008081ab0 t gic_handle_irq | |
| ffffff8008081c7c T __exception_text_end | |
| ffffff8008081c80 T __do_softirq | |
| ffffff8008081c80 T __irqentry_text_end | |
| ffffff8008081c80 T __irqentry_text_start | |
| ffffff8008081c80 T __softirqentry_text_start | |
| ffffff8008082038 T __entry_text_start | |
| ffffff8008082038 T __softirqentry_text_end | |
| ffffff8008082800 T vectors | |
| ffffff8008082f8c t el0_sync_invalid | |
| ffffff8008083088 t el0_irq_invalid | |
| ffffff8008083184 t el0_fiq_invalid | |
| ffffff8008083280 t el0_error_invalid | |
| ffffff800808337c t el0_fiq_invalid_compat | |
| ffffff800808347c t el0_error_invalid_compat | |
| ffffff800808357c t el1_sync_invalid | |
| ffffff8008083634 t el1_irq_invalid | |
| ffffff80080836ec t el1_fiq_invalid | |
| ffffff80080837a4 t el1_error_invalid | |
| ffffff8008083880 t el1_sync | |
| ffffff8008083944 t el1_sync_nest | |
| ffffff800808395c t el1_sync_nest_skip_dec | |
| ffffff8008083968 t el1_sync_nest_skip | |
| ffffff80080839ac t el1_da | |
| ffffff80080839ac t el1_ia | |
| ffffff80080839ec t el1_da_nest_skip_dec | |
| ffffff8008083a7c t el1_sp_pc | |
| ffffff8008083a90 t el1_undef | |
| ffffff8008083aa0 t el1_dbg | |
| ffffff8008083b58 t el1_inv | |
| ffffff8008083b80 t el1_irq | |
| ffffff8008083d0c t el1_preempt | |
| ffffff8008083d40 t el0_sync | |
| ffffff8008083ec0 t el0_sync_compat | |
| ffffff8008084020 t el0_svc_compat | |
| ffffff8008084040 t el0_irq_compat | |
| ffffff8008084130 t el0_da | |
| ffffff8008084154 t el0_ia | |
| ffffff8008084170 t el0_fpsimd_acc | |
| ffffff8008084184 t el0_fpsimd_exc | |
| ffffff8008084198 t el0_sp_pc | |
| ffffff80080841b4 t el0_undef | |
| ffffff80080841c4 t el0_sys | |
| ffffff80080841d8 t el0_dbg | |
| ffffff80080841f4 t el0_inv | |
| ffffff8008084240 t el0_irq | |
| ffffff8008084328 t el0_irq_naked | |
| ffffff800808437c t ret_fast_syscall | |
| ffffff800808449c t ret_fast_syscall_trace | |
| ffffff80080844a4 t work_pending | |
| ffffff80080844b4 t ret_to_user | |
| ffffff80080844c4 t finish_ret_to_user | |
| ffffff8008084600 t el0_svc | |
| ffffff800808460c t el0_svc_naked | |
| ffffff8008084644 t ni_sys | |
| ffffff8008084650 t __sys_trace | |
| ffffff8008084698 t __sys_trace_return | |
| ffffff800808469c t __sys_trace_return_skipped | |
| ffffff80080846a8 t __ni_sys_trace | |
| ffffff80080846b4 T __entry_text_end | |
| ffffff80080846b8 t run_init_process | |
| ffffff80080846f0 t try_to_run_init_process | |
| ffffff8008084740 t initcall_blacklisted | |
| ffffff8008084808 T do_one_initcall | |
| ffffff8008084980 t match_dev_by_uuid | |
| ffffff80080849b8 T name_to_dev_t | |
| ffffff8008084d98 t rootfs_mount | |
| ffffff8008084e20 W calibrate_delay_is_known | |
| ffffff8008084e28 W calibration_delay_done | |
| ffffff8008084e30 T calibrate_delay | |
| ffffff80080850f0 t clear_os_lock | |
| ffffff8008085100 t create_debug_debugfs_entry | |
| ffffff8008085130 t debug_monitors_init | |
| ffffff8008085168 t send_user_sigtrap | |
| ffffff8008085228 t brk_handler | |
| ffffff80080852f8 t single_step_handler | |
| ffffff80080853e0 T debug_monitors_arch | |
| ffffff8008085400 T enable_debug_monitors | |
| ffffff8008085568 T disable_debug_monitors | |
| ffffff80080856a8 T register_step_hook | |
| ffffff80080856f8 T unregister_step_hook | |
| ffffff8008085748 T register_break_hook | |
| ffffff80080857a0 T unregister_break_hook | |
| ffffff80080857f8 T aarch32_break_handler | |
| ffffff8008085bd0 T user_rewind_single_step | |
| ffffff8008085bf0 T user_fastforward_single_step | |
| ffffff8008085c10 T kernel_enable_single_step | |
| ffffff8008085c78 T kernel_disable_single_step | |
| ffffff8008085cc8 T kernel_active_single_step | |
| ffffff8008085d08 T user_enable_single_step | |
| ffffff8008085d48 T user_disable_single_step | |
| ffffff8008085d64 T sys_rt_sigreturn_wrapper | |
| ffffff8008085d6c T cpu_switch_to | |
| ffffff8008085dc0 T ret_from_fork | |
| ffffff8008085dd8 T arch_show_interrupts | |
| ffffff8008085e28 t fpsimd_cpu_dead | |
| ffffff8008085e48 T kernel_neon_begin | |
| ffffff8008085fa0 t fpsimd_cpu_pm_notifier | |
| ffffff8008086078 T kernel_neon_end | |
| ffffff8008086120 T do_fpsimd_acc | |
| ffffff8008086140 T do_fpsimd_exc | |
| ffffff80080861f0 T fpsimd_thread_switch | |
| ffffff80080862c8 T fpsimd_flush_thread | |
| ffffff8008086368 T fpsimd_preserve_current_state | |
| ffffff8008086400 T fpsimd_restore_current_state | |
| ffffff80080864d8 T fpsimd_update_current_state | |
| ffffff8008086590 T fpsimd_flush_task_state | |
| ffffff80080865a0 T __efi_fpsimd_begin | |
| ffffff80080866c0 T __efi_fpsimd_end | |
| ffffff8008086748 T fpsimd_save_state | |
| ffffff800808679c T fpsimd_load_state | |
| ffffff8008086800 t show_data.part.0.constprop.3 | |
| ffffff8008086908 T arch_cpu_idle | |
| ffffff8008086ab8 T arch_cpu_idle_dead | |
| ffffff8008086ad0 T machine_shutdown | |
| ffffff8008086ae8 T machine_halt | |
| ffffff8008086b00 T machine_power_off | |
| ffffff8008086b28 T machine_restart | |
| ffffff8008086b98 T __show_regs | |
| ffffff8008086e50 T show_regs | |
| ffffff8008086e80 T flush_thread | |
| ffffff8008086eb8 T release_thread | |
| ffffff8008086ec0 T arch_dup_task_struct | |
| ffffff8008086f08 T copy_thread | |
| ffffff8008087080 T tls_preserve_current_state | |
| ffffff80080870a8 T uao_thread_switch | |
| ffffff80080870c8 T __switch_to | |
| ffffff80080871b0 T get_wchan | |
| ffffff80080872f8 T arch_align_stack | |
| ffffff8008087350 T arch_randomize_brk | |
| ffffff8008087388 T arch_setup_new_exec | |
| ffffff80080873a0 t perf_trace_sys_exit | |
| ffffff8008087470 t perf_trace_sys_enter | |
| ffffff8008087560 t trace_event_raw_event_sys_enter | |
| ffffff8008087648 t trace_event_raw_event_sys_exit | |
| ffffff8008087710 t trace_raw_output_sys_enter | |
| ffffff8008087790 t trace_raw_output_sys_exit | |
| ffffff80080877f0 t tls_set | |
| ffffff80080878c8 t system_call_set | |
| ffffff80080879b8 t compat_tls_set | |
| ffffff8008087a98 t compat_vfp_set | |
| ffffff8008087c78 t fpr_set | |
| ffffff8008087d80 t gpr_get | |
| ffffff8008087e30 t system_call_get | |
| ffffff8008087f00 t compat_gpr_get | |
| ffffff8008088058 t compat_tls_get | |
| ffffff8008088128 t compat_vfp_get | |
| ffffff8008088328 t fpr_get | |
| ffffff80080883f8 t ptrace_hbp_create | |
| ffffff8008088590 t ptrace_hbptriggered | |
| ffffff8008088688 t tls_get | |
| ffffff8008088758 t ptrace_hbp_get_event | |
| ffffff80080887c0 t ptrace_hbp_get_ctrl | |
| ffffff8008088840 t compat_ptrace_hbp_get | |
| ffffff80080888e0 t hw_break_get | |
| ffffff8008088db8 t ptrace_hbp_set_ctrl | |
| ffffff8008088f30 t ptrace_hbp_set_addr | |
| ffffff8008088ff0 t compat_ptrace_hbp_set.isra.5 | |
| ffffff8008089038 t hw_break_set | |
| ffffff80080893f8 T regs_query_register_offset | |
| ffffff8008089458 T regs_get_kernel_stack_nth | |
| ffffff80080894a8 T ptrace_disable | |
| ffffff80080894c0 T flush_ptrace_hw_breakpoint | |
| ffffff8008089530 T ptrace_hw_copy_thread | |
| ffffff8008089550 T task_user_regset_view | |
| ffffff8008089598 T arch_ptrace | |
| ffffff80080895b0 T syscall_trace_enter | |
| ffffff8008089768 T syscall_trace_exit | |
| ffffff80080898f8 T valid_user_regs | |
| ffffff8008089a00 t compat_gpr_set | |
| ffffff8008089bb8 T compat_arch_ptrace | |
| ffffff800808a380 t gpr_set | |
| ffffff800808a4a0 t dump_kernel_offset | |
| ffffff800808a4c0 T arch_match_cpu_phys_id | |
| ffffff800808a4e0 t __sigframe_alloc | |
| ffffff800808a5b0 t restore_fpsimd_context | |
| ffffff800808aae8 t do_signal | |
| ffffff800808ca48 T sys_rt_sigreturn | |
| ffffff800808d7f0 T do_notify_resume | |
| ffffff800808d910 T sys_mmap | |
| ffffff800808d938 T SyS_arm64_personality | |
| ffffff800808d938 T sys_arm64_personality | |
| ffffff800808d9a0 t save_trace | |
| ffffff800808da48 T unwind_frame | |
| ffffff800808dae8 T walk_stackframe | |
| ffffff800808db40 t __save_stack_trace | |
| ffffff800808dc98 T save_stack_trace_tsk | |
| ffffff800808dcb0 T save_stack_trace | |
| ffffff800808dcd8 T save_stack_trace_regs | |
| ffffff800808dd70 T profile_pc | |
| ffffff800808de08 t ctr_read_handler | |
| ffffff800808de40 t cntfrq_read_handler | |
| ffffff800808de80 t cntvct_read_handler | |
| ffffff800808df40 T dump_backtrace | |
| ffffff800808e418 T show_stack | |
| ffffff800808e438 T die | |
| ffffff800808e690 t bug_handler.part.2 | |
| ffffff800808e700 t bug_handler | |
| ffffff800808e730 T arm64_notify_die | |
| ffffff800808e780 t force_signal_inject.isra.4 | |
| ffffff800808e8a8 T register_undef_hook | |
| ffffff800808e900 T unregister_undef_hook | |
| ffffff800808e960 T arm64_notify_segfault | |
| ffffff800808e9d0 t user_cache_maint_handler | |
| ffffff800808ec90 T cpu_enable_cache_maint_trap | |
| ffffff800808eca8 T do_ni_syscall | |
| ffffff800808ece0 T esr_get_class_string | |
| ffffff800808ecf8 T bad_mode | |
| ffffff800808ed80 T bad_el0_sync | |
| ffffff800808ee48 T __pte_error | |
| ffffff800808ee70 T __pmd_error | |
| ffffff800808ee98 T __pud_error | |
| ffffff800808eec0 T __pgd_error | |
| ffffff800808eee8 T is_valid_bugaddr | |
| ffffff800808eef0 t __dump_instr.isra.0 | |
| ffffff800808f0e0 t dump_instr | |
| ffffff800808f180 T __memcpy_fromio | |
| ffffff800808f218 T __memcpy_toio | |
| ffffff800808f2b0 T __memset_io | |
| ffffff800808f348 t vdso_mremap | |
| ffffff800808f388 T aarch32_setup_vectors_page | |
| ffffff800808f408 T arch_setup_additional_pages | |
| ffffff800808f510 T update_vsyscall | |
| ffffff800808f5c8 T update_vsyscall_tz | |
| ffffff800808f800 T __hyp_stub_vectors | |
| ffffff8008090000 t el1_sync | |
| ffffff8008090044 t el2_sync_invalid | |
| ffffff8008090048 t el2_irq_invalid | |
| ffffff800809004c t el2_fiq_invalid | |
| ffffff8008090050 t el2_error_invalid | |
| ffffff8008090054 t el1_sync_invalid | |
| ffffff8008090058 t el1_irq_invalid | |
| ffffff800809005c t el1_fiq_invalid | |
| ffffff8008090060 t el1_error_invalid | |
| ffffff8008090064 T __hyp_set_vectors | |
| ffffff8008090074 T __hyp_reset_vectors | |
| ffffff8008090088 t cpu_psci_cpu_die | |
| ffffff80080900c8 t cpu_psci_cpu_boot | |
| ffffff8008090138 t cpu_psci_cpu_kill | |
| ffffff8008090238 t cpu_psci_cpu_disable | |
| ffffff8008090268 t aarch64_get_imm_shift_mask | |
| ffffff80080903a8 t __check_eq | |
| ffffff80080903b0 t __check_ne | |
| ffffff80080903c0 t __check_cs | |
| ffffff80080903c8 t __check_cc | |
| ffffff80080903d8 t __check_mi | |
| ffffff80080903e0 t __check_pl | |
| ffffff80080903f0 t __check_vs | |
| ffffff80080903f8 t __check_vc | |
| ffffff8008090408 t __check_hi | |
| ffffff8008090418 t __check_ls | |
| ffffff8008090428 t __check_ge | |
| ffffff8008090440 t __check_lt | |
| ffffff8008090450 t __check_gt | |
| ffffff8008090468 t __check_le | |
| ffffff8008090478 t __check_al | |
| ffffff8008090480 t aarch64_insn_encode_register | |
| ffffff8008090580 t aarch64_insn_encode_ldst_size | |
| ffffff8008090610 t aarch64_insn_is_nop.part.2 | |
| ffffff8008090650 t __aarch64_insn_hotpatch_safe.part.3 | |
| ffffff80080906d8 t aarch64_insn_encode_immediate.part.5 | |
| ffffff80080907a0 t __aarch64_insn_write | |
| ffffff80080908e8 T aarch64_get_insn_class | |
| ffffff8008090900 T aarch64_insn_is_nop | |
| ffffff8008090938 T aarch64_insn_is_branch_imm | |
| ffffff8008090978 T aarch64_insn_read | |
| ffffff80080909e0 T aarch64_insn_write | |
| ffffff80080909f8 T aarch64_insn_uses_literal | |
| ffffff8008090a28 T aarch64_insn_is_branch | |
| ffffff8008090a90 T aarch64_insn_hotpatch_safe | |
| ffffff8008090b08 T aarch64_insn_patch_text_nosync | |
| ffffff8008090b50 t aarch64_insn_patch_text_cb | |
| ffffff8008090c38 T aarch64_insn_patch_text | |
| ffffff8008090d30 T aarch64_insn_decode_immediate | |
| ffffff8008090dd0 T aarch64_insn_encode_immediate | |
| ffffff8008090e00 T aarch64_insn_decode_register | |
| ffffff8008090e90 T aarch64_insn_gen_branch_imm | |
| ffffff8008090f58 T aarch64_insn_gen_comp_branch_imm | |
| ffffff8008091080 T aarch64_insn_gen_cond_branch_imm | |
| ffffff8008091148 T aarch64_insn_gen_hint | |
| ffffff8008091158 T aarch64_insn_gen_nop | |
| ffffff8008091168 T aarch64_insn_gen_branch_reg | |
| ffffff80080911e0 T aarch64_insn_gen_load_store_reg | |
| ffffff80080912a0 T aarch64_insn_gen_load_store_pair | |
| ffffff8008091458 T aarch64_insn_gen_load_store_ex | |
| ffffff8008091520 T aarch64_insn_gen_prefetch | |
| ffffff8008091650 T aarch64_insn_gen_add_sub_imm | |
| ffffff8008091788 T aarch64_insn_gen_bitfield | |
| ffffff8008091938 T aarch64_insn_gen_movewide | |
| ffffff8008091a88 T aarch64_insn_gen_add_sub_shifted_reg | |
| ffffff8008091bf0 T aarch64_insn_gen_data1 | |
| ffffff8008091cf8 T aarch64_insn_gen_data2 | |
| ffffff8008091e38 T aarch64_insn_gen_data3 | |
| ffffff8008091f40 T aarch64_insn_gen_logical_shifted_reg | |
| ffffff80080920d8 T aarch64_get_branch_offset | |
| ffffff8008092180 T aarch64_set_branch_offset | |
| ffffff8008092228 T aarch64_insn_adrp_get_offset | |
| ffffff8008092268 T aarch64_insn_adrp_set_offset | |
| ffffff80080922c0 T aarch64_insn_extract_system_reg | |
| ffffff80080922c8 T aarch32_insn_is_wide | |
| ffffff80080922d8 T aarch32_insn_extract_reg_num | |
| ffffff80080922f0 T aarch32_insn_mcr_extract_opc2 | |
| ffffff80080922f8 T aarch32_insn_mcr_extract_crm | |
| ffffff8008092300 t save_return_addr | |
| ffffff8008092328 T return_address | |
| ffffff80080923b8 t c_start | |
| ffffff80080923c8 t c_next | |
| ffffff80080923e0 t c_stop | |
| ffffff80080923e8 t c_show | |
| ffffff8008092800 t cpuid_cpu_offline | |
| ffffff8008092880 t midr_el1_show | |
| ffffff80080928b8 t cpuid_cpu_online | |
| ffffff8008092958 t __cpuinfo_store_cpu | |
| ffffff8008092ae0 t revidr_el1_show | |
| ffffff8008092b20 T machine_desc_set | |
| ffffff8008092b30 T cpuinfo_store_cpu | |
| ffffff8008092b88 t cpu_enable_trap_ctr_access | |
| ffffff8008092ba0 t call_smc_arch_workaround_1 | |
| ffffff8008092bb0 t call_hvc_arch_workaround_1 | |
| ffffff8008092bc0 t qcom_link_stack_sanitization | |
| ffffff8008092c10 t is_kryo_midr | |
| ffffff8008092c78 t has_mismatched_cache_type | |
| ffffff8008092d18 t is_affected_midr_range | |
| ffffff8008092db8 t install_bp_hardening_cb.isra.1 | |
| ffffff8008092e18 t qcom_enable_link_stack_sanitization | |
| ffffff8008092e38 t enable_smccc_arch_workaround_1 | |
| ffffff8008092ee0 T arm64_set_ssbd_mitigation | |
| ffffff8008092f30 t has_ssbd_mitigation | |
| ffffff8008093168 T verify_local_cpu_errata_workarounds | |
| ffffff8008093238 T update_cpu_errata_workarounds | |
| ffffff8008093260 t search_cmp_ftr_reg | |
| ffffff8008093270 t has_no_hw_prefetch | |
| ffffff80080932b0 t runs_at_el2 | |
| ffffff80080932c0 t hyp_offset_low | |
| ffffff80080932f8 t cpu_copy_el2regs | |
| ffffff8008093318 t dump_cpu_hwcaps | |
| ffffff8008093348 t cpufeature_pan_not_uao | |
| ffffff80080933c0 t __this_cpu_has_cap | |
| ffffff8008093458 t kpti_install_ng_mappings | |
| ffffff8008093698 t emulate_mrs | |
| ffffff80080937c0 t verify_local_elf_hwcaps | |
| ffffff80080938b8 t check_update_ftr_reg.part.6 | |
| ffffff80080938b8 t read_sanitised_ftr_reg.part.7 | |
| ffffff80080938c0 t check_update_ftr_reg | |
| ffffff8008093a40 T read_sanitised_ftr_reg | |
| ffffff8008093a88 t has_cpuid_feature | |
| ffffff8008093dd0 t has_useable_gicv3_cpuif | |
| ffffff8008093e48 t has_no_fpsimd | |
| ffffff8008093e68 t unmap_kernel_at_el0 | |
| ffffff8008093fc0 T update_cpu_features | |
| ffffff80080943a8 T update_cpu_capabilities | |
| ffffff8008094480 T check_local_cpu_capabilities | |
| ffffff80080945d8 T this_cpu_has_cap | |
| ffffff8008094638 t __apply_alternatives | |
| ffffff8008094780 t __apply_alternatives_multi_stop | |
| ffffff8008094840 t patch_alternative | |
| ffffff8008094988 T apply_alternatives | |
| ffffff80080949e0 t _init_cache_level | |
| ffffff8008094aa0 t _populate_cache_leaves | |
| ffffff8008094b78 T init_cache_level | |
| ffffff8008094bd0 T populate_cache_leaves | |
| ffffff8008094c28 t perf_trace_ipi_raise | |
| ffffff8008094d08 t perf_trace_ipi_handler | |
| ffffff8008094dd0 t trace_event_raw_event_ipi_raise | |
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| ffffff8008152d48 T update_rlimit_cpu | |
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| ffffff8008476388 T ucs2_strnlen | |
| ffffff80084763c0 T ucs2_strlen | |
| ffffff8008476400 T ucs2_strsize | |
| ffffff8008476440 T ucs2_strncmp | |
| ffffff80084764a8 T ucs2_utf8size | |
| ffffff80084764e8 T ucs2_as_utf8 | |
| ffffff80084765f0 T sbitmap_resize | |
| ffffff8008476658 T sbitmap_any_bit_set | |
| ffffff8008476698 T sbitmap_queue_resize | |
| ffffff8008476748 T sbitmap_init_node | |
| ffffff8008476850 T sbitmap_any_bit_clear | |
| ffffff80084768e0 t __sbitmap_get_word | |
| ffffff80084769a8 T sbitmap_get | |
| ffffff8008476a80 T sbitmap_get_shallow | |
| ffffff8008476b58 T sbitmap_weight | |
| ffffff8008476bc0 T sbitmap_show | |
| ffffff8008476c40 T sbitmap_bitmap_show | |
| ffffff8008476e18 T __sbitmap_queue_get | |
| ffffff8008476f90 T __sbitmap_queue_get_shallow | |
| ffffff8008477108 T sbitmap_queue_clear | |
| ffffff8008477280 T sbitmap_queue_wake_all | |
| ffffff80084772f0 T sbitmap_queue_show | |
| ffffff8008477470 T sbitmap_queue_init_node | |
| ffffff8008477658 t gic_mask_irq | |
| ffffff8008477688 t gic_eoimode1_mask_irq | |
| ffffff80084776d0 t gic_unmask_irq | |
| ffffff8008477700 t gic_eoi_irq | |
| ffffff8008477718 t gic_irq_set_irqchip_state | |
| ffffff80084777a8 t gic_irq_set_vcpu_affinity | |
| ffffff80084777e8 t gic_irq_domain_unmap | |
| ffffff80084777f0 t gic_cpu_if_up | |
| ffffff8008477838 t gic_handle_cascade_irq | |
| ffffff8008477938 t gic_set_affinity | |
| ffffff8008477a20 t gic_set_type | |
| ffffff8008477a68 t gic_irq_domain_map | |
| ffffff8008477b40 t gic_teardown | |
| ffffff8008477b98 t gic_of_setup | |
| ffffff8008477c80 t gic_peek_irq.isra.1 | |
| ffffff8008477cb0 t gic_eoimode1_eoi_irq | |
| ffffff8008477cd8 t gic_irq_get_irqchip_state | |
| ffffff8008477d68 t gic_irq_domain_translate | |
| ffffff8008477e18 t gic_irq_domain_alloc | |
| ffffff8008477ed8 t gic_get_cpumask.isra.5 | |
| ffffff8008477f48 t gic_cpu_init | |
| ffffff8008478070 t gic_starting_cpu | |
| ffffff8008478090 t gic_raise_softirq | |
| ffffff8008478150 t gic_init_bases | |
| ffffff8008478400 T gic_cpu_if_down | |
| ffffff8008478430 T gic_dist_save | |
| ffffff8008478530 T gic_dist_restore | |
| ffffff8008478670 T gic_cpu_save | |
| ffffff8008478700 T gic_cpu_restore | |
| ffffff80084787c8 t gic_notifier | |
| ffffff8008478850 T gic_of_init_child | |
| ffffff80084789e0 T gic_get_kvm_info | |
| ffffff80084789f0 T gic_set_kvm_info | |
| ffffff8008478a10 T gic_enable_quirks | |
| ffffff8008478a88 T gic_configure_irq | |
| ffffff8008478ba0 T gic_dist_config | |
| ffffff8008478c40 T gic_cpu_config | |
| ffffff8008478cb0 t gic_eoi_irq | |
| ffffff8008478cc0 t gic_eoimode1_eoi_irq | |
| ffffff8008478cf0 t __gic_update_vlpi_properties | |
| ffffff8008478d28 t gic_dist_security_disabled | |
| ffffff8008478d40 t gic_iterate_rdists | |
| ffffff8008478e28 t __gic_populate_rdist | |
| ffffff8008478ee8 t gic_cpu_sys_reg_init | |
| ffffff8008478f68 t gic_populate_rdist | |
| ffffff8008478fc8 t gic_irq_domain_free | |
| ffffff8008479030 t gic_do_wait_for_rwp | |
| ffffff80084790a8 t gic_dist_wait_for_rwp | |
| ffffff80084790c8 t gic_redist_wait_for_rwp | |
| ffffff80084790f0 t gic_enable_redist | |
| ffffff80084791c8 t gic_set_type | |
| ffffff8008479248 t gic_raise_softirq | |
| ffffff80084793c8 t partition_domain_translate | |
| ffffff8008479460 t gic_peek_irq.isra.0 | |
| ffffff80084794b0 t gic_irq_get_irqchip_state | |
| ffffff8008479548 t gic_poke_irq.isra.1 | |
| ffffff80084795d0 t gic_mask_irq | |
| ffffff80084795f0 t gic_unmask_irq | |
| ffffff8008479610 t gic_irq_set_irqchip_state | |
| ffffff80084796c0 t gic_set_affinity | |
| ffffff8008479800 t gic_eoimode1_mask_irq | |
| ffffff8008479840 t gic_irq_set_vcpu_affinity | |
| ffffff8008479878 t gic_irq_domain_translate | |
| ffffff8008479970 t gic_irq_domain_alloc | |
| ffffff8008479bc0 t gic_cpu_pm_notifier | |
| ffffff8008479c38 t gic_irq_domain_select | |
| ffffff8008479cf0 t gic_cpu_init.part.7 | |
| ffffff8008479d40 t gic_starting_cpu | |
| ffffff8008479d60 t partition_irq_mask | |
| ffffff8008479dc8 t partition_irq_unmask | |
| ffffff8008479e30 t partition_irq_set_irqchip_state | |
| ffffff8008479ea8 t partition_irq_get_irqchip_state | |
| ffffff8008479f18 t partition_irq_set_type | |
| ffffff8008479f50 t partition_irq_print_chip | |
| ffffff8008479f88 t partition_handle_irq | |
| ffffff800847a110 t partition_domain_alloc | |
| ffffff800847a218 t partition_domain_free | |
| ffffff800847a268 T partition_translate_id | |
| ffffff800847a2f0 T partition_create_desc | |
| ffffff800847a438 T partition_get_domain | |
| ffffff800847a450 t mtk_sysirq_set_type | |
| ffffff800847a520 t mtk_sysirq_domain_translate | |
| ffffff800847a580 t mtk_sysirq_domain_alloc | |
| ffffff800847a688 t mtk_cirq_set_type | |
| ffffff800847a7d0 t mtk_cirq_resume | |
| ffffff800847a800 t mtk_cirq_domain_translate | |
| ffffff800847a888 t mtk_cirq_domain_alloc | |
| ffffff800847a980 t mtk_cirq_unmask | |
| ffffff800847a9c0 t mtk_cirq_mask | |
| ffffff800847aa00 t mtk_cirq_suspend | |
| ffffff800847ab40 t devm_phy_match | |
| ffffff800847ab50 T phy_set_mode | |
| ffffff800847abd0 T phy_reset | |
| ffffff800847ac40 T phy_create_lookup | |
| ffffff800847acf0 T phy_pm_runtime_get | |
| ffffff800847adb8 T phy_pm_runtime_get_sync | |
| ffffff800847ae20 T phy_pm_runtime_put | |
| ffffff800847ae50 T phy_pm_runtime_put_sync | |
| ffffff800847ae80 T phy_pm_runtime_allow | |
| ffffff800847aea8 T phy_pm_runtime_forbid | |
| ffffff800847aed0 T phy_power_off | |
| ffffff800847afc8 T of_phy_provider_unregister | |
| ffffff800847b038 t devm_phy_provider_release | |
| ffffff800847b050 t _of_phy_get | |
| ffffff800847b1e8 T of_phy_get | |
| ffffff800847b270 T phy_put | |
| ffffff800847b2b8 t devm_phy_release | |
| ffffff800847b2d0 T of_phy_simple_xlate | |
| ffffff800847b378 T devm_of_phy_get | |
| ffffff800847b420 T devm_of_phy_get_by_index | |
| ffffff800847b500 T phy_create | |
| ffffff800847b6e8 T devm_phy_create | |
| ffffff800847b790 T phy_destroy | |
| ffffff800847b7c0 t devm_phy_consume | |
| ffffff800847b7f0 T __of_phy_provider_register | |
| ffffff800847b8e0 T __devm_of_phy_provider_register | |
| ffffff800847b9a0 t phy_release | |
| ffffff800847b9e0 T phy_remove_lookup | |
| ffffff800847bab8 T phy_init | |
| ffffff800847bbb0 T phy_exit | |
| ffffff800847bca8 T phy_power_on | |
| ffffff800847bdc0 T devm_phy_put | |
| ffffff800847be58 T devm_phy_destroy | |
| ffffff800847bee0 T devm_of_phy_provider_unregister | |
| ffffff800847bf68 T phy_get | |
| ffffff800847c0c0 T phy_optional_get | |
| ffffff800847c0f0 T devm_phy_get | |
| ffffff800847c190 T devm_phy_optional_get | |
| ffffff800847c1c0 T Charger_Detect_Init | |
| ffffff800847c1f0 T Charger_Detect_Release | |
| ffffff800847c220 t mtk_tphy_probe | |
| ffffff800847c530 t mtk_phy_exit | |
| ffffff800847c6a0 t mtk_phy_power_off | |
| ffffff800847c808 t mtk_phy_xlate | |
| ffffff800847ca50 t mtk_phy_power_on | |
| ffffff800847cda0 t mtk_phy_init | |
| ffffff800847d478 T pinctrl_dev_get_name | |
| ffffff800847d488 T pinctrl_dev_get_devname | |
| ffffff800847d4a0 T pinctrl_dev_get_drvdata | |
| ffffff800847d4a8 T pinctrl_find_gpio_range_from_pin_nolock | |
| ffffff800847d540 t devm_pinctrl_match | |
| ffffff800847d550 T pinctrl_add_gpio_range | |
| ffffff800847d5a0 T pinctrl_add_gpio_ranges | |
| ffffff800847d628 T pinctrl_remove_gpio_range | |
| ffffff800847d678 T pinctrl_find_gpio_range_from_pin | |
| ffffff800847d6c8 t pinctrl_get_device_gpio_range | |
| ffffff800847d7c0 T pinctrl_request_gpio | |
| ffffff800847d970 T pinctrl_free_gpio | |
| ffffff800847da18 t pinctrl_gpio_direction | |
| ffffff800847dad8 T pinctrl_gpio_direction_input | |
| ffffff800847daf0 T pinctrl_gpio_direction_output | |
| ffffff800847db08 T pinctrl_gpio_set_config | |
| ffffff800847dbc8 t devm_pinctrl_dev_match | |
| ffffff800847dc08 t create_state | |
| ffffff800847dc80 t pinctrl_free | |
| ffffff800847ddf0 T pinctrl_put | |
| ffffff800847de30 t devm_pinctrl_release | |
| ffffff800847de48 t pinctrl_commit_state | |
| ffffff800847dfb0 T pinctrl_select_state | |
| ffffff800847dfd8 t pinctrl_pm_select_state | |
| ffffff800847e060 T pinctrl_pm_select_default_state | |
| ffffff800847e088 T pinctrl_pm_select_sleep_state | |
| ffffff800847e0b0 T pinctrl_pm_select_idle_state | |
| ffffff800847e0d8 T pinctrl_force_sleep | |
| ffffff800847e110 T pinctrl_force_default | |
| ffffff800847e148 t pinctrl_gpioranges_open | |
| ffffff800847e170 t pinctrl_groups_open | |
| ffffff800847e198 t pinctrl_pins_open | |
| ffffff800847e1c0 t pinctrl_open | |
| ffffff800847e1e8 t pinctrl_maps_open | |
| ffffff800847e210 t pinctrl_devices_open | |
| ffffff800847e238 t pinctrl_gpioranges_show | |
| ffffff800847e378 t pinctrl_pins_show | |
| ffffff800847e480 t pinctrl_devices_show | |
| ffffff800847e5b0 t pinctrl_free_pindescs | |
| ffffff800847e660 t pinctrl_init_controller | |
| ffffff800847e8e0 T pinctrl_register_and_init | |
| ffffff800847e910 T devm_pinctrl_register_and_init | |
| ffffff800847e9d8 T pinctrl_unregister | |
| ffffff800847eae8 t devm_pinctrl_dev_release | |
| ffffff800847eb00 t pinctrl_show | |
| ffffff800847eca8 t pinctrl_maps_show | |
| ffffff800847ee08 T pin_is_valid | |
| ffffff800847ee68 T pinctrl_lookup_state | |
| ffffff800847eef8 T devm_pinctrl_put | |
| ffffff800847ef40 T devm_pinctrl_unregister | |
| ffffff800847ef88 T pinctrl_provide_dummies | |
| ffffff800847ef98 T get_pinctrl_dev_from_devname | |
| ffffff800847f048 T pinctrl_find_and_add_gpio_range | |
| ffffff800847f0c0 t create_pinctrl | |
| ffffff800847f470 T pinctrl_get | |
| ffffff800847f550 T devm_pinctrl_get | |
| ffffff800847f5e8 T pinctrl_enable | |
| ffffff800847f830 T pinctrl_register | |
| ffffff800847f870 T devm_pinctrl_register | |
| ffffff800847f918 T get_pinctrl_dev_from_of_node | |
| ffffff800847f9c0 T pin_get_from_name | |
| ffffff800847fa68 T pin_get_name | |
| ffffff800847fab8 t pinctrl_groups_show | |
| ffffff800847fc70 T pinctrl_get_group_selector | |
| ffffff800847fd20 T pinctrl_get_group_pins | |
| ffffff800847fd88 T pinctrl_register_map | |
| ffffff800847ff60 T pinctrl_register_mappings | |
| ffffff800847ff78 T pinctrl_unregister_map | |
| ffffff8008480038 T pinctrl_init_done | |
| ffffff80084800d8 T pinctrl_utils_add_map_mux | |
| ffffff8008480158 T pinctrl_utils_add_map_configs | |
| ffffff8008480258 T pinctrl_utils_free_map | |
| ffffff80084802c8 T pinctrl_utils_add_config | |
| ffffff8008480350 T pinctrl_utils_reserve_map | |
| ffffff8008480418 t pin_request | |
| ffffff8008480670 t pin_free | |
| ffffff8008480778 t pinmux_pins_open | |
| ffffff80084807a0 t pinmux_functions_open | |
| ffffff80084807c8 t pinmux_pins_show | |
| ffffff8008480a50 t pinmux_functions_show | |
| ffffff8008480bc8 T pinmux_check_ops | |
| ffffff8008480c98 T pinmux_validate_map | |
| ffffff8008480cd0 T pinmux_request_gpio | |
| ffffff8008480d68 T pinmux_free_gpio | |
| ffffff8008480d80 T pinmux_gpio_direction | |
| ffffff8008480db0 T pinmux_map_to_setting | |
| ffffff8008480fa8 T pinmux_free_setting | |
| ffffff8008480fb0 T pinmux_enable_setting | |
| ffffff8008481220 T pinmux_disable_setting | |
| ffffff80084813c0 T pinmux_show_map | |
| ffffff80084813f8 T pinmux_show_setting | |
| ffffff8008481480 T pinmux_init_device_debugfs | |
| ffffff80084814e8 t pinconf_show_config | |
| ffffff80084815c0 t pinconf_dbg_config_open | |
| ffffff80084815e8 t pinconf_groups_open | |
| ffffff8008481610 t pinconf_pins_open | |
| ffffff8008481638 t pinconf_dbg_config_print | |
| ffffff8008481800 t pinconf_dbg_config_write | |
| ffffff8008481b78 t pinconf_groups_show | |
| ffffff8008481c78 t pinconf_pins_show | |
| ffffff8008481d98 T pinconf_check_ops | |
| ffffff8008481df0 T pinconf_validate_map | |
| ffffff8008481e58 T pin_config_get_for_pin | |
| ffffff8008481e88 T pin_config_group_get | |
| ffffff8008481f30 T pinconf_map_to_setting | |
| ffffff8008482000 T pinconf_free_setting | |
| ffffff8008482008 T pinconf_apply_setting | |
| ffffff8008482138 T pinconf_set_config | |
| ffffff8008482168 T pinconf_show_map | |
| ffffff8008482200 T pinconf_show_setting | |
| ffffff80084822b0 T pinconf_init_device_debugfs | |
| ffffff8008482338 t dt_free_map | |
| ffffff8008482370 t dt_remember_or_free_map | |
| ffffff8008482468 t pinctrl_find_cells_size.isra.0 | |
| ffffff8008482510 T pinctrl_parse_index_with_args | |
| ffffff8008482618 T pinctrl_count_index_with_args | |
| ffffff8008482698 T pinctrl_dt_free_maps | |
| ffffff8008482728 T of_pinctrl_get | |
| ffffff8008482740 T pinctrl_dt_has_hogs | |
| ffffff80084827b8 T pinctrl_dt_to_map | |
| ffffff8008482a90 t pinconf_generic_dump_one | |
| ffffff8008482c50 t parse_dt_cfg | |
| ffffff8008482d30 T pinconf_generic_dt_free_map | |
| ffffff8008482d48 T pinconf_generic_dump_config | |
| ffffff8008482e58 T pinconf_generic_dump_pins | |
| ffffff8008482f18 T pinconf_generic_parse_dt_config | |
| ffffff80084830a8 T pinconf_generic_dt_subnode_to_map | |
| ffffff80084832f8 T pinconf_generic_dt_node_to_map | |
| ffffff8008483410 t mtk_pmx_get_funcs_cnt | |
| ffffff8008483418 t mtk_pmx_get_func_name | |
| ffffff8008483428 t mtk_eint_mask | |
| ffffff8008483470 t mtk_eint_irq_set_wake | |
| ffffff80084834d0 t mtk_eint_resume | |
| ffffff8008483538 t mtk_eint_ack | |
| ffffff8008483580 t mtk_eint_mask_ack | |
| ffffff8008483608 T mt_eint_print_status | |
| ffffff80084836f0 t mtk_pullsel_get | |
| ffffff8008483820 t mtk_pinctrl_irq_release_resources | |
| ffffff80084838b0 t mtk_pmx_get_func_groups | |
| ffffff80084838f0 t mtk_pctrl_get_group_pins | |
| ffffff8008483940 t mtk_pctrl_get_group_name | |
| ffffff8008483970 t mtk_pctrl_get_groups_count | |
| ffffff8008483988 t mtk_pconf_group_get | |
| ffffff80084839c8 t mtk_gpio_direction_input | |
| ffffff80084839e8 t mtk_eint_suspend | |
| ffffff8008483a80 t mtk_pctrl_dt_node_to_map | |
| ffffff8008483e48 t mtk_eint_show | |
| ffffff8008484130 T mtk_pinctrl_set_gpio_value | |
| ffffff80084841d8 t mtk_pconf_set_pull_select | |
| ffffff8008484400 T mtk_pinctrl_update_gpio_value | |
| ffffff80084844a8 t mtk_pmx_set_mode | |
| ffffff80084845b0 t mtk_gpio_to_irq | |
| ffffff8008484630 t mtk_pmx_set_mux | |
| ffffff8008484770 t mtk_pmx_gpio_set_direction | |
| ffffff80084848a0 t mtk_pconf_set_ies_smt | |
| ffffff8008484a40 t mtk_pinctrl_irq_request_resources | |
| ffffff8008484b50 t mtk_pmx_gpio_request_enable | |
| ffffff8008484c48 t mtk_gpio_set | |
| ffffff8008484d10 t mtk_gpio_direction_output | |
| ffffff8008484d40 t mtk_gpio_store_pin | |
| ffffff8008484ff8 t mtk_pconf_group_set | |
| ffffff8008485348 T mtk_pinctrl_get_gpio_value | |
| ffffff8008485420 t mtk_gpio_get | |
| ffffff80084854d8 t mtk_eint_flip_edge | |
| ffffff80084855c0 t mtk_eint_unmask | |
| ffffff8008485630 t mtk_eint_sw_debounce_end | |
| ffffff80084856b8 t mtk_eint_store | |
| ffffff8008485890 t mtk_gpio_set_config | |
| ffffff8008485b08 t mtk_eint_set_type | |
| ffffff8008485ca0 t mtk_eint_irq_handler | |
| ffffff8008486020 t mtk_gpio_get_direction | |
| ffffff8008486188 t mtk_gpio_show_pin | |
| ffffff8008486990 T mtk_pconf_spec_set_ies_smt_range | |
| ffffff8008486a48 T mtk_pctrl_spec_pull_set_samereg | |
| ffffff8008486c00 T mtk_spec_pull_get_samereg | |
| ffffff8008486ce0 T mtk_gpio_debounce_select | |
| ffffff8008486d28 T gpio_dump_regs_range | |
| ffffff8008486db0 T gpio_dump_regs | |
| ffffff8008486dd0 T mtk_pctrl_get_gpio_chip_base | |
| ffffff8008486e08 T mtk_pctrl_init | |
| ffffff8008487588 t mtk_pinctrl_probe | |
| ffffff80084875a8 t mt8168_spec_pull_get | |
| ffffff80084875d0 t mt8168_spec_pinmux_set | |
| ffffff8008487628 t mt8168_ies_smt_set | |
| ffffff8008487698 t mt8168_spec_pull_set | |
| ffffff80084878a8 t devm_gpiod_match | |
| ffffff80084878c0 t devm_gpiod_match_array | |
| ffffff80084878d8 t devm_gpio_match | |
| ffffff80084878f0 t devm_gpiod_release | |
| ffffff8008487908 T devm_gpiod_get_index | |
| ffffff80084879c8 T devm_gpiod_get | |
| ffffff80084879e8 T devm_gpiod_get_index_optional | |
| ffffff8008487a18 T devm_gpiod_get_optional | |
| ffffff8008487a50 T devm_fwnode_get_index_gpiod_from_child | |
| ffffff8008487bb8 T devm_gpiod_get_array | |
| ffffff8008487c60 T devm_gpiod_get_array_optional | |
| ffffff8008487c90 t devm_gpiod_release_array | |
| ffffff8008487ca8 T devm_gpio_request | |
| ffffff8008487d48 t devm_gpio_release | |
| ffffff8008487d60 T devm_gpio_request_one | |
| ffffff8008487e10 T devm_gpiod_put | |
| ffffff8008487e58 T devm_gpiod_put_array | |
| ffffff8008487ea0 T devm_gpio_free | |
| ffffff8008487ee8 T desc_to_gpio | |
| ffffff8008487f08 T gpiod_to_chip | |
| ffffff8008487f28 t lineevent_poll | |
| ffffff8008487f78 T gpiochip_get_data | |
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| ffffff800849f4d0 T of_clk_add_hw_provider | |
| ffffff800849f5a0 T of_clk_get_parent_count | |
| ffffff800849f5d0 T clk_is_match | |
| ffffff800849f618 T clk_has_parent | |
| ffffff800849f6b0 t __clk_lookup_subtree | |
| ffffff800849f720 t clk_core_lookup | |
| ffffff800849f7b8 t clk_core_get_parent_by_index | |
| ffffff800849f830 T clk_hw_get_parent_by_index | |
| ffffff800849f858 T clk_mux_determine_rate_flags | |
| ffffff800849fa68 T __clk_mux_determine_rate | |
| ffffff800849fa80 T __clk_mux_determine_rate_closest | |
| ffffff800849fa98 t clk_fetch_parent_index | |
| ffffff800849fb18 t clk_calc_new_rates | |
| ffffff800849fd50 t __clk_init_parent | |
| ffffff800849fdb0 t clk_enable_unlock | |
| ffffff800849fe20 t clk_prepare_lock | |
| ffffff800849fec8 t clk_core_unprepare | |
| ffffff80084a00e8 t clk_core_prepare | |
| ffffff80084a02d0 t clk_core_disable | |
| ffffff80084a0508 t clk_core_disable_lock | |
| ffffff80084a0540 T clk_disable | |
| ffffff80084a0570 t clk_core_enable | |
| ffffff80084a07a8 t clk_core_enable_lock | |
| ffffff80084a07e8 T clk_enable | |
| ffffff80084a0810 t clk_prepare_unlock | |
| ffffff80084a0888 t clk_core_disable_unprepare | |
| ffffff80084a08b8 t __clk_set_parent_after | |
| ffffff80084a0918 T clk_prepare | |
| ffffff80084a0968 T clk_get_parent | |
| ffffff80084a09b8 T clk_set_phase | |
| ffffff80084a0be8 t clk_core_get_phase | |
| ffffff80084a0c48 T clk_get_phase | |
| ffffff80084a0c70 T clk_round_rate | |
| ffffff80084a0d10 t clk_core_get_accuracy | |
| ffffff80084a0d70 T clk_get_accuracy | |
| ffffff80084a0d98 t clk_core_get_rate | |
| ffffff80084a0e08 T clk_get_rate | |
| ffffff80084a0e30 t clk_summary_show_subtree | |
| ffffff80084a0f18 t clk_summary_show | |
| ffffff80084a0fa8 T clk_notifier_register | |
| ffffff80084a10d0 T clk_notifier_unregister | |
| ffffff80084a11e8 T clk_unprepare | |
| ffffff80084a1228 t clk_core_prepare_enable | |
| ffffff80084a1290 t clk_disable_unused_subtree | |
| ffffff80084a14a0 t clk_unprepare_unused_subtree | |
| ffffff80084a1670 t clk_disable_unused | |
| ffffff80084a1780 t clk_core_update_orphan_status.isra.13 | |
| ffffff80084a17c8 t clk_reparent | |
| ffffff80084a18a0 t __clk_set_parent_before | |
| ffffff80084a1928 t clk_change_rate | |
| ffffff80084a1e18 t clk_core_set_parent | |
| ffffff80084a20f8 T clk_set_parent | |
| ffffff80084a2138 T clk_unregister | |
| ffffff80084a22c8 T clk_hw_unregister | |
| ffffff80084a22e0 t devm_clk_hw_release | |
| ffffff80084a2300 t devm_clk_release | |
| ffffff80084a2318 t clk_core_set_rate_nolock | |
| ffffff80084a23e0 T clk_set_rate | |
| ffffff80084a2438 T clk_set_rate_range | |
| ffffff80084a2508 T clk_set_min_rate | |
| ffffff80084a2530 T clk_set_max_rate | |
| ffffff80084a2558 t clk_dump_subtree | |
| ffffff80084a2668 t clk_dump | |
| ffffff80084a2728 T devm_clk_unregister | |
| ffffff80084a2770 T devm_clk_hw_unregister | |
| ffffff80084a27b8 t __clk_create_clk.part.19 | |
| ffffff80084a2870 T __clk_get_enable_count | |
| ffffff80084a2888 T clk_hw_is_prepared | |
| ffffff80084a28c8 T clk_hw_is_enabled | |
| ffffff80084a2908 T __clk_lookup | |
| ffffff80084a2930 T clk_hw_reparent | |
| ffffff80084a2988 T __clk_create_clk | |
| ffffff80084a29b8 T __clk_free_clk | |
| ffffff80084a2a10 T clk_register | |
| ffffff80084a3030 T clk_hw_register | |
| ffffff80084a3050 T devm_clk_hw_register | |
| ffffff80084a30f8 T devm_clk_register | |
| ffffff80084a3198 T __clk_get | |
| ffffff80084a3208 T __clk_put | |
| ffffff80084a32e8 T __of_clk_get_from_provider | |
| ffffff80084a3450 T of_clk_get_from_provider | |
| ffffff80084a3478 T of_clk_get_parent_name | |
| ffffff80084a35f0 T of_clk_parent_fill | |
| ffffff80084a3670 T of_clk_detect_critical | |
| ffffff80084a3748 T divider_get_val | |
| ffffff80084a3890 t clk_divider_set_rate | |
| ffffff80084a3968 t _register_divider | |
| ffffff80084a3ab8 T clk_register_divider | |
| ffffff80084a3ae8 T clk_hw_register_divider | |
| ffffff80084a3b10 T clk_register_divider_table | |
| ffffff80084a3b40 T clk_hw_register_divider_table | |
| ffffff80084a3b68 T clk_unregister_divider | |
| ffffff80084a3ba0 T clk_hw_unregister_divider | |
| ffffff80084a3bc8 t _get_maxdiv | |
| ffffff80084a3c58 t clk_divider_bestdiv | |
| ffffff80084a41c8 T divider_round_rate_parent | |
| ffffff80084a4200 t _get_div | |
| ffffff80084a4280 T divider_recalc_rate | |
| ffffff80084a4310 t clk_divider_recalc_rate | |
| ffffff80084a4358 t clk_divider_round_rate | |
| ffffff80084a4418 t clk_factor_recalc_rate | |
| ffffff80084a4428 t clk_factor_set_rate | |
| ffffff80084a4430 t clk_factor_round_rate | |
| ffffff80084a44b8 T clk_hw_register_fixed_factor | |
| ffffff80084a45b0 T clk_register_fixed_factor | |
| ffffff80084a45d0 T clk_unregister_fixed_factor | |
| ffffff80084a4608 T clk_hw_unregister_fixed_factor | |
| ffffff80084a4630 t _of_fixed_factor_clk_setup | |
| ffffff80084a47c0 t of_fixed_factor_clk_probe | |
| ffffff80084a47f8 t of_fixed_factor_clk_remove | |
| ffffff80084a4828 t clk_fixed_rate_recalc_rate | |
| ffffff80084a4830 t clk_fixed_rate_recalc_accuracy | |
| ffffff80084a4838 T clk_hw_register_fixed_rate_with_accuracy | |
| ffffff80084a4930 T clk_hw_register_fixed_rate | |
| ffffff80084a4948 T clk_register_fixed_rate_with_accuracy | |
| ffffff80084a4968 T clk_register_fixed_rate | |
| ffffff80084a4990 T clk_unregister_fixed_rate | |
| ffffff80084a49c8 T clk_hw_unregister_fixed_rate | |
| ffffff80084a49f0 t _of_fixed_clk_setup | |
| ffffff80084a4b08 t of_fixed_clk_probe | |
| ffffff80084a4b40 t of_fixed_clk_remove | |
| ffffff80084a4b70 t clk_gate_endisable | |
| ffffff80084a4c28 t clk_gate_enable | |
| ffffff80084a4c48 t clk_gate_disable | |
| ffffff80084a4c60 T clk_gate_is_enabled | |
| ffffff80084a4cb0 T clk_hw_register_gate | |
| ffffff80084a4de0 T clk_register_gate | |
| ffffff80084a4e00 T clk_unregister_gate | |
| ffffff80084a4e38 T clk_hw_unregister_gate | |
| ffffff80084a4e60 t clk_multiplier_recalc_rate | |
| ffffff80084a4ea0 t clk_multiplier_set_rate | |
| ffffff80084a4f50 t clk_multiplier_round_rate | |
| ffffff80084a5108 t clk_mux_set_parent | |
| ffffff80084a51d8 t clk_mux_get_parent | |
| ffffff80084a52b0 t clk_mux_determine_rate | |
| ffffff80084a52c8 T clk_hw_register_mux_table | |
| ffffff80084a5468 T clk_hw_register_mux | |
| ffffff80084a54a0 T clk_register_mux_table | |
| ffffff80084a54d8 T clk_register_mux | |
| ffffff80084a5520 T clk_unregister_mux | |
| ffffff80084a5558 T clk_hw_unregister_mux | |
| ffffff80084a5580 t clk_composite_get_parent | |
| ffffff80084a55b8 t clk_composite_set_parent | |
| ffffff80084a55f0 t clk_composite_recalc_rate | |
| ffffff80084a5628 t clk_composite_round_rate | |
| ffffff80084a5660 t clk_composite_set_rate | |
| ffffff80084a5698 t clk_composite_set_rate_and_parent | |
| ffffff80084a5788 t clk_composite_is_enabled | |
| ffffff80084a57c0 t clk_composite_enable | |
| ffffff80084a57f8 t clk_composite_disable | |
| ffffff80084a5830 t clk_composite_determine_rate | |
| ffffff80084a5a30 T clk_hw_register_composite | |
| ffffff80084a5ce0 T clk_register_composite | |
| ffffff80084a5d18 T clk_unregister_composite | |
| ffffff80084a5d50 t clk_fd_recalc_rate | |
| ffffff80084a5de0 t clk_fd_set_rate | |
| ffffff80084a5ed0 T clk_hw_register_fractional_divider | |
| ffffff80084a6030 T clk_register_fractional_divider | |
| ffffff80084a6070 t clk_fd_round_rate | |
| ffffff80084a6178 T clk_hw_unregister_fractional_divider | |
| ffffff80084a61a0 t clk_gpio_gate_is_enabled | |
| ffffff80084a61b8 t clk_gpio_mux_get_parent | |
| ffffff80084a61d0 t clk_gpio_gate_disable | |
| ffffff80084a61f0 t clk_gpio_gate_enable | |
| ffffff80084a6210 t clk_gpio_mux_set_parent | |
| ffffff80084a6230 t clk_register_gpio | |
| ffffff80084a6430 T clk_hw_register_gpio_gate | |
| ffffff80084a6470 T clk_hw_register_gpio_mux | |
| ffffff80084a64b8 T clk_register_gpio_gate | |
| ffffff80084a6540 T clk_register_gpio_mux | |
| ffffff80084a6560 t gpio_clk_driver_probe | |
| ffffff80084a6738 T of_clk_set_defaults | |
| ffffff80084a6ad8 t xgene_clk_pll_is_enabled | |
| ffffff80084a6af8 t xgene_clk_pll_recalc_rate | |
| ffffff80084a6b78 t xgene_clk_pmd_recalc_rate | |
| ffffff80084a6c18 t xgene_clk_pmd_round_rate | |
| ffffff80084a6c58 t xgene_clk_pmd_set_rate | |
| ffffff80084a6cf8 t xgene_clk_enable | |
| ffffff80084a6d78 t xgene_clk_disable | |
| ffffff80084a6df8 t xgene_clk_is_enabled | |
| ffffff80084a6e28 t xgene_clk_recalc_rate | |
| ffffff80084a6e68 t xgene_clk_set_rate | |
| ffffff80084a6f18 t xgene_clk_round_rate | |
| ffffff80084a6f50 t xgene_register_clk_pmd.constprop.1 | |
| ffffff80084a7078 t xgene_pmdclk_init | |
| ffffff80084a71a0 t xgene_pllclk_init | |
| ffffff80084a7380 t xgene_socpllclk_init | |
| ffffff80084a7398 t xgene_pcppllclk_init | |
| ffffff80084a73b0 T mtk_alloc_clk_data | |
| ffffff80084a7450 T mtk_clk_register_fixed_clks | |
| ffffff80084a7528 T mtk_clk_register_factors | |
| ffffff80084a7600 T mtk_clk_register_gates | |
| ffffff80084a7730 T mtk_clk_register_muxes | |
| ffffff80084a7840 T mtk_clk_register_composite | |
| ffffff80084a7a88 T mtk_clk_register_composites | |
| ffffff80084a7b60 T mtk_clk_register_dividers | |
| ffffff80084a7c78 T mtk_clk_register_fixup_dividers | |
| ffffff80084a7d90 t mtk_pll_is_prepared | |
| ffffff80084a7da8 t mtk_pll_unprepare | |
| ffffff80084a7e88 t mtk_pll_prepare | |
| ffffff80084a7fa8 t __mtk_pll_recalc_rate.isra.0 | |
| ffffff80084a8028 t mtk_pll_recalc_rate | |
| ffffff80084a8098 t mtk_pll_calc_values.isra.1.constprop.2 | |
| ffffff80084a8178 t mtk_pll_set_rate | |
| ffffff80084a8358 t mtk_pll_round_rate | |
| ffffff80084a83c8 T mtk_clk_register_plls | |
| ffffff80084a8600 t mtk_cg_bit_is_cleared | |
| ffffff80084a8670 t mtk_cg_bit_is_set | |
| ffffff80084a86e0 t mtk_cg_disable | |
| ffffff80084a8708 t mtk_cg_enable_inv | |
| ffffff80084a8738 t mtk_cg_enable | |
| ffffff80084a8768 t mtk_cg_disable_inv | |
| ffffff80084a8790 t mtk_cg_set_bit_no_setclr | |
| ffffff80084a87d0 t mtk_cg_disable_no_setclr | |
| ffffff80084a87e8 t mtk_cg_enable_inv_no_setclr | |
| ffffff80084a8800 t mtk_cg_clr_bit_no_setclr | |
| ffffff80084a8838 t mtk_cg_enable_no_setclr | |
| ffffff80084a8850 t mtk_cg_disable_inv_no_setclr | |
| ffffff80084a8868 T mtk_clk_register_gate | |
| ffffff80084a8990 t mtk_ref2usb_tx_is_prepared | |
| ffffff80084a89b0 t mtk_ref2usb_tx_unprepare | |
| ffffff80084a89d0 t mtk_ref2usb_tx_prepare | |
| ffffff80084a8a38 t clk_cpumux_get_parent | |
| ffffff80084a8aa0 t clk_cpumux_set_parent | |
| ffffff80084a8ae0 t mtk_mux_get_parent | |
| ffffff80084a8b78 t mtk_mux_is_enabled | |
| ffffff80084a8c00 t mtk_mux_set_parent | |
| ffffff80084a8d00 t mtk_mux_set_parent_setclr | |
| ffffff80084a8e18 t mtk_mux_disable_setclr | |
| ffffff80084a8e78 t mtk_mux_enable_setclr | |
| ffffff80084a8ed8 t mtk_mux_disable | |
| ffffff80084a8f50 t mtk_mux_enable | |
| ffffff80084a8fd0 T mtk_clk_register_mux | |
| ffffff80084a90f8 t mtk_reset_deassert | |
| ffffff80084a9138 t mtk_reset_assert | |
| ffffff80084a9178 t mtk_reset | |
| ffffff80084a91b0 T mtk_register_reset_controller | |
| ffffff80084a9288 t clk_mt8168_mcu_probe | |
| ffffff80084a9378 t clk_mt8168_peri_probe | |
| ffffff80084a9400 t clk_mt8168_infra_probe | |
| ffffff80084a9488 t clk_mt8168_top_probe | |
| ffffff80084a9630 t clk_mt8168_apmixed_probe | |
| ffffff80084a9708 t clk_mt8168_probe | |
| ffffff80084a9778 t clk_fixup_div_set_rate | |
| ffffff80084a9818 t clk_fixup_div_round_rate | |
| ffffff80084a9880 t clk_fixup_div_recalc_rate | |
| ffffff80084a98d0 T mtk_clk_fixup_divider | |
| ffffff80084a9a08 t bring_up_remove | |
| ffffff80084a9a10 t bring_up_probe | |
| ffffff80084a9b98 t clk_prepare_enable | |
| ffffff80084a9bf0 t clk_disable_unprepare | |
| ffffff80084a9c18 t proc_all_fclk_freq | |
| ffffff80084a9d00 t seq_print_fmeter_all | |
| ffffff80084a9d28 t proc_all_regname | |
| ffffff80084a9d98 t seq_print_regs | |
| ffffff80084a9dc0 t clkdbg_dump_regs2 | |
| ffffff80084a9de8 t clkdbg_suspend_ops_valid | |
| ffffff80084a9df8 t clkdbg_suspend_ops_begin | |
| ffffff80084a9e00 t clkdbg_suspend_ops_prepare | |
| ffffff80084a9e08 t clkdbg_suspend_ops_end | |
| ffffff80084a9e10 t print_fclk_freq | |
| ffffff80084a9e40 t print_reg | |
| ffffff80084a9e90 t dump_pwr_status | |
| ffffff80084a9f58 t clkdbg_show_flags | |
| ffffff80084aa010 t seq_print_fclk_freq | |
| ffffff80084aa040 t seq_print_reg | |
| ffffff80084aa0a0 t clkdbg_remove | |
| ffffff80084aa100 t clkdbg_probe | |
| ffffff80084aa160 t unreg_pdev_drv | |
| ffffff80084aa2a0 t clk_hw_is_on | |
| ffffff80084aa318 t clkdbg_open | |
| ffffff80084aa340 t clkdbg_show | |
| ffffff80084aa470 t clkdbg_unreg_pdrv | |
| ffffff80084aa518 t clkpvdop | |
| ffffff80084aa5e0 t clkdbg_disable_unprepare_provider | |
| ffffff80084aa610 t clkdbg_prepare_enable_provider | |
| ffffff80084aa640 t clkdbg_cmds | |
| ffffff80084aa6d8 t dump_genpd_state | |
| ffffff80084aa830 t dump_save_point | |
| ffffff80084aa978 t clkdbg_dump_suspend_clks_3 | |
| ffffff80084aa9a0 t clkdbg_dump_suspend_clks_2 | |
| ffffff80084aa9c8 t clkdbg_dump_suspend_clks_1 | |
| ffffff80084aa9f0 t clkdbg_suspend_set_ops | |
| ffffff80084aaa18 t parse_val_from_cmd | |
| ffffff80084aaad0 t clkdbg_clr_flag | |
| ffffff80084aab60 t clkdbg_set_flag | |
| ffffff80084aabf0 t reg_from_str | |
| ffffff80084aad40 t parse_reg_val_from_cmd | |
| ffffff80084aae48 t clkdbg_reg_clr | |
| ffffff80084aaf10 t clkdbg_reg_set | |
| ffffff80084aafd8 t clkdbg_reg_write | |
| ffffff80084ab090 t clkdbg_reg_dump | |
| ffffff80084ab278 t clkdbg_reg_read | |
| ffffff80084ab310 t parse_paras_from_cmd | |
| ffffff80084ab4a8 t clkdbg_reg_update | |
| ffffff80084ab620 t clkdbg_set_rate | |
| ffffff80084ab760 t clkdbg_set_parent | |
| ffffff80084ab930 t print_reg2 | |
| ffffff80084ab988 t clkdbg_write | |
| ffffff80084aba70 t clkop_void_ckname.isra.0 | |
| ffffff80084abaf0 t clkop_int_ckname.isra.1 | |
| ffffff80084abb80 t get_all_genpd.part.2 | |
| ffffff80084abd10 t reg_pdev_drv | |
| ffffff80084abf08 t clkdbg_reg_pdrv | |
| ffffff80084abfb0 t save_all_genpd_state | |
| ffffff80084ac090 t clkdbg_dump_genpd | |
| ffffff80084ac0d8 t genpd_op | |
| ffffff80084ac2b8 t clkdbg_pwr_off | |
| ffffff80084ac2d8 t clkdbg_pwr_on | |
| ffffff80084ac2f8 t pdev_from_name | |
| ffffff80084ac3b8 t clkdbg_pm_runtime_put_sync | |
| ffffff80084ac4b0 t clkdbg_pm_runtime_get_sync | |
| ffffff80084ac5a8 t clkdbg_pm_runtime_disable | |
| ffffff80084ac698 t clkdbg_pm_runtime_enable | |
| ffffff80084ac788 t read_spm_pwr_status | |
| ffffff80084ac878 t clkdbg_pwr_status | |
| ffffff80084ac8a0 t ccf_state | |
| ffffff80084ac900 t clkdbg_dump_state_all | |
| ffffff80084aca70 t dump_provider_clk | |
| ffffff80084acbc8 t clkdbg_dump_suspend_clks | |
| ffffff80084acc68 t get_all_provider_clks.part.7 | |
| ffffff80084ace40 T prepare_enable_provider | |
| ffffff80084acf20 T disable_unprepare_provider | |
| ffffff80084acfc8 t store_save_point | |
| ffffff80084ad368 t clkdbg_syscore_suspend | |
| ffffff80084ad3a0 t clkdbg_suspend_ops_enter | |
| ffffff80084ad3d8 t clkdbg_dump_muxes | |
| ffffff80084ad4d8 t clkdbg_dump_provider_clks | |
| ffffff80084ad540 t clkdbg_pm_event_handler | |
| ffffff80084ad590 t clkdbg_clkop_void_ckname.isra.9 | |
| ffffff80084ad6d0 t clkdbg_disable_unprepare | |
| ffffff80084ad6f8 t clkdbg_disable | |
| ffffff80084ad720 t clkdbg_unprepare | |
| ffffff80084ad748 t clkdbg_clkop_int_ckname.isra.10 | |
| ffffff80084ad8a0 t clkdbg_prepare_enable | |
| ffffff80084ad8c8 t clkdbg_enable | |
| ffffff80084ad8f0 t clkdbg_prepare | |
| ffffff80084ad918 t clkdbg_suspend_ops_finish | |
| ffffff80084ad920 t clkdbg_syscore_resume | |
| ffffff80084ad928 T set_clkdbg_ops | |
| ffffff80084ad938 T print_fmeter_all | |
| ffffff80084ad958 T print_regs | |
| ffffff80084ad978 T get_all_provider_clks | |
| ffffff80084ad9c0 T get_last_cmd | |
| ffffff80084ad9d0 T reg_pdrv | |
| ffffff80084ad9e8 T unreg_pdrv | |
| ffffff80084ada00 T set_custom_cmds | |
| ffffff80084ada10 t get_all_regnames | |
| ffffff80084ada20 t get_all_fmeter_clks | |
| ffffff80084ada30 t get_all_clk_names | |
| ffffff80084ada40 t get_pwr_names | |
| ffffff80084ada50 t setup_provider_clk | |
| ffffff80084ada58 T get_spm_pwr_status | |
| ffffff80084adb28 t fmeter_freq_op | |
| ffffff80084adef0 t clkchk_syscore_resume | |
| ffffff80084adef8 T print_enabled_clks | |
| ffffff80084ae040 t check_pll_off | |
| ffffff80084ae198 t clkchk_syscore_suspend | |
| ffffff80084ae1b0 T print_enabled_clks_once | |
| ffffff80084ae1e0 t clk_mt8168_apu_probe | |
| ffffff80084ae268 t clk_mt8168_cam_probe | |
| ffffff80084ae2f0 t clk_mt8168_mfg_probe | |
| ffffff80084ae378 t clk_mt8168_mm_probe | |
| ffffff80084ae400 t clk_mt8168_vdec_probe | |
| ffffff80084ae488 t clk_mt8168_venc_probe | |
| ffffff80084ae510 T dma_get_slave_caps | |
| ffffff80084ae5b8 T dma_async_tx_descriptor_init | |
| ffffff80084ae5c0 T dma_run_dependencies | |
| ffffff80084ae5c8 T dma_find_channel | |
| ffffff80084ae620 T dma_issue_pending_all | |
| ffffff80084ae6c8 t dma_chan_get | |
| ffffff80084ae7c0 T dma_get_slave_channel | |
| ffffff80084ae870 t find_candidate | |
| ffffff80084aea10 T dma_get_any_slave_channel | |
| ffffff80084aeab0 T __dma_request_channel | |
| ffffff80084aeb60 T dma_request_chan_by_mask | |
| ffffff80084aeba0 t chan_dev_release | |
| ffffff80084aec20 t in_use_show | |
| ffffff80084aecb0 t bytes_transferred_show | |
| ffffff80084aed80 t memcpy_count_show | |
| ffffff80084aee50 T dma_sync_wait | |
| ffffff80084aef20 T dma_wait_for_async_tx | |
| ffffff80084aefb0 t dma_chan_put | |
| ffffff80084af050 T dma_release_channel | |
| ffffff80084af0f0 T dma_request_chan | |
| ffffff80084af2d0 T dma_request_slave_channel | |
| ffffff80084af2f0 t dma_channel_rebalance | |
| ffffff80084af5b0 T dmaengine_get | |
| ffffff80084af6b0 T dma_async_device_register | |
| ffffff80084afc80 T dma_async_device_unregister | |
| ffffff80084afd98 t __get_unmap_pool | |
| ffffff80084afdd8 T dmaengine_unmap_put | |
| ffffff80084affb0 T dmaengine_get_unmap_data | |
| ffffff80084b0008 T dmaengine_put | |
| ffffff80084b00c0 T vchan_tx_submit | |
| ffffff80084b0148 T vchan_tx_desc_free | |
| ffffff80084b01b8 T vchan_find_desc | |
| ffffff80084b0208 T vchan_dma_desc_free_list | |
| ffffff80084b02e0 T vchan_init | |
| ffffff80084b0370 t vchan_complete | |
| ffffff80084b0548 T of_dma_controller_free | |
| ffffff80084b0600 t of_dma_router_xlate | |
| ffffff80084b0718 T of_dma_request_slave_channel | |
| ffffff80084b0928 T of_dma_simple_xlate | |
| ffffff80084b0978 T of_dma_xlate_by_chan_id | |
| ffffff80084b0a00 T of_dma_controller_register | |
| ffffff80084b0ac0 T of_dma_router_register | |
| ffffff80084b0b90 t mtk_uart_apdma_tx_status | |
| ffffff80084b0bd8 t mtk_uart_apdma_device_pause | |
| ffffff80084b0c30 t mtk_uart_apdma_device_resume | |
| ffffff80084b0c38 t mtk_uart_apdma_resume | |
| ffffff80084b0cb8 t mtk_uart_apdma_runtime_resume | |
| ffffff80084b0d10 t mtk_uart_apdma_suspend | |
| ffffff80084b0d68 t mtk_uart_apdma_runtime_suspend | |
| ffffff80084b0da0 t mtk_uart_apdma_free | |
| ffffff80084b0e10 t mtk_uart_apdma_remove | |
| ffffff80084b0e60 t mtk_uart_apdma_desc_free | |
| ffffff80084b0e80 t mtk_uart_apdma_slave_config | |
| ffffff80084b0eb0 t mtk_uart_apdma_free_chan_resources | |
| ffffff80084b1050 t mtk_uart_apdma_alloc_chan_resources | |
| ffffff80084b1278 t mtk_uart_apdma_probe | |
| ffffff80084b1650 t mtk_uart_apdma_read.isra.1 | |
| ffffff80084b1660 t mtk_uart_apdma_irq_handler | |
| ffffff80084b17f8 t mtk_uart_apdma_issue_pending | |
| ffffff80084b1ad8 t mtk_uart_apdma_terminate_all | |
| ffffff80084b1cb0 t mtk_uart_apdma_prep_slave_sg | |
| ffffff80084b1d90 T cmdq_subsys_id_to_base | |
| ffffff80084b1de8 T cmdq_mbox_pool_set_limit | |
| ffffff80084b1df8 T cmdq_pkt_set_client | |
| ffffff80084b1e10 T cmdq_pkt_get_va_by_offset | |
| ffffff80084b1e58 T cmdq_pkt_get_pa_by_offset | |
| ffffff80084b1ea0 T cmdq_pkt_dump_buf | |
| ffffff80084b25e0 T cmdq_register_device | |
| ffffff80084b2700 t cmdq_pkt_flush_cb_work | |
| ffffff80084b2730 T cmdq_pkt_create | |
| ffffff80084b2780 T cmdq_pkt_cl_create | |
| ffffff80084b27f0 T cmdq_mbox_stop | |
| ffffff80084b2808 T cmdq_mbox_pool_create | |
| ffffff80084b2870 T cmdq_mbox_pool_clear | |
| ffffff80084b28c0 T cmdq_mbox_destroy | |
| ffffff80084b28f0 T cmdq_mbox_create | |
| ffffff80084b29f0 t cmdq_pkt_flush_queue_cb | |
| ffffff80084b2a20 t cmdq_pkt_flush_cb | |
| ffffff80084b2a48 T cmdq_dump_pkt | |
| ffffff80084b2ad0 T cmdq_mbox_buf_alloc | |
| ffffff80084b2bb8 T cmdq_mbox_buf_free | |
| ffffff80084b2c60 T cmdq_dev_get_event | |
| ffffff80084b2d70 T cmdq_pkt_alloc_buf | |
| ffffff80084b2f88 T cmdq_pkt_add_cmd_buffer | |
| ffffff80084b3050 T cmdq_pkt_realloc_cmd_buffer | |
| ffffff80084b3098 T cmdq_pkt_copy_cmd_buf | |
| ffffff80084b31b0 T cmdq_pkt_free_buf | |
| ffffff80084b32a8 T cmdq_pkt_destroy | |
| ffffff80084b32d0 T cmdq_pkt_append_command | |
| ffffff80084b33a0 T cmdq_pkt_read_reg | |
| ffffff80084b33d8 T cmdq_pkt_write_reg | |
| ffffff80084b3478 T cmdq_pkt_write_value | |
| ffffff80084b3518 T cmdq_pkt_store_value | |
| ffffff80084b35b8 T cmdq_pkt_store_value_reg | |
| ffffff80084b36a0 T cmdq_pkt_assign_command | |
| ffffff80084b36e8 T cmdq_pkt_read_addr | |
| ffffff80084b3778 T cmdq_pkt_read | |
| ffffff80084b3840 T cmdq_pkt_write_reg_addr | |
| ffffff80084b38c0 T cmdq_pkt_write_indriect | |
| ffffff80084b3960 T cmdq_pkt_mem_move | |
| ffffff80084b39b8 T cmdq_pkt_write_value_addr | |
| ffffff80084b3a38 T cmdq_pkt_write | |
| ffffff80084b3ad8 T cmdq_pkt_logic_command | |
| ffffff80084b3b38 T cmdq_pkt_jump | |
| ffffff80084b3b78 T cmdq_pkt_jump_addr | |
| ffffff80084b3bb8 T cmdq_pkt_cond_jump | |
| ffffff80084b3c10 T cmdq_pkt_cond_jump_abs | |
| ffffff80084b3c68 T cmdq_pkt_poll_addr | |
| ffffff80084b3da0 T cmdq_pkt_poll_reg | |
| ffffff80084b3e40 T cmdq_pkt_poll | |
| ffffff80084b3ee8 T cmdq_pkt_wfe | |
| ffffff80084b3f38 T cmdq_pkt_wait_no_clear | |
| ffffff80084b3f88 T cmdq_pkt_clear_event | |
| ffffff80084b3fd8 T cmdq_pkt_sleep | |
| ffffff80084b40f0 T cmdq_pkt_poll_timeout | |
| ffffff80084b43f8 T cmdq_pkt_set_event | |
| ffffff80084b4448 T cmdq_pkt_finalize | |
| ffffff80084b4568 T cmdq_pkt_flush_async | |
| ffffff80084b45f0 T cmdq_pkt_flush_threaded | |
| ffffff80084b46b8 T cmdq_pkt_flush | |
| ffffff80084b47c0 T cmdq_pkt_finalize_loop | |
| ffffff80084b48e0 T mtk_infracfg_set_bus_protection | |
| ffffff80084b49f0 T mtk_infracfg_clear_bus_protection | |
| ffffff80084b4b00 t set_bus_protection | |
| ffffff80084b4c20 t clear_bus_protection | |
| ffffff80084b4d38 T mtk_scpsys_ext_set_bus_protection | |
| ffffff80084b4ee8 T mtk_scpsys_ext_clear_bus_protection | |
| ffffff80084b5090 t scpsys_clk_enable | |
| ffffff80084b5168 t scpsys_clk_disable | |
| ffffff80084b51c0 t scpsys_domain_is_on.isra.0 | |
| ffffff80084b5228 t scpsys_probe | |
| ffffff80084b5a00 t scpsys_sram_enable.isra.2 | |
| ffffff80084b5b28 t scpsys_bus_protect_disable.isra.4 | |
| ffffff80084b5b88 t scpsys_power_on | |
| ffffff80084b5dd0 t scpsys_power_off | |
| ffffff80084b6090 t scpsys_bring_up_remove | |
| ffffff80084b6098 t scpsys_bring_up_probe | |
| ffffff80084b60e0 t of_node_match | |
| ffffff80084b60f0 T regulator_count_voltages | |
| ffffff80084b6138 T regulator_get_hardware_vsel_register | |
| ffffff80084b6180 T regulator_list_hardware_vsel | |
| ffffff80084b61c0 T regulator_get_linear_step | |
| ffffff80084b61d0 T regulator_mode_to_status | |
| ffffff80084b61f8 t regulator_attr_is_visible | |
| ffffff80084b6448 T regulator_has_full_constraints | |
| ffffff80084b6458 T rdev_get_drvdata | |
| ffffff80084b6460 T regulator_get_drvdata | |
| ffffff80084b6470 T regulator_set_drvdata | |
| ffffff80084b6480 T rdev_get_id | |
| ffffff80084b6490 T rdev_get_dev | |
| ffffff80084b6498 T regulator_get_init_drvdata | |
| ffffff80084b64a0 t perf_trace_regulator_basic | |
| ffffff80084b65d0 t perf_trace_regulator_range | |
| ffffff80084b6718 t perf_trace_regulator_value | |
| ffffff80084b6858 t trace_event_raw_event_regulator_basic | |
| ffffff80084b6958 t trace_event_raw_event_regulator_range | |
| ffffff80084b6a80 t trace_event_raw_event_regulator_value | |
| ffffff80084b6ba0 t trace_raw_output_regulator_basic | |
| ffffff80084b6c08 t trace_raw_output_regulator_range | |
| ffffff80084b6c70 t trace_raw_output_regulator_value | |
| ffffff80084b6cd8 t _regulator_get_voltage | |
| ffffff80084b6e40 t suspend_set_state | |
| ffffff80084b7058 t suspend_prepare | |
| ffffff80084b70c8 t regulator_check_consumers | |
| ffffff80084b7188 t regulator_find_supply_alias | |
| ffffff80084b7218 t regulator_match | |
| ffffff80084b7278 t _regulator_get_mode | |
| ffffff80084b72e8 T regulator_get_mode | |
| ffffff80084b7300 t _regulator_get_current_limit | |
| ffffff80084b7358 T regulator_get_current_limit | |
| ffffff80084b7370 T regulator_get_voltage | |
| ffffff80084b73e8 T regulator_get_error_flags | |
| ffffff80084b7450 t _regulator_suspend_prepare | |
| ffffff80084b74a0 t regulator_dev_release | |
| ffffff80084b74d0 T regulator_unregister_supply_alias | |
| ffffff80084b7510 T regulator_bulk_unregister_supply_alias | |
| ffffff80084b7568 t unset_regulator_supplies | |
| ffffff80084b7608 t regulator_suspend_disk_uV_show | |
| ffffff80084b7638 t regulator_suspend_mem_uV_show | |
| ffffff80084b7668 t regulator_suspend_standby_uV_show | |
| ffffff80084b7698 t regulator_bypass_show | |
| ffffff80084b7740 t regulator_status_show | |
| ffffff80084b7860 t regulator_uA_show | |
| ffffff80084b78a0 t regulator_uV_show | |
| ffffff80084b7900 t num_users_show | |
| ffffff80084b7930 t name_show | |
| ffffff80084b7998 t regulator_total_uA_show | |
| ffffff80084b7a28 t rdev_init_debugfs | |
| ffffff80084b7b80 t constraint_flags_read_file | |
| ffffff80084b7c78 t _regulator_enable_delay | |
| ffffff80084b7cf8 T regulator_notifier_call_chain | |
| ffffff80084b7d18 t regulator_map_voltage | |
| ffffff80084b7d80 T regulator_register_notifier | |
| ffffff80084b7da0 T regulator_unregister_notifier | |
| ffffff80084b7dc0 T regulator_suspend_prepare | |
| ffffff80084b7e00 T regulator_suspend_finish | |
| ffffff80084b7e30 t regulator_summary_open | |
| ffffff80084b7e58 t supply_map_open | |
| ffffff80084b7e80 t regulator_summary_show | |
| ffffff80084b7ee0 t regulator_summary_show_subtree | |
| ffffff80084b8190 t regulator_summary_show_roots | |
| ffffff80084b81c8 t regulator_summary_show_children | |
| ffffff80084b8218 t supply_map_show | |
| ffffff80084b82d0 t _regulator_is_enabled.part.1 | |
| ffffff80084b8300 t _regulator_set_voltage_time.isra.2 | |
| ffffff80084b8358 T regulator_set_voltage_time_sel | |
| ffffff80084b8400 t _regulator_do_set_voltage | |
| ffffff80084b8950 t regulator_print_opmode | |
| ffffff80084b8a00 t regulator_suspend_disk_mode_show | |
| ffffff80084b8a28 t regulator_suspend_mem_mode_show | |
| ffffff80084b8a50 t regulator_suspend_standby_mode_show | |
| ffffff80084b8a78 t regulator_opmode_show | |
| ffffff80084b8aa8 t regulator_print_state | |
| ffffff80084b8b10 t regulator_suspend_disk_state_show | |
| ffffff80084b8b38 t regulator_suspend_mem_state_show | |
| ffffff80084b8b60 t regulator_suspend_standby_state_show | |
| ffffff80084b8b88 t regulator_state_show | |
| ffffff80084b8bf8 t type_show | |
| ffffff80084b8c70 t regulator_ops_is_valid.part.7 | |
| ffffff80084b8ca8 t regulator_mode_constrain | |
| ffffff80084b8de0 T regulator_set_mode | |
| ffffff80084b8ea8 T regulator_allow_bypass | |
| ffffff80084b8ff8 t create_regulator | |
| ffffff80084b9230 t regulator_check_voltage | |
| ffffff80084b9360 T regulator_sync_voltage | |
| ffffff80084b9450 T regulator_set_current_limit | |
| ffffff80084b95c0 t print_constraints | |
| ffffff80084b9a00 T regulator_is_enabled | |
| ffffff80084b9a78 t _regulator_list_voltage.isra.10 | |
| ffffff80084b9b78 T regulator_list_voltage | |
| ffffff80084b9b98 T regulator_set_voltage_time | |
| ffffff80084b9cb8 t regulator_set_voltage_unlocked | |
| ffffff80084b9f30 T regulator_set_voltage | |
| ffffff80084b9fa8 T regulator_is_supported_voltage | |
| ffffff80084ba0d8 T regulator_register_supply_alias | |
| ffffff80084ba1b0 T regulator_bulk_register_supply_alias | |
| ffffff80084ba2b8 t regulator_dev_lookup | |
| ffffff80084ba480 t regulator_min_uV_show | |
| ffffff80084ba4d8 t _regulator_put.part.18 | |
| ffffff80084ba580 T regulator_put | |
| ffffff80084ba5d0 T regulator_bulk_free | |
| ffffff80084ba620 t drms_uA_update | |
| ffffff80084ba940 T regulator_set_load | |
| ffffff80084ba998 t _regulator_do_enable | |
| ffffff80084badb0 t regulator_ena_gpio_free.isra.22 | |
| ffffff80084bae88 t regulator_max_uV_show | |
| ffffff80084baee0 t regulator_min_uA_show | |
| ffffff80084baf38 t regulator_max_uA_show | |
| ffffff80084baf90 t _regulator_do_disable | |
| ffffff80084bb1f0 t _regulator_suspend_finish | |
| ffffff80084bb2f8 t _regulator_disable | |
| ffffff80084bb498 T regulator_disable | |
| ffffff80084bb510 T regulator_enable | |
| ffffff80084bb698 t regulator_resolve_supply | |
| ffffff80084bb890 t regulator_register_resolve_supply | |
| ffffff80084bb8b0 T regulator_register | |
| ffffff80084bc810 t regulator_bulk_enable_async | |
| ffffff80084bc838 T regulator_force_disable | |
| ffffff80084bc950 T regulator_bulk_force_disable | |
| ffffff80084bc9c8 T regulator_disable_deferred | |
| ffffff80084bca68 T regulator_bulk_disable | |
| ffffff80084bcb38 T regulator_bulk_enable | |
| ffffff80084bcca0 T regulator_unregister | |
| ffffff80084bcd88 t regulator_disable_work | |
| ffffff80084bcee0 T _regulator_get | |
| ffffff80084bd178 T regulator_get | |
| ffffff80084bd190 T regulator_bulk_get | |
| ffffff80084bd290 T regulator_get_exclusive | |
| ffffff80084bd2a8 T regulator_get_optional | |
| ffffff80084bd2c0 T regulator_get_regmap | |
| ffffff80084bd2d8 t dummy_regulator_probe | |
| ffffff80084bd380 t regulator_fixed_release | |
| ffffff80084bd3b0 T regulator_register_always_on | |
| ffffff80084bd4a0 T regulator_map_voltage_iterate | |
| ffffff80084bd548 T regulator_map_voltage_ascend | |
| ffffff80084bd5c8 T regulator_list_voltage_linear | |
| ffffff80084bd608 T regulator_is_enabled_regmap | |
| ffffff80084bd6b8 T regulator_get_bypass_regmap | |
| ffffff80084bd758 T regulator_enable_regmap | |
| ffffff80084bd7f0 T regulator_disable_regmap | |
| ffffff80084bd860 T regulator_set_bypass_regmap | |
| ffffff80084bd8d0 T regulator_set_soft_start_regmap | |
| ffffff80084bd938 T regulator_set_pull_down_regmap | |
| ffffff80084bd9a0 T regulator_set_active_discharge_regmap | |
| ffffff80084bda00 T regulator_get_voltage_sel_regmap | |
| ffffff80084bda88 T regulator_set_voltage_sel_regmap | |
| ffffff80084bdb10 T regulator_map_voltage_linear | |
| ffffff80084bdbc0 T regulator_map_voltage_linear_range | |
| ffffff80084bdca8 T regulator_list_voltage_linear_range | |
| ffffff80084bdd18 T regulator_list_voltage_table | |
| ffffff80084bdd4c t regulator_list_voltage_linear_range.part.0 | |
| ffffff80084bdd4c t regulator_list_voltage_table.part.1 | |
| ffffff80084bdd50 t devm_regulator_match_notifier | |
| ffffff80084bdd80 t devm_regulator_release | |
| ffffff80084bdd98 t _devm_regulator_get | |
| ffffff80084bde40 T devm_regulator_get | |
| ffffff80084bde58 T devm_regulator_get_exclusive | |
| ffffff80084bde70 T devm_regulator_get_optional | |
| ffffff80084bde88 T devm_regulator_bulk_get | |
| ffffff80084bdf40 t devm_regulator_bulk_release | |
| ffffff80084bdf60 T devm_regulator_register | |
| ffffff80084be008 t devm_rdev_release | |
| ffffff80084be020 T devm_regulator_register_supply_alias | |
| ffffff80084be0d8 t devm_regulator_destroy_supply_alias | |
| ffffff80084be0f8 t devm_regulator_match_supply_alias | |
| ffffff80084be138 T devm_regulator_register_notifier | |
| ffffff80084be1d8 t devm_regulator_destroy_notifier | |
| ffffff80084be1f8 T devm_regulator_put | |
| ffffff80084be238 t devm_regulator_match | |
| ffffff80084be278 T devm_regulator_unregister | |
| ffffff80084be2b8 t devm_rdev_match | |
| ffffff80084be2f8 T devm_regulator_unregister_supply_alias | |
| ffffff80084be370 T devm_regulator_bulk_unregister_supply_alias | |
| ffffff80084be3c8 T devm_regulator_bulk_register_supply_alias | |
| ffffff80084be4d0 T devm_regulator_unregister_notifier | |
| ffffff80084be548 t devm_of_regulator_put_matches | |
| ffffff80084be550 T of_get_regulator_init_data | |
| ffffff80084bebe8 T of_regulator_match | |
| ffffff80084beda0 T regulator_of_get_init_data | |
| ffffff80084bef00 t reg_fixed_voltage_probe | |
| ffffff80084bf278 t of_reset_simple_xlate | |
| ffffff80084bf290 T reset_controller_register | |
| ffffff80084bf310 T reset_controller_unregister | |
| ffffff80084bf368 t devm_reset_controller_release | |
| ffffff80084bf380 T devm_reset_controller_register | |
| ffffff80084bf418 T reset_control_status | |
| ffffff80084bf488 T __of_reset_control_get | |
| ffffff80084bf720 T __reset_control_get | |
| ffffff80084bf758 T __devm_reset_control_get | |
| ffffff80084bf838 t __reset_control_put_internal | |
| ffffff80084bf8b0 T of_reset_control_array_get | |
| ffffff80084bfa28 T devm_reset_control_array_get | |
| ffffff80084bfad0 T reset_control_put | |
| ffffff80084bfb88 t devm_reset_control_release | |
| ffffff80084bfba0 T reset_control_reset | |
| ffffff80084bfcd0 T __device_reset | |
| ffffff80084bfd40 T reset_control_assert | |
| ffffff80084bfea0 T reset_control_deassert | |
| ffffff80084bffd0 T tty_name | |
| ffffff80084bffe8 t hung_up_tty_read | |
| ffffff80084bfff0 t hung_up_tty_write | |
| ffffff80084bfff8 t hung_up_tty_poll | |
| ffffff80084c0000 t hung_up_tty_compat_ioctl | |
| ffffff80084c0018 t hung_up_tty_fasync | |
| ffffff80084c0020 t tty_show_fdinfo | |
| ffffff80084c0060 T tty_hung_up_p | |
| ffffff80084c0088 t dev_match_devt | |
| ffffff80084c00a0 T tty_put_char | |
| ffffff80084c00e0 T tty_set_operations | |
| ffffff80084c00e8 T tty_devnum | |
| ffffff80084c0100 t tty_devnode | |
| ffffff80084c0128 t check_tty_count | |
| ffffff80084c0228 t this_tty | |
| ffffff80084c0260 t tty_device_create_release | |
| ffffff80084c0278 t tty_write_lock | |
| ffffff80084c02c8 t tty_write_unlock | |
| ffffff80084c0300 T tty_dev_name_to_number | |
| ffffff80084c0468 T tty_wakeup | |
| ffffff80084c04e8 T tty_hangup | |
| ffffff80084c0510 T do_SAK | |
| ffffff80084c0540 T tty_kref_put | |
| ffffff80084c05b0 T tty_init_termios | |
| ffffff80084c0690 T tty_standard_install | |
| ffffff80084c06f0 t free_tty_struct | |
| ffffff80084c0738 t release_tty | |
| ffffff80084c0890 t tty_flush_works | |
| ffffff80084c08d8 T tty_kclose | |
| ffffff80084c0938 T tty_release_struct | |
| ffffff80084c0990 T tty_do_resize | |
| ffffff80084c0a38 T tty_unregister_driver | |
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| ffffff8008517708 T drm_atomic_get_plane_state | |
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| ffffff8008517ca0 T drm_atomic_get_connector_state | |
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| ffffff8008518c68 T drm_atomic_state_alloc | |
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| ffffff800851f5e8 T drm_mode_obj_set_property_ioctl | |
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| ffffff8008525b50 T drm_wait_vblank_ioctl | |
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| ffffff80085269c8 T drm_syncobj_export_sync_file | |
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| ffffff8008526d88 T drm_syncobj_handle_to_fd_ioctl | |
| ffffff8008526f18 T drm_syncobj_fd_to_handle_ioctl | |
| ffffff80085270d0 T drm_syncobj_wait_ioctl | |
| ffffff80085276b8 T drm_syncobj_reset_ioctl | |
| ffffff8008527788 T drm_syncobj_signal_ioctl | |
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| ffffff8008529510 t compat_drm_addmap | |
| ffffff8008529688 t compat_drm_getstats | |
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| ffffff8008529728 T drm_panel_attach | |
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| ffffff8008575810 t cm_mgr_perf_timer_fn | |
| ffffff8008575838 T check_cm_mgr_status | |
| ffffff80085758e0 T cm_mgr_enable_fn | |
| ffffff800857593c t e843419@0434_000070ce_1a9c | |
| ffffff8008576938 T cm_mgr_register_cm_mgr_power | |
| ffffff8008576948 T cm_mgr_register_cm_mgr_count | |
| ffffff8008576958 T cm_mgr_register_cm_mgr_opp | |
| ffffff8008576968 T cm_mgr_register_cm_mgr_loading | |
| ffffff8008576978 T cm_mgr_register_cm_mgr_ratio | |
| ffffff8008576988 T cm_mgr_register_cm_mgr_bw | |
| ffffff8008576998 T cm_mgr_register_cm_mgr_valid | |
| ffffff80085769a8 t perf_trace_CM_MGR__stall_raio_0 | |
| ffffff8008576a70 t trace_event_raw_event_CM_MGR__stall_raio_0 | |
| ffffff8008576b20 t trace_raw_output_CM_MGR__stall_raio_0 | |
| ffffff8008576b80 t cm_mgr_check_dram_type | |
| ffffff8008576c30 t cm_mgr_ratio_timer_fn | |
| ffffff8008576d30 t cm_mgr_sched_pm_notifier | |
| ffffff8008576eb0 t mtk_cpufreq_cm_notifier | |
| ffffff8008576f50 T cm_mgr_update_met | |
| ffffff8008577180 T debug_stall | |
| ffffff8008577370 T debug_stall_all | |
| ffffff80085773a0 T cm_mgr_get_idx | |
| ffffff8008577438 T cm_mgr_get_stall_ratio | |
| ffffff8008577450 T cm_mgr_get_max_stall_ratio | |
| ffffff8008577468 T cm_mgr_get_cpu_count | |
| ffffff8008577480 T cm_mgr_check_stall_ratio | |
| ffffff8008577720 T cm_mgr_ratio_timer_en | |
| ffffff8008577778 T is_8168_dram_type_pcddr | |
| ffffff80085777f0 T cm_mgr_perf_platform_set_status | |
| ffffff8008577890 T cm_mgr_perf_platform_set_force_status | |
| ffffff8008577950 T cm_mgr_register_init | |
| ffffff8008577a40 T cm_mgr_platform_init | |
| ffffff8008577af8 T cm_mgr_set_dram_level | |
| ffffff8008577b68 t cm_mgr_fb_notifier_callback | |
| ffffff8008577c20 T cm_mgr_get_dram_opp | |
| ffffff8008577c80 T cm_mgr_emi_latency | |
| ffffff8008577c88 T dcm_infracfg_ao_dcm_infrabus_group_is_on | |
| ffffff8008577cb8 T dcm_infracfg_ao_dcm_infrabus_group | |
| ffffff8008577d28 T dcm_infracfg_ao_dcm_mem_group_is_on | |
| ffffff8008577d78 T dcm_infracfg_ao_dcm_mem_group | |
| ffffff8008577dd8 T dcm_infracfg_ao_dcm_peribus_group_is_on | |
| ffffff8008577e18 T dcm_infracfg_ao_dcm_peribus_group | |
| ffffff8008577ea0 T dcm_infracfg_ao_dcm_ssusb_group_is_on | |
| ffffff8008577eb8 T dcm_infracfg_ao_dcm_ssusb_group | |
| ffffff8008577f00 T dcm_mp0_cpucfg_mp0_rgu_dcm_is_on | |
| ffffff8008577f18 T dcm_mp0_cpucfg_mp0_rgu_dcm | |
| ffffff8008577f60 T dcm_mcu_misccfg_adb400_dcm_is_on | |
| ffffff8008577f88 T dcm_mcu_misccfg_adb400_dcm | |
| ffffff8008577fd8 T dcm_mcu_misccfg_bus_arm_pll_divider_dcm_is_on | |
| ffffff8008577ff0 T dcm_mcu_misccfg_bus_arm_pll_divider_dcm | |
| ffffff8008578038 T dcm_mcu_misccfg_bus_clock_dcm_is_on | |
| ffffff8008578050 T dcm_mcu_misccfg_bus_clock_dcm | |
| ffffff8008578098 T dcm_mcu_misccfg_bus_fabric_dcm_is_on | |
| ffffff80085780c0 T dcm_mcu_misccfg_bus_fabric_dcm | |
| ffffff8008578118 T dcm_mcu_misccfg_gic_sync_dcm_is_on | |
| ffffff8008578130 T dcm_mcu_misccfg_gic_sync_dcm | |
| ffffff8008578178 T dcm_mcu_misccfg_l2_shared_dcm_is_on | |
| ffffff8008578190 T dcm_mcu_misccfg_l2_shared_dcm | |
| ffffff80085781d8 T dcm_mcu_misccfg_mcu_misc_dcm_is_on | |
| ffffff80085781f0 T dcm_mcu_misccfg_mcu_misc_dcm | |
| ffffff8008578238 T dcm_dramc_ch0_top0_ddrphy_is_on | |
| ffffff8008578288 T dcm_dramc_ch0_top0_ddrphy | |
| ffffff8008578350 T dcm_dramc_ch0_top1_dcm_dramc_group_is_on | |
| ffffff8008578388 T dcm_dramc_ch0_top1_dcm_dramc_group | |
| ffffff8008578408 T dcm_chn0_emi_dcm_emi_group_is_on | |
| ffffff8008578428 T dcm_chn0_emi_dcm_emi_group | |
| ffffff8008578470 T dcm_dramc_ch1_top1_dcm_dramc_group_is_on | |
| ffffff80085784a8 T dcm_dramc_ch1_top1_dcm_dramc_group | |
| ffffff8008578528 T dcm_dramc_ch1_top0_ddrphy_is_on | |
| ffffff8008578578 T dcm_dramc_ch1_top0_ddrphy | |
| ffffff8008578640 T dcm_chn1_emi_dcm_emi_group_is_on | |
| ffffff8008578660 T dcm_chn1_emi_dcm_emi_group | |
| ffffff80085786a8 T dcm_infra_preset | |
| ffffff80085786b0 T dcm_mcusys | |
| ffffff80085786f8 T dcm_infra | |
| ffffff8008578738 T dcm_dramc_ao | |
| ffffff8008578768 T dcm_ddrphy | |
| ffffff8008578798 T dcm_emi | |
| ffffff80085787c8 T dcm_armcore | |
| ffffff80085787e0 T dcm_gic_sync | |
| ffffff80085787f8 T dcm_rgu | |
| ffffff8008578810 T dcm_mcusys_preset | |
| ffffff8008578818 T is_dcm_bringup | |
| ffffff8008578820 T mt_dcm_dts_map | |
| ffffff8008578a78 T dcm_set_stall_wr_del_sel | |
| ffffff8008578a80 T sync_dcm_convert_freq2div | |
| ffffff8008578ab8 T sync_dcm_set_cci_div | |
| ffffff8008578b80 T sync_dcm_set_cci_freq | |
| ffffff8008578c00 T sync_dcm_set_mp0_div | |
| ffffff8008578c08 T sync_dcm_set_mp0_freq | |
| ffffff8008578c10 T sync_dcm_set_mp1_div | |
| ffffff8008578c18 T sync_dcm_set_mp1_freq | |
| ffffff8008578c20 T sync_dcm_set_mp2_div | |
| ffffff8008578c28 T sync_dcm_set_mp2_freq | |
| ffffff8008578c30 T sync_dcm_set_cpu_freq | |
| ffffff8008578c48 T sync_dcm_set_cpu_div | |
| ffffff8008578c60 T dcm_dump_regs | |
| ffffff8008578e60 T dcm_get_cpu_cluster_stat | |
| ffffff8008578e70 W dcm_get_chip_sw_ver | |
| ffffff8008578e78 W dcm_pre_init | |
| ffffff8008578ed0 W dcm_infracfg_ao_emi_indiv | |
| ffffff8008578f38 W dcm_set_fmem_fsel_dbc | |
| ffffff8008578f68 W dcm_smc_get_cnt | |
| ffffff8008578f98 t dcm_state_show | |
| ffffff80085791d8 W dcm_smc_msg_send | |
| ffffff8008579208 W dcm_set_hotplug_nb | |
| ffffff8008579468 T dcm_set_default | |
| ffffff8008579530 T mt_dcm_init | |
| ffffff8008579610 T dcm_set_state | |
| ffffff8008579768 T dcm_disable | |
| ffffff80085798a8 T dcm_restore | |
| ffffff8008579a00 T dcm_dump_state | |
| ffffff8008579a78 t dcm_state_store | |
| ffffff8008579d00 T mt_dcm_disable | |
| ffffff8008579d30 T mt_dcm_restore | |
| ffffff8008579d60 t pmic_ftm_release | |
| ffffff8008579d68 t pmic_read_device | |
| ffffff8008579e58 T upmu_get_reg_value | |
| ffffff8008579eb0 t pmic_write_device | |
| ffffff800857a000 t pmic_ftm_ioctl | |
| ffffff800857a5b0 t pmic_mt_shutdown | |
| ffffff800857a5f0 t pmic_ftm_compat_ioctl | |
| ffffff800857a660 t pmic_mt_remove | |
| ffffff800857a6a8 t pmic_ftm_open | |
| ffffff800857a6b0 T pmic_read_interface | |
| ffffff800857a6c8 T pmic_config_interface | |
| ffffff800857a768 T pmic_read_interface_nolock | |
| ffffff800857a780 T pmic_config_interface_nolock | |
| ffffff800857a798 T pmic_set_register_value | |
| ffffff800857a850 T pmic_get_register_value | |
| ffffff800857a900 T pmic_set_register_value_nolock | |
| ffffff800857a9b8 T pmic_get_register_value_nolock | |
| ffffff800857aa68 T bc11_set_register_value | |
| ffffff800857aa80 T bc11_get_register_value | |
| ffffff800857aa98 T pmic_set_hk_reg_value | |
| ffffff800857abd8 T upmu_set_reg_value | |
| ffffff800857abf8 T pmic_ftm_init | |
| ffffff800857ad08 T is_battery_remove_pmic | |
| ffffff800857ad18 T PMIC_CUSTOM_SETTING_V1 | |
| ffffff800857ad28 t pmic_mt_suspend | |
| ffffff800857ad78 t pmic_mt_resume | |
| ffffff800857adc0 W record_md_vosel | |
| ffffff800857adc8 t pmic_mt_probe | |
| ffffff800857af78 t proc_utilization_open | |
| ffffff800857afa0 t proc_utilization_show | |
| ffffff800857b1f8 t show_buck_ldo_info | |
| ffffff800857b458 t show_buck_api | |
| ffffff800857b4b0 T pmic_regulator_suspend | |
| ffffff800857b580 T pmic_regulator_resume | |
| ffffff800857b640 t pmic_regulator_pm_event | |
| ffffff800857b6c0 T mtk_regulator_init | |
| ffffff800857bd88 T pmic_regulator_en_test | |
| ffffff800857bed0 t store_buck_api | |
| ffffff800857c038 T pmic_regulator_vol_test | |
| ffffff800857c1a0 T dump_ldo_status_read_debug | |
| ffffff800857c380 T pmic_regulator_debug_init | |
| ffffff800857c5c8 t pmic_dump_exception_open | |
| ffffff800857c5f0 t pmic_dbg_level_open | |
| ffffff800857c618 t proc_dump_register_open | |
| ffffff800857c640 t pmic_dump_exception_show | |
| ffffff800857c658 t store_pmic_access | |
| ffffff800857c7d0 t show_pmic_access | |
| ffffff800857c828 t pmic_dbg_level_show | |
| ffffff800857c900 t pmic_dbg_level_write | |
| ffffff800857c9e8 t proc_dump_register_show | |
| ffffff800857ca20 T pmic_pre_wdt_reset | |
| ffffff800857ca28 T pmic_pre_condition1 | |
| ffffff800857ca30 T pmic_pre_condition2 | |
| ffffff800857ca38 T pmic_pre_condition3 | |
| ffffff800857ca40 T pmic_post_condition1 | |
| ffffff800857ca48 T pmic_post_condition2 | |
| ffffff800857ca50 T pmic_post_condition3 | |
| ffffff800857ca60 T pmic_debug_init | |
| ffffff800857cba0 T PMIC_INIT_SETTING_V1 | |
| ffffff800857cc20 t hv_list_cmp | |
| ffffff800857cc30 t lv_list_cmp | |
| ffffff800857cc40 t lbat_dbg_write | |
| ffffff800857cc48 t lbat_max_en_setting | |
| ffffff800857cc90 t lbat_min_en_setting | |
| ffffff800857ccd8 t lbat_irq_enable | |
| ffffff800857cd18 T lbat_user_set_debounce | |
| ffffff800857cd30 t lbat_timer_func | |
| ffffff800857ce30 t lbat_dbg_release | |
| ffffff800857ce58 t lbat_dump_thd_list | |
| ffffff800857d108 t modify_lbat_list.part.0 | |
| ffffff800857d190 t modify_lbat_list | |
| ffffff800857d248 T lbat_user_register | |
| ffffff800857d3f8 t lbat_set_next_thd | |
| ffffff800857d490 t lbat_deb_handler | |
| ffffff800857d558 t bat_h_int_handler | |
| ffffff800857d690 t bat_l_int_handler | |
| ffffff800857d7d8 t lbat_dbg_open | |
| ffffff800857d818 T lbat_suspend | |
| ffffff800857d838 T lbat_resume | |
| ffffff800857d850 T lbat_service_init | |
| ffffff800857d900 T lbat_read_raw | |
| ffffff800857d920 T lbat_read_volt | |
| ffffff800857d948 T lbat_dump_reg | |
| ffffff800857da20 t lbat_dbg_show | |
| ffffff800857dca0 T lbat_debug_init | |
| ffffff800857dda8 t lbat_thd_init | |
| ffffff800857de18 T vmd1_pmic_setting_on | |
| ffffff800857ded0 T vmd1_pmic_setting_off | |
| ffffff800857df10 T wk_pmic_enable_sdn_delay | |
| ffffff800857df48 T vcore_pmic_set_mode | |
| ffffff800857df80 T vproc_pmic_set_mode | |
| ffffff800857dfb8 T is_pmic_mrv | |
| ffffff800857e010 T pmic_enable_smart_reset | |
| ffffff800857e068 T pmic_tracking_init | |
| ffffff800857e0b0 T upmu_get_rgs_chrdet | |
| ffffff800857e110 T is_ext_vbat_boost_exist | |
| ffffff800857e118 T is_ext_swchr_exist | |
| ffffff800857e120 T is_ext_buck_gpio_exist | |
| ffffff800857e140 T pmic_dbg_level_set | |
| ffffff800857e1c8 T pmic_dump_register | |
| ffffff800857e390 T kernel_dump_exception_reg | |
| ffffff800857e4d8 T both_dump_exception_reg | |
| ffffff800857e788 T pmic_dump_exception_reg | |
| ffffff800857e8d0 T pwrkey_int_handler | |
| ffffff800857e920 T pwrkey_int_handler_r | |
| ffffff800857e978 T homekey_int_handler | |
| ffffff800857e9d0 T homekey_int_handler_r | |
| ffffff800857ea28 t pmic_irq_release | |
| ffffff800857ea50 t pmic_check_intNo.part.0 | |
| ffffff800857eb40 t pmic_irq_dbg_show | |
| ffffff800857ee40 T pmic_thread_kthread | |
| ffffff800857f170 t init_extcon_work | |
| ffffff800857f238 t usb_extcon_detect_cable | |
| ffffff800857f288 t pmic_irq_dbg_open | |
| ffffff800857f2c8 T wake_up_pmic | |
| ffffff800857f350 T mt_pmic_eint_irq | |
| ffffff800857f3a0 T pmic_enable_interrupt | |
| ffffff800857f580 t oc_int_handler | |
| ffffff800857f620 t md_oc_int_handler | |
| ffffff800857f678 T pmic_mask_interrupt | |
| ffffff800857f7e8 T pmic_unmask_interrupt | |
| ffffff800857f958 t pmic_irq_dbg_write | |
| ffffff800857fab0 T pmic_register_interrupt_callback | |
| ffffff800857fbf0 T pmic_register_oc_interrupt_callback | |
| ffffff800857fd30 T register_all_oc_interrupts | |
| ffffff800857fe28 T PMIC_EINT_SETTING | |
| ffffff8008580208 T pmic_irq_debug_init | |
| ffffff8008580334 t pmic_clear_interrupt_status | |
| ffffff80085803f0 W rtc_reset_bbpu_alarm_status | |
| ffffff80085803f8 T PMIC_MD_INIT_SETTING_V1 | |
| ffffff8008580400 T PMIC_check_wdt_status | |
| ffffff8008580470 T PMIC_check_pwrhold_status | |
| ffffff80085804d0 T PMIC_check_battery | |
| ffffff8008580510 T PMIC_POWER_HOLD | |
| ffffff80085805f0 T PMIC_CHIP_VER | |
| ffffff8008580610 T PMIC_LP_CHIP_VER | |
| ffffff8008580628 T PMIC_LP_INIT_SETTING | |
| ffffff8008580b98 T mt6357_upmu_get_top0_ana_id | |
| ffffff8008580bf0 T mt6357_upmu_get_top0_dig_id | |
| ffffff8008580c48 T mt6357_upmu_get_top0_ana_minor_rev | |
| ffffff8008580ca8 T mt6357_upmu_get_top0_ana_major_rev | |
| ffffff8008580d08 T mt6357_upmu_get_top0_dig_minor_rev | |
| ffffff8008580d68 T mt6357_upmu_get_top0_dig_major_rev | |
| ffffff8008580dc8 T mt6357_upmu_get_top0_dsn_cbs | |
| ffffff8008580e28 T mt6357_upmu_get_top0_dsn_bix | |
| ffffff8008580e88 T mt6357_upmu_get_top0_dsn_esp | |
| ffffff8008580ee8 T mt6357_upmu_get_top0_dsn_fpi | |
| ffffff8008580f48 T mt6357_upmu_get_hwcid | |
| ffffff8008580fa8 T mt6357_upmu_get_swcid | |
| ffffff8008581008 T mt6357_upmu_get_sts_pwrkey | |
| ffffff8008581068 T mt6357_upmu_get_sts_rtca | |
| ffffff80085810c8 T mt6357_upmu_get_sts_chrin | |
| ffffff8008581128 T mt6357_upmu_get_sts_spar | |
| ffffff8008581188 T mt6357_upmu_get_sts_rboot | |
| ffffff80085811e8 T mt6357_upmu_get_sts_uvlo | |
| ffffff8008581248 T mt6357_upmu_get_sts_pgfail | |
| ffffff80085812a8 T mt6357_upmu_get_sts_psoc | |
| ffffff8008581308 T mt6357_upmu_get_sts_thrdn | |
| ffffff8008581368 T mt6357_upmu_get_sts_wrst | |
| ffffff80085813c8 T mt6357_upmu_get_sts_crst | |
| ffffff8008581428 T mt6357_upmu_get_sts_pkeylp | |
| ffffff8008581488 T mt6357_upmu_get_sts_normoff | |
| ffffff80085814e8 T mt6357_upmu_get_sts_bwdt | |
| ffffff8008581548 T mt6357_upmu_get_sts_ddlo | |
| ffffff80085815a8 T mt6357_upmu_get_sts_wdt | |
| ffffff8008581608 T mt6357_upmu_get_sts_pupsrc | |
| ffffff8008581668 T mt6357_upmu_get_sts_keypwr | |
| ffffff80085816c8 T mt6357_upmu_set_rg_poffsts_clr | |
| ffffff80085816f0 T mt6357_upmu_set_rg_ponsts_clr | |
| ffffff8008581718 T mt6357_upmu_get_ext_pmic_pg_deb | |
| ffffff8008581778 T mt6357_upmu_get_vaud28_pg_deb | |
| ffffff80085817d8 T mt6357_upmu_get_vusb33_pg_deb | |
| ffffff8008581838 T mt6357_upmu_get_vdram_pg_deb | |
| ffffff8008581898 T mt6357_upmu_get_vio28_pg_deb | |
| ffffff80085818f8 T mt6357_upmu_get_vemc_pg_deb | |
| ffffff8008581958 T mt6357_upmu_get_vio18_pg_deb | |
| ffffff80085819b8 T mt6357_upmu_get_vsram_proc_pg_deb | |
| ffffff8008581a18 T mt6357_upmu_get_vsram_others_pg_deb | |
| ffffff8008581a78 T mt6357_upmu_get_vaux18_pg_deb | |
| ffffff8008581ad8 T mt6357_upmu_get_vxo22_pg_deb | |
| ffffff8008581b38 T mt6357_upmu_get_vproc_pg_deb | |
| ffffff8008581b98 T mt6357_upmu_get_vmodem_pg_deb | |
| ffffff8008581bf8 T mt6357_upmu_get_vcore_pg_deb | |
| ffffff8008581c58 T mt6357_upmu_get_vs1_pg_deb | |
| ffffff8008581cb8 T mt6357_upmu_get_strup_ext_pmic_pg_status | |
| ffffff8008581d18 T mt6357_upmu_get_strup_vaud28_pg_status | |
| ffffff8008581d78 T mt6357_upmu_get_strup_vusb33_pg_status | |
| ffffff8008581dd8 T mt6357_upmu_get_strup_vdram_pg_status | |
| ffffff8008581e38 T mt6357_upmu_get_strup_vio28_pg_status | |
| ffffff8008581e98 T mt6357_upmu_get_strup_vemc_pg_status | |
| ffffff8008581ef8 T mt6357_upmu_get_strup_vio18_pg_status | |
| ffffff8008581f58 T mt6357_upmu_get_strup_vsram_proc_pg_status | |
| ffffff8008581fb8 T mt6357_upmu_get_strup_vsram_others_pg_status | |
| ffffff8008582018 T mt6357_upmu_get_strup_vaux18_pg_status | |
| ffffff8008582078 T mt6357_upmu_get_strup_vxo22_pg_status | |
| ffffff80085820d8 T mt6357_upmu_get_strup_vproc_pg_status | |
| ffffff8008582138 T mt6357_upmu_get_strup_vmodem_pg_status | |
| ffffff8008582198 T mt6357_upmu_get_strup_vcore_pg_status | |
| ffffff80085821f8 T mt6357_upmu_get_strup_vs1_pg_status | |
| ffffff8008582258 T mt6357_upmu_get_strup_vproc_oc_status | |
| ffffff80085822b8 T mt6357_upmu_get_strup_vmodem_oc_status | |
| ffffff8008582318 T mt6357_upmu_get_strup_vcore_oc_status | |
| ffffff8008582378 T mt6357_upmu_get_strup_vs1_oc_status | |
| ffffff80085823d8 T mt6357_upmu_get_pmu_thermal_deb | |
| ffffff8008582438 T mt6357_upmu_get_strup_thermal_status | |
| ffffff8008582498 T mt6357_upmu_set_rg_srclken_in0_en | |
| ffffff80085824c0 T mt6357_upmu_get_rg_srclken_in0_en | |
| ffffff8008582520 T mt6357_upmu_set_rg_srclken_in0_hw_mode | |
| ffffff8008582548 T mt6357_upmu_set_rg_srclken_in1_en | |
| ffffff8008582570 T mt6357_upmu_get_rg_srclken_in1_en | |
| ffffff80085825d0 T mt6357_upmu_set_rg_srclken_in1_hw_mode | |
| ffffff80085825f8 T mt6357_upmu_set_rg_srclken_in_sync_en | |
| ffffff8008582620 T mt6357_upmu_get_rg_srclken_in_sync_en | |
| ffffff8008582680 T mt6357_upmu_set_rg_osc_en_auto_off | |
| ffffff80085826a8 T mt6357_upmu_get_rg_osc_en_auto_off | |
| ffffff8008582708 T mt6357_upmu_get_test_out | |
| ffffff8008582768 T mt6357_upmu_set_rg_mon_flag_sel | |
| ffffff8008582790 T mt6357_upmu_set_rg_mon_grp_sel | |
| ffffff80085827b8 T mt6357_upmu_set_rg_nandtree_mode | |
| ffffff80085827e0 T mt6357_upmu_set_rg_test_auxadc | |
| ffffff8008582808 T mt6357_upmu_set_rg_efuse_mode | |
| ffffff8008582830 T mt6357_upmu_set_rg_test_strup | |
| ffffff8008582858 T mt6357_upmu_set_testmode_sw | |
| ffffff8008582880 T mt6357_upmu_get_pmu_test_mode_scan | |
| ffffff80085828e0 T mt6357_upmu_get_pwrkey_deb | |
| ffffff8008582940 T mt6357_upmu_get_chrdet_deb | |
| ffffff80085829a0 T mt6357_upmu_get_homekey_deb | |
| ffffff8008582a00 T mt6357_upmu_set_rg_pmu_tdsel | |
| ffffff8008582a28 T mt6357_upmu_set_rg_spi_tdsel | |
| ffffff8008582a50 T mt6357_upmu_set_rg_aud_tdsel | |
| ffffff8008582a78 T mt6357_upmu_set_rg_e32cal_tdsel | |
| ffffff8008582aa0 T mt6357_upmu_set_rg_pmu_rdsel | |
| ffffff8008582ac8 T mt6357_upmu_set_rg_spi_rdsel | |
| ffffff8008582af0 T mt6357_upmu_set_rg_aud_rdsel | |
| ffffff8008582b18 T mt6357_upmu_set_rg_e32cal_rdsel | |
| ffffff8008582b40 T mt6357_upmu_set_rg_smt_wdtrstb_in | |
| ffffff8008582b68 T mt6357_upmu_set_rg_smt_srclken_in0 | |
| ffffff8008582b90 T mt6357_upmu_set_rg_smt_srclken_in1 | |
| ffffff8008582bb8 T mt6357_upmu_set_rg_smt_rtc_32k1v8_0 | |
| ffffff8008582be0 T mt6357_upmu_set_rg_smt_rtc_32k1v8_1 | |
| ffffff8008582c08 T mt6357_upmu_set_rg_smt_spi_clk | |
| ffffff8008582c30 T mt6357_upmu_set_rg_smt_spi_csn | |
| ffffff8008582c58 T mt6357_upmu_set_rg_smt_spi_mosi | |
| ffffff8008582c80 T mt6357_upmu_set_rg_smt_spi_miso | |
| ffffff8008582ca8 T mt6357_upmu_set_rg_smt_aud_clk_mosi | |
| ffffff8008582cd0 T mt6357_upmu_set_rg_smt_aud_dat_mosi0 | |
| ffffff8008582cf8 T mt6357_upmu_set_rg_smt_aud_dat_mosi1 | |
| ffffff8008582d20 T mt6357_upmu_set_rg_smt_aud_sync_mosi | |
| ffffff8008582d48 T mt6357_upmu_set_rg_smt_aud_clk_miso | |
| ffffff8008582d70 T mt6357_upmu_set_rg_smt_aud_dat_miso0 | |
| ffffff8008582d98 T mt6357_upmu_set_rg_smt_aud_dat_miso1 | |
| ffffff8008582dc0 T mt6357_upmu_set_rg_smt_aud_sync_miso | |
| ffffff8008582de8 T mt6357_upmu_get_rg_top_rsv0 | |
| ffffff8008582e48 T mt6357_upmu_get_rg_top_rsv1 | |
| ffffff8008582ea8 T mt6357_upmu_set_rg_octl_srclken_in0 | |
| ffffff8008582ed0 T mt6357_upmu_set_rg_octl_srclken_in1 | |
| ffffff8008582ef8 T mt6357_upmu_set_rg_octl_rtc_32k1v8_0 | |
| ffffff8008582f20 T mt6357_upmu_set_rg_octl_rtc_32k1v8_1 | |
| ffffff8008582f48 T mt6357_upmu_set_rg_octl_spi_clk | |
| ffffff8008582f70 T mt6357_upmu_set_rg_octl_spi_csn | |
| ffffff8008582f98 T mt6357_upmu_set_rg_octl_spi_mosi | |
| ffffff8008582fc0 T mt6357_upmu_set_rg_octl_spi_miso | |
| ffffff8008582fe8 T mt6357_upmu_set_rg_octl_aud_clk_mosi | |
| ffffff8008583010 T mt6357_upmu_set_rg_octl_aud_dat_mosi0 | |
| ffffff8008583038 T mt6357_upmu_set_rg_octl_aud_dat_mosi1 | |
| ffffff8008583060 T mt6357_upmu_set_rg_octl_aud_sync_mosi | |
| ffffff8008583088 T mt6357_upmu_set_rg_octl_aud_clk_miso | |
| ffffff80085830b0 T mt6357_upmu_set_rg_octl_aud_dat_miso0 | |
| ffffff80085830d8 T mt6357_upmu_set_rg_octl_aud_dat_miso1 | |
| ffffff8008583100 T mt6357_upmu_set_rg_octl_aud_sync_miso | |
| ffffff8008583128 T mt6357_upmu_set_rg_srclken_in0_filter_en | |
| ffffff8008583150 T mt6357_upmu_get_rg_srclken_in0_filter_en | |
| ffffff80085831b0 T mt6357_upmu_set_rg_srclken_in1_filter_en | |
| ffffff80085831d8 T mt6357_upmu_get_rg_srclken_in1_filter_en | |
| ffffff8008583238 T mt6357_upmu_set_rg_rtc32k_1v8_0_filter_en | |
| ffffff8008583260 T mt6357_upmu_get_rg_rtc32k_1v8_0_filter_en | |
| ffffff80085832c0 T mt6357_upmu_set_rg_rtc32k_1v8_1_filter_en | |
| ffffff80085832e8 T mt6357_upmu_get_rg_rtc32k_1v8_1_filter_en | |
| ffffff8008583348 T mt6357_upmu_set_rg_spi_clk_filter_en | |
| ffffff8008583370 T mt6357_upmu_get_rg_spi_clk_filter_en | |
| ffffff80085833d0 T mt6357_upmu_set_rg_spi_csn_filter_en | |
| ffffff80085833f8 T mt6357_upmu_get_rg_spi_csn_filter_en | |
| ffffff8008583458 T mt6357_upmu_set_rg_spi_mosi_filter_en | |
| ffffff8008583480 T mt6357_upmu_get_rg_spi_mosi_filter_en | |
| ffffff80085834e0 T mt6357_upmu_set_rg_spi_miso_filter_en | |
| ffffff8008583508 T mt6357_upmu_get_rg_spi_miso_filter_en | |
| ffffff8008583568 T mt6357_upmu_set_rg_aud_clk_mosi_filter_en | |
| ffffff8008583590 T mt6357_upmu_get_rg_aud_clk_mosi_filter_en | |
| ffffff80085835f0 T mt6357_upmu_set_rg_aud_dat_mosi0_filter_en | |
| ffffff8008583618 T mt6357_upmu_get_rg_aud_dat_mosi0_filter_en | |
| ffffff8008583678 T mt6357_upmu_set_rg_aud_dat_mosi1_filter_en | |
| ffffff80085836a0 T mt6357_upmu_get_rg_aud_dat_mosi1_filter_en | |
| ffffff8008583700 T mt6357_upmu_set_rg_aud_sync_mosi_filter_en | |
| ffffff8008583728 T mt6357_upmu_get_rg_aud_sync_mosi_filter_en | |
| ffffff8008583788 T mt6357_upmu_set_rg_aud_clk_miso_filter_en | |
| ffffff80085837b0 T mt6357_upmu_get_rg_aud_clk_miso_filter_en | |
| ffffff8008583810 T mt6357_upmu_set_rg_aud_dat_miso0_filter_en | |
| ffffff8008583838 T mt6357_upmu_get_rg_aud_dat_miso0_filter_en | |
| ffffff8008583898 T mt6357_upmu_set_rg_aud_dat_miso1_filter_en | |
| ffffff80085838c0 T mt6357_upmu_get_rg_aud_dat_miso1_filter_en | |
| ffffff8008583920 T mt6357_upmu_set_rg_aud_sync_miso_filter_en | |
| ffffff8008583948 T mt6357_upmu_get_rg_aud_sync_miso_filter_en | |
| ffffff80085839a8 T mt6357_upmu_set_rg_wdtrstb_in_filter_en | |
| ffffff80085839d0 T mt6357_upmu_get_rg_wdtrstb_in_filter_en | |
| ffffff8008583a30 T mt6357_upmu_set_rg_srclken_in0_rcsel | |
| ffffff8008583a58 T mt6357_upmu_set_rg_srclken_in1_rcsel | |
| ffffff8008583a80 T mt6357_upmu_set_rg_rtc32k_1v8_0_rcsel | |
| ffffff8008583aa8 T mt6357_upmu_set_rg_rtc32k_1v8_1_rcsel | |
| ffffff8008583ad0 T mt6357_upmu_set_rg_spi_clk_rcsel | |
| ffffff8008583af8 T mt6357_upmu_set_rg_spi_csn_rcsel | |
| ffffff8008583b20 T mt6357_upmu_set_rg_spi_mosi_rcsel | |
| ffffff8008583b48 T mt6357_upmu_set_rg_spi_miso_rcsel | |
| ffffff8008583b70 T mt6357_upmu_set_rg_aud_clk_mosi_rcsel | |
| ffffff8008583b98 T mt6357_upmu_set_rg_aud_dat_mosi0_rcsel | |
| ffffff8008583bc0 T mt6357_upmu_set_rg_aud_dat_mosi1_rcsel | |
| ffffff8008583be8 T mt6357_upmu_set_rg_aud_sync_mosi_rcsel | |
| ffffff8008583c10 T mt6357_upmu_set_rg_aud_clk_miso_rcsel | |
| ffffff8008583c38 T mt6357_upmu_set_rg_aud_dat_miso0_rcsel | |
| ffffff8008583c60 T mt6357_upmu_set_rg_aud_dat_miso1_rcsel | |
| ffffff8008583c88 T mt6357_upmu_set_rg_aud_sync_miso_rcsel | |
| ffffff8008583cb0 T mt6357_upmu_set_rg_wdtrstb_in_rcsel | |
| ffffff8008583cd8 T mt6357_upmu_set_top_status | |
| ffffff8008583d00 T mt6357_upmu_get_vm_mode | |
| ffffff8008583d60 T mt6357_upmu_get_top1_ana_id | |
| ffffff8008583dc0 T mt6357_upmu_get_top1_dig_id | |
| ffffff8008583e20 T mt6357_upmu_get_top1_ana_minor_rev | |
| ffffff8008583e80 T mt6357_upmu_get_top1_ana_major_rev | |
| ffffff8008583ee0 T mt6357_upmu_get_top1_dig_minor_rev | |
| ffffff8008583f40 T mt6357_upmu_get_top1_dig_major_rev | |
| ffffff8008583fa0 T mt6357_upmu_get_top1_dsn_cbs | |
| ffffff8008584000 T mt6357_upmu_get_top1_dsn_bix | |
| ffffff8008584060 T mt6357_upmu_get_top1_dsn_esp | |
| ffffff80085840c0 T mt6357_upmu_get_top1_dsn_fpi | |
| ffffff8008584120 T mt6357_upmu_set_gpio_dir0 | |
| ffffff8008584148 T mt6357_upmu_set_gpio_pullen0 | |
| ffffff8008584170 T mt6357_upmu_set_gpio_pullsel0 | |
| ffffff8008584198 T mt6357_upmu_set_gpio_dinv0 | |
| ffffff80085841c0 T mt6357_upmu_set_gpio_dout0 | |
| ffffff80085841e8 T mt6357_upmu_get_gpio_pi0 | |
| ffffff8008584248 T mt6357_upmu_get_gpio_poe0 | |
| ffffff80085842a8 T mt6357_upmu_set_gpio0_mode | |
| ffffff80085842d0 T mt6357_upmu_set_gpio1_mode | |
| ffffff80085842f8 T mt6357_upmu_set_gpio2_mode | |
| ffffff8008584320 T mt6357_upmu_set_gpio3_mode | |
| ffffff8008584348 T mt6357_upmu_set_gpio4_mode | |
| ffffff8008584370 T mt6357_upmu_set_gpio5_mode | |
| ffffff8008584398 T mt6357_upmu_set_gpio6_mode | |
| ffffff80085843c0 T mt6357_upmu_set_gpio7_mode | |
| ffffff80085843e8 T mt6357_upmu_set_gpio8_mode | |
| ffffff8008584410 T mt6357_upmu_set_gpio9_mode | |
| ffffff8008584438 T mt6357_upmu_set_gpio10_mode | |
| ffffff8008584460 T mt6357_upmu_set_gpio11_mode | |
| ffffff8008584488 T mt6357_upmu_set_gpio12_mode | |
| ffffff80085844b0 T mt6357_upmu_set_gpio13_mode | |
| ffffff80085844d8 T mt6357_upmu_set_gpio14_mode | |
| ffffff8008584500 T mt6357_upmu_set_gpio15_mode | |
| ffffff8008584528 T mt6357_upmu_set_gpio_rsv | |
| ffffff8008584550 T mt6357_upmu_get_top2_ana_id | |
| ffffff80085845b0 T mt6357_upmu_get_top2_dig_id | |
| ffffff8008584610 T mt6357_upmu_get_top2_ana_minor_rev | |
| ffffff8008584670 T mt6357_upmu_get_top2_ana_major_rev | |
| ffffff80085846d0 T mt6357_upmu_get_top2_dig_minor_rev | |
| ffffff8008584730 T mt6357_upmu_get_top2_dig_major_rev | |
| ffffff8008584790 T mt6357_upmu_get_top2_dsn_cbs | |
| ffffff80085847f0 T mt6357_upmu_get_top2_dsn_bix | |
| ffffff8008584850 T mt6357_upmu_get_top2_dsn_esp | |
| ffffff80085848b0 T mt6357_upmu_get_top2_dsn_fpi | |
| ffffff8008584910 T mt6357_upmu_set_rg_g_smps_ck_pdn | |
| ffffff8008584938 T mt6357_upmu_set_rg_g_smps_test_ck_pdn | |
| ffffff8008584960 T mt6357_upmu_set_rg_intrp_ck_pdn | |
| ffffff8008584988 T mt6357_upmu_set_rg_intrp_pre_oc_ck_pdn | |
| ffffff80085849b0 T mt6357_upmu_set_rg_efuse_ck_pdn | |
| ffffff80085849d8 T mt6357_upmu_set_rg_eint_32k_ck_pdn | |
| ffffff8008584a00 T mt6357_upmu_set_rg_pmu1m_ck_pdn | |
| ffffff8008584a28 T mt6357_upmu_set_rg_spi_ck_pdn | |
| ffffff8008584a50 T mt6357_upmu_set_rg_reg_ck_pdn | |
| ffffff8008584a78 T mt6357_upmu_set_rg_pmu32k_ck_pdn | |
| ffffff8008584aa0 T mt6357_upmu_set_rg_fqmtr_32k_ck_pdn | |
| ffffff8008584ac8 T mt6357_upmu_set_rg_fqmtr_ck_pdn | |
| ffffff8008584af0 T mt6357_upmu_set_rg_pmu26m_ck_pdn | |
| ffffff8008584b18 T mt6357_upmu_set_rg_pmu128k_ck_pdn | |
| ffffff8008584b40 T mt6357_upmu_set_rg_rtc26m_ck_pdn | |
| ffffff8008584b68 T mt6357_upmu_set_rg_rtc32k_ck_pdn | |
| ffffff8008584b90 T mt6357_upmu_set_rg_rtc32k_1v8_0_pdn | |
| ffffff8008584bb8 T mt6357_upmu_set_rg_rtc32k_1v8_1_pdn | |
| ffffff8008584be0 T mt6357_upmu_set_rg_trim_128k_ck_pdn | |
| ffffff8008584c08 T mt6357_upmu_set_rg_bgr_test_ck_pdn | |
| ffffff8008584c30 T mt6357_upmu_set_rg_pchr_test_ck_pdn | |
| ffffff8008584c58 T mt6357_upmu_set_rg_fqmtr_ck_cksel | |
| ffffff8008584c80 T mt6357_upmu_set_rg_rtc_32k1v8_sel | |
| ffffff8008584ca8 T mt6357_upmu_set_rg_bgr_test_ck_cksel | |
| ffffff8008584cd0 T mt6357_upmu_set_rg_pchr_test_ck_cksel | |
| ffffff8008584cf8 T mt6357_upmu_set_rg_26m_ck_sel_hwen | |
| ffffff8008584d20 T mt6357_upmu_set_rg_26m_ck_sel | |
| ffffff8008584d48 T mt6357_upmu_set_rg_pmu_1m_ck_sel_hwen | |
| ffffff8008584d70 T mt6357_upmu_set_rg_pmu_1m_ck_sel | |
| ffffff8008584d98 T mt6357_upmu_set_rg_pmu32k_ck_cksel | |
| ffffff8008584dc0 T mt6357_upmu_set_rg_top_cksel_con0_rsv | |
| ffffff8008584de8 T mt6357_upmu_set_rg_srcvolten_sw | |
| ffffff8008584e10 T mt6357_upmu_set_rg_buck_osc_sel_sw | |
| ffffff8008584e38 T mt6357_upmu_set_rg_vowen_sw | |
| ffffff8008584e60 T mt6357_upmu_set_rg_srcvolten_mode | |
| ffffff8008584e88 T mt6357_upmu_set_rg_buck_osc_sel_mode | |
| ffffff8008584eb0 T mt6357_upmu_set_rg_vowen_mode | |
| ffffff8008584ed8 T mt6357_upmu_set_rg_top_cksel_con2_rsv | |
| ffffff8008584f00 T mt6357_upmu_set_rg_reg_ck_divsel | |
| ffffff8008584f28 T mt6357_upmu_set_top_ckdivsel_con0_rsv | |
| ffffff8008584f50 T mt6357_upmu_set_rg_g_smps_ck_pdn_hwen | |
| ffffff8008584f78 T mt6357_upmu_set_rg_reg_ck_pdn_hwen | |
| ffffff8008584fa0 T mt6357_upmu_set_rg_efuse_ck_pdn_hwen | |
| ffffff8008584fc8 T mt6357_upmu_set_rg_eint_32k_ck_pdn_hwen | |
| ffffff8008584ff0 T mt6357_upmu_set_rg_rtc26m_ck_pdn_hwen | |
| ffffff8008585018 T mt6357_upmu_set_rg_pmu26m_ck_pdn_hwen | |
| ffffff8008585040 T mt6357_upmu_set_rg_pmu_vxo22_on | |
| ffffff8008585068 T mt6357_upmu_set_rg_pmu_vxo22_on_sw_en | |
| ffffff8008585090 T mt6357_upmu_get_rg_pmu_vxo22_on_sw_en | |
| ffffff80085850f0 T mt6357_upmu_set_top_ckhwen_con0_rsv | |
| ffffff8008585118 T mt6357_upmu_set_rg_pmu128k_ck_tst_dis | |
| ffffff8008585140 T mt6357_upmu_set_rg_smps_ck_tst_dis | |
| ffffff8008585168 T mt6357_upmu_set_rg_xo_clk_26m_pmu_tst_dis | |
| ffffff8008585190 T mt6357_upmu_set_rg_xo_clk_26m_dig_tst_dis | |
| ffffff80085851b8 T mt6357_upmu_set_rg_rtc_26m_ck_tst_dis | |
| ffffff80085851e0 T mt6357_upmu_set_rg_rtc_32k_ck_tst_dis | |
| ffffff8008585208 T mt6357_upmu_set_rg_pmu_m_ck_tst_dis | |
| ffffff8008585230 T mt6357_upmu_set_top_cktst_con0_rsv | |
| ffffff8008585258 T mt6357_upmu_set_rg_pmu128k_ck_tstsel | |
| ffffff8008585280 T mt6357_upmu_set_rg_smps_ck_tstsel | |
| ffffff80085852a8 T mt6357_upmu_set_rg_xo_clk_26m_pmu_tstsel | |
| ffffff80085852d0 T mt6357_upmu_set_rg_xo_clk_26m_dig_tstsel | |
| ffffff80085852f8 T mt6357_upmu_set_rg_rtc_26m_ck_tstsel | |
| ffffff8008585320 T mt6357_upmu_set_rg_rtc_32k_ck_tstsel | |
| ffffff8008585348 T mt6357_upmu_set_rg_pmu_m_ck_tstsel | |
| ffffff8008585370 T mt6357_upmu_set_rg_efuse_ck_tstsel | |
| ffffff8008585398 T mt6357_upmu_set_rg_bgr_test_ck_tstsel | |
| ffffff80085853c0 T mt6357_upmu_set_rg_pchr_test_ck_tstsel | |
| ffffff80085853e8 T mt6357_upmu_set_rg_fqmtr_ck_tstsel | |
| ffffff8008585410 T mt6357_upmu_set_rg_osc_sel_sw_en | |
| ffffff8008585438 T mt6357_upmu_get_rg_osc_sel_sw_en | |
| ffffff8008585498 T mt6357_upmu_set_rg_osc_sel | |
| ffffff80085854c0 T mt6357_upmu_set_rg_osc_en_sw_en | |
| ffffff80085854e8 T mt6357_upmu_get_rg_osc_en_sw_en | |
| ffffff8008585548 T mt6357_upmu_set_rg_osc_en | |
| ffffff8008585570 T mt6357_upmu_get_rg_osc_en | |
| ffffff80085855d0 T mt6357_upmu_set_rg_g_smps_ck_pdn_vowen_en | |
| ffffff80085855f8 T mt6357_upmu_get_rg_g_smps_ck_pdn_vowen_en | |
| ffffff8008585658 T mt6357_upmu_set_rg_srclken0_lp_en | |
| ffffff8008585680 T mt6357_upmu_get_rg_srclken0_lp_en | |
| ffffff80085856e0 T mt6357_upmu_set_rg_srclken1_lp_en | |
| ffffff8008585708 T mt6357_upmu_get_rg_srclken1_lp_en | |
| ffffff8008585768 T mt6357_upmu_set_rg_srclken2_lp_en | |
| ffffff8008585790 T mt6357_upmu_get_rg_srclken2_lp_en | |
| ffffff80085857f0 T mt6357_upmu_set_rg_buck_lp_en | |
| ffffff8008585818 T mt6357_upmu_get_rg_buck_lp_en | |
| ffffff8008585878 T mt6357_upmu_set_rg_ldo_lp_en | |
| ffffff80085858a0 T mt6357_upmu_get_rg_ldo_lp_en | |
| ffffff8008585900 T mt6357_upmu_set_rg_buck_pfm_flag | |
| ffffff8008585928 T mt6357_upmu_set_rg_buck_pfm_flag_sw_en | |
| ffffff8008585950 T mt6357_upmu_get_rg_buck_pfm_flag_sw_en | |
| ffffff80085859b0 T mt6357_upmu_set_rg_dcxo26m_rdy | |
| ffffff80085859d8 T mt6357_upmu_set_rg_dcxo26m_rdy_sw_en | |
| ffffff8008585a00 T mt6357_upmu_get_rg_dcxo26m_rdy_sw_en | |
| ffffff8008585a60 T mt6357_upmu_set_rg_pmu_lp | |
| ffffff8008585a88 T mt6357_upmu_set_rg_pmu_lp_sw_en | |
| ffffff8008585ab0 T mt6357_upmu_get_rg_pmu_lp_sw_en | |
| ffffff8008585b10 T mt6357_upmu_set_rg_pmu_mdb_dcm_sw_en | |
| ffffff8008585b38 T mt6357_upmu_get_rg_pmu_mdb_dcm_sw_en | |
| ffffff8008585b98 T mt6357_upmu_set_rg_pmu_mdb_dcm_sw_mode | |
| ffffff8008585bc0 T mt6357_upmu_get_ro_handover_debug | |
| ffffff8008585c20 T mt6357_upmu_set_rg_efuse_man_rst | |
| ffffff8008585c48 T mt6357_upmu_set_rg_driver_rst | |
| ffffff8008585c70 T mt6357_upmu_set_rg_fqmtr_rst | |
| ffffff8008585c98 T mt6357_upmu_set_rg_rtc_rst | |
| ffffff8008585cc0 T mt6357_upmu_set_rg_type_c_cc_rst | |
| ffffff8008585ce8 T mt6357_upmu_set_rg_clk_trim_rst | |
| ffffff8008585d10 T mt6357_upmu_set_rg_buck_srclken_rst | |
| ffffff8008585d38 T mt6357_upmu_set_rg_buck_prot_pmpp_rst | |
| ffffff8008585d60 T mt6357_upmu_set_rg_spk_rst | |
| ffffff8008585d88 T mt6357_upmu_set_rg_ft_vr_sysrstb | |
| ffffff8008585db0 T mt6357_upmu_set_rg_ldo_cali_rst | |
| ffffff8008585dd8 T mt6357_upmu_set_top_rst_con1_rsv | |
| ffffff8008585e00 T mt6357_upmu_set_rg_chr_ldo_det_mode | |
| ffffff8008585e28 T mt6357_upmu_set_rg_chr_ldo_det_sw | |
| ffffff8008585e50 T mt6357_upmu_set_rg_chrwdt_flag_mode | |
| ffffff8008585e78 T mt6357_upmu_set_rg_chrwdt_flag_sw | |
| ffffff8008585ea0 T mt6357_upmu_set_top_rst_con2_rsv | |
| ffffff8008585ec8 T mt6357_upmu_set_rg_wdtrstb_en | |
| ffffff8008585ef0 T mt6357_upmu_get_rg_wdtrstb_en | |
| ffffff8008585f50 T mt6357_upmu_set_rg_wdtrstb_mode | |
| ffffff8008585f78 T mt6357_upmu_get_wdtrstb_status | |
| ffffff8008585fd8 T mt6357_upmu_set_wdtrstb_status_clr | |
| ffffff8008586000 T mt6357_upmu_set_rg_wdtrstb_fb_en | |
| ffffff8008586028 T mt6357_upmu_get_rg_wdtrstb_fb_en | |
| ffffff8008586088 T mt6357_upmu_set_rg_wdtrstb_deb | |
| ffffff80085860b0 T mt6357_upmu_set_rg_homekey_rst_en | |
| ffffff80085860d8 T mt6357_upmu_get_rg_homekey_rst_en | |
| ffffff8008586138 T mt6357_upmu_set_rg_pwrkey_rst_en | |
| ffffff8008586160 T mt6357_upmu_get_rg_pwrkey_rst_en | |
| ffffff80085861c0 T mt6357_upmu_set_rg_pwrrst_tmr_dis | |
| ffffff80085861e8 T mt6357_upmu_set_rg_pwrkey_rst_td | |
| ffffff8008586210 T mt6357_upmu_set_top_rst_misc_rsv | |
| ffffff8008586238 T mt6357_upmu_set_vpwrin_rstb_status | |
| ffffff8008586260 T mt6357_upmu_set_ddlo_rstb_status | |
| ffffff8008586288 T mt6357_upmu_set_uvlo_rstb_status | |
| ffffff80085862b0 T mt6357_upmu_set_rtc_ddlo_rstb_status | |
| ffffff80085862d8 T mt6357_upmu_set_chrwdt_reg_rstb_status | |
| ffffff8008586300 T mt6357_upmu_set_chrdet_reg_rstb_status | |
| ffffff8008586328 T mt6357_upmu_set_bwdt_ddlo_rstb_status | |
| ffffff8008586350 T mt6357_upmu_set_top_rst_status_rsv | |
| ffffff8008586378 T mt6357_upmu_get_top2_elr_len | |
| ffffff80085863d8 T mt6357_upmu_set_rg_top2_rsv0 | |
| ffffff8008586400 T mt6357_upmu_set_rg_top2_rsv1 | |
| ffffff8008586428 T mt6357_upmu_get_top3_ana_id | |
| ffffff8008586488 T mt6357_upmu_get_top3_dig_id | |
| ffffff80085864e8 T mt6357_upmu_get_top3_ana_minor_rev | |
| ffffff8008586548 T mt6357_upmu_get_top3_ana_major_rev | |
| ffffff80085865a8 T mt6357_upmu_get_top3_dig_minor_rev | |
| ffffff8008586608 T mt6357_upmu_get_top3_dig_major_rev | |
| ffffff8008586668 T mt6357_upmu_get_top3_dsn_cbs | |
| ffffff80085866c8 T mt6357_upmu_get_top3_dsn_bix | |
| ffffff8008586728 T mt6357_upmu_get_top3_dsn_esp | |
| ffffff8008586788 T mt6357_upmu_get_top3_dsn_fpi | |
| ffffff80085867e8 T mt6357_upmu_set_rg_int_en_spi_cmd_alert | |
| ffffff8008586810 T mt6357_upmu_get_rg_int_en_spi_cmd_alert | |
| ffffff8008586870 T mt6357_upmu_set_rg_int_mask_spi_cmd_alert | |
| ffffff8008586898 T mt6357_upmu_get_rg_int_raw_status_spi_cmd_alert | |
| ffffff80085868f8 T mt6357_upmu_set_rg_int_mask_buck_top | |
| ffffff8008586920 T mt6357_upmu_set_rg_int_mask_ldo_top | |
| ffffff8008586948 T mt6357_upmu_set_rg_int_mask_psc_top | |
| ffffff8008586970 T mt6357_upmu_set_rg_int_mask_sck_top | |
| ffffff8008586998 T mt6357_upmu_set_rg_int_mask_bm_top | |
| ffffff80085869c0 T mt6357_upmu_set_rg_int_mask_hk_top | |
| ffffff80085869e8 T mt6357_upmu_set_rg_int_mask_xpp_top | |
| ffffff8008586a10 T mt6357_upmu_set_rg_int_mask_aud_top | |
| ffffff8008586a38 T mt6357_upmu_set_rg_int_mask_misc_top | |
| ffffff8008586a60 T mt6357_upmu_set_rg_int_mask_top_con0_rsv | |
| ffffff8008586a88 T mt6357_upmu_get_int_status_buck_top | |
| ffffff8008586ae8 T mt6357_upmu_get_int_status_ldo_top | |
| ffffff8008586b48 T mt6357_upmu_get_int_status_psc_top | |
| ffffff8008586ba8 T mt6357_upmu_get_int_status_sck_top | |
| ffffff8008586c08 T mt6357_upmu_get_int_status_bm_top | |
| ffffff8008586c68 T mt6357_upmu_get_int_status_hk_top | |
| ffffff8008586cc8 T mt6357_upmu_get_int_status_xpp_top | |
| ffffff8008586d28 T mt6357_upmu_get_int_status_aud_top | |
| ffffff8008586d88 T mt6357_upmu_get_int_status_misc_top | |
| ffffff8008586de8 T mt6357_upmu_get_int_status_top_rsv | |
| ffffff8008586e48 T mt6357_upmu_get_int_raw_status_buck_top | |
| ffffff8008586ea8 T mt6357_upmu_get_int_raw_status_ldo_top | |
| ffffff8008586f08 T mt6357_upmu_get_int_raw_status_psc_top | |
| ffffff8008586f68 T mt6357_upmu_get_int_raw_status_sck_top | |
| ffffff8008586fc8 T mt6357_upmu_get_int_raw_status_bm_top | |
| ffffff8008587028 T mt6357_upmu_get_int_raw_status_hk_top | |
| ffffff8008587088 T mt6357_upmu_get_int_raw_status_xpp_top | |
| ffffff80085870e8 T mt6357_upmu_get_int_raw_status_aud_top | |
| ffffff8008587148 T mt6357_upmu_get_int_raw_status_misc_top | |
| ffffff80085871a8 T mt6357_upmu_get_int_raw_status_top_rsv | |
| ffffff8008587208 T mt6357_upmu_set_rg_int_polarity | |
| ffffff8008587230 T mt6357_upmu_get_plt0_ana_id | |
| ffffff8008587290 T mt6357_upmu_get_plt0_dig_id | |
| ffffff80085872f0 T mt6357_upmu_get_plt0_ana_minor_rev | |
| ffffff8008587350 T mt6357_upmu_get_plt0_ana_major_rev | |
| ffffff80085873b0 T mt6357_upmu_get_plt0_dig_minor_rev | |
| ffffff8008587410 T mt6357_upmu_get_plt0_dig_major_rev | |
| ffffff8008587470 T mt6357_upmu_get_plt0_dsn_cbs | |
| ffffff80085874d0 T mt6357_upmu_get_plt0_dsn_bix | |
| ffffff8008587530 T mt6357_upmu_get_plt0_dsn_esp | |
| ffffff8008587590 T mt6357_upmu_get_plt0_dsn_fpi | |
| ffffff80085875f0 T mt6357_upmu_set_fqmtr_tcksel | |
| ffffff8008587618 T mt6357_upmu_get_fqmtr_busy | |
| ffffff8008587678 T mt6357_upmu_set_fqmtr_dcxo26m_en | |
| ffffff80085876a0 T mt6357_upmu_set_fqmtr_en | |
| ffffff80085876c8 T mt6357_upmu_set_fqmtr_winset | |
| ffffff80085876f0 T mt6357_upmu_get_fqmtr_data | |
| ffffff8008587750 T mt6357_upmu_set_rg_osc_128k_trim_en | |
| ffffff8008587778 T mt6357_upmu_get_rg_osc_128k_trim_en | |
| ffffff80085877d8 T mt6357_upmu_set_rg_osc_128k_trim_rate | |
| ffffff8008587800 T mt6357_upmu_get_da_osc_128k_trim | |
| ffffff8008587860 T mt6357_upmu_set_rg_otp_pa | |
| ffffff8008587888 T mt6357_upmu_set_rg_otp_pdin | |
| ffffff80085878b0 T mt6357_upmu_set_rg_otp_ptm | |
| ffffff80085878d8 T mt6357_upmu_set_rg_otp_pwe | |
| ffffff8008587900 T mt6357_upmu_set_rg_otp_pprog | |
| ffffff8008587928 T mt6357_upmu_set_rg_otp_pwe_src | |
| ffffff8008587950 T mt6357_upmu_set_rg_otp_prog_pkey | |
| ffffff8008587978 T mt6357_upmu_set_rg_otp_rd_pkey | |
| ffffff80085879a0 T mt6357_upmu_set_rg_otp_rd_trig | |
| ffffff80085879c8 T mt6357_upmu_set_rg_rd_rdy_bypass | |
| ffffff80085879f0 T mt6357_upmu_set_rg_skip_otp_out | |
| ffffff8008587a18 T mt6357_upmu_set_rg_otp_rd_sw | |
| ffffff8008587a40 T mt6357_upmu_get_rg_otp_dout_sw | |
| ffffff8008587aa0 T mt6357_upmu_get_rg_otp_rd_busy | |
| ffffff8008587b00 T mt6357_upmu_get_rg_otp_rd_ack | |
| ffffff8008587b60 T mt6357_upmu_get_rg_otp_pa_sw | |
| ffffff8008587bc0 T mt6357_upmu_set_tma_key | |
| ffffff8008587be8 T mt6357_upmu_set_top_mdb_rsv0 | |
| ffffff8008587c10 T mt6357_upmu_set_rg_mdb_dm1_ds_en | |
| ffffff8008587c38 T mt6357_upmu_get_rg_mdb_dm1_ds_en | |
| ffffff8008587c98 T mt6357_upmu_set_top_mdb_rsv1 | |
| ffffff8008587cc0 T mt6357_upmu_set_rg_pmu_mdb_bridge_bypass_en | |
| ffffff8008587ce8 T mt6357_upmu_get_rg_pmu_mdb_bridge_bypass_en | |
| ffffff8008587d48 T mt6357_upmu_set_rg_osc_128k_trim | |
| ffffff8008587d70 T mt6357_upmu_set_efuse_osc_mode | |
| ffffff8008587d98 T mt6357_upmu_get_spislv_ana_id | |
| ffffff8008587df8 T mt6357_upmu_get_spislv_dig_id | |
| ffffff8008587e58 T mt6357_upmu_get_spislv_ana_minor_rev | |
| ffffff8008587eb8 T mt6357_upmu_get_spislv_ana_major_rev | |
| ffffff8008587f18 T mt6357_upmu_get_spislv_dig_minor_rev | |
| ffffff8008587f78 T mt6357_upmu_get_spislv_dig_major_rev | |
| ffffff8008587fd8 T mt6357_upmu_get_spislv_dsn_cbs | |
| ffffff8008588038 T mt6357_upmu_get_spislv_dsn_bix | |
| ffffff8008588098 T mt6357_upmu_get_spislv_dsn_esp | |
| ffffff80085880f8 T mt6357_upmu_get_spislv_dsn_fpi | |
| ffffff8008588158 T mt6357_upmu_set_rg_slp_rw_en | |
| ffffff8008588180 T mt6357_upmu_get_rg_slp_rw_en | |
| ffffff80085881e0 T mt6357_upmu_set_rg_spi_rsv | |
| ffffff8008588208 T mt6357_upmu_set_dew_dio_en | |
| ffffff8008588230 T mt6357_upmu_get_dew_read_test | |
| ffffff8008588290 T mt6357_upmu_set_dew_write_test | |
| ffffff80085882b8 T mt6357_upmu_set_dew_crc_swrst | |
| ffffff80085882e0 T mt6357_upmu_set_dew_crc_en | |
| ffffff8008588308 T mt6357_upmu_get_dew_crc_val | |
| ffffff8008588368 T mt6357_upmu_set_dew_dbg_mon_sel | |
| ffffff8008588390 T mt6357_upmu_set_dew_cipher_key_sel | |
| ffffff80085883b8 T mt6357_upmu_set_dew_cipher_iv_sel | |
| ffffff80085883e0 T mt6357_upmu_set_dew_cipher_en | |
| ffffff8008588408 T mt6357_upmu_get_dew_cipher_rdy | |
| ffffff8008588468 T mt6357_upmu_set_dew_cipher_mode | |
| ffffff8008588490 T mt6357_upmu_set_dew_cipher_swrst | |
| ffffff80085884b8 T mt6357_upmu_set_dew_rddmy_no | |
| ffffff80085884e0 T mt6357_upmu_set_int_type_con0 | |
| ffffff8008588508 T mt6357_upmu_get_cpu_int_sta | |
| ffffff8008588568 T mt6357_upmu_get_md32_int_sta | |
| ffffff80085885c8 T mt6357_upmu_set_rg_srclken_in3_smps_clk_mode | |
| ffffff80085885f0 T mt6357_upmu_set_rg_srclken_in3_en_smps_test | |
| ffffff8008588618 T mt6357_upmu_get_rg_srclken_in3_en_smps_test | |
| ffffff8008588678 T mt6357_upmu_set_rg_srclken_in2_smps_clk_mode | |
| ffffff80085886a0 T mt6357_upmu_set_rg_srclken_in2_en_smps_test | |
| ffffff80085886c8 T mt6357_upmu_get_rg_srclken_in2_en_smps_test | |
| ffffff8008588728 T mt6357_upmu_set_rg_spi_dly_sel | |
| ffffff8008588750 T mt6357_upmu_get_record_cmd0 | |
| ffffff80085887b0 T mt6357_upmu_get_record_cmd1 | |
| ffffff8008588810 T mt6357_upmu_get_record_cmd2 | |
| ffffff8008588870 T mt6357_upmu_get_record_wdata0 | |
| ffffff80085888d0 T mt6357_upmu_get_record_wdata1 | |
| ffffff8008588930 T mt6357_upmu_get_record_wdata2 | |
| ffffff8008588990 T mt6357_upmu_set_rg_addr_target | |
| ffffff80085889b8 T mt6357_upmu_set_rg_addr_mask | |
| ffffff80085889e0 T mt6357_upmu_set_rg_wdata_target | |
| ffffff8008588a08 T mt6357_upmu_set_rg_wdata_mask | |
| ffffff8008588a30 T mt6357_upmu_set_rg_spi_record_clr | |
| ffffff8008588a58 T mt6357_upmu_set_rg_cmd_alert_clr | |
| ffffff8008588a80 T mt6357_upmu_set_rg_srclken_in2_en | |
| ffffff8008588aa8 T mt6357_upmu_get_rg_srclken_in2_en | |
| ffffff8008588b08 T mt6357_upmu_set_rg_srclken_in3_en | |
| ffffff8008588b30 T mt6357_upmu_get_rg_srclken_in3_en | |
| ffffff8008588b90 T mt6357_upmu_get_sck_top_ana_id | |
| ffffff8008588bf0 T mt6357_upmu_get_sck_top_dig_id | |
| ffffff8008588c50 T mt6357_upmu_get_sck_top_ana_minor_rev | |
| ffffff8008588cb0 T mt6357_upmu_get_sck_top_ana_major_rev | |
| ffffff8008588d10 T mt6357_upmu_get_sck_top_dig_minor_rev | |
| ffffff8008588d70 T mt6357_upmu_get_sck_top_dig_major_rev | |
| ffffff8008588dd0 T mt6357_upmu_get_sck_top_cbs | |
| ffffff8008588e30 T mt6357_upmu_get_sck_top_bix | |
| ffffff8008588e90 T mt6357_upmu_set_sck_top_xtal_sel | |
| ffffff8008588eb8 T mt6357_upmu_set_sck_top_reserved | |
| ffffff8008588ee0 T mt6357_upmu_get_xosc32_enb_det | |
| ffffff8008588f40 T mt6357_upmu_get_sck_top_test_out | |
| ffffff8008588fa0 T mt6357_upmu_set_sck_top_mon_flag_sel | |
| ffffff8008588fc8 T mt6357_upmu_set_sck_top_mon_grp_sel | |
| ffffff8008588ff0 T mt6357_upmu_set_rg_rtc_sec_mclk_pdn | |
| ffffff8008589018 T mt6357_upmu_set_rg_eosc_cali_test_ck_pdn | |
| ffffff8008589040 T mt6357_upmu_set_rg_rtc_eosc32_ck_pdn | |
| ffffff8008589068 T mt6357_upmu_set_rg_rtc_sec_32k_ck_pdn | |
| ffffff8008589090 T mt6357_upmu_set_rg_rtc_mclk_pdn | |
| ffffff80085890b8 T mt6357_upmu_set_rg_rtc_32k_ck_pdn | |
| ffffff80085890e0 T mt6357_upmu_set_rg_rtc_26m_ck_pdn | |
| ffffff8008589108 T mt6357_upmu_set_rg_rtc_2sec_off_det_pdn | |
| ffffff8008589130 T mt6357_upmu_set_rg_rtc_26m_ck_pdn_hwen | |
| ffffff8008589158 T mt6357_upmu_set_rg_rtc_mclk_pdn_hwen | |
| ffffff8008589180 T mt6357_upmu_set_rg_rtc_sec_32k_ck_pdn_hwen | |
| ffffff80085891a8 T mt6357_upmu_set_rg_rtc_sec_mclk_pdn_hwen | |
| ffffff80085891d0 T mt6357_upmu_set_rg_rtc_clk_pdn_hwen_rsv_1 | |
| ffffff80085891f8 T mt6357_upmu_set_rg_rtc_clk_pdn_hwen_rsv_0 | |
| ffffff8008589220 T mt6357_upmu_set_rg_rtc_ck_tstsel_rsv | |
| ffffff8008589248 T mt6357_upmu_set_rg_rtcdet_ck_tstsel | |
| ffffff8008589270 T mt6357_upmu_set_rg_eosc_cali_test_ck_tstsel | |
| ffffff8008589298 T mt6357_upmu_set_rg_rtc_eosc32_ck_tstsel | |
| ffffff80085892c0 T mt6357_upmu_set_rg_rtc_swrst | |
| ffffff80085892e8 T mt6357_upmu_set_rg_rtc_sec_swrst | |
| ffffff8008589310 T mt6357_upmu_set_rg_bank_rtc_swrst | |
| ffffff8008589338 T mt6357_upmu_set_rg_bank_rtc_sec_swrst | |
| ffffff8008589360 T mt6357_upmu_set_rg_bank_eosc_cali_swrst | |
| ffffff8008589388 T mt6357_upmu_set_rg_bank_sck_top_swrst | |
| ffffff80085893b0 T mt6357_upmu_set_rg_int_en_rtc | |
| ffffff80085893d8 T mt6357_upmu_get_rg_int_en_rtc | |
| ffffff8008589438 T mt6357_upmu_set_rg_int_mask_rtc | |
| ffffff8008589460 T mt6357_upmu_get_rg_int_raw_status_rtc | |
| ffffff80085894c0 T mt6357_upmu_set_sck_top_polarity | |
| ffffff80085894e8 T mt6357_upmu_set_eosc_cali_start | |
| ffffff8008589510 T mt6357_upmu_set_eosc_cali_td | |
| ffffff8008589538 T mt6357_upmu_set_eosc_cali_test | |
| ffffff8008589560 T mt6357_upmu_set_eosc_cali_dcxo_rdy_td | |
| ffffff8008589588 T mt6357_upmu_set_frc_vtcxo0_on | |
| ffffff80085895b0 T mt6357_upmu_set_eosc_cali_rsv | |
| ffffff80085895d8 T mt6357_upmu_get_mix_eosc32_stp_lpdtb | |
| ffffff8008589638 T mt6357_upmu_set_mix_eosc32_stp_lpden | |
| ffffff8008589660 T mt6357_upmu_set_mix_xosc32_stp_pwdb | |
| ffffff8008589688 T mt6357_upmu_get_mix_xosc32_stp_lpdtb | |
| ffffff80085896e8 T mt6357_upmu_set_mix_xosc32_stp_lpden | |
| ffffff8008589710 T mt6357_upmu_set_mix_xosc32_stp_lpdrst | |
| ffffff8008589738 T mt6357_upmu_set_mix_xosc32_stp_cali | |
| ffffff8008589760 T mt6357_upmu_set_stmp_mode | |
| ffffff8008589788 T mt6357_upmu_set_mix_eosc32_stp_chop_en | |
| ffffff80085897b0 T mt6357_upmu_set_mix_dcxo_stp_lvsh_en | |
| ffffff80085897d8 T mt6357_upmu_set_mix_pmu_stp_ddlo_vrtc | |
| ffffff8008589800 T mt6357_upmu_set_mix_pmu_stp_ddlo_vrtc_en | |
| ffffff8008589828 T mt6357_upmu_set_mix_rtc_stp_xosc32_enb | |
| ffffff8008589850 T mt6357_upmu_set_mix_dcxo_stp_test_deglitch_mode | |
| ffffff8008589878 T mt6357_upmu_set_mix_eosc32_stp_rsv | |
| ffffff80085898a0 T mt6357_upmu_set_mix_eosc32_vct_en | |
| ffffff80085898c8 T mt6357_upmu_set_mix_eosc32_opt | |
| ffffff80085898f0 T mt6357_upmu_set_mix_dcxo_stp_lvsh_en_int | |
| ffffff8008589918 T mt6357_upmu_set_mix_rtc_gpio_coredetb | |
| ffffff8008589940 T mt6357_upmu_set_mix_rtc_gpio_f32kob | |
| ffffff8008589968 T mt6357_upmu_set_mix_rtc_gpio_gpo | |
| ffffff8008589990 T mt6357_upmu_set_mix_rtc_gpio_oe | |
| ffffff80085899b8 T mt6357_upmu_get_mix_rtc_stp_debug_out | |
| ffffff8008589a18 T mt6357_upmu_set_mix_rtc_stp_debug_sel | |
| ffffff8008589a40 T mt6357_upmu_set_mix_rtc_stp_k_eosc32_en | |
| ffffff8008589a68 T mt6357_upmu_set_mix_rtc_stp_embck_sel | |
| ffffff8008589a90 T mt6357_upmu_set_mix_stp_bbwakeup | |
| ffffff8008589ab8 T mt6357_upmu_get_mix_stp_rtc_ddlo | |
| ffffff8008589b18 T mt6357_upmu_get_mix_rtc_xosc32_enb | |
| ffffff8008589b78 T mt6357_upmu_set_mix_efuse_xosc32_enb_opt | |
| ffffff8008589ba0 T mt6357_upmu_get_rtc_ana_id | |
| ffffff8008589c00 T mt6357_upmu_get_rtc_dig_id | |
| ffffff8008589c60 T mt6357_upmu_get_rtc_ana_minor_rev | |
| ffffff8008589cc0 T mt6357_upmu_get_rtc_ana_major_rev | |
| ffffff8008589d20 T mt6357_upmu_get_rtc_dig_minor_rev | |
| ffffff8008589d80 T mt6357_upmu_get_rtc_dig_major_rev | |
| ffffff8008589de0 T mt6357_upmu_get_rtc_dns_cbs | |
| ffffff8008589e40 T mt6357_upmu_get_rtc_dns_bix | |
| ffffff8008589ea0 T mt6357_upmu_set_pwren | |
| ffffff8008589ec8 T mt6357_upmu_set_bbpu_clr | |
| ffffff8008589ef0 T mt6357_upmu_set_auto | |
| ffffff8008589f18 T mt6357_upmu_get_cbusy | |
| ffffff8008589f78 T mt6357_upmu_get_alsta | |
| ffffff8008589fd8 T mt6357_upmu_get_tcsta | |
| ffffff800858a038 T mt6357_upmu_get_lpsta | |
| ffffff800858a098 T mt6357_upmu_set_al_en | |
| ffffff800858a0c0 T mt6357_upmu_set_tc_en | |
| ffffff800858a0e8 T mt6357_upmu_set_oneshot | |
| ffffff800858a110 T mt6357_upmu_set_lp_en | |
| ffffff800858a138 T mt6357_upmu_set_seccii | |
| ffffff800858a160 T mt6357_upmu_set_mincii | |
| ffffff800858a188 T mt6357_upmu_set_houcii | |
| ffffff800858a1b0 T mt6357_upmu_set_domcii | |
| ffffff800858a1d8 T mt6357_upmu_set_dowcii | |
| ffffff800858a200 T mt6357_upmu_set_mthcii | |
| ffffff800858a228 T mt6357_upmu_set_yeacii | |
| ffffff800858a250 T mt6357_upmu_set_seccii_1_2 | |
| ffffff800858a278 T mt6357_upmu_set_seccii_1_4 | |
| ffffff800858a2a0 T mt6357_upmu_set_seccii_1_8 | |
| ffffff800858a2c8 T mt6357_upmu_set_sec_msk | |
| ffffff800858a2f0 T mt6357_upmu_set_min_msk | |
| ffffff800858a318 T mt6357_upmu_set_hou_msk | |
| ffffff800858a340 T mt6357_upmu_set_dom_msk | |
| ffffff800858a368 T mt6357_upmu_set_dow_msk | |
| ffffff800858a390 T mt6357_upmu_set_mth_msk | |
| ffffff800858a3b8 T mt6357_upmu_set_yea_msk | |
| ffffff800858a3e0 T mt6357_upmu_set_tc_second | |
| ffffff800858a408 T mt6357_upmu_set_tc_minute | |
| ffffff800858a430 T mt6357_upmu_set_tc_hour | |
| ffffff800858a458 T mt6357_upmu_set_tc_dom | |
| ffffff800858a480 T mt6357_upmu_set_tc_dow | |
| ffffff800858a4a8 T mt6357_upmu_set_tc_month | |
| ffffff800858a4d0 T mt6357_upmu_set_tc_year | |
| ffffff800858a4f8 T mt6357_upmu_set_al_second | |
| ffffff800858a520 T mt6357_upmu_set_bbpu_auto_pdn_sel | |
| ffffff800858a548 T mt6357_upmu_set_bbpu_2sec_ck_sel | |
| ffffff800858a570 T mt6357_upmu_set_bbpu_2sec_en | |
| ffffff800858a598 T mt6357_upmu_set_bbpu_2sec_mode | |
| ffffff800858a5c0 T mt6357_upmu_get_bbpu_2sec_stat_sta | |
| ffffff800858a620 T mt6357_upmu_set_rtc_lpd_opt | |
| ffffff800858a648 T mt6357_upmu_set_k_eosc32_vtcxo_on_sel | |
| ffffff800858a670 T mt6357_upmu_set_al_minute | |
| ffffff800858a698 T mt6357_upmu_set_al_hour | |
| ffffff800858a6c0 T mt6357_upmu_set_new_spare0 | |
| ffffff800858a6e8 T mt6357_upmu_set_al_dom | |
| ffffff800858a710 T mt6357_upmu_set_new_spare1 | |
| ffffff800858a738 T mt6357_upmu_set_al_dow | |
| ffffff800858a760 T mt6357_upmu_set_new_spare2 | |
| ffffff800858a788 T mt6357_upmu_set_al_month | |
| ffffff800858a7b0 T mt6357_upmu_set_new_spare3 | |
| ffffff800858a7d8 T mt6357_upmu_set_al_year | |
| ffffff800858a800 T mt6357_upmu_set_rtc_k_eosc_rsv | |
| ffffff800858a828 T mt6357_upmu_set_xosccali | |
| ffffff800858a850 T mt6357_upmu_get_rtc_xosc32_enb | |
| ffffff800858a8b0 T mt6357_upmu_set_rtc_embck_sel_mode | |
| ffffff800858a8d8 T mt6357_upmu_set_rtc_embck_src_sel | |
| ffffff800858a900 T mt6357_upmu_set_rtc_embck_sel_option | |
| ffffff800858a928 T mt6357_upmu_set_rtc_gps_ckout_en | |
| ffffff800858a950 T mt6357_upmu_set_rtc_eosc32_vct_en | |
| ffffff800858a978 T mt6357_upmu_set_rtc_eosc32_chop_en | |
| ffffff800858a9a0 T mt6357_upmu_set_rtc_gp_osc32_con | |
| ffffff800858a9c8 T mt6357_upmu_set_rtc_reg_xosc32_enb | |
| ffffff800858a9f0 T mt6357_upmu_set_rtc_powerkey1 | |
| ffffff800858aa18 T mt6357_upmu_set_rtc_powerkey2 | |
| ffffff800858aa40 T mt6357_upmu_set_rtc_pdn1 | |
| ffffff800858aa68 T mt6357_upmu_set_rtc_pdn2 | |
| ffffff800858aa90 T mt6357_upmu_set_rtc_spar0 | |
| ffffff800858aab8 T mt6357_upmu_set_rtc_spar1 | |
| ffffff800858aae0 T mt6357_upmu_set_rtc_prot | |
| ffffff800858ab08 T mt6357_upmu_set_rtc_diff | |
| ffffff800858ab30 T mt6357_upmu_get_power_detected | |
| ffffff800858ab90 T mt6357_upmu_set_k_eosc32_rsv | |
| ffffff800858abb8 T mt6357_upmu_set_cali_rd_sel | |
| ffffff800858abe0 T mt6357_upmu_set_rtc_cali | |
| ffffff800858ac08 T mt6357_upmu_set_cali_wr_sel | |
| ffffff800858ac30 T mt6357_upmu_set_k_eosc32_overflow | |
| ffffff800858ac58 T mt6357_upmu_set_vbat_lpsta_raw | |
| ffffff800858ac80 T mt6357_upmu_set_eosc32_lpen | |
| ffffff800858aca8 T mt6357_upmu_set_xosc32_lpen | |
| ffffff800858acd0 T mt6357_upmu_set_lprst | |
| ffffff800858acf8 T mt6357_upmu_set_cdbo | |
| ffffff800858ad20 T mt6357_upmu_set_f32kob | |
| ffffff800858ad48 T mt6357_upmu_set_gpo | |
| ffffff800858ad70 T mt6357_upmu_set_goe | |
| ffffff800858ad98 T mt6357_upmu_set_gsr | |
| ffffff800858adc0 T mt6357_upmu_set_gsmt | |
| ffffff800858ade8 T mt6357_upmu_set_gpen | |
| ffffff800858ae10 T mt6357_upmu_set_gpu | |
| ffffff800858ae38 T mt6357_upmu_set_ge4 | |
| ffffff800858ae60 T mt6357_upmu_set_ge8 | |
| ffffff800858ae88 T mt6357_upmu_get_gpi | |
| ffffff800858aee8 T mt6357_upmu_get_lpsta_raw | |
| ffffff800858af48 T mt6357_upmu_get_rtc_int_cnt | |
| ffffff800858afa8 T mt6357_upmu_set_rtc_sec_dat0 | |
| ffffff800858afd0 T mt6357_upmu_set_rtc_sec_dat1 | |
| ffffff800858aff8 T mt6357_upmu_set_rtc_sec_dat2 | |
| ffffff800858b020 T mt6357_upmu_get_rtc_sec_ana_id | |
| ffffff800858b080 T mt6357_upmu_get_rtc_sec_dig_id | |
| ffffff800858b0e0 T mt6357_upmu_get_rtc_sec_ana_minor_rev | |
| ffffff800858b140 T mt6357_upmu_get_rtc_sec_ana_major_rev | |
| ffffff800858b1a0 T mt6357_upmu_get_rtc_sec_dig_minor_rev | |
| ffffff800858b200 T mt6357_upmu_get_rtc_sec_dig_major_rev | |
| ffffff800858b260 T mt6357_upmu_get_rtc_sec_dns_cbs | |
| ffffff800858b2c0 T mt6357_upmu_get_rtc_sec_dns_bix | |
| ffffff800858b320 T mt6357_upmu_set_tc_second_sec | |
| ffffff800858b348 T mt6357_upmu_set_tc_minute_sec | |
| ffffff800858b370 T mt6357_upmu_set_tc_hour_sec | |
| ffffff800858b398 T mt6357_upmu_set_tc_dom_sec | |
| ffffff800858b3c0 T mt6357_upmu_set_tc_dow_sec | |
| ffffff800858b3e8 T mt6357_upmu_set_tc_month_sec | |
| ffffff800858b410 T mt6357_upmu_set_tc_year_sec | |
| ffffff800858b438 T mt6357_upmu_set_rtc_sec_ck_pdn | |
| ffffff800858b460 T mt6357_upmu_get_dcxo_dsn_cbs | |
| ffffff800858b4c0 T mt6357_upmu_get_dcxo_dsn_bix | |
| ffffff800858b520 T mt6357_upmu_get_dcxo_dsn_esp | |
| ffffff800858b580 T mt6357_upmu_get_dcxo_dsn_fpi | |
| ffffff800858b5e0 T mt6357_upmu_set_xo_extbuf1_mode | |
| ffffff800858b608 T mt6357_upmu_set_xo_extbuf1_en_m | |
| ffffff800858b630 T mt6357_upmu_set_xo_extbuf2_mode | |
| ffffff800858b658 T mt6357_upmu_set_xo_extbuf2_en_m | |
| ffffff800858b680 T mt6357_upmu_set_xo_extbuf3_mode | |
| ffffff800858b6a8 T mt6357_upmu_set_xo_extbuf3_en_m | |
| ffffff800858b6d0 T mt6357_upmu_set_xo_extbuf4_mode | |
| ffffff800858b6f8 T mt6357_upmu_set_xo_extbuf4_en_m | |
| ffffff800858b720 T mt6357_upmu_set_xo_bb_lpm_en | |
| ffffff800858b748 T mt6357_upmu_set_xo_enbb_man | |
| ffffff800858b770 T mt6357_upmu_set_xo_enbb_en_m | |
| ffffff800858b798 T mt6357_upmu_set_xo_clksel_man | |
| ffffff800858b7c0 T mt6357_upmu_set_xo_clksel_en_m | |
| ffffff800858b7e8 T mt6357_upmu_set_xo_extbuf1_ckg_man | |
| ffffff800858b810 T mt6357_upmu_set_xo_extbuf1_ckg_en_m | |
| ffffff800858b838 T mt6357_upmu_set_xo_extbuf2_ckg_man | |
| ffffff800858b860 T mt6357_upmu_set_xo_extbuf2_ckg_en_m | |
| ffffff800858b888 T mt6357_upmu_set_xo_extbuf3_ckg_man | |
| ffffff800858b8b0 T mt6357_upmu_set_xo_extbuf3_ckg_en_m | |
| ffffff800858b8d8 T mt6357_upmu_set_xo_extbuf4_ckg_man | |
| ffffff800858b900 T mt6357_upmu_set_xo_extbuf4_ckg_en_m | |
| ffffff800858b928 T mt6357_upmu_set_xo_intbuf_man | |
| ffffff800858b950 T mt6357_upmu_set_xo_pbuf_en_m | |
| ffffff800858b978 T mt6357_upmu_set_xo_ibuf_en_m | |
| ffffff800858b9a0 T mt6357_upmu_set_xo_lpmbuf_man | |
| ffffff800858b9c8 T mt6357_upmu_set_xo_lpm_prebuf_en_m | |
| ffffff800858b9f0 T mt6357_upmu_set_xo_lpbuf_en_m | |
| ffffff800858ba18 T mt6357_upmu_set_xo_bblpm_cksel_m | |
| ffffff800858ba40 T mt6357_upmu_set_xo_en32k_man | |
| ffffff800858ba68 T mt6357_upmu_set_xo_en32k_m | |
| ffffff800858ba90 T mt6357_upmu_set_xo_xmode_man | |
| ffffff800858bab8 T mt6357_upmu_set_xo_xmode_m | |
| ffffff800858bae0 T mt6357_upmu_set_xo_strup_mode | |
| ffffff800858bb08 T mt6357_upmu_set_xo_aac_fpm_time | |
| ffffff800858bb30 T mt6357_upmu_set_xo_aac_mode_lpm | |
| ffffff800858bb58 T mt6357_upmu_set_xo_aac_mode_fpm | |
| ffffff800858bb80 T mt6357_upmu_set_xo_en26m_offsq_en | |
| ffffff800858bba8 T mt6357_upmu_set_xo_ldocal_en | |
| ffffff800858bbd0 T mt6357_upmu_set_xo_cbank_sync_dyn | |
| ffffff800858bbf8 T mt6357_upmu_set_xo_26mlp_man_en | |
| ffffff800858bc20 T mt6357_upmu_set_xo_bufldok_en | |
| ffffff800858bc48 T mt6357_upmu_set_xo_pmu_cken_m | |
| ffffff800858bc70 T mt6357_upmu_set_xo_pmu_cken_man | |
| ffffff800858bc98 T mt6357_upmu_set_xo_extbuf6_ckg_man | |
| ffffff800858bcc0 T mt6357_upmu_set_xo_extbuf6_ckg_en_m | |
| ffffff800858bce8 T mt6357_upmu_set_xo_extbuf7_ckg_man | |
| ffffff800858bd10 T mt6357_upmu_set_xo_extbuf7_ckg_en_m | |
| ffffff800858bd38 T mt6357_upmu_set_xo_lpm_isel_man | |
| ffffff800858bd60 T mt6357_upmu_set_xo_fpm_isel_man | |
| ffffff800858bd88 T mt6357_upmu_set_xo_cdac_fpm | |
| ffffff800858bdb0 T mt6357_upmu_set_xo_cdac_lpm | |
| ffffff800858bdd8 T mt6357_upmu_set_xo_32kdiv_nfrac_fpm | |
| ffffff800858be00 T mt6357_upmu_set_xo_cofst_fpm | |
| ffffff800858be28 T mt6357_upmu_set_xo_32kdiv_nfrac_lpm | |
| ffffff800858be50 T mt6357_upmu_set_xo_cofst_lpm | |
| ffffff800858be78 T mt6357_upmu_set_xo_core_man | |
| ffffff800858bea0 T mt6357_upmu_set_xo_core_en_m | |
| ffffff800858bec8 T mt6357_upmu_set_xo_core_turbo_en_m | |
| ffffff800858bef0 T mt6357_upmu_set_xo_core_aac_en_m | |
| ffffff800858bf18 T mt6357_upmu_set_xo_startup_en_m | |
| ffffff800858bf40 T mt6357_upmu_set_xo_core_vbfpm_en_m | |
| ffffff800858bf68 T mt6357_upmu_set_xo_core_vblpm_en_m | |
| ffffff800858bf90 T mt6357_upmu_set_xo_lpmbias_en_m | |
| ffffff800858bfb8 T mt6357_upmu_set_xo_vtcgen_en_m | |
| ffffff800858bfe0 T mt6357_upmu_set_xo_iaac_comp_en_m | |
| ffffff800858c008 T mt6357_upmu_set_xo_ifpm_comp_en_m | |
| ffffff800858c030 T mt6357_upmu_set_xo_ilpm_comp_en_m | |
| ffffff800858c058 T mt6357_upmu_set_xo_core_bypcas_fpm | |
| ffffff800858c080 T mt6357_upmu_set_xo_core_gmx2_fpm | |
| ffffff800858c0a8 T mt6357_upmu_set_xo_core_idac_fpm | |
| ffffff800858c0d0 T mt6357_upmu_set_xo_aac_comp_man | |
| ffffff800858c0f8 T mt6357_upmu_set_xo_aac_en_m | |
| ffffff800858c120 T mt6357_upmu_set_xo_aac_monen_m | |
| ffffff800858c148 T mt6357_upmu_set_xo_comp_en_m | |
| ffffff800858c170 T mt6357_upmu_set_xo_comp_tsten_m | |
| ffffff800858c198 T mt6357_upmu_set_xo_aac_hv_fpm | |
| ffffff800858c1c0 T mt6357_upmu_set_xo_aac_ibias_fpm | |
| ffffff800858c1e8 T mt6357_upmu_set_xo_aac_vofst_fpm | |
| ffffff800858c210 T mt6357_upmu_set_xo_aac_comp_hv_fpm | |
| ffffff800858c238 T mt6357_upmu_set_xo_aac_vsel_fpm | |
| ffffff800858c260 T mt6357_upmu_set_xo_aac_comp_pol | |
| ffffff800858c288 T mt6357_upmu_set_xo_core_bypcas_lpm | |
| ffffff800858c2b0 T mt6357_upmu_set_xo_core_gmx2_lpm | |
| ffffff800858c2d8 T mt6357_upmu_set_xo_core_idac_lpm | |
| ffffff800858c300 T mt6357_upmu_set_xo_aac_comp_hv_lpm | |
| ffffff800858c328 T mt6357_upmu_set_xo_aac_vsel_lpm | |
| ffffff800858c350 T mt6357_upmu_set_xo_aac_hv_lpm | |
| ffffff800858c378 T mt6357_upmu_set_xo_aac_ibias_lpm | |
| ffffff800858c3a0 T mt6357_upmu_set_xo_aac_vofst_lpm | |
| ffffff800858c3c8 T mt6357_upmu_set_xo_aac_fpm_swen | |
| ffffff800858c3f0 T mt6357_upmu_set_xo_swrst | |
| ffffff800858c418 T mt6357_upmu_set_xo_32kdiv_swrst | |
| ffffff800858c440 T mt6357_upmu_set_xo_32kdiv_ratio_man | |
| ffffff800858c468 T mt6357_upmu_set_xo_32kdiv_test_en | |
| ffffff800858c490 T mt6357_upmu_set_xo_cbank_sync_man | |
| ffffff800858c4b8 T mt6357_upmu_set_xo_cbank_sync_en_m | |
| ffffff800858c4e0 T mt6357_upmu_set_xo_ctl_sync_man | |
| ffffff800858c508 T mt6357_upmu_set_xo_ctl_sync_en_m | |
| ffffff800858c530 T mt6357_upmu_set_xo_ldo_man | |
| ffffff800858c558 T mt6357_upmu_set_xo_ldopbuf_en_m | |
| ffffff800858c580 T mt6357_upmu_set_xo_ldopbuf_vset_m | |
| ffffff800858c5a8 T mt6357_upmu_set_xo_ldovtst_en_m | |
| ffffff800858c5d0 T mt6357_upmu_set_xo_test_vcal_en_m | |
| ffffff800858c5f8 T mt6357_upmu_set_xo_vbist_en_m | |
| ffffff800858c620 T mt6357_upmu_set_xo_vtest_sel_mux | |
| ffffff800858c648 T mt6357_upmu_set_xo_reserved3 | |
| ffffff800858c670 T mt6357_upmu_set_xo_extbuf6_mode | |
| ffffff800858c698 T mt6357_upmu_set_xo_extbuf6_en_m | |
| ffffff800858c6c0 T mt6357_upmu_set_xo_extbuf7_mode | |
| ffffff800858c6e8 T mt6357_upmu_set_xo_extbuf7_en_m | |
| ffffff800858c710 T mt6357_upmu_set_xo_bufldok_man | |
| ffffff800858c738 T mt6357_upmu_set_xo_buf1ldo_cal_m | |
| ffffff800858c760 T mt6357_upmu_set_xo_bufldo_cal_m | |
| ffffff800858c788 T mt6357_upmu_set_xo_extbuf4_clksel_man | |
| ffffff800858c7b0 T mt6357_upmu_set_xo_vio18pg_bufen | |
| ffffff800858c7d8 T mt6357_upmu_set_xo_cal_en_man | |
| ffffff800858c800 T mt6357_upmu_set_xo_cal_en_m | |
| ffffff800858c828 T mt6357_upmu_set_rg_xo_core_osctd | |
| ffffff800858c850 T mt6357_upmu_set_xo_thadc_en | |
| ffffff800858c878 T mt6357_upmu_set_rg_xo_sync_ckpol | |
| ffffff800858c8a0 T mt6357_upmu_set_rg_xo_cbank_pol | |
| ffffff800858c8c8 T mt6357_upmu_set_rg_xo_cbank_sync_byp | |
| ffffff800858c8f0 T mt6357_upmu_set_rg_xo_ctl_pol | |
| ffffff800858c918 T mt6357_upmu_set_rg_xo_ctl_sync_byp | |
| ffffff800858c940 T mt6357_upmu_set_rg_xo_lpbuf_inv | |
| ffffff800858c968 T mt6357_upmu_set_rg_xo_ldopbuf_byp | |
| ffffff800858c990 T mt6357_upmu_set_rg_xo_ldopbuf_encl | |
| ffffff800858c9b8 T mt6357_upmu_get_rg_xo_ldopbuf_encl | |
| ffffff800858ca18 T mt6357_upmu_set_rg_xo_vgbias_vset | |
| ffffff800858ca40 T mt6357_upmu_set_rg_xo_pbuf_iset | |
| ffffff800858ca68 T mt6357_upmu_set_rg_xo_ibuf_iset | |
| ffffff800858ca90 T mt6357_upmu_set_rg_xo_reserved4 | |
| ffffff800858cab8 T mt6357_upmu_set_rg_xo_vow_en | |
| ffffff800858cae0 T mt6357_upmu_get_rg_xo_vow_en | |
| ffffff800858cb40 T mt6357_upmu_set_rg_xo_vow_div | |
| ffffff800858cb68 T mt6357_upmu_set_rg_xo_bufldo24_encl | |
| ffffff800858cb90 T mt6357_upmu_get_rg_xo_bufldo24_encl | |
| ffffff800858cbf0 T mt6357_upmu_set_rg_xo_bufldo24_ibx2 | |
| ffffff800858cc18 T mt6357_upmu_set_rg_xo_reserved5 | |
| ffffff800858cc40 T mt6357_upmu_set_rg_xo_bufldo13_encl | |
| ffffff800858cc68 T mt6357_upmu_get_rg_xo_bufldo13_encl | |
| ffffff800858ccc8 T mt6357_upmu_set_rg_xo_bufldo13_ibx2 | |
| ffffff800858ccf0 T mt6357_upmu_set_rg_xo_bufldo13_ix2 | |
| ffffff800858cd18 T mt6357_upmu_set_rg_xo_lvldo_i_ctrl | |
| ffffff800858cd40 T mt6357_upmu_set_rg_xo_bufldo67_encl | |
| ffffff800858cd68 T mt6357_upmu_get_rg_xo_bufldo67_encl | |
| ffffff800858cdc8 T mt6357_upmu_set_rg_xo_bufldo67_ibx2 | |
| ffffff800858cdf0 T mt6357_upmu_set_rg_xo_bufldo67_ix2 | |
| ffffff800858ce18 T mt6357_upmu_set_rg_xo_lvldo_rfb | |
| ffffff800858ce40 T mt6357_upmu_set_rg_xo_extbuf_inv | |
| ffffff800858ce68 T mt6357_upmu_set_rg_xo_reserved0 | |
| ffffff800858ce90 T mt6357_upmu_set_xo_extbuf2_clksel_man | |
| ffffff800858ceb8 T mt6357_upmu_set_xo_audio_en_m | |
| ffffff800858cee0 T mt6357_upmu_set_rg_xo_audio_atten | |
| ffffff800858cf08 T mt6357_upmu_set_rg_xo_audio_iset | |
| ffffff800858cf30 T mt6357_upmu_set_rg_xo_extbuf1_hd | |
| ffffff800858cf58 T mt6357_upmu_set_rg_xo_extbuf2_hd | |
| ffffff800858cf80 T mt6357_upmu_set_rg_xo_extbuf3_hd | |
| ffffff800858cfa8 T mt6357_upmu_set_rg_xo_extbuf4_hd | |
| ffffff800858cfd0 T mt6357_upmu_set_rg_xo_reserved8 | |
| ffffff800858cff8 T mt6357_upmu_set_rg_xo_extbuf6_hd | |
| ffffff800858d020 T mt6357_upmu_set_rg_xo_extbuf7_hd | |
| ffffff800858d048 T mt6357_upmu_set_xo_extbuf1_iset_m | |
| ffffff800858d070 T mt6357_upmu_set_xo_extbuf2_iset_m | |
| ffffff800858d098 T mt6357_upmu_set_xo_extbuf3_iset_m | |
| ffffff800858d0c0 T mt6357_upmu_set_xo_extbuf4_iset_m | |
| ffffff800858d0e8 T mt6357_upmu_set_xo_reserved9 | |
| ffffff800858d110 T mt6357_upmu_set_xo_extbuf6_iset_m | |
| ffffff800858d138 T mt6357_upmu_set_xo_extbuf7_iset_m | |
| ffffff800858d160 T mt6357_upmu_set_rg_xo_lpm_prebuf_iset | |
| ffffff800858d188 T mt6357_upmu_set_rg_xo_reserved1 | |
| ffffff800858d1b0 T mt6357_upmu_set_xo_thadc_en_man | |
| ffffff800858d1d8 T mt6357_upmu_set_rg_xo_tsource_en | |
| ffffff800858d200 T mt6357_upmu_get_rg_xo_tsource_en | |
| ffffff800858d260 T mt6357_upmu_set_xo_bufldo13_vset_m | |
| ffffff800858d288 T mt6357_upmu_set_xo_bufldo24_vset_m | |
| ffffff800858d2b0 T mt6357_upmu_set_xo_bufldo67_vset_m | |
| ffffff800858d2d8 T mt6357_upmu_set_xo_static_auxout_sel | |
| ffffff800858d300 T mt6357_upmu_set_xo_auxout_sel | |
| ffffff800858d328 T mt6357_upmu_get_xo_static_auxout | |
| ffffff800858d388 T mt6357_upmu_set_rg_xo_pctat_comp_en | |
| ffffff800858d3b0 T mt6357_upmu_get_rg_xo_pctat_comp_en | |
| ffffff800858d410 T mt6357_upmu_set_rg_xo_heater_sel | |
| ffffff800858d438 T mt6357_upmu_set_rg_xo_corner_detect_en | |
| ffffff800858d460 T mt6357_upmu_get_rg_xo_corner_detect_en | |
| ffffff800858d4c0 T mt6357_upmu_set_rg_xo_corner_detect_en_man | |
| ffffff800858d4e8 T mt6357_upmu_get_rg_xo_corner_detect_en_man | |
| ffffff800858d548 T mt6357_upmu_set_rg_xo_resrved10 | |
| ffffff800858d570 T mt6357_upmu_set_rg_xo_corner_setting_tune | |
| ffffff800858d598 T mt6357_upmu_set_rg_xo_resrved11 | |
| ffffff800858d5c0 T mt6357_upmu_get_rgs_ad_xo_corner_cal_done | |
| ffffff800858d620 T mt6357_upmu_get_rgs_ad_xo_corner_sel | |
| ffffff800858d680 T mt6357_upmu_set_xo_mdb_tbo_en_sel | |
| ffffff800858d6a8 T mt6357_upmu_set_xo_ptatctat_en_man | |
| ffffff800858d6d0 T mt6357_upmu_set_xo_ptatctat_en_m | |
| ffffff800858d6f8 T mt6357_upmu_set_xo_ptatctat_en_lpm | |
| ffffff800858d720 T mt6357_upmu_set_xo_ptatctat_en_fpm | |
| ffffff800858d748 T mt6357_upmu_get_dcxo_elr_len | |
| ffffff800858d7a8 T mt6357_upmu_set_rg_xo_pctat_rdeg_sel | |
| ffffff800858d7d0 T mt6357_upmu_set_rg_xo_gs_vtemp | |
| ffffff800858d7f8 T mt6357_upmu_set_xo_pwrkey_rstb_sel | |
| ffffff800858d820 T mt6357_upmu_get_psc_top_ana_id | |
| ffffff800858d880 T mt6357_upmu_get_psc_top_dig_id | |
| ffffff800858d8e0 T mt6357_upmu_get_psc_top_ana_minor_rev | |
| ffffff800858d940 T mt6357_upmu_get_psc_top_ana_major_rev | |
| ffffff800858d9a0 T mt6357_upmu_get_psc_top_dig_minor_rev | |
| ffffff800858da00 T mt6357_upmu_get_psc_top_dig_major_rev | |
| ffffff800858da60 T mt6357_upmu_get_psc_top_cbs | |
| ffffff800858dac0 T mt6357_upmu_get_psc_top_bix | |
| ffffff800858db20 T mt6357_upmu_get_psc_top_esp | |
| ffffff800858db80 T mt6357_upmu_get_psc_top_fpi | |
| ffffff800858dbe0 T mt6357_upmu_get_psc_top_clk_offset | |
| ffffff800858dc40 T mt6357_upmu_get_psc_top_rst_offset | |
| ffffff800858dca0 T mt6357_upmu_get_psc_top_int_offset | |
| ffffff800858dd00 T mt6357_upmu_get_psc_top_int_len | |
| ffffff800858dd60 T mt6357_upmu_set_rg_strup_long_press_rst | |
| ffffff800858dd88 T mt6357_upmu_set_rg_pseq_pwrmsk_rst_sel | |
| ffffff800858ddb0 T mt6357_upmu_set_bank_strup_swrst | |
| ffffff800858ddd8 T mt6357_upmu_set_bank_pseq_swrst | |
| ffffff800858de00 T mt6357_upmu_set_bank_pchr_dig_swrst | |
| ffffff800858de28 T mt6357_upmu_set_bank_pchr_macro_swrst | |
| ffffff800858de50 T mt6357_upmu_set_rg_int_en_pwrkey | |
| ffffff800858de78 T mt6357_upmu_get_rg_int_en_pwrkey | |
| ffffff800858ded8 T mt6357_upmu_set_rg_int_en_homekey | |
| ffffff800858df00 T mt6357_upmu_get_rg_int_en_homekey | |
| ffffff800858df60 T mt6357_upmu_set_rg_int_en_pwrkey_r | |
| ffffff800858df88 T mt6357_upmu_get_rg_int_en_pwrkey_r | |
| ffffff800858dfe8 T mt6357_upmu_set_rg_int_en_homekey_r | |
| ffffff800858e010 T mt6357_upmu_get_rg_int_en_homekey_r | |
| ffffff800858e070 T mt6357_upmu_set_rg_int_en_ni_lbat_int | |
| ffffff800858e098 T mt6357_upmu_get_rg_int_en_ni_lbat_int | |
| ffffff800858e0f8 T mt6357_upmu_set_rg_int_en_chrdet | |
| ffffff800858e120 T mt6357_upmu_get_rg_int_en_chrdet | |
| ffffff800858e180 T mt6357_upmu_set_rg_int_en_chrdet_edge | |
| ffffff800858e1a8 T mt6357_upmu_get_rg_int_en_chrdet_edge | |
| ffffff800858e208 T mt6357_upmu_set_rg_int_en_vcdt_hv_det | |
| ffffff800858e230 T mt6357_upmu_get_rg_int_en_vcdt_hv_det | |
| ffffff800858e290 T mt6357_upmu_set_rg_int_en_watchdog | |
| ffffff800858e2b8 T mt6357_upmu_get_rg_int_en_watchdog | |
| ffffff800858e318 T mt6357_upmu_set_rg_int_en_vbaton_undet | |
| ffffff800858e340 T mt6357_upmu_get_rg_int_en_vbaton_undet | |
| ffffff800858e3a0 T mt6357_upmu_set_rg_int_en_bvalid_det | |
| ffffff800858e3c8 T mt6357_upmu_get_rg_int_en_bvalid_det | |
| ffffff800858e428 T mt6357_upmu_set_rg_int_en_ov | |
| ffffff800858e450 T mt6357_upmu_get_rg_int_en_ov | |
| ffffff800858e4b0 T mt6357_upmu_set_rg_int_mask_pwrkey | |
| ffffff800858e4d8 T mt6357_upmu_set_rg_int_mask_homekey | |
| ffffff800858e500 T mt6357_upmu_set_rg_int_mask_pwrkey_r | |
| ffffff800858e528 T mt6357_upmu_set_rg_int_mask_homekey_r | |
| ffffff800858e550 T mt6357_upmu_set_rg_int_mask_ni_lbat_int | |
| ffffff800858e578 T mt6357_upmu_set_rg_int_mask_chrdet | |
| ffffff800858e5a0 T mt6357_upmu_set_rg_int_mask_chrdet_edge | |
| ffffff800858e5c8 T mt6357_upmu_set_rg_int_mask_vcdt_hv_det | |
| ffffff800858e5f0 T mt6357_upmu_set_rg_int_mask_watchdog | |
| ffffff800858e618 T mt6357_upmu_set_rg_int_mask_vbaton_undet | |
| ffffff800858e640 T mt6357_upmu_set_rg_int_mask_bvalid_det | |
| ffffff800858e668 T mt6357_upmu_set_rg_int_mask_ov | |
| ffffff800858e690 T mt6357_upmu_get_rg_int_raw_status_pwrkey | |
| ffffff800858e6f0 T mt6357_upmu_get_rg_int_raw_status_homekey | |
| ffffff800858e750 T mt6357_upmu_get_rg_int_raw_status_pwrkey_r | |
| ffffff800858e7b0 T mt6357_upmu_get_rg_int_raw_status_homekey_r | |
| ffffff800858e810 T mt6357_upmu_get_rg_int_raw_status_ni_lbat_int | |
| ffffff800858e870 T mt6357_upmu_get_rg_int_raw_status_chrdet | |
| ffffff800858e8d0 T mt6357_upmu_get_rg_int_raw_status_chrdet_edge | |
| ffffff800858e930 T mt6357_upmu_get_rg_int_raw_status_vcdt_hv_det | |
| ffffff800858e990 T mt6357_upmu_get_rg_int_raw_status_watchdog | |
| ffffff800858e9f0 T mt6357_upmu_get_rg_int_raw_status_vbaton_undet | |
| ffffff800858ea50 T mt6357_upmu_get_rg_int_raw_status_bvalid_det | |
| ffffff800858eab0 T mt6357_upmu_get_rg_int_raw_status_ov | |
| ffffff800858eb10 T mt6357_upmu_set_rg_psc_int_polarity | |
| ffffff800858eb38 T mt6357_upmu_set_rg_homekey_int_sel | |
| ffffff800858eb60 T mt6357_upmu_set_rg_pwrkey_int_sel | |
| ffffff800858eb88 T mt6357_upmu_set_rg_chrdet_int_sel | |
| ffffff800858ebb0 T mt6357_upmu_set_rg_pchr_cm_vinc_polarity_rsv | |
| ffffff800858ebd8 T mt6357_upmu_set_rg_pchr_cm_vdec_polarity_rsv | |
| ffffff800858ec00 T mt6357_upmu_set_rg_psc_mon_grp_sel | |
| ffffff800858ec28 T mt6357_upmu_get_strup_ana_id | |
| ffffff800858ec88 T mt6357_upmu_get_strup_dig_id | |
| ffffff800858ece8 T mt6357_upmu_get_strup_ana_minor_rev | |
| ffffff800858ed48 T mt6357_upmu_get_strup_ana_major_rev | |
| ffffff800858eda8 T mt6357_upmu_get_strup_dig_minor_rev | |
| ffffff800858ee08 T mt6357_upmu_get_strup_dig_major_rev | |
| ffffff800858ee68 T mt6357_upmu_get_strup_cbs | |
| ffffff800858eec8 T mt6357_upmu_get_strup_bix | |
| ffffff800858ef28 T mt6357_upmu_get_strup_esp | |
| ffffff800858ef88 T mt6357_upmu_get_strup_fpi | |
| ffffff800858efe8 T mt6357_upmu_set_rg_tm_out | |
| ffffff800858f010 T mt6357_upmu_set_rg_thrdet_sel | |
| ffffff800858f038 T mt6357_upmu_set_rg_strup_thr_sel | |
| ffffff800858f060 T mt6357_upmu_set_rg_thr_tmode | |
| ffffff800858f088 T mt6357_upmu_set_rg_vref_bg | |
| ffffff800858f0b0 T mt6357_upmu_set_rg_rst_drvsel | |
| ffffff800858f0d8 T mt6357_upmu_set_rg_en1_drvsel | |
| ffffff800858f100 T mt6357_upmu_set_rg_en2_drvsel | |
| ffffff800858f128 T mt6357_upmu_set_rg_pmu_rsv | |
| ffffff800858f150 T mt6357_upmu_get_rgs_ana_chip_id | |
| ffffff800858f1b0 T mt6357_upmu_set_rg_fchr_pu_en | |
| ffffff800858f1d8 T mt6357_upmu_get_rg_fchr_pu_en | |
| ffffff800858f238 T mt6357_upmu_set_rg_fchr_keydet_en | |
| ffffff800858f260 T mt6357_upmu_get_rg_fchr_keydet_en | |
| ffffff800858f2c0 T mt6357_upmu_get_strup_elr_len | |
| ffffff800858f320 T mt6357_upmu_set_rg_strup_iref_trim | |
| ffffff800858f348 T mt6357_upmu_set_rg_thr_loc_sel | |
| ffffff800858f370 T mt6357_upmu_get_pseq_ana_id | |
| ffffff800858f3d0 T mt6357_upmu_get_pseq_dig_id | |
| ffffff800858f430 T mt6357_upmu_get_pseq_ana_minor_rev | |
| ffffff800858f490 T mt6357_upmu_get_pseq_ana_major_rev | |
| ffffff800858f4f0 T mt6357_upmu_get_pseq_dig_major_rev | |
| ffffff800858f550 T mt6357_upmu_get_pseq_cbs | |
| ffffff800858f5b0 T mt6357_upmu_get_pseq_bix | |
| ffffff800858f610 T mt6357_upmu_get_pseq_esp | |
| ffffff800858f670 T mt6357_upmu_get_pseq_fpi | |
| ffffff800858f6d0 T mt6357_upmu_set_rg_pwrhold | |
| ffffff800858f6f8 T mt6357_upmu_set_rg_usbdl_mode | |
| ffffff800858f720 T mt6357_upmu_set_rg_crst | |
| ffffff800858f748 T mt6357_upmu_set_rg_wrst | |
| ffffff800858f770 T mt6357_upmu_set_rg_rstb_onintv | |
| ffffff800858f798 T mt6357_upmu_set_rg_crst_intv | |
| ffffff800858f7c0 T mt6357_upmu_set_rg_wrst_intv | |
| ffffff800858f7e8 T mt6357_upmu_set_rg_pseq_pg_ck_sel | |
| ffffff800858f810 T mt6357_upmu_set_rg_pseq_spar_xcpt_mask | |
| ffffff800858f838 T mt6357_upmu_set_rg_pseq_rtca_xcpt_mask | |
| ffffff800858f860 T mt6357_upmu_set_rg_thm_shdn_en | |
| ffffff800858f888 T mt6357_upmu_get_rg_thm_shdn_en | |
| ffffff800858f8e8 T mt6357_upmu_set_rg_wdtrst_en | |
| ffffff800858f910 T mt6357_upmu_get_rg_wdtrst_en | |
| ffffff800858f970 T mt6357_upmu_set_rg_wdtrst_act | |
| ffffff800858f998 T mt6357_upmu_set_rg_keypwr_vcore_opt | |
| ffffff800858f9c0 T mt6357_upmu_set_rg_pseq_force_on | |
| ffffff800858f9e8 T mt6357_upmu_set_rg_pseq_force_all_doff | |
| ffffff800858fa10 T mt6357_upmu_set_rg_por_flag | |
| ffffff800858fa38 T mt6357_upmu_get_usbdl | |
| ffffff800858fa98 T mt6357_upmu_set_rg_thr_test | |
| ffffff800858fac0 T mt6357_upmu_set_rg_strup_ther_deb_rtd | |
| ffffff800858fae8 T mt6357_upmu_set_rg_strup_ther_deb_ftd | |
| ffffff800858fb10 T mt6357_upmu_set_dduvlo_deb_en | |
| ffffff800858fb38 T mt6357_upmu_set_rg_strup_pg_deb_mode | |
| ffffff800858fb60 T mt6357_upmu_set_rg_strup_osc_en | |
| ffffff800858fb88 T mt6357_upmu_get_rg_strup_osc_en | |
| ffffff800858fbe8 T mt6357_upmu_set_rg_strup_osc_en_sel | |
| ffffff800858fc10 T mt6357_upmu_get_rg_strup_osc_en_sel | |
| ffffff800858fc70 T mt6357_upmu_set_rg_strup_ft_ctrl | |
| ffffff800858fc98 T mt6357_upmu_set_rg_strup_pwron_force | |
| ffffff800858fcc0 T mt6357_upmu_set_rg_biasgen_force | |
| ffffff800858fce8 T mt6357_upmu_set_rg_strup_pwron | |
| ffffff800858fd10 T mt6357_upmu_set_rg_strup_pwron_sel | |
| ffffff800858fd38 T mt6357_upmu_set_rg_biasgen | |
| ffffff800858fd60 T mt6357_upmu_set_rg_biasgen_sel | |
| ffffff800858fd88 T mt6357_upmu_set_rg_rtc_xosc32_enb | |
| ffffff800858fdb0 T mt6357_upmu_get_rg_rtc_xosc32_enb | |
| ffffff800858fe10 T mt6357_upmu_set_rg_rtc_xosc32_enb_sel | |
| ffffff800858fe38 T mt6357_upmu_get_rg_rtc_xosc32_enb_sel | |
| ffffff800858fe98 T mt6357_upmu_set_strup_dig_io_pg_force | |
| ffffff800858fec0 T mt6357_upmu_set_rg_clr_just_smart_rst | |
| ffffff800858fee8 T mt6357_upmu_set_clr_just_rst | |
| ffffff800858ff10 T mt6357_upmu_get_just_smart_rst | |
| ffffff800858ff70 T mt6357_upmu_get_just_pwrkey_rst | |
| ffffff800858ffd0 T mt6357_upmu_get_da_qi_osc_en | |
| ffffff8008590030 T mt6357_upmu_set_rg_strup_ext_pmic_en | |
| ffffff8008590058 T mt6357_upmu_get_rg_strup_ext_pmic_en | |
| ffffff80085900b8 T mt6357_upmu_set_rg_strup_ext_pmic_sel | |
| ffffff80085900e0 T mt6357_upmu_get_da_ext_pmic_en1 | |
| ffffff8008590140 T mt6357_upmu_get_da_ext_pmic_en2 | |
| ffffff80085901a0 T mt6357_upmu_set_rg_strup_auxadc_start_sw | |
| ffffff80085901c8 T mt6357_upmu_set_rg_strup_auxadc_rstb_sw | |
| ffffff80085901f0 T mt6357_upmu_set_rg_strup_auxadc_start_sel | |
| ffffff8008590218 T mt6357_upmu_set_rg_strup_auxadc_rstb_sel | |
| ffffff8008590240 T mt6357_upmu_set_rg_strup_auxadc_rpcnt_max | |
| ffffff8008590268 T mt6357_upmu_set_strup_pwroff_seq_en | |
| ffffff8008590290 T mt6357_upmu_set_strup_pwroff_preoff_en | |
| ffffff80085902b8 T mt6357_upmu_set_rg_slot_intv_down_msb | |
| ffffff80085902e0 T mt6357_upmu_set_rg_rsv_swreg | |
| ffffff8008590308 T mt6357_upmu_set_rg_strup_uvlo_u1u2_sel | |
| ffffff8008590330 T mt6357_upmu_set_rg_strup_uvlo_u1u2_sel_swctrl | |
| ffffff8008590358 T mt6357_upmu_set_rg_uvlo_dec_en | |
| ffffff8008590380 T mt6357_upmu_get_rg_uvlo_dec_en | |
| ffffff80085903e0 T mt6357_upmu_set_rg_strup_thr_clr | |
| ffffff8008590408 T mt6357_upmu_set_rg_strup_long_press_ext_sel | |
| ffffff8008590430 T mt6357_upmu_set_rg_strup_long_press_ext_td | |
| ffffff8008590458 T mt6357_upmu_set_rg_strup_long_press_ext_en | |
| ffffff8008590480 T mt6357_upmu_get_rg_strup_long_press_ext_en | |
| ffffff80085904e0 T mt6357_upmu_set_rg_strup_long_press_ext_chr_ctrl | |
| ffffff8008590508 T mt6357_upmu_set_rg_strup_long_press_ext_pwrkey_ctrl | |
| ffffff8008590530 T mt6357_upmu_set_rg_strup_long_press_ext_spar_ctrl | |
| ffffff8008590558 T mt6357_upmu_set_rg_strup_long_press_ext_rtca_ctrl | |
| ffffff8008590580 T mt6357_upmu_set_rg_smart_rst_sdn_en | |
| ffffff80085905a8 T mt6357_upmu_get_rg_smart_rst_sdn_en | |
| ffffff8008590608 T mt6357_upmu_set_rg_smart_rst_mode | |
| ffffff8008590630 T mt6357_upmu_set_rg_strup_envtem | |
| ffffff8008590658 T mt6357_upmu_get_rg_strup_envtem | |
| ffffff80085906b8 T mt6357_upmu_set_rg_strup_envtem_ctrl | |
| ffffff80085906e0 T mt6357_upmu_get_rg_strup_envtem_ctrl | |
| ffffff8008590740 T mt6357_upmu_set_rg_strup_pwrkey_count_reset | |
| ffffff8008590768 T mt6357_upmu_set_rg_strup_ext_pmic_pg_h2l_en | |
| ffffff8008590790 T mt6357_upmu_get_rg_strup_ext_pmic_pg_h2l_en | |
| ffffff80085907f0 T mt6357_upmu_set_rg_strup_vaud28_pg_h2l_en | |
| ffffff8008590818 T mt6357_upmu_get_rg_strup_vaud28_pg_h2l_en | |
| ffffff8008590878 T mt6357_upmu_set_rg_strup_vusb33_pg_h2l_en | |
| ffffff80085908a0 T mt6357_upmu_get_rg_strup_vusb33_pg_h2l_en | |
| ffffff8008590900 T mt6357_upmu_set_rg_strup_vdram_pg_h2l_en | |
| ffffff8008590928 T mt6357_upmu_get_rg_strup_vdram_pg_h2l_en | |
| ffffff8008590988 T mt6357_upmu_set_rg_strup_vemc_pg_h2l_en | |
| ffffff80085909b0 T mt6357_upmu_get_rg_strup_vemc_pg_h2l_en | |
| ffffff8008590a10 T mt6357_upmu_set_rg_strup_vsram_proc_pg_h2l_en | |
| ffffff8008590a38 T mt6357_upmu_get_rg_strup_vsram_proc_pg_h2l_en | |
| ffffff8008590a98 T mt6357_upmu_set_rg_strup_vsram_others_pg_h2l_en | |
| ffffff8008590ac0 T mt6357_upmu_get_rg_strup_vsram_others_pg_h2l_en | |
| ffffff8008590b20 T mt6357_upmu_set_rg_strup_vaux18_pg_h2l_en | |
| ffffff8008590b48 T mt6357_upmu_get_rg_strup_vaux18_pg_h2l_en | |
| ffffff8008590ba8 T mt6357_upmu_set_rg_strup_vproc_pg_h2l_en | |
| ffffff8008590bd0 T mt6357_upmu_get_rg_strup_vproc_pg_h2l_en | |
| ffffff8008590c30 T mt6357_upmu_set_rg_strup_vmodem_pg_h2l_en | |
| ffffff8008590c58 T mt6357_upmu_get_rg_strup_vmodem_pg_h2l_en | |
| ffffff8008590cb8 T mt6357_upmu_set_rg_strup_vcore_pg_h2l_en | |
| ffffff8008590ce0 T mt6357_upmu_get_rg_strup_vcore_pg_h2l_en | |
| ffffff8008590d40 T mt6357_upmu_set_rg_strup_vs1_pg_h2l_en | |
| ffffff8008590d68 T mt6357_upmu_get_rg_strup_vs1_pg_h2l_en | |
| ffffff8008590dc8 T mt6357_upmu_set_rg_strup_ext_pmic_pg_enb | |
| ffffff8008590df0 T mt6357_upmu_get_rg_strup_ext_pmic_pg_enb | |
| ffffff8008590e50 T mt6357_upmu_set_rg_strup_vaud28_pg_enb | |
| ffffff8008590e78 T mt6357_upmu_get_rg_strup_vaud28_pg_enb | |
| ffffff8008590ed8 T mt6357_upmu_set_rg_strup_vusb33_pg_enb | |
| ffffff8008590f00 T mt6357_upmu_get_rg_strup_vusb33_pg_enb | |
| ffffff8008590f60 T mt6357_upmu_set_rg_strup_vdram_pg_enb | |
| ffffff8008590f88 T mt6357_upmu_get_rg_strup_vdram_pg_enb | |
| ffffff8008590fe8 T mt6357_upmu_set_rg_strup_vio28_pg_enb | |
| ffffff8008591010 T mt6357_upmu_get_rg_strup_vio28_pg_enb | |
| ffffff8008591070 T mt6357_upmu_set_rg_strup_vemc_pg_enb | |
| ffffff8008591098 T mt6357_upmu_get_rg_strup_vemc_pg_enb | |
| ffffff80085910f8 T mt6357_upmu_set_rg_strup_vio18_pg_enb | |
| ffffff8008591120 T mt6357_upmu_get_rg_strup_vio18_pg_enb | |
| ffffff8008591180 T mt6357_upmu_set_rg_strup_vsram_proc_pg_enb | |
| ffffff80085911a8 T mt6357_upmu_get_rg_strup_vsram_proc_pg_enb | |
| ffffff8008591208 T mt6357_upmu_set_rg_strup_vsram_others_pg_enb | |
| ffffff8008591230 T mt6357_upmu_get_rg_strup_vsram_others_pg_enb | |
| ffffff8008591290 T mt6357_upmu_set_rg_strup_vaux18_pg_enb | |
| ffffff80085912b8 T mt6357_upmu_get_rg_strup_vaux18_pg_enb | |
| ffffff8008591318 T mt6357_upmu_set_rg_strup_vxo22_pg_enb | |
| ffffff8008591340 T mt6357_upmu_get_rg_strup_vxo22_pg_enb | |
| ffffff80085913a0 T mt6357_upmu_set_rg_strup_vproc_pg_enb | |
| ffffff80085913c8 T mt6357_upmu_get_rg_strup_vproc_pg_enb | |
| ffffff8008591428 T mt6357_upmu_set_rg_strup_vmodem_pg_enb | |
| ffffff8008591450 T mt6357_upmu_get_rg_strup_vmodem_pg_enb | |
| ffffff80085914b0 T mt6357_upmu_set_rg_strup_vcore_pg_enb | |
| ffffff80085914d8 T mt6357_upmu_get_rg_strup_vcore_pg_enb | |
| ffffff8008591538 T mt6357_upmu_set_rg_strup_vs1_pg_enb | |
| ffffff8008591560 T mt6357_upmu_get_rg_strup_vs1_pg_enb | |
| ffffff80085915c0 T mt6357_upmu_set_rg_strup_vproc_oc_enb | |
| ffffff80085915e8 T mt6357_upmu_get_rg_strup_vproc_oc_enb | |
| ffffff8008591648 T mt6357_upmu_set_rg_strup_vmodem_oc_enb | |
| ffffff8008591670 T mt6357_upmu_get_rg_strup_vmodem_oc_enb | |
| ffffff80085916d0 T mt6357_upmu_set_rg_strup_vcore_oc_enb | |
| ffffff80085916f8 T mt6357_upmu_get_rg_strup_vcore_oc_enb | |
| ffffff8008591758 T mt6357_upmu_set_rg_strup_vs1_oc_enb | |
| ffffff8008591780 T mt6357_upmu_get_rg_strup_vs1_oc_enb | |
| ffffff80085917e0 T mt6357_upmu_set_rg_ext_pmic_pg_debtd | |
| ffffff8008591808 T mt6357_upmu_set_rg_rtc_spar_deb_en | |
| ffffff8008591830 T mt6357_upmu_get_rg_rtc_spar_deb_en | |
| ffffff8008591890 T mt6357_upmu_set_rg_rtc_alarm_deb_en | |
| ffffff80085918b8 T mt6357_upmu_get_rg_rtc_alarm_deb_en | |
| ffffff8008591918 T mt6357_upmu_get_pseq_elr_len | |
| ffffff8008591978 T mt6357_upmu_set_rg_bwdt_en | |
| ffffff80085919a0 T mt6357_upmu_get_rg_bwdt_en | |
| ffffff8008591a00 T mt6357_upmu_set_rg_bwdt_tsel | |
| ffffff8008591a28 T mt6357_upmu_set_rg_bwdt_csel | |
| ffffff8008591a50 T mt6357_upmu_set_rg_bwdt_td | |
| ffffff8008591a78 T mt6357_upmu_set_rg_bwdt_chrtd | |
| ffffff8008591aa0 T mt6357_upmu_set_rg_bwdt_ddlo_td | |
| ffffff8008591ac8 T mt6357_upmu_set_rg_bwdt_srcsel | |
| ffffff8008591af0 T mt6357_upmu_set_rg_pspg_shdn_en | |
| ffffff8008591b18 T mt6357_upmu_get_rg_pspg_shdn_en | |
| ffffff8008591b78 T mt6357_upmu_set_rg_pseq_fsm_rst_sel | |
| ffffff8008591ba0 T mt6357_upmu_set_rg_pseq_f75k_force | |
| ffffff8008591bc8 T mt6357_upmu_set_rg_pseq_1ms_tk_ext | |
| ffffff8008591bf0 T mt6357_upmu_set_rg_pseq_ivgen_sel | |
| ffffff8008591c18 T mt6357_upmu_set_rg_strup_long_press_reset_extend | |
| ffffff8008591c40 T mt6357_upmu_set_rg_cps_s0ext_enb | |
| ffffff8008591c68 T mt6357_upmu_get_rg_cps_s0ext_enb | |
| ffffff8008591cc8 T mt6357_upmu_set_rg_cps_s0ext_td | |
| ffffff8008591cf0 T mt6357_upmu_set_rg_sdn_dly_enb | |
| ffffff8008591d18 T mt6357_upmu_get_rg_sdn_dly_enb | |
| ffffff8008591d78 T mt6357_upmu_set_rg_chrdet_deb_td | |
| ffffff8008591da0 T mt6357_upmu_set_rg_strup_uvlo_u1u2_sel_old | |
| ffffff8008591dc8 T mt6357_upmu_set_efuse_ivgen_enb_sel | |
| ffffff8008591df0 T mt6357_upmu_set_rg_dseq_sel | |
| ffffff8008591e18 T mt6357_upmu_set_rg_pseq_elr_rsv | |
| ffffff8008591e40 T mt6357_upmu_get_pchr_dig_ana_id | |
| ffffff8008591ea0 T mt6357_upmu_get_pchr_dig_dig_id | |
| ffffff8008591f00 T mt6357_upmu_get_pchr_dig_ana_minor_rev | |
| ffffff8008591f60 T mt6357_upmu_get_pchr_dig_ana_major_rev | |
| ffffff8008591fc0 T mt6357_upmu_get_pchr_dig_dig_minor_rev | |
| ffffff8008592020 T mt6357_upmu_get_pchr_dig_dig_major_rev | |
| ffffff8008592080 T mt6357_upmu_get_pchr_dig_dsn_cbs | |
| ffffff80085920e0 T mt6357_upmu_get_pchr_dig_dsn_bix | |
| ffffff8008592140 T mt6357_upmu_get_pchr_dig_dsn_esp | |
| ffffff80085921a0 T mt6357_upmu_get_pchr_dig_dsn_fpi | |
| ffffff8008592200 T mt6357_upmu_get_rgs_chrwdt_out | |
| ffffff8008592260 T mt6357_upmu_get_rgs_otg_bvalid_det | |
| ffffff80085922c0 T mt6357_upmu_get_rgs_vbat_ov_det | |
| ffffff8008592320 T mt6357_upmu_get_rgs_chr_ldo_det | |
| ffffff8008592380 T mt6357_upmu_get_rgs_chrdet | |
| ffffff80085923e0 T mt6357_upmu_set_rg_pchr_rv | |
| ffffff8008592408 T mt6357_upmu_set_rg_vcdt_uvlo_en | |
| ffffff8008592430 T mt6357_upmu_get_rg_vcdt_uvlo_en | |
| ffffff8008592490 T mt6357_upmu_set_rg_vcdt_uvlo_vth | |
| ffffff80085924b8 T mt6357_upmu_set_rg_uvlo_vthl | |
| ffffff80085924e0 T mt6357_upmu_set_rg_uvlo_vh_lat | |
| ffffff8008592508 T mt6357_upmu_set_rg_vcdt_mode | |
| ffffff8008592530 T mt6357_upmu_set_rg_vcdt_lv_vth | |
| ffffff8008592558 T mt6357_upmu_set_rg_vcdt_hv_vth | |
| ffffff8008592580 T mt6357_upmu_set_rg_vbat_ov_vth | |
| ffffff80085925a8 T mt6357_upmu_set_da_qi_bgr_ext_buf_en | |
| ffffff80085925d0 T mt6357_upmu_set_rg_bgr_test_en | |
| ffffff80085925f8 T mt6357_upmu_get_rg_bgr_test_en | |
| ffffff8008592658 T mt6357_upmu_set_rg_bgr_test_rstb | |
| ffffff8008592680 T mt6357_upmu_set_rg_bgr_unchop_ph | |
| ffffff80085926a8 T mt6357_upmu_set_rg_bgr_unchop | |
| ffffff80085926d0 T mt6357_upmu_set_rg_vbat_cv_vth | |
| ffffff80085926f8 T mt6357_upmu_set_rg_pchr_ft_ctrl | |
| ffffff8008592720 T mt6357_upmu_set_rg_pchr_flag_en | |
| ffffff8008592748 T mt6357_upmu_get_rg_pchr_flag_en | |
| ffffff80085927a8 T mt6357_upmu_set_rg_pchr_flag_sel | |
| ffffff80085927d0 T mt6357_upmu_set_rg_lbat_int_vth | |
| ffffff80085927f8 T mt6357_upmu_set_rg_otg_bvalid_en | |
| ffffff8008592820 T mt6357_upmu_get_rg_otg_bvalid_en | |
| ffffff8008592880 T mt6357_upmu_get_pchr_dig_elr_len | |
| ffffff80085928e0 T mt6357_upmu_set_rg_ichrg_trim | |
| ffffff8008592908 T mt6357_upmu_set_rg_ovp_trim | |
| ffffff8008592930 T mt6357_upmu_set_rg_bgr_trim | |
| ffffff8008592958 T mt6357_upmu_set_rg_pchr_spare_elr0 | |
| ffffff8008592980 T mt6357_upmu_set_rg_vbat_cv_trim | |
| ffffff80085929a8 T mt6357_upmu_set_rg_pchr_spare_elr1 | |
| ffffff80085929d0 T mt6357_upmu_set_rg_cs_vth | |
| ffffff80085929f8 T mt6357_upmu_set_rg_cs_en | |
| ffffff8008592a20 T mt6357_upmu_get_rg_cs_en | |
| ffffff8008592a80 T mt6357_upmu_set_rg_vbat_ov_en | |
| ffffff8008592aa8 T mt6357_upmu_get_rg_vbat_ov_en | |
| ffffff8008592b08 T mt6357_upmu_set_rg_vbat_ov_deg | |
| ffffff8008592b30 T mt6357_upmu_set_rg_vbat_cv_en | |
| ffffff8008592b58 T mt6357_upmu_get_rg_vbat_cv_en | |
| ffffff8008592bb8 T mt6357_upmu_set_rg_vbat_cc_vth | |
| ffffff8008592be0 T mt6357_upmu_set_rg_vbat_cc_en | |
| ffffff8008592c08 T mt6357_upmu_get_rg_vbat_cc_en | |
| ffffff8008592c68 T mt6357_upmu_set_rg_vcdt_hv_en | |
| ffffff8008592c90 T mt6357_upmu_get_rg_vcdt_hv_en | |
| ffffff8008592cf0 T mt6357_upmu_set_rg_low_ich_db | |
| ffffff8008592d18 T mt6357_upmu_set_rg_cv_mode | |
| ffffff8008592d40 T mt6357_upmu_set_rg_csdac_mode | |
| ffffff8008592d68 T mt6357_upmu_set_rg_tracking_en | |
| ffffff8008592d90 T mt6357_upmu_get_rg_tracking_en | |
| ffffff8008592df0 T mt6357_upmu_set_rg_hwcv_en | |
| ffffff8008592e18 T mt6357_upmu_get_rg_hwcv_en | |
| ffffff8008592e78 T mt6357_upmu_set_rg_ulc_det_en | |
| ffffff8008592ea0 T mt6357_upmu_get_rg_ulc_det_en | |
| ffffff8008592f00 T mt6357_upmu_set_rg_csdac_en | |
| ffffff8008592f28 T mt6357_upmu_get_rg_csdac_en | |
| ffffff8008592f88 T mt6357_upmu_set_rg_chr_en | |
| ffffff8008592fb0 T mt6357_upmu_get_rg_chr_en | |
| ffffff8008593010 T mt6357_upmu_get_rgs_cs_det | |
| ffffff8008593070 T mt6357_upmu_get_rgs_vbat_cv_det | |
| ffffff80085930d0 T mt6357_upmu_get_rgs_vbat_cc_det | |
| ffffff8008593130 T mt6357_upmu_get_rgs_vcdt_lv_det | |
| ffffff8008593190 T mt6357_upmu_get_rgs_vcdt_hv_det | |
| ffffff80085931f0 T mt6357_upmu_set_rg_csdac_dly | |
| ffffff8008593218 T mt6357_upmu_set_rg_csdac_stp | |
| ffffff8008593240 T mt6357_upmu_set_rg_csdac_stp_inc | |
| ffffff8008593268 T mt6357_upmu_set_rg_csdac_stp_dec | |
| ffffff8008593290 T mt6357_upmu_set_rg_pchr_tohtc | |
| ffffff80085932b8 T mt6357_upmu_set_rg_pchr_toltc | |
| ffffff80085932e0 T mt6357_upmu_set_rg_csdac_data | |
| ffffff8008593308 T mt6357_upmu_set_rg_frc_csvth_usbdl | |
| ffffff8008593330 T mt6357_upmu_set_rg_usbdl_rst | |
| ffffff8008593358 T mt6357_upmu_set_rg_usbdl_set | |
| ffffff8008593380 T mt6357_upmu_set_rg_dac_usbdl_max | |
| ffffff80085933a8 T mt6357_upmu_get_rgs_pchr_flag_out | |
| ffffff8008593408 T mt6357_upmu_set_rg_pchr_testmode | |
| ffffff8008593430 T mt6357_upmu_set_rg_csdac_testmode | |
| ffffff8008593458 T mt6357_upmu_set_rg_pchr_rst | |
| ffffff8008593480 T mt6357_upmu_set_rg_bc11_vref_vth | |
| ffffff80085934a8 T mt6357_upmu_set_rg_bc11_cmp_en | |
| ffffff80085934d0 T mt6357_upmu_get_rg_bc11_cmp_en | |
| ffffff8008593530 T mt6357_upmu_set_rg_bc11_ipd_en | |
| ffffff8008593558 T mt6357_upmu_get_rg_bc11_ipd_en | |
| ffffff80085935b8 T mt6357_upmu_set_rg_bc11_ipu_en | |
| ffffff80085935e0 T mt6357_upmu_get_rg_bc11_ipu_en | |
| ffffff8008593640 T mt6357_upmu_set_rg_bc11_bias_en | |
| ffffff8008593668 T mt6357_upmu_get_rg_bc11_bias_en | |
| ffffff80085936c8 T mt6357_upmu_set_rg_bc11_bb_ctrl | |
| ffffff80085936f0 T mt6357_upmu_set_rg_bc11_rst | |
| ffffff8008593718 T mt6357_upmu_set_rg_bc11_vsrc_en | |
| ffffff8008593740 T mt6357_upmu_get_rg_bc11_vsrc_en | |
| ffffff80085937a0 T mt6357_upmu_set_rg_bc11_dcd_en | |
| ffffff80085937c8 T mt6357_upmu_get_rg_bc11_dcd_en | |
| ffffff8008593828 T mt6357_upmu_get_rgs_bc11_cmp_out | |
| ffffff8008593888 T mt6357_upmu_set_rg_envtem_d | |
| ffffff80085938b0 T mt6357_upmu_set_rg_chrwdt_td | |
| ffffff80085938d8 T mt6357_upmu_set_rg_chrwdt_en | |
| ffffff8008593900 T mt6357_upmu_get_rg_chrwdt_en | |
| ffffff8008593960 T mt6357_upmu_set_rg_fgadc_ft_ck_pdn | |
| ffffff8008593988 T mt6357_upmu_set_rg_fgadc_dig_ck_pdn | |
| ffffff80085939b0 T mt6357_upmu_set_rg_fgadc_ana_ck_pdn | |
| ffffff80085939d8 T mt6357_upmu_set_rg_bm_intrp_ck_pdn | |
| ffffff8008593a00 T mt6357_upmu_set_rg_fgadc_ana_ck_cksel | |
| ffffff8008593a28 T mt6357_upmu_set_rg_fg_ck_tstsel | |
| ffffff8008593a50 T mt6357_upmu_set_rg_fgadc_ana_ck_tstsel | |
| ffffff8008593a78 T mt6357_upmu_set_rg_fg_ck_tst_dis | |
| ffffff8008593aa0 T mt6357_upmu_set_rg_fgadc_swrst | |
| ffffff8008593ac8 T mt6357_upmu_set_rg_bank_fgadc_ana_swrst | |
| ffffff8008593af0 T mt6357_upmu_set_rg_bank_fgadc0_swrst | |
| ffffff8008593b18 T mt6357_upmu_set_rg_bank_fgadc1_swrst | |
| ffffff8008593b40 T mt6357_upmu_set_rg_bank_baton_ana_swrst | |
| ffffff8008593b68 T mt6357_upmu_set_rg_int_en_fg_bat0_h | |
| ffffff8008593b90 T mt6357_upmu_get_rg_int_en_fg_bat0_h | |
| ffffff8008593bf0 T mt6357_upmu_set_rg_int_en_fg_bat0_l | |
| ffffff8008593c18 T mt6357_upmu_get_rg_int_en_fg_bat0_l | |
| ffffff8008593c78 T mt6357_upmu_set_rg_int_en_fg_cur_h | |
| ffffff8008593ca0 T mt6357_upmu_get_rg_int_en_fg_cur_h | |
| ffffff8008593d00 T mt6357_upmu_set_rg_int_en_fg_cur_l | |
| ffffff8008593d28 T mt6357_upmu_get_rg_int_en_fg_cur_l | |
| ffffff8008593d88 T mt6357_upmu_set_rg_int_en_fg_zcv | |
| ffffff8008593db0 T mt6357_upmu_get_rg_int_en_fg_zcv | |
| ffffff8008593e10 T mt6357_upmu_set_rg_int_en_baton_lv | |
| ffffff8008593e38 T mt6357_upmu_get_rg_int_en_baton_lv | |
| ffffff8008593e98 T mt6357_upmu_set_rg_int_en_baton_ht | |
| ffffff8008593ec0 T mt6357_upmu_get_rg_int_en_baton_ht | |
| ffffff8008593f20 T mt6357_upmu_set_rg_int_mask_fg_bat0_h | |
| ffffff8008593f48 T mt6357_upmu_set_rg_int_mask_fg_bat0_l | |
| ffffff8008593f70 T mt6357_upmu_set_rg_int_mask_fg_cur_h | |
| ffffff8008593f98 T mt6357_upmu_set_rg_int_mask_fg_cur_l | |
| ffffff8008593fc0 T mt6357_upmu_set_rg_int_mask_fg_zcv | |
| ffffff8008593fe8 T mt6357_upmu_set_rg_int_mask_baton_lv | |
| ffffff8008594010 T mt6357_upmu_set_rg_int_mask_baton_ht | |
| ffffff8008594038 T mt6357_upmu_get_rg_int_raw_status_fg_bat0_h | |
| ffffff8008594098 T mt6357_upmu_get_rg_int_raw_status_fg_bat0_l | |
| ffffff80085940f8 T mt6357_upmu_get_rg_int_raw_status_fg_cur_h | |
| ffffff8008594158 T mt6357_upmu_get_rg_int_raw_status_fg_cur_l | |
| ffffff80085941b8 T mt6357_upmu_get_rg_int_raw_status_fg_zcv | |
| ffffff8008594218 T mt6357_upmu_get_rg_int_raw_status_baton_lv | |
| ffffff8008594278 T mt6357_upmu_get_rg_int_raw_status_baton_ht | |
| ffffff80085942d8 T mt6357_upmu_set_polarity | |
| ffffff8008594300 T mt6357_upmu_set_bm_int_misc_con_rsv | |
| ffffff8008594328 T mt6357_upmu_set_rg_bm_mon_flag_sel | |
| ffffff8008594350 T mt6357_upmu_set_rg_bm_mon_grp_sel | |
| ffffff8008594378 T mt6357_upmu_set_rg_bm_top_rsv0 | |
| ffffff80085943a0 T mt6357_upmu_set_rg_fganalogtest | |
| ffffff80085943c8 T mt6357_upmu_set_rg_fgintmode | |
| ffffff80085943f0 T mt6357_upmu_set_rg_spare | |
| ffffff8008594418 T mt6357_upmu_set_fg_dwa_t0 | |
| ffffff8008594440 T mt6357_upmu_set_fg_dwa_t1 | |
| ffffff8008594468 T mt6357_upmu_set_fg_dwa_rst_mode | |
| ffffff8008594490 T mt6357_upmu_set_fg_dwa_rst_sw | |
| ffffff80085944b8 T mt6357_upmu_get_da_dwa_rst | |
| ffffff8008594518 T mt6357_upmu_set_rg_fgadc_gainerror_cal | |
| ffffff8008594540 T mt6357_upmu_set_rg_fg_offset_swap | |
| ffffff8008594568 T mt6357_upmu_set_fg_on | |
| ffffff8008594590 T mt6357_upmu_set_fg_cal | |
| ffffff80085945b8 T mt6357_upmu_set_fg_autocalrate | |
| ffffff80085945e0 T mt6357_upmu_set_fg_son_slp_en | |
| ffffff8008594608 T mt6357_upmu_set_fg_zcv_det_en | |
| ffffff8008594630 T mt6357_upmu_set_fg_auxadc_r | |
| ffffff8008594658 T mt6357_upmu_set_fg_sw_read_pre | |
| ffffff8008594680 T mt6357_upmu_set_fg_sw_rstclr | |
| ffffff80085946a8 T mt6357_upmu_set_fg_sw_cr | |
| ffffff80085946d0 T mt6357_upmu_set_fg_sw_clear | |
| ffffff80085946f8 T mt6357_upmu_set_fg_offset_rst | |
| ffffff8008594720 T mt6357_upmu_set_fg_time_rst | |
| ffffff8008594748 T mt6357_upmu_set_fg_charge_rst | |
| ffffff8008594770 T mt6357_upmu_get_fg_latchdata_st | |
| ffffff80085947d0 T mt6357_upmu_get_event_fg_bat0_h | |
| ffffff8008594830 T mt6357_upmu_get_event_fg_bat0_l | |
| ffffff8008594890 T mt6357_upmu_get_event_fg_cur_h | |
| ffffff80085948f0 T mt6357_upmu_get_event_fg_cur_l | |
| ffffff8008594950 T mt6357_upmu_get_event_fg_zcv | |
| ffffff80085949b0 T mt6357_upmu_set_fg_osr1 | |
| ffffff80085949d8 T mt6357_upmu_set_fg_adj_offset_en | |
| ffffff8008594a00 T mt6357_upmu_set_fg_adc_autorst | |
| ffffff8008594a28 T mt6357_upmu_get_fg_adc_rstdetect | |
| ffffff8008594a88 T mt6357_upmu_get_fg_car_15_00 | |
| ffffff8008594ae8 T mt6357_upmu_get_fg_car_31_16 | |
| ffffff8008594b48 T mt6357_upmu_get_fg_car_34_32 | |
| ffffff8008594ba8 T mt6357_upmu_set_fg_bat0_lth_15_00 | |
| ffffff8008594bd0 T mt6357_upmu_set_fg_bat0_lth_31_16 | |
| ffffff8008594bf8 T mt6357_upmu_set_fg_bat0_hth_15_00 | |
| ffffff8008594c20 T mt6357_upmu_set_fg_bat0_hth_31_16 | |
| ffffff8008594c48 T mt6357_upmu_get_fg_nter_15_00 | |
| ffffff8008594ca8 T mt6357_upmu_get_fg_nter_31_16 | |
| ffffff8008594d08 T mt6357_upmu_get_fg_nter_32 | |
| ffffff8008594d68 T mt6357_upmu_set_fg_son_slp_cur_th | |
| ffffff8008594d90 T mt6357_upmu_set_fg_son_slp_time | |
| ffffff8008594db8 T mt6357_upmu_set_fg_son_det_time | |
| ffffff8008594de0 T mt6357_upmu_set_fg_fp_ftime | |
| ffffff8008594e08 T mt6357_upmu_set_fg_zcv_det_time | |
| ffffff8008594e30 T mt6357_upmu_get_fg_zcv_curr | |
| ffffff8008594e90 T mt6357_upmu_get_fg_zcv_car_15_00 | |
| ffffff8008594ef0 T mt6357_upmu_get_fg_zcv_car_31_16 | |
| ffffff8008594f50 T mt6357_upmu_get_fg_zcv_car_34_32 | |
| ffffff8008594fb0 T mt6357_upmu_set_fg_zcv_car_th_15_00 | |
| ffffff8008594fd8 T mt6357_upmu_set_fg_zcv_car_th_31_16 | |
| ffffff8008595000 T mt6357_upmu_set_fg_zcv_car_th_33_32 | |
| ffffff8008595028 T mt6357_upmu_get_fg_r_curr | |
| ffffff8008595088 T mt6357_upmu_get_fg_current_out | |
| ffffff80085950e8 T mt6357_upmu_set_fg_cur_lth | |
| ffffff8008595110 T mt6357_upmu_set_fg_cur_hth | |
| ffffff8008595138 T mt6357_upmu_get_fg_cic2 | |
| ffffff8008595198 T mt6357_upmu_get_fg_offset | |
| ffffff80085951f8 T mt6357_upmu_set_fg_adjust_offset_value | |
| ffffff8008595220 T mt6357_upmu_set_fg_gain | |
| ffffff8008595248 T mt6357_upmu_set_fg_mode | |
| ffffff8008595270 T mt6357_upmu_set_fg_rst_sw | |
| ffffff8008595298 T mt6357_upmu_set_fg_fgcal_en_sw | |
| ffffff80085952c0 T mt6357_upmu_set_fg_fgadc_en_sw | |
| ffffff80085952e8 T mt6357_upmu_set_rg_system_info_con0 | |
| ffffff8008595310 T mt6357_upmu_set_rg_system_info_con1 | |
| ffffff8008595338 T mt6357_upmu_set_rg_system_info_con2 | |
| ffffff8008595360 T mt6357_upmu_set_rg_system_info_con3 | |
| ffffff8008595388 T mt6357_upmu_set_rg_system_info_con4 | |
| ffffff80085953b0 T mt6357_upmu_set_rg_baton_en | |
| ffffff80085953d8 T mt6357_upmu_get_rg_baton_en | |
| ffffff8008595438 T mt6357_upmu_get_rgs_baton_undet | |
| ffffff8008595498 T mt6357_upmu_set_rg_baton_lt_en | |
| ffffff80085954c0 T mt6357_upmu_get_rg_baton_lt_en | |
| ffffff8008595520 T mt6357_upmu_set_rg_baton_ht_en | |
| ffffff8008595548 T mt6357_upmu_get_rg_baton_ht_en | |
| ffffff80085955a8 T mt6357_upmu_set_rg_baton_ht_vth | |
| ffffff80085955d0 T mt6357_upmu_get_rgs_baton_ht | |
| ffffff8008595630 T mt6357_upmu_set_rg_baton_ht_trim | |
| ffffff8008595658 T mt6357_upmu_get_hk_top_ana_id | |
| ffffff80085956b8 T mt6357_upmu_get_hk_top_dig_id | |
| ffffff8008595718 T mt6357_upmu_get_hk_top_ana_minor_rev | |
| ffffff8008595778 T mt6357_upmu_get_hk_top_ana_major_rev | |
| ffffff80085957d8 T mt6357_upmu_get_hk_top_dig_minor_rev | |
| ffffff8008595838 T mt6357_upmu_get_hk_top_dig_major_rev | |
| ffffff8008595898 T mt6357_upmu_get_hk_top_cbs | |
| ffffff80085958f8 T mt6357_upmu_get_hk_top_bix | |
| ffffff8008595958 T mt6357_upmu_get_hk_top_esp | |
| ffffff80085959b8 T mt6357_upmu_get_hk_top_fpi | |
| ffffff8008595a18 T mt6357_upmu_get_hk_clk_offset | |
| ffffff8008595a78 T mt6357_upmu_get_hk_rst_offset | |
| ffffff8008595ad8 T mt6357_upmu_get_hk_int_offset | |
| ffffff8008595b38 T mt6357_upmu_get_hk_int_len | |
| ffffff8008595b98 T mt6357_upmu_set_rg_auxadc_ao_1m_ck_pdn | |
| ffffff8008595bc0 T mt6357_upmu_set_rg_auxadc_1m_ck_pdn_hwen | |
| ffffff8008595be8 T mt6357_upmu_set_rg_auxadc_1m_ck_pdn | |
| ffffff8008595c10 T mt6357_upmu_set_rg_auxadc_ck_pdn_hwen | |
| ffffff8008595c38 T mt6357_upmu_set_rg_auxadc_ck_pdn | |
| ffffff8008595c60 T mt6357_upmu_set_rg_auxadc_rng_ck_pdn_hwen | |
| ffffff8008595c88 T mt6357_upmu_set_rg_auxadc_rng_ck_pdn | |
| ffffff8008595cb0 T mt6357_upmu_set_rg_auxadc_32k_ck_pdn_hwen | |
| ffffff8008595cd8 T mt6357_upmu_set_rg_auxadc_32k_ck_pdn | |
| ffffff8008595d00 T mt6357_upmu_set_rg_auxadc_1k_ck_pdn | |
| ffffff8008595d28 T mt6357_upmu_set_rg_auxadc_ck_divsel | |
| ffffff8008595d50 T mt6357_upmu_set_rg_auxadc_ck_tstsel | |
| ffffff8008595d78 T mt6357_upmu_set_rg_auxadc_intrp_ck_pdn | |
| ffffff8008595da0 T mt6357_upmu_set_rg_auxadc_rst | |
| ffffff8008595dc8 T mt6357_upmu_set_rg_auxadc_reg_rst | |
| ffffff8008595df0 T mt6357_upmu_set_bank_hk_top_swrst | |
| ffffff8008595e18 T mt6357_upmu_set_bank_auxadc_swrst | |
| ffffff8008595e40 T mt6357_upmu_set_bank_auxadc_dig_1_swrst | |
| ffffff8008595e68 T mt6357_upmu_set_bank_auxadc_dig_2_swrst | |
| ffffff8008595e90 T mt6357_upmu_set_bank_auxadc_dig_3_swrst | |
| ffffff8008595eb8 T mt6357_upmu_set_bank_auxadc_dig_4_swrst | |
| ffffff8008595ee0 T mt6357_upmu_set_rg_int_en_bat_h | |
| ffffff8008595f08 T mt6357_upmu_get_rg_int_en_bat_h | |
| ffffff8008595f68 T mt6357_upmu_set_rg_int_en_bat_l | |
| ffffff8008595f90 T mt6357_upmu_get_rg_int_en_bat_l | |
| ffffff8008595ff0 T mt6357_upmu_set_rg_int_en_auxadc_imp | |
| ffffff8008596018 T mt6357_upmu_get_rg_int_en_auxadc_imp | |
| ffffff8008596078 T mt6357_upmu_set_rg_int_en_nag_c_dltv | |
| ffffff80085960a0 T mt6357_upmu_get_rg_int_en_nag_c_dltv | |
| ffffff8008596100 T mt6357_upmu_set_rg_int_mask_bat_h | |
| ffffff8008596128 T mt6357_upmu_set_rg_int_mask_bat_l | |
| ffffff8008596150 T mt6357_upmu_set_rg_int_mask_auxadc_imp | |
| ffffff8008596178 T mt6357_upmu_set_rg_int_mask_nag_c_dltv | |
| ffffff80085961a0 T mt6357_upmu_get_rg_int_raw_status_bat_h | |
| ffffff8008596200 T mt6357_upmu_get_rg_int_raw_status_bat_l | |
| ffffff8008596260 T mt6357_upmu_get_rg_int_raw_status_auxadc_imp | |
| ffffff80085962c0 T mt6357_upmu_get_rg_int_raw_status_nag_c_dltv | |
| ffffff8008596320 T mt6357_upmu_set_rg_clk_mon_flag_en | |
| ffffff8008596348 T mt6357_upmu_get_rg_clk_mon_flag_en | |
| ffffff80085963a8 T mt6357_upmu_set_rg_clk_mon_flag_sel | |
| ffffff80085963d0 T mt6357_upmu_set_rg_int_mon_flag_en | |
| ffffff80085963f8 T mt6357_upmu_get_rg_int_mon_flag_en | |
| ffffff8008596458 T mt6357_upmu_set_rg_int_mon_flag_sel | |
| ffffff8008596480 T mt6357_upmu_set_rg_hk_mon_flag_sel | |
| ffffff80085964a8 T mt6357_upmu_set_rg_mon_flag_sel_auxadc | |
| ffffff80085964d0 T mt6357_upmu_get_auxadc_ana_id | |
| ffffff8008596530 T mt6357_upmu_get_auxadc_dig_id | |
| ffffff8008596590 T mt6357_upmu_get_auxadc_ana_minor_rev | |
| ffffff80085965f0 T mt6357_upmu_get_auxadc_ana_major_rev | |
| ffffff8008596650 T mt6357_upmu_get_auxadc_dig_minor_rev | |
| ffffff80085966b0 T mt6357_upmu_get_auxadc_dig_major_rev | |
| ffffff8008596710 T mt6357_upmu_get_auxadc_dsn_cbs | |
| ffffff8008596770 T mt6357_upmu_get_auxadc_dsn_bix | |
| ffffff80085967d0 T mt6357_upmu_get_auxadc_dsn_esp | |
| ffffff8008596830 T mt6357_upmu_get_auxadc_dsn_fpi | |
| ffffff8008596890 T mt6357_upmu_set_rg_auxadc_cali | |
| ffffff80085968b8 T mt6357_upmu_set_rg_aux_rsv | |
| ffffff80085968e0 T mt6357_upmu_set_rg_vbuf_byp | |
| ffffff8008596908 T mt6357_upmu_set_rg_vbuf_calen | |
| ffffff8008596930 T mt6357_upmu_set_rg_vbuf_exten | |
| ffffff8008596958 T mt6357_upmu_get_auxadc_dig_1_ana_id | |
| ffffff80085969b8 T mt6357_upmu_get_auxadc_dig_1_dig_id | |
| ffffff8008596a18 T mt6357_upmu_get_auxadc_dig_1_ana_minor_rev | |
| ffffff8008596a78 T mt6357_upmu_get_auxadc_dig_1_ana_major_rev | |
| ffffff8008596ad8 T mt6357_upmu_get_auxadc_dig_1_dig_minor_rev | |
| ffffff8008596b38 T mt6357_upmu_get_auxadc_dig_1_dig_major_rev | |
| ffffff8008596b98 T mt6357_upmu_get_auxadc_dig_1_dsn_cbs | |
| ffffff8008596bf8 T mt6357_upmu_get_auxadc_dig_1_dsn_bix | |
| ffffff8008596c58 T mt6357_upmu_get_auxadc_dig_1_dsn_esp | |
| ffffff8008596cb8 T mt6357_upmu_get_auxadc_dig_1_dsn_fpi | |
| ffffff8008596d18 T mt6357_upmu_get_auxadc_adc_out_ch0 | |
| ffffff8008596d78 T mt6357_upmu_get_auxadc_adc_rdy_ch0 | |
| ffffff8008596dd8 T mt6357_upmu_get_auxadc_adc_out_ch1 | |
| ffffff8008596e38 T mt6357_upmu_get_auxadc_adc_rdy_ch1 | |
| ffffff8008596e98 T mt6357_upmu_get_auxadc_adc_out_ch2 | |
| ffffff8008596ef8 T mt6357_upmu_get_auxadc_adc_rdy_ch2 | |
| ffffff8008596f58 T mt6357_upmu_get_auxadc_adc_out_ch3 | |
| ffffff8008596fb8 T mt6357_upmu_get_auxadc_adc_rdy_ch3 | |
| ffffff8008597018 T mt6357_upmu_get_auxadc_adc_out_ch4 | |
| ffffff8008597078 T mt6357_upmu_get_auxadc_adc_rdy_ch4 | |
| ffffff80085970d8 T mt6357_upmu_get_auxadc_adc_out_ch5 | |
| ffffff8008597138 T mt6357_upmu_get_auxadc_adc_rdy_ch5 | |
| ffffff8008597198 T mt6357_upmu_get_auxadc_adc_out_ch6 | |
| ffffff80085971f8 T mt6357_upmu_get_auxadc_adc_rdy_ch6 | |
| ffffff8008597258 T mt6357_upmu_get_auxadc_adc_out_ch7 | |
| ffffff80085972b8 T mt6357_upmu_get_auxadc_adc_rdy_ch7 | |
| ffffff8008597318 T mt6357_upmu_get_auxadc_adc_out_ch8 | |
| ffffff8008597378 T mt6357_upmu_get_auxadc_adc_rdy_ch8 | |
| ffffff80085973d8 T mt6357_upmu_get_auxadc_adc_out_ch9 | |
| ffffff8008597438 T mt6357_upmu_get_auxadc_adc_rdy_ch9 | |
| ffffff8008597498 T mt6357_upmu_get_auxadc_adc_out_ch10 | |
| ffffff80085974f8 T mt6357_upmu_get_auxadc_adc_rdy_ch10 | |
| ffffff8008597558 T mt6357_upmu_get_auxadc_adc_out_ch11 | |
| ffffff80085975b8 T mt6357_upmu_get_auxadc_adc_rdy_ch11 | |
| ffffff8008597618 T mt6357_upmu_get_auxadc_adc_out_ch12_15 | |
| ffffff8008597678 T mt6357_upmu_get_auxadc_adc_rdy_ch12_15 | |
| ffffff80085976d8 T mt6357_upmu_get_auxadc_adc_out_lbat | |
| ffffff8008597738 T mt6357_upmu_get_auxadc_adc_rdy_lbat | |
| ffffff8008597798 T mt6357_upmu_get_auxadc_adc_out_ch7_by_gps | |
| ffffff80085977f8 T mt6357_upmu_get_auxadc_adc_rdy_ch7_by_gps | |
| ffffff8008597858 T mt6357_upmu_get_auxadc_adc_out_ch7_by_md | |
| ffffff80085978b8 T mt6357_upmu_get_auxadc_adc_rdy_ch7_by_md | |
| ffffff8008597918 T mt6357_upmu_get_auxadc_adc_out_ch7_by_ap | |
| ffffff8008597978 T mt6357_upmu_get_auxadc_adc_rdy_ch7_by_ap | |
| ffffff80085979d8 T mt6357_upmu_get_auxadc_adc_out_ch4_by_md | |
| ffffff8008597a38 T mt6357_upmu_get_auxadc_adc_rdy_ch4_by_md | |
| ffffff8008597a98 T mt6357_upmu_get_auxadc_adc_out_pwron_pchr | |
| ffffff8008597af8 T mt6357_upmu_get_auxadc_adc_rdy_pwron_pchr | |
| ffffff8008597b58 T mt6357_upmu_get_auxadc_adc_out_pwron_swchr | |
| ffffff8008597bb8 T mt6357_upmu_get_auxadc_adc_rdy_pwron_swchr | |
| ffffff8008597c18 T mt6357_upmu_get_auxadc_adc_out_wakeup_pchr | |
| ffffff8008597c78 T mt6357_upmu_get_auxadc_adc_rdy_wakeup_pchr | |
| ffffff8008597cd8 T mt6357_upmu_get_auxadc_adc_out_wakeup_swchr | |
| ffffff8008597d38 T mt6357_upmu_get_auxadc_adc_rdy_wakeup_swchr | |
| ffffff8008597d98 T mt6357_upmu_get_auxadc_adc_out_ch0_by_md | |
| ffffff8008597df8 T mt6357_upmu_get_auxadc_adc_rdy_ch0_by_md | |
| ffffff8008597e58 T mt6357_upmu_get_auxadc_adc_out_ch0_by_ap | |
| ffffff8008597eb8 T mt6357_upmu_get_auxadc_adc_rdy_ch0_by_ap | |
| ffffff8008597f18 T mt6357_upmu_get_auxadc_adc_out_ch1_by_md | |
| ffffff8008597f78 T mt6357_upmu_get_auxadc_adc_rdy_ch1_by_md | |
| ffffff8008597fd8 T mt6357_upmu_get_auxadc_adc_out_ch1_by_ap | |
| ffffff8008598038 T mt6357_upmu_get_auxadc_adc_rdy_ch1_by_ap | |
| ffffff8008598098 T mt6357_upmu_get_auxadc_adc_out_fgadc_pchr | |
| ffffff80085980f8 T mt6357_upmu_get_auxadc_adc_rdy_fgadc_pchr | |
| ffffff8008598158 T mt6357_upmu_get_auxadc_adc_out_fgadc_swchr | |
| ffffff80085981b8 T mt6357_upmu_get_auxadc_adc_rdy_fgadc_swchr | |
| ffffff8008598218 T mt6357_upmu_get_auxadc_adc_out_bat_plugin_pchr | |
| ffffff8008598278 T mt6357_upmu_get_auxadc_adc_rdy_bat_plugin_pchr | |
| ffffff80085982d8 T mt6357_upmu_get_auxadc_adc_out_bat_plugin_swchr | |
| ffffff8008598338 T mt6357_upmu_get_auxadc_adc_rdy_bat_plugin_swchr | |
| ffffff8008598398 T mt6357_upmu_get_auxadc_adc_out_imp | |
| ffffff80085983f8 T mt6357_upmu_get_auxadc_adc_rdy_imp | |
| ffffff8008598458 T mt6357_upmu_get_auxadc_adc_out_imp_avg | |
| ffffff80085984b8 T mt6357_upmu_get_auxadc_adc_rdy_imp_avg | |
| ffffff8008598518 T mt6357_upmu_get_auxadc_adc_out_raw | |
| ffffff8008598578 T mt6357_upmu_get_auxadc_adc_out_mdrt | |
| ffffff80085985d8 T mt6357_upmu_get_auxadc_adc_rdy_mdrt | |
| ffffff8008598638 T mt6357_upmu_get_auxadc_adc_out_dcxo_by_gps | |
| ffffff8008598698 T mt6357_upmu_get_auxadc_adc_rdy_dcxo_by_gps | |
| ffffff80085986f8 T mt6357_upmu_get_auxadc_adc_out_dcxo_by_md | |
| ffffff8008598758 T mt6357_upmu_get_auxadc_adc_rdy_dcxo_by_md | |
| ffffff80085987b8 T mt6357_upmu_get_auxadc_adc_out_dcxo_by_ap | |
| ffffff8008598818 T mt6357_upmu_get_auxadc_adc_rdy_dcxo_by_ap | |
| ffffff8008598878 T mt6357_upmu_get_auxadc_adc_out_dcxo_mdrt | |
| ffffff80085988d8 T mt6357_upmu_get_auxadc_adc_rdy_dcxo_mdrt | |
| ffffff8008598938 T mt6357_upmu_get_auxadc_adc_out_nag | |
| ffffff8008598998 T mt6357_upmu_get_auxadc_adc_rdy_nag | |
| ffffff80085989f8 T mt6357_upmu_get_auxadc_adc_out_batid | |
| ffffff8008598a58 T mt6357_upmu_get_auxadc_adc_rdy_batid | |
| ffffff8008598ab8 T mt6357_upmu_get_auxadc_adc_out_ch4_by_thr1 | |
| ffffff8008598b18 T mt6357_upmu_get_auxadc_adc_rdy_ch4_by_thr1 | |
| ffffff8008598b78 T mt6357_upmu_get_auxadc_adc_out_ch4_by_thr2 | |
| ffffff8008598bd8 T mt6357_upmu_get_auxadc_adc_rdy_ch4_by_thr2 | |
| ffffff8008598c38 T mt6357_upmu_set_auxadc_sw_gain_trim | |
| ffffff8008598c60 T mt6357_upmu_set_auxadc_sw_offset_trim | |
| ffffff8008598c88 T mt6357_upmu_get_auxadc_dig_2_ana_id | |
| ffffff8008598ce8 T mt6357_upmu_get_auxadc_dig_2_dig_id | |
| ffffff8008598d48 T mt6357_upmu_get_auxadc_dig_2_ana_minor_rev | |
| ffffff8008598da8 T mt6357_upmu_get_auxadc_dig_2_ana_major_rev | |
| ffffff8008598e08 T mt6357_upmu_get_auxadc_dig_2_dig_minor_rev | |
| ffffff8008598e68 T mt6357_upmu_get_auxadc_dig_2_dig_major_rev | |
| ffffff8008598ec8 T mt6357_upmu_get_auxadc_dig_2_dsn_cbs | |
| ffffff8008598f28 T mt6357_upmu_get_auxadc_dig_2_dsn_bix | |
| ffffff8008598f88 T mt6357_upmu_get_auxadc_dig_2_dsn_esp | |
| ffffff8008598fe8 T mt6357_upmu_get_auxadc_dig_2_dsn_fpi | |
| ffffff8008599048 T mt6357_upmu_get_auxadc_adc_busy_in | |
| ffffff80085990a8 T mt6357_upmu_get_auxadc_adc_busy_in_lbat | |
| ffffff8008599108 T mt6357_upmu_get_auxadc_adc_busy_in_wakeup | |
| ffffff8008599168 T mt6357_upmu_get_auxadc_adc_busy_in_dcxo_mdrt | |
| ffffff80085991c8 T mt6357_upmu_get_auxadc_adc_busy_in_dcxo_gps_ap | |
| ffffff8008599228 T mt6357_upmu_get_auxadc_adc_busy_in_dcxo_gps_md | |
| ffffff8008599288 T mt6357_upmu_get_auxadc_adc_busy_in_dcxo_gps | |
| ffffff80085992e8 T mt6357_upmu_get_auxadc_adc_busy_in_mdrt | |
| ffffff8008599348 T mt6357_upmu_get_auxadc_adc_busy_in_share | |
| ffffff80085993a8 T mt6357_upmu_get_auxadc_adc_busy_in_imp | |
| ffffff8008599408 T mt6357_upmu_get_auxadc_adc_busy_in_fgadc_pchr | |
| ffffff8008599468 T mt6357_upmu_get_auxadc_adc_busy_in_fgadc_swchr | |
| ffffff80085994c8 T mt6357_upmu_get_auxadc_adc_busy_in_gps_ap | |
| ffffff8008599528 T mt6357_upmu_get_auxadc_adc_busy_in_gps_md | |
| ffffff8008599588 T mt6357_upmu_get_auxadc_adc_busy_in_gps | |
| ffffff80085995e8 T mt6357_upmu_get_auxadc_adc_busy_in_thr_md | |
| ffffff8008599648 T mt6357_upmu_get_auxadc_adc_busy_in_bat_plugin_pchr | |
| ffffff80085996a8 T mt6357_upmu_get_auxadc_adc_busy_in_bat_plugin_swchr | |
| ffffff8008599708 T mt6357_upmu_get_auxadc_adc_busy_in_batid | |
| ffffff8008599768 T mt6357_upmu_get_auxadc_adc_busy_in_pwron | |
| ffffff80085997c8 T mt6357_upmu_get_auxadc_adc_busy_in_thr1 | |
| ffffff8008599828 T mt6357_upmu_get_auxadc_adc_busy_in_thr2 | |
| ffffff8008599888 T mt6357_upmu_get_auxadc_adc_busy_in_nag | |
| ffffff80085998e8 T mt6357_upmu_set_auxadc_rqst_ch0 | |
| ffffff8008599910 T mt6357_upmu_set_auxadc_rqst_ch1 | |
| ffffff8008599938 T mt6357_upmu_set_auxadc_rqst_ch2 | |
| ffffff8008599960 T mt6357_upmu_set_auxadc_rqst_ch3 | |
| ffffff8008599988 T mt6357_upmu_set_auxadc_rqst_ch4 | |
| ffffff80085999b0 T mt6357_upmu_set_auxadc_rqst_ch5 | |
| ffffff80085999d8 T mt6357_upmu_set_auxadc_rqst_ch6 | |
| ffffff8008599a00 T mt6357_upmu_set_auxadc_rqst_ch7 | |
| ffffff8008599a28 T mt6357_upmu_set_auxadc_rqst_ch8 | |
| ffffff8008599a50 T mt6357_upmu_set_auxadc_rqst_ch9 | |
| ffffff8008599a78 T mt6357_upmu_set_auxadc_rqst_ch10 | |
| ffffff8008599aa0 T mt6357_upmu_set_auxadc_rqst_ch11 | |
| ffffff8008599ac8 T mt6357_upmu_set_auxadc_rqst_ch12 | |
| ffffff8008599af0 T mt6357_upmu_set_auxadc_rqst_ch13 | |
| ffffff8008599b18 T mt6357_upmu_set_auxadc_rqst_ch14 | |
| ffffff8008599b40 T mt6357_upmu_set_auxadc_rqst_ch15 | |
| ffffff8008599b68 T mt6357_upmu_set_auxadc_rqst_ch4_by_thr1 | |
| ffffff8008599b90 T mt6357_upmu_set_auxadc_rqst_ch4_by_thr2 | |
| ffffff8008599bb8 T mt6357_upmu_set_auxadc_rqst_ch0_by_md | |
| ffffff8008599be0 T mt6357_upmu_set_auxadc_rqst_ch1_by_md | |
| ffffff8008599c08 T mt6357_upmu_set_auxadc_rqst_rsv0 | |
| ffffff8008599c30 T mt6357_upmu_set_auxadc_rqst_batid | |
| ffffff8008599c58 T mt6357_upmu_set_auxadc_rqst_ch4_by_md | |
| ffffff8008599c80 T mt6357_upmu_set_auxadc_rqst_ch7_by_md | |
| ffffff8008599ca8 T mt6357_upmu_set_auxadc_rqst_ch7_by_gps | |
| ffffff8008599cd0 T mt6357_upmu_set_auxadc_rqst_dcxo_by_md | |
| ffffff8008599cf8 T mt6357_upmu_set_auxadc_rqst_dcxo_by_gps | |
| ffffff8008599d20 T mt6357_upmu_set_auxadc_rqst_rsv1 | |
| ffffff8008599d48 T mt6357_upmu_set_auxadc_ck_on_extd | |
| ffffff8008599d70 T mt6357_upmu_set_auxadc_srclken_src_sel | |
| ffffff8008599d98 T mt6357_upmu_set_auxadc_adc_pwdb | |
| ffffff8008599dc0 T mt6357_upmu_set_auxadc_adc_pwdb_swctrl | |
| ffffff8008599de8 T mt6357_upmu_set_auxadc_strup_ck_on_enb | |
| ffffff8008599e10 T mt6357_upmu_set_auxadc_srclken_ck_en | |
| ffffff8008599e38 T mt6357_upmu_set_auxadc_ck_aon_gps | |
| ffffff8008599e60 T mt6357_upmu_set_auxadc_ck_aon_md | |
| ffffff8008599e88 T mt6357_upmu_set_auxadc_ck_aon | |
| ffffff8008599eb0 T mt6357_upmu_set_auxadc_avg_num_small | |
| ffffff8008599ed8 T mt6357_upmu_set_auxadc_avg_num_large | |
| ffffff8008599f00 T mt6357_upmu_set_auxadc_spl_num | |
| ffffff8008599f28 T mt6357_upmu_set_auxadc_avg_num_sel | |
| ffffff8008599f50 T mt6357_upmu_set_auxadc_avg_num_sel_share | |
| ffffff8008599f78 T mt6357_upmu_set_auxadc_avg_num_sel_lbat | |
| ffffff8008599fa0 T mt6357_upmu_set_auxadc_avg_num_sel_bat_temp | |
| ffffff8008599fc8 T mt6357_upmu_set_auxadc_avg_num_sel_wakeup | |
| ffffff8008599ff0 T mt6357_upmu_set_auxadc_spl_num_large | |
| ffffff800859a018 T mt6357_upmu_set_auxadc_spl_num_sleep | |
| ffffff800859a040 T mt6357_upmu_set_auxadc_spl_num_sleep_sel | |
| ffffff800859a068 T mt6357_upmu_set_auxadc_spl_num_sel | |
| ffffff800859a090 T mt6357_upmu_set_auxadc_spl_num_sel_share | |
| ffffff800859a0b8 T mt6357_upmu_set_auxadc_spl_num_sel_lbat | |
| ffffff800859a0e0 T mt6357_upmu_set_auxadc_spl_num_sel_bat_temp | |
| ffffff800859a108 T mt6357_upmu_set_auxadc_spl_num_sel_wakeup | |
| ffffff800859a130 T mt6357_upmu_set_auxadc_spl_num_ch0 | |
| ffffff800859a158 T mt6357_upmu_set_auxadc_spl_num_ch3 | |
| ffffff800859a180 T mt6357_upmu_set_auxadc_spl_num_ch7 | |
| ffffff800859a1a8 T mt6357_upmu_set_auxadc_avg_num_lbat | |
| ffffff800859a1d0 T mt6357_upmu_set_auxadc_avg_num_ch7 | |
| ffffff800859a1f8 T mt6357_upmu_set_auxadc_avg_num_ch3 | |
| ffffff800859a220 T mt6357_upmu_set_auxadc_avg_num_ch0 | |
| ffffff800859a248 T mt6357_upmu_set_auxadc_avg_num_hpc | |
| ffffff800859a270 T mt6357_upmu_set_auxadc_avg_num_dcxo | |
| ffffff800859a298 T mt6357_upmu_set_auxadc_trim_ch0_sel | |
| ffffff800859a2c0 T mt6357_upmu_set_auxadc_trim_ch1_sel | |
| ffffff800859a2e8 T mt6357_upmu_set_auxadc_trim_ch2_sel | |
| ffffff800859a310 T mt6357_upmu_set_auxadc_trim_ch3_sel | |
| ffffff800859a338 T mt6357_upmu_set_auxadc_trim_ch4_sel | |
| ffffff800859a360 T mt6357_upmu_set_auxadc_trim_ch5_sel | |
| ffffff800859a388 T mt6357_upmu_set_auxadc_trim_ch6_sel | |
| ffffff800859a3b0 T mt6357_upmu_set_auxadc |
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