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March 19, 2022 13:44
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latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = 0xDE6E | |
[PMIC]IsUsbCableIn 1 | |
[PLFM] USB/charger boot! | |
[PMIC]POWER_HOLD :0x1 | |
[RTC]rtc_lpsd_solution | |
[RTC]1st RTC_AL_MASK= 0x7F | |
[RTC]2nd RTC_AL_MASK= 0x7F | |
[RTC]rtc_bbpu_power_on done | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 349 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 1▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=700 | |
[RTC] EOSC_Cali: val=0x2BC | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = 0xDE6E | |
[PMIC]IsUsbCableIn 1 | |
[PLFM] USB/charger boot! | |
[PMIC]POWER_HOLD :0x1 | |
[RTC] clearing alarm/spar, 1, 0 | |
[RTC]rtc_lpsd_solution | |
[RTC]1st RTC_AL_MASK= 0x7F | |
[RTC]2nd RTC_AL_MASK= 0x7F | |
[RTC]rtc_bbpu_power_on done | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vr▒)K▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = 0xDE6E | |
[PMIC]IsUsbCableIn 1 | |
[PLFM] USB/charger boot! | |
[PMIC]POWER_HOLD :0x1 | |
[RTC] clearing alarm/spar, 1, 0 | |
[RTC]rtc_lpsd_solution | |
[RTC]1st RTC_AL_MASK= 0x7F | |
[RTC]2nd RTC_AL_MASK= 0x7F | |
[RTC]rtc_bbpu_power_on done | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best ▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=810 | |
[RTC] EOSC_Cali: val=0x32A | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC_Cali: val=0x31E | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 355 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vre▒K▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x4 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=810 | |
[RTC] EOSC_Cali: val=0x32A | |
[RTC] get_frequency_meter: input=0x7, ouput=700 | |
[RTC] EOSC_Cali: val=0x2BC | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=796 | |
[RTC] EOSC_Cali: val=0x31C | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x100070A0, val: 0x2FF | |
[RGU] rgu_update_reg: | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, a | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 18,▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 349 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vr▒k | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = 0xDE6E | |
[PMIC]IsUsbCableIn 1 | |
[PLFM] USB/charger boot! | |
[PMIC]POWER_HOLD :0x1 | |
[RTC] clearing alarm/spar, 1, 0 | |
[RTC]rtc_lpsd_solution | |
[RTC]1st RTC_AL_MASK= 0x7F | |
[RTC]2nd RTC_AL_MASK= 0x7F | |
[RTC]rtc_bbpu_power_on done | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, a | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 347 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 353 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 18 | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC_Cali: val=0x31E | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = 0xDE6E | |
[PMIC]IsUsbCableIn 1 | |
[PLFM] USB/charger boot! | |
[PMIC]POWER_HOLD :0x1 | |
[RTC] clearing alarm/spar, 1, 0 | |
[RTC]rtc_lpsd_solution | |
[RTC]1st RTC_AL_MASK= 0x7F | |
[RTC]2nd RTC_AL_MASK= 0x7F | |
[RTC]rtc_bbpu_power_on done | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 347 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 356 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 18,▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x4 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=810 | |
[RTC] EOSC_Cali: val=0x32A | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=757 | |
[RTC] EOSC_Cali: val=0x2F5 | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] EOSC_Cali: val=0x30F | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC_Cali: val=0x31E | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=796 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x100070A0, val: 0x2FF | |
[RGU] rgu_update_reg: 1, bits: 0x200, addr: 0x100070A0, val: 0x2FF | |
[RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL(0x200F1) | |
[RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL2(0x2FF) | |
[RGU] mtk_wdt_init: MTK_WDT_LATCH_CTL(0xB871) | |
[RGU] mtk_wdt_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032) | |
Enter mtk_kpd_gpio_set! | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 349 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 355 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 1▒K | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3984 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=700 | |
[RTC] EOSC_Cali: val=0x2BC | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=798 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x100070A0, val: 0x2FF | |
[RGU] rgu_update_reg: 1, bits: 0x200, addr: 0x100070A0, val: 0x2FF | |
[RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL(0x200F1) | |
[RGU] mtk_wdt_init: MTK_WDT_DEBUG_CTL2(0x2FF) | |
[RGU] mtk_wdt_init: MTK_WDT_LATCH_CTL(0xB871) | |
[RGU] mtk_wdt_init: MTK_WDT_REQ_MODE(3F0032), MTK_WDT_REQ_IRQ_EN(3F0032) | |
Enter mtk_kpd_gpio_set! | |
after set KP enable: KP_SEL = 0x0 ! | |
[RTC] irqsta = 0x1, pdn1 = 0x0, pdn2 = 0x201, spar0 = 0x80, spar1 = 0x800 | |
[RTC] new_spare0 = 0x4000, new_spare1 = 0x5001, new_spare2 = 0x1, new_spare3 = 0x1 | |
[RTC] bbpu = 0x1, con = 0x486, cali = 0x2020, osc32con = | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 355 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 1+ | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=810 | |
[RTC] EOSC_Cali: val=0x32A | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] EOSC_Cali: val=0x30F | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, addr: 0x10007040, val: 0x200F1 | |
[RGU] rgu_update_reg: 0, bits: 0x100, addr: 0x10007040, val: 0x200F1 | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vref 1i | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x6 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3985 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=783 | |
[RTC] EOSC_Cali: val=0x30F | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
[PLFM] Init Boot Device: OK(0) | |
EMI_MPU_CTRL=0 1st | |
EMI_MPU_CTRL=0 2nd | |
[RGU] rgu_update_reg: 0, bits: 0x400, addr: 0x10007040, val: 0x200F1 | |
[RGU] WDT DDR reserve mode FAIL! 200F1 | |
[RGU] DDR RESERVE Success 0 | |
[RGU] rgu_update_reg: 0, bits: 0x200, a | |
[GPT_PL] startsec:0000000000001C00, partattr:0023785C1D062024.. | |
[dramc] init partition address is 0x0000000000380000 | |
init_dram:1660: init_dram Starting | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 349 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 355 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA i | |
▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒▒Pll init start... | |
INFRA_BUS_DCM_CTRL 5F7FE0 | |
mtcmos Start.. | |
before: WDT_SWSYSRST = 0x8000 | |
after: WDT_SWSYSRST = 0x9000 | |
P[PWRAP] si_en_sel = 0, si_ck_sel = 0, si_sample_ctrl = 0, rdata = 96A9 | |
[PWRAP] si_en_sel = 0, si_ck_sel = 1, si_sample_ctrl = 20, rdata = 5AA5, Pass | |
[PWRAP] InitSiStrobe (6, 6, DA65) Data Boundary Is Found !! | |
[PWRAP] SI Strobe Calibration For PMIC 0 Done, (40, 6) | |
[PWRAP] Read Test pass, return_value=0x0 | |
[PWRAP] Write Test pass | |
[PWRAP] RECORD_CMD0: 0x152A (Last one command addr) | |
[PWRAP] RECORD_WDATA0:0x19 (Last one command wdata) | |
[PWRAP] RECORD_CMD1: 0x196C (Last second command addr) | |
[PWRAP] RECORD_WDATA1:0x0 (Last second command wdata) | |
[PWRAP] RECORD_CMD2: 0x1A08 (Last third command addr) | |
[PWRAP] RECORD_WDATA2:0x0 (Last third command wdata) | |
[PWRAP] init pass, ret=0. | |
[PMIC]Preloader Start | |
[PMIC]MT6357 CHIP Code = 0x57, mrv=1 | |
[PMIC]POWER_HOLD :0x1 | |
[PMIC]TOP_RST_STATUS[0x152]=0x48 | |
[PMIC]PONSTS[0xC]=0x4 | |
[PMIC]POFFSTS[0xE]=0x1 | |
[PMIC]PGSTATUS0[0x14]=0xFFFE | |
[PMIC]PSOCSTATUS[0x16]=0x0 | |
[PMIC]BUCK_OC_SDN_STATUS[0x1434]=0x0 | |
[PMIC]BUCK_OC_SDN_EN[0x1444]=0x49F | |
[PMIC]THERMALSTATUS[0x18]=0x0 | |
[PMIC]STRUP_CON4[0xA1C]=0x0 | |
[PMIC]TOP_RST_MISC[0x14C]=0x1200 | |
[PMIC]TOP_CLK_TRIM[0x38E]=0x6AC0 | |
latch VPROC 800000 uV | |
latch VSRAM_PROC 900000 uV | |
latch VSRAM_OTHERS 900000 uV | |
latch VCORE 800000 uV | |
latch VMODEM 800000 uV | |
[pmic_check_rst] DDLO_RSTB | |
[PMIC]just_rst = 0 | |
No EFUSE SW Load | |
[PMIC]pmic_wdt_set Reg[0x14C]=0x1221 | |
[rt5738_driver_probe] | |
[rt5738_hw_component_detect] mt6691_vdd2(0) exist = 1, Chip ID = 0 | |
mt6691_vdd2_hw_init | |
[0x0]=0xA5 [0x1]=0xA5 [0x2]=0x92 [0x3]=0x0 [0x4]=0x0 [0x5]=0x81 [0x6]=0x63 | |
[rt5738_driver_probe] PL g_rt5738_0_hw_exist=1, g_rt5738_driver_ready=1 | |
register vs1 OK | |
register vmodem OK | |
register vcore OK | |
register vproc OK | |
register vpa OK | |
register vsram_others OK | |
register vsram_proc OK | |
register vdram OK | |
register vfe28 OK | |
[PMIC]Init done | |
ac 0,usb 1 | |
[PLFM] Init PMIC: OK(0) | |
[PLFM] chip_ver[1] | |
[BLDR] Build Time: 20201104-090402 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_STATUS=2 1 1 2 0 1 1 | |
clk_buf_dump_dts_log: PMIC_CLK_BUF?_DRV_CURR=-1 -1 -1 -1 -1 -1 -1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 1 | |
clk_buf_dump_clkbuf_log DCXO_CW00/02/11/13/14/15/16/20/top_spi_con1=0x4E1D 3AEE 8000 98E9 82B5 A2AA 9455 11 0 | |
clk_buf_init_pmic_wrap: DCXO_CONN_ADR0/WDATA0/ADR1/WDATA1=0x44A/0/44A/1 | |
clk_buf_init_pmic_wrap: DCXO_NFC_ADR0/WDATA0/ADR1/WDATA1/EN=0x78C/100/78A/100/3 | |
[RTC] enable_dcxo first con = 0x486, osc32con = 0xDE6E, sec = 0x2020 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=0 | |
[RTC] get_frequency_meter: input=0x0, ouput=5 | |
[RTC] get_frequency_meter: input=0x0, ouput=3986 | |
[RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2, without LPD | |
[RTC] bbpu = 0x1, con = 0x486, osc32con = 0xDE6E, sec = 0x2020, yea = 0xC102 | |
[RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
[RTC] rtc_boot_check Writeif_unlock | |
[RTC]switch to dcxo | |
[RTC] EOSC_Cali: RG_FQMTR_CKSEL=0x42 | |
[RTC] get_frequency_meter: input=0xF, ouput=811 | |
[RTC] EOSC_Cali: val=0x32B | |
[RTC] get_frequency_meter: input=0x7, ouput=701 | |
[RTC] EOSC_Cali: val=0x2BD | |
[RTC] get_frequency_meter: input=0xB, ouput=756 | |
[RTC] EOSC_Cali: val=0x2F4 | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] EOSC_Cali: val=0x310 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC_Cali: val=0x31D | |
[RTC] get_frequency_meter: input=0xD, ouput=784 | |
[RTC] get_frequency_meter: input=0xE, ouput=797 | |
[RTC] EOSC cali val = 0xDE4E | |
[RTC] RTC_SPAR0=0x0 | |
[RTC] XO_XMODE_M = 1 , XO_EN32K_M = 1 | |
[RTC] 32k-less mode | |
[RTC] rtc_2sec_reboot_check 0x2020, without 2sec reboot, type 0x0 | |
[RTC] rtc 2sec reboot is not enabled | |
[RTC] rtc_lpd_init RTC_CON=0x486 | |
[PMIC] pmic_init_setting end. v180413 | |
[MT6357] 1 6,61 | |
[MT6357] 1 2,45 | |
[MT6357] 1 1,48 | |
[MT6357] get volt 5, 61, 900000 | |
vsram_others = 900000 uV | |
[MT6357] get volt 3, 45, 800000 | |
vproc = 800000 uV | |
[MT6357] get volt 6, 61, 900000 | |
vsram_proc = 900000 uV | |
[MT6357] get volt 2, 45, 800000 | |
vcore = 800000 uV | |
[MT6357] get volt 1, 48, 800000 | |
vmodem = 800000 uV | |
[MT6357] 2 6,1 | |
[MT6357] 2 5,1 | |
[MT6357] 2 3,1 | |
[MT6357] 2 2,1 | |
[RGU] EMI_DCS_SUCCESS 0 | |
[RGU] DVFSRC_SUCCESS 0 | |
[RGU] MODE: 0x4D | |
[RGU] STA: 0x0 | |
[RGU] LENGTH: 0xFFE0 | |
[RGU] INTERVAL: 0xFFF | |
[RGU] SWSYSRST: 0x9000 | |
[RGU] LATCH_CTL: 0x0 | |
[RGU] NONRST_REG2: 0x0 | |
[RGU] DEBUG_CTL: 0x200F1 | |
[RGU] g_rgu_status: 0 (0x0) | |
[RGU] mtk_wdt_mode_config mode value=10, tmp:22000010 | |
[RGU] rst from: ? | |
[RGU] bypass pwrkey: wdt does not trigger rst | |
[RGU] mtk_wdt_reset_deglitch_enable: MTK_WDT_RSTDEG_EN1(8000A357), MTK_WDT_RSTDEG_EN2(800067D2) | |
[RGU] rgu_update_reg: 0, bits: 0xC000, addr: 0x10007040, val: | |
[MT6357] 2 8,0 | |
[MT6357] 2 7,0 | |
[set_dram_voltage]set dram voltage done!!! | |
[MT6357] 1 2,25 | |
[dramc]cold boot | |
[dramc] read off[2] = 6 1024 | |
[FAST_K] DramcSave_Time_For_Cal_Init SHU2, femmc_Ready=1 | |
[FAST_K] Bypass_RDDQC 1, Bypass_RXWINDOW=1, Bypass_TXWINDOW=1 | |
[CH0][RK0][1600][CBT] Best CA Vref 18, Window Min 57 at CA4, Window Sum 348 | |
[CH0][RK1][1600][CBT] Best CA Vref 18, Window Min 58 at CA4, Window Sum 354 | |
[CH0][RK0][1600][TX] Best Vref 13, Window Min 25 at DQ6, Window Sum 420 | |
[CH0][RK0][1600][RX] Best Vref 30, Window Min 49 at DQ8, Window Sum 850 | |
[CH0][RK1][1600][TX] Best Vref 15, Window Min 25 at DQ14, Window Sum 426 | |
[CH1][RK0][1600][CBT] Best CA Vre▒▒▒▒▒▒▒▒▒▒▒▒▒▒ |
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