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@nanase
Created January 30, 2015 15:40
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YM2203をNucleo-F401REで制御、初めて発音できた時点での制御プログラムです。
#include "mbed.h"
#include "stdint.h"
PwmOut out_phm(D3);
DigitalOut d0(D15), d1(D14), d2(D13), d3(D12), d4(D11), d5(D10), d6(D9);
DigitalInOut d7(D8);
DigitalOut a0(D4), cs(D2), wr(D5), rd(D7), ic(D6);
Serial pc(SERIAL_TX, SERIAL_RX);
void wait_cycle(int cycle) {
wait_us(cycle * 10); // 10 is temp
}
void set_dx(uint8_t data) {
d7 = data & 0x80;
d6 = data & 0x40;
d5 = data & 0x20;
d4 = data & 0x10;
d3 = data & 0x08;
d2 = data & 0x04;
d1 = data & 0x02;
d0 = data & 0x01;
}
bool is_busy() {
cs = 0;
rd = 0;
wr = 1;
a0 = 0;
wait_cycle(2);
d7.input();
d7.mode(PullDown);
// wait 4 cycles
wait_cycle(4);
bool res = (d7 == 1);
cs = 1;
d7.output();
return res;
}
void write_address(uint8_t address) {
rd = 1;
wr = 0;
a0 = 0;
set_dx(address);
cs = 0;
wait_cycle(2);
cs = 1;
if (address > 0x0f) {
// FM: wait 17 cycles
wait_cycle(17);
}
// SSG: no wait required
do {
wait_cycle(2);
} while(is_busy());
}
void write_register(uint8_t address, uint8_t data) {
rd = 1;
wr = 0;
a0 = 1;
set_dx(data);
cs = 0;
wait_cycle(2);
cs = 1;
if (address >= 0xa0) {
// FM1: wait 47 cycles
wait_cycle(47);
} else if (address > 0x0f) {
// FM2: wait 83 cycles
wait_cycle(83);
}
// SSG: no wait required
do {
wait_cycle(2);
} while(is_busy());
}
void write_data(uint8_t address, uint8_t data) {
write_address(address);
write_register(address, data);
}
void reset() {
cs = 1;
a0 = 0;
wr = 1;
rd = 0;
set_dx(0x00);
// reset start
ic = 0;
out_phm.period_us(2);
out_phm.write(0.5f);
wait_cycle(77);
// end of reset
ic = 1;
}
void ssg_tune(uint8_t ch, uint16_t tone) {
write_data(0x01 + ch * 2, (uint8_t)((tone >> 8) & 0x00ff));
write_data(0x00 + ch * 2, (uint8_t)(tone & 0x00ff));
}
int main() {
reset();
// FM
{
for (uint8_t ch = 0; ch < 1; ch ++) {
// DT1/ML
write_data(0x30 + ch, 0x08);
write_data(0x34 + ch, 0x04);
write_data(0x38 + ch, 0x04);
write_data(0x3c + ch, 0x04);
// TL
write_data(0x40 + ch, 0x1a);
write_data(0x44 + ch, 0x7f);
write_data(0x48 + ch, 0x7f);
write_data(0x4c + ch, 0x02);
// KS/AR
write_data(0x50 + ch, 0x1f);
write_data(0x54 + ch, 0x00);
write_data(0x58 + ch, 0x00);
write_data(0x5c + ch, 0x1f);
// DR
write_data(0x60 + ch, 0x00);
write_data(0x64 + ch, 0x1f);
write_data(0x68 + ch, 0x1f);
write_data(0x6c + ch, 0x00);
// SR
write_data(0x70 + ch, 0x00);
write_data(0x74 + ch, 0x1f);
write_data(0x78 + ch, 0x1f);
write_data(0x7c + ch, 0x1f);
// SL/RR
write_data(0x80 + ch, 0xf7);
write_data(0x84 + ch, 0xf7);
write_data(0x88 + ch, 0xf7);
write_data(0x8c + ch, 0xf7);
// FB/AR
write_data(0xb0 + ch, 0x32);
}
}
// SSG
{
write_data(0x00, 0x00);
write_data(0x01, 0x00);
write_data(0x02, 0x00);
write_data(0x03, 0x00);
write_data(0x04, 0x00);
write_data(0x05, 0x00);
write_data(0x06, 0x00);
write_data(0x07, 0x38);
write_data(0x08, 0x0f);
write_data(0x09, 0x0f);
write_data(0x0a, 0x0f);
write_data(0x0b, 0x30);
write_data(0x0c, 0x00);
write_data(0x0d, 0x04);
}
while(1) {
for (uint16_t i = 0x0000; i < 0x0800; i++) {
/*write_data(0x07, 0x38);
write_data(0x08, 0x0f);
write_data(0x09, 0x0f);
write_data(0x0a, 0x0f);
ssg_tune(0, i);
ssg_tune(1, i);
ssg_tune(2, i);*/
//write_data(0x06, (uint8_t)(i & 0xe0));
pc.printf("%4x : %d\r\n", i, i);
//write_data(0x00, i);
//write_data(0x02, i + 5);
//write_data(0x04, i + 10);
//write_data(0xa0, (uint8_t)i);
//write_data(0xa4, 0x00);
uint16_t k = 1000;
write_data(0xa0, (uint8_t)(k & 0x00ff));
write_data(0xa4, (uint8_t)((k >> 8) & 0x0007) | 0x18);
write_data(0x28, 0xf0);
write_data(0x28, 0xf1);
write_data(0x28, 0xf2);
//wait(0.125 * 0.25);
wait(1.0);
write_data(0x28, 0x00);
write_data(0x28, 0x01);
write_data(0x28, 0x02);
wait(1.0);
}
}
}
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