Created
September 5, 2023 15:08
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Hi1620 console efi log
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15@#&NOTICE: PL011_UART_BASE: | |
NOTICE: Booting Trusted Firmware | |
NOTICE: BL1: v2.0(release):LOG-uniBIOS_Hi1620_V200R002C20SPC001B023-98-g599589b-dirty | |
NOTICE: BL1: Built : | |
...............................................................................................NOTICE: BL1: Booting BL2 | |
ERROR: Hello Bl2 | |
NOTICE: BL2: v2.0(release):LOG-uniBIOS_Hi1620_V200R002C20SPC001B023-98-g599589b-dirty | |
NOTICE: BL2: Built : | |
NOTICE: BL1: Booting BL31 | |
12345NOTICE: BL31: v2.0(release):LOG-uniBIOS_Hi1620_V200R002C20SPC001B023-98-g599589b-dirty | |
NOTICE: BL31: Built : | |
NOTICE: M7 config in secure world start. | |
NOTICE: Socket=0 Firmware Address=399c0000 NCL Address=399a0000 | |
NOTICE: Config S0 NCL M7 start. | |
NOTICE: Done | |
.NOTICE: Config S0 NCL M7 done. | |
Adding EFI root bus | |
Adding PCI rAdding EFI root bus | |
Adding Adding EFI root bus | |
Removed PCI root bus | |
Removed EFI rRRNOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x0 domain_bit = 0x1 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x0 domain_bit = 0x1 Value to [dd3f973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x0 ClustIdx = 0x0 domain_bit = 0x1 Value to [3L].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x0 domain_bit = 0x2 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x0 domain_bit = 0x2 Value to [dd7f973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x0 ClustIdx = 0x0 domain_bit = 0x2 Value to [7L].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x0 domain_bit = 0x3 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x0 domain_bit = 0x3 Value to [ddff973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x0 ClustIdx = 0x0 domain_bit = 0x3 Value to [fL].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x1 domain_bit = 0x0 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x1 domain_bit = 0x0 Value to [dd1f973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x1 ClustIdx = 0x0 domain_bit = 0x0 Value to [10fL].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x1 domain_bit = 0x1 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x1 domain_bit = 0x1 Value to [dd3f973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x1 ClustIdx = 0x0 domain_bit = 0x1 Value to [30fL].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x1 domain_bit = 0x2 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x1 domain_bit = 0x2 Value to [dd7f973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x1 ClustIdx = 0x0 domain_bit = 0x2 Value to [70fL].. | |
NOTICE: [D06_nopmu_pwr_domain_on]:[39L] | |
NOTICE: [scpi_set_css_power_state]:[216L] Modify TB Boot Address to 3fc00000 | |
NOTICE: [scpi_set_css_power_state]:[296L] ulpos_mpidr = 0x1 domain_bit = 0x3 | |
NOTICE: [144l]Dieid = 0x3 ClusterID = 0x1 domain_bit = 0x3 Value to [ddff973dL].. | |
NOTICE: [123l]Dieid = 0x3 ClusterID = 0x1 ClustIdx = 0x0 domain_bit = 0x3 Value to [f0fL].. |
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