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December 16, 2020 23:19
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Minimal nMigen SERDES passthrough
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# Minimal nMigen code on a LFE5UM5G-25F-8BG381C (ECP5-5G Evaluation Kit) to get | |
# output on the TX of Channel 0 in Bank 0 straight from the FPGA fabric. The SERDES | |
# DCUA instance has a bajillion parameters/inputs but these are the ones you actually | |
# need for things to "work." Note that the output driver configuration is funky and | |
# I see a way weaker output drive than I expect here. | |
# | |
# Original inspiration thanks to: https://lab.ktemkin.com/post/serdes-lfps/, but wanted | |
# to get things working absent a larger USB3/PCIe picture. | |
m.submodules.dcu0 = Instance("DCUA", | |
a_LOC='DCU0', | |
a_CHAN='CH0', | |
a_BEL='X42/Y71/DCU', | |
# DCU Power Management | |
p_D_MACROPDB = "0b1", | |
p_D_IB_PWDNB = "0b1", | |
p_D_TXPLL_PWDNB = "0b1", | |
i_D_FFC_MACROPDB = 1, | |
# TX — power management | |
p_CH0_TPWDNB = "0b1", | |
i_CH0_FFC_TXPWDNB = 1, | |
# Driver power | |
p_CH0_TXAMPLITUDE="0d1000", # Apparently 1000mV, although I see 1/10th of that | |
p_CH0_RTERM_TX="0d19", # 50 ohm termination | |
p_CH0_TDRV_SLICE0_CUR = "0b111", # 800 uA | |
p_CH0_TDRV_SLICE0_SEL = "0b01", # main data | |
p_CH0_TDRV_SLICE1_CUR = "0b111", # 800 uA | |
p_CH0_TDRV_SLICE1_SEL = "0b01", # main data | |
p_CH0_TDRV_SLICE2_CUR = "0b11", # 3200 uA | |
p_CH0_TDRV_SLICE2_SEL = "0b01", # main data | |
p_CH0_TDRV_SLICE3_CUR = "0b11", # 3200 uA | |
p_CH0_TDRV_SLICE3_SEL = "0b01", # main data | |
p_CH0_TDRV_SLICE4_CUR = "0b11", # 3200 uA | |
p_CH0_TDRV_SLICE4_SEL = "0b01", # main data | |
p_CH0_TDRV_SLICE5_CUR = "0b11", # 800 uA | |
p_CH0_TDRV_SLICE5_SEL = "0b01", # main data | |
# TX Passthrough | |
p_CH0_LDR_CORE2TX_SEL=1, # Either always enabled the passthrough | |
#i_CH0_FFC_LDR_CORE2TX_EN=button, # Or enable via a button | |
i_CH0_LDR_CORE2TX=ClockSignal(), # The signal you actually want to send through | |
) |
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