Makefile skeleton

Makefile

# 	Makefile skeleton
#
#	$@ - The name of the target file (the one before the colon)
#	$< - The name of the first (or only) prerequisite file (the first one after the colon)
#	$^ - The names of all the prerequisite files (space separated)
#	$* - The stem (the bit which matches the % wildcard in the rule definition.

CC = gcc
CFLAGS  = -std=c99
CFLAGS += -Wall
CFLAGS += -Wextra
CFLAGS += -pedantic
CFLAGS += -Werror
CFLAGS += -g

CXX = clang++
CXXFLAGS = -std=c++1z
CXXFLAGS += -Wall
CXXFLAGS += -Wextra
CXXFLAGS += -pedantic
CXXFLAGS += -Werror
CXXFLAGS += -g

SRC = <FILL IN>
INC = <FILL IN>
OUT = main.out

.PHONY: cpp
cpp: cpp.out 

.PHONY: c
c: c.out 

.PHONY: clean
clean:
	rm -f *.o *.out

cpp.out: $(SRC) $(INC)
	$(CXX) $(CXXFLAGS) $(SRC) -o $(OUT)

c.out: $(SRC) $(INC)
	$(CC) $(CFLAGS) $(SRC) -o $(OUT)