Created
January 3, 2020 13:23
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| /dts-v1/; | |
| / { | |
| interrupt-parent = < 0x01 >; | |
| #address-cells = < 0x02 >; | |
| #size-cells = < 0x02 >; | |
| model = "Purism Librem 5"; | |
| compatible = "purism,librem5\0fsl,imx8mq"; | |
| aliases { | |
| gpio0 = "/soc@0/bus@30000000/gpio@30200000"; | |
| gpio1 = "/soc@0/bus@30000000/gpio@30210000"; | |
| gpio2 = "/soc@0/bus@30000000/gpio@30220000"; | |
| gpio3 = "/soc@0/bus@30000000/gpio@30230000"; | |
| gpio4 = "/soc@0/bus@30000000/gpio@30240000"; | |
| i2c0 = "/soc@0/bus@30800000/i2c@30a20000"; | |
| i2c1 = "/soc@0/bus@30800000/i2c@30a30000"; | |
| i2c2 = "/soc@0/bus@30800000/i2c@30a40000"; | |
| i2c3 = "/soc@0/bus@30800000/i2c@30a50000"; | |
| serial0 = "/soc@0/bus@30800000/serial@30860000"; | |
| serial1 = "/soc@0/bus@30800000/serial@30890000"; | |
| serial2 = "/soc@0/bus@30800000/serial@30880000"; | |
| serial3 = "/soc@0/bus@30800000/serial@30a60000"; | |
| spi0 = "/soc@0/bus@30800000/spi@30820000"; | |
| spi1 = "/soc@0/bus@30800000/spi@30830000"; | |
| spi2 = "/soc@0/bus@30800000/spi@30840000"; | |
| }; | |
| clock-ckil { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x8000 >; | |
| clock-output-names = "ckil"; | |
| phandle = < 0x17 >; | |
| }; | |
| clock-osc-25m { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x17d7840 >; | |
| clock-output-names = "osc_25m"; | |
| phandle = < 0x18 >; | |
| }; | |
| clock-osc-27m { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x19bfcc0 >; | |
| clock-output-names = "osc_27m"; | |
| phandle = < 0x19 >; | |
| }; | |
| clock-ext1 { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x7ed6b40 >; | |
| clock-output-names = "clk_ext1"; | |
| phandle = < 0x1a >; | |
| }; | |
| clock-ext2 { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x7ed6b40 >; | |
| clock-output-names = "clk_ext2"; | |
| phandle = < 0x1b >; | |
| }; | |
| clock-ext3 { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x7ed6b40 >; | |
| clock-output-names = "clk_ext3"; | |
| phandle = < 0x1c >; | |
| }; | |
| clock-ext4 { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x7ed6b40 >; | |
| clock-output-names = "clk_ext4"; | |
| phandle = < 0x1d >; | |
| }; | |
| cpus { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| cpu@0 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = < 0x00 >; | |
| clock-latency = < 0xee6c >; | |
| clocks = < 0x02 0x102 >; | |
| enable-method = "psci"; | |
| next-level-cache = < 0x03 >; | |
| operating-points-v2 = < 0x04 >; | |
| #cooling-cells = < 0x02 >; | |
| nvmem-cells = < 0x05 >; | |
| nvmem-cell-names = "speed_grade"; | |
| cpu-idle-states = < 0x06 >; | |
| phandle = < 0x08 >; | |
| }; | |
| cpu@1 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = < 0x01 >; | |
| clock-latency = < 0xee6c >; | |
| clocks = < 0x02 0x102 >; | |
| enable-method = "psci"; | |
| next-level-cache = < 0x03 >; | |
| operating-points-v2 = < 0x04 >; | |
| #cooling-cells = < 0x02 >; | |
| cpu-idle-states = < 0x06 >; | |
| phandle = < 0x09 >; | |
| }; | |
| cpu@2 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = < 0x02 >; | |
| clock-latency = < 0xee6c >; | |
| clocks = < 0x02 0x102 >; | |
| enable-method = "psci"; | |
| next-level-cache = < 0x03 >; | |
| operating-points-v2 = < 0x04 >; | |
| #cooling-cells = < 0x02 >; | |
| cpu-idle-states = < 0x06 >; | |
| phandle = < 0x0a >; | |
| }; | |
| cpu@3 { | |
| device_type = "cpu"; | |
| compatible = "arm,cortex-a53"; | |
| reg = < 0x03 >; | |
| clock-latency = < 0xee6c >; | |
| clocks = < 0x02 0x102 >; | |
| enable-method = "psci"; | |
| next-level-cache = < 0x03 >; | |
| operating-points-v2 = < 0x04 >; | |
| #cooling-cells = < 0x02 >; | |
| cpu-idle-states = < 0x06 >; | |
| phandle = < 0x0b >; | |
| }; | |
| l2-cache0 { | |
| compatible = "cache"; | |
| phandle = < 0x03 >; | |
| }; | |
| idle-states { | |
| entry-method = "psci"; | |
| cpu-sleep { | |
| compatible = "arm,idle-state"; | |
| arm,psci-suspend-param = < 0x10033 >; | |
| local-timer-stop; | |
| entry-latency-us = < 0x3e8 >; | |
| exit-latency-us = < 0x2bc >; | |
| min-residency-us = < 0xa8c >; | |
| wakeup-latency-us = < 0x5dc >; | |
| phandle = < 0x06 >; | |
| }; | |
| }; | |
| }; | |
| opp-table { | |
| compatible = "operating-points-v2"; | |
| opp-shared; | |
| phandle = < 0x04 >; | |
| opp-800000000 { | |
| opp-hz = < 0x00 0x2faf0800 >; | |
| opp-microvolt = < 0xdbba0 >; | |
| opp-supported-hw = < 0x0f 0x04 >; | |
| clock-latency-ns = < 0x249f0 >; | |
| }; | |
| opp-1000000000 { | |
| opp-hz = < 0x00 0x3b9aca00 >; | |
| opp-microvolt = < 0xdbba0 >; | |
| opp-supported-hw = < 0x0e 0x03 >; | |
| clock-latency-ns = < 0x249f0 >; | |
| }; | |
| opp-1300000000 { | |
| opp-hz = < 0x00 0x4d7c6d00 >; | |
| opp-microvolt = < 0xf4240 >; | |
| opp-supported-hw = < 0x0c 0x07 >; | |
| clock-latency-ns = < 0x249f0 >; | |
| }; | |
| opp-1500000000 { | |
| opp-hz = < 0x00 0x59682f00 >; | |
| opp-microvolt = < 0xf4240 >; | |
| opp-supported-hw = < 0x08 0x07 >; | |
| clock-latency-ns = < 0x249f0 >; | |
| }; | |
| }; | |
| ddrc-opp-table { | |
| compatible = "operating-points-v2"; | |
| phandle = < 0x66 >; | |
| opp-25M { | |
| opp-hz = < 0x00 0x17d7840 >; | |
| }; | |
| opp-100M { | |
| opp-hz = < 0x00 0x5f5e100 >; | |
| }; | |
| opp-800M { | |
| opp-hz = < 0x00 0x2faf0800 >; | |
| }; | |
| }; | |
| noc-opp-table { | |
| compatible = "operating-points-v2"; | |
| phandle = < 0x5a >; | |
| opp-133M { | |
| opp-hz = < 0x00 0x7f28155 >; | |
| }; | |
| opp-400M { | |
| opp-hz = < 0x00 0x17d78400 >; | |
| }; | |
| opp-800M { | |
| opp-hz = < 0x00 0x2faf0800 >; | |
| }; | |
| }; | |
| pmu { | |
| compatible = "arm,cortex-a53-pmu"; | |
| interrupts = < 0x01 0x07 0x04 >; | |
| interrupt-parent = < 0x07 >; | |
| interrupt-affinity = < 0x08 0x09 0x0a 0x0b >; | |
| }; | |
| psci { | |
| compatible = "arm,psci-1.0"; | |
| method = "smc"; | |
| }; | |
| thermal-zones { | |
| cpu-thermal { | |
| polling-delay-passive = < 0xfa >; | |
| polling-delay = < 0x7d0 >; | |
| thermal-sensors = < 0x0c 0x00 >; | |
| trips { | |
| cpu-alert { | |
| temperature = < 0x13880 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "passive"; | |
| phandle = < 0x0d >; | |
| }; | |
| cpu-crit { | |
| temperature = < 0x15f90 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "critical"; | |
| }; | |
| }; | |
| cooling-maps { | |
| map0 { | |
| trip = < 0x0d >; | |
| cooling-device = < 0x08 0xffffffff 0xffffffff 0x09 0xffffffff 0xffffffff 0x0a 0xffffffff 0xffffffff 0x0b 0xffffffff 0xffffffff >; | |
| }; | |
| }; | |
| }; | |
| gpu-thermal { | |
| polling-delay-passive = < 0xfa >; | |
| polling-delay = < 0x7d0 >; | |
| thermal-sensors = < 0x0c 0x01 >; | |
| trips { | |
| gpu-alert { | |
| temperature = < 0x13880 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "passive"; | |
| phandle = < 0x0e >; | |
| }; | |
| gpu-crit { | |
| temperature = < 0x15f90 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "critical"; | |
| }; | |
| }; | |
| cooling-maps { | |
| map0 { | |
| trip = < 0x0e >; | |
| cooling-device = < 0x0f 0xffffffff 0xffffffff >; | |
| }; | |
| }; | |
| }; | |
| vpu-thermal { | |
| polling-delay-passive = < 0xfa >; | |
| polling-delay = < 0x7d0 >; | |
| thermal-sensors = < 0x0c 0x02 >; | |
| trips { | |
| vpu-crit { | |
| temperature = < 0x15f90 >; | |
| hysteresis = < 0x7d0 >; | |
| type = "critical"; | |
| }; | |
| }; | |
| }; | |
| }; | |
| timer { | |
| compatible = "arm,armv8-timer"; | |
| interrupts = < 0x01 0x0d 0x08 0x01 0x0e 0x08 0x01 0x0b 0x08 0x01 0x0a 0x08 >; | |
| interrupt-parent = < 0x07 >; | |
| arm,no-tick-in-suspend; | |
| }; | |
| soc@0 { | |
| compatible = "simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x00 0x00 0x00 0x3e000000 >; | |
| dma-ranges = < 0x40000000 0x00 0x40000000 0xc0000000 >; | |
| bus@00000000 { | |
| compatible = "simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x00 0x00 0x20000 >; | |
| rom@00000000 { | |
| compatible = "fsl,imx8mq-bootrom"; | |
| reg = < 0x00 0x1e800 >; | |
| }; | |
| }; | |
| bus@30000000 { | |
| compatible = "fsl,imx8mq-aips-bus\0simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x30000000 0x30000000 0x400000 >; | |
| gpio@30200000 { | |
| compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio"; | |
| reg = < 0x30200000 0x10000 >; | |
| interrupts = < 0x00 0x40 0x04 0x00 0x41 0x04 >; | |
| clocks = < 0x02 0x103 >; | |
| gpio-controller; | |
| #gpio-cells = < 0x02 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x10 >; | |
| phandle = < 0x11 >; | |
| pmic_5v { | |
| gpio-hog; | |
| gpio = < 0x11 0x01 0x00 >; | |
| input; | |
| }; | |
| }; | |
| gpio@30210000 { | |
| compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio"; | |
| reg = < 0x30210000 0x10000 >; | |
| interrupts = < 0x00 0x42 0x04 0x00 0x43 0x04 >; | |
| clocks = < 0x02 0x104 >; | |
| gpio-controller; | |
| #gpio-cells = < 0x02 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| }; | |
| gpio@30220000 { | |
| compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio"; | |
| reg = < 0x30220000 0x10000 >; | |
| interrupts = < 0x00 0x44 0x04 0x00 0x45 0x04 >; | |
| clocks = < 0x02 0x105 >; | |
| gpio-controller; | |
| #gpio-cells = < 0x02 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| phandle = < 0x45 >; | |
| }; | |
| gpio@30230000 { | |
| compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio"; | |
| reg = < 0x30230000 0x10000 >; | |
| interrupts = < 0x00 0x46 0x04 0x00 0x47 0x04 >; | |
| clocks = < 0x02 0x106 >; | |
| gpio-controller; | |
| #gpio-cells = < 0x02 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| phandle = < 0x6a >; | |
| }; | |
| gpio@30240000 { | |
| compatible = "fsl,imx8mq-gpio\0fsl,imx35-gpio"; | |
| reg = < 0x30240000 0x10000 >; | |
| interrupts = < 0x00 0x48 0x04 0x00 0x49 0x04 >; | |
| clocks = < 0x02 0x107 >; | |
| gpio-controller; | |
| #gpio-cells = < 0x02 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x02 >; | |
| phandle = < 0x27 >; | |
| }; | |
| tmu@30260000 { | |
| compatible = "fsl,imx8mq-tmu"; | |
| reg = < 0x30260000 0x10000 >; | |
| interrupt = < 0x00 0x31 0x04 >; | |
| little-endian; | |
| fsl,tmu-range = < 0xb0000 0xa0026 0x80048 0x70061 >; | |
| fsl,tmu-calibration = < 0x00 0x23 0x01 0x29 0x02 0x2f 0x03 0x35 0x04 0x3d 0x05 0x43 0x06 0x4b 0x07 0x51 0x08 0x57 0x09 0x5f 0x0a 0x67 0x0b 0x6f 0x10000 0x1b 0x10001 0x23 0x10002 0x2b 0x10003 0x33 0x10004 0x3b 0x10005 0x43 0x10006 0x4b 0x10007 0x55 0x10008 0x5d 0x10009 0x67 0x1000a 0x70 0x20000 0x17 0x20001 0x23 0x20002 0x2d 0x20003 0x37 0x20004 0x41 0x20005 0x4b 0x20006 0x57 0x20007 0x63 0x20008 0x6f 0x30000 0x15 0x30001 0x21 0x30002 0x2d 0x30003 0x39 0x30004 0x45 0x30005 0x53 0x30006 0x5f 0x30007 0x71 >; | |
| #thermal-sensor-cells = < 0x01 >; | |
| phandle = < 0x0c >; | |
| }; | |
| watchdog@30280000 { | |
| compatible = "fsl,imx8mq-wdt\0fsl,imx21-wdt"; | |
| reg = < 0x30280000 0x10000 >; | |
| interrupts = < 0x00 0x4e 0x04 >; | |
| clocks = < 0x02 0xd4 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x12 >; | |
| fsl,ext-reset-output; | |
| }; | |
| watchdog@30290000 { | |
| compatible = "fsl,imx8mq-wdt\0fsl,imx21-wdt"; | |
| reg = < 0x30290000 0x10000 >; | |
| interrupts = < 0x00 0x4f 0x04 >; | |
| clocks = < 0x02 0xd5 >; | |
| status = "disabled"; | |
| }; | |
| watchdog@302a0000 { | |
| compatible = "fsl,imx8mq-wdt\0fsl,imx21-wdt"; | |
| reg = < 0x302a0000 0x10000 >; | |
| interrupts = < 0x00 0x0a 0x04 >; | |
| clocks = < 0x02 0xd6 >; | |
| status = "disabled"; | |
| }; | |
| sdma@302c0000 { | |
| compatible = "fsl,imx8mq-sdma\0fsl,imx7d-sdma"; | |
| reg = < 0x302c0000 0x10000 >; | |
| interrupts = < 0x00 0x67 0x04 >; | |
| clocks = < 0x02 0xe4 0x02 0xe4 >; | |
| clock-names = "ipg\0ahb"; | |
| #dma-cells = < 0x03 >; | |
| fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; | |
| phandle = < 0x13 >; | |
| }; | |
| sai@30030000 { | |
| compatible = "fsl,imx8mq-sai\0fsl,imx6sx-sai"; | |
| #sound-dai-cells = < 0x00 >; | |
| reg = < 0x30030000 0x10000 >; | |
| interrupts = < 0x00 0x5a 0x04 >; | |
| clocks = < 0x02 0xf3 0x02 0xf3 0x02 0xc9 0x02 0x00 0x02 0x00 >; | |
| clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3"; | |
| dmas = < 0x13 0x04 0x18 0x00 0x13 0x05 0x18 0x00 >; | |
| dma-names = "rx\0tx"; | |
| fsl,shared-interrupt; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x14 >; | |
| assigned-clocks = < 0x02 0x86 >; | |
| assigned-clock-parents = < 0x02 0x1b >; | |
| assigned-clock-rates = < 0x1770000 >; | |
| fsl,sai-synchronous-rx; | |
| phandle = < 0x82 >; | |
| }; | |
| lcdif@30320000 { | |
| compatible = "fsl,imx8mq-lcdif\0fsl,imx28-lcdif"; | |
| reg = < 0x30320000 0x10000 >; | |
| clocks = < 0x02 0x80 >; | |
| clock-names = "pix"; | |
| assigned-clocks = < 0x02 0x21 0x02 0x24 0x02 0x80 0x02 0x23 >; | |
| assigned-clock-parents = < 0x02 0x02 0x02 0x23 0x02 0x25 >; | |
| assigned-clock-rates = < 0x00 0x00 0x00 0x2367b880 >; | |
| interrupts = < 0x00 0x05 0x04 >; | |
| max-res = < 0x2d0 0x5a0 >; | |
| status = "okay"; | |
| port@0 { | |
| endpoint { | |
| remote-endpoint = < 0x15 >; | |
| phandle = < 0x37 >; | |
| }; | |
| }; | |
| }; | |
| iomuxc@30330000 { | |
| compatible = "fsl,imx8mq-iomuxc"; | |
| reg = < 0x30330000 0x10000 >; | |
| pmic5vgrp { | |
| fsl,pins = < 0x2c 0x294 0x00 0x00 0x00 0x80 >; | |
| phandle = < 0x10 >; | |
| }; | |
| spi1grp { | |
| fsl,pins = < 0x1f8 0x460 0x00 0x00 0x00 0x83 0x1fc 0x464 0x00 0x00 0x00 0x83 0x200 0x468 0x00 0x05 0x00 0x19 0x1f4 0x45c 0x00 0x00 0x00 0x83 0x24c 0x4b4 0x00 0x05 0x00 0x19 >; | |
| phandle = < 0x26 >; | |
| }; | |
| uart1grp { | |
| fsl,pins = < 0x234 0x49c 0x4f4 0x00 0x00 0x49 0x238 0x4a0 0x00 0x00 0x00 0x49 >; | |
| phandle = < 0x28 >; | |
| }; | |
| uart2grp { | |
| fsl,pins = < 0x240 0x4a8 0x00 0x00 0x00 0x49 0x23c 0x4a4 0x4fc 0x00 0x00 0x49 >; | |
| phandle = < 0x2a >; | |
| }; | |
| uart3grp { | |
| fsl,pins = < 0x244 0x4ac 0x504 0x00 0x02 0x49 0x248 0x4b0 0x00 0x00 0x00 0x49 >; | |
| phandle = < 0x29 >; | |
| }; | |
| uart4grp { | |
| fsl,pins = < 0x204 0x46c 0x50c 0x01 0x00 0x49 0x208 0x470 0x00 0x01 0x00 0x49 0x20c 0x474 0x00 0x01 0x00 0x49 0x210 0x478 0x508 0x01 0x01 0x49 >; | |
| phandle = < 0x50 >; | |
| }; | |
| sai2grp { | |
| fsl,pins = < 0x1c4 0x42c 0x00 0x00 0x00 0xd6 0x1bc 0x424 0x00 0x00 0x00 0xd6 0x1c8 0x430 0x00 0x00 0x00 0xd6 0x1b8 0x420 0x00 0x00 0x00 0xd6 0x1c0 0x428 0x00 0x00 0x00 0xd6 >; | |
| phandle = < 0x2c >; | |
| }; | |
| sai3grp { | |
| fsl,pins = < 0x1e0 0x448 0x00 0x00 0x00 0xd6 0x1dc 0x444 0x00 0x00 0x00 0xd6 0x1d4 0x43c 0x00 0x00 0x00 0xd6 0x1d8 0x440 0x00 0x00 0x00 0xd6 >; | |
| }; | |
| sai6grp { | |
| fsl,pins = < 0x178 0x3e0 0x514 0x02 0x00 0xd6 0x17c 0x3e4 0x518 0x02 0x00 0xd6 0x19c 0x404 0x510 0x01 0x01 0xd6 0x1a0 0x408 0x00 0x02 0x00 0xd6 >; | |
| phandle = < 0x14 >; | |
| }; | |
| ledbgrp { | |
| fsl,pins = < 0x5c 0x2c4 0x00 0x05 0x00 0x06 >; | |
| phandle = < 0x23 >; | |
| }; | |
| ledggrp { | |
| fsl,pins = < 0x1e4 0x44c 0x00 0x01 0x00 0x06 >; | |
| phandle = < 0x24 >; | |
| }; | |
| ledrgrp { | |
| fsl,pins = < 0x1e8 0x450 0x00 0x01 0x00 0x06 >; | |
| phandle = < 0x25 >; | |
| }; | |
| maggrp { | |
| fsl,pins = < 0x14c 0x3b4 0x00 0x05 0x00 0x80 >; | |
| phandle = < 0x44 >; | |
| }; | |
| i2c1grp { | |
| fsl,pins = < 0x214 0x47c 0x00 0x00 0x00 0x4000007f 0x218 0x480 0x00 0x00 0x00 0x4000007f >; | |
| phandle = < 0x39 >; | |
| }; | |
| i2c2grp { | |
| fsl,pins = < 0x21c 0x484 0x00 0x00 0x00 0x4000007f 0x220 0x488 0x00 0x00 0x00 0x4000007f >; | |
| phandle = < 0x41 >; | |
| }; | |
| i2c3grp { | |
| fsl,pins = < 0x224 0x48c 0x00 0x00 0x00 0x4000007f 0x228 0x490 0x00 0x00 0x00 0x4000007f >; | |
| phandle = < 0x48 >; | |
| }; | |
| i2c4grp { | |
| fsl,pins = < 0x22c 0x494 0x00 0x00 0x00 0x4000007f 0x230 0x498 0x00 0x00 0x00 0x4000007f >; | |
| phandle = < 0x4c >; | |
| }; | |
| btgrp { | |
| fsl,pins = < 0x1d0 0x438 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x7a >; | |
| }; | |
| chargeringrp { | |
| fsl,pins = < 0x100 0x368 0x00 0x05 0x00 0x80 0xf4 0x35c 0x00 0x05 0x00 0x80 >; | |
| phandle = < 0x4e >; | |
| }; | |
| chargergrp { | |
| fsl,pins = < 0xfc 0x364 0x00 0x05 0x00 0x03 0x104 0x36c 0x00 0x05 0x00 0x03 >; | |
| phandle = < 0x71 >; | |
| }; | |
| gaugegrp { | |
| fsl,pins = < 0x144 0x3ac 0x00 0x05 0x00 0x80 >; | |
| phandle = < 0x4d >; | |
| }; | |
| nfcgrp { | |
| fsl,pins = < 0x1cc 0x434 0x00 0x05 0x00 0x83 0x188 0x3f0 0x00 0x05 0x00 0x80 >; | |
| }; | |
| hswgrp { | |
| fsl,pins = < 0x184 0x3ec 0x00 0x05 0x00 0x180 0x160 0x3c8 0x00 0x05 0x00 0x180 0x15c 0x3c4 0x00 0x05 0x00 0x180 >; | |
| phandle = < 0x69 >; | |
| }; | |
| wifigrp { | |
| fsl,pins = < 0xf0 0x358 0x00 0x05 0x00 0x80 >; | |
| }; | |
| wwanpwrgrp { | |
| fsl,pins = < 0x13c 0x3a4 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x76 >; | |
| }; | |
| wwangrp { | |
| fsl,pins = < 0xf8 0x360 0x00 0x05 0x00 0x83 0x134 0x39c 0x00 0x05 0x00 0x83 0x128 0x390 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x78 >; | |
| }; | |
| keysgrp { | |
| fsl,pins = < 0x130 0x398 0x00 0x05 0x00 0x80 0x108 0x370 0x00 0x05 0x00 0x1c0 0x6c 0x2d4 0x00 0x05 0x00 0x1c0 0x68 0x2d0 0x00 0x05 0x00 0x1c0 >; | |
| phandle = < 0x67 >; | |
| }; | |
| cameragrp { | |
| fsl,pins = < 0x64 0x2cc 0x00 0x06 0x00 0x1f >; | |
| }; | |
| proxgrp { | |
| fsl,pins = < 0x110 0x378 0x00 0x05 0x00 0x80 >; | |
| phandle = < 0x46 >; | |
| }; | |
| hpgrp { | |
| fsl,pins = < 0x118 0x380 0x00 0x05 0x00 0x180 >; | |
| phandle = < 0x68 >; | |
| }; | |
| hubpwrgrp { | |
| fsl,pins = < 0x60 0x2c8 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x7b >; | |
| }; | |
| hubnresetgrp { | |
| fsl,pins = < 0x58 0x2c0 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x6f >; | |
| }; | |
| usbgrp { | |
| fsl,pins = < 0x104 0x36c 0x00 0x05 0x00 0x83 0x58 0x2c0 0x00 0x00 0x00 0x83 0x140 0x3a8 0x00 0x05 0x00 0x83 >; | |
| }; | |
| wifipwrgrp { | |
| fsl,pins = < 0x11c 0x384 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x77 >; | |
| }; | |
| gpspwrgrp { | |
| fsl,pins = < 0x124 0x38c 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x73 >; | |
| }; | |
| gpsgrp { | |
| fsl,pins = < 0x48 0x2b0 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x74 >; | |
| }; | |
| hapticgrp { | |
| fsl,pins = < 0x1f0 0x458 0x00 0x01 0x00 0x83 >; | |
| phandle = < 0x22 >; | |
| }; | |
| usdhc1grp { | |
| fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x83 0xa4 0x30c 0x00 0x00 0x00 0xc3 0xa8 0x310 0x00 0x00 0x00 0xc3 0xac 0x314 0x00 0x00 0x00 0xc3 0xb0 0x318 0x00 0x00 0x00 0xc3 0xb4 0x31c 0x00 0x00 0x00 0xc3 0xb8 0x320 0x00 0x00 0x00 0xc3 0xbc 0x324 0x00 0x00 0x00 0xc3 0xc0 0x328 0x00 0x00 0x00 0xc3 0xc4 0x32c 0x00 0x00 0x00 0xc3 0xcc 0x334 0x00 0x00 0x00 0x83 0xc8 0x330 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x51 >; | |
| }; | |
| usdhc1grp100mhz { | |
| fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x8d 0xa4 0x30c 0x00 0x00 0x00 0xcd 0xa8 0x310 0x00 0x00 0x00 0xcd 0xac 0x314 0x00 0x00 0x00 0xcd 0xb0 0x318 0x00 0x00 0x00 0xcd 0xb4 0x31c 0x00 0x00 0x00 0xcd 0xb8 0x320 0x00 0x00 0x00 0xcd 0xbc 0x324 0x00 0x00 0x00 0xcd 0xc0 0x328 0x00 0x00 0x00 0xcd 0xc4 0x32c 0x00 0x00 0x00 0xcd 0xcc 0x334 0x00 0x00 0x00 0x8d 0xc8 0x330 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x52 >; | |
| }; | |
| usdhc1grp200mhz { | |
| fsl,pins = < 0xa0 0x308 0x00 0x00 0x00 0x9f 0xa4 0x30c 0x00 0x00 0x00 0xdf 0xa8 0x310 0x00 0x00 0x00 0xdf 0xac 0x314 0x00 0x00 0x00 0xdf 0xb0 0x318 0x00 0x00 0x00 0xdf 0xb4 0x31c 0x00 0x00 0x00 0xdf 0xb8 0x320 0x00 0x00 0x00 0xdf 0xbc 0x324 0x00 0x00 0x00 0xdf 0xc0 0x328 0x00 0x00 0x00 0xdf 0xc4 0x32c 0x00 0x00 0x00 0xdf 0xcc 0x334 0x00 0x00 0x00 0x9f 0xc8 0x330 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x53 >; | |
| }; | |
| usdhc2grp { | |
| fsl,pins = < 0xd0 0x338 0x00 0x00 0x00 0x80 0xd4 0x33c 0x00 0x00 0x00 0x83 0xd8 0x340 0x00 0x00 0x00 0xc3 0xdc 0x344 0x00 0x00 0x00 0xc3 0xe0 0x348 0x00 0x00 0x00 0xc3 0xe4 0x34c 0x00 0x00 0x00 0xc3 0xe8 0x350 0x00 0x00 0x00 0xc3 0xec 0x354 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x55 >; | |
| }; | |
| usdhc2grp100mhz { | |
| fsl,pins = < 0xd0 0x338 0x00 0x00 0x00 0x80 0xd4 0x33c 0x00 0x00 0x00 0x8d 0xd8 0x340 0x00 0x00 0x00 0xcd 0xdc 0x344 0x00 0x00 0x00 0xcd 0xe0 0x348 0x00 0x00 0x00 0xcd 0xe4 0x34c 0x00 0x00 0x00 0xcd 0xe8 0x350 0x00 0x00 0x00 0xcd 0xec 0x354 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x56 >; | |
| }; | |
| usdhc2grp200mhz { | |
| fsl,pins = < 0xd0 0x338 0x00 0x00 0x00 0x80 0xd4 0x33c 0x00 0x00 0x00 0x9f 0xd8 0x340 0x00 0x00 0x00 0xcf 0xdc 0x344 0x00 0x00 0x00 0xcf 0xe0 0x348 0x00 0x00 0x00 0xcf 0xe4 0x34c 0x00 0x00 0x00 0xcf 0xe8 0x350 0x00 0x00 0x00 0xcf 0xec 0x354 0x00 0x00 0x00 0xc1 >; | |
| phandle = < 0x57 >; | |
| }; | |
| rtcgrp { | |
| fsl,pins = < 0x4c 0x2b4 0x00 0x00 0x00 0x80 >; | |
| phandle = < 0x40 >; | |
| }; | |
| tcpcgrp { | |
| fsl,pins = < 0x50 0x2b8 0x00 0x00 0x00 0x80 >; | |
| phandle = < 0x3d >; | |
| }; | |
| typecgrp { | |
| fsl,pins = < 0x54 0x2bc 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x3c >; | |
| }; | |
| blgrp { | |
| fsl,pins = < 0x12c 0x394 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x4b >; | |
| }; | |
| smcgrp { | |
| fsl,pins = < 0x40 0x2a8 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x72 >; | |
| }; | |
| pmicgrp { | |
| fsl,pins = < 0x44 0x2ac 0x00 0x00 0x00 0x80 >; | |
| phandle = < 0x3a >; | |
| }; | |
| sdpwrgrp { | |
| fsl,pins = < 0x34 0x29c 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x70 >; | |
| }; | |
| audiopwrgrp { | |
| fsl,pins = < 0x38 0x2a0 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x7c >; | |
| }; | |
| dsiengrp { | |
| fsl,pins = < 0x3c 0x2a4 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x7e >; | |
| }; | |
| dsibiasengrp { | |
| fsl,pins = < 0x78 0x2e0 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x7f >; | |
| }; | |
| dsirstgrp { | |
| fsl,pins = < 0x9c 0x304 0x00 0x05 0x00 0x83 0x98 0x300 0x00 0x05 0x00 0x83 0x88 0x2f0 0x00 0x05 0x00 0x83 0x94 0x2fc 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x31 >; | |
| }; | |
| hallgrp { | |
| fsl,pins = < 0x70 0x2d8 0x00 0x05 0x00 0x80 >; | |
| }; | |
| wdoggrp { | |
| fsl,pins = < 0x30 0x298 0x00 0x00 0x00 0x80 >; | |
| phandle = < 0x12 >; | |
| }; | |
| flashpwrgrp { | |
| fsl,pins = < 0x84 0x2ec 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x75 >; | |
| }; | |
| flashgrp { | |
| fsl,pins = < 0x7c 0x2e4 0x00 0x05 0x00 0x83 >; | |
| phandle = < 0x6e >; | |
| }; | |
| camerapwrgrp { | |
| fsl,pins = < 0x28 0x290 0x00 0x00 0x00 0x83 >; | |
| phandle = < 0x79 >; | |
| }; | |
| csigrp { | |
| fsl,pins = < 0x8c 0x2f4 0x00 0x05 0x00 0x83 0x90 0x2f8 0x00 0x05 0x00 0x83 >; | |
| }; | |
| }; | |
| syscon@30340000 { | |
| compatible = "fsl,imx8mq-iomuxc-gpr\0fsl,imx6q-iomuxc-gpr\0syscon\0simple-mfd"; | |
| reg = < 0x30340000 0x10000 >; | |
| mux-controller { | |
| compatible = "mmio-mux"; | |
| #mux-control-cells = < 0x01 >; | |
| mux-reg-masks = < 0x34 0x04 >; | |
| phandle = < 0x2f >; | |
| }; | |
| }; | |
| ocotp-ctrl@30350000 { | |
| compatible = "fsl,imx8mq-ocotp\0syscon"; | |
| reg = < 0x30350000 0x10000 >; | |
| clocks = < 0x02 0xfa >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| speed-grade@10 { | |
| reg = < 0x10 0x04 >; | |
| phandle = < 0x05 >; | |
| }; | |
| }; | |
| syscon@30360000 { | |
| compatible = "fsl,imx8mq-anatop\0syscon"; | |
| reg = < 0x30360000 0x10000 >; | |
| interrupts = < 0x00 0x31 0x04 >; | |
| }; | |
| snvs@30370000 { | |
| compatible = "fsl,sec-v4.0-mon\0syscon\0simple-mfd"; | |
| reg = < 0x30370000 0x10000 >; | |
| phandle = < 0x16 >; | |
| snvs-rtc-lp { | |
| compatible = "fsl,sec-v4.0-mon-rtc-lp"; | |
| regmap = < 0x16 >; | |
| offset = < 0x34 >; | |
| interrupts = < 0x00 0x13 0x04 0x00 0x14 0x04 >; | |
| clocks = < 0x02 0x108 >; | |
| clock-names = "snvs-rtc"; | |
| status = "disabled"; | |
| }; | |
| snvs-powerkey { | |
| compatible = "fsl,sec-v4.0-pwrkey"; | |
| regmap = < 0x16 >; | |
| interrupts = < 0x00 0x04 0x04 >; | |
| linux,keycode = < 0x74 >; | |
| wakeup-source; | |
| status = "okay"; | |
| }; | |
| }; | |
| clock-controller@30380000 { | |
| compatible = "fsl,imx8mq-ccm"; | |
| reg = < 0x30380000 0x10000 >; | |
| interrupts = < 0x00 0x55 0x04 0x00 0x56 0x04 >; | |
| #clock-cells = < 0x01 >; | |
| clocks = < 0x17 0x18 0x19 0x1a 0x1b 0x1c 0x1d >; | |
| clock-names = "ckil\0osc_25m\0osc_27m\0clk_ext1\0clk_ext2\0clk_ext3\0clk_ext4"; | |
| assigned-clocks = < 0x02 0x19 0x02 0x1e >; | |
| assigned-clock-rates = < 0x2ee00000 0x2b110000 >; | |
| phandle = < 0x02 >; | |
| }; | |
| reset-controller@30390000 { | |
| compatible = "fsl,imx8mq-src\0syscon"; | |
| reg = < 0x30390000 0x10000 >; | |
| #reset-cells = < 0x01 >; | |
| phandle = < 0x2e >; | |
| }; | |
| gpc@303a0000 { | |
| compatible = "fsl,imx8mq-gpc"; | |
| reg = < 0x303a0000 0x10000 >; | |
| interrupt-parent = < 0x07 >; | |
| interrupt-controller; | |
| broken-wake-request-signals; | |
| #interrupt-cells = < 0x03 >; | |
| phandle = < 0x01 >; | |
| pgc { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| power-domain@0 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x00 >; | |
| power-supply = < 0x1e >; | |
| phandle = < 0x2d >; | |
| }; | |
| power-domain@1 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x01 >; | |
| power-domains = < 0x1f >; | |
| phandle = < 0x64 >; | |
| }; | |
| power-domain@2 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x02 >; | |
| phandle = < 0x5e >; | |
| }; | |
| power-domain@3 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x03 >; | |
| phandle = < 0x62 >; | |
| }; | |
| power-domain@4 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x04 >; | |
| }; | |
| power-domain@5 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x05 >; | |
| clocks = < 0x02 0xd7 0x02 0x66 0x02 0x6f 0x02 0x70 >; | |
| power-supply = < 0x20 >; | |
| phandle = < 0x5c >; | |
| }; | |
| power-domain@6 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x06 >; | |
| power-supply = < 0x21 >; | |
| }; | |
| power-domain@7 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x07 >; | |
| }; | |
| power-domain@8 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x08 >; | |
| }; | |
| power-domain@9 { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x09 >; | |
| }; | |
| power-domain@a { | |
| #power-domain-cells = < 0x00 >; | |
| reg = < 0x0a >; | |
| phandle = < 0x1f >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| bus@30400000 { | |
| compatible = "fsl,imx8mq-aips-bus\0simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x30400000 0x30400000 0x400000 >; | |
| pwm@30660000 { | |
| compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm"; | |
| reg = < 0x30660000 0x10000 >; | |
| interrupts = < 0x00 0x51 0x04 >; | |
| clocks = < 0x02 0xbf 0x02 0xbf >; | |
| clock-names = "ipg\0per"; | |
| #pwm-cells = < 0x02 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x22 >; | |
| phandle = < 0x84 >; | |
| }; | |
| pwm@30670000 { | |
| compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm"; | |
| reg = < 0x30670000 0x10000 >; | |
| interrupts = < 0x00 0x52 0x04 >; | |
| clocks = < 0x02 0xc0 0x02 0xc0 >; | |
| clock-names = "ipg\0per"; | |
| #pwm-cells = < 0x02 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x23 >; | |
| phandle = < 0x6b >; | |
| }; | |
| pwm@30680000 { | |
| compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm"; | |
| reg = < 0x30680000 0x10000 >; | |
| interrupts = < 0x00 0x53 0x04 >; | |
| clocks = < 0x02 0xc1 0x02 0xc1 >; | |
| clock-names = "ipg\0per"; | |
| #pwm-cells = < 0x02 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x24 >; | |
| phandle = < 0x6c >; | |
| }; | |
| pwm@30690000 { | |
| compatible = "fsl,imx8mq-pwm\0fsl,imx27-pwm"; | |
| reg = < 0x30690000 0x10000 >; | |
| interrupts = < 0x00 0x54 0x04 >; | |
| clocks = < 0x02 0xc2 0x02 0xc2 >; | |
| clock-names = "ipg\0per"; | |
| #pwm-cells = < 0x02 >; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x25 >; | |
| phandle = < 0x6d >; | |
| }; | |
| }; | |
| bus@30800000 { | |
| compatible = "fsl,imx8mq-aips-bus\0simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x30800000 0x30800000 0x400000 0x8000000 0x8000000 0x10000000 >; | |
| spi@30820000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi"; | |
| reg = < 0x30820000 0x10000 >; | |
| interrupts = < 0x00 0x1f 0x04 >; | |
| clocks = < 0x02 0xb3 0x02 0xb3 >; | |
| clock-names = "ipg\0per"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x26 >; | |
| cs-gpios = < 0x27 0x09 0x00 >; | |
| flash@0 { | |
| compatible = "jedec,spi-nor"; | |
| spi-max-frequency = < 0xf4240 >; | |
| reg = < 0x00 >; | |
| }; | |
| }; | |
| spi@30830000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi"; | |
| reg = < 0x30830000 0x10000 >; | |
| interrupts = < 0x00 0x20 0x04 >; | |
| clocks = < 0x02 0xb4 0x02 0xb4 >; | |
| clock-names = "ipg\0per"; | |
| status = "disabled"; | |
| }; | |
| spi@30840000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-ecspi\0fsl,imx51-ecspi"; | |
| reg = < 0x30840000 0x10000 >; | |
| interrupts = < 0x00 0x21 0x04 >; | |
| clocks = < 0x02 0xb5 0x02 0xb5 >; | |
| clock-names = "ipg\0per"; | |
| status = "disabled"; | |
| }; | |
| serial@30860000 { | |
| compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart"; | |
| reg = < 0x30860000 0x10000 >; | |
| interrupts = < 0x00 0x1a 0x04 >; | |
| clocks = < 0x02 0xca 0x02 0xca >; | |
| clock-names = "ipg\0per"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x28 >; | |
| }; | |
| serial@30880000 { | |
| compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart"; | |
| reg = < 0x30880000 0x10000 >; | |
| interrupts = < 0x00 0x1c 0x04 >; | |
| clocks = < 0x02 0xcc 0x02 0xcc >; | |
| clock-names = "ipg\0per"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x29 >; | |
| }; | |
| serial@30890000 { | |
| compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart"; | |
| reg = < 0x30890000 0x10000 >; | |
| interrupts = < 0x00 0x1b 0x04 >; | |
| clocks = < 0x02 0xcb 0x02 0xcb >; | |
| clock-names = "ipg\0per"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x2a >; | |
| }; | |
| sai@308b0000 { | |
| #sound-dai-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-sai"; | |
| reg = < 0x308b0000 0x10000 >; | |
| interrupts = < 0x00 0x60 0x04 >; | |
| clocks = < 0x02 0xef 0x02 0xef 0x02 0xc5 0x02 0x00 0x02 0x00 >; | |
| clock-names = "bus\0mclk0\0mclk1\0mclk2\0mclk3"; | |
| dmas = < 0x2b 0x0a 0x18 0x00 0x2b 0x0b 0x18 0x00 >; | |
| dma-names = "rx\0tx"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x2c >; | |
| assigned-clocks = < 0x02 0x82 >; | |
| assigned-clock-parents = < 0x02 0x1b >; | |
| assigned-clock-rates = < 0x1770000 >; | |
| phandle = < 0x80 >; | |
| }; | |
| mipi_dsi@30a00000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-nwl-dsi"; | |
| reg = < 0x30a00000 0x300 >; | |
| clocks = < 0x02 0xa3 0x02 0xf4 0x02 0xf5 0x02 0xa4 >; | |
| clock-names = "core\0rx_esc\0tx_esc\0phy_ref"; | |
| assigned-clocks = < 0x02 0xf4 0x02 0xa3 0x02 0xf5 >; | |
| assigned-clock-parents = < 0x02 0x47 0x02 0x4c >; | |
| assigned-clock-rates = < 0x4c4b400 0xfdad680 0x1312d00 >; | |
| interrupts = < 0x00 0x22 0x04 >; | |
| power-domains = < 0x2d >; | |
| resets = < 0x2e 0x15 0x2e 0x17 0x2e 0x18 0x2e 0x19 >; | |
| reset-names = "byte\0dpi\0esc\0pclk"; | |
| mux-controls = < 0x2f 0x00 >; | |
| phys = < 0x30 >; | |
| phy-names = "dphy"; | |
| status = "okay"; | |
| panel@0 { | |
| compatible = "mantix,mlaf057we51-x"; | |
| reg = < 0x00 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x31 >; | |
| avdd-supply = < 0x32 >; | |
| avee-supply = < 0x33 >; | |
| vddi-supply = < 0x34 >; | |
| backlight = < 0x35 >; | |
| reset-gpios = < 0x11 0x1d 0x01 >; | |
| tpreset-gpios = < 0x11 0x18 0x01 >; | |
| dsi-bias-gpios = < 0x11 0x14 0x00 >; | |
| port { | |
| endpoint { | |
| remote-endpoint = < 0x36 >; | |
| phandle = < 0x38 >; | |
| }; | |
| }; | |
| }; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| #size-cells = < 0x00 >; | |
| #address-cells = < 0x01 >; | |
| reg = < 0x00 >; | |
| endpoint@0 { | |
| reg = < 0x00 >; | |
| remote-endpoint = < 0x37 >; | |
| phandle = < 0x15 >; | |
| }; | |
| }; | |
| port@1 { | |
| reg = < 0x01 >; | |
| endpoint { | |
| remote-endpoint = < 0x38 >; | |
| phandle = < 0x36 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| dphy@30a00300 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-mipi-dphy"; | |
| reg = < 0x30a00300 0x100 >; | |
| clocks = < 0x02 0xa4 >; | |
| clock-names = "phy_ref"; | |
| assigned-clocks = < 0x02 0x21 0x02 0x24 0x02 0xa4 0x02 0x23 >; | |
| assigned-clock-parents = < 0x02 0x02 0x02 0x23 0x02 0x25 >; | |
| assigned-clock-rates = < 0x00 0x00 0x16e3600 >; | |
| power-domains = < 0x2d >; | |
| #phy-cells = < 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x30 >; | |
| }; | |
| i2c@30a20000 { | |
| compatible = "fsl,imx8mq-i2c\0fsl,imx21-i2c"; | |
| reg = < 0x30a20000 0x10000 >; | |
| interrupts = < 0x00 0x23 0x04 >; | |
| clocks = < 0x02 0xb8 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| status = "okay"; | |
| clock-frequency = < 0x186a0 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x39 >; | |
| pmic@4b { | |
| compatible = "rohm,bd71837"; | |
| reg = < 0x4b >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x3a >; | |
| clocks = < 0x3b >; | |
| clock-names = "osc"; | |
| clock-output-names = "pmic_clk"; | |
| interrupt-parent = < 0x11 >; | |
| interrupts = < 0x07 0x01 >; | |
| interrupt-names = "irq"; | |
| rohm,reset-snvs-powered; | |
| regulators { | |
| BUCK1 { | |
| regulator-name = "buck1"; | |
| regulator-min-microvolt = < 0xaae60 >; | |
| regulator-max-microvolt = < 0x13d620 >; | |
| regulator-boot-on; | |
| regulator-ramp-delay = < 0x4e2 >; | |
| rohm,dvs-run-voltage = < 0xdbba0 >; | |
| rohm,dvs-idle-voltage = < 0xcf850 >; | |
| rohm,dvs-suspend-voltage = < 0xc3500 >; | |
| regulator-always-on; | |
| }; | |
| BUCK2 { | |
| regulator-name = "buck2"; | |
| regulator-min-microvolt = < 0xaae60 >; | |
| regulator-max-microvolt = < 0x13d620 >; | |
| regulator-boot-on; | |
| regulator-ramp-delay = < 0x4e2 >; | |
| rohm,dvs-run-voltage = < 0xf4240 >; | |
| rohm,dvs-idle-voltage = < 0xdbba0 >; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| BUCK3 { | |
| regulator-name = "buck3"; | |
| regulator-min-microvolt = < 0xaae60 >; | |
| regulator-max-microvolt = < 0x13d620 >; | |
| regulator-boot-on; | |
| rohm,dvs-run-voltage = < 0xf4240 >; | |
| phandle = < 0x20 >; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| BUCK4 { | |
| regulator-name = "buck4"; | |
| regulator-min-microvolt = < 0xaae60 >; | |
| regulator-max-microvolt = < 0x13d620 >; | |
| rohm,dvs-run-voltage = < 0xf4240 >; | |
| phandle = < 0x21 >; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| BUCK5 { | |
| regulator-name = "buck5"; | |
| regulator-min-microvolt = < 0xaae60 >; | |
| regulator-max-microvolt = < 0x149970 >; | |
| regulator-boot-on; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| BUCK6 { | |
| regulator-name = "buck6"; | |
| regulator-min-microvolt = < 0x2dc6c0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| BUCK7 { | |
| regulator-name = "buck7"; | |
| regulator-min-microvolt = < 0x187d88 >; | |
| regulator-max-microvolt = < 0x1e70f8 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| BUCK8 { | |
| regulator-name = "buck8"; | |
| regulator-min-microvolt = < 0xc3500 >; | |
| regulator-max-microvolt = < 0x155cc0 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| LDO1 { | |
| regulator-name = "ldo1"; | |
| regulator-min-microvolt = < 0x2dc6c0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| LDO2 { | |
| regulator-name = "ldo2"; | |
| regulator-min-microvolt = < 0xdbba0 >; | |
| regulator-max-microvolt = < 0xdbba0 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| LDO3 { | |
| regulator-name = "ldo3"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| LDO4 { | |
| regulator-name = "ldo4"; | |
| regulator-min-microvolt = < 0xdbba0 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| }; | |
| LDO5 { | |
| regulator-name = "ldo5"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| regulator-always-on; | |
| phandle = < 0x1e >; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| LDO6 { | |
| regulator-name = "ldo6"; | |
| regulator-min-microvolt = < 0xdbba0 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| regulator-boot-on; | |
| regulator-always-on; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| LDO7 { | |
| regulator-name = "ldo7"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| regulator-boot-on; | |
| regulator-state-mem { | |
| regulator-off-in-suspend; | |
| }; | |
| }; | |
| }; | |
| }; | |
| usb_pd@3f { | |
| compatible = "ti,tps6598x"; | |
| reg = < 0x3f >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x3c 0x3d >; | |
| interrupt-parent = < 0x11 >; | |
| interrupts = < 0x0a 0x08 >; | |
| connector { | |
| compatible = "usb-c-connector"; | |
| label = "USB-C"; | |
| data-role = "dual"; | |
| power-role = "dual"; | |
| try-power-role = "sink"; | |
| source-pdos = < 0x260190c8 >; | |
| sink-pdos = < 0x2601912c 0x2603c0a0 0x2602d0dc 0x8f01792c >; | |
| op-sink-microwatt = < 0x1312d00 >; | |
| ports { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| port@0 { | |
| reg = < 0x00 >; | |
| endpoint { | |
| remote-endpoint = < 0x3e >; | |
| phandle = < 0x5f >; | |
| }; | |
| }; | |
| port@1 { | |
| reg = < 0x01 >; | |
| endpoint { | |
| remote-endpoint = < 0x3f >; | |
| phandle = < 0x60 >; | |
| }; | |
| }; | |
| }; | |
| }; | |
| }; | |
| rtc@68 { | |
| compatible = "microcrystal,rv4162"; | |
| reg = < 0x68 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x40 >; | |
| interrupt-parent = < 0x11 >; | |
| interrupts = < 0x09 0x08 >; | |
| }; | |
| }; | |
| i2c@30a30000 { | |
| compatible = "fsl,imx8mq-i2c\0fsl,imx21-i2c"; | |
| reg = < 0x30a30000 0x10000 >; | |
| interrupts = < 0x00 0x24 0x04 >; | |
| clocks = < 0x02 0xb9 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| status = "okay"; | |
| clock-frequency = < 0x5e7b8 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x41 >; | |
| accel_gyro@6a { | |
| compatible = "st,lsm9ds1"; | |
| reg = < 0x6a >; | |
| vdd-supply = < 0x42 >; | |
| vddio-supply = < 0x43 >; | |
| }; | |
| magnetometer@1e { | |
| compatible = "st,lsm9ds1-magn"; | |
| reg = < 0x1e >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x44 >; | |
| interrupt-parent = < 0x45 >; | |
| interrupts = < 0x16 0x08 >; | |
| vdd-supply = < 0x42 >; | |
| vddio-supply = < 0x43 >; | |
| }; | |
| flash@53 { | |
| compatible = "lm3560"; | |
| reg = < 0x53 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| flash@0 { | |
| reg = < 0x00 >; | |
| flash-timeout-us = < 0x249f0 >; | |
| flash-max-microamp = < 0x4e200 >; | |
| led-max-microamp = < 0xea60 >; | |
| label = "lm3560:flash"; | |
| }; | |
| torch@1 { | |
| reg = < 0x01 >; | |
| led-max-microamp = < 0x2710 >; | |
| label = "lm3560:torch"; | |
| }; | |
| }; | |
| prox@60 { | |
| compatible = "vishay,vcnl4040\0vishay,vcnl4200"; | |
| reg = < 0x60 >; | |
| pinctrl-0 = < 0x46 >; | |
| interrupt-parent = < 0x45 >; | |
| interrupts = < 0x07 0x08 >; | |
| }; | |
| regulator@3e { | |
| compatible = "tps65132"; | |
| reg = < 0x3e >; | |
| outp { | |
| regulator-name = "lcd_avdd"; | |
| vin-supply = < 0x47 >; | |
| phandle = < 0x32 >; | |
| }; | |
| outn { | |
| regulator-name = "lcd_avee"; | |
| vin-supply = < 0x47 >; | |
| phandle = < 0x33 >; | |
| }; | |
| }; | |
| }; | |
| i2c@30a40000 { | |
| compatible = "fsl,imx8mq-i2c\0fsl,imx21-i2c"; | |
| reg = < 0x30a40000 0x10000 >; | |
| interrupts = < 0x00 0x25 0x04 >; | |
| clocks = < 0x02 0xba >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| status = "okay"; | |
| clock-frequency = < 0x5e7b8 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x48 >; | |
| camera1@20 { | |
| reg = < 0x20 >; | |
| status = "disabled"; | |
| }; | |
| touchscreen@38 { | |
| compatible = "edt,edt-ft5206"; | |
| reg = < 0x38 >; | |
| pinctrl-names = "default"; | |
| interrupt-parent = < 0x11 >; | |
| interrupts = < 0x1b 0x08 >; | |
| irq-gpios = < 0x11 0x1b 0x00 >; | |
| touchscreen-size-x = < 0x2d0 >; | |
| touchscreen-size-y = < 0x5a0 >; | |
| }; | |
| wm8962@1a { | |
| compatible = "wlf,wm8962"; | |
| reg = < 0x1a >; | |
| clocks = < 0x02 0xc5 >; | |
| assigned-clocks = < 0x02 0x82 >; | |
| assigned-clock-parents = < 0x02 0x1b >; | |
| assigned-clock-rates = < 0x1770000 >; | |
| #sound-dai-cells = < 0x00 >; | |
| mic-cfg = < 0x200 >; | |
| DCVDD-supply = < 0x49 >; | |
| DBVDD-supply = < 0x49 >; | |
| AVDD-supply = < 0x49 >; | |
| CPVDD-supply = < 0x49 >; | |
| MICVDD-supply = < 0x49 >; | |
| PLLVDD-supply = < 0x49 >; | |
| SPKVDD1-supply = < 0x4a >; | |
| SPKVDD2-supply = < 0x4a >; | |
| gpio-cfg = < 0x00 0x01 0x13 0x00 0x8014 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x81 >; | |
| }; | |
| backlight@36 { | |
| compatible = "ti,lm36922"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x4b >; | |
| reg = < 0x36 >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| enable-gpios = < 0x45 0x0e 0x00 >; | |
| vled-supply = < 0x4a >; | |
| ti,brightness-mapping-exponential; | |
| ti,overvoltage-volts = < 0x19 >; | |
| led@0 { | |
| reg = < 0x00 >; | |
| label = "white:backlight_cluster"; | |
| linux,default-trigger = "backlight"; | |
| phandle = < 0x35 >; | |
| }; | |
| }; | |
| }; | |
| i2c@30a50000 { | |
| compatible = "fsl,imx8mq-i2c\0fsl,imx21-i2c"; | |
| reg = < 0x30a50000 0x10000 >; | |
| interrupts = < 0x00 0x26 0x04 >; | |
| clocks = < 0x02 0xbb >; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| status = "okay"; | |
| clock-frequency = < 0x5e7b8 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x4c >; | |
| camera2@2d { | |
| reg = < 0x2d >; | |
| status = "disabled"; | |
| }; | |
| fuel_gauge@36 { | |
| compatible = "maxim,max17055"; | |
| interrupt-parent = < 0x45 >; | |
| interrupts = < 0x14 0x08 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x4d >; | |
| reg = < 0x36 >; | |
| maxim,over-heat-temp = < 0x2bc >; | |
| maxim,over-volt = < 0x1194 >; | |
| maxim,rsns-microohm = < 0x1388 >; | |
| phandle = < 0x4f >; | |
| }; | |
| charger@6a { | |
| compatible = "ti,bq25890"; | |
| reg = < 0x6a >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x4e >; | |
| interrupt-parent = < 0x45 >; | |
| interrupts = < 0x19 0x02 >; | |
| ti,battery-regulation-voltage = < 0x3ff700 >; | |
| ti,charge-current = < 0x186a00 >; | |
| ti,termination-current = < 0x101d0 >; | |
| ti,precharge-current = < 0x1fbd0 >; | |
| ti,minimum-sys-voltage = < 0x387520 >; | |
| ti,boost-voltage = < 0x4c4b40 >; | |
| ti,boost-max-current = < 0xc350 >; | |
| ti,use-vinmin-threshold = < 0x01 >; | |
| ti,vinmin-threshold = < 0x3b8260 >; | |
| monitored-battery = < 0x4f >; | |
| }; | |
| }; | |
| serial@30a60000 { | |
| compatible = "fsl,imx8mq-uart\0fsl,imx6q-uart"; | |
| reg = < 0x30a60000 0x10000 >; | |
| interrupts = < 0x00 0x1d 0x04 >; | |
| clocks = < 0x02 0xcd 0x02 0xcd >; | |
| clock-names = "ipg\0per"; | |
| status = "okay"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x50 >; | |
| uart-has-rtscts; | |
| }; | |
| mmc@30b40000 { | |
| compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc"; | |
| reg = < 0x30b40000 0x10000 >; | |
| interrupts = < 0x00 0x16 0x04 >; | |
| clocks = < 0x02 0x00 0x02 0x69 0x02 0xd2 >; | |
| clock-names = "ipg\0ahb\0per"; | |
| assigned-clocks = < 0x02 0x8e >; | |
| assigned-clock-rates = < 0x17d78400 >; | |
| fsl,tuning-start-tap = < 0x14 >; | |
| fsl,tuning-step = < 0x02 >; | |
| bus-width = < 0x08 >; | |
| status = "okay"; | |
| pinctrl-names = "default\0state_100mhz\0state_200mhz"; | |
| pinctrl-0 = < 0x51 >; | |
| pinctrl-1 = < 0x52 >; | |
| pinctrl-2 = < 0x53 >; | |
| vmmc-supply = < 0x54 >; | |
| power-supply = < 0x43 >; | |
| non-removable; | |
| }; | |
| mmc@30b50000 { | |
| compatible = "fsl,imx8mq-usdhc\0fsl,imx7d-usdhc"; | |
| reg = < 0x30b50000 0x10000 >; | |
| interrupts = < 0x00 0x17 0x04 >; | |
| clocks = < 0x02 0x00 0x02 0x69 0x02 0xd3 >; | |
| clock-names = "ipg\0ahb\0per"; | |
| fsl,tuning-start-tap = < 0x14 >; | |
| fsl,tuning-step = < 0x02 >; | |
| bus-width = < 0x04 >; | |
| status = "okay"; | |
| pinctrl-names = "default\0state_100mhz\0state_200mhz"; | |
| pinctrl-0 = < 0x55 >; | |
| pinctrl-1 = < 0x56 >; | |
| pinctrl-2 = < 0x57 >; | |
| vmmc-supply = < 0x58 >; | |
| broken-cd; | |
| disable-wp; | |
| cap-sdio-irq; | |
| keep-power-in-suspend; | |
| wakeup-source; | |
| }; | |
| spi@30bb0000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "fsl,imx8mq-qspi\0fsl,imx7d-qspi"; | |
| reg = < 0x30bb0000 0x10000 0x8000000 0x10000000 >; | |
| reg-names = "QuadSPI\0QuadSPI-memory"; | |
| interrupts = < 0x00 0x6b 0x04 >; | |
| clocks = < 0x02 0xc3 0x02 0xc3 >; | |
| clock-names = "qspi_en\0qspi"; | |
| status = "disabled"; | |
| }; | |
| sdma@30bd0000 { | |
| compatible = "fsl,imx8mq-sdma\0fsl,imx7d-sdma"; | |
| reg = < 0x30bd0000 0x10000 >; | |
| interrupts = < 0x00 0x02 0x04 >; | |
| clocks = < 0x02 0xe3 0x02 0x74 >; | |
| clock-names = "ipg\0ahb"; | |
| #dma-cells = < 0x03 >; | |
| fsl,sdma-ram-script-name = "imx/sdma/sdma-imx7d.bin"; | |
| phandle = < 0x2b >; | |
| }; | |
| ethernet@30be0000 { | |
| compatible = "fsl,imx8mq-fec\0fsl,imx6sx-fec"; | |
| reg = < 0x30be0000 0x10000 >; | |
| interrupts = < 0x00 0x76 0x04 0x00 0x77 0x04 0x00 0x78 0x04 >; | |
| clocks = < 0x02 0xb6 0x02 0xb6 0x02 0x8a 0x02 0x89 0x02 0x8b >; | |
| clock-names = "ipg\0ahb\0ptp\0enet_clk_ref\0enet_out"; | |
| fsl,num-tx-queues = < 0x03 >; | |
| fsl,num-rx-queues = < 0x03 >; | |
| status = "disabled"; | |
| }; | |
| }; | |
| noc@32700000 { | |
| compatible = "fsl,imx8mq-noc\0fsl,imx8m-noc"; | |
| reg = < 0x32700000 0x100000 >; | |
| clocks = < 0x02 0x71 >; | |
| devfreq = < 0x59 >; | |
| operating-points-v2 = < 0x5a >; | |
| }; | |
| bus@32c00000 { | |
| compatible = "fsl,imx8mq-aips-bus\0simple-bus"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x01 >; | |
| ranges = < 0x32c00000 0x32c00000 0x400000 >; | |
| interrupt-controller@32e2d000 { | |
| compatible = "fsl,imx8m-irqsteer\0fsl,imx-irqsteer"; | |
| reg = < 0x32e2d000 0x1000 >; | |
| interrupts = < 0x00 0x12 0x04 >; | |
| clocks = < 0x02 0xf8 >; | |
| clock-names = "ipg"; | |
| fsl,channel = < 0x00 >; | |
| fsl,num-irqs = < 0x40 >; | |
| interrupt-controller; | |
| #interrupt-cells = < 0x01 >; | |
| phandle = < 0x5b >; | |
| }; | |
| dcss@0x32e00000 { | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| compatible = "nxp,imx8mq-dcss"; | |
| reg = < 0x32e00000 0x30000 >; | |
| interrupts = < 0x03 0x04 0x05 0x06 0x08 >; | |
| interrupt-names = "dpr_dc_ch0\0dpr_dc_ch1\0dpr_dc_ch2\0ctx_ld\0dtg_prg1"; | |
| interrupt-parent = < 0x5b >; | |
| status = "disabled"; | |
| }; | |
| }; | |
| display-subsystem { | |
| compatible = "fsl,imx-display-subsystem"; | |
| }; | |
| gpu@38000000 { | |
| compatible = "vivante,gc"; | |
| reg = < 0x38000000 0x40000 >; | |
| interrupts = < 0x00 0x03 0x04 >; | |
| clocks = < 0x02 0xd7 0x02 0x66 0x02 0x6f 0x02 0x70 >; | |
| clock-names = "core\0shader\0bus\0reg"; | |
| #cooling-cells = < 0x02 >; | |
| assigned-clocks = < 0x02 0x61 0x02 0x64 0x02 0x6f 0x02 0x70 0x02 0x10 >; | |
| assigned-clock-parents = < 0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x11 0x02 0x0f >; | |
| assigned-clock-rates = < 0x2faf0800 0x2faf0800 0x2faf0800 0x2faf0800 0x00 >; | |
| power-domains = < 0x5c >; | |
| phandle = < 0x0f >; | |
| }; | |
| usb@38100000 { | |
| compatible = "fsl,imx8mq-dwc3\0snps,dwc3"; | |
| reg = < 0x38100000 0x10000 >; | |
| clocks = < 0x02 0x6e 0x02 0x98 0x02 0xce >; | |
| clock-names = "bus_early\0ref\0suspend"; | |
| assigned-clocks = < 0x02 0x6e 0x02 0x98 >; | |
| assigned-clock-parents = < 0x02 0x56 0x02 0x48 >; | |
| assigned-clock-rates = < 0x1dcd6500 0x5f5e100 >; | |
| interrupts = < 0x00 0x28 0x04 >; | |
| phys = < 0x5d 0x5d >; | |
| phy-names = "usb2-phy\0usb3-phy"; | |
| power-domains = < 0x5e >; | |
| usb3-resume-missing-cas; | |
| status = "okay"; | |
| #address-cells = < 0x01 >; | |
| #size-cells = < 0x00 >; | |
| dr_mode = "otg"; | |
| port@0 { | |
| reg = < 0x00 >; | |
| endpoint { | |
| remote-endpoint = < 0x5f >; | |
| phandle = < 0x3e >; | |
| }; | |
| }; | |
| port@1 { | |
| reg = < 0x01 >; | |
| endpoint { | |
| remote-endpoint = < 0x60 >; | |
| phandle = < 0x3f >; | |
| }; | |
| }; | |
| }; | |
| usb-phy@381f0040 { | |
| compatible = "fsl,imx8mq-usb-phy"; | |
| reg = < 0x381f0040 0x40 >; | |
| clocks = < 0x02 0xd0 >; | |
| clock-names = "phy"; | |
| assigned-clocks = < 0x02 0x99 >; | |
| assigned-clock-parents = < 0x02 0x48 >; | |
| assigned-clock-rates = < 0x5f5e100 >; | |
| #phy-cells = < 0x00 >; | |
| status = "okay"; | |
| phandle = < 0x5d >; | |
| }; | |
| usb@38200000 { | |
| compatible = "fsl,imx8mq-dwc3\0snps,dwc3"; | |
| reg = < 0x38200000 0x10000 >; | |
| clocks = < 0x02 0x6e 0x02 0x98 0x02 0xcf >; | |
| clock-names = "bus_early\0ref\0suspend"; | |
| assigned-clocks = < 0x02 0x6e 0x02 0x98 >; | |
| assigned-clock-parents = < 0x02 0x56 0x02 0x48 >; | |
| assigned-clock-rates = < 0x1dcd6500 0x5f5e100 >; | |
| interrupts = < 0x00 0x29 0x04 >; | |
| phys = < 0x61 0x61 >; | |
| phy-names = "usb2-phy\0usb3-phy"; | |
| power-domains = < 0x62 >; | |
| usb3-resume-missing-cas; | |
| status = "okay"; | |
| dr_mode = "host"; | |
| snps,dis_u2_susphy_quirk; | |
| snps,dis_u3_susphy_quirk; | |
| }; | |
| usb-phy@382f0040 { | |
| compatible = "fsl,imx8mq-usb-phy"; | |
| reg = < 0x382f0040 0x40 >; | |
| clocks = < 0x02 0xd1 >; | |
| clock-names = "phy"; | |
| assigned-clocks = < 0x02 0x99 >; | |
| assigned-clock-parents = < 0x02 0x48 >; | |
| assigned-clock-rates = < 0x5f5e100 >; | |
| #phy-cells = < 0x00 >; | |
| status = "okay"; | |
| vbus-supply = < 0x63 >; | |
| phandle = < 0x61 >; | |
| }; | |
| pcie@33800000 { | |
| compatible = "fsl,imx8mq-pcie"; | |
| reg = < 0x33800000 0x400000 0x1ff00000 0x80000 >; | |
| reg-names = "dbi\0config"; | |
| #address-cells = < 0x03 >; | |
| #size-cells = < 0x02 >; | |
| device_type = "pci"; | |
| bus-range = < 0x00 0xff >; | |
| ranges = < 0x81000000 0x00 0x00 0x1ff80000 0x00 0x10000 0x82000000 0x00 0x18000000 0x18000000 0x00 0x7f00000 >; | |
| num-lanes = < 0x01 >; | |
| num-viewport = < 0x04 >; | |
| interrupts = < 0x00 0x7a 0x04 >; | |
| interrupt-names = "msi"; | |
| #interrupt-cells = < 0x01 >; | |
| interrupt-map-mask = < 0x00 0x00 0x00 0x07 >; | |
| interrupt-map = < 0x00 0x00 0x00 0x01 0x07 0x00 0x7d 0x04 0x00 0x00 0x00 0x02 0x07 0x00 0x7c 0x04 0x00 0x00 0x00 0x03 0x07 0x00 0x7b 0x04 0x00 0x00 0x00 0x04 0x07 0x00 0x7a 0x04 >; | |
| fsl,max-link-speed = < 0x02 >; | |
| power-domains = < 0x64 >; | |
| resets = < 0x2e 0x1a 0x2e 0x1c 0x2e 0x1d >; | |
| reset-names = "pciephy\0apps\0turnoff"; | |
| status = "disabled"; | |
| }; | |
| pcie@33c00000 { | |
| compatible = "fsl,imx8mq-pcie"; | |
| reg = < 0x33c00000 0x400000 0x27f00000 0x80000 >; | |
| reg-names = "dbi\0config"; | |
| #address-cells = < 0x03 >; | |
| #size-cells = < 0x02 >; | |
| device_type = "pci"; | |
| ranges = < 0x81000000 0x00 0x00 0x27f80000 0x00 0x10000 0x82000000 0x00 0x20000000 0x20000000 0x00 0x7f00000 >; | |
| num-lanes = < 0x01 >; | |
| num-viewport = < 0x04 >; | |
| interrupts = < 0x00 0x4a 0x04 >; | |
| interrupt-names = "msi"; | |
| #interrupt-cells = < 0x01 >; | |
| interrupt-map-mask = < 0x00 0x00 0x00 0x07 >; | |
| interrupt-map = < 0x00 0x00 0x00 0x01 0x07 0x00 0x4d 0x04 0x00 0x00 0x00 0x02 0x07 0x00 0x4c 0x04 0x00 0x00 0x00 0x03 0x07 0x00 0x4b 0x04 0x00 0x00 0x00 0x04 0x07 0x00 0x4a 0x04 >; | |
| fsl,max-link-speed = < 0x02 >; | |
| power-domains = < 0x64 >; | |
| resets = < 0x2e 0x22 0x2e 0x24 0x2e 0x25 >; | |
| reset-names = "pciephy\0apps\0turnoff"; | |
| status = "disabled"; | |
| }; | |
| interrupt-controller@38800000 { | |
| compatible = "arm,gic-v3"; | |
| reg = < 0x38800000 0x10000 0x38880000 0xc0000 0x31000000 0x2000 0x31010000 0x2000 0x31020000 0x2000 >; | |
| #interrupt-cells = < 0x03 >; | |
| interrupt-controller; | |
| interrupts = < 0x01 0x09 0x04 >; | |
| interrupt-parent = < 0x07 >; | |
| phandle = < 0x07 >; | |
| }; | |
| dram-controller@3d400000 { | |
| compatible = "fsl,imx8mq-ddrc\0fsl,imx8m-ddrc"; | |
| reg = < 0x3d400000 0x400000 >; | |
| clock-names = "dram_core\0dram_pll\0dram_alt\0dram_apb"; | |
| clocks = < 0x02 0xfc 0x02 0x41 0x02 0x76 0x02 0x77 >; | |
| devfreq-events = < 0x65 >; | |
| operating-points-v2 = < 0x66 >; | |
| phandle = < 0x59 >; | |
| }; | |
| ddr-pmu@3d800000 { | |
| compatible = "fsl,imx8mq-ddr-pmu\0fsl,imx8m-ddr-pmu"; | |
| reg = < 0x3d800000 0x400000 >; | |
| interrupt-parent = < 0x07 >; | |
| interrupts = < 0x00 0x62 0x04 >; | |
| phandle = < 0x65 >; | |
| }; | |
| }; | |
| sound-wwan-codec { | |
| compatible = "broadmobi,bm818\0option,gtm601"; | |
| #sound-dai-cells = < 0x00 >; | |
| phandle = < 0x83 >; | |
| }; | |
| chosen { | |
| stdout-path = "/soc@0/bus@30800000/serial@30860000"; | |
| }; | |
| gpio-keys { | |
| compatible = "gpio-keys"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x67 0x68 0x69 >; | |
| camera { | |
| label = "CAMERA"; | |
| gpios = < 0x6a 0x01 0x01 >; | |
| wakeup-source; | |
| linux,code = < 0xd4 >; | |
| }; | |
| wlan { | |
| label = "WLAN"; | |
| gpios = < 0x6a 0x0a 0x01 >; | |
| wakeup-source; | |
| linux,code = < 0xee >; | |
| }; | |
| wwan { | |
| label = "WWAN"; | |
| gpios = < 0x6a 0x00 0x01 >; | |
| wakeup-source; | |
| linux,code = < 0xf6 >; | |
| }; | |
| vol_up { | |
| label = "VOL_UP"; | |
| gpios = < 0x11 0x10 0x01 >; | |
| linux,code = < 0x73 >; | |
| }; | |
| vol_down { | |
| label = "VOL_DOWN"; | |
| gpios = < 0x11 0x11 0x01 >; | |
| linux,code = < 0x72 >; | |
| }; | |
| hp-det { | |
| label = "HP_DET"; | |
| gpios = < 0x45 0x09 0x00 >; | |
| wakeup-source; | |
| linux,code = < 0xd3 >; | |
| }; | |
| }; | |
| pwmleds { | |
| compatible = "pwm-leds"; | |
| blue { | |
| label = "phone:blue:front"; | |
| max-brightness = < 0xf8 >; | |
| pwms = < 0x6b 0x00 0xc350 >; | |
| }; | |
| red { | |
| label = "phone:red:front"; | |
| max-brightness = < 0xf8 >; | |
| pwms = < 0x6c 0x00 0xc350 >; | |
| }; | |
| green { | |
| label = "phone:green:front"; | |
| max-brightness = < 0xf8 >; | |
| pwms = < 0x6d 0x00 0xc350 >; | |
| }; | |
| }; | |
| leds { | |
| compatible = "gpio-leds"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x6e 0x6f 0x70 0x71 0x72 0x73 0x74 0x75 0x76 0x77 0x78 0x79 0x7a >; | |
| camera_en { | |
| label = "camera_en"; | |
| gpios = < 0x11 0x00 0x00 >; | |
| default-state = "off"; | |
| }; | |
| chg_en { | |
| label = "chg_en"; | |
| gpios = < 0x45 0x02 0x00 >; | |
| default-state = "off"; | |
| }; | |
| chg_otg_en { | |
| label = "chg_otg_en"; | |
| gpios = < 0x45 0x04 0x00 >; | |
| default-state = "off"; | |
| }; | |
| flash_strobe { | |
| label = "flash_strobe"; | |
| gpios = < 0x11 0x15 0x00 >; | |
| default-state = "off"; | |
| linux,default-trigger = "flash"; | |
| }; | |
| hub_nreset { | |
| label = "hub_nreset"; | |
| gpios = < 0x11 0x0c 0x00 >; | |
| default-state = "on"; | |
| }; | |
| sd_en { | |
| label = "sd_en"; | |
| gpios = < 0x11 0x03 0x00 >; | |
| default-state = "on"; | |
| }; | |
| gps_nreset { | |
| label = "gps_nreset"; | |
| gpios = < 0x11 0x08 0x00 >; | |
| default-state = "on"; | |
| }; | |
| smc_en { | |
| label = "smc_en"; | |
| gpios = < 0x11 0x06 0x00 >; | |
| default-state = "off"; | |
| }; | |
| gps_en { | |
| label = "gps_en"; | |
| gpios = < 0x45 0x0c 0x00 >; | |
| default-state = "off"; | |
| }; | |
| flash_en { | |
| label = "flash_en"; | |
| gpios = < 0x11 0x17 0x00 >; | |
| default-state = "off"; | |
| }; | |
| wwan_en { | |
| label = "wwan_en"; | |
| gpios = < 0x45 0x12 0x00 >; | |
| default-state = "on"; | |
| }; | |
| wifi_en { | |
| label = "wifi_en"; | |
| gpios = < 0x45 0x0a 0x00 >; | |
| default-state = "on"; | |
| }; | |
| bt_reg_on { | |
| label = "bt_reg_on"; | |
| gpios = < 0x6a 0x1d 0x00 >; | |
| default-state = "on"; | |
| }; | |
| wwan_nreset { | |
| label = "wwan_nreset"; | |
| gpios = < 0x45 0x01 0x00 >; | |
| default-state = "on"; | |
| }; | |
| wwan_disable { | |
| label = "wwan_disable"; | |
| gpios = < 0x45 0x10 0x00 >; | |
| default-state = "off"; | |
| }; | |
| wwan_dis2 { | |
| label = "wwan_dis2"; | |
| gpios = < 0x45 0x0d 0x00 >; | |
| default-state = "off"; | |
| }; | |
| }; | |
| clock-pmic { | |
| compatible = "fixed-clock"; | |
| #clock-cells = < 0x00 >; | |
| clock-frequency = < 0x8000 >; | |
| clock-output-names = "pmic_osc"; | |
| phandle = < 0x3b >; | |
| }; | |
| regulator-hub { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x7b >; | |
| regulator-name = "HUB"; | |
| regulator-min-microvolt = < 0x325aa0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| gpio = < 0x11 0x0e 0x00 >; | |
| enable-active-high; | |
| phandle = < 0x63 >; | |
| }; | |
| regulator-audio-pwr-en { | |
| compatible = "regulator-fixed"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x7c >; | |
| regulator-name = "AUDIO_PWR_EN"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| gpio = < 0x11 0x04 0x00 >; | |
| enable-active-high; | |
| regulator-always-on; | |
| phandle = < 0x7d >; | |
| }; | |
| regulator-audio-v1v8 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "aud_1v8"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| vin-supply = < 0x7d >; | |
| phandle = < 0x49 >; | |
| }; | |
| regulator-vsys-3v4 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vsys_3v4"; | |
| regulator-min-microvolt = < 0x33e140 >; | |
| regulator-max-microvolt = < 0x33e140 >; | |
| regulator-always-on; | |
| phandle = < 0x4a >; | |
| }; | |
| regulator-vdd-3v3 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vdd_3v3"; | |
| regulator-min-microvolt = < 0x325aa0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| phandle = < 0x54 >; | |
| }; | |
| regulator-3v3-wifi { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "3v3_wifi"; | |
| regulator-min-microvolt = < 0x325aa0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| phandle = < 0x58 >; | |
| }; | |
| regulator-vdd-sen { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vdd_sen"; | |
| regulator-min-microvolt = < 0x325aa0 >; | |
| regulator-max-microvolt = < 0x325aa0 >; | |
| phandle = < 0x42 >; | |
| }; | |
| regulator-vdd-1v8 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "vdd_1v8"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| phandle = < 0x43 >; | |
| }; | |
| regulator-lcd-1v8 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "lcd_1v8"; | |
| regulator-min-microvolt = < 0x1b7740 >; | |
| regulator-max-microvolt = < 0x1b7740 >; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x7e >; | |
| vin-supply = < 0x43 >; | |
| enable-active-high; | |
| gpio = < 0x11 0x05 0x00 >; | |
| phandle = < 0x34 >; | |
| }; | |
| regulator-lcd-3v4 { | |
| compatible = "regulator-fixed"; | |
| regulator-name = "lcd_3v4"; | |
| pinctrl-names = "default"; | |
| pinctrl-0 = < 0x7f >; | |
| vin-supply = < 0x4a >; | |
| enable-active-high; | |
| gpio = < 0x11 0x14 0x00 >; | |
| phandle = < 0x47 >; | |
| }; | |
| sound { | |
| compatible = "simple-audio-card"; | |
| simple-audio-card,name = "wm8962"; | |
| simple-audio-card,format = "i2s"; | |
| simple-audio-card,widgets = "Headphone\0Headphone\0Microphone\0Headset Mic\0Microphone\0Digital Mic\0Speaker\0Speaker"; | |
| simple-audio-card,routing = "Headphone\0HPOUTL\0Headphone\0HPOUTR\0Speaker\0SPKOUTL\0Speaker\0SPKOUTR\0Headset Mic\0MICBIAS\0IN3R\0Headset Mic\0DMICDAT\0Digital Mic"; | |
| simple-audio-card,cpu { | |
| sound-dai = < 0x80 >; | |
| }; | |
| simple-audio-card,codec { | |
| sound-dai = < 0x81 >; | |
| clocks = < 0x02 0xc5 >; | |
| frame-master; | |
| bitclock-master; | |
| }; | |
| }; | |
| sound-wwan { | |
| compatible = "simple-audio-card"; | |
| simple-audio-card,name = "MODEM"; | |
| simple-audio-card,format = "i2s"; | |
| simple-audio-card,cpu { | |
| sound-dai = < 0x82 >; | |
| frame-inversion; | |
| }; | |
| simple-audio-card,codec { | |
| sound-dai = < 0x83 >; | |
| frame-master; | |
| bitclock-master; | |
| }; | |
| }; | |
| vibrator { | |
| compatible = "pwm-vibrator"; | |
| pwms = < 0x84 0x00 0x3b9aca00 0x00 >; | |
| pwm-names = "enable"; | |
| vcc-supply = < 0x54 >; | |
| }; | |
| }; |
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