gistfile1.txt

● App6 is done, fully green, committed and pushed (6a0ee45) — and the interrupted session turned out to be hiding two genuinely
  important hardware findings. The story:

  What happened after the resume

  The pre-reboot app6 run hadn't just been killed — it had been hung, and the rerun hung at the same spot: the very first write
  to a board console. Diagnosis (py-spy stack dump, /proc fd inspection, kernel queue ioctls, DTR/RTS tests, USB descriptor
  analysis, and the UM12018 board manual):

  1. MCU-Link VCOM is target→host only on our boards. The probe (CMSIS-DAP V3.128, factory firmware r0E7) NAKs every
  host→target byte forever — on all three boards, with the host side fully ruled out. All the shell prompts we ever saw were
  the working read direction; nobody had ever written. Consequence: no interactive shell input over VCOM; all MCU→host
  protocols must be firmware-push. Candidate fixes for a later bench session: MCU-Link firmware update (LinkServer + J21 jumper
  per board) or a root usbreset test.
  2. So I redesigned the protocol: the firmware now streams ADC_A0_MV= lines every 500 ms and the host only reads. The hil adc
  shell command stays as dormant capability.
  3. First streaming run: ADC read ~2.5× high with per-board variance. Root cause after two experiments + driver/DTS
  archaeology: the LPADC's REFSEL is a global init-time setting, and the SoC devicetree default selects the internal VREF block
  — which on our boards floats at ~0.6–0.75 V even with its regulator enabled. Fix: voltage-ref = <0> = VDD_ANA (the
  always-powered 3V3 rail) in the app overlay. After that: errors ≤ 40 mV on every board and sweep point, with the residual
  tracking each board's rail exactly as ratiometric physics predicts.

  Final state

  - app6 section A: PASSED 3/3 — flash hil_loopback on all boards, digital mirror 5/5 toggles per board, analog sweep
  0/0.5/1.65/2.5/3.3 V per board.
  - just hil-check A (apps 1+2+5+6): green end-to-end — your one-command full-testbed regression now covers DAQ loopbacks,
  rails, whole-section flash, and the MCU-in-the-middle wiring.
  - Both findings are written up in docs/mcu-testbed.md (docs build: 0 warnings), the firmware overlay documents the REFSEL
  story in place, and memory is checkpointed.

  The backlog now: the bench items (shield continuity, R166/SE_ENA, MCU-Link-mediated ISP), an MCU-Link firmware-update session
  (might fix the VCOM direction), the nidaq1 VM, and side B when the hub arrives.

  Per project policy: this AI-assisted code requires human review; contributors must comply with AI_POLICY.md regarding
  disclosure and authorship.