nobuoka

generic_test_coverage.rb

概要

• fastlane のアクション
• iOS プロジェクトのビルド結果である result bundle (.xcresult 拡張子) に含まれるカバレッジ情報から SonarQube の Generic Coverage を生成する
  • Result bundle については 「Xcode 11 Release Notes」 を参照
  • Xcode 11 以降に対応
• 内部では xccov コマンドが使用される

andymatuschak

A composable pattern for pure state machines with effects

State machines are everywhere in interactive systems, but they're rarely defined clearly and explicitly. Given some big blob of code including implicit state machines, which transitions are possible and under what conditions? What effects take place on what transitions?

There are existing design patterns for state machines, but all the patterns I've seen complect side effects with the structure of the state machine itself. Instances of these patterns are difficult to test without mocking, and they end up with more dependencies. Worse, the classic patterns compose poorly: hierarchical state machines are typically not straightforward extensions. The functional programming world has solutions, but they don't transpose neatly enough to be broadly usable in mainstream languages.

Here I present a composable pattern for pure state machiness with effects,

ZacSweers

import android.support.v4.view.animation.PathInterpolatorCompat;
import android.view.animation.Interpolator;

/**
 * Cheatsheet: http://easings.net/
 */
public class EasingsConstants {
    public static final Interpolator easeInSine = PathInterpolatorCompat.create(0.47f, 0f, 0.745f, 0.715f);
    public static final Interpolator easeOutSine = PathInterpolatorCompat.create(0.39f, 0.575f, 0.565f, 1f);
    public static final Interpolator easeInOutSine = PathInterpolatorCompat.create(0.445f, 0.05f, 0.55f, 0.95f);

josh-burton

import java.util.ArrayList;
import java.util.HashMap;
import java.util.List;
import java.util.Map;

import android.content.Context;
import android.support.v7.widget.RecyclerView;
import android.view.View;
import android.view.ViewGroup;

jboner

Latency Comparison Numbers (~2012)
----------------------------------
L1 cache reference                           0.5 ns
Branch mispredict                            5   ns
L2 cache reference                           7   ns                      14x L1 cache
Mutex lock/unlock                           25   ns
Main memory reference                      100   ns                      20x L2 cache, 200x L1 cache
Compress 1K bytes with Zippy             3,000   ns        3 us
Send 1K bytes over 1 Gbps network       10,000   ns       10 us
Read 4K randomly from SSD*             150,000   ns      150 us          ~1GB/sec SSD