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oreboot ACPI basics on DeskMini A300 with Ryzen 5 3400G (Picasso) - https://github.com/oreboot/oreboot/pull/390
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Welcome to oreboot | |
c001_1004 is 7ed8320b178bfbff and APIC is bit 200 | |
c001_1005 is 35c237ff2fd3fbff and APIC is bit 200 | |
0x1b is fee00900 | |
c0000080 DIFF:d01 got 500 | |
-- wrmsr: and got d01; | |
c0000081 DIFF:23001000000000 got 0 | |
-- wrmsr: and got 23001000000000; | |
c0000082 DIFF:ffffffff99a00000 got 0 | |
-- wrmsr: and got ffffffff99a00000; | |
c0000083 DIFF:ffffffff99a01230 got 0 | |
-- wrmsr: and got ffffffff99a01230; | |
c0000084 DIFF:47700 got 0 | |
-- wrmsr: and got 47700; | |
c00000e7 DIFF:16497beaa820 got 4e58506a6 | |
-- wrmsr: and got 16497beaab98; | |
c00000e8 DIFF:1fafceec9a6e got 286f5f1c5 | |
-- wrmsr: and got 1fafceec9c5a; | |
c0000100 DIFF:5b6c50 got 0 | |
-- wrmsr: and got 5b6c50; | |
c0000101 DIFF:ffffffff9a031000 got 0 | |
-- wrmsr: and got ffffffff9a031000; | |
c0000104 SAME:100000000 got 100000000 | |
-- wrmsr: and got 100000000; | |
c0000410 SAME:1001028 got 1001028 | |
-- wrmsr: and got 1001028; | |
c0002004 DIFF:70000007d got 200000035 | |
-- wrmsr: and got 700000035; | |
c0002005 SAME:b000000000 got b000000000 | |
-- wrmsr: and got b000000000; | |
c0002014 DIFF:300000079 got 200000031 | |
-- wrmsr: and got 300000031; | |
c0002015 SAME:100b000000000 got 100b000000000 | |
-- wrmsr: and got 100b000000000; | |
c0002024 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c0002025 SAME:200b000000000 got 200b000000000 | |
-- wrmsr: and got 200b000000000; | |
c0002034 DIFF:300000079 got 200000031 | |
-- wrmsr: and got 300000031; | |
c0002035 SAME:300b000000000 got 300b000000000 | |
-- wrmsr: and got 300b000000000; | |
c0002054 DIFF:300000079 got 200000031 | |
-- wrmsr: and got 300000031; | |
c0002055 SAME:500b000000000 got 500b000000000 | |
-- wrmsr: and got 500b000000000; | |
c0002064 DIFF:300000079 got 200000031 | |
-- wrmsr: and got 300000031; | |
c0002065 SAME:600b000000000 got 600b000000000 | |
-- wrmsr: and got 600b000000000; | |
c0002074 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c0002075 DIFF:700b020350000 got 700b000000000 | |
-- wrmsr: and got 700b020350000; | |
c0002084 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c0002085 DIFF:700b020350100 got 700b000000000 | |
-- wrmsr: and got 700b020350100; | |
c0002094 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c0002095 DIFF:700b020350200 got 700b000000000 | |
-- wrmsr: and got 700b020350200; | |
c00020a4 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c00020a5 DIFF:700b020350300 got 700b000000000 | |
-- wrmsr: and got 700b020350300; | |
c00020b4 DIFF:50000007f got 0 | |
-- wrmsr: and got 0; | |
c00020b5 DIFF:700b020750000 got 0 | |
-- wrmsr: and got 0; | |
c00020c4 DIFF:50000007f got 0 | |
-- wrmsr: and got 0; | |
c00020c5 DIFF:700b020750100 got 0 | |
-- wrmsr: and got 0; | |
c00020d4 DIFF:50000007f got 0 | |
-- wrmsr: and got 0; | |
c00020d5 DIFF:700b020750200 got 0 | |
-- wrmsr: and got 0; | |
c00020e4 DIFF:50000007f got 0 | |
-- wrmsr: and got 0; | |
c00020e5 DIFF:700b020750300 got 0 | |
-- wrmsr: and got 0; | |
c00020f4 DIFF:300000079 got 200000035 | |
-- wrmsr: and got 300000035; | |
c00020f5 DIFF:2000130430400 got 9600050f00 | |
-- wrmsr: and got 9630430400; | |
c0002104 DIFF:10000007b got 0 | |
-- wrmsr: and got 0; | |
c0002105 DIFF:530082900 got 0 | |
-- wrmsr: and got 0; | |
c0002114 DIFF:70000007d got 0 | |
-- wrmsr: and got 0; | |
c0002115 DIFF:9600050f00 got 0 | |
-- wrmsr: and got 0; | |
c0002134 DIFF:50000007f got 0 | |
-- wrmsr: and got 0; | |
c0002135 DIFF:2002e00000001 got 0 | |
-- wrmsr: and got 0; | |
c0002144 DIFF:50000007f got 200000037 | |
-- wrmsr: and got 500000037; | |
c0002145 DIFF:2002e00000101 got 2e00000000 | |
-- wrmsr: and got 2e00000101; | |
c0002164 DIFF:70000007d got 200000035 | |
-- wrmsr: and got 700000035; | |
c0002165 DIFF:1813b17000 got 1002e0000000a | |
-- wrmsr: and got 1002e13b17000; | |
c0002174 DIFF:70000007d got 0 | |
-- wrmsr: and got 0; | |
c0002175 DIFF:46115c0000 got 0 | |
-- wrmsr: and got 0; | |
c0002184 DIFF:300000079 got 0 | |
-- wrmsr: and got 0; | |
c0002185 DIFF:1000103b30400 got 0 | |
-- wrmsr: and got 0; | |
c0002194 DIFF:300000079 got 0 | |
-- wrmsr: and got 0; | |
c0002195 DIFF:100ff03830400 got 0 | |
-- wrmsr: and got 0; | |
c00021a4 DIFF:10000007b got 0 | |
-- wrmsr: and got 0; | |
c00021a5 DIFF:50005e100 got 0 | |
-- wrmsr: and got 0; | |
c00021b4 DIFF:70000007d got 0 | |
-- wrmsr: and got 0; | |
c00021b5 DIFF:1002e00001e01 got 0 | |
-- wrmsr: and got 0; | |
c0010015 DIFF:9000010 got 1000010 | |
-- wrmsr: and got 9000010; | |
c001001a DIFF:80000000 got c0000000 | |
-- wrmsr: and got 80000000; | |
c001001d DIFF:450000000 got 440000000 | |
-- wrmsr: and got 450000000; | |
c0010030 DIFF:4359504520444d41 got 0 | |
-- wrmsr: and got 4359504520444d41; | |
c0010031 DIFF:4e20535554495420 got 0 | |
-- wrmsr: and got 4e20535554495420; | |
c0010032 DIFF:72502065726f432d got 0 | |
-- wrmsr: and got 72502065726f432d; | |
c0010033 DIFF:20726f737365636f got 0 | |
-- wrmsr: and got 20726f737365636f; | |
c0010034 DIFF:2020202020202020 got 0 | |
-- wrmsr: and got 2020202020202020; | |
c0010035 DIFF:20202020202020 got 0 | |
-- wrmsr: and got 20202020202020; | |
c0010056 DIFF:28000b2 got 0 | |
-- wrmsr: and got 28000b2; | |
c0010058 DIFF:e0000021 got 0 | |
-- wrmsr: and got e0000021; | |
c0010064 DIFF:8000000045d2085e got 8000000049440894 | |
-- wrmsr: and got 8000000045d2085e; | |
c0010065 DIFF:8000000045160a64 got 8000000045d70c8a | |
-- wrmsr: and got 8000000045160a64; | |
c0010066 DIFF:8000000043da0c5a got 80000000439b127e | |
-- wrmsr: and got 8000000043da0c5a; | |
c0010073 DIFF:813 got 0 | |
-- wrmsr: and got 813; | |
c0010074 DIFF:289 got 0 | |
-- wrmsr: and got 9; | |
c0010111 DIFF:afba2000 got 30000 | |
-- wrmsr: and got afba2000; | |
c0010112 DIFF:ac000000 got 0 | |
-- wrmsr: and got ac000000; | |
c0010113 DIFF:fffffc006003 got 0 | |
-- wrmsr: and got fffffc006003; | |
c001020b DIFF:ffff got 0 | |
-- wrmsr: and got ffff; | |
c0010292 DIFF:40b8012 got 52 | |
-- wrmsr: and got 52; | |
c0010293 DIFF:104886 got c84 | |
-- wrmsr: and got c84; | |
c0010294 DIFF:f8e847f00008912 got 0 | |
-- wrmsr: and got f8e847f00008912; | |
c0010296 DIFF:484848 got 80808 | |
-- wrmsr: and got 484848; | |
c0010297 DIFF:380000fc000 got 800000408 | |
-- wrmsr: and got 800000408; | |
c0010299 DIFF:a1003 got 0 | |
-- wrmsr: and got 0; | |
c001029a DIFF:9731905d got 0 | |
-- wrmsr: and got 0; | |
c001029b DIFF:95073877 got 0 | |
-- wrmsr: and got 0; | |
c0010400 DIFF:600 got 0 | |
-- wrmsr: and got 600; | |
c0010401 DIFF:2c00 got 0 | |
-- wrmsr: and got 2c00; | |
c0010402 DIFF:8 got 0 | |
-- wrmsr: and got 8; | |
c0010406 DIFF:40 got 0 | |
-- wrmsr: and got 40; | |
c0010407 DIFF:80 got 0 | |
-- wrmsr: and got 80; | |
c0010408 DIFF:80 got 0 | |
-- wrmsr: and got 80; | |
c0010409 DIFF:80 got 0 | |
-- wrmsr: and got 80; | |
c001040a DIFF:80 got 0 | |
-- wrmsr: and got 80; | |
c001040b DIFF:80 got 0 | |
-- wrmsr: and got 0; | |
c001040c DIFF:80 got 0 | |
-- wrmsr: and got 0; | |
c001040d DIFF:80 got 0 | |
-- wrmsr: and got 0; | |
c001040e DIFF:80 got 0 | |
-- wrmsr: and got 0; | |
c0010413 DIFF:2 got 0 | |
-- wrmsr: and got 0; | |
c0010414 DIFF:2 got 0 | |
-- wrmsr: and got 2; | |
c0010416 DIFF:6 got 0 | |
-- wrmsr: and got 6; | |
c0010419 DIFF:3c0 got 0 | |
-- wrmsr: and got 0; | |
c0011000 DIFF:8000 got 0 | |
-- wrmsr: and got 8000; | |
c0011002 DIFF:219c91a9 got 209c01a9 | |
-- wrmsr: and got 219c91a9; | |
c0011003 SAME:1 got 1 | |
-- wrmsr: and got 1; | |
c0011004 SAME:7ed8320b178bfbff got 7ed8320b178bfbff | |
-- wrmsr: and got 7ed8320b178bfbff; | |
c0011005 DIFF:75c237ff2fd3fbff got 35c237ff2fd3fbff | |
-- wrmsr: and got 75c237ff2fd3fbff; | |
c001100c DIFF:ff711b00 got 0 | |
-- wrmsr: and got ff711b00; | |
c0011020 DIFF:6404000000000 got 6800000000000 | |
-- wrmsr: and got 6004000000000; | |
c0011021 DIFF:2000000 got 200000 | |
-- wrmsr: and got 2000000; | |
c0011022 DIFF:c000000002500000 got 500000 | |
-- wrmsr: and got c000000000500000; | |
c0011023 DIFF:2000000000020 got 0 | |
-- wrmsr: and got 2000000000020; | |
c0011028 DIFF:200248000d4 got 140200248000c0 | |
-- wrmsr: and got 200248000d4; | |
c0011029 DIFF:3000310e08002 got e08000 | |
-- wrmsr: and got 3000310e08002; | |
c001102a DIFF:38080 got 20000 | |
-- wrmsr: and got 38080; | |
c001102b DIFF:2008cc17 got 1808cc17 | |
-- wrmsr: and got 2008cc17; | |
c001102c DIFF:309c70000000000 got 0 | |
-- wrmsr: and got 308000000000000; | |
c001102d DIFF:101c00000010 got 0 | |
-- wrmsr: and got 1c00000010; | |
c001102e DIFF:12024000000000 got 0 | |
-- wrmsr: and got 0; | |
c001103a SAME:100 got 100 | |
c0011074 DIFF:a000000000000000 got 1000000000000000 | |
-- wrmsr: and got a000000000000000; | |
c0011076 DIFF:14 got 0 | |
-- wrmsr: and got 14; | |
c0011077 DIFF:6d00000000000000 got 0 | |
-- wrmsr: and got 6d00000000000000; | |
c0011083 DIFF:38d6b5ad1bc6b5ad got 3fffffff3ffffff9 | |
-- wrmsr: and got 3fffffff3fffff2d; | |
c0011092 DIFF:57840a05 got 57814a00 | |
-- wrmsr: and got 57840a05; | |
c0011093 DIFF:6071f9fc got a5edec | |
-- wrmsr: and got 6071f9fc; | |
c0011094 DIFF:110c got 11fd | |
-- wrmsr: and got 110c; | |
c0011097 DIFF:5dbf got 3aa | |
-- wrmsr: and got 1dbf; | |
200 DIFF:6 got 0 | |
-- wrmsr: and got 6; | |
201 DIFF:ffff80000800 got 0 | |
-- wrmsr: and got ffff80000800; | |
202 DIFF:80000006 got 0 | |
-- wrmsr: and got 80000006; | |
203 DIFF:ffffe0000800 got 0 | |
-- wrmsr: and got ffffe0000800; | |
204 DIFF:a0000006 got 0 | |
-- wrmsr: and got a0000006; | |
205 DIFF:fffff0000800 got 0 | |
-- wrmsr: and got fffff0000800; | |
206 DIFF:ff000005 got 0 | |
-- wrmsr: and got ff000005; | |
207 DIFF:ffffff000800 got 0 | |
-- wrmsr: and got ffffff000800; | |
208 DIFF:ac000000 got 0 | |
-- wrmsr: and got ac000000; | |
209 DIFF:fffffc000800 got 0 | |
-- wrmsr: and got fffffc000800; | |
20a DIFF:a2fa0000 got 0 | |
-- wrmsr: and got a2fa0000; | |
20b DIFF:ffffffff0800 got 0 | |
-- wrmsr: and got ffffffff0800; | |
250 DIFF:606060606060606 got 0 | |
-- wrmsr: and got 606060606060606; | |
258 DIFF:606060606060606 got 0 | |
-- wrmsr: and got 606060606060606; | |
259 DIFF:404040404040404 got 0 | |
-- wrmsr: and got 404040404040404; | |
268 DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
269 DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26a DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26b DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26c DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26d DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26e DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
26f DIFF:505050505050505 got 0 | |
-- wrmsr: and got 505050505050505; | |
277 SAME:7040600070406 got 7040600070406 | |
-- wrmsr: and got 7040600070406; | |
2ff DIFF:c00 got 0 | |
-- wrmsr: and got c00; | |
AMD CPU: family 17h, model 18h | |
MP1 test(42) result: 43 | |
MP1 smu version result: 1988352.0 | |
MP1 interface version result: 9.0 | |
Write acpi tables | |
f00000xf00000xf00080xf00200xf00240xf00480xf002d0xf00680xf00710xf017c0xf01bc0xf01e00xf020cWrote bios tables, entering debug | |
LDN is 0 | |
LDN is 1000000 | |
loading payload with fdt_address 0 | |
3600ffc036001000000300000Back from loading payload, call debug | |
Running payload entry is 1000200 | |
on to 0x1000200 early console in extract_kernel | |
input_data: 0x0000000001a832e8 | |
input_len: 0x0000000000252ca0 | |
output: 0x0000000001000000 | |
output_len: 0x0000000000cb8520 | |
kernel_total_size: 0x0000000000c16000 | |
needed_size: 0x0000000000e00000 | |
trampoline_32bit: 0x000000000000e000 | |
Decompressing Linux... Parsing ELF... done. | |
Booting the kernel. | |
[ T0] Linux version 5.8.0home/rminnich/AMD64/linux+ (rminnich@rminnich-MacBookPro) (gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld (GNU Binutils for Ubuntu) 2.30) #300 Fri Nov 20 13:40:17 PST 2020 | |
[ T0] Command line: | |
[ T0] KERNEL supported cpus: | |
[ T0] AMD AuthenticAMD | |
[ T0] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' | |
[ T0] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' | |
[ T0] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers' | |
[ T0] x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256 | |
[ T0] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'compacted' format. | |
[ T0] BIOS-provided physical RAM map: | |
[ T0] BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] reserved | |
[ T0] BIOS-e820: [mem 0x0000000000001000-0x000000000000ffff] usable | |
[ T0] BIOS-e820: [mem 0x0000000000010000-0x00000000000fffff] reserved | |
[ T0] BIOS-e820: [mem 0x0000000000100000-0x000000007fffffff] usable | |
[ T0] PCI: Unknown option `nobios' | |
[ T0] printk: console [earlyser0] enabled | |
[ T0] NX (Execute Disable) protection: active | |
[ T0] tsc: Fast TSC calibration using PIT | |
[ T0] tsc: Detected 2350.035 MHz processor | |
[ T0] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved | |
[ T0] e820: remove [mem 0x000a0000-0x000fffff] usable | |
[ T0] last_pfn = 0x80000 max_arch_pfn = 0x400000000 | |
[ T0] MTRR default type: uncachable | |
[ T0] MTRR fixed ranges enabled: | |
[ T0] 00000-9FFFF write-back | |
[ T0] A0000-BFFFF write-through | |
[ T0] C0000-FFFFF write-protect | |
[ T0] MTRR variable ranges enabled: | |
[ T0] 0 base 000000000000 mask FFFF80000000 write-back | |
[ T0] 1 base 000080000000 mask FFFFE0000000 write-back | |
[ T0] 2 base 0000A0000000 mask FFFFF0000000 write-back | |
[ T0] 3 base 0000FF000000 mask FFFFFF000000 write-protect | |
[ T0] 4 base 0000AC000000 mask FFFFFC000000 uncachable | |
[ T0] 5 base 0000A2FA0000 mask FFFFFFFF0000 uncachable | |
[ T0] 6 disabled | |
[ T0] 7 disabled | |
[ T0] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT | |
[ T0] Using GB pages for direct mapping | |
[ T0] ACPI: Early table checksum verification disabled | |
[ T0] ACPI: RSDP 0x00000000000F0000 000024 (v02 ) | |
[ T0] ACPI: XSDT 0x00000000000F0024 000044 (v01 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: FACP 0x00000000000F0068 000114 (v02 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: DSDT 0x00000000000F01BC 000024 (v02 MIKE DSDTTBL 00000000 INTL 20140214) | |
[ T0] ACPI: FACS 0x00000000000F017C 000040 | |
[ T0] ACPI: APIC 0x00000000000F01E0 000070 (v04 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: Ba?� 0x00000000000F0250 FEFE6929 (v207 %�B$z` ??��#>?p� C3FC9449 ?�Hf 5B1093BA) | |
[ T0] ACPI: /9?? 0x00000000000F028C F666D07 (v124 �;c'B� ??�.O��? 562FAFDB �ӭJ FBD434A9) | |
[ T0] ACPI: Local APIC address 0xfee00000 | |
[ T0] Zone ranges: | |
[ T0] DMA32 [mem 0x0000000000001000-0x000000007fffffff] | |
[ T0] Normal empty | |
[ T0] Movable zone start for each node | |
[ T0] Early memory node ranges | |
[ T0] node 0: [mem 0x0000000000001000-0x000000000000ffff] | |
[ T0] node 0: [mem 0x0000000000100000-0x000000007fffffff] | |
[ T0] Zeroed struct page in unavailable ranges: 241 pages | |
[ T0] Initmem setup node 0 [mem 0x0000000000001000-0x000000007fffffff] | |
[ T0] On node 0 totalpages: 524047 | |
[ T0] DMA32 zone: 7168 pages used for memmap | |
[ T0] DMA32 zone: 15 pages reserved | |
[ T0] DMA32 zone: 524047 pages, LIFO batch:63 | |
[ T0] ACPI: Local APIC address 0xfee00000 | |
[ T0] Using ACPI for processor (LAPIC) configuration information | |
[ T0] [mem 0x80000000-0xffffffff] available for PCI devices | |
[ T0] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns | |
[ T0] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 | |
[ T0] pcpu-alloc: [0] 0 | |
[ T0] Built 1 zonelists, mobility grouping on. Total pages: 516864 | |
[ T0] Kernel command line: 8250.force_polling=1 pci=lastbus=0 pci=noacpi pci=earlydump pci=nobios kgdboc=ttyS0,115200 cpuidle.off=1 no_timer_check acpi_rsdp=0xf0000 noefi earlyprintk=ttyS0,115200,keep console=ttyS0,115200 | |
[ T0] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) | |
[ T0] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) | |
[ T0] mem auto-init: stack:off, heap alloc:off, heap free:off | |
[ T0] Memory: 2051992K/2096188K available (4097K kernel code, 475K rwdata, 864K rodata, 1588K init, 1312K bss, 44196K reserved, 0K cma-reserved) | |
[ T0] Using NULL legacy PIC | |
[ T0] NR_IRQS: 4352, nr_irqs: 32, preallocated irqs: 0 | |
[ T0] Console: colour dummy device 80x25 | |
[ T0] Linux version 5.8.0home/rminnich/AMD64/linux+ (rminnich@rminnich-MacBookPro) (gcc (Ubuntu 7.5.0-3ubuntu1~18.04) 7.5.0, GNU ld (GNU Binutils for Ubuntu) 2.30) #300 Fri Nov 20 13:40:17 PST 2020 | |
[ T0] Command line: | |
[ T0] KERNEL supported cpus: | |
[ T0] AMD AuthenticAMD | |
[ T0] x86/fpu: Supporting XSAVE feature 0x001: 'x87 floating point registers' | |
[ T0] x86/fpu: Supporting XSAVE feature 0x002: 'SSE registers' | |
[ T0] x86/fpu: Supporting XSAVE feature 0x004: 'AVX registers' | |
[ T0] x86/fpu: xstate_offset[2]: 576, xstate_sizes[2]: 256 | |
[ T0] x86/fpu: Enabled xstate features 0x7, context size is 832 bytes, using 'compacted' format. | |
[ T0] BIOS-provided physical RAM map: | |
[ T0] BIOS-e820: [mem 0x0000000000000000-0x0000000000000fff] reserved | |
[ T0] BIOS-e820: [mem 0x0000000000001000-0x000000000000ffff] usable | |
[ T0] BIOS-e820: [mem 0x0000000000010000-0x00000000000fffff] reserved | |
[ T0] BIOS-e820: [mem 0x0000000000100000-0x000000007fffffff] usable | |
[ T0] PCI: Unknown option `nobios' | |
[ T0] printk: console [earlyser0] enabled | |
[ T0] NX (Execute Disable) protection: active | |
[ T0] tsc: Fast TSC calibration using PIT | |
[ T0] tsc: Detected 2350.035 MHz processor | |
[ T0] e820: update [mem 0x00000000-0x00000fff] usable ==> reserved | |
[ T0] e820: remove [mem 0x000a0000-0x000fffff] usable | |
[ T0] last_pfn = 0x80000 max_arch_pfn = 0x400000000 | |
[ T0] MTRR default type: uncachable | |
[ T0] MTRR fixed ranges enabled: | |
[ T0] 00000-9FFFF write-back | |
[ T0] A0000-BFFFF write-through | |
[ T0] C0000-FFFFF write-protect | |
[ T0] MTRR variable ranges enabled: | |
[ T0] 0 base 000000000000 mask FFFF80000000 write-back | |
[ T0] 1 base 000080000000 mask FFFFE0000000 write-back | |
[ T0] 2 base 0000A0000000 mask FFFFF0000000 write-back | |
[ T0] 3 base 0000FF000000 mask FFFFFF000000 write-protect | |
[ T0] 4 base 0000AC000000 mask FFFFFC000000 uncachable | |
[ T0] 5 base 0000A2FA0000 mask FFFFFFFF0000 uncachable | |
[ T0] 6 disabled | |
[ T0] 7 disabled | |
[ T0] x86/PAT: Configuration [0-7]: WB WC UC- UC WB WP UC- WT | |
[ T0] Using GB pages for direct mapping | |
[ T0] ACPI: Early table checksum verification disabled | |
[ T0] ACPI: RSDP 0x00000000000F0000 000024 (v02 ) | |
[ T0] ACPI: XSDT 0x00000000000F0024 000044 (v01 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: FACP 0x00000000000F0068 000114 (v02 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: DSDT 0x00000000000F01BC 000024 (v02 MIKE DSDTTBL 00000000 INTL 20140214) | |
[ T0] ACPI: FACS 0x00000000000F017C 000040 | |
[ T0] ACPI: APIC 0x00000000000F01E0 000070 (v04 OREORE xOREBOOT 00000000 RUST 00000000) | |
[ T0] ACPI: Ba?� 0x00000000000F0250 FEFE6929 (v207 %�B$z` ??��#>?p� C3FC9449 ?�Hf 5B1093BA) | |
[ T0] ACPI: /9?? 0x00000000000F028C F666D07 (v124 �;c'B� ??�.O��? 562FAFDB �ӭJ FBD434A9) | |
[ T0] ACPI: Local APIC address 0xfee00000 | |
[ T0] Zone ranges: | |
[ T0] DMA32 [mem 0x0000000000001000-0x000000007fffffff] | |
[ T0] Normal empty | |
[ T0] Movable zone start for each node | |
[ T0] Early memory node ranges | |
[ T0] node 0: [mem 0x0000000000001000-0x000000000000ffff] | |
[ T0] node 0: [mem 0x0000000000100000-0x000000007fffffff] | |
[ T0] Zeroed struct page in unavailable ranges: 241 pages | |
[ T0] Initmem setup node 0 [mem 0x0000000000001000-0x000000007fffffff] | |
[ T0] On node 0 totalpages: 524047 | |
[ T0] DMA32 zone: 7168 pages used for memmap | |
[ T0] DMA32 zone: 15 pages reserved | |
[ T0] DMA32 zone: 524047 pages, LIFO batch:63 | |
[ T0] ACPI: Local APIC address 0xfee00000 | |
[ T0] Using ACPI for processor (LAPIC) configuration information | |
[ T0] [mem 0x80000000-0xffffffff] available for PCI devices | |
[ T0] clocksource: refined-jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645519600211568 ns | |
[ T0] pcpu-alloc: s0 r0 d32768 u32768 alloc=1*32768 | |
[ T0] pcpu-alloc: [0] 0 | |
[ T0] Built 1 zonelists, mobility grouping on. Total pages: 516864 | |
[ T0] Kernel command line: 8250.force_polling=1 pci=lastbus=0 pci=noacpi pci=earlydump pci=nobios kgdboc=ttyS0,115200 cpuidle.off=1 no_timer_check acpi_rsdp=0xf0000 noefi earlyprintk=ttyS0,115200,keep console=ttyS0,115200 | |
[ T0] Dentry cache hash table entries: 262144 (order: 9, 2097152 bytes, linear) | |
[ T0] Inode-cache hash table entries: 131072 (order: 8, 1048576 bytes, linear) | |
[ T0] mem auto-init: stack:off, heap alloc:off, heap free:off | |
[ T0] Memory: 2051992K/2096188K available (4097K kernel code, 475K rwdata, 864K rodata, 1588K init, 1312K bss, 44196K reserved, 0K cma-reserved) | |
[ T0] Using NULL legacy PIC | |
[ T0] NR_IRQS: 4352, nr_irqs: 32, preallocated irqs: 0 | |
[ T0] Console: colour dummy device 80x25 | |
[ T0] printk: console [ttyS0] enabled | |
[ T0] printk: console [ttyS0] enabled | |
[ T0] ACPI: Core revision 20200528 | |
[ T0] ACPI: Core revision 20200528 | |
[ T0] ACPI BIOS Warning (bug): Incorrect checksum in table [APIC] - 0x00, should be 0x0D (20200528/tbprint-177) | |
[ T0] ACPI BIOS Warning (bug): Incorrect checksum in table [APIC] - 0x00, should be 0x0D (20200528/tbprint-177) | |
[ T0] ACPI: setting ELCR to 0200 (from 0000) | |
[ T0] ACPI: setting ELCR to 0200 (from 0000) | |
[ T0] Failed to register legacy timer interrupt | |
[ T0] Failed to register legacy timer interrupt | |
[ T0] APIC: Switch to symmetric I/O mode setup | |
[ T0] APIC: Switch to symmetric I/O mode setup | |
[ T0] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x21dfd759f30, max_idle_ns: 440795308375 ns | |
[ T0] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x21dfd759f30, max_idle_ns: 440795308375 ns | |
[ T0] Calibrating delay loop (skipped), value calculated using timer frequency.. 4700.07 BogoMIPS (lpj=9400140) | |
[ T0] Calibrating delay loop (skipped), value calculated using timer frequency.. 4700.07 BogoMIPS (lpj=9400140) | |
[ T0] pid_max: default: 4096 minimum: 301 | |
[ T0] pid_max: default: 4096 minimum: 301 | |
[ T0] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) | |
[ T0] Mount-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) | |
[ T0] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) | |
[ T0] Mountpoint-cache hash table entries: 4096 (order: 3, 32768 bytes, linear) | |
[ T0] rdrand: disabled | |
[ T0] rdrand: disabled | |
[ T0] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 512 | |
[ T0] Last level iTLB entries: 4KB 1024, 2MB 1024, 4MB 512 | |
[ T0] Last level dTLB entries: 4KB 1536, 2MB 1536, 4MB 768, 1GB 0 | |
[ T0] Last level dTLB entries: 4KB 1536, 2MB 1536, 4MB 768, 1GB 0 | |
[ T0] CPU: AMD EPYC TITUS N-Core Processor (family: 0x17, model: 0x18, stepping: 0x1) | |
[ T0] CPU: AMD EPYC TITUS N-Core Processor (family: 0x17, model: 0x18, stepping: 0x1) | |
[ T0] Spectre V1 : Mitigation: usercopy/swapgs barriers and __user pointer sanitization | |
[ T0] Spectre V1 : Mitigation: usercopy/swapgs barriers and __user pointer sanitization | |
[ T0] Spectre V2 : Spectre mitigation: kernel not compiled with retpoline; no mitigation available! | |
[ T0] Spectre V2 : Spectre mitigation: kernel not compiled with retpoline; no mitigation available! | |
[ T0] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl | |
[ T0] Speculative Store Bypass: Mitigation: Speculative Store Bypass disabled via prctl | |
[ T1] do one initcall 0xffffffff8192d5bd | |
[ T1] do one initcall 0xffffffff8192d5bd | |
[ T1] do one initcall 0xffffffff8192d5c7 | |
[ T1] do one initcall 0xffffffff8192d5c7 | |
[ T1] do one initcall 0xffffffff8192d616 | |
[ T1] do one initcall 0xffffffff8192d616 | |
[ T1] Performance Events: Fam17h+ core perfctr, AMD PMU driver. | |
[ T1] Performance Events: Fam17h+ core perfctr, AMD PMU driver. | |
[ T1] ... version: 0 | |
[ T1] ... version: 0 | |
[ T1] ... bit width: 48 | |
[ T1] ... bit width: 48 | |
[ T1] ... generic registers: 6 | |
[ T1] ... generic registers: 6 | |
[ T1] ... value mask: 0000ffffffffffff | |
[ T1] ... value mask: 0000ffffffffffff | |
[ T1] ... max period: 00007fffffffffff | |
[ T1] ... max period: 00007fffffffffff | |
[ T1] ... fixed-purpose events: 0 | |
[ T1] ... fixed-purpose events: 0 | |
[ T1] ... event mask: 000000000000003f | |
[ T1] ... event mask: 000000000000003f | |
[ T1] do one initcall 0xffffffff8192e506 | |
[ T1] do one initcall 0xffffffff8192e506 | |
[ T1] do one initcall 0xffffffff8192ea16 | |
[ T1] do one initcall 0xffffffff8192ea16 | |
[ T1] do one initcall 0xffffffff819379d5 | |
[ T1] do one initcall 0xffffffff819379d5 | |
[ T1] do one initcall 0xffffffff8193858c | |
[ T1] do one initcall 0xffffffff8193858c | |
[ T1] do one initcall 0xffffffff8193ba2a | |
[ T1] do one initcall 0xffffffff8193ba2a | |
[ T1] do one initcall 0xffffffff8193f3c8 | |
[ T1] do one initcall 0xffffffff8193f3c8 | |
[ T1] do one initcall 0xffffffff8193f407 | |
[ T1] do one initcall 0xffffffff8193f407 | |
[ T1] do one initcall 0xffffffff8193f4d8 | |
[ T1] do one initcall 0xffffffff8193f4d8 | |
[ T1] do one initcall 0xffffffff8194c2e9 | |
[ T1] do one initcall 0xffffffff8194c2e9 | |
[ T1] tsc_khz is 2350035 | |
[ T1] tsc_khz is 2350035 | |
[ T1] deltaj 0 LAPIC_CAL_LOOPS-2 23 LAPIC_CAL_LOOPS+2 27 | |
[ T1] deltaj 0 LAPIC_CAL_LOOPS-2 23 LAPIC_CAL_LOOPS+2 27 | |
[ T1] devtmpfs: initialized | |
[ T1] devtmpfs: initialized | |
[ T1] do initcall level 0 | |
[ T1] do initcall level 0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943a2f | |
[ T1] do one initcall 0xffffffff81943a2f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943c04 | |
[ T1] do one initcall 0xffffffff81943c04 | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 1 | |
[ T1] do initcall level 1 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192fe6f | |
[ T1] do one initcall 0xffffffff8192fe6f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81935c7c | |
[ T1] do one initcall 0xffffffff81935c7c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193be55 | |
[ T1] do one initcall 0xffffffff8193be55 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c5e7 | |
[ T1] do one initcall 0xffffffff8193c5e7 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d0ef | |
[ T1] do one initcall 0xffffffff8193d0ef | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d808 | |
[ T1] do one initcall 0xffffffff8193d808 | |
[ T1] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns | |
[ T1] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d97a | |
[ T1] do one initcall 0xffffffff8193d97a | |
[ T1] futex hash table entries: 16 (order: -4, 384 bytes, linear) | |
[ T1] futex hash table entries: 16 (order: -4, 384 bytes, linear) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819409ef | |
[ T1] do one initcall 0xffffffff819409ef | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194cd0c | |
[ T1] do one initcall 0xffffffff8194cd0c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194353e | |
[ T1] do one initcall 0xffffffff8194353e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943911 | |
[ T1] do one initcall 0xffffffff81943911 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819439b8 | |
[ T1] do one initcall 0xffffffff819439b8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943a76 | |
[ T1] do one initcall 0xffffffff81943a76 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a34e | |
[ T1] do one initcall 0xffffffff8194a34e | |
[ T1] thermal_sys: Registered thermal governor 'step_wise' | |
[ T1] thermal_sys: Registered thermal governor 'step_wise' | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a42d | |
[ T1] do one initcall 0xffffffff8194a42d | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 2 | |
[ T1] do initcall level 2 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193cf35 | |
[ T1] do one initcall 0xffffffff8193cf35 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193eb8c | |
[ T1] do one initcall 0xffffffff8193eb8c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fe99 | |
[ T1] do one initcall 0xffffffff8193fe99 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ff69 | |
[ T1] do one initcall 0xffffffff8193ff69 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943b77 | |
[ T1] do one initcall 0xffffffff81943b77 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81944090 | |
[ T1] do one initcall 0xffffffff81944090 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947843 | |
[ T1] do one initcall 0xffffffff81947843 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947d35 | |
[ T1] do one initcall 0xffffffff81947d35 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194931c | |
[ T1] do one initcall 0xffffffff8194931c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a448 | |
[ T1] do one initcall 0xffffffff8194a448 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194bddb | |
[ T1] do one initcall 0xffffffff8194bddb | |
[ T1] call early root info init | |
[ T1] call early root info init | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] Check 0x0 0x18 | |
[ T1] call ecs init | |
[ T1] call ecs init | |
[ T1] done | |
[ T1] done | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 3 | |
[ T1] do initcall level 3 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192faa8 | |
[ T1] do one initcall 0xffffffff8192faa8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192fd16 | |
[ T1] do one initcall 0xffffffff8192fd16 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193116b | |
[ T1] do one initcall 0xffffffff8193116b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81933884 | |
[ T1] do one initcall 0xffffffff81933884 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819442c8 | |
[ T1] do one initcall 0xffffffff819442c8 | |
[ T1] ACPI: bus type PCI registered | |
[ T1] ACPI: bus type PCI registered | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a78a | |
[ T1] do one initcall 0xffffffff8194a78a | |
[ T1] PCI: Using configuration type 1 for base access | |
[ T1] PCI: Using configuration type 1 for base access | |
[ T1] PCI: Using configuration type 1 for extended access | |
[ T1] PCI: Using configuration type 1 for extended access | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 4 | |
[ T1] do initcall level 4 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192d607 | |
[ T1] do one initcall 0xffffffff8192d607 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193115a | |
[ T1] do one initcall 0xffffffff8193115a | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193367a | |
[ T1] do one initcall 0xffffffff8193367a | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193bd65 | |
[ T1] do one initcall 0xffffffff8193bd65 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c2e0 | |
[ T1] do one initcall 0xffffffff8193c2e0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c78b | |
[ T1] do one initcall 0xffffffff8193c78b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ca4b | |
[ T1] do one initcall 0xffffffff8193ca4b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ddad | |
[ T1] do one initcall 0xffffffff8193ddad | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193e37c | |
[ T1] do one initcall 0xffffffff8193e37c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fd12 | |
[ T1] do one initcall 0xffffffff8193fd12 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fec8 | |
[ T1] do one initcall 0xffffffff8193fec8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ff8d | |
[ T1] do one initcall 0xffffffff8193ff8d | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff810a7670 | |
[ T1] do one initcall 0xffffffff810a7670 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff810a7698 | |
[ T1] do one initcall 0xffffffff810a7698 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194cc40 | |
[ T1] do one initcall 0xffffffff8194cc40 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943a65 | |
[ T1] do one initcall 0xffffffff81943a65 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81112ab2 | |
[ T1] do one initcall 0xffffffff81112ab2 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81944efa | |
[ T1] do one initcall 0xffffffff81944efa | |
[ T1] ACPI: Added _OSI(Module Device) | |
[ T1] ACPI: Added _OSI(Module Device) | |
[ T1] ACPI: Added _OSI(Processor Device) | |
[ T1] ACPI: Added _OSI(Processor Device) | |
[ T1] ACPI: Added _OSI(3.0 _SCP Extensions) | |
[ T1] ACPI: Added _OSI(3.0 _SCP Extensions) | |
[ T1] ACPI: Added _OSI(Processor Aggregator Device) | |
[ T1] ACPI: Added _OSI(Processor Aggregator Device) | |
[ T1] ACPI: Added _OSI(Linux-Dell-Video) | |
[ T1] ACPI: Added _OSI(Linux-Dell-Video) | |
[ T1] ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio) | |
[ T1] ACPI: Added _OSI(Linux-Lenovo-NV-HDMI-Audio) | |
[ T1] ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics) | |
[ T1] ACPI: Added _OSI(Linux-HPI-Hybrid-Graphics) | |
[ T1] ACPI: 1 ACPI AML tables successfully acquired and loaded | |
[ T1] ACPI: 1 ACPI AML tables successfully acquired and loaded | |
[ T1] ACPI: Interpreter enabled | |
[ T1] ACPI: Interpreter enabled | |
[ T1] ACPI: (supports S0) | |
[ T1] ACPI: (supports S0) | |
[ T1] ACPI: Using PIC for interrupt routing | |
[ T1] ACPI: Using PIC for interrupt routing | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81946ddc | |
[ T1] do one initcall 0xffffffff81946ddc | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81948d77 | |
[ T1] do one initcall 0xffffffff81948d77 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819494f0 | |
[ T1] do one initcall 0xffffffff819494f0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a18b | |
[ T1] do one initcall 0xffffffff8194a18b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a313 | |
[ T1] do one initcall 0xffffffff8194a313 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a685 | |
[ T1] do one initcall 0xffffffff8194a685 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194ab5f | |
[ T1] do one initcall 0xffffffff8194ab5f | |
[ T1] PCI: Probing PCI hardware | |
[ T1] PCI: Probing PCI hardware | |
[ T1] PCI: root bus 00: using default resources | |
[ T1] PCI: root bus 00: using default resources | |
[ T1] PCI: Probing PCI hardware (bus 00) | |
[ T1] PCI: Probing PCI hardware (bus 00) | |
[ T1] PCI host bridge to bus 0000:00 | |
[ T1] PCI host bridge to bus 0000:00 | |
[ T1] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] | |
[ T1] pci_bus 0000:00: root bus resource [io 0x0000-0xffff] | |
[ T1] pci_bus 0000:00: root bus resource [mem 0x00000000-0xffffffffffff] | |
[ T1] pci_bus 0000:00: root bus resource [mem 0x00000000-0xffffffffffff] | |
[ T1] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] | |
[ T1] pci_bus 0000:00: No busn resource found for root bus, will use [bus 00-ff] | |
[ T1] pci_bus 0000:00: scanning bus | |
[ T1] pci_bus 0000:00: scanning bus | |
[ T1] pci 0000:00:00.0: [1022:15d0] type 00 class 0x060000 | |
[ T1] pci 0000:00:00.0: [1022:15d0] type 00 class 0x060000 | |
[ T1] pci 0000:00:00.0: config space: | |
[ T1] pci 0000:00:00.0: config space: | |
[ T1] 00000000: 22 10 d0 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 d0 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 d0 15 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 d0 15 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 80 00 00 00 00 00 00 00 | |
[ T1] 00000050: 22 10 d0 15 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 22 10 d0 15 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 08 01 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 ac 09 b1 03 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 ac 09 b1 03 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 80 80 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 80 80 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:00.2: [1022:15d1] type 00 class 0x080600 | |
[ T1] pci 0000:00:00.2: [1022:15d1] type 00 class 0x080600 | |
[ T1] pci 0000:00:00.2: config space: | |
[ T1] pci 0000:00:00.2: config space: | |
[ T1] 00000000: 22 10 d1 15 00 00 10 00 00 00 06 08 00 00 80 00 | |
[ T1] 00000000: 22 10 d1 15 00 00 10 00 00 00 06 08 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 d1 15 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 d1 15 | |
[ T1] 00000030: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 | |
[ T1] 00000030: 00 00 00 00 40 00 00 00 00 00 00 00 00 01 00 00 | |
[ T1] 00000040: 0f 64 0b 19 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 0f 64 0b 19 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 40 30 20 00 80 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 40 30 20 00 80 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 05 74 84 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 05 74 84 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 08 00 03 a8 22 10 d1 15 01 2b 00 00 | |
[ T1] 00000070: 00 00 00 00 08 00 03 a8 22 10 d1 15 01 2b 00 00 | |
[ T1] 00000080: da 1a 20 62 cf cf 03 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: da 1a 20 62 cf cf 03 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 02 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 bf 7f 4f 2d 10 9c 73 0e 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 bf 7f 4f 2d 10 9c 73 0e 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 75 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 75 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.0: [1022:1452] type 00 class 0x060000 | |
[ T1] pci 0000:00:01.0: [1022:1452] type 00 class 0x060000 | |
[ T1] pci 0000:00:01.0: config space: | |
[ T1] pci 0000:00:01.0: config space: | |
[ T1] 00000000: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.1: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.1: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.1: config space: | |
[ T1] pci 0000:00:01.1: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 83 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 83 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.1: enabling Extended Tags | |
[ T1] pci 0000:00:01.1: enabling Extended Tags | |
[ T1] pci 0000:00:01.1: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.1: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.1: PME# disabled | |
[ T1] pci 0000:00:01.1: PME# disabled | |
[ T1] pci 0000:00:01.2: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.2: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.2: config space: | |
[ T1] pci 0000:00:01.2: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 23 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 23 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.2: enabling Extended Tags | |
[ T1] pci 0000:00:01.2: enabling Extended Tags | |
[ T1] pci 0000:00:01.2: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.2: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.2: PME# disabled | |
[ T1] pci 0000:00:01.2: PME# disabled | |
[ T1] pci 0000:00:01.3: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.3: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.3: config space: | |
[ T1] pci 0000:00:01.3: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 23 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 23 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.3: enabling Extended Tags | |
[ T1] pci 0000:00:01.3: enabling Extended Tags | |
[ T1] pci 0000:00:01.3: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.3: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.3: PME# disabled | |
[ T1] pci 0000:00:01.3: PME# disabled | |
[ T1] pci 0000:00:01.4: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.4: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.4: config space: | |
[ T1] pci 0000:00:01.4: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.4: enabling Extended Tags | |
[ T1] pci 0000:00:01.4: enabling Extended Tags | |
[ T1] pci 0000:00:01.4: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.4: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.4: PME# disabled | |
[ T1] pci 0000:00:01.4: PME# disabled | |
[ T1] pci 0000:00:01.5: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.5: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.5: config space: | |
[ T1] pci 0000:00:01.5: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.5: enabling Extended Tags | |
[ T1] pci 0000:00:01.5: enabling Extended Tags | |
[ T1] pci 0000:00:01.5: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.5: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.5: PME# disabled | |
[ T1] pci 0000:00:01.5: PME# disabled | |
[ T1] pci 0000:00:01.6: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.6: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.6: config space: | |
[ T1] pci 0000:00:01.6: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.6: enabling Extended Tags | |
[ T1] pci 0000:00:01.6: enabling Extended Tags | |
[ T1] pci 0000:00:01.6: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.6: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.6: PME# disabled | |
[ T1] pci 0000:00:01.6: PME# disabled | |
[ T1] pci 0000:00:01.7: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.7: [1022:15d3] type 01 class 0x060400 | |
[ T1] pci 0000:00:01.7: config space: | |
[ T1] pci 0000:00:01.7: config space: | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000000: 22 10 d3 15 00 00 10 00 00 00 04 06 00 00 81 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000060: 10 28 00 00 13 3c 73 f7 00 00 01 11 00 00 04 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 3f 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 01 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000c0: 0d c8 00 00 22 10 34 12 08 00 03 a8 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:01.7: enabling Extended Tags | |
[ T1] pci 0000:00:01.7: enabling Extended Tags | |
[ T1] pci 0000:00:01.7: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.7: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:01.7: PME# disabled | |
[ T1] pci 0000:00:01.7: PME# disabled | |
[ T1] pci 0000:00:08.0: [1022:1452] type 00 class 0x060000 | |
[ T1] pci 0000:00:08.0: [1022:1452] type 00 class 0x060000 | |
[ T1] pci 0000:00:08.0: config space: | |
[ T1] pci 0000:00:08.0: config space: | |
[ T1] 00000000: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 80 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:08.1: [1022:15db] type 01 class 0x060400 | |
[ T1] pci 0000:00:08.1: [1022:15db] type 01 class 0x060400 | |
[ T1] pci 0000:00:08.1: config space: | |
[ T1] pci 0000:00:08.1: config space: | |
[ T1] 00000000: 22 10 db 15 00 00 10 00 00 00 04 06 00 00 01 00 | |
[ T1] 00000000: 22 10 db 15 00 00 10 00 00 00 04 06 00 00 01 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 03 0d 70 00 00 00 03 31 00 00 00 00 | |
[ T1] 00000060: 10 28 00 00 03 0d 70 00 00 00 03 31 00 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 1f 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 1f 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d 00 00 00 22 10 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d 00 00 00 22 10 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:08.1: enabling Extended Tags | |
[ T1] pci 0000:00:08.1: enabling Extended Tags | |
[ T1] pci 0000:00:08.1: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:08.1: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:08.1: PME# disabled | |
[ T1] pci 0000:00:08.1: PME# disabled | |
[ T1] pci 0000:00:08.2: [1022:15dc] type 01 class 0x060400 | |
[ T1] pci 0000:00:08.2: [1022:15dc] type 01 class 0x060400 | |
[ T1] pci 0000:00:08.2: config space: | |
[ T1] pci 0000:00:08.2: config space: | |
[ T1] 00000000: 22 10 dc 15 00 00 10 00 00 00 04 06 00 00 01 00 | |
[ T1] 00000000: 22 10 dc 15 00 00 10 00 00 00 04 06 00 00 01 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 01 01 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 01 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 | |
[ T1] 00000030: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000050: 01 58 03 c8 00 00 00 00 10 a0 42 00 22 80 00 00 | |
[ T1] 00000060: 10 28 00 00 03 0d 70 00 00 00 03 31 00 00 00 00 | |
[ T1] 00000060: 10 28 00 00 03 0d 70 00 00 00 03 31 00 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 40 00 00 00 01 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 1f 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 0e 00 00 00 43 00 1f 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 05 c0 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d 00 00 00 22 10 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 0d 00 00 00 22 10 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:08.2: enabling Extended Tags | |
[ T1] pci 0000:00:08.2: enabling Extended Tags | |
[ T1] pci 0000:00:08.2: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:08.2: PME# supported from D0 D3hot D3cold | |
[ T1] pci 0000:00:08.2: PME# disabled | |
[ T1] pci 0000:00:08.2: PME# disabled | |
[ T1] pci 0000:00:14.0: [1022:790b] type 00 class 0x0c0500 | |
[ T1] pci 0000:00:14.0: [1022:790b] type 00 class 0x0c0500 | |
[ T1] pci 0000:00:14.0: config space: | |
[ T1] pci 0000:00:14.0: config space: | |
[ T1] 00000000: 22 10 0b 79 03 04 20 02 61 00 05 0c 00 00 80 00 | |
[ T1] 00000000: 22 10 0b 79 03 04 20 02 61 00 05 0c 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0b 79 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0b 79 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:14.3: [1022:790e] type 00 class 0x060100 | |
[ T1] pci 0000:00:14.3: [1022:790e] type 00 class 0x060100 | |
[ T1] pci 0000:00:14.3: config space: | |
[ T1] pci 0000:00:14.3: config space: | |
[ T1] 00000000: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 | |
[ T1] 00000000: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0e 79 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 0e 79 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 1c 00 00 00 c0 00 00 00 07 ff 20 00 00 00 00 00 | |
[ T1] 00000040: 1c 00 00 00 c0 00 00 00 07 ff 20 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 40 16 00 00 00 00 0f 00 00 ff ff ff | |
[ T1] 00000060: 00 00 00 00 40 16 00 00 00 00 0f 00 00 ff ff ff | |
[ T1] 00000070: 67 45 23 00 00 00 00 00 91 02 00 00 03 0a 00 00 | |
[ T1] 00000070: 67 45 23 00 00 00 00 00 91 02 00 00 03 0a 00 00 | |
[ T1] 00000080: 08 00 03 a8 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 08 00 03 a8 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 02 00 c1 fe 2e 01 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 02 00 c1 fe 2e 01 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 04 00 6d 33 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 04 00 6d 33 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f7 ff | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 f7 ff | |
[ T1] 000000d0: 86 ff fd 08 42 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 86 ff fd 08 42 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:14.6: [1022:7906] type 00 class 0x080501 | |
[ T1] pci 0000:00:14.6: [1022:7906] type 00 class 0x080501 | |
[ T1] pci 0000:00:14.6: config space: | |
[ T1] pci 0000:00:14.6: config space: | |
[ T1] 00000000: 22 10 06 79 00 00 30 02 51 01 05 08 00 07 80 00 | |
[ T1] 00000000: 22 10 06 79 00 00 30 02 51 01 05 08 00 07 80 00 | |
[ T1] 00000010: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 04 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 06 78 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 06 78 | |
[ T1] 00000030: 00 00 00 00 80 00 00 00 00 00 00 00 00 01 00 00 | |
[ T1] 00000030: 00 00 00 00 80 00 00 00 00 00 00 00 00 01 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 05 90 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 05 90 80 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 01 00 03 80 08 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 01 00 03 80 08 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 02 00 00 00 b2 32 fe 31 70 45 00 00 64 00 c8 00 | |
[ T1] 000000a0: 02 00 00 00 b2 32 fe 31 70 45 00 00 64 00 c8 00 | |
[ T1] 000000b0: 9f 2c 0c 02 01 00 00 80 00 00 00 88 98 cc 44 00 | |
[ T1] 000000b0: 9f 2c 0c 02 01 00 00 80 00 00 00 88 98 cc 44 00 | |
[ T1] 000000c0: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 03 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: cf 15 78 60 43 30 00 00 10 00 10 00 00 00 00 00 | |
[ T1] 000000d0: cf 15 78 60 43 30 00 00 10 00 10 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 3f 00 01 00 00 00 01 00 00 00 00 00 00 40 00 00 | |
[ T1] 000000f0: 3f 00 01 00 00 00 01 00 00 00 00 00 00 40 00 00 | |
[ T1] pci 0000:00:14.6: reg 0x10: [mem 0x00000000-0x000000ff 64bit] | |
[ T1] pci 0000:00:14.6: reg 0x10: [mem 0x00000000-0x000000ff 64bit] | |
[ T1] pci 0000:00:14.6: PME# supported from D3cold | |
[ T1] pci 0000:00:14.6: PME# supported from D3cold | |
[ T1] pci 0000:00:14.6: PME# disabled | |
[ T1] pci 0000:00:14.6: PME# disabled | |
[ T1] pci 0000:00:18.0: [1022:15e8] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.0: [1022:15e8] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.0: config space: | |
[ T1] pci 0000:00:18.0: config space: | |
[ T1] 00000000: 22 10 e8 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 e8 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 0f 00 00 00 27 12 95 03 1f 0f 0b 0f 0c 00 00 00 | |
[ T1] 00000040: 0f 00 00 00 27 12 95 03 1f 0f 0b 0f 0c 00 00 00 | |
[ T1] 00000050: 0f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 0f 0f 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 01 00 00 00 00 00 00 00 0a 09 09 09 09 09 09 09 | |
[ T1] 00000090: 01 00 00 00 00 00 00 00 0a 09 09 09 09 09 09 09 | |
[ T1] 000000a0: 93 00 00 ff 90 00 00 00 90 00 00 00 90 00 00 00 | |
[ T1] 000000a0: 93 00 00 ff 90 00 00 00 90 00 00 00 90 00 00 00 | |
[ T1] 000000b0: 90 00 00 00 90 00 00 00 90 00 00 00 90 00 00 00 | |
[ T1] 000000b0: 90 00 00 00 90 00 00 00 90 00 00 00 90 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 09 00 00 00 00 00 00 00 09 00 00 00 | |
[ T1] pci 0000:00:18.1: [1022:15e9] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.1: [1022:15e9] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.1: config space: | |
[ T1] pci 0000:00:18.1: config space: | |
[ T1] 00000000: 22 10 e9 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 e9 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 0a 0a 09 09 07 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 0a 0a 09 09 07 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 02 53 53 53 ff 01 ff 01 e0 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 02 53 53 53 ff 01 ff 01 e0 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 01 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 01 00 00 00 00 00 00 00 08 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 01 00 00 00 81 fc 06 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 01 00 00 00 81 fc 06 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 10 10 18 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 10 10 18 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 0e 01 03 00 0c 00 00 00 08 00 00 00 3f ff de 07 | |
[ T1] 000000e0: 0e 01 03 00 0c 00 00 00 08 00 00 00 3f ff de 07 | |
[ T1] 000000f0: 16 ff e5 04 22 ff ff 05 1f fb f5 02 1c f0 cf 02 | |
[ T1] 000000f0: 16 ff e5 04 22 ff ff 05 1f fb f5 02 1c f0 cf 02 | |
[ T1] pci 0000:00:18.2: [1022:15ea] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.2: [1022:15ea] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.2: config space: | |
[ T1] pci 0000:00:18.2: config space: | |
[ T1] 00000000: 22 10 ea 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 ea 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 80 00 1f 00 13 0f 40 81 80 00 80 00 11 00 00 00 | |
[ T1] 00000040: 80 00 1f 00 13 0f 40 81 80 00 80 00 11 00 00 00 | |
[ T1] 00000050: ad 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: ad 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 19 50 06 00 19 06 06 14 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 19 50 06 00 19 06 06 14 | |
[ T1] 00000070: 00 01 00 02 00 04 00 08 00 10 00 20 00 40 00 80 | |
[ T1] 00000070: 00 01 00 02 00 04 00 08 00 10 00 20 00 40 00 80 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:18.3: [1022:15eb] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.3: [1022:15eb] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.3: config space: | |
[ T1] pci 0000:00:18.3: config space: | |
[ T1] 00000000: 22 10 eb 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 eb 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 04 00 00 00 00 00 00 00 00 00 00 00 07 03 00 00 | |
[ T1] 00000040: 04 00 00 00 00 00 00 00 00 00 00 00 07 03 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:18.4: [1022:15ec] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.4: [1022:15ec] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.4: config space: | |
[ T1] pci 0000:00:18.4: config space: | |
[ T1] 00000000: 22 10 ec 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 ec 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 02 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 51 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 51 10 01 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: ad 00 00 00 ad 00 00 00 22 10 e8 15 22 10 e8 15 | |
[ T1] 00000080: ad 00 00 00 ad 00 00 00 22 10 e8 15 22 10 e8 15 | |
[ T1] 00000090: 22 10 e8 15 22 10 e8 15 22 10 e8 15 22 10 e8 15 | |
[ T1] 00000090: 22 10 e8 15 22 10 e8 15 22 10 e8 15 22 10 e8 15 | |
[ T1] 000000a0: 22 10 e8 15 22 10 e8 15 22 10 e8 15 22 10 e8 15 | |
[ T1] 000000a0: 22 10 e8 15 22 10 e8 15 22 10 e8 15 22 10 e8 15 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 01 00 00 00 0f 3f 73 00 03 0b 0e 00 | |
[ T1] 000000c0: 00 00 00 00 01 00 00 00 0f 3f 73 00 03 0b 0e 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 20 20 20 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 20 20 20 00 | |
[ T1] pci 0000:00:18.5: [1022:15ed] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.5: [1022:15ed] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.5: config space: | |
[ T1] pci 0000:00:18.5: config space: | |
[ T1] 00000000: 22 10 ed 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 ed 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 01 00 d7 01 01 00 00 00 01 00 00 00 00 00 00 00 | |
[ T1] 00000090: 01 00 d7 01 01 00 00 00 01 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 80 00 00 00 | |
[ T1] pci 0000:00:18.6: [1022:15ee] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.6: [1022:15ee] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.6: config space: | |
[ T1] pci 0000:00:18.6: config space: | |
[ T1] 00000000: 22 10 ee 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 ee 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 0f 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci 0000:00:18.7: [1022:15ef] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.7: [1022:15ef] type 00 class 0x060000 | |
[ T1] pci 0000:00:18.7: config space: | |
[ T1] pci 0000:00:18.7: config space: | |
[ T1] 00000000: 22 10 ef 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000000: 22 10 ef 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000010: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000020: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000030: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000040: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000050: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000060: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000070: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000080: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 00000090: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000c0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] 000000f0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
[ T1] pci_bus 0000:00: fixups for bus | |
[ T1] pci_bus 0000:00: fixups for bus | |
[ T1] pci 0000:00:01.1: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.1: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.2: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.2: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.3: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.3: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.4: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.4: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.5: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.5: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.6: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.6: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.7: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.7: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:08.1: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:08.1: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:08.2: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:08.2: NOT scanning [bus 00-00] behind bridge, pass 0 | |
[ T1] pci 0000:00:01.1: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.1: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.2: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.2: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.3: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.3: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.4: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.4: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.5: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.5: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.6: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.6: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.7: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:01.7: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:08.1: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:08.1: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:08.2: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci 0000:00:08.2: NOT scanning [bus 00-00] behind bridge, pass 1 | |
[ T1] pci_bus 0000:00: bus scan returning with max=00 | |
[ T1] pci_bus 0000:00: bus scan returning with max=00 | |
[ T1] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00 | |
[ T1] pci_bus 0000:00: busn_res: [bus 00-ff] end is updated to 00 | |
[ T1] pci 0000:00:08.1: ignoring bogus IRQ 255 | |
[ T1] pci 0000:00:08.1: ignoring bogus IRQ 255 | |
[ T1] pci 0000:00:08.2: ignoring bogus IRQ 255 | |
[ T1] pci 0000:00:08.2: ignoring bogus IRQ 255 | |
[ T1] PCI: pci_cache_line_size set to 64 bytes | |
[ T1] PCI: pci_cache_line_size set to 64 bytes | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 5 | |
[ T1] do initcall level 5 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192eaa4 | |
[ T1] do one initcall 0xffffffff8192eaa4 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81934abb | |
[ T1] do one initcall 0xffffffff81934abb | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81939e6e | |
[ T1] do one initcall 0xffffffff81939e6e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193a02f | |
[ T1] do one initcall 0xffffffff8193a02f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d7cb | |
[ T1] do one initcall 0xffffffff8193d7cb | |
[ T1] clocksource: Switched to clocksource tsc-early | |
[ T1] clocksource: Switched to clocksource tsc-early | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ef7b | |
[ T1] do one initcall 0xffffffff8193ef7b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193f40a | |
[ T1] do one initcall 0xffffffff8193f40a | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fa14 | |
[ T1] do one initcall 0xffffffff8193fa14 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fa52 | |
[ T1] do one initcall 0xffffffff8193fa52 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81942f46 | |
[ T1] do one initcall 0xffffffff81942f46 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194345a | |
[ T1] do one initcall 0xffffffff8194345a | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819434ef | |
[ T1] do one initcall 0xffffffff819434ef | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943707 | |
[ T1] do one initcall 0xffffffff81943707 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943724 | |
[ T1] do one initcall 0xffffffff81943724 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943744 | |
[ T1] do one initcall 0xffffffff81943744 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194375e | |
[ T1] do one initcall 0xffffffff8194375e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194377e | |
[ T1] do one initcall 0xffffffff8194377e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194379e | |
[ T1] do one initcall 0xffffffff8194379e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819437bb | |
[ T1] do one initcall 0xffffffff819437bb | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819437d8 | |
[ T1] do one initcall 0xffffffff819437d8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819437f2 | |
[ T1] do one initcall 0xffffffff819437f2 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194380f | |
[ T1] do one initcall 0xffffffff8194380f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194382c | |
[ T1] do one initcall 0xffffffff8194382c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943861 | |
[ T1] do one initcall 0xffffffff81943861 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819439ac | |
[ T1] do one initcall 0xffffffff819439ac | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81945cde | |
[ T1] do one initcall 0xffffffff81945cde | |
[ T1] ACPI: Failed to create genetlink family for ACPI event | |
[ T1] ACPI: Failed to create genetlink family for ACPI event | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81946eb8 | |
[ T1] do one initcall 0xffffffff81946eb8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947172 | |
[ T1] do one initcall 0xffffffff81947172 | |
[ T1] pnp: PnP ACPI init | |
[ T1] pnp: PnP ACPI init | |
[ T1] pnp: PnP ACPI: found 0 devices | |
[ T1] pnp: PnP ACPI: found 0 devices | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81948aad | |
[ T1] do one initcall 0xffffffff81948aad | |
[ C0] clocksource: timekeeping watchdog on CPU0: Marking clocksource 'tsc-early' as unstable because the skew is too large: | |
[ C0] clocksource: timekeeping watchdog on CPU0: Marking clocksource 'tsc-early' as unstable because the skew is too large: | |
[ C0] clocksource: 'refined-jiffies' wd_now: fffedefa wd_last: fffedbad mask: ffffffff | |
[ C0] clocksource: 'refined-jiffies' wd_now: fffedefa wd_last: fffedbad mask: ffffffff | |
[ C0] clocksource: 'tsc-early' cs_now: 26f9473419 cs_last: 22d3836135 mask: ffffffffffffffff | |
[ C0] clocksource: 'tsc-early' cs_now: 26f9473419 cs_last: 22d3836135 mask: ffffffffffffffff | |
[ C0] tsc: Marking TSC unstable due to clocksource watchdog | |
[ C0] tsc: Marking TSC unstable due to clocksource watchdog | |
[ T12] clocksource: Switched to clocksource refined-jiffies | |
[ T12] clocksource: Switched to clocksource refined-jiffies | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819494c5 | |
[ T1] do one initcall 0xffffffff819494c5 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a68e | |
[ T1] do one initcall 0xffffffff8194a68e | |
[ T1] pci 0000:00:14.6: BAR 0: assigned [mem 0x100000000-0x1000000ff 64bit] | |
[ T1] pci 0000:00:14.6: BAR 0: assigned [mem 0x100000000-0x1000000ff 64bit] | |
[ T1] pci_bus 0000:00: resource 4 [io 0x0000-0xffff] | |
[ T1] pci_bus 0000:00: resource 4 [io 0x0000-0xffff] | |
[ T1] pci_bus 0000:00: resource 5 [mem 0x00000000-0xffffffffffff] | |
[ T1] pci_bus 0000:00: resource 5 [mem 0x00000000-0xffffffffffff] | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81944aa7 | |
[ T1] do one initcall 0xffffffff81944aa7 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192d4a8 | |
[ T1] do one initcall 0xffffffff8192d4a8 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81930e80 | |
[ T1] do one initcall 0xffffffff81930e80 | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 6 | |
[ T1] do initcall level 6 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192daa6 | |
[ T1] do one initcall 0xffffffff8192daa6 | |
[ T1] RAPL PMU: API unit is 2^-32 Joules, 0 fixed counters, 10737418240 ms ovfl timer | |
[ T1] RAPL PMU: API unit is 2^-32 Joules, 0 fixed counters, 10737418240 ms ovfl timer | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192df6e | |
[ T1] do one initcall 0xffffffff8192df6e | |
[ T1] amd_uncore: AMD NB counters detected | |
[ T1] amd_uncore: AMD NB counters detected | |
[ T1] amd_uncore: AMD LLC counters detected | |
[ T1] amd_uncore: AMD LLC counters detected | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192e2e3 | |
[ T1] do one initcall 0xffffffff8192e2e3 | |
[ T1] LVT offset 0 assigned for vector 0x400 | |
[ T1] LVT offset 0 assigned for vector 0x400 | |
[ T1] perf: AMD IBS detected (0x000003ff) | |
[ T1] perf: AMD IBS detected (0x000003ff) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192e4b5 | |
[ T1] do one initcall 0xffffffff8192e4b5 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192eb20 | |
[ T1] do one initcall 0xffffffff8192eb20 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8192f695 | |
[ T1] do one initcall 0xffffffff8192f695 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81931765 | |
[ T1] do one initcall 0xffffffff81931765 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81931ba0 | |
[ T1] do one initcall 0xffffffff81931ba0 | |
[ T1] platform rtc_cmos: registered platform RTC device (no PNP device found) | |
[ T1] platform rtc_cmos: registered platform RTC device (no PNP device found) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819335cb | |
[ T1] do one initcall 0xffffffff819335cb | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81935c7f | |
[ T1] do one initcall 0xffffffff81935c7f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81935d4f | |
[ T1] do one initcall 0xffffffff81935d4f | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193876e | |
[ T1] do one initcall 0xffffffff8193876e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193a1c7 | |
[ T1] do one initcall 0xffffffff8193a1c7 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193b586 | |
[ T1] do one initcall 0xffffffff8193b586 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193b88d | |
[ T1] do one initcall 0xffffffff8193b88d | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ba93 | |
[ T1] do one initcall 0xffffffff8193ba93 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c9f0 | |
[ T1] do one initcall 0xffffffff8193c9f0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d590 | |
[ T1] do one initcall 0xffffffff8193d590 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d76e | |
[ T1] do one initcall 0xffffffff8193d76e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d823 | |
[ T1] do one initcall 0xffffffff8193d823 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d850 | |
[ T1] do one initcall 0xffffffff8193d850 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193d8ca | |
[ T1] do one initcall 0xffffffff8193d8ca | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193da25 | |
[ T1] do one initcall 0xffffffff8193da25 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fab5 | |
[ T1] do one initcall 0xffffffff8193fab5 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193fdbe | |
[ T1] do one initcall 0xffffffff8193fdbe | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81940955 | |
[ T1] do one initcall 0xffffffff81940955 | |
[ T1] workingset: timestamp_bits=62 max_order=19 bucket_order=0 | |
[ T1] workingset: timestamp_bits=62 max_order=19 bucket_order=0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81940ab2 | |
[ T1] do one initcall 0xffffffff81940ab2 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81942f86 | |
[ T1] do one initcall 0xffffffff81942f86 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943138 | |
[ T1] do one initcall 0xffffffff81943138 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943401 | |
[ T1] do one initcall 0xffffffff81943401 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819439a0 | |
[ T1] do one initcall 0xffffffff819439a0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943a40 | |
[ T1] do one initcall 0xffffffff81943a40 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943b32 | |
[ T1] do one initcall 0xffffffff81943b32 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194421d | |
[ T1] do one initcall 0xffffffff8194421d | |
[ T1] pcieport 0000:00:01.1: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.1: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.1: enabling bus mastering | |
[ T1] pcieport 0000:00:01.1: enabling bus mastering | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.1: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.2: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.2: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.2: enabling bus mastering | |
[ T1] pcieport 0000:00:01.2: enabling bus mastering | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.2: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.3: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.3: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.3: enabling bus mastering | |
[ T1] pcieport 0000:00:01.3: enabling bus mastering | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.3: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.4: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.4: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.4: enabling bus mastering | |
[ T1] pcieport 0000:00:01.4: enabling bus mastering | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.4: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.5: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.5: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.5: enabling bus mastering | |
[ T1] pcieport 0000:00:01.5: enabling bus mastering | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.5: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.6: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.6: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.6: enabling bus mastering | |
[ T1] pcieport 0000:00:01.6: enabling bus mastering | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.6: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.7: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.7: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:01.7: enabling bus mastering | |
[ T1] pcieport 0000:00:01.7: enabling bus mastering | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x0 (reading 0x15d31022) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0xc (reading 0x810000) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:01.7: saving config space at offset 0x3c (reading 0x200ff) | |
[ T1] pcieport 0000:00:08.1: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:08.1: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:08.1: can't find IRQ for PCI INT A; please try using pci=biosirq | |
[ T1] pcieport 0000:00:08.1: can't find IRQ for PCI INT A; please try using pci=biosirq | |
[ T1] pcieport 0000:00:08.1: enabling bus mastering | |
[ T1] pcieport 0000:00:08.1: enabling bus mastering | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x0 (reading 0x15db1022) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x0 (reading 0x15db1022) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0xc (reading 0x10000) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0xc (reading 0x10000) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x3c (reading 0x201ff) | |
[ T1] pcieport 0000:00:08.1: saving config space at offset 0x3c (reading 0x201ff) | |
[ T1] pcieport 0000:00:08.2: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:08.2: runtime IRQ mapping not provided by arch | |
[ T1] pcieport 0000:00:08.2: can't find IRQ for PCI INT A; please try using pci=biosirq | |
[ T1] pcieport 0000:00:08.2: can't find IRQ for PCI INT A; please try using pci=biosirq | |
[ T1] pcieport 0000:00:08.2: enabling bus mastering | |
[ T1] pcieport 0000:00:08.2: enabling bus mastering | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x0 (reading 0x15dc1022) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x0 (reading 0x15dc1022) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x4 (reading 0x100404) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x8 (reading 0x6040000) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0xc (reading 0x10000) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0xc (reading 0x10000) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x10 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x14 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x18 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x1c (reading 0x101) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x20 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x24 (reading 0x10001) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x28 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x2c (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x30 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x34 (reading 0x50) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x38 (reading 0x0) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x3c (reading 0x201ff) | |
[ T1] pcieport 0000:00:08.2: saving config space at offset 0x3c (reading 0x201ff) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81944261 | |
[ T1] do one initcall 0xffffffff81944261 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81944316 | |
[ T1] do one initcall 0xffffffff81944316 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81945cf6 | |
[ T1] do one initcall 0xffffffff81945cf6 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81946d83 | |
[ T1] do one initcall 0xffffffff81946d83 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947827 | |
[ T1] do one initcall 0xffffffff81947827 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947835 | |
[ T1] do one initcall 0xffffffff81947835 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947990 | |
[ T1] do one initcall 0xffffffff81947990 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819479aa | |
[ T1] do one initcall 0xffffffff819479aa | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81947ba3 | |
[ T1] do one initcall 0xffffffff81947ba3 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819486ae | |
[ T1] do one initcall 0xffffffff819486ae | |
[ T1] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled | |
[ T1] Serial: 8250/16550 driver, 1 ports, IRQ sharing disabled | |
[ T1] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A | |
[ T1] serial8250: ttyS0 at I/O 0x3f8 (irq = 4, base_baud = 115200) is a 16550A | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81948a42 | |
[ T1] do one initcall 0xffffffff81948a42 | |
[ T1] KGDB: Registered I/O driver kgdboc | |
[ T1] KGDB: Registered I/O driver kgdboc | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81948e31 | |
[ T1] do one initcall 0xffffffff81948e31 | |
[ T1] Non-volatile memory driver v1.3 | |
[ T1] Non-volatile memory driver v1.3 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8118a911 | |
[ T1] do one initcall 0xffffffff8118a911 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819492f5 | |
[ T1] do one initcall 0xffffffff819492f5 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81949775 | |
[ T1] do one initcall 0xffffffff81949775 | |
[ T1] i8042: PNP: No PS/2 controller found. | |
[ T1] i8042: PNP: No PS/2 controller found. | |
[ T1] i8042: Probing ports directly. | |
[ T1] i8042: Probing ports directly. | |
[ T1] i8042: No controller found | |
[ T1] i8042: No controller found | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a163 | |
[ T1] do one initcall 0xffffffff8194a163 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a27e | |
[ T1] do one initcall 0xffffffff8194a27e | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a293 | |
[ T1] do one initcall 0xffffffff8194a293 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a49b | |
[ T1] do one initcall 0xffffffff8194a49b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a4d3 | |
[ T1] do one initcall 0xffffffff8194a4d3 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194a4e8 | |
[ T1] do one initcall 0xffffffff8194a4e8 | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] do initcall level 7 | |
[ T1] do initcall level 7 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81934b0c | |
[ T1] do one initcall 0xffffffff81934b0c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81934ef3 | |
[ T1] do one initcall 0xffffffff81934ef3 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81936d12 | |
[ T1] do one initcall 0xffffffff81936d12 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81937874 | |
[ T1] do one initcall 0xffffffff81937874 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81938213 | |
[ T1] do one initcall 0xffffffff81938213 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193b02b | |
[ T1] do one initcall 0xffffffff8193b02b | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81029dec | |
[ T1] do one initcall 0xffffffff81029dec | |
[ T1] random: get_random_bytes called from init_oops_id+0x1d/0x2c with crng_init=0 | |
[ T1] random: get_random_bytes called from init_oops_id+0x1d/0x2c with crng_init=0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c8c0 | |
[ T1] do one initcall 0xffffffff8193c8c0 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193c9ed | |
[ T1] do one initcall 0xffffffff8193c9ed | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ca1a | |
[ T1] do one initcall 0xffffffff8193ca1a | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193cd3c | |
[ T1] do one initcall 0xffffffff8193cd3c | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193f9e7 | |
[ T1] do one initcall 0xffffffff8193f9e7 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81942bd1 | |
[ T1] do one initcall 0xffffffff81942bd1 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943b08 | |
[ T1] do one initcall 0xffffffff81943b08 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81943bf1 | |
[ T1] do one initcall 0xffffffff81943bf1 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff819440ad | |
[ T1] do one initcall 0xffffffff819440ad | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81183b06 | |
[ T1] do one initcall 0xffffffff81183b06 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff81187032 | |
[ T1] do one initcall 0xffffffff81187032 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193ec99 | |
[ T1] do one initcall 0xffffffff8193ec99 | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8193eda1 | |
[ T1] do one initcall 0xffffffff8193eda1 | |
[ T1] Unstable clock detected, switching default tracing clock to "global" | |
[ T1] If you want to keep using the local clock, then add: | |
[ T1] "trace_clock=local" | |
[ T1] on the kernel command line | |
[ T1] Unstable clock detected, switching default tracing clock to "global" | |
[ T1] If you want to keep using the local clock, then add: | |
[ T1] "trace_clock=local" | |
[ T1] on the kernel command line | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do initcall (____ptrval____) ((____ptrval____)) | |
[ T1] do one initcall 0xffffffff8194772a | |
[ T1] do one initcall 0xffffffff8194772a | |
[ T1] Done do initcall level | |
[ T1] Done do initcall level | |
[ T1] done do_initcalls | |
[ T1] done do_initcalls | |
[ T1] Freeing unused kernel image (initmem) memory: 1588K | |
[ T1] Freeing unused kernel image (initmem) memory: 1588K | |
[ T1] Write protecting the kernel read-only data: 8192k | |
[ T1] Write protecting the kernel read-only data: 8192k | |
[ T1] Freeing unused kernel image (text/rodata gap) memory: 2044K | |
[ T1] Freeing unused kernel image (text/rodata gap) memory: 2044K | |
[ T1] Freeing unused kernel image (rodata/data gap) memory: 1184K | |
[ T1] Freeing unused kernel image (rodata/data gap) memory: 1184K | |
[ T1] Run /init as init process | |
[ T1] Run /init as init process | |
[ T1] with arguments: | |
[ T1] with arguments: | |
[ T1] /init | |
[ T1] /init | |
[ T1] noefi | |
[ T1] noefi | |
[ T1] with environment: | |
[ T1] with environment: | |
[ T1] HOME=/ | |
[ T1] HOME=/ | |
[ T1] TERM=linux | |
[ T1] TERM=linux | |
[ T1] kgdboc=ttyS0,115200 | |
[ T1] kgdboc=ttyS0,115200 | |
% cat /proc/interrut | |
2020/10/08 20:04:08 cat: open /proc/interrut: no such file or directory | |
wait: exit status 1 | |
% cat /proc/interrupts | |
CPU0 | |
4: 0 PCI-MSI 26624-edge ttyS0 | |
NMI: 0 Non-maskable interrupts | |
LOC: 19040 Local timer interrupts | |
SPU: 0 Spurious interrupts | |
PMI: 0 Performance monitoring interrupts | |
IWI: 0 IRQ work interrupts | |
RTR: 0 APIC ICR read retries | |
ERR: 0 | |
MIS: 0 | |
PIN: 0 Posted-interrupt notification event | |
NPI: 0 Nested posted-interrupt event | |
PIW: 0 Posted-interrupt wakeup event | |
% cd /proc | |
% cat interrupts | |
CPU0 | |
4: 0 PCI-MSI 26624-edge ttyS0 | |
NMI: 0 Non-maskable interrupts | |
LOC: 20706 Local timer interrupts | |
SPU: 0 Spurious interrupts | |
PMI: 0 Performance monitoring interrupts | |
IWI: 0 IRQ work interrupts | |
RTR: 0 APIC ICR read retries | |
ERR: 0 | |
MIS: 0 | |
PIN: 0 Posted-interrupt notification event | |
NPI: 0 Nested posted-interrupt event | |
PIW: 0 Posted-interrupt wakeup event | |
% % |
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00:00.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15d0] | |
Subsystem: ASRock Incorporation Device [1849:15d0] | |
Flags: fast devsel | |
00: 22 10 d0 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 d0 15 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:00.2 IOMMU [0806]: Advanced Micro Devices, Inc. [AMD] Device [1022:15d1] | |
Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:15d1] | |
Flags: bus master, fast devsel, latency 0, IRQ 25 | |
Capabilities: [40] Secure device <?> | |
Capabilities: [64] MSI: Enable+ Count=1/4 Maskable- 64bit+ | |
Capabilities: [74] HyperTransport: MSI Mapping Enable+ Fixed+ | |
00: 22 10 d1 15 04 04 10 00 00 00 06 08 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 22 10 d1 15 | |
30: 00 00 00 00 40 00 00 00 00 00 00 00 ff 01 00 00 | |
00:01.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe Dummy Host Bridge [1022:1452] | |
Flags: fast devsel | |
00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:01.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:15d3] (prog-if 00 [Normal decode]) | |
Flags: bus master, fast devsel, latency 0, IRQ 26 | |
Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 | |
I/O behind bridge: 00001000-00001fff [size=4K] | |
Memory behind bridge: f0200000-f03fffff [size=2M] | |
Prefetchable memory behind bridge: 00000000f0400000-00000000f05fffff [size=2M] | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [58] Express Root Port (Slot+), MSI 00 | |
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ | |
Capabilities: [c0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1453] | |
Capabilities: [c8] HyperTransport: MSI Mapping Enable+ Fixed+ | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [150] Advanced Error Reporting | |
Capabilities: [270] #19 | |
Capabilities: [2a0] Access Control Services | |
Capabilities: [370] L1 PM Substates | |
Kernel driver in use: pcieport | |
Kernel modules: shpchp | |
00: 22 10 d3 15 07 04 10 00 00 00 04 06 10 00 81 00 | |
10: 00 00 00 00 00 00 00 00 00 01 01 00 11 11 00 00 | |
20: 20 f0 30 f0 41 f0 51 f0 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 10 00 | |
00:01.7 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:15d3] (prog-if 00 [Normal decode]) | |
Flags: bus master, fast devsel, latency 0, IRQ 27 | |
Bus: primary=00, secondary=02, subordinate=02, sec-latency=0 | |
I/O behind bridge: 0000f000-0000ffff [size=4K] | |
Memory behind bridge: fcf00000-fcffffff [size=1M] | |
Prefetchable memory behind bridge: None | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [58] Express Root Port (Slot+), MSI 00 | |
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ | |
Capabilities: [c0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:1453] | |
Capabilities: [c8] HyperTransport: MSI Mapping Enable+ Fixed+ | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [150] Advanced Error Reporting | |
Capabilities: [270] #19 | |
Capabilities: [2a0] Access Control Services | |
Capabilities: [370] L1 PM Substates | |
Kernel driver in use: pcieport | |
Kernel modules: shpchp | |
00: 22 10 d3 15 07 04 10 00 00 00 04 06 10 00 81 00 | |
10: 00 00 00 00 00 00 00 00 00 02 02 00 f1 f1 00 20 | |
20: f0 fc f0 fc f1 ff 01 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 00 10 00 | |
00:08.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Family 17h (Models 00h-0fh) PCIe Dummy Host Bridge [1022:1452] | |
Flags: fast devsel | |
00: 22 10 52 14 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:08.1 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:15db] (prog-if 00 [Normal decode]) | |
Flags: bus master, fast devsel, latency 0, IRQ 28 | |
Bus: primary=00, secondary=03, subordinate=03, sec-latency=0 | |
I/O behind bridge: 0000e000-0000efff [size=4K] | |
Memory behind bridge: fca00000-fcdfffff [size=4M] | |
Prefetchable memory behind bridge: 00000000e0000000-00000000f01fffff [size=258M] | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [58] Express Root Port (Slot-), MSI 00 | |
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ | |
Capabilities: [c0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:0000] | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [270] #19 | |
Capabilities: [2a0] Access Control Services | |
Kernel driver in use: pcieport | |
Kernel modules: shpchp | |
00: 22 10 db 15 07 04 10 00 00 00 04 06 10 00 81 00 | |
10: 00 00 00 00 00 00 00 00 00 03 03 00 e1 e1 00 00 | |
20: a0 fc d0 fc 01 e0 11 f0 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 18 00 | |
00:08.2 PCI bridge [0604]: Advanced Micro Devices, Inc. [AMD] Device [1022:15dc] (prog-if 00 [Normal decode]) | |
Flags: bus master, fast devsel, latency 0, IRQ 29 | |
Bus: primary=00, secondary=04, subordinate=04, sec-latency=0 | |
I/O behind bridge: None | |
Memory behind bridge: fce00000-fcefffff [size=1M] | |
Prefetchable memory behind bridge: None | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [58] Express Root Port (Slot-), MSI 00 | |
Capabilities: [a0] MSI: Enable+ Count=1/1 Maskable- 64bit+ | |
Capabilities: [c0] Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:0000] | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [270] #19 | |
Kernel driver in use: pcieport | |
Kernel modules: shpchp | |
00: 22 10 dc 15 07 04 10 00 00 00 04 06 10 00 81 00 | |
10: 00 00 00 00 00 00 00 00 00 04 04 00 f1 01 00 00 | |
20: e0 fc e0 fc f1 ff 01 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 50 00 00 00 00 00 00 00 ff 01 10 00 | |
00:14.0 SMBus [0c05]: Advanced Micro Devices, Inc. [AMD] FCH SMBus Controller [1022:790b] (rev 61) | |
Subsystem: ASRock Incorporation FCH SMBus Controller [1849:790b] | |
Flags: 66MHz, medium devsel | |
Kernel driver in use: piix4_smbus | |
Kernel modules: i2c_piix4, sp5100_tco | |
00: 22 10 0b 79 03 04 20 02 61 00 05 0c 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 0b 79 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:14.3 ISA bridge [0601]: Advanced Micro Devices, Inc. [AMD] FCH LPC Bridge [1022:790e] (rev 51) | |
Subsystem: ASRock Incorporation FCH LPC Bridge [1849:790e] | |
Flags: bus master, 66MHz, medium devsel, latency 0 | |
00: 22 10 0e 79 0f 00 20 02 51 00 01 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 0e 79 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.0 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15e8] | |
Flags: fast devsel | |
00: 22 10 e8 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.1 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15e9] | |
Flags: fast devsel | |
00: 22 10 e9 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.2 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15ea] | |
Flags: fast devsel | |
00: 22 10 ea 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.3 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15eb] | |
Flags: fast devsel | |
00: 22 10 eb 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.4 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15ec] | |
Flags: fast devsel | |
00: 22 10 ec 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.5 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15ed] | |
Flags: fast devsel | |
00: 22 10 ed 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.6 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15ee] | |
Flags: fast devsel | |
00: 22 10 ee 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
00:18.7 Host bridge [0600]: Advanced Micro Devices, Inc. [AMD] Device [1022:15ef] | |
Flags: fast devsel | |
00: 22 10 ef 15 00 00 00 00 00 00 00 06 00 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
30: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
02:00.0 Ethernet controller [0200]: Realtek Semiconductor Co., Ltd. RTL8111/8168/8411 PCI Express Gigabit Ethernet Controller [10ec:8168] (rev 15) | |
Subsystem: ASRock Incorporation Motherboard (one of many) [1849:8168] | |
Flags: bus master, fast devsel, latency 0, IRQ 51 | |
I/O ports at f000 [size=256] | |
Memory at fcf04000 (64-bit, non-prefetchable) [size=4K] | |
Memory at fcf00000 (64-bit, non-prefetchable) [size=16K] | |
Capabilities: [40] Power Management version 3 | |
Capabilities: [50] MSI: Enable+ Count=1/1 Maskable- 64bit+ | |
Capabilities: [70] Express Endpoint, MSI 01 | |
Capabilities: [b0] MSI-X: Enable- Count=4 Masked- | |
Capabilities: [100] Advanced Error Reporting | |
Capabilities: [140] Virtual Channel | |
Capabilities: [160] Device Serial Number dc-9a-1e-59-a1-a8-00-00 | |
Capabilities: [170] Latency Tolerance Reporting | |
Capabilities: [178] L1 PM Substates | |
Kernel driver in use: r8169 | |
Kernel modules: r8169 | |
00: ec 10 68 81 07 04 10 00 15 00 00 02 10 00 00 00 | |
10: 01 f0 00 00 00 00 00 00 04 40 f0 fc 00 00 00 00 | |
20: 04 00 f0 fc 00 00 00 00 00 00 00 00 49 18 68 81 | |
30: 00 00 00 00 40 00 00 00 00 00 00 00 0b 01 00 00 | |
03:00.0 VGA compatible controller [0300]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15d8] (rev c8) (prog-if 00 [VGA controller]) | |
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15d8] | |
Flags: bus master, fast devsel, latency 0, IRQ 10 | |
Memory at e0000000 (64-bit, prefetchable) [size=256M] | |
Memory at f0000000 (64-bit, prefetchable) [size=2M] | |
I/O ports at e000 [size=256] | |
Memory at fcd00000 (32-bit, non-prefetchable) [size=512K] | |
[virtual] Expansion ROM at 000c0000 [disabled] [size=128K] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Legacy Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/4 Maskable- 64bit+ | |
Capabilities: [c0] MSI-X: Enable- Count=3 Masked- | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [200] #15 | |
Capabilities: [270] #19 | |
Capabilities: [2a0] Access Control Services | |
Capabilities: [2b0] Address Translation Service (ATS) | |
Capabilities: [2c0] Page Request Interface (PRI) | |
Capabilities: [2d0] Process Address Space ID (PASID) | |
Capabilities: [320] Latency Tolerance Reporting | |
00: 02 10 d8 15 07 00 10 08 c8 00 00 03 10 00 80 00 | |
10: 0c 00 00 e0 00 00 00 00 0c 00 00 f0 00 00 00 00 | |
20: 01 e0 00 00 00 00 d0 fc 00 00 00 00 02 10 d8 15 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0a 01 00 00 | |
03:00.1 Audio device [0403]: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15de] | |
Subsystem: Advanced Micro Devices, Inc. [AMD/ATI] Device [1002:15de] | |
Flags: bus master, fast devsel, latency 0, IRQ 5 | |
Memory at fcd88000 (32-bit, non-prefetchable) [size=16K] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Legacy Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
00: 02 10 de 15 07 00 10 00 00 00 03 04 10 00 80 00 | |
10: 00 80 d8 fc 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 02 10 de 15 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 05 02 00 00 | |
03:00.2 Encryption controller [1080]: Advanced Micro Devices, Inc. [AMD] Device [1022:15df] | |
Subsystem: Advanced Micro Devices, Inc. [AMD] Device [1022:15df] | |
Flags: bus master, fast devsel, latency 0, IRQ 11 | |
Memory at fcc00000 (32-bit, non-prefetchable) [size=1M] | |
Memory at fcd8c000 (32-bit, non-prefetchable) [size=8K] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/2 Maskable- 64bit+ | |
Capabilities: [c0] MSI-X: Enable- Count=2 Masked- | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
00: 22 10 df 15 07 00 10 00 00 00 80 10 10 00 80 00 | |
10: 00 00 00 00 00 00 00 00 00 00 c0 fc 00 00 00 00 | |
20: 00 00 00 00 00 c0 d8 fc 00 00 00 00 22 10 df 15 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 03 00 00 | |
03:00.3 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15e0] (prog-if 30 [XHCI]) | |
Subsystem: ASRock Incorporation Device [1849:7914] | |
Flags: bus master, fast devsel, latency 0, IRQ 32 | |
Memory at fcb00000 (64-bit, non-prefetchable) [size=1M] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/8 Maskable- 64bit+ | |
Capabilities: [c0] MSI-X: Enable+ Count=8 Masked- | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Kernel driver in use: xhci_hcd | |
00: 22 10 e0 15 07 04 10 00 00 30 03 0c 10 00 80 00 | |
10: 04 00 b0 fc 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 79 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0a 04 00 00 | |
03:00.4 USB controller [0c03]: Advanced Micro Devices, Inc. [AMD] Device [1022:15e1] (prog-if 30 [XHCI]) | |
Subsystem: ASRock Incorporation Device [1849:7914] | |
Flags: bus master, fast devsel, latency 0, IRQ 41 | |
Memory at fca00000 (64-bit, non-prefetchable) [size=1M] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/8 Maskable- 64bit+ | |
Capabilities: [c0] MSI-X: Enable+ Count=8 Masked- | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Kernel driver in use: xhci_hcd | |
00: 22 10 e1 15 07 04 10 00 00 30 03 0c 10 00 80 00 | |
10: 04 00 a0 fc 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 14 79 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0a 01 00 00 | |
03:00.6 Audio device [0403]: Advanced Micro Devices, Inc. [AMD] Device [1022:15e3] | |
Subsystem: ASRock Incorporation Device [1849:2233] | |
Flags: bus master, fast devsel, latency 0, IRQ 11 | |
Memory at fcd80000 (32-bit, non-prefetchable) [size=32K] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable- Count=1/1 Maskable- 64bit+ | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
00: 22 10 e3 15 07 00 10 00 00 00 03 04 10 00 80 00 | |
10: 00 00 d8 fc 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 00 00 00 00 00 00 49 18 33 22 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 03 00 00 | |
04:00.0 SATA controller [0106]: Advanced Micro Devices, Inc. [AMD] FCH SATA Controller [AHCI mode] [1022:7901] (rev 61) (prog-if 01 [AHCI 1.0]) | |
Subsystem: ASRock Incorporation FCH SATA Controller [AHCI mode] [1849:7901] | |
Flags: bus master, fast devsel, latency 0, IRQ 31 | |
Memory at fce00000 (32-bit, non-prefetchable) [size=2K] | |
Capabilities: [48] Vendor Specific Information: Len=08 <?> | |
Capabilities: [50] Power Management version 3 | |
Capabilities: [64] Express Endpoint, MSI 00 | |
Capabilities: [a0] MSI: Enable+ Count=1/2 Maskable- 64bit+ | |
Capabilities: [d0] SATA HBA v1.0 | |
Capabilities: [100] Vendor Specific Information: ID=0001 Rev=1 Len=010 <?> | |
Capabilities: [270] #19 | |
Kernel driver in use: ahci | |
00: 22 10 01 79 07 04 10 00 61 01 06 01 10 00 00 00 | |
10: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 | |
20: 00 00 00 00 00 00 e0 fc 00 00 00 00 49 18 01 79 | |
30: 00 00 00 00 48 00 00 00 00 00 00 00 0b 01 00 00 | |
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