regs-int.h

/***************************************************************************
 *             __________               __   ___.
 *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
 *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
 *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
 *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
 *                     \/            \/     \/    \/            \/
 * This file was automatically generated by headergen, DO NOT EDIT it.
 * headergen version: 3.0.0
 * vsoc version: 0.5
 * vsoc authors: Amaury Pouly
 *
 * Copyright (C) 2015 by the authors
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 *
 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
 * KIND, either express or implied.
 *
 ****************************************************************************/
#ifndef __HEADERGEN_REGS_INT_H__
#define __HEADERGEN_REGS_INT_H__

#define HW_ICOLL_STATUS_ADDR            (0x80000000 + 0x4)
#define HW_ICOLL_STATUS                 (*(volatile uint8_t *)(0x80000000 + 0x4))
#define BP_ICOLL_STATUS_VDDIO_BO        0
#define BM_ICOLL_STATUS_VDDIO_BO        0x1
#define BF_ICOLL_STATUS_VDDIO_BO(_v)    (((_v) << 0) & 0x1)
#define BF_ICOLL_STATUS_VDDIO_BO_V(_v)  ((BV_ICOLL_STATUS_VDDIO_BO__##_v << 0) & 0x1)
#define BP_ICOLL_STATUS_VDDD_BO         2
#define BM_ICOLL_STATUS_VDDD_BO         0x4
#define BF_ICOLL_STATUS_VDDD_BO(_v)     (((_v) << 2) & 0x4)
#define BF_ICOLL_STATUS_VDDD_BO_V(_v)   ((BV_ICOLL_STATUS_VDDD_BO__##_v << 2) & 0x4)
#define BP_ICOLL_STATUS_VDDA_BO         1
#define BM_ICOLL_STATUS_VDDA_BO         0x2
#define BF_ICOLL_STATUS_VDDA_BO(_v)     (((_v) << 1) & 0x2)
#define BF_ICOLL_STATUS_VDDA_BO_V(_v)   ((BV_ICOLL_STATUS_VDDA_BO__##_v << 1) & 0x2)

#define HW_ICOLL_ENABLE_ADDR                (0x80000000 + 0x8)
#define HW_ICOLL_ENABLE                     (*(volatile uint16_t *)(0x80000000 + 0x8))
#define BP_ICOLL_ENABLE_VDDIO_BO            0
#define BM_ICOLL_ENABLE_VDDIO_BO            0x3
#define BV_ICOLL_ENABLE_VDDIO_BO__DISABLED  0x0
#define BV_ICOLL_ENABLE_VDDIO_BO__ENABLED   0x1
#define BV_ICOLL_ENABLE_VDDIO_BO__NMI       0x2
#define BF_ICOLL_ENABLE_VDDIO_BO(_v)        (((_v) << 0) & 0x3)
#define BF_ICOLL_ENABLE_VDDIO_BO_V(_v)      ((BV_ICOLL_ENABLE_VDDIO_BO__##_v << 0) & 0x3)

#endif /* __HEADERGEN_REGS_INT_H__*/