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December 1, 2021 13:25
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Syscalls for AARCH64 & Syscalls for RISCV
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| /* Syscalls for AARCH64 : | |
| * - registers are 64-bit | |
| * - stack is 16-byte aligned | |
| * - syscall number is passed in x8 | |
| * - arguments are in x0, x1, x2, x3, x4, x5 | |
| * - the system call is performed by calling svc 0 | |
| * - syscall return comes in x0. | |
| * - the arguments are cast to long and assigned into the target registers | |
| * which are then simply passed as registers to the asm code, so that we | |
| * don't have to experience issues with register constraints. | |
| * | |
| * On aarch64, select() is not implemented so we have to use pselect6(). | |
| */ | |
| #define my_syscall3(num, arg1, arg2, arg3) \ | |
| ({ \ | |
| register long _num asm("x8") = (num); \ | |
| register long _arg1 asm("x0") = (long)(arg1); \ | |
| register long _arg2 asm("x1") = (long)(arg2); \ | |
| register long _arg3 asm("x2") = (long)(arg3); \ | |
| \ | |
| asm volatile ( \ | |
| "svc #0\n" \ | |
| : "=r"(_arg1) \ | |
| : "r"(_arg1), "r"(_arg2), "r"(_arg3), \ | |
| "r"(_num) \ | |
| : "memory", "cc" \ | |
| ); \ | |
| _arg1; \ | |
| }) | |
| #define my_syscall4(num, arg1, arg2, arg3, arg4) \ | |
| ({ \ | |
| register long _num asm("x8") = (num); \ | |
| register long _arg1 asm("x0") = (long)(arg1); \ | |
| register long _arg2 asm("x1") = (long)(arg2); \ | |
| register long _arg3 asm("x2") = (long)(arg3); \ | |
| register long _arg4 asm("x3") = (long)(arg4); \ | |
| \ | |
| asm volatile ( \ | |
| "svc #0\n" \ | |
| : "=r"(_arg1) \ | |
| : "r"(_arg1), "r"(_arg2), "r"(_arg3), "r"(_arg4), \ | |
| "r"(_num) \ | |
| : "memory", "cc" \ | |
| ); \ | |
| _arg1; \ | |
| }) | |
| /************************************************************************/ | |
| /* Syscalls for RISCV : | |
| * - stack is 16-byte aligned | |
| * - syscall number is passed in a7 | |
| * - arguments are in a0, a1, a2, a3, a4, a5 | |
| * - the system call is performed by calling ecall | |
| * - syscall return comes in a0 | |
| * - the arguments are cast to long and assigned into the target | |
| * registers which are then simply passed as registers to the asm code, | |
| * so that we don't have to experience issues with register constraints. | |
| */ | |
| /* https://elixir.bootlin.com/linux/latest/source/tools/include/nolibc/nolibc.h#L1288 */ | |
| #if __riscv_xlen == 64 | |
| #define PTRLOG "3" | |
| #define SZREG "8" | |
| #elif __riscv_xlen == 32 | |
| #define PTRLOG "2" | |
| #define SZREG "4" | |
| #endif | |
| #define my_syscall3(num, arg1, arg2, arg3) \ | |
| ({ \ | |
| register long _num asm("a7") = (num); \ | |
| register long _arg1 asm("a0") = (long)(arg1); \ | |
| register long _arg2 asm("a1") = (long)(arg2); \ | |
| register long _arg3 asm("a2") = (long)(arg3); \ | |
| \ | |
| asm volatile ( \ | |
| "ecall\n\t" \ | |
| : "+r"(_arg1) \ | |
| : "r"(_arg2), "r"(_arg3), \ | |
| "r"(_num) \ | |
| : "memory", "cc" \ | |
| ); \ | |
| _arg1; \ | |
| }) | |
| #define my_syscall4(num, arg1, arg2, arg3, arg4) \ | |
| ({ \ | |
| register long _num asm("a7") = (num); \ | |
| register long _arg1 asm("a0") = (long)(arg1); \ | |
| register long _arg2 asm("a1") = (long)(arg2); \ | |
| register long _arg3 asm("a2") = (long)(arg3); \ | |
| register long _arg4 asm("a3") = (long)(arg4); \ | |
| \ | |
| asm volatile ( \ | |
| "ecall\n" \ | |
| : "+r"(_arg1) \ | |
| : "r"(_arg2), "r"(_arg3), "r"(_arg4), \ | |
| "r"(_num) \ | |
| : "memory", "cc" \ | |
| ); \ | |
| _arg1; \ | |
| }) |
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