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hal.executable public @turbine_llm_mmtfp_3d_8640_3200_f32f16_dispatch_0 {
  hal.executable.variant public @embedded_elf_x86_64 target(<"llvm-cpu", "embedded-elf-x86_64", {cpu = "znver4", cpu_features = "+prfchw,-cldemote,+avx,+aes,+sahf,+pclmul,-xop,+crc32,+xsaves,-avx512fp16,-usermsr,-sm4,-egpr,+sse4.1,+avx512ifma,+xsave,-avx512pf,+sse4.2,-tsxldtrk,-ptwrite,-widekl,-sm3,+invpcid,+64bit,+xsavec,-avx10.1-512,+avx512vpopcntdq,+cmov,-avx512vp2intersect,+avx512cd,+movbe,-avxvnniint8,-avx512er,-ccmp,-amx-int8,-kl,-avx10.1-256,-sha512,-avxvnni,-rtm,+adx,+avx2,-hreset,-movdiri,-serialize,+vpclmulqdq,+avx512vl,-uintr,-cf,+clflushopt,-raoint,-cmpccxadd,+bmi,-amx-tile,+sse,+gfni,-avxvnniint16,-amx-fp16,-ndd,+xsaveopt,+rdrnd,+avx512f,-amx-bf16,+avx512bf16,+avx512vnni,-push2pop2,+cx8,+avx512bw,+sse3,+pku,+fsgsbase,+clzero,+mwaitx,-lwp,+lzcnt,+sha,-movdir64b,-ppx,+wbnoinvd,-enqcmd,-prefetchwt1,-avxneconvert,-tbm,-pconfig,-amx-complex,+ssse3,+cx16,+bmi2,+fma,+popcnt,-avxifma,+f16c,+avx512bitalg,+rdpru,+clwb,+mmx,+sse2,+rds

pashu123

-- Read the docs: https://www.lunarvim.org/docs/configuration
-- Video Tutorials: https://www.youtube.com/watch?v=sFA9kX-Ud_c&list=PLhoH5vyxr6QqGu0i7tt_XoVK9v-KvZ3m6
-- Forum: https://www.reddit.com/r/lunarvim/
-- Discord: https://discord.com/invite/Xb9B4Ny
--

lvim.colorscheme = "lunar"

lvim.format_on_save.enabled = false

pashu123

import sys
import torch
import torch_mlir
from shark.shark_importer import import_with_fx
import torchvision.models as models
import copy
import io
import numpy as np
from transformers import (
    AutoModelForCausalLM,

pashu123

import sys

import torch

import torch_mlir
from shark.shark_importer import import_with_fx
import torchvision.models as models
import copy
import io
import numpy as np

pashu123

import torch
import torch_mlir


class ANET(torch.nn.Module):
    def __init__(self):
        super().__init__()
        self.alexnet = torch.hub.load('pytorch/vision:v0.10.0', 'alexnet', pretrained=True)
        self.alexnet.eval()

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# Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
# See https://llvm.org/LICENSE.txt for license information.
# SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
# Also available under a BSD-style license. See LICENSE.

import sys

from PIL import Image
import requests

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from iree import runtime as ireert
from iree.compiler import compile_str

import numpy as np
import os

with open(os.path.join("vicuna_fp32_cpu.vmfb"), "rb") as mlir_file:
    flatbuffer_blob = mlir_file.read()

pashu123

from iree import runtime as ireert
from iree.compiler import compile_str

import numpy as np
import os

with open(os.path.join("vicuna_fp32_cpu.vmfb"), "rb") as mlir_file:
    flatbuffer_blob = mlir_file.read()

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/home/prashantkumar/SHARK/shark.venv/lib/python3.10/site-packages/torch/_ops.py:646:0: error: failed to legalize operation 'arith.constant'
/home/prashantkumar/SHARK/shark.venv/lib/python3.10/site-packages/torch/_ops.py:646:0: note: see current operation: %826 = "arith.constant"() <{value = dense<0.000000e+00> : vector<8xf16>}> : () -> vector<8xf16>
/home/prashantkumar/SHARK/shark.venv/lib/python3.10/site-packages/torch/_ops.py:646:0: error: failed to run translation of source executable to target executable for backend #hal.executable.target<"vulkan", "vulkan-spirv-fb", {spirv.target_env = #spirv.target_env<#spirv.vce<v1.6, [Shader, Float64, Float16, Int64, Int16, Int8, StorageBuffer16BitAccess, StorageUniform16, StoragePushConstant16, StorageBuffer8BitAccess, UniformAndStorageBuffer8BitAccess, StoragePushConstant8, GroupNonUniform, GroupNonUniformVote, GroupNonUniformArithmetic, GroupNonUniformBallot, GroupNonUniformShuffle, GroupNonUniformShuffleRelative, GroupNonUniformClustered, GroupNonUniformQuad, Vari

pashu123

import torch
import torch_mlir
from shark.shark_importer import import_with_fx
import os
import sys
from transformers import (
    AutoModelForCausalLM,
    AutoTokenizer,
    StoppingCriteria,
    StoppingCriteriaList,