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The only way out is through.

PTPT52 ptpt52

The only way out is through.
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[11932.255797] ------------[ cut here ]------------
[11932.256195] WARNING: CPU: 0 PID: 0 at target-arm_cortex-a7+neon-vfpv4_musl_eabi/linux-ipq40xx_generic/ath10k-ct-regular/ath10k-ct-2020-03-25-3d173a47/ath10k-5.4/txrx.c:134 ath10k_txrx_tx_unref+0x530/0x700 [ath10k_core]
[11932.259815] Invalid VHT rate, nss: 3 hw_rate: 15 ratecode: 255
[11932.279037] Modules linked in: qcserial pppoe ppp_async option l2tp_ppp cdc_mbim ath10k_pci ath10k_core ath usb_wwan sierra_net sierra rndis_host qmi_wwan pptp pppox ppp_mppe ppp_generic nf_nat_pptp nf_conntrack_pptp mac80211 iptable_nat ipt_REJECT ipt_MASQUERADE huawei_cdc_ncm cfg80211 cdc_ncm cdc_ether xt_time xt_tcpudp xt_tcpmss xt_statistic xt_state xt_socket xt_recent xt_quota xt_pkttype xt_physdev xt_owner xt_nat xt_multiport xt_mark xt_mac xt_limit xt_length xt_iprange xt_ipp2p xt_iface xt_hl xt_helper xt_hashlimit xt_esp xt_ecn xt_dscp xt_conntrack xt_connmark xt_connlimit xt_connbytes xt_comment xt_addrtype xt_TPROXY xt_TCPMSS xt_REDIRECT xt_NETMAP xt_LOG xt_IPMA
===================================================================
MT7621 stage1 code 10:33:11 (ASIC)
CPU=50000000 HZ BUS=16666666 HZ
==================================================================
Change MPLL source from XTAL to CR...
do MEMPLL setting..
MEMPLL Config : 0x11100000
3PLL mode + External loopback
=== XTAL-40Mhz === DDR-1200Mhz ===
PLL4 FB_DL: 0x8, 1/0 = 640/384 21000000
Linux version 2.6.31 (root@ubuntu) (gcc version 4.3.3 (GCC) ) #2 Mon Sep 22 10:02:42 CST 2014
flash_size passed from bootloader = 16
arg 1: console=ttyS0,115200
arg 2: root=31:02
arg 3: rootfstype=jffs2
arg 4: init=/sbin/init
arg 5: mtdparts=ath-nor0:64k(u-boot),64k(u-boot-env),14080k(rootfs),2048k(uImage),64k(mib0),64k(ART)
arg 6: mem=64M
CPU revision is: 0001974c (MIPS 74Kc)
ath_sys_frequency: cpu srif ddr srif cpu 535 ddr 400 ahb 200
Please choose the operation:
1: Load system code to SDRAM via TFTP.
2: Load system code then write to Flash via TFTP.
3: Boot system code via Flash (default).
4: Entr boot command line interface.
7: Load Boot Loader code then write to Flash via Serial.
9: Load Boot Loader code then write to Flash via TFTP.
r: Start TFTP recovery.
default: 3
0
===================================================================
MT7621 stage1 code done
CPU=50000000 HZ BUS=16666666 HZ
===================================================================
U-Boot 1.1.3 (UBNT Build Version: e51_001_1e49c) (Jul 27 2018 - 04:44:57)
Board: Ralink APSoC DRAM: 256 MB
relocate_code Pointer at: 8ffac000
Starting kernel ...
[ 0.000000] Linux version 5.4.24 (LGA1150@Haswell) (gcc version 9.2.0 (OpenWrt GCC 9.2.0 r12425-d83150e3fb)) #0 SMP Mon Mar 9 17:20:43 2020
[ 0.000000] SoC Type: MediaTek MT7621 ver:1 eco:3
[ 0.000000] printk: bootconsole [early0] enabled
[ 0.000000] CPU0 revision is: 0001992f (MIPS 1004Kc)
[ 0.000000] MIPS: machine is UBNT-ERX-SFP
[ 0.000000] Initrd not found or empty - disabling initrd
[ 0.000000] VPE topology {2,2} total 4
[ 0.000000] Primary instruction cache 32kB, VIPT, 4-way, linesize 32 bytes.
## Booting image at 80a00000 ...
Image Name: MIPS OpenWrt Linux-5.4.24
Image Type: MIPS Linux Kernel Image (lzma compressed)
Data Size: 7676357 Bytes = 7.3 MB
Load Address: 80001000
Entry Point: 80001000
Verifying Checksum ... OK
Uncompressing Kernel Image ... OK
No initrd
## Transferring control to Linux (at address 80001000) ...
TIMEOUT_COUNT=10,Load address: 0x80a00000
Loading: checksum bad
Got ARP REPLY, set server/gtwy eth addr (00:e0:4c:68:00:7a)
Got it
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Loading: checksum bad
checksum bad
Got ARP REPLY, set server/gtwy eth addr (00:e0:4c:68:00:7a)
Got it
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