Date: 2026-08-06
Scope: src/devices/cpu/sh/ — interpreter and DRC, SH-1/SH-2/SH-3/SH-4.
Only instruction behaviour (computed results, T/Q/M/S flags, register writeback) was in
scope for this pass. Exceptions, MMU, TLB, interrupt delivery, and peripherals were
deliberately not audited except where they change an instruction's result.
References used (all from /Volumes/data/EmuDocs/SH/):
sh2.pdf— SH-1/SH-2/SH-DSP Software Manual rev 5.00