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UART ISR w/o Driverlib
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volatile uint8_t recv_buf[BUF_LEN]; | |
volatile uint8_t recv_buf_idx = 0; | |
/* ... */ | |
/* EUSCI A0 UART ISR - Echoes data back to PC host */ | |
void euscia0_isr(void) | |
{ | |
// If this interrupt is an RX interrupt | |
if (EUSCI_A_CMSIS(EUSCI_A0_MODULE)->rIE.r & EUSCI_A_UART_RECEIVE_INTERRUPT) { | |
// Clear the flag | |
EUSCI_A_CMSIS(EUSCI_A0_MODULE)->rIFG.r &= ~EUSCI_A_UART_RECEIVE_INTERRUPT; | |
// Copy the data out of the FIFO | |
recv_buf[recv_buf_idx++] = EUSCI_A_CMSIS(EUSCI_A0_MODULE)->rRXBUF.r; | |
// We are still really iffy and miss data sometimes. Maybe this | |
// branch still needs to be moved out. | |
if (recv_buf_idx==RECV_BUF_LEN) { | |
recv_buf_idx = 0; | |
} | |
} | |
} |
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if you use a power of 2 as your buffer size, you can AND with the the chosen (value -1) and your index will automatically wrap.
no branching needed.
Example:
Buffer Size = 16 (0001 0000)
AND Value = 16 - 1 = 15 (1111)
Index = 14 (1110) & 15 (1111) = 14
Index = 15 (1111) & 15 (1111) = 15
Index = 16 (1 0000) & 15 (1111) = 0