FFFFFUUUUU

clock.c

static void clk_disable_locked(struct clk *c)
{
	if (c->refcnt == 0) {
		WARN(1, "Attempting to disable clock %s with refcnt 0", c->name);
		return;
	}
	if (c->refcnt == 1) {
		if (c->ops && c->ops->disable) {
			trace_clock_disable(c->name, 0, 0);
			c->ops->disable(c);
		}
		if (c->parent)
			clk_disable(c->parent);

		c->state = OFF;
		clk_stats_update(c);
	}
	c->refcnt--;

	if (clk_is_auto_dvfs(c) && c->refcnt == 0)
		tegra_dvfs_set_rate(c, 0);
}

gistfile1.txt

Dump of assembler code for function clk_disable_locked:
   0xc0054020 <+0>:	push	{r4, lr}
   0xc0054024 <+4>:	ldr	r3, [r0, #72]	; 0x48
   0xc0054028 <+8>:	mov	r4, r0
   0xc005402c <+12>:	cmp	r3, #0
   0xc0054030 <+16>:	bne	0xc005404c <clk_disable_locked+44>
   0xc0054034 <+20>:	ldr	r3, [r0, #68]	; 0x44
   0xc0054038 <+24>:	movw	r1, #298	; 0x12a
   0xc005403c <+28>:	ldr	r0, [pc, #120]	; 0xc00540bc <clk_disable_locked+156>
   0xc0054040 <+32>:	ldr	r2, [pc, #120]	; 0xc00540c0 <clk_disable_locked+160>
   0xc0054044 <+36>:	pop	{r4, lr}
   0xc0054048 <+40>:	b	0xc007c558 <warn_slowpath_fmt>
   0xc005404c <+44>:	cmp	r3, #1
   0xc0054050 <+48>:	bne	0xc0054090 <clk_disable_locked+112>
   0xc0054054 <+52>:	ldr	r3, [r0, #40]	; 0x28
   0xc0054058 <+56>:	cmp	r3, #0
   0xc005405c <+60>:	beq	0xc0054070 <clk_disable_locked+80>
   0xc0054060 <+64>:	ldr	r3, [r3, #8]
   0xc0054064 <+68>:	cmp	r3, #0
   0xc0054068 <+72>:	beq	0xc0054070 <clk_disable_locked+80>
   0xc005406c <+76>:	blx	r3
   0xc0054070 <+80>:	ldr	r0, [r4, #80]	; 0x50
   0xc0054074 <+84>:	cmp	r0, #0
   0xc0054078 <+88>:	beq	0xc0054080 <clk_disable_locked+96>
   0xc005407c <+92>:	bl	0xc00540c4 <clk_disable>
   0xc0054080 <+96>:	mov	r3, #2
   0xc0054084 <+100>:	mov	r0, r4
   0xc0054088 <+104>:	str	r3, [r4, #76]	; 0x4c
   0xc005408c <+108>:	bl	0xc0053824 <clk_stats_update>
   0xc0054090 <+112>:	ldrb	r3, [r4, #60]	; 0x3c
   0xc0054094 <+116>:	ldr	r1, [r4, #72]	; 0x48
   0xc0054098 <+120>:	cmp	r3, #0
   0xc005409c <+124>:	sub	r1, r1, #1
   0xc00540a0 <+128>:	str	r1, [r4, #72]	; 0x48
   0xc00540a4 <+132>:	popeq	{r4, pc}
   0xc00540a8 <+136>:	cmp	r1, #0
   0xc00540ac <+140>:	popne	{r4, pc}
   0xc00540b0 <+144>:	mov	r0, r4
   0xc00540b4 <+148>:	pop	{r4, lr}
   0xc00540b8 <+152>:	b	0xc0061110 <tegra_dvfs_set_rate>
   0xc00540bc <+156>:	subsgt	r11, sp, r5, asr r7
   0xc00540c0 <+160>:	ldrshgt	r11, [sp], #-142	; 0xffffff72
End of assembler dump.