Created
February 11, 2016 23:31
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| public enum Test { | |
| A = 1, | |
| B = 2, | |
| C = 3, | |
| D = 4, | |
| E = 5, | |
| F = 6, | |
| G = 7 | |
| } | |
| public int TestWithSwitch(Test val) { | |
| switch(val) { | |
| case Test.A: | |
| return 0x00; | |
| case Test.B: | |
| return 0x01; | |
| case Test.C: | |
| return 0x02; | |
| case Test.D: | |
| return 0x03; | |
| case Test.E: | |
| return 0x04; | |
| case Test.F: | |
| return 0x05; | |
| case Test.G: | |
| return 0x06; | |
| default: | |
| return 0x7FFFFFFF; | |
| } | |
| } | |
| public int TestWithIf(Test val) { | |
| if(val == Test.A) { | |
| return 0x00; | |
| } | |
| else if(val == Test.B) { | |
| return 0x01; | |
| } | |
| else if(val == Test.C) { | |
| return 0x02; | |
| } | |
| else if(val == Test.D) { | |
| return 0x03; | |
| } | |
| else if(val == Test.E) { | |
| return 0x04; | |
| } | |
| else if(val == Test.F) { | |
| return 0x05; | |
| } | |
| else if(val == Test.G) { | |
| return 0x06; | |
| } | |
| else { | |
| return 0x7FFFFFFF; | |
| } | |
| } |
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| TestWithSwitch: | |
| IL_0000: nop | |
| IL_0001: ldarg.1 | |
| IL_0002: stloc.0 | |
| IL_0003: ldloc.0 | |
| IL_0004: ldc.i4.1 | |
| IL_0005: sub | |
| IL_0006: switch (IL_0029, IL_002D, IL_0031, IL_0035, IL_0039, IL_003D, IL_0041) | |
| IL_0027: br.s IL_0045 | |
| IL_0029: ldc.i4.0 | |
| IL_002A: stloc.1 | |
| IL_002B: br.s IL_004D | |
| IL_002D: ldc.i4.1 | |
| IL_002E: stloc.1 | |
| IL_002F: br.s IL_004D | |
| IL_0031: ldc.i4.2 | |
| IL_0032: stloc.1 | |
| IL_0033: br.s IL_004D | |
| IL_0035: ldc.i4.3 | |
| IL_0036: stloc.1 | |
| IL_0037: br.s IL_004D | |
| IL_0039: ldc.i4.4 | |
| IL_003A: stloc.1 | |
| IL_003B: br.s IL_004D | |
| IL_003D: ldc.i4.5 | |
| IL_003E: stloc.1 | |
| IL_003F: br.s IL_004D | |
| IL_0041: ldc.i4.6 | |
| IL_0042: stloc.1 | |
| IL_0043: br.s IL_004D | |
| IL_0045: ldc.i4 FF FF FF 7F | |
| IL_004A: stloc.1 | |
| IL_004B: br.s IL_004D | |
| IL_004D: ldloc.1 | |
| IL_004E: ret | |
| TestWithIf: | |
| IL_0000: nop | |
| IL_0001: ldarg.1 | |
| IL_0002: ldc.i4.1 | |
| IL_0003: ceq | |
| IL_0005: stloc.0 | |
| IL_0006: ldloc.0 | |
| IL_0007: brfalse.s IL_000E | |
| IL_0009: nop | |
| IL_000A: ldc.i4.0 | |
| IL_000B: stloc.1 | |
| IL_000C: br.s IL_006D | |
| IL_000E: ldarg.1 | |
| IL_000F: ldc.i4.2 | |
| IL_0010: ceq | |
| IL_0012: stloc.2 | |
| IL_0013: ldloc.2 | |
| IL_0014: brfalse.s IL_001B | |
| IL_0016: nop | |
| IL_0017: ldc.i4.1 | |
| IL_0018: stloc.1 | |
| IL_0019: br.s IL_006D | |
| IL_001B: ldarg.1 | |
| IL_001C: ldc.i4.3 | |
| IL_001D: ceq | |
| IL_001F: stloc.3 | |
| IL_0020: ldloc.3 | |
| IL_0021: brfalse.s IL_0028 | |
| IL_0023: nop | |
| IL_0024: ldc.i4.2 | |
| IL_0025: stloc.1 | |
| IL_0026: br.s IL_006D | |
| IL_0028: ldarg.1 | |
| IL_0029: ldc.i4.4 | |
| IL_002A: ceq | |
| IL_002C: stloc.s 04 | |
| IL_002E: ldloc.s 04 | |
| IL_0030: brfalse.s IL_0037 | |
| IL_0032: nop | |
| IL_0033: ldc.i4.3 | |
| IL_0034: stloc.1 | |
| IL_0035: br.s IL_006D | |
| IL_0037: ldarg.1 | |
| IL_0038: ldc.i4.5 | |
| IL_0039: ceq | |
| IL_003B: stloc.s 05 | |
| IL_003D: ldloc.s 05 | |
| IL_003F: brfalse.s IL_0046 | |
| IL_0041: nop | |
| IL_0042: ldc.i4.4 | |
| IL_0043: stloc.1 | |
| IL_0044: br.s IL_006D | |
| IL_0046: ldarg.1 | |
| IL_0047: ldc.i4.6 | |
| IL_0048: ceq | |
| IL_004A: stloc.s 06 | |
| IL_004C: ldloc.s 06 | |
| IL_004E: brfalse.s IL_0055 | |
| IL_0050: nop | |
| IL_0051: ldc.i4.5 | |
| IL_0052: stloc.1 | |
| IL_0053: br.s IL_006D | |
| IL_0055: ldarg.1 | |
| IL_0056: ldc.i4.7 | |
| IL_0057: ceq | |
| IL_0059: stloc.s 07 | |
| IL_005B: ldloc.s 07 | |
| IL_005D: brfalse.s IL_0064 | |
| IL_005F: nop | |
| IL_0060: ldc.i4.6 | |
| IL_0061: stloc.1 | |
| IL_0062: br.s IL_006D | |
| IL_0064: nop | |
| IL_0065: ldc.i4 FF FF FF 7F | |
| IL_006A: stloc.1 | |
| IL_006B: br.s IL_006D | |
| IL_006D: ldloc.1 | |
| IL_006E: ret |
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