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November 5, 2014 09:49
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Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, | |
2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 | |
The NetBSD Foundation, Inc. All rights reserved. | |
Copyright (c) 1982, 1986, 1989, 1991, 1993 | |
The Regents of the University of California. All rights reserved. | |
NetBSD 7.99.1 (NITROGEN6X) #1440: Wed Nov 5 17:33:02 JST 2014 | |
Welcome to NetBSD! | |
Terminal type is vt100. | |
We recommend that you create a non-root account and use su(1) for root access. | |
nitro# dmesg | |
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, | |
2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 | |
The NetBSD Foundation, Inc. All rights reserved. | |
Copyright (c) 1982, 1986, 1989, 1991, 1993 | |
The Regents of the University of California. All rights reserved. | |
NetBSD 7.99.1 (NITROGEN6X) #1440: Wed Nov 5 17:33:02 JST 2014 | |
ryo@phenomena:/src/cvs/NetBSD/sys/arch/evbarm/compile/NITROGEN6X | |
total memory = 1024 MB | |
avail memory = 1007 MB | |
sysctl_createv: sysctl_create(machine_arch) returned 17 | |
kern.module.path=/stand/evbarm/7.99.1/modules | |
timecounter: Timecounters tick every 10.000 msec | |
mainbus0 (root) | |
cpu0 at mainbus0 core 0: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled | |
cpu0: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232041 [3]=0x11112131, [4]=0x11142, [5]=0 | |
cpu0: mmfr: [0]=0x100103 [1]=0x20000000 [2]=0x1230000 [3]=0x102111 | |
cpu0: pfr: [0]=0x1231 [1]=0x11 | |
cpu0: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
cpu0: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals | |
vfp0: mvfr: [0]=0x10110222 [1]=0x1111111 | |
cpu1 at mainbus0 core 1 | |
cpu2 at mainbus0 core 2 | |
cpu3 at mainbus0 core 3 | |
armperiph0 at mainbus0 | |
arml2cc0 at armperiph0: ARM PL310 r3p1a L2 Cache Controller (disabled) | |
arml2cc0: cache enabled | |
armgic0 at armperiph0: Generic Interrupt Controller, 160 sources (149 valid) | |
armgic0: 32 Priorities, 128 SPIs, 5 PPIs, 16 SGIs | |
a9tmr0 at armperiph0: A9 Global 64-bit Timer (396 MHz) | |
a9tmr0: interrupting on irq 27 | |
axi0 at mainbus0: Advanced eXtensible Interface | |
imxccm0 at axi0 addr 0x20c4000: Clock Control Module | |
imxccm0: PLL_ARM clock=792000000 | |
imxccm0: PLL_SYS clock=528000000 | |
imxccm0: PLL_USB1 clock=480000000 | |
imxccm0: PLL_USB2 clock=480000000 | |
imxccm0: PLL_AUDIO clock=36000000 | |
imxccm0: PLL_VIDEO clock=72000000 | |
imxccm0: PLL_ENET clock=50000000 | |
imxccm0: PLL_MLB clock=480000000 | |
imxccm0: IMX6CLK_PLL2_PFD0=352000000 | |
imxccm0: IMX6CLK_PLL2_PFD1=594000000 | |
imxccm0: IMX6CLK_PLL2_PFD2=396000000 | |
imxccm0: IMX6CLK_PLL3_PFD0=720000000 | |
imxccm0: IMX6CLK_PLL3_PFD1=540000000 | |
imxccm0: IMX6CLK_PLL3_PFD2=508235294 | |
imxccm0: IMX6CLK_PLL3_PFD3=454736842 | |
imxccm0: IMX6CLK_ARM_ROOT=792000000 | |
imxccm0: IMX6CLK_PERIPH=528000000 | |
imxccm0: IMX6CLK_AHB=132000000 | |
imxccm0: IMX6CLK_IPG=66000000 | |
imxccm0: IMX6CLK_AXI=264000000 | |
imxccm0: IMX6CLK_USDHC1=198000000 | |
imxccm0: IMX6CLK_USDHC2=198000000 | |
imxccm0: IMX6CLK_USDHC3=198000000 | |
imxccm0: IMX6CLK_USDHC4=198000000 | |
imxocotp0 at axi0 addr 0x21bc000: On-Chip OTP Controller | |
imxocotp0: OCOTP_VERSION 2.0.0 | |
imxgpio0 at axi0 addr 0x209c000 intr 98 irqbase 256: interrupts 256..287 | |
imxgpio1 at axi0 addr 0x20a0000 intr 100 irqbase 288: interrupts 288..319 | |
imxgpio2 at axi0 addr 0x20a4000 intr 102 irqbase 320: interrupts 320..351 | |
imxgpio3 at axi0 addr 0x20a8000 intr 104 irqbase 352: interrupts 352..383 | |
imxgpio4 at axi0 addr 0x20ac000 intr 106 irqbase 384: interrupts 384..415 | |
imxgpio5 at axi0 addr 0x20b0000 intr 108 irqbase 416: interrupts 416..447 | |
imxgpio6 at axi0 addr 0x20b4000 intr 110 irqbase 448: interrupts 448..479 | |
imxiomux0 at axi0 addr 0x20e0000: IOMUX Controller | |
imxuart0 at axi0 addr 0x2020000 intr 58 | |
imxuart1 at axi0 addr 0x21e8000 intr 59 | |
imxuart1: console | |
ahcisata0 at axi0 addr 0x2200000 intr 71: AHCI Controller | |
ahcisata0: AHCI revision 1.30, 1 port, 32 slots, CAP 0x6f26ff80<CCCS,PSC,SSC,PMD,SPM,SAM,ISS=0x2=Gen2,SCLO,SAL,SALP,SSS,SSNTF,SNCQ> | |
atabus0 at ahcisata0 channel 0 | |
sdhc0 at axi0 addr 0x2190000 intr 54: Ultra Secured Digial Host Controller | |
sdhc0: SD Host Specification 3.0, rev.0 | |
sdhc0: software reset reg=00000001 | |
sdhc0: base clock frequency 198 MHz | |
sdhc0: max block length 4096 bytes | |
sdmmc0 at sdhc0 slot 0 | |
sdhc1 at axi0 addr 0x2194000 intr 55: Ultra Secured Digial Host Controller | |
sdhc1: SD Host Specification 3.0, rev.0 | |
sdhc1: software reset reg=00000001 | |
sdhc1: base clock frequency 198 MHz | |
sdhc1: max block length 4096 bytes | |
sdmmc1 at sdhc1 slot 0 | |
imxwdog0 at axi0 addr 0x20bc000 intr 112: i.MX Watchdog Timer, default period is 10 seconds | |
imxi2c0 at axi0 addr 0x21a0000 intr 68: i.MX IIC bus controller | |
iic0 at imxi2c0: I2C bus | |
imxi2c1 at axi0 addr 0x21a4000 intr 69: i.MX IIC bus controller | |
iic1 at imxi2c1: I2C bus | |
imxi2c2 at axi0 addr 0x21a8000 intr 70: i.MX IIC bus controller | |
iic2 at imxi2c2: I2C bus | |
enet0 at axi0 addr 0x2188000 intr 150: Gigabit Ethernet Controller | |
enet0: Ethernet address 00:19:b8:00:f2:f8 | |
micphy0 at enet0 phy 6: Micrel KSZ9021RNI 10/100/1000 PHY, rev. 1 | |
micphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto | |
imxusbc0 at axi0 addr 0x2184000: Universal Serial Bus Controller | |
ehci0 at imxusbc0 unit 0 intr 75: i.MX USB Controller | |
ehci0: id=5 revision=1 HCI revision=0x100 | |
ehci0: 1 host port, device capable, 8 endpoints | |
ehci0: EHCI version 1.0 | |
usb0 at ehci0: USB revision 2.0 | |
ehci1 at imxusbc0 unit 1 intr 72: i.MX USB Controller | |
ehci1: id=5 revision=1 HCI revision=0x100 | |
ehci1: 1 host port | |
ehci1: EHCI version 1.0 | |
usb1 at ehci1: USB revision 2.0 | |
imxsnvs0 at axi0 addr 0x20cc000: Secure Non-Volatile Storage | |
imxsnvs0: id=0x3e, ver=1.0, ip_era=0x0, intg_opt=0x0, eco_rev=0x0, config_opt=0x0 | |
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0 | |
timecounter: Timecounter "a9tmr0" frequency 396000000 Hz quality 500 | |
cpu_boot_secondary_processors: writing mbox with 0xe | |
cpu_hatch(cpu2): cpu_hatch(cpu3): vectors vectors vbar=0x80bd89e0cpu_hatch(cpu1): stacks vectors tlb vbar=0x80bd89e0 vbar=0x80bd89e0 stacks stacks tlbcpu2cpu3 tlb: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
cpu1cpu2:: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
DC enabled: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
cpu3:cpu1: IC enabled WB disabled EABT DC enabled IC enabled DC enabled IC enabled WB disabled EABT WB disabled branch prediction enabled branch prediction enabled | |
EABTcpu2: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232041 [3]=0x11112131, [4]=0x11142, [5]=0 | |
branch prediction enabledcpu2: mmfr: [0]=0x100103 [1]=0x20000000 [2]=0x1230000 [3]=0x102111 | |
cpu2: pfr: [0]=0x1231 [1]=0x11 | |
cpu1: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232041 [3]=0x11112131, [4]=0x11142, [5]=0 | |
cpu1: mmfr: [0]=0x100103 [1]=0x20000000 [2]=0x1230000 [3]=0x102111 | |
cpu1: pfr: [0]=0x1231 [1]=0x11 | |
cpu2: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu1: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu1: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
cpu2: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
cpu1: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
cpu2: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
vfpcpu3: isar: [0]=0x101111 [1]=0x13112111 [2]=0x21232041 [3]=0x11112131, [4]=0x11142, [5]=0 | |
vfp1 at cpu1: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals | |
cpu3: mmfr: [0]=0x100103 [1]=0x20000000 [2]=0x1230000 [3]=0x102111 | |
vfpcpu3: pfr: [0]=0x1231 [1]=0x11 | |
vfp2 at cpu2: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals | |
vfp1: mvfr: [0]=0x10110222 [1]=0x1111111 | |
vfp2: mvfr: [0]=0x10110222 [1]=0x1111111 | |
cpu3: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu3: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
interrupts interrupts md(0x80952ab8)cpu3: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
md(0x80952ab8) done! | |
vfp done! | |
vfp3 at cpu3: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals | |
vfp3: mvfr: [0]=0x10110222 [1]=0x1111111 | |
interrupts md(0x80952ab8) done! | |
gpio0 at imxgpio0: 32 pins | |
gpio1 at imxgpio1: 32 pins | |
gpio2 at imxgpio2: 32 pins | |
gpio3 at imxgpio3: 32 pins | |
gpio4 at imxgpio4: 32 pins | |
gpio5 at imxgpio5: 32 pins | |
gpio6 at imxgpio6: 32 pins | |
imx6_sdhc_card_detect:89 | |
imx6_sdhc_card_detect:89 | |
uhub0 at usb1: i.MX EHCI root hub, class 9/0, rev 2.00/1.00, addr 1 | |
uhub0: 1 port with 1 removable, self powered | |
uhub1 at usb0: i.MX EHCI root hub, class 9/0, rev 2.00/1.00, addr 1 | |
uhub1: 1 port with 1 removable, self powered | |
ahcisata0 port 0: device present, speed: 3.0Gb/s | |
sdmmc_io_send_op_cond: ocr = 0 | |
sdhc0: start cmd 5 arg=00000000 data=0x0 dlen=0 flags=00000302, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdmmc_io_send_op_cond: ocr = 0 | |
sdhc0: writing cmd: blksize=0 blkcnt=0 mode=0002 cmd=0502 | |
sdhc1: start cmd 5 arg=00000000 data=0x0 dlen=0 flags=00000302, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc1: writing cmd: blksize=0 blkcnt=0 mode=0002 cmd=0502 | |
IPsec: Initialized Security Association Processing. | |
sdhc0: cmd 5 abort (flags=00000303 error=60) | |
sdmmc_io_send_op_cond: error = 60 | |
sdhc0: start cmd 0 arg=00000000 data=0x0 dlen=0 flags=00000600, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc1: cmd 5 abort (flags=00000303 error=60) | |
sdmmc_io_send_op_cond: error = 60 | |
sdhc1: start cmd 0 arg=00000000 data=0x0 dlen=0 flags=00000600, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc0: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc_start_command:1325: error=60 | |
sdhc0: cmd 0 abort (flags=00000601 error=60) | |
sdhc0: start cmd 55 arg=00000000 data=0x0 dlen=0 flags=00000432, status=0 | |
sdhc1: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc_start_command:1325: error=60 | |
sdhc1: cmd 0 abort (flags=00000601 error=60) | |
sdhc1: start cmd 55 arg=00000000 data=0x0 dlen=0 flags=00000432, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc0: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc_start_command:1325: error=60 | |
sdhc0: cmd 55 abort (flags=00000433 error=60) | |
sdmmc0: sdmmc_mem_send_op_cond: error=60, ocr=0 | |
sdmmc0: switch to MMC mode | |
sdhc1: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc0: start cmd 1 arg=00000000 data=0x0 dlen=0 flags=00000702, status=0 | |
sdhc_start_command:1325: error=60 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc1: cmd 55 abort (flags=00000433 error=60) | |
sdmmc1: sdmmc_mem_send_op_cond: error=60, ocr=0 | |
sdmmc1: switch to MMC mode | |
sdhc1: start cmd 1 arg=00000000 data=0x0 dlen=0 flags=00000702, status=0 | |
sdhc_wait_state:1147 mask=3, value=0 | |
sdhc0: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc_start_command:1325: error=60 | |
sdhc0: cmd 1 abort (flags=00000703 error=60) | |
sdmmc0: sdmmc_mem_send_op_cond: error=60, ocr=0 | |
sdmmc0: couldn't read memory OCR | |
imx6_sdhc_card_detect:89 | |
sdhc0: sdhc_bus_clock: command in progress | |
sdhc1: timeout waiting for 0 (state=f7888009, reg=f7888009, mask=3) | |
sdhc0: software reset reg=00000001 | |
sdhc_start_command:1325: error=60 | |
sdmmc0: couldn't enable card: 60 | |
sdhc1: cmd 1 abort (flags=00000703 error=60) | |
sdhc0: software reset reg=00000001 | |
sdmmc1: sdmmc_mem_send_op_cond: error=60, ocr=0 | |
sdmmc1: couldn't read memory OCR | |
imx6_sdhc_card_detect:89 | |
sdhc1: sdhc_bus_clock: command in progress | |
sdhc1: software reset reg=00000001 | |
sdmmc1: couldn't enable card: 60 | |
sdhc1: software reset reg=00000001 | |
wd0 at atabus0 drive 0 | |
wd0: <WDC WD10EADS-00L5B1> | |
wd0: drive supports 16-sector PIO transfers, LBA48 addressing | |
wd0: 931 GB, 1938021 cyl, 16 head, 63 sec, 512 bytes/sect x 1953525168 sectors | |
wd0: drive supports PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) | |
wd0(ahcisata0:0:0): using PIO mode 4, DMA mode 2, Ultra-DMA mode 6 (Ultra/133) (using DMA) | |
uhub2 at uhub0 port 1: SMSC product 2513, class 9/0, rev 2.00/b.b3, addr 2 | |
uhub2: multiple transaction translators | |
uhub2: 3 ports with 3 removable, self powered | |
Kernelized RAIDframe activated | |
boot device: <unknown> | |
root on wd0a dumps on wd0b | |
/: replaying log to memory | |
root file system type: ffs | |
WARNING: preposterous TOD clock time | |
WARNING: using filesystem time | |
WARNING: CHECK AND RESET THE DATE! | |
/: replaying log to disk |
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