Created
September 5, 2014 20:06
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Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, | |
2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014 | |
The NetBSD Foundation, Inc. All rights reserved. | |
Copyright (c) 1982, 1986, 1989, 1991, 1993 | |
The Regents of the University of California. All rights reserved. | |
NetBSD 7.99.1 (NITROGEN6X) #1125: Sat Sep 6 05:04:11 JST 2014 | |
ryo@phenomena:/src/cvs/NetBSD/sys/arch/evbarm/compile/NITROGEN6X | |
total memory = 1016 MB | |
avail memory = 1000 MB | |
sysctl_createv: sysctl_create(machine_arch) returned 17 | |
kern.module.path=/stand/evbarm/7.99.1/modules | |
mainbus0 (root) | |
cpu0 at mainbus0 core 0: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
cpu0: DC enabled IC enabled WB disabled EABT branch prediction enabled | |
cpu0: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu0: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
cpu0: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
vfp0 at cpu0: NEON MPE (VFP 3.0+), rounding, NaN propagation, denormals | |
cpu1 at mainbus0 core 1 | |
armperiph0 at mainbus0 | |
arml2cc0 at armperiph0: ARM PL310 r3p1a L2 Cache Controller (disabled) | |
armgic0 at armperiph0: Generic Interrupt Controller, 160 sources (149 valid) | |
armgic0: 32 Priorities, 128 SPIs, 5 PPIs, 16 SGIs | |
a9tmr0 at armperiph0: A9 Global 64-bit Timer (396 MHz) | |
a9tmr0: interrupting on irq 27 | |
axi0 at mainbus0: Advanced eXtensible Interface | |
imxccm0 at axi0 addr 0x20c4000: Clock Control Module | |
imxocotp0 at axi0 addr 0x21bc000: On-Chip OTP Controller | |
imxocotp0: OCOTP_VERSION 2.0.0 | |
imxgpio0 at axi0 addr 0x209c000 intr 98 irqbase 256: interrupts 256..287 | |
imxgpio1 at axi0 addr 0x20a0000 intr 100 irqbase 288: interrupts 288..319 | |
imxgpio2 at axi0 addr 0x20a4000 intr 102 irqbase 320: interrupts 320..351 | |
imxgpio3 at axi0 addr 0x20a8000 intr 104 irqbase 352: interrupts 352..383 | |
imxgpio4 at axi0 addr 0x20ac000 intr 106 irqbase 384: interrupts 384..415 | |
imxgpio5 at axi0 addr 0x20b0000 intr 108 irqbase 416: interrupts 416..447 | |
imxgpio6 at axi0 addr 0x20b4000 intr 110 irqbase 448: interrupts 448..479 | |
imxiomux0 at axi0 addr 0x20e0000: IOMUX Controller | |
imxuart0 at axi0 addr 0x2020000 intr 58 | |
imxuart1 at axi0 addr 0x21e8000 intr 59 | |
imxuart1: console | |
imxuart2 at axi0 addr 0x21ec000 intr 60 | |
imxuart3 at axi0 addr 0x21f0000 intr 61 | |
imxuart4 at axi0 addr 0x21f4000 intr 62 | |
ahcisata0 at axi0 addr 0x2200000 intr 71: AHCI Controller | |
ahcisata0: AHCI revision 1.30, 1 port, 32 slots, CAP 0x6f26ff80<CCCS,PSC,SSC,PMD,SPM,SAM,ISS=0x2=Gen2,SCLO,SAL,SALP,SSS,SSNTF,SNCQ> | |
atabus0 at ahcisata0 channel 0 | |
imxwdog0 at axi0 addr 0x20bc000 intr 112: i.MX Watchdog Timer, default period is 10 seconds | |
enet0 at axi0 addr 0x2188000 intr 150: Gigabit Ethernet Controller | |
enet0: Ethernet address 00:19:b8:00:f2:f8 | |
micphy0 at enet0 phy 6: Micrel KSZ9021RNI 10/100/1000 PHY, rev. 1 | |
micphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, 1000baseT, 1000baseT-FDX, auto | |
cpu_boot_secondary_processors: writing mbox with 0x2 | |
cpu_hatch(cpu1): vectors vbar=0x80b07f80 stacks tlbcpu1: 792 MHz Cortex-A9 r3p10 (Cortex V7A core) | |
cpu1: DC enabled IC enabled WB disabled EABT branch prediction enabled | |
cpu1: 32KB/32B 4-way L1 VIPT Instruction cache | |
cpu1: 32KB/32B 4-way write-back-locking-C L1 PIPT Data cache | |
cpu1: 1024KB/32B 16-way write-back-locking-D L2 PIPT Unified cache | |
vfppanic: assert_sleepable: idle caller=0x80a65b08 | |
Spitcop_piepdi _dindb :p idcp 0u.01: 6 tf(s=0yxst8e0md1)9 fa3t0 | |
netbsd:cpu_Debugger+0x4: bx r14 | |
db{1}> bt | |
0xbfcf3e4c: netbsd:vpanic+0xc | |
0xbfcf3e64: netbsd:snprintf | |
0xbfcf3e9c: netbsd:assert_sleepable+0xb4 | |
0xbfcf3ed4: netbsd:pool_cache_get_paddr+0x168 | |
0xbfcf3f04: netbsd:kmem_intr_alloc+0x7c | |
0xbfcf3f24: netbsd:install_coproc_handler+0x34 | |
0xbfcf3f6c: netbsd:vfp_attach+0x84 | |
0xbfcf3f94: netbsd:cpu_hatch+0x1b0 | |
db{1}> |
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