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@sencagri
Created May 1, 2018 12:20
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test
# instruction set for ARM V8 processor
instructionSet =[
["B", "000001mmmmmmmmmmmmmmmmmmmmmmmmmm"],
["BR", "100001mmmmmmmmmmmmmmmmmmmmmmmmmm"],
["EQ", "01000100mmmmmmmmmmmmmmmmmmm00000"],
["NE", "01110100mmmmmmmmmmmmmmmmmmm00000"],
["GE", "01100100mmmmmmmmmmmmmmmmmmm00000"],
["GT", "01010100mmmmmmmmmmmmmmmmmmm00000"],
["LE", "01001100mmmmmmmmmmmmmmmmmmm00000"],
["LT", "11000100mmmmmmmmmmmmmmmmmmm00000"],
["ADDI", "0000000110ddddddddddddmmmmmnnnnn"],
["ADDIU", "0000000110ddddddddddddmmmmmnnnnn"],
["BREAK", "10000000000000000000000000000101"],
["CMP" ,"1101111001110101000001nnnnnddddd"],
["STR" ,"1001100100mmmmmmmmmmmmnnnnnddddd"],
["LDR" ,"0001110101mmmmmmmmmmmmnnnnnddddd"],
["LSL" ,"00011010110mmmmm001000nnnnnddddd"],
["LSR" ,"00011010010mmmmm001001nnnnnddddd"],
["ASR" ,"00011010100mmmmm001100nnnnnddddd"],
["SUB" ,"01011110001mmmmm000001nnnnnddddd"],
["SUBU" ,"01011110101mmmmm000001nnnnnddddd"],
["ADD" ,"01011110011mmmmm000001nnnnnddddd"],
["ADDU" ,"00001110000mmmmm100001nnnnnddddd"],
["AND" ,"00001110001mmmmm000111nnnnnddddd"],
["OR" ,"00001110101mmmmm000111nnnnnddddd"],
["EOR" ,"0100101000000000000010nnnnnddddd"],
["LT" ,"000111100010000000001000000mmmmm"]
]
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