Created
May 1, 2018 17:02
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# instruction set for ARM V8 processor | |
instructionSet =[ | |
["B", "000001mmmmmmmmmmmmmmmmmmmmmmmmmm"], | |
["BR", "100001mmmmmmmmmmmmmmmmmmmmmmmmmm"], | |
["EQ", "01000100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["NE", "01110100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["GE", "01100100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["GT", "01010100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["LE", "01001100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["LT", "11000100mmmmmmmmmmmmmmmmmmmnnnnn"], | |
["ADDI","0000000110ddddddddddddmmmmmnnnnn"], | |
["ADDIU","1110001110ddddddddddddmmmmmnnnnn"], | |
["BREAK","10000000000000000000000000000101"], | |
["CMP" ,"1101111001110101000nnnnndddddddd"], | |
["STR" ,"1001100100mmmmmmmmmmmmnnnnnddddd"], | |
["LDR" ,"1101010101mmmmmmmmmmmmnnnnnddddd"], | |
["LSL" ,"10011010110mmmmm001000nnnnnddddd"], | |
["LSR" ,"00010010010mmmmm001001nnnnnddddd"], | |
["ASR" ,"00011010100mmmmm001100nnnnnddddd"], | |
["SUB" ,"01011110001mmmmm000001nnnnnddddd"], | |
["SUBU" ,"11111110101mmmmm000001nnnnnddddd"], | |
["ADD" ,"01011110011mmmmm000001nnnnnddddd"], | |
["ADDU" ,"00001110000mmmmm100001nnnnnddddd"], | |
["AND" ,"00101110001mmmmm000111nnnnnddddd"], | |
["OR" ,"10101110101mmmmm000111nnnnnddddd"], | |
["EOR" ,"01001010000mmmmm000010nnnnnddddd"], | |
["SLT" ,"0001111000100000001101nnnnnmmmmm"] | |
] |
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