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July 1, 2025 21:29
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pmbootstrap flasher flash_kernel
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| umc check: 0x10206540 = 0x80010000 | |
| Current RTC time:[2021/8/6 19:24:15] | |
| DATE_CODE_YY:0, DATE_CODE_MM:0, DATE_CODE_DD:10000 | |
| SegCode:86, CS, BK0:0x80010000 | |
| [PMIC_PRELOADER] Preloader Start.................. | |
| [PMIC_PRELOADER] MT6353 CHIP Code = 0x5310 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2AE]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x21A]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x218]=0xF7FF | |
| [PMIC_PRELOADER][pmic_status] Reg[0x212]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x214]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x8]=0x8000 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2A8]=0x204 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x250]=0xE6E | |
| [PMIC_PRELOADER]just_rst = 0 | |
| bat is exist. | |
| [PMIC_PRELOADER] turn off usbdl wo battery.................. | |
| [PMIC_PRELOADER][6353] is_efuse_trimed=0x1,[0xC5C]=0x8000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x0]=0x29E3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1]=0x3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x2]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x3]=0xBFA0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x4]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x5]=0x2000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x6]=0x1C20 | |
| [PMIC_PRELOADER][6353] efuse_data[0x7]=0x2 | |
| [PMIC_PRELOADER][6353] efuse_data[0x8]=0x220 | |
| [PMIC_PRELOADER][6353] efuse_data[0x9]=0x44 | |
| [PMIC_PRELOADER][6353] efuse_data[0xA]=0x6800 | |
| [PMIC_PRELOADER][6353] efuse_data[0xB]=0xEC64 | |
| [PMIC_PRELOADER][6353] efuse_data[0xC]=0x5B7 | |
| [PMIC_PRELOADER][6353] efuse_data[0xD]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xE]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xF]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x10]=0x4104 | |
| [PMIC_PRELOADER][6353] efuse_data[0x11]=0x10 | |
| [PMIC_PRELOADER][6353] efuse_data[0x12]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x13]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x14]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x15]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x16]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x17]=0xC41D | |
| [PMIC_PRELOADER][6353] efuse_data[0x18]=0xF1A9 | |
| [PMIC_PRELOADER][6353] efuse_data[0x19]=0x7DF8 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1A]=0xEC2F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1B]=0x1C1F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1C]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1D]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1E]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1F]=0x0 | |
| [PMIC_PRELOADER][pmic_init] Reg[0x2A8]=0x205 | |
| bat is exist. | |
| [fgauge_get_profile_id]: [fgauge_get_profile_id]Battery id (0) and id_volt = 1186596. | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=3 raw=1376 data=604 | |
| bat_temperature_volt: 604 | |
| TRes:8456 bat_temperature_volt: 295 | |
| preloader temperature is 295 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=1 raw=26445 data=4358 | |
| rt5081_is_hw_exist: preloader vendor id reg is 166 | |
| rt5081_is_hw_exist: Preloader rt5081 version 6 | |
| rt_charger_set_pre_vchg:preloader vchg = 2800 | |
| rt_charger_set_pre_ichg:preloader ichg = 250 | |
| rt_charger_set_ichg:ichg = 1200 | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| step B2 : Charging Host! | |
| rt_charger_set_aicr: aicr = 500 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=2 raw=1183 data=519 | |
| [pl_check_bat_protect_status]: check VBAT=4358 mV with 3200 mV, VCHR 4910 mV ,VCHR_HV=6500 start charging... | |
| [pl_check_bat_protect_status]: check VBAT=4358 mV with 3200 mV, stop charging... | |
| [PMIC_PRELOADER] [pmic_init] Done................... | |
| vproc/vsram run as hw default | |
| [PLFM] Init I2C: OK(0) | |
| [PLFM] Init PWRAP: OK(0) | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_code[326] | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20210805-162821 | |
| [DDR Reserve] ddr reserve mode not be enabled yet | |
| ==== Dump RGU Reg ======== | |
| RGU MODE: 14 | |
| RGU LENGTH: FFE0 | |
| RGU STA: 40000000 | |
| RGU INTERVAL: FFF | |
| RGU SWSYSRST: 8000 | |
| ==== Dump RGU Reg End ==== | |
| RGU: PMIC full rst: 0 | |
| RGU: g_rgu_satus:2 | |
| mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| PL RGU RST: ?? | |
| SW reset with bypass power key flag | |
| Find bypass powerkey flag | |
| mtk_wdt_mode_config mode value=15, tmp:22000015 | |
| RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(200F1), MTK_WDT_LATCH_CTL(30071) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x1C70 ! | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| before clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| [RTC] enable_dcxo first con = 0x486, osc32con = 0x7B00, sec = 0x2555 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3967 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] bbpu = 0xD, con = 0x486, osc32con = 0x7B00, sec = 0x2555, yea = 0xC035 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC] RTC_SPAR0=0x40 | |
| [RTC] rtc_2sec_reboot_check 0x2555 | |
| [RTC] rtc_2sec_stat_clear | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x2A01, spar0 = 0xC0, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x640D, new_spare1 = 0x5, new_spare2 = 0x1, new_spare3 = 0x8 | |
| [RTC] bbpu = 0xD, con = 0x486, cali = 0x2555, osc32_con =0x7B00 | |
| SW reset with bypass power key flag | |
| SW reset with bypass power key flag | |
| [PLFM] WDT reboot bypass power key! | |
| [RTC] rtc_bbpu_power_on done | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| Log Turned Off. | |
| [EMI] eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,3,14,33,90,E2,25,DD | |
| [Check]mt_get_mdl_number 0x1 | |
| [EMI] MDL number = 1 | |
| [EMI] emi_set eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,0,0,0,0,0,0,0 | |
| RGU rgu_dram_reserved:MTK_WDT_MODE(22000015) | |
| [MEM] complex R/W mem test pass | |
| [Dram_Buffer] g_dram_buf start addr: 0x44800000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x4489D9C0 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x4489DA00 | |
| RAM_CONSOLE using SRAM | |
| RAM_CONSOLE start: 0x11D000, size: 0x800, sig: 0x43474244 | |
| RAM_CONSOLE preloader last status: 0x0 0x0 0x0 | |
| RAM_CONSOLE wdt status (0x2)=0x2 | |
| [PLFM] Init Boot Device: OK(0) | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| [EFUSE] Start Check ... | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x1305 | |
| [PMIC_PRELOADER][AUXADC] ch=0 raw=26498 data=4366 | |
| [GPT_PL]Success to find valid GPT. | |
| [PLFM] Efuse status(80000000) | |
| Writing 20000000 to 1129030C, 4 bytes | |
| total_dram_size: 0x00000000C0000000, max_dram_size: 0xFFFFFFFFFFFFFFFF | |
| dump mblock info | |
| mblock[i] start=0000000040000000 size=0000000080000000 | |
| mblock[i] start=00000000C0000000 size=0000000040000000 | |
| [GPT_PL]Success to find valid GPT. | |
| PL_LOG_STORE:sram->sig value 0xABCD1234! | |
| PL_LOG_STORE:expdb partition start addr 0x88000, end addr 0xA88000, partition size 0xA00000, nr_sects 0x5000, blksz 0x200! | |
| PL_LOG_STORE:get uart flag= 0x0 | |
| PL_LOG_STORE:log_to_emmc function flag 0x27! | |
| PL_LOG_STORE:last pl log size 0x36C4, lk log size 0xFD4F! | |
| PL_LOG_STORE: /* write preloader/lk log addr 0x7FFC0020 size 0x13413, offset 0x20800*/ | |
| PL_LOG_STORE: /* write ATF log addr 0x9E880000 size 0xC00, offset 0x33E00*/ | |
| mblock_reserve: 000000007FFC0000 - 0000000080000000 from mblock 0 | |
| PL_LOG_STORE:sram_header 0x11DF00,sig 0xABCD1234, sram_dram_buff 0x11DF0C, buf_addr 0x7FFC0000 | |
| [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00' | |
| [SEC] AES Legacy : 0 | |
| [SEC] SECCFG AC : 1 | |
| [LIB] Loading SEC config | |
| [LIB] Name = | |
| [LIB] Config = 0x0, 0x22 | |
| [LIB] SECRO (ac, ac_offset, ac_length) = (0x1, 0x40, 0x2BA0) | |
| 0x31,0x41,0x35,0x32 | |
| [SEC] DBGPORT 00000051 0000F0F0 00000101 0000F0F0 00000101 00000042 00000000 0000001A 00000000 | |
| [SEC] DBGPORT (1 1) | |
| [SEC] DBGPORT 00000051 0000F000 00011111 0000F000 00011111 00000000 00000053 00000012 0000001C | |
| [SEC] read '0x9000000' | |
| 0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0, | |
| [LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C' | |
| 0x4D4D4D4D | |
| [LIB] SEC CFG 'v4' exists | |
| [LIB] HW DEC | |
| GCPU Enhance,V1.2 | |
| [LIB] SEC CFG is valid. Lock state is 3 | |
| bldr_handshake, spar0(0x4030)=192 | |
| [BLDR] Tool connection is unlocked | |
| [platform_vusb_on] VUSB33 is on | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| [mt_charger_type_detection] Got data !!, 0, 1 | |
| [PLFM] USB cable in | |
| [TOOL] USB enum timeout (Yes), handshake timeout(Yes) | |
| [TOOL] Enumeration(Start) | |
| HS is detected | |
| [TOOL] Enumeration(End): OK 581ms | |
| usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0][TOOL] : usb listen timeout | |
| [TOOL] <USB> cannot detect tools! | |
| [TOOL] <UART> listen ended, receive size:0! | |
| [TOOL] <UART> wait sync time 150ms->5ms | |
| [TOOL] <UART> receieved data: () | |
| Device APC domain init setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Device APC domain after setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x2000051) | |
| Domain Setup (0x660) | |
| mblock_reserve: 0000000044600000 - 0000000044640000 from mblock 0 | |
| (B)tz_dapc_sec_init is 0x0 | |
| (E)tz_dapc_sec_init is 0x0 | |
| [AB] Current boot: Preloader_b | |
| [AB] ab_suffix: _b, ab_retry: 0 | |
| [AB] boot_success is 1! | |
| part name=lk_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: lk, addr: 0xFFFFFFFF, mode: -1, size:0xA20C4 | |
| part: lk_b img: lk cert vfy(0 ms) | |
| [PART] load "lk_b" from 0x00000000D6500200 (dev) to 0x46000000 (mem) [SUCCESS] | |
| [PART] load speed: 10625KB/s, 663748 bytes, 61ms | |
| part: lk_b img: lk vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: atf, addr: 0xFFFFFFFF, mode: 0, size:0x12A00 | |
| part: tee_b img: atf cert vfy(0 ms) | |
| [PART] load "tee_b" from 0x00000000D7E00200 (dev) to 0x1005C0 (mem) [SUCCESS] | |
| [PART] load speed: 8277KB/s, 76288 bytes, 9ms | |
| part: tee_b img: atf vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: tee, addr: 0x1740240, mode: 0, size:0x5A400 | |
| part: tee_b img: tee cert vfy(0 ms) | |
| mblock_reserve: 000000009E880000 - 00000000A0000000 from mblock 2 | |
| [TZ_INIT] atf_log_buf_start: 0x9E880000, tee_secmem_start: 0x9E8C0000 | |
| [PART] load "tee_b" from 0x00000000D7E13C70 (dev) to 0x9E8BFDC0 (mem) [SUCCESS] | |
| [PART] load speed: 10027KB/s, 369664 bytes, 36ms | |
| part: tee_b img: tee vfy(0 ms) | |
| [TZ_INIT] TEE start entry : 0x9E8C0000 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x1005C0 | |
| [PICACHU] scenario#3: enable bit is not set. Skip it. | |
| bat is exist. | |
| mblock_reserve: 0000000044400000 - 0000000044410000 from mblock 0 | |
| mblock_reserve: 0000000044410000 - 00000000444F0000 from mblock 1 | |
| mblock_reserve: 00000000444F0000 - 0000000044500000 from mblock 1 | |
| [PLFM] boot to LK by ATAG. | |
| DTB Addr: 0x0 | |
| DTB Size: 0x0 | |
| RAM_CONSOLE wdt_status 0x2, fiq_step 0x0, exp_type 0x0 | |
| RAM_CONSOLE offset:0xEC0 | |
| RAM_CONSOLE sram_plat_dbg_info_addr:0x11D800, sram_plat_dbg_info_size:0x400, sram_log_store_addr:0x11DF00, sram_log_store_size:0x100 | |
| RAM_CONSOLE mrdump_addr:0x11E000, mrdump_size:0x2000, dram_addr:0x44400000, dram_size:0x10000 | |
| RAM_CONSOLE pstore_addr:0x44410000, pstore_size:0xE0000, pstore_console_size:0x40000, pstore_pmsg_size:0x10000 | |
| RAM_CONSOLE mrdump_mini_header_addr:0x444F0000, mrdump_mini_header_size:0x10000, magic1:0x61646472, magic2:0x73697A65 | |
| memory_type = 0x203 memory_vendor = 0x1 | |
| bat_id_volt = 1186596 | |
| BOOT_REASON: 4 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285220864 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 0 | |
| MEM_SIZE: 0x231080 | |
| MEM_SIZE: 0x231080 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| BOOT_TIME: 4821 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| PART_NUM: 3 | |
| PART_INFO: 0x44876684 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 38146 | |
| DRAM_BUF: 907904 | |
| SRAM satrt: 0x11C000 | |
| SRAM size: 0x4000 | |
| is abnormal boot: 0 | |
| ram_console info sram_addr: 0x11D000 | |
| ram_console info sram_size: 0x800 | |
| ram_console info def_type: 0x1 | |
| ram_console memory_info_offset: 0xEC0 | |
| pl gpio prot[0]: 0x0 | |
| pl gpio prot[1]: 0x0 | |
| pl gpio prot[2]: 0x0 | |
| pl gpio prot[3]: 0x0 | |
| pl gpio prot[4]: 0x0 | |
| pl gpio prot[5]: 0x0 | |
| pl gpio prot[6]: 0x0 | |
| devinfo data index out of range:22 | |
| devinfo data size:22 | |
| devinfo ver: V1.0.1 | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [LIB] HW ENC | |
| [TZ_TBASE] sec_mem_arg.magic: 0x3C562817 | |
| [TZ_TBASE] sec_mem_arg.version: 0x10000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_start: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_end: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_start: 0x9FE00000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_size: 0x200000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_start: 0x9FDFF000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_size: 0x1000 | |
| [TZ_TBASE] sec_mem_arg.secmem_obfuscation: 0x1 | |
| [TZ_TBASE] tee_entry_addr: 0x9E8C0000 | |
| [TZ_TBASE] tee_secmem_size: 0x1740000 | |
| [TZ_TBASE] rpmb_size: 0x400000 | |
| [TZ_TBASE] sec_mem_arg.shared_secmem: 0x1 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_start: 0x9FDF7000 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_size: 0x8000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_start: 0x9FD07000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_size: 0xF0000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_start: 0x9FC87000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_size: 0x80000 | |
| [TZ_TBASE] teearg.magic: 0x434D4254 | |
| [TZ_TBASE] teearg.length: 0x0 | |
| [TZ_TBASE] teearg.dRamBase: 0x40000000 | |
| [TZ_TBASE] teearg.dRamSize: 0x80000000 | |
| [TZ_TBASE] teearg.secDRamBase: 0x9E8C0000 | |
| [TZ_TBASE] teearg.secDRamSize: 0xF00000 | |
| [TZ_TBASE] teearg.secIRamBase: 0x0 | |
| [TZ_TBASE] teearg.secIRamSize: 0x0 | |
| [TZ_TBASE] teearg.total_number_spi: 256 | |
| [TZ_TBASE] teearg.ssiq_number: 280 | |
| [TZ_INIT] ATF log buffer start : 0x9E880000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0x9E8BC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| [LIB] HW ENC | |
| [TZ_INIT] TEE RPMB Size : 0x400000 | |
| EMI MPUS=0x0; MPUT=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x46000000 | |
| [BLDR] <0x46000000>=0xEA000007 | |
| [BLDR] <0x46000004>=0xEA006225 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x1C000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x0 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xB69 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x1B680B69 | |
| [TZ_EMI_MPU] MPU [0x9E8C0000-0x9FFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0x9E8C0000, 0x9FFFFFFF (0) | |
| [TZ_INIT] ATF entry addr, dram addr: 0x101000, 0x44600000 | |
| [TZ_EMI_MPU] MPU [0x44600000-0x4463FFFF] | |
| [TZ_INIT] set secure memory protection : 0x44600000, 0x4463FFFF (1) | |
| [TZ_INIT] Jump to ATF, then 0x9E8C0000 and 0x46000000 | |
| [ATF](0)[0.000001]CPUxGPT reg(201) | |
| [ATF](0)[0.000399]IS_ABNORMAL_BOOT: 0 | |
| [ATF](0)[0.000829]gpio prot[0]: 0x0 | |
| [ATF](0)[0.001244]gpio prot[1]: 0x0 | |
| [ATF](0)[0.001660]gpio prot[2]: 0x0 | |
| [ATF](0)[0.002075]gpio prot | |
| [ATF](0)[10.128123]aee_wdt_dump: on cpu0 | |
| [ATF](0)[10.128549](0) pc:<0000000046002a32> lr:<0000000000000000> sp:<0000000000000000> pstate: 600001f3 | |
| [ATF](0)[10.129701](0) x29: 00000000460a5000 x28: 0000000000000000 x27: 0000000000000000 | |
| [ATF](0)[10.130670](0) x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000 | |
| [ATF](0)[10.131639](0) x23: 00000000460a5000 x22: 0000000000000000 x21: 00000000460a5000 | |
| [ATF](0)[10.132608](0) x20: 0000000000000000 x19: 000000004614cec0 x18: 0000000046002a33 | |
| [ATF](0)[10.133577](0) x17: 00000000460a6428 x16: 0000000046018838 x15: 0000000000000000 | |
| [ATF](0)[10.134547](0) x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 | |
| [ATF](0)[10.135516](0) x11: 0000000000000000 x10: 00000000000013f3 x09: 000000004615786c | |
| [ATF](0)[10.136485](0) x08: 0000000046020d2d x07: 0000000000000000 x06: 00000000460a6434 | |
| [ATF](0)[10.137454](0) x05: 000000004605d6ac x04: 000000004614cee0 x03: 0000000000000001 | |
| [ATF](0)[10.138423](0) x02: 000000004608eea8 x01: 000000000011df0c x00: 00000000600001d3 | |
| [ATF](0)[10.139392]Kernel WDT not ready. cpu0 | |
| [ATF](0)[10.139899]NULL sp, skip stack dump | |
| [ATF](0)[10.140383]Wait timeout. | |
| umc check: 0x10206540 = 0x80010000 | |
| Current RTC time:[2021/8/6 19:24:41] | |
| DATE_CODE_YY:0, DATE_CODE_MM:0, DATE_CODE_DD:10000 | |
| SegCode:86, CS, BK0:0x80010000 | |
| [PMIC_PRELOADER] Preloader Start.................. | |
| [PMIC_PRELOADER] MT6353 CHIP Code = 0x5310 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2AE]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x21A]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x218]=0xF7FF | |
| [PMIC_PRELOADER][pmic_status] Reg[0x212]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x214]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x8]=0x8000 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2A8]=0x204 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x250]=0xE6E | |
| [PMIC_PRELOADER]just_rst = 0 | |
| bat is exist. | |
| [PMIC_PRELOADER] turn off usbdl wo battery.................. | |
| [PMIC_PRELOADER][6353] is_efuse_trimed=0x1,[0xC5C]=0x8000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x0]=0x29E3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1]=0x3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x2]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x3]=0xBFA0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x4]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x5]=0x2000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x6]=0x1C20 | |
| [PMIC_PRELOADER][6353] efuse_data[0x7]=0x2 | |
| [PMIC_PRELOADER][6353] efuse_data[0x8]=0x220 | |
| [PMIC_PRELOADER][6353] efuse_data[0x9]=0x44 | |
| [PMIC_PRELOADER][6353] efuse_data[0xA]=0x6800 | |
| [PMIC_PRELOADER][6353] efuse_data[0xB]=0xEC64 | |
| [PMIC_PRELOADER][6353] efuse_data[0xC]=0x5B7 | |
| [PMIC_PRELOADER][6353] efuse_data[0xD]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xE]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xF]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x10]=0x4104 | |
| [PMIC_PRELOADER][6353] efuse_data[0x11]=0x10 | |
| [PMIC_PRELOADER][6353] efuse_data[0x12]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x13]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x14]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x15]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x16]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x17]=0xC41D | |
| [PMIC_PRELOADER][6353] efuse_data[0x18]=0xF1A9 | |
| [PMIC_PRELOADER][6353] efuse_data[0x19]=0x7DF8 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1A]=0xEC2F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1B]=0x1C1F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1C]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1D]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1E]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1F]=0x0 | |
| [PMIC_PRELOADER][pmic_init] Reg[0x2A8]=0x205 | |
| bat is exist. | |
| [fgauge_get_profile_id]: [fgauge_get_profile_id]Battery id (0) and id_volt = 1186742. | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=3 raw=1371 data=602 | |
| bat_temperature_volt: 602 | |
| TRes:8428 bat_temperature_volt: 296 | |
| preloader temperature is 296 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=1 raw=26509 data=4368 | |
| rt5081_is_hw_exist: preloader vendor id reg is 166 | |
| rt5081_is_hw_exist: Preloader rt5081 version 6 | |
| rt_charger_set_pre_vchg:preloader vchg = 2800 | |
| rt_charger_set_pre_ichg:preloader ichg = 250 | |
| rt_charger_set_ichg:ichg = 1200 | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| step B2 : Charging Host! | |
| rt_charger_set_aicr: aicr = 500 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=2 raw=1184 data=520 | |
| [pl_check_bat_protect_status]: check VBAT=4368 mV with 3200 mV, VCHR 4920 mV ,VCHR_HV=6500 start charging... | |
| [pl_check_bat_protect_status]: check VBAT=4368 mV with 3200 mV, stop charging... | |
| [PMIC_PRELOADER] [pmic_init] Done................... | |
| vproc/vsram run as hw default | |
| [PLFM] Init I2C: OK(0) | |
| [PLFM] Init PWRAP: OK(0) | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_code[326] | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20210805-162821 | |
| [DDR Reserve] ddr reserve mode not be enabled yet | |
| ==== Dump RGU Reg ======== | |
| RGU MODE: 5D | |
| RGU LENGTH: FFE0 | |
| RGU STA: A0000000 | |
| RGU INTERVAL: FFF | |
| RGU SWSYSRST: 8000 | |
| ==== Dump RGU Reg End ==== | |
| RGU: PMIC full rst: 0 | |
| RGU: g_rgu_satus:5 | |
| mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| PL RGU RST: ?? | |
| SW reset with bypass power key flag | |
| Find bypass powerkey flag | |
| mtk_wdt_mode_config mode value=15, tmp:22000015 | |
| RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(200F1), MTK_WDT_LATCH_CTL(30071) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x1C70 ! | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| before clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| [RTC] enable_dcxo first con = 0x486, osc32con = 0x7B00, sec = 0x2555 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3967 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] bbpu = 0xD, con = 0x486, osc32con = 0x7B00, sec = 0x2555, yea = 0xC035 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC] RTC_SPAR0=0x40 | |
| [RTC] rtc_2sec_reboot_check 0x2555 | |
| [RTC] rtc_2sec_stat_clear | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x2A01, spar0 = 0xC0, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x640D, new_spare1 = 0x5, new_spare2 = 0x1, new_spare3 = 0x8 | |
| [RTC] bbpu = 0xD, con = 0x486, cali = 0x2555, osc32_con =0x7B00 | |
| SW reset with bypass power key flag | |
| SW reset with bypass power key flag | |
| [PLFM] WDT reboot bypass power key! | |
| [RTC] rtc_bbpu_power_on done | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| Log Turned Off. | |
| [EMI] eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,3,14,33,90,E2,25,DD | |
| [Check]mt_get_mdl_number 0x1 | |
| [EMI] MDL number = 1 | |
| [EMI] emi_set eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,0,0,0,0,0,0,0 | |
| RGU rgu_dram_reserved:MTK_WDT_MODE(22000015) | |
| [MEM] complex R/W mem test pass | |
| [Dram_Buffer] g_dram_buf start addr: 0x44800000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x4489D9C0 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x4489DA00 | |
| RAM_CONSOLE using SRAM | |
| RAM_CONSOLE start: 0x11D000, size: 0x800, sig: 0x43474244 | |
| RAM_CONSOLE preloader last status: 0x0 0x0 0x0 | |
| RAM_CONSOLE wdt status (0x5)=0x5 | |
| [PLFM] Init Boot Device: OK(0) | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| [EFUSE] Start Check ... | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x1305 | |
| [PMIC_PRELOADER][AUXADC] ch=0 raw=26551 data=4375 | |
| [GPT_PL]Success to find valid GPT. | |
| [PLFM] Efuse status(80000000) | |
| Writing 20000000 to 1129030C, 4 bytes | |
| total_dram_size: 0x00000000C0000000, max_dram_size: 0xFFFFFFFFFFFFFFFF | |
| dump mblock info | |
| mblock[i] start=0000000040000000 size=0000000080000000 | |
| mblock[i] start=00000000C0000000 size=0000000040000000 | |
| [GPT_PL]Success to find valid GPT. | |
| PL_LOG_STORE:sram->sig value 0xABCD1234! | |
| PL_LOG_STORE:expdb partition start addr 0x88000, end addr 0xA88000, partition size 0xA00000, nr_sects 0x5000, blksz 0x200! | |
| PL_LOG_STORE:get uart flag= 0x0 | |
| PL_LOG_STORE:log_to_emmc function flag 0x27! | |
| PL_LOG_STORE:last pl log size 0x38B8, lk log size 0x4920! | |
| PL_LOG_STORE: /* write preloader/lk log addr 0x7FFC0020 size 0x81D8, offset 0x34A00*/ | |
| PL_LOG_STORE: /* write ATF log addr 0x9E880000 size 0x1000, offset 0x3CC00*/ | |
| mblock_reserve: 000000007FFC0000 - 0000000080000000 from mblock 0 | |
| PL_LOG_STORE:sram_header 0x11DF00,sig 0xABCD1234, sram_dram_buff 0x11DF0C, buf_addr 0x7FFC0000 | |
| [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00' | |
| [SEC] AES Legacy : 0 | |
| [SEC] SECCFG AC : 1 | |
| [LIB] Loading SEC config | |
| [LIB] Name = | |
| [LIB] Config = 0x0, 0x22 | |
| [LIB] SECRO (ac, ac_offset, ac_length) = (0x1, 0x40, 0x2BA0) | |
| 0x31,0x41,0x35,0x32 | |
| [SEC] DBGPORT 00000051 0000F0F0 00000101 0000F0F0 00000101 00000042 00000000 0000001A 00000000 | |
| [SEC] DBGPORT (1 1) | |
| [SEC] DBGPORT 00000051 0000F000 00011111 0000F000 00011111 00000000 00000053 00000012 0000001C | |
| [SEC] read '0x9000000' | |
| 0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0, | |
| [LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C' | |
| 0x4D4D4D4D | |
| [LIB] SEC CFG 'v4' exists | |
| [LIB] HW DEC | |
| GCPU Enhance,V1.2 | |
| [LIB] SEC CFG is valid. Lock state is 3 | |
| bldr_handshake, spar0(0x4030)=192 | |
| [BLDR] Tool connection is unlocked | |
| [platform_vusb_on] VUSB33 is on | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| [mt_charger_type_detection] Got data !!, 0, 1 | |
| [PLFM] USB cable in | |
| [TOOL] USB enum timeout (Yes), handshake timeout(Yes) | |
| [TOOL] Enumeration(Start) | |
| HS is detected | |
| [TOOL] Enumeration(End): OK 619ms | |
| usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0][TOOL] : usb listen timeout | |
| [TOOL] <USB> cannot detect tools! | |
| [TOOL] <UART> listen ended, receive size:0! | |
| [TOOL] <UART> wait sync time 150ms->5ms | |
| [TOOL] <UART> receieved data: () | |
| Device APC domain init setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Device APC domain after setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x2000051) | |
| Domain Setup (0x660) | |
| mblock_reserve: 0000000044600000 - 0000000044640000 from mblock 0 | |
| (B)tz_dapc_sec_init is 0x0 | |
| (E)tz_dapc_sec_init is 0x0 | |
| [AB] Current boot: Preloader_b | |
| [AB] ab_suffix: _b, ab_retry: 0 | |
| [AB] boot_success is 1! | |
| part name=lk_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: lk, addr: 0xFFFFFFFF, mode: -1, size:0xA20C4 | |
| part: lk_b img: lk cert vfy(0 ms) | |
| [PART] load "lk_b" from 0x00000000D6500200 (dev) to 0x46000000 (mem) [SUCCESS] | |
| [PART] load speed: 10625KB/s, 663748 bytes, 61ms | |
| part: lk_b img: lk vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: atf, addr: 0xFFFFFFFF, mode: 0, size:0x12A00 | |
| part: tee_b img: atf cert vfy(0 ms) | |
| [PART] load "tee_b" from 0x00000000D7E00200 (dev) to 0x1005C0 (mem) [SUCCESS] | |
| [PART] load speed: 8277KB/s, 76288 bytes, 9ms | |
| part: tee_b img: atf vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: tee, addr: 0x1740240, mode: 0, size:0x5A400 | |
| part: tee_b img: tee cert vfy(0 ms) | |
| mblock_reserve: 000000009E880000 - 00000000A0000000 from mblock 2 | |
| [TZ_INIT] atf_log_buf_start: 0x9E880000, tee_secmem_start: 0x9E8C0000 | |
| [PART] load "tee_b" from 0x00000000D7E13C70 (dev) to 0x9E8BFDC0 (mem) [SUCCESS] | |
| [PART] load speed: 10027KB/s, 369664 bytes, 36ms | |
| part: tee_b img: tee vfy(0 ms) | |
| [TZ_INIT] TEE start entry : 0x9E8C0000 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x1005C0 | |
| [PICACHU] scenario#3: enable bit is not set. Skip it. | |
| bat is exist. | |
| mblock_reserve: 0000000044400000 - 0000000044410000 from mblock 0 | |
| mblock_reserve: 0000000044410000 - 00000000444F0000 from mblock 1 | |
| mblock_reserve: 00000000444F0000 - 0000000044500000 from mblock 1 | |
| [PLFM] boot to LK by ATAG. | |
| DTB Addr: 0x0 | |
| DTB Size: 0x0 | |
| RAM_CONSOLE detect abnormal boot wdt_status:0x5 RAM_CONSOLE offset:0xEC0 | |
| RAM_CONSOLE sram_plat_dbg_info_addr:0x11D800, sram_plat_dbg_info_size:0x400, sram_log_store_addr:0x11DF00, sram_log_store_size:0x100 | |
| RAM_CONSOLE mrdump_addr:0x11E000, mrdump_size:0x2000, dram_addr:0x44400000, dram_size:0x10000 | |
| RAM_CONSOLE pstore_addr:0x44410000, pstore_size:0xE0000, pstore_console_size:0x40000, pstore_pmsg_size:0x10000 | |
| RAM_CONSOLE mrdump_mini_header_addr:0x444F0000, mrdump_mini_header_size:0x10000, magic1:0x61646472, magic2:0x73697A65 | |
| memory_type = 0x203 memory_vendor = 0x1 | |
| bat_id_volt = 1186742 | |
| BOOT_REASON: 4 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285220864 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 0 | |
| MEM_SIZE: 0x231080 | |
| MEM_SIZE: 0x231080 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| BOOT_TIME: 4854 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| PART_NUM: 3 | |
| PART_INFO: 0x44876684 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 38146 | |
| DRAM_BUF: 907904 | |
| SRAM satrt: 0x11C000 | |
| SRAM size: 0x4000 | |
| is abnormal boot: 1 | |
| ram_console info sram_addr: 0x11D000 | |
| ram_console info sram_size: 0x800 | |
| ram_console info def_type: 0x1 | |
| ram_console memory_info_offset: 0xEC0 | |
| pl gpio prot[0]: 0x0 | |
| pl gpio prot[1]: 0x0 | |
| pl gpio prot[2]: 0x0 | |
| pl gpio prot[3]: 0x0 | |
| pl gpio prot[4]: 0x0 | |
| pl gpio prot[5]: 0x0 | |
| pl gpio prot[6]: 0x0 | |
| devinfo data index out of range:22 | |
| devinfo data size:22 | |
| devinfo ver: V1.0.1 | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [LIB] HW ENC | |
| [TZ_TBASE] sec_mem_arg.magic: 0x3C562817 | |
| [TZ_TBASE] sec_mem_arg.version: 0x10000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_start: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_end: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_start: 0x9FE00000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_size: 0x200000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_start: 0x9FDFF000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_size: 0x1000 | |
| [TZ_TBASE] sec_mem_arg.secmem_obfuscation: 0x1 | |
| [TZ_TBASE] tee_entry_addr: 0x9E8C0000 | |
| [TZ_TBASE] tee_secmem_size: 0x1740000 | |
| [TZ_TBASE] rpmb_size: 0x400000 | |
| [TZ_TBASE] sec_mem_arg.shared_secmem: 0x1 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_start: 0x9FDF7000 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_size: 0x8000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_start: 0x9FD07000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_size: 0xF0000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_start: 0x9FC87000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_size: 0x80000 | |
| [TZ_TBASE] teearg.magic: 0x434D4254 | |
| [TZ_TBASE] teearg.length: 0x0 | |
| [TZ_TBASE] teearg.dRamBase: 0x40000000 | |
| [TZ_TBASE] teearg.dRamSize: 0x80000000 | |
| [TZ_TBASE] teearg.secDRamBase: 0x9E8C0000 | |
| [TZ_TBASE] teearg.secDRamSize: 0xF00000 | |
| [TZ_TBASE] teearg.secIRamBase: 0x0 | |
| [TZ_TBASE] teearg.secIRamSize: 0x0 | |
| [TZ_TBASE] teearg.total_number_spi: 256 | |
| [TZ_TBASE] teearg.ssiq_number: 280 | |
| [TZ_INIT] ATF log buffer start : 0x9E880000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0x9E8BC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| [LIB] HW ENC | |
| [TZ_INIT] TEE RPMB Size : 0x400000 | |
| EMI MPUS=0x0; MPUT=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x46000000 | |
| [BLDR] <0x46000000>=0xEA000007 | |
| [BLDR] <0x46000004>=0xEA006225 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x1C000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x0 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xB69 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x1B680B69 | |
| [TZ_EMI_MPU] MPU [0x9E8C0000-0x9FFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0x9E8C0000, 0x9FFFFFFF (0) | |
| [TZ_INIT] ATF entry addr, dram addr: 0x101000, 0x44600000 | |
| [TZ_EMI_MPU] MPU [0x44600000-0x4463FFFF] | |
| [TZ_INIT] set secure memory protection : 0x44600000, 0x4463FFFF (1) | |
| [TZ_INIT] Jump to ATF, then 0x9E8C0000 and 0x46000000 | |
| [ATF](0)[0.000001]CPUxGPT reg(201) | |
| [ATF](0)[0.000399]IS_ABNORMAL_BOOT: 1 | |
| [ATF](0)[0.000828]gpio prot[0]: 0x0 | |
| [ATF](0)[0.001243]gpio prot[1]: 0x0 | |
| [ATF](0)[0.001659]gpio prot[2]: 0x0 | |
| [ATF](0)[0.002075]gpio prot[3]: 0x0 | |
| [ATF](0)[0.002491]gpio prot[4]: 0x0 | |
| [ATF](0)[0.002907]gpio prot[5]: 0x0 | |
| [ATF](0)[0.003322]gpio prot[6]: 0x0 | |
| INFO: 0 protection pin, 0, 0, 0, 0, 0 under protected | |
| [ATF](0)[0.004364]BL33 boot argument location=0x448dda40 | |
| [ATF](0)[0.005052]BL33 boot argument size=0x5920 | |
| [ATF](0)[0.005635]BL33 start addr=0x46000000 | |
| [ATF](0)[0.006169]teearg addr=0x100000 | |
| [ATF](0)[0.006632]atf_magic=0x4d415446 | |
| [ATF](0)[0.007094]tee_support=0x1 | |
| [ATF](0)[0.007495]tee_entry=0x9e8c0000 | |
| [ATF](0)[0 | |
| [ATF](0)[10.129078]aee_wdt_dump: on cpu0 | |
| [ATF](0)[10.129503](0) pc:<0000000046002a32> lr:<0000000000000000> sp:<0000000000000000> pstate: 600001f3 | |
| [ATF](0)[10.130655](0) x29: 00000000460a5000 x28: 0000000000000000 x27: 0000000000000000 | |
| [ATF](0)[10.131624](0) x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000 | |
| [ATF](0)[10.132593](0) x23: 00000000460a5000 x22: 0000000000000000 x21: 00000000460a5000 | |
| [ATF](0)[10.133563](0) x20: 0000000000000000 x19: 000000004614cec0 x18: 0000000046002a33 | |
| [ATF](0)[10.134532](0) x17: 00000000460a6428 x16: 0000000046018838 x15: 0000000000000000 | |
| [ATF](0)[10.135501](0) x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 | |
| [ATF](0)[10.136470](0) x11: 0000000000000000 x10: 0000000000001415 x09: 000000004615786c | |
| [ATF](0)[10.137440](0) x08: 0000000046020d2d x07: 0000000000000000 x06: 00000000460a6434 | |
| [ATF](0)[10.138409](0) x05: 000000004605d6ac x04: 000000004614cee0 x03: 0000000000000001 | |
| [ATF](0)[10.139378](0) x02: 000000004608eea8 x01: 000000000011df0c x00: 00000000600001d3 | |
| [ATF](0)[10.140347]Kernel WDT not ready. cpu0 | |
| [ATF](0)[10.140853]NULL sp, skip stack dump | |
| [ATF](0)[10.141338]Wait timeout. | |
| umc check: 0x10206540 = 0x80010000 | |
| Current RTC time:[2021/8/6 19:25:6] | |
| DATE_CODE_YY:0, DATE_CODE_MM:0, DATE_CODE_DD:10000 | |
| SegCode:86, CS, BK0:0x80010000 | |
| [PMIC_PRELOADER] Preloader Start.................. | |
| [PMIC_PRELOADER] MT6353 CHIP Code = 0x5310 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2AE]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x21A]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x218]=0xF7FF | |
| [PMIC_PRELOADER][pmic_status] Reg[0x212]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x214]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x8]=0x8000 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2A8]=0x204 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x250]=0xE6E | |
| [PMIC_PRELOADER]just_rst = 0 | |
| bat is exist. | |
| [PMIC_PRELOADER] turn off usbdl wo battery.................. | |
| [PMIC_PRELOADER][6353] is_efuse_trimed=0x1,[0xC5C]=0x8000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x0]=0x29E3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1]=0x3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x2]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x3]=0xBFA0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x4]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x5]=0x2000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x6]=0x1C20 | |
| [PMIC_PRELOADER][6353] efuse_data[0x7]=0x2 | |
| [PMIC_PRELOADER][6353] efuse_data[0x8]=0x220 | |
| [PMIC_PRELOADER][6353] efuse_data[0x9]=0x44 | |
| [PMIC_PRELOADER][6353] efuse_data[0xA]=0x6800 | |
| [PMIC_PRELOADER][6353] efuse_data[0xB]=0xEC64 | |
| [PMIC_PRELOADER][6353] efuse_data[0xC]=0x5B7 | |
| [PMIC_PRELOADER][6353] efuse_data[0xD]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xE]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xF]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x10]=0x4104 | |
| [PMIC_PRELOADER][6353] efuse_data[0x11]=0x10 | |
| [PMIC_PRELOADER][6353] efuse_data[0x12]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x13]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x14]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x15]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x16]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x17]=0xC41D | |
| [PMIC_PRELOADER][6353] efuse_data[0x18]=0xF1A9 | |
| [PMIC_PRELOADER][6353] efuse_data[0x19]=0x7DF8 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1A]=0xEC2F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1B]=0x1C1F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1C]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1D]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1E]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1F]=0x0 | |
| [PMIC_PRELOADER][pmic_init] Reg[0x2A8]=0x205 | |
| bat is exist. | |
| [fgauge_get_profile_id]: [fgauge_get_profile_id]Battery id (0) and id_volt = 1186815. | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=3 raw=1369 data=601 | |
| bat_temperature_volt: 601 | |
| TRes:8414 bat_temperature_volt: 296 | |
| preloader temperature is 296 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=1 raw=26533 data=4372 | |
| rt5081_is_hw_exist: preloader vendor id reg is 166 | |
| rt5081_is_hw_exist: Preloader rt5081 version 6 | |
| rt_charger_set_pre_vchg:preloader vchg = 2800 | |
| rt_charger_set_pre_ichg:preloader ichg = 250 | |
| rt_charger_set_ichg:ichg = 1200 | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| step B2 : Charging Host! | |
| rt_charger_set_aicr: aicr = 500 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=2 raw=1184 data=520 | |
| [pl_check_bat_protect_status]: check VBAT=4372 mV with 3200 mV, VCHR 4920 mV ,VCHR_HV=6500 start charging... | |
| [pl_check_bat_protect_status]: check VBAT=4372 mV with 3200 mV, stop charging... | |
| [PMIC_PRELOADER] [pmic_init] Done................... | |
| vproc/vsram run as hw default | |
| [PLFM] Init I2C: OK(0) | |
| [PLFM] Init PWRAP: OK(0) | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_code[326] | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20210805-162821 | |
| [DDR Reserve] ddr reserve mode not be enabled yet | |
| ==== Dump RGU Reg ======== | |
| RGU MODE: 5D | |
| RGU LENGTH: FFE0 | |
| RGU STA: A0000000 | |
| RGU INTERVAL: FFF | |
| RGU SWSYSRST: 8000 | |
| ==== Dump RGU Reg End ==== | |
| RGU: PMIC full rst: 0 | |
| RGU: g_rgu_satus:5 | |
| mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| PL RGU RST: ?? | |
| SW reset with bypass power key flag | |
| Find bypass powerkey flag | |
| mtk_wdt_mode_config mode value=15, tmp:22000015 | |
| RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(200F1), MTK_WDT_LATCH_CTL(30071) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x1C70 ! | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| before clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| [RTC] enable_dcxo first con = 0x486, osc32con = 0x7B00, sec = 0x2555 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3967 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] bbpu = 0xD, con = 0x486, osc32con = 0x7B00, sec = 0x2555, yea = 0xC035 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC] RTC_SPAR0=0x40 | |
| [RTC] rtc_2sec_reboot_check 0x2555 | |
| [RTC] rtc_2sec_stat_clear | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x2A01, spar0 = 0xC0, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x640D, new_spare1 = 0x5, new_spare2 = 0x1, new_spare3 = 0x8 | |
| [RTC] bbpu = 0xD, con = 0x486, cali = 0x2555, osc32_con =0x7B00 | |
| SW reset with bypass power key flag | |
| SW reset with bypass power key flag | |
| [PLFM] WDT reboot bypass power key! | |
| [RTC] rtc_bbpu_power_on done | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| Log Turned Off. | |
| [EMI] eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,3,14,33,90,E2,25,DD | |
| [Check]mt_get_mdl_number 0x1 | |
| [EMI] MDL number = 1 | |
| [EMI] emi_set eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,0,0,0,0,0,0,0 | |
| RGU rgu_dram_reserved:MTK_WDT_MODE(22000015) | |
| [MEM] complex R/W mem test pass | |
| [Dram_Buffer] g_dram_buf start addr: 0x44800000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x4489D9C0 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x4489DA00 | |
| RAM_CONSOLE using SRAM | |
| RAM_CONSOLE start: 0x11D000, size: 0x800, sig: 0x43474244 | |
| RAM_CONSOLE preloader last status: 0x0 0x0 0x0 | |
| RAM_CONSOLE wdt status (0x5)=0x5 | |
| [PLFM] Init Boot Device: OK(0) | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| [EFUSE] Start Check ... | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x1305 | |
| [PMIC_PRELOADER][AUXADC] ch=0 raw=26566 data=4377 | |
| [GPT_PL]Success to find valid GPT. | |
| [PLFM] Efuse status(80000000) | |
| Writing 20000000 to 1129030C, 4 bytes | |
| total_dram_size: 0x00000000C0000000, max_dram_size: 0xFFFFFFFFFFFFFFFF | |
| dump mblock info | |
| mblock[i] start=0000000040000000 size=0000000080000000 | |
| mblock[i] start=00000000C0000000 size=0000000040000000 | |
| [GPT_PL]Success to find valid GPT. | |
| PL_LOG_STORE:sram->sig value 0xABCD1234! | |
| PL_LOG_STORE:expdb partition start addr 0x88000, end addr 0xA88000, partition size 0xA00000, nr_sects 0x5000, blksz 0x200! | |
| PL_LOG_STORE:get uart flag= 0x0 | |
| PL_LOG_STORE:log_to_emmc function flag 0x27! | |
| PL_LOG_STORE:last pl log size 0x38B0, lk log size 0x4928! | |
| PL_LOG_STORE: /* write preloader/lk log addr 0x7FFC0020 size 0x81D8, offset 0x3DC00*/ | |
| PL_LOG_STORE: /* write ATF log addr 0x9E880000 size 0x1000, offset 0x45E00*/ | |
| mblock_reserve: 000000007FFC0000 - 0000000080000000 from mblock 0 | |
| PL_LOG_STORE:sram_header 0x11DF00,sig 0xABCD1234, sram_dram_buff 0x11DF0C, buf_addr 0x7FFC0000 | |
| [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00' | |
| [SEC] AES Legacy : 0 | |
| [SEC] SECCFG AC : 1 | |
| [LIB] Loading SEC config | |
| [LIB] Name = | |
| [LIB] Config = 0x0, 0x22 | |
| [LIB] SECRO (ac, ac_offset, ac_length) = (0x1, 0x40, 0x2BA0) | |
| 0x31,0x41,0x35,0x32 | |
| [SEC] DBGPORT 00000051 0000F0F0 00000101 0000F0F0 00000101 00000042 00000000 0000001A 00000000 | |
| [SEC] DBGPORT (1 1) | |
| [SEC] DBGPORT 00000051 0000F000 00011111 0000F000 00011111 00000000 00000053 00000012 0000001C | |
| [SEC] read '0x9000000' | |
| 0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0, | |
| [LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C' | |
| 0x4D4D4D4D | |
| [LIB] SEC CFG 'v4' exists | |
| [LIB] HW DEC | |
| GCPU Enhance,V1.2 | |
| [LIB] SEC CFG is valid. Lock state is 3 | |
| bldr_handshake, spar0(0x4030)=192 | |
| [BLDR] Tool connection is unlocked | |
| [platform_vusb_on] VUSB33 is on | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| [mt_charger_type_detection] Got data !!, 0, 1 | |
| [PLFM] USB cable in | |
| [TOOL] USB enum timeout (Yes), handshake timeout(Yes) | |
| [TOOL] Enumeration(Start) | |
| HS is detected | |
| [TOOL] Enumeration(End): OK 617ms | |
| usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0][TOOL] : usb listen timeout | |
| [TOOL] <USB> cannot detect tools! | |
| [TOOL] <UART> listen ended, receive size:0! | |
| [TOOL] <UART> wait sync time 150ms->5ms | |
| [TOOL] <UART> receieved data: () | |
| Device APC domain init setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Device APC domain after setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x2000051) | |
| Domain Setup (0x660) | |
| mblock_reserve: 0000000044600000 - 0000000044640000 from mblock 0 | |
| (B)tz_dapc_sec_init is 0x0 | |
| (E)tz_dapc_sec_init is 0x0 | |
| [AB] Current boot: Preloader_b | |
| [AB] ab_suffix: _b, ab_retry: 0 | |
| [AB] boot_success is 1! | |
| part name=lk_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: lk, addr: 0xFFFFFFFF, mode: -1, size:0xA20C4 | |
| part: lk_b img: lk cert vfy(0 ms) | |
| [PART] load "lk_b" from 0x00000000D6500200 (dev) to 0x46000000 (mem) [SUCCESS] | |
| [PART] load speed: 10625KB/s, 663748 bytes, 61ms | |
| part: lk_b img: lk vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: atf, addr: 0xFFFFFFFF, mode: 0, size:0x12A00 | |
| part: tee_b img: atf cert vfy(0 ms) | |
| [PART] load "tee_b" from 0x00000000D7E00200 (dev) to 0x1005C0 (mem) [SUCCESS] | |
| [PART] load speed: 8277KB/s, 76288 bytes, 9ms | |
| part: tee_b img: atf vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: tee, addr: 0x1740240, mode: 0, size:0x5A400 | |
| part: tee_b img: tee cert vfy(0 ms) | |
| mblock_reserve: 000000009E880000 - 00000000A0000000 from mblock 2 | |
| [TZ_INIT] atf_log_buf_start: 0x9E880000, tee_secmem_start: 0x9E8C0000 | |
| [PART] load "tee_b" from 0x00000000D7E13C70 (dev) to 0x9E8BFDC0 (mem) [SUCCESS] | |
| [PART] load speed: 10027KB/s, 369664 bytes, 36ms | |
| part: tee_b img: tee vfy(0 ms) | |
| [TZ_INIT] TEE start entry : 0x9E8C0000 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x1005C0 | |
| [PICACHU] scenario#3: enable bit is not set. Skip it. | |
| bat is exist. | |
| mblock_reserve: 0000000044400000 - 0000000044410000 from mblock 0 | |
| mblock_reserve: 0000000044410000 - 00000000444F0000 from mblock 1 | |
| mblock_reserve: 00000000444F0000 - 0000000044500000 from mblock 1 | |
| [PLFM] boot to LK by ATAG. | |
| DTB Addr: 0x0 | |
| DTB Size: 0x0 | |
| RAM_CONSOLE detect abnormal boot wdt_status:0x5 RAM_CONSOLE offset:0xEC0 | |
| RAM_CONSOLE sram_plat_dbg_info_addr:0x11D800, sram_plat_dbg_info_size:0x400, sram_log_store_addr:0x11DF00, sram_log_store_size:0x100 | |
| RAM_CONSOLE mrdump_addr:0x11E000, mrdump_size:0x2000, dram_addr:0x44400000, dram_size:0x10000 | |
| RAM_CONSOLE pstore_addr:0x44410000, pstore_size:0xE0000, pstore_console_size:0x40000, pstore_pmsg_size:0x10000 | |
| RAM_CONSOLE mrdump_mini_header_addr:0x444F0000, mrdump_mini_header_size:0x10000, magic1:0x61646472, magic2:0x73697A65 | |
| memory_type = 0x203 memory_vendor = 0x1 | |
| bat_id_volt = 1186815 | |
| BOOT_REASON: 4 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285220864 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 0 | |
| MEM_SIZE: 0x231080 | |
| MEM_SIZE: 0x231080 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| BOOT_TIME: 4853 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| PART_NUM: 3 | |
| PART_INFO: 0x44876684 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 38146 | |
| DRAM_BUF: 907904 | |
| SRAM satrt: 0x11C000 | |
| SRAM size: 0x4000 | |
| is abnormal boot: 1 | |
| ram_console info sram_addr: 0x11D000 | |
| ram_console info sram_size: 0x800 | |
| ram_console info def_type: 0x1 | |
| ram_console memory_info_offset: 0xEC0 | |
| pl gpio prot[0]: 0x0 | |
| pl gpio prot[1]: 0x0 | |
| pl gpio prot[2]: 0x0 | |
| pl gpio prot[3]: 0x0 | |
| pl gpio prot[4]: 0x0 | |
| pl gpio prot[5]: 0x0 | |
| pl gpio prot[6]: 0x0 | |
| devinfo data index out of range:22 | |
| devinfo data size:22 | |
| devinfo ver: V1.0.1 | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [LIB] HW ENC | |
| [TZ_TBASE] sec_mem_arg.magic: 0x3C562817 | |
| [TZ_TBASE] sec_mem_arg.version: 0x10000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_start: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_end: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_start: 0x9FE00000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_size: 0x200000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_start: 0x9FDFF000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_size: 0x1000 | |
| [TZ_TBASE] sec_mem_arg.secmem_obfuscation: 0x1 | |
| [TZ_TBASE] tee_entry_addr: 0x9E8C0000 | |
| [TZ_TBASE] tee_secmem_size: 0x1740000 | |
| [TZ_TBASE] rpmb_size: 0x400000 | |
| [TZ_TBASE] sec_mem_arg.shared_secmem: 0x1 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_start: 0x9FDF7000 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_size: 0x8000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_start: 0x9FD07000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_size: 0xF0000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_start: 0x9FC87000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_size: 0x80000 | |
| [TZ_TBASE] teearg.magic: 0x434D4254 | |
| [TZ_TBASE] teearg.length: 0x0 | |
| [TZ_TBASE] teearg.dRamBase: 0x40000000 | |
| [TZ_TBASE] teearg.dRamSize: 0x80000000 | |
| [TZ_TBASE] teearg.secDRamBase: 0x9E8C0000 | |
| [TZ_TBASE] teearg.secDRamSize: 0xF00000 | |
| [TZ_TBASE] teearg.secIRamBase: 0x0 | |
| [TZ_TBASE] teearg.secIRamSize: 0x0 | |
| [TZ_TBASE] teearg.total_number_spi: 256 | |
| [TZ_TBASE] teearg.ssiq_number: 280 | |
| [TZ_INIT] ATF log buffer start : 0x9E880000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0x9E8BC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| [LIB] HW ENC | |
| [TZ_INIT] TEE RPMB Size : 0x400000 | |
| EMI MPUS=0x0; MPUT=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x46000000 | |
| [BLDR] <0x46000000>=0xEA000007 | |
| [BLDR] <0x46000004>=0xEA006225 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x1C000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x0 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xB69 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x1B680B69 | |
| [TZ_EMI_MPU] MPU [0x9E8C0000-0x9FFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0x9E8C0000, 0x9FFFFFFF (0) | |
| [TZ_INIT] ATF entry addr, dram addr: 0x101000, 0x44600000 | |
| [TZ_EMI_MPU] MPU [0x44600000-0x4463FFFF] | |
| [TZ_INIT] set secure memory protection : 0x44600000, 0x4463FFFF (1) | |
| [TZ_INIT] Jump to ATF, then 0x9E8C0000 and 0x46000000 | |
| [ATF](0)[0.000001]CPUxGPT reg(201) | |
| [ATF](0)[0.000399]IS_ABNORMAL_BOOT: 1 | |
| [ATF](0)[0.000829]gpio prot[0]: 0x0 | |
| [ATF](0)[0.001243]gpio prot[1]: 0x0 | |
| [ATF](0)[0.001658]gpio prot[2]: 0x0 | |
| [ATF](0)[0.002075]gpio prot[3]: 0x0 | |
| [ATF](0)[10.129019]aee_wdt_dump: on cpu0 | |
| [ATF](0)[10.129445](0) pc:<0000000046002a32> lr:<0000000000000000> sp:<0000000000000000> pstate: 600001f3 | |
| [ATF](0)[10.130596](0) x29: 00000000460a5000 x28: 0000000000000000 x27: 0000000000000000 | |
| [ATF](0)[10.131565](0) x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000 | |
| [ATF](0)[10.132535](0) x23: 00000000460a5000 x22: 0000000000000000 x21: 00000000460a5000 | |
| [ATF](0)[10.133504](0) x20: 0000000000000000 x19: 000000004614cec0 x18: 0000000046002a33 | |
| [ATF](0)[10.134473](0) x17: 00000000460a6428 x16: 0000000046018838 x15: 0000000000000000 | |
| [ATF](0)[10.135442](0) x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 | |
| [ATF](0)[10.136412](0) x11: 0000000000000000 x10: 0000000000001414 x09: 000000004615786c | |
| [ATF](0)[10.137381](0) x08: 0000000046020d2d x07: 0000000000000000 x06: 00000000460a6434 | |
| [ATF](0)[10.138350](0) x05: 000000004605d6ac x04: 000000004614cee0 x03: 0000000000000001 | |
| [ATF](0)[10.139319](0) x02: 000000004608eea8 x01: 000000000011df0c x00: 00000000600001d3 | |
| [ATF](0)[10.140288]Kernel WDT not ready. cpu0 | |
| [ATF](0)[10.140795]NULL sp, skip stack dump | |
| [ATF](0)[10.141279]Wait timeout. | |
| umc check: 0x10206540 = 0x80010000 | |
| Current RTC time:[2021/8/6 19:25:32] | |
| DATE_CODE_YY:0, DATE_CODE_MM:0, DATE_CODE_DD:10000 | |
| SegCode:86, CS, BK0:0x80010000 | |
| [PMIC_PRELOADER] Preloader Start.................. | |
| [PMIC_PRELOADER] MT6353 CHIP Code = 0x5310 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2AE]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x21A]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x218]=0xF7FF | |
| [PMIC_PRELOADER][pmic_status] Reg[0x212]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x214]=0x0 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x8]=0x8000 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x2A8]=0x204 | |
| [PMIC_PRELOADER][pmic_status] Reg[0x250]=0xE6E | |
| [PMIC_PRELOADER]just_rst = 0 | |
| bat is exist. | |
| [PMIC_PRELOADER] turn off usbdl wo battery.................. | |
| [PMIC_PRELOADER][6353] is_efuse_trimed=0x1,[0xC5C]=0x8000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x0]=0x29E3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1]=0x3 | |
| [PMIC_PRELOADER][6353] efuse_data[0x2]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x3]=0xBFA0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x4]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x5]=0x2000 | |
| [PMIC_PRELOADER][6353] efuse_data[0x6]=0x1C20 | |
| [PMIC_PRELOADER][6353] efuse_data[0x7]=0x2 | |
| [PMIC_PRELOADER][6353] efuse_data[0x8]=0x220 | |
| [PMIC_PRELOADER][6353] efuse_data[0x9]=0x44 | |
| [PMIC_PRELOADER][6353] efuse_data[0xA]=0x6800 | |
| [PMIC_PRELOADER][6353] efuse_data[0xB]=0xEC64 | |
| [PMIC_PRELOADER][6353] efuse_data[0xC]=0x5B7 | |
| [PMIC_PRELOADER][6353] efuse_data[0xD]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xE]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0xF]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x10]=0x4104 | |
| [PMIC_PRELOADER][6353] efuse_data[0x11]=0x10 | |
| [PMIC_PRELOADER][6353] efuse_data[0x12]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x13]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x14]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x15]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x16]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x17]=0xC41D | |
| [PMIC_PRELOADER][6353] efuse_data[0x18]=0xF1A9 | |
| [PMIC_PRELOADER][6353] efuse_data[0x19]=0x7DF8 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1A]=0xEC2F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1B]=0x1C1F | |
| [PMIC_PRELOADER][6353] efuse_data[0x1C]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1D]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1E]=0x0 | |
| [PMIC_PRELOADER][6353] efuse_data[0x1F]=0x0 | |
| [PMIC_PRELOADER][pmic_init] Reg[0x2A8]=0x205 | |
| bat is exist. | |
| [fgauge_get_profile_id]: [fgauge_get_profile_id]Battery id (0) and id_volt = 1186742. | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=3 raw=1368 data=601 | |
| bat_temperature_volt: 601 | |
| TRes:8414 bat_temperature_volt: 296 | |
| preloader temperature is 296 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=1 raw=26557 data=4376 | |
| rt5081_is_hw_exist: preloader vendor id reg is 166 | |
| rt5081_is_hw_exist: Preloader rt5081 version 6 | |
| rt_charger_set_pre_vchg:preloader vchg = 2800 | |
| rt_charger_set_pre_ichg:preloader ichg = 250 | |
| rt_charger_set_ichg:ichg = 1200 | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| step B2 : Charging Host! | |
| rt_charger_set_aicr: aicr = 500 | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x205 | |
| [PMIC_PRELOADER][AUXADC] ch=2 raw=1184 data=520 | |
| [pl_check_bat_protect_status]: check VBAT=4376 mV with 3200 mV, VCHR 4920 mV ,VCHR_HV=6500 start charging... | |
| [pl_check_bat_protect_status]: check VBAT=4376 mV with 3200 mV, stop charging... | |
| [PMIC_PRELOADER] [pmic_init] Done................... | |
| vproc/vsram run as hw default | |
| [PLFM] Init I2C: OK(0) | |
| [PLFM] Init PWRAP: OK(0) | |
| [PLFM] Init PMIC: OK(0) | |
| [PLFM] chip_code[326] | |
| [PLFM] chip_ver[1] | |
| [BLDR] Build Time: 20210805-162821 | |
| [DDR Reserve] ddr reserve mode not be enabled yet | |
| ==== Dump RGU Reg ======== | |
| RGU MODE: 5D | |
| RGU LENGTH: FFE0 | |
| RGU STA: A0000000 | |
| RGU INTERVAL: FFF | |
| RGU SWSYSRST: 8000 | |
| ==== Dump RGU Reg End ==== | |
| RGU: PMIC full rst: 0 | |
| RGU: g_rgu_satus:5 | |
| mtk_wdt_mode_config mode value=10, tmp:22000010 | |
| PL RGU RST: ?? | |
| SW reset with bypass power key flag | |
| Find bypass powerkey flag | |
| mtk_wdt_mode_config mode value=15, tmp:22000015 | |
| RGU mtk_wdt_init:MTK_WDT_DEBUG_CTL(200F1), MTK_WDT_LATCH_CTL(30071) | |
| Enter mtk_kpd_gpio_set! | |
| after set KP enable: KP_SEL = 0x1C70 ! | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| clkbuf is from RF, DCXO_CW16=0x2380 | |
| before clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| clk_buf_enable_clkbuf4: 0x10221100 = 0x1855557 | |
| [RTC] enable_dcxo first con = 0x486, osc32con = 0x7B00, sec = 0x2555 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=3968 | |
| [RTC] get_frequency_meter: input=0x0, ouput=5 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] get_frequency_meter: input=0x0, ouput=0 | |
| [RTC] rtc_boot_check1 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] bbpu = 0xD, con = 0x486, osc32con = 0x7B00, sec = 0x2555, yea = 0xC035 | |
| [RTC] rtc_boot_check2 powerkey1 = 0xA357, powerkey2 = 0x67D2 | |
| [RTC] rtc_boot_check Writeif_unlock | |
| [RTC] RTC_SPAR0=0x40 | |
| [RTC] rtc_2sec_reboot_check 0x2555 | |
| [RTC] rtc_2sec_stat_clear | |
| [RTC] rtc_lpd_init RTC_CON=0x486 | |
| [RTC] irqsta = 0x0, pdn1 = 0x0, pdn2 = 0x2A01, spar0 = 0xC0, spar1 = 0x800 | |
| [RTC] new_spare0 = 0x640D, new_spare1 = 0x5, new_spare2 = 0x1, new_spare3 = 0x8 | |
| [RTC] bbpu = 0xD, con = 0x486, cali = 0x2555, osc32_con =0x7B00 | |
| SW reset with bypass power key flag | |
| SW reset with bypass power key flag | |
| [PLFM] WDT reboot bypass power key! | |
| [RTC] rtc_bbpu_power_on done | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| Log Turned Off. | |
| [EMI] eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,3,14,33,90,E2,25,DD | |
| [Check]mt_get_mdl_number 0x1 | |
| [EMI] MDL number = 1 | |
| [EMI] emi_set eMMC/NAND ID = 15,1,0,47,58,36,42,4D,42,0,0,0,0,0,0,0 | |
| RGU rgu_dram_reserved:MTK_WDT_MODE(22000015) | |
| [MEM] complex R/W mem test pass | |
| [Dram_Buffer] g_dram_buf start addr: 0x44800000 | |
| [Dram_Buffer] g_dram_buf->msdc_gpd_pool start addr: 0x4489D9C0 | |
| [Dram_Buffer] g_dram_buf->msdc_bd_pool start addr: 0x4489DA00 | |
| RAM_CONSOLE using SRAM | |
| RAM_CONSOLE start: 0x11D000, size: 0x800, sig: 0x43474244 | |
| RAM_CONSOLE preloader last status: 0x0 0x0 0x0 | |
| RAM_CONSOLE wdt status (0x5)=0x5 | |
| [PLFM] Init Boot Device: OK(0) | |
| Enter mtk_kpd_gpio_set! | |
| mtk detect key function pmic_detect_homekey MTK_PMIC_RST_KEY = 17 | |
| [PMIC_PRELOADER] pl pmic FCHRKEY Release | |
| [EFUSE] Start Check ... | |
| [PMIC_init] _CLK_CKPDN_CON2:0x2904 BIF_BAT_CON0:0x0 LDO_VBIF28:0x0 0x282:0x0 0x2b6:0x1305 | |
| [PMIC_PRELOADER][AUXADC] ch=0 raw=26585 data=4381 | |
| [GPT_PL]Success to find valid GPT. | |
| [PLFM] Efuse status(80000000) | |
| Writing 20000000 to 1129030C, 4 bytes | |
| total_dram_size: 0x00000000C0000000, max_dram_size: 0xFFFFFFFFFFFFFFFF | |
| dump mblock info | |
| mblock[i] start=0000000040000000 size=0000000080000000 | |
| mblock[i] start=00000000C0000000 size=0000000040000000 | |
| [GPT_PL]Success to find valid GPT. | |
| PL_LOG_STORE:sram->sig value 0xABCD1234! | |
| PL_LOG_STORE:expdb partition start addr 0x88000, end addr 0xA88000, partition size 0xA00000, nr_sects 0x5000, blksz 0x200! | |
| PL_LOG_STORE:get uart flag= 0x0 | |
| PL_LOG_STORE:log_to_emmc function flag 0x27! | |
| PL_LOG_STORE:reboot_count 4,save_to_emmc 15. | |
| mblock_reserve: 000000007FFC0000 - 0000000080000000 from mblock 0 | |
| PL_LOG_STORE:sram_header 0x11DF00,sig 0xABCD1234, sram_dram_buff 0x11DF0C, buf_addr 0x7FFC0000 | |
| [ROM_INFO] 'v2','0x0','0x0','0x0','0x2C00' | |
| [SEC] AES Legacy : 0 | |
| [SEC] SECCFG AC : 1 | |
| [LIB] Loading SEC config | |
| [LIB] Name = | |
| [LIB] Config = 0x0, 0x22 | |
| [LIB] SECRO (ac, ac_offset, ac_length) = (0x1, 0x40, 0x2BA0) | |
| 0x31,0x41,0x35,0x32 | |
| [SEC] DBGPORT 00000051 0000F0F0 00000101 0000F0F0 00000101 00000042 00000000 0000001A 00000000 | |
| [SEC] DBGPORT (1 1) | |
| [SEC] DBGPORT 00000051 0000F000 00011111 0000F000 00011111 00000000 00000053 00000012 0000001C | |
| [SEC] read '0x9000000' | |
| 0x4D,0x4D,0x4D,0x4D,0x4,0x0,0x0,0x0, | |
| [LIB] seclib_img_auth_load_sig [LIB] CFG read size '0x2000' '0x3C' | |
| 0x4D4D4D4D | |
| [LIB] SEC CFG 'v4' exists | |
| [LIB] HW DEC | |
| GCPU Enhance,V1.2 | |
| [LIB] SEC CFG is valid. Lock state is 3 | |
| bldr_handshake, spar0(0x4030)=192 | |
| [BLDR] Tool connection is unlocked | |
| [platform_vusb_on] VUSB33 is on | |
| [PMIC_PRELOADER] pmic_IsUsbCableIn 1 | |
| [mt_charger_type_detection] Got data !!, 0, 1 | |
| [PLFM] USB cable in | |
| [TOOL] USB enum timeout (Yes), handshake timeout(Yes) | |
| [TOOL] Enumeration(Start) | |
| HS is detected | |
| [TOOL] Enumeration(End): OK 636ms | |
| usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0]usbdl_flush timeoutintrep :0, IntrTx[0] IntrRx [0][TOOL] : usb listen timeout | |
| [TOOL] <USB> cannot detect tools! | |
| [TOOL] <UART> listen ended, receive size:0! | |
| [TOOL] <UART> wait sync time 150ms->5ms | |
| [TOOL] <UART> receieved data: () | |
| Device APC domain init setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Device APC domain after setup: | |
| Domain Setup (0x0) | |
| Domain Setup (0x0) | |
| Domain Setup (0x2000051) | |
| Domain Setup (0x660) | |
| mblock_reserve: 0000000044600000 - 0000000044640000 from mblock 0 | |
| (B)tz_dapc_sec_init is 0x0 | |
| (E)tz_dapc_sec_init is 0x0 | |
| [AB] Current boot: Preloader_b | |
| [AB] ab_suffix: _b, ab_retry: 0 | |
| [AB] boot_success is 1! | |
| part name=lk_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: lk, addr: 0xFFFFFFFF, mode: -1, size:0xA20C4 | |
| part: lk_b img: lk cert vfy(0 ms) | |
| [PART] load "lk_b" from 0x00000000D6500200 (dev) to 0x46000000 (mem) [SUCCESS] | |
| [PART] load speed: 10625KB/s, 663748 bytes, 61ms | |
| part: lk_b img: lk vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: atf, addr: 0xFFFFFFFF, mode: 0, size:0x12A00 | |
| part: tee_b img: atf cert vfy(0 ms) | |
| [PART] load "tee_b" from 0x00000000D7E00200 (dev) to 0x1005C0 (mem) [SUCCESS] | |
| [PART] load speed: 8277KB/s, 76288 bytes, 9ms | |
| part: tee_b img: atf vfy(0 ms) | |
| part name=tee_b | |
| [SEC_POLICY] reached the end, use default policy | |
| [LIB] S-CHIP | |
| [SEC_POLICY] sboot_state = 0x1 | |
| [SEC_POLICY] lock_state = 0x3 | |
| img_auth_required=0 | |
| [PART] Image with header, name: tee, addr: 0x1740240, mode: 0, size:0x5A400 | |
| part: tee_b img: tee cert vfy(0 ms) | |
| mblock_reserve: 000000009E880000 - 00000000A0000000 from mblock 2 | |
| [TZ_INIT] atf_log_buf_start: 0x9E880000, tee_secmem_start: 0x9E8C0000 | |
| [PART] load "tee_b" from 0x00000000D7E13C70 (dev) to 0x9E8BFDC0 (mem) [SUCCESS] | |
| [PART] load speed: 10027KB/s, 369664 bytes, 36ms | |
| part: tee_b img: tee vfy(0 ms) | |
| [TZ_INIT] TEE start entry : 0x9E8C0000 | |
| [BLDR] bldr load tee part ret=0x0, addr=0x1005C0 | |
| [PICACHU] scenario#3: enable bit is not set. Skip it. | |
| bat is exist. | |
| mblock_reserve: 0000000044400000 - 0000000044410000 from mblock 0 | |
| mblock_reserve: 0000000044410000 - 00000000444F0000 from mblock 1 | |
| mblock_reserve: 00000000444F0000 - 0000000044500000 from mblock 1 | |
| [PLFM] boot to LK by ATAG. | |
| DTB Addr: 0x0 | |
| DTB Size: 0x0 | |
| RAM_CONSOLE detect abnormal boot wdt_status:0x5 RAM_CONSOLE offset:0xEC0 | |
| RAM_CONSOLE sram_plat_dbg_info_addr:0x11D800, sram_plat_dbg_info_size:0x400, sram_log_store_addr:0x11DF00, sram_log_store_size:0x100 | |
| RAM_CONSOLE mrdump_addr:0x11E000, mrdump_size:0x2000, dram_addr:0x44400000, dram_size:0x10000 | |
| RAM_CONSOLE pstore_addr:0x44410000, pstore_size:0xE0000, pstore_console_size:0x40000, pstore_pmsg_size:0x10000 | |
| RAM_CONSOLE mrdump_mini_header_addr:0x444F0000, mrdump_mini_header_size:0x10000, magic1:0x61646472, magic2:0x73697A65 | |
| memory_type = 0x203 memory_vendor = 0x1 | |
| bat_id_volt = 1186742 | |
| BOOT_REASON: 4 | |
| BOOT_MODE: 0 | |
| META_COM TYPE: 0 | |
| META_COM ID: 0 | |
| META_COM PORT: 285220864 | |
| LOG_COM PORT: 285220864 | |
| LOG_COM BAUD: 921600 | |
| LOG_COM EN: 1 | |
| LOG_COM SWITCH: 0 | |
| MEM_SIZE: 0x231080 | |
| MEM_SIZE: 0x231080 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| MD_INFO: 0x0 | |
| BOOT_TIME: 4854 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| DA_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| SEC_INFO: 0x0 | |
| PART_NUM: 3 | |
| PART_INFO: 0x44876684 | |
| EFLAG: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 0 | |
| DDR_RESERVE: 38146 | |
| DRAM_BUF: 907904 | |
| SRAM satrt: 0x11C000 | |
| SRAM size: 0x4000 | |
| is abnormal boot: 1 | |
| ram_console info sram_addr: 0x11D000 | |
| ram_console info sram_size: 0x800 | |
| ram_console info def_type: 0x1 | |
| ram_console memory_info_offset: 0xEC0 | |
| pl gpio prot[0]: 0x0 | |
| pl gpio prot[1]: 0x0 | |
| pl gpio prot[2]: 0x0 | |
| pl gpio prot[3]: 0x0 | |
| pl gpio prot[4]: 0x0 | |
| pl gpio prot[5]: 0x0 | |
| pl gpio prot[6]: 0x0 | |
| devinfo data index out of range:22 | |
| devinfo data size:22 | |
| devinfo ver: V1.0.1 | |
| [TZ_INIT] atf_log_port : 0x11002000 | |
| [TZ_INIT] atf_log_baudrate : 0xE1000 | |
| [TZ_INIT] atf_irq_num : 281 | |
| [LIB] HW ENC | |
| [TZ_TBASE] sec_mem_arg.magic: 0x3C562817 | |
| [TZ_TBASE] sec_mem_arg.version: 0x10000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_start: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.svp_mem_end: 0x9F7C0000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_start: 0x9FE00000 | |
| [TZ_TBASE] sec_mem_arg.tplay_mem_size: 0x200000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_start: 0x9FDFF000 | |
| [TZ_TBASE] sec_mem_arg.tplay_table_size: 0x1000 | |
| [TZ_TBASE] sec_mem_arg.secmem_obfuscation: 0x1 | |
| [TZ_TBASE] tee_entry_addr: 0x9E8C0000 | |
| [TZ_TBASE] tee_secmem_size: 0x1740000 | |
| [TZ_TBASE] rpmb_size: 0x400000 | |
| [TZ_TBASE] sec_mem_arg.shared_secmem: 0x1 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_start: 0x9FDF7000 | |
| [TZ_TBASE] sec_mem_arg.m4u_mem_size: 0x8000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_start: 0x9FD07000 | |
| [TZ_TBASE] sec_mem_arg.cmdq_mem_size: 0xF0000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_start: 0x9FC87000 | |
| [TZ_TBASE] sec_mem_arg.spi_mem_size: 0x80000 | |
| [TZ_TBASE] teearg.magic: 0x434D4254 | |
| [TZ_TBASE] teearg.length: 0x0 | |
| [TZ_TBASE] teearg.dRamBase: 0x40000000 | |
| [TZ_TBASE] teearg.dRamSize: 0x80000000 | |
| [TZ_TBASE] teearg.secDRamBase: 0x9E8C0000 | |
| [TZ_TBASE] teearg.secDRamSize: 0xF00000 | |
| [TZ_TBASE] teearg.secIRamBase: 0x0 | |
| [TZ_TBASE] teearg.secIRamSize: 0x0 | |
| [TZ_TBASE] teearg.total_number_spi: 256 | |
| [TZ_TBASE] teearg.ssiq_number: 280 | |
| [TZ_INIT] ATF log buffer start : 0x9E880000 | |
| [TZ_INIT] ATF log buffer size : 0x40000 | |
| [TZ_INIT] ATF aee buffer start : 0x9E8BC000 | |
| [TZ_INIT] ATF aee buffer size : 0x4000 | |
| [LIB] HW ENC | |
| [TZ_INIT] TEE RPMB Size : 0x400000 | |
| EMI MPUS=0x0; MPUT=0x0 | |
| [BLDR] Others, jump to ATF | |
| [BLDR] jump to 0x46000000 | |
| [BLDR] <0x46000000>=0xEA000007 | |
| [BLDR] <0x46000004>=0xEA006225 | |
| [TZ_SEC_CFG] SRAMROM Secure Addr 0x1C000 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x0 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0xB69 | |
| [TZ_SEC_CFG] SRAMROM Secure Control 0x1B680B69 | |
| [TZ_EMI_MPU] MPU [0x9E8C0000-0x9FFFFFFF] | |
| [TZ_INIT] set secure memory protection : 0x9E8C0000, 0x9FFFFFFF (0) | |
| [TZ_INIT] ATF entry addr, dram addr: 0x101000, 0x44600000 | |
| [TZ_EMI_MPU] MPU [0x44600000-0x4463FFFF] | |
| [TZ_INIT] set secure memory protection : 0x44600000, 0x4463FFFF (1) | |
| [TZ_INIT] Jump to ATF, then 0x9E8C0000 and 0x46000000 | |
| [ATF](0)[0.000001]CPUxGPT reg(201) | |
| [ATF](0)[0.000399]IS_ABNORMAL_BOOT: 1 | |
| [ATF](0)[0.000828]gpio prot[0]: 0x0 | |
| [ATF](0)[0.001243]gpio prot[1]: 0x0 | |
| [ATF](0)[0.001659]gpio prot[2]: 0x0 | |
| [ATF](0)[0.002074]gpio prot[3]: 0x0 | |
| [ATF](0)[0.002490]gpio prot[4]: 0x0 | |
| [ATF](0)[0.002906]gpio prot[5]: 0x0 | |
| [ATF](0)[0.003322]gpio prot[6]: 0x0 | |
| INFO: 0 protection pin, 0, 0, 0, 0, 0 under protected | |
| [ATF](0)[0.004363]BL33 boot argument location=0x448dda40 | |
| [ATF](0)[0.005051]BL33 boot argument size=0x5920 | |
| [ATF](0)[0.005634]BL33 start addr=0x46000000 | |
| [ATF](0)[0.006169]teearg addr=0x100000 | |
| [ATF](0)[0.006631]atf_magic=0x4d415446 | |
| [ATF](0)[0.007092]tee_support=0x1 | |
| [ATF](0)[0.007494]tee_entry=0x9e8c0000 | |
| [ATF](0)[0 | |
| [ATF](0)[10.129173]aee_wdt_dump: on cpu0 | |
| [ATF](0)[10.129599](0) pc:<0000000046002a32> lr:<0000000000000000> sp:<0000000000000000> pstate: 600001f3 | |
| [ATF](0)[10.130750](0) x29: 00000000460a5000 x28: 0000000000000000 x27: 0000000000000000 | |
| [ATF](0)[10.131720](0) x26: 0000000000000000 x25: 0000000000000000 x24: 0000000000000000 | |
| [ATF](0)[10.132689](0) x23: 00000000460a5000 x22: 0000000000000000 x21: 00000000460a5000 | |
| [ATF](0)[10.133658](0) x20: 0000000000000000 x19: 000000004614cec0 x18: 0000000046002a33 | |
| [ATF](0)[10.134627](0) x17: 00000000460a6428 x16: 0000000046018838 x15: 0000000000000000 | |
| [ATF](0)[10.135597](0) x14: 0000000000000000 x13: 0000000000000000 x12: 0000000000000000 | |
| [ATF](0)[10.136566](0) x11: 0000000000000000 x10: 0000000000001415 x09: 000000004615786c | |
| [ATF](0)[10.137535](0) x08: 0000000046020d2d x07: 0000000000000000 x06: 00000000460a6434 | |
| [ATF](0)[10.138504](0) x05: 000000004605d6ac x04: 000000004614cee0 x03: 0000000000000001 | |
| [ATF](0)[10.139473](0) x02: 000000004608eea8 x01: 000000000011df0c x00: 00000000600001d3 | |
| [ATF](0)[10.140442]Kernel WDT not ready. cpu0 | |
| [ATF](0)[10.140948]NULL sp, skip stack dump | |
| [ATF](0)[10.141433]Wait timeout. | |
| 1 |
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