TriCoreGenInstrInfo.inc

namespace TriCore {
  enum {
    PHI	= 0,
    INLINEASM	= 1,
    CFI_INSTRUCTION	= 2,
    EH_LABEL	= 3,
    GC_LABEL	= 4,
    KILL	= 5,
    EXTRACT_SUBREG	= 6,
    INSERT_SUBREG	= 7,
    IMPLICIT_DEF	= 8,
    SUBREG_TO_REG	= 9,
    COPY_TO_REGCLASS	= 10,
    DBG_VALUE	= 11,
    REG_SEQUENCE	= 12,
    COPY	= 13,
    BUNDLE	= 14,
    LIFETIME_START	= 15,
    LIFETIME_END	= 16,
    STACKMAP	= 17,
    PATCHPOINT	= 18,
    LOAD_STACK_GUARD	= 19,
    STATEPOINT	= 20,
    LOCAL_ESCAPE	= 21,
    FAULTING_LOAD_OP	= 22,
    ABS	= 23,
    ADDArr	= 24,
    ADDCrc	= 25,
    ADDCrr	= 26,
    ADDIrlc	= 27,
    ADDXrc	= 28,
    ADDXrr	= 29,
    ADDi64	= 30,
    ADDi64C	= 31,
    ADDrc	= 32,
    ADDrr	= 33,
    ADDsrc	= 34,
    ADDsrr	= 35,
    ADJCALLSTACKDOWN	= 36,
    ADJCALLSTACKUP	= 37,
    ANDNrc	= 38,
    ANDNrc64	= 39,
    AND_EQrc	= 40,
    AND_EQrr	= 41,
    AND_GEUrc	= 42,
    AND_GE_Urr	= 43,
    AND_GErc	= 44,
    AND_LTUrc	= 45,
    AND_LT_Urr	= 46,
    AND_LTrc	= 47,
    ANDrc	= 48,
    ANDrc64	= 49,
    ANDrr	= 50,
    ANDsc	= 51,
    ANDsrr	= 52,
    ANDsrr64	= 53,
    CALLb	= 54,
    DEXTRrrpw	= 55,
    EQrc	= 56,
    EQrr	= 57,
    EXTRrrpw	= 58,
    GErc	= 59,
    GErr	= 60,
    IMASKrcpw	= 61,
    JNZsbr	= 62,
    JZsbr	= 63,
    Jb	= 64,
    LDBUbo	= 65,
    LDBbo	= 66,
    LDDbo	= 67,
    LDHUbo	= 68,
    LDHbo	= 69,
    LDWbo	= 70,
    LTrc	= 71,
    LTrr	= 72,
    MOVAArr	= 73,
    MOVAAsrr	= 74,
    MOVArr	= 75,
    MOVDrr	= 76,
    MOVHrlc	= 77,
    MOVUrlc	= 78,
    MOVi32	= 79,
    MOVrlc	= 80,
    MOVrr	= 81,
    MOVsrc	= 82,
    MULrc	= 83,
    MULrr2	= 84,
    MULsrr	= 85,
    NANDrc	= 86,
    NANDrr	= 87,
    NErc	= 88,
    NErr	= 89,
    NORrc	= 90,
    NORrr	= 91,
    NOTrr64	= 92,
    NOTsr	= 93,
    ORNrc	= 94,
    ORNrc64	= 95,
    OR_GEUrc	= 96,
    OR_GErc	= 97,
    OR_GErr	= 98,
    OR_LTUrc	= 99,
    OR_LTrc	= 100,
    OR_LTrr	= 101,
    OR_NErc	= 102,
    OR_NErr	= 103,
    ORrc	= 104,
    ORrc64	= 105,
    ORrr	= 106,
    ORsc	= 107,
    ORsrr	= 108,
    ORsrr64	= 109,
    RET	= 110,
    RSUBrc	= 111,
    RSUBsr	= 112,
    SHArc	= 113,
    SHArr	= 114,
    SHrc	= 115,
    SHrr	= 116,
    STAbo	= 117,
    STBbo	= 118,
    STDbo	= 119,
    STHbo	= 120,
    STWbo	= 121,
    SUBArr	= 122,
    SUBAsc	= 123,
    SUBCrr	= 124,
    SUBXrr	= 125,
    SUBi64	= 126,
    Select8	= 127,
    XNORrc	= 128,
    XORrc	= 129,
    XORrc64	= 130,
    XORrcneg64	= 131,
    XORrr	= 132,
    XORsrr	= 133,
    XORsrr64	= 134,
    INSTRUCTION_LIST_END = 135
  };

namespace Sched {
  enum {
    NoInstrModel	= 0,
    SCHED_LIST_END = 1
  };
} // End Sched namespace
} // End TriCore namespace
} // End llvm namespace