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target/thumbv6m-none-eabi/release/neotron-pico-bios: file format elf32-littlearm | |
Disassembly of section .text: | |
100001c0 <__stext>: | |
100001c0: 2400 movs r4, #0 | |
100001c2: 43e4 mvns r4, r4 | |
100001c4: 46a6 mov lr, r4 | |
100001c6: f005 f81a bl 0x100051fe <__pre_init> @ imm = #20532 | |
100001ca: 46a6 mov lr, r4 | |
100001cc: 4809 ldr r0, [pc, #36] @ 0x100001f4 <$d.344> | |
100001ce: 490a ldr r1, [pc, #40] @ 0x100001f8 <$d.344+0x4> | |
100001d0: 2200 movs r2, #0 | |
100001d2: 4281 cmp r1, r0 | |
100001d4: d001 beq 0x100001da <__stext+0x1a> @ imm = #2 | |
100001d6: c004 stm r0!, {r2} | |
100001d8: e7fb b 0x100001d2 <__stext+0x12> @ imm = #-10 | |
100001da: 4808 ldr r0, [pc, #32] @ 0x100001fc <$d.344+0x8> | |
100001dc: 4908 ldr r1, [pc, #32] @ 0x10000200 <$d.344+0xc> | |
100001de: 4a09 ldr r2, [pc, #36] @ 0x10000204 <$d.344+0x10> | |
100001e0: 4281 cmp r1, r0 | |
100001e2: d002 beq 0x100001ea <__stext+0x2a> @ imm = #4 | |
100001e4: ca08 ldm r2!, {r3} | |
100001e6: c008 stm r0!, {r3} | |
100001e8: e7fa b 0x100001e0 <__stext+0x20> @ imm = #-12 | |
100001ea: b500 push {lr} | |
100001ec: f003 f98a bl 0x10003504 <main> @ imm = #13076 | |
100001f0: de00 udf #0 | |
100001f2: 0000 movs r0, r0 | |
100001f4 <$d.344>: | |
100001f4: 8c c7 03 20 .word 0x2003c78c | |
100001f8: 30 ed 03 20 .word 0x2003ed30 | |
100001fc: 00 a0 03 20 .word 0x2003a000 | |
10000200: 8c c7 03 20 .word 0x2003c78c | |
10000204: d0 7b 00 10 .word 0x10007bd0 | |
10000208 <_rphal_unsigned_divmod>: | |
10000208: 4a19 ldr r2, [pc, #100] @ 0x10000270 <$d.345> | |
1000020a: 6f93 ldr r3, [r2, #120] | |
1000020c: 089b lsrs r3, r3, #2 | |
1000020e: d208 bhs 0x10000222 <_rphal_unsigned_divmod+0x1a> @ imm = #16 | |
10000210: 6610 str r0, [r2, #96] | |
10000212: 6651 str r1, [r2, #100] | |
10000214: e7ff b 0x10000216 <_rphal_unsigned_divmod+0xe> @ imm = #-2 | |
10000216: e7ff b 0x10000218 <_rphal_unsigned_divmod+0x10> @ imm = #-2 | |
10000218: e7ff b 0x1000021a <_rphal_unsigned_divmod+0x12> @ imm = #-2 | |
1000021a: e7ff b 0x1000021c <_rphal_unsigned_divmod+0x14> @ imm = #-2 | |
1000021c: 6f51 ldr r1, [r2, #116] | |
1000021e: 6f10 ldr r0, [r2, #112] | |
10000220: 4770 bx lr | |
10000222: b570 push {r4, r5, r6, lr} | |
10000224: 6e13 ldr r3, [r2, #96] | |
10000226: 6e54 ldr r4, [r2, #100] | |
10000228: 6f55 ldr r5, [r2, #116] | |
1000022a: 6f16 ldr r6, [r2, #112] | |
1000022c: f7ff fff0 bl 0x10000210 <_rphal_unsigned_divmod+0x8> @ imm = #-32 | |
10000230: 6613 str r3, [r2, #96] | |
10000232: 6654 str r4, [r2, #100] | |
10000234: 6755 str r5, [r2, #116] | |
10000236: 6716 str r6, [r2, #112] | |
10000238: bd70 pop {r4, r5, r6, pc} | |
1000023a: 46c0 mov r8, r8 | |
1000023c <_rphal_signed_divmod>: | |
1000023c: 4a0c ldr r2, [pc, #48] @ 0x10000270 <$d.345> | |
1000023e: 6f93 ldr r3, [r2, #120] | |
10000240: 089b lsrs r3, r3, #2 | |
10000242: d208 bhs 0x10000256 <_rphal_signed_divmod+0x1a> @ imm = #16 | |
10000244: 6690 str r0, [r2, #104] | |
10000246: 66d1 str r1, [r2, #108] | |
10000248: e7ff b 0x1000024a <_rphal_signed_divmod+0xe> @ imm = #-2 | |
1000024a: e7ff b 0x1000024c <_rphal_signed_divmod+0x10> @ imm = #-2 | |
1000024c: e7ff b 0x1000024e <_rphal_signed_divmod+0x12> @ imm = #-2 | |
1000024e: e7ff b 0x10000250 <_rphal_signed_divmod+0x14> @ imm = #-2 | |
10000250: 6f51 ldr r1, [r2, #116] | |
10000252: 6f10 ldr r0, [r2, #112] | |
10000254: 4770 bx lr | |
10000256: b570 push {r4, r5, r6, lr} | |
10000258: 6e13 ldr r3, [r2, #96] | |
1000025a: 6e54 ldr r4, [r2, #100] | |
1000025c: 6f55 ldr r5, [r2, #116] | |
1000025e: 6f16 ldr r6, [r2, #112] | |
10000260: f7ff fff0 bl 0x10000244 <_rphal_signed_divmod+0x8> @ imm = #-32 | |
10000264: 6613 str r3, [r2, #96] | |
10000266: 6654 str r4, [r2, #100] | |
10000268: 6755 str r5, [r2, #116] | |
1000026a: 6716 str r6, [r2, #112] | |
1000026c: bd70 pop {r4, r5, r6, pc} | |
1000026e: 0000 movs r0, r0 | |
10000270 <$d.345>: | |
10000270: 00 00 00 d0 .word 0xd0000000 | |
10000274 <rp2040_hal::pio::PIO<P>::install>: | |
; pub fn install( | |
10000274: b5f0 push {r4, r5, r6, r7, lr} | |
10000276: af03 add r7, sp, #12 | |
10000278: b08b sub sp, #44 | |
1000027a: 9003 str r0, [sp, #12] | |
1000027c: 201f movs r0, #31 | |
1000027e: 900a str r0, [sp, #40] | |
10000280: 43c0 mvns r0, r0 | |
10000282: 9202 str r2, [sp, #8] | |
; let len = self.len(); | |
10000284: 6c13 ldr r3, [r2, #64] | |
10000286: 9304 str r3, [sp, #16] | |
; if i.len() > PIO_INSTRUCTION_COUNT || i.is_empty() { | |
10000288: 3b21 subs r3, #33 | |
1000028a: 4283 cmp r3, r0 | |
1000028c: d204 bhs 0x10000298 <rp2040_hal::pio::PIO<P>::install+0x24> @ imm = #8 | |
1000028e: 2002 movs r0, #2 | |
; Err(InstallError::NoSpace) | |
10000290: 9903 ldr r1, [sp, #12] | |
10000292: 7088 strb r0, [r1, #2] | |
; } | |
10000294: b00b add sp, #44 | |
10000296: bdf0 pop {r4, r5, r6, r7, pc} | |
10000298: 9d02 ldr r5, [sp, #8] | |
1000029a: 354a adds r5, #74 | |
1000029c: 2000 movs r0, #0 | |
1000029e: 43c6 mvns r6, r0 | |
100002a0: 9b04 ldr r3, [sp, #16] | |
; if len < 32 { | |
100002a2: 2b20 cmp r3, #32 | |
100002a4: d203 bhs 0x100002ae <rp2040_hal::pio::PIO<P>::install+0x3a> @ imm = #6 | |
100002a6: 9a0a ldr r2, [sp, #40] | |
100002a8: 4013 ands r3, r2 | |
100002aa: 409e lsls r6, r3 | |
100002ac: 43f6 mvns r6, r6 | |
100002ae: 9606 str r6, [sp, #24] | |
100002b0: 680b ldr r3, [r1] | |
; if let Some(offset) = self.find_offset_for_instructions(&p.code, p.origin) { | |
100002b2: 9307 str r3, [sp, #28] | |
100002b4: 782b ldrb r3, [r5] | |
; if let Some(origin) = origin { | |
100002b6: 2b00 cmp r3, #0 | |
100002b8: d00f beq 0x100002da <rp2040_hal::pio::PIO<P>::install+0x66> @ imm = #30 | |
100002ba: 786d ldrb r5, [r5, #1] | |
100002bc: 2020 movs r0, #32 | |
; if origin as usize > PIO_INSTRUCTION_COUNT - i.len() | |
100002be: 9b04 ldr r3, [sp, #16] | |
100002c0: 1ac0 subs r0, r0, r3 | |
; if let Some(offset) = self.find_offset_for_instructions(&p.code, p.origin) { | |
100002c2: 42a8 cmp r0, r5 | |
100002c4: d3e3 blo 0x1000028e <rp2040_hal::pio::PIO<P>::install+0x1a> @ imm = #-58 | |
100002c6: 462b mov r3, r5 | |
100002c8: 980a ldr r0, [sp, #40] | |
100002ca: 4003 ands r3, r0 | |
100002cc: 9806 ldr r0, [sp, #24] | |
100002ce: 4098 lsls r0, r3 | |
100002d0: 9b07 ldr r3, [sp, #28] | |
100002d2: 4018 ands r0, r3 | |
100002d4: 462a mov r2, r5 | |
100002d6: d01e beq 0x10000316 <rp2040_hal::pio::PIO<P>::install+0xa2> @ imm = #60 | |
100002d8: e7d9 b 0x1000028e <rp2040_hal::pio::PIO<P>::install+0x1a> @ imm = #-78 | |
100002da: 2320 movs r3, #32 | |
; for i in (0..=32 - (i.len() as u8)).rev() { | |
100002dc: 9d04 ldr r5, [sp, #16] | |
100002de: 1b5d subs r5, r3, r5 | |
100002e0: e003 b 0x100002ea <rp2040_hal::pio::PIO<P>::install+0x76> @ imm = #6 | |
100002e2: 4622 mov r2, r4 | |
; if self.used_instruction_space & (mask << i) == 0 { | |
100002e4: 9e07 ldr r6, [sp, #28] | |
100002e6: 4233 tst r3, r6 | |
100002e8: d011 beq 0x1000030e <rp2040_hal::pio::PIO<P>::install+0x9a> @ imm = #34 | |
100002ea: 0600 lsls r0, r0, #24 | |
100002ec: d1cf bne 0x1000028e <rp2040_hal::pio::PIO<P>::install+0x1a> @ imm = #-98 | |
100002ee: 462c mov r4, r5 | |
100002f0: b2ed uxtb r5, r5 | |
100002f2: 4268 rsbs r0, r5, #0 | |
100002f4: 4168 adcs r0, r5 | |
; if self.used_instruction_space & (mask << i) == 0 { | |
100002f6: 4626 mov r6, r4 | |
100002f8: 9a0a ldr r2, [sp, #40] | |
100002fa: 4016 ands r6, r2 | |
100002fc: 9b06 ldr r3, [sp, #24] | |
100002fe: 40b3 lsls r3, r6 | |
10000300: 2d00 cmp r5, #0 | |
10000302: d0ee beq 0x100002e2 <rp2040_hal::pio::PIO<P>::install+0x6e> @ imm = #-36 | |
10000304: 4622 mov r2, r4 | |
10000306: 1e65 subs r5, r4, #1 | |
; if self.used_instruction_space & (mask << i) == 0 { | |
10000308: 9e07 ldr r6, [sp, #28] | |
1000030a: 4233 tst r3, r6 | |
1000030c: d1ed bne 0x100002ea <rp2040_hal::pio::PIO<P>::install+0x76> @ imm = #-38 | |
1000030e: 9804 ldr r0, [sp, #16] | |
10000310: 2800 cmp r0, #0 | |
10000312: d046 beq 0x100003a2 <rp2040_hal::pio::PIO<P>::install+0x12e> @ imm = #140 | |
10000314: b2d5 uxtb r5, r2 | |
10000316: 9205 str r2, [sp, #20] | |
10000318: 9101 str r1, [sp, #4] | |
; if instr & 0b1110_0000_0000_0000 == 0 { | |
1000031a: 00a9 lsls r1, r5, #2 | |
1000031c: 4c27 ldr r4, [pc, #156] @ 0x100003bc <$d.4> | |
1000031e: 2d20 cmp r5, #32 | |
10000320: 462b mov r3, r5 | |
10000322: 4628 mov r0, r5 | |
10000324: d300 blo 0x10000328 <rp2040_hal::pio::PIO<P>::install+0xb4> @ imm = #0 | |
10000326: 2320 movs r3, #32 | |
; if instr & 0b1110_0000_0000_0000 == 0 { | |
10000328: 190a adds r2, r1, r4 | |
1000032a: 3b20 subs r3, #32 | |
1000032c: 9904 ldr r1, [sp, #16] | |
1000032e: 004c lsls r4, r1, #1 | |
10000330: 9d02 ldr r5, [sp, #8] | |
10000332: 882e ldrh r6, [r5] | |
; if instr & 0b1110_0000_0000_0000 == 0 { | |
10000334: 0b71 lsrs r1, r6, #13 | |
10000336: d10d bne 0x10000354 <rp2040_hal::pio::PIO<P>::install+0xe0> @ imm = #26 | |
10000338: 9209 str r2, [sp, #36] | |
1000033a: 9008 str r0, [sp, #32] | |
; let address = (instr & 0b11111) as u8; | |
1000033c: 4631 mov r1, r6 | |
1000033e: 980a ldr r0, [sp, #40] | |
10000340: 4001 ands r1, r0 | |
; let address = address + offset; | |
10000342: 9a05 ldr r2, [sp, #20] | |
10000344: 1889 adds r1, r1, r2 | |
10000346: b2c9 uxtb r1, r1 | |
; assert!( | |
10000348: 291f cmp r1, #31 | |
1000034a: d832 bhi 0x100003b2 <rp2040_hal::pio::PIO<P>::install+0x13e> @ imm = #100 | |
; instr & (!0b11111) | address as u16 | |
1000034c: 4386 bics r6, r0 | |
1000034e: 430e orrs r6, r1 | |
10000350: 9808 ldr r0, [sp, #32] | |
10000352: 9a09 ldr r2, [sp, #36] | |
; self.pio.instr_mem[i + offset as usize] | |
10000354: 2b00 cmp r3, #0 | |
10000356: d028 beq 0x100003aa <rp2040_hal::pio::PIO<P>::install+0x136> @ imm = #80 | |
10000358: 1cad adds r5, r5, #2 | |
1000035a: c240 stm r2!, {r6} | |
1000035c: 1ea4 subs r4, r4, #2 | |
1000035e: 1c40 adds r0, r0, #1 | |
10000360: 1c5b adds r3, r3, #1 | |
10000362: 2c00 cmp r4, #0 | |
10000364: d1e5 bne 0x10000332 <rp2040_hal::pio::PIO<P>::install+0xbe> @ imm = #-54 | |
10000366: 9c05 ldr r4, [sp, #20] | |
10000368: 980a ldr r0, [sp, #40] | |
; self.used_instruction_space |= Self::instruction_mask(p.code.len()) << offset; | |
1000036a: 4020 ands r0, r4 | |
1000036c: 9b06 ldr r3, [sp, #24] | |
1000036e: 4083 lsls r3, r0 | |
10000370: 9a03 ldr r2, [sp, #12] | |
10000372: 9d02 ldr r5, [sp, #8] | |
10000374: 9901 ldr r1, [sp, #4] | |
; Ok(InstalledProgram { | |
10000376: 9804 ldr r0, [sp, #16] | |
10000378: 71d0 strb r0, [r2, #7] | |
1000037a: 7194 strb r4, [r2, #6] | |
; side_set: p.side_set, | |
1000037c: 6c68 ldr r0, [r5, #68] | |
1000037e: 3548 adds r5, #72 | |
; Ok(InstalledProgram { | |
10000380: 7010 strb r0, [r2] | |
10000382: 4614 mov r4, r2 | |
; self.used_instruction_space |= Self::instruction_mask(p.code.len()) << offset; | |
10000384: 9a07 ldr r2, [sp, #28] | |
10000386: 4313 orrs r3, r2 | |
10000388: 600b str r3, [r1] | |
; wrap: p.wrap, | |
1000038a: 7869 ldrb r1, [r5, #1] | |
; Ok(InstalledProgram { | |
1000038c: 7161 strb r1, [r4, #5] | |
; wrap: p.wrap, | |
1000038e: 7829 ldrb r1, [r5] | |
; Ok(InstalledProgram { | |
10000390: 7121 strb r1, [r4, #4] | |
10000392: 0e01 lsrs r1, r0, #24 | |
10000394: 70e1 strb r1, [r4, #3] | |
10000396: 0c01 lsrs r1, r0, #16 | |
10000398: 70a1 strb r1, [r4, #2] | |
1000039a: 0a00 lsrs r0, r0, #8 | |
1000039c: 7060 strb r0, [r4, #1] | |
; } | |
1000039e: b00b add sp, #44 | |
100003a0: bdf0 pop {r4, r5, r6, r7, pc} | |
100003a2: 9d02 ldr r5, [sp, #8] | |
100003a4: 4614 mov r4, r2 | |
100003a6: 9a03 ldr r2, [sp, #12] | |
100003a8: e7e5 b 0x10000376 <rp2040_hal::pio::PIO<P>::install+0x102> @ imm = #-54 | |
100003aa: 2120 movs r1, #32 | |
; self.pio.instr_mem[i + offset as usize] | |
100003ac: f003 fbe8 bl 0x10003b80 <core::panicking::panic_bounds_check> @ imm = #14288 | |
100003b0: defe trap | |
; assert!( | |
100003b2: 4803 ldr r0, [pc, #12] @ 0x100003c0 <$d.4+0x4> | |
100003b4: 2134 movs r1, #52 | |
100003b6: f004 fae5 bl 0x10004984 <core::panicking::panic> @ imm = #17866 | |
100003ba: defe trap | |
100003bc <$d.4>: | |
100003bc: 48 00 20 50 .word 0x50200048 | |
100003c0: 80 71 00 10 .word 0x10007180 | |
100003c4 <critical_section::with>: | |
; pub fn with<R>(f: impl FnOnce(CriticalSection) -> R) -> R { | |
100003c4: b5f0 push {r4, r5, r6, r7, lr} | |
100003c6: af03 add r7, sp, #12 | |
100003c8: b083 sub sp, #12 | |
100003ca: 9001 str r0, [sp, #4] | |
; $func($($args),*) | |
100003cc: f006 fb27 bl 0x10006a1e <__primask_r> @ imm = #26190 | |
100003d0: 4604 mov r4, r0 | |
100003d2: 2601 movs r6, #1 | |
100003d4: 200d movs r0, #13 | |
100003d6: 0700 lsls r0, r0, #28 | |
100003d8: 6800 ldr r0, [r0] | |
100003da: 491f ldr r1, [pc, #124] @ 0x10000458 <$d.6> | |
100003dc: 7c09 ldrb r1, [r1, #16] | |
100003de: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
100003e2: 1c45 adds r5, r0, #1 | |
100003e4: b2e8 uxtb r0, r5 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
100003e6: 4281 cmp r1, r0 | |
100003e8: d101 bne 0x100003ee <critical_section::with+0x2a> @ imm = #2 | |
100003ea: 2402 movs r4, #2 | |
100003ec: e014 b 0x10000418 <critical_section::with+0x54> @ imm = #40 | |
100003ee: 9600 str r6, [sp] | |
100003f0: 4034 ands r4, r6 | |
100003f2: 4e1a ldr r6, [pc, #104] @ 0x1000045c <$d.6+0x4> | |
; if interrupts_active { | |
100003f4: d107 bne 0x10000406 <critical_section::with+0x42> @ imm = #14 | |
; $func($($args),*) | |
100003f6: f006 fb07 bl 0x10006a08 <__cpsid> @ imm = #26126 | |
100003fa: 6830 ldr r0, [r6] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
100003fc: 2800 cmp r0, #0 | |
100003fe: d107 bne 0x10000410 <critical_section::with+0x4c> @ imm = #14 | |
; $func($($args),*) | |
10000400: f006 fb04 bl 0x10006a0c <__cpsie> @ imm = #26120 | |
10000404: e7f7 b 0x100003f6 <critical_section::with+0x32> @ imm = #-18 | |
10000406: f006 faff bl 0x10006a08 <__cpsid> @ imm = #26110 | |
1000040a: 6830 ldr r0, [r6] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000040c: 2800 cmp r0, #0 | |
1000040e: d0fa beq 0x10000406 <critical_section::with+0x42> @ imm = #-12 | |
10000410: 4811 ldr r0, [pc, #68] @ 0x10000458 <$d.6> | |
10000412: 7405 strb r5, [r0, #16] | |
10000414: 9e00 ldr r6, [sp] | |
; interrupts_active as _ | |
10000416: 4074 eors r4, r6 | |
10000418: 4d11 ldr r5, [pc, #68] @ 0x10000460 <$d.6+0x8> | |
1000041a: 6828 ldr r0, [r5] | |
1000041c: 2800 cmp r0, #0 | |
1000041e: d113 bne 0x10000448 <critical_section::with+0x84> @ imm = #38 | |
10000420: 1d28 adds r0, r5, #4 | |
10000422: 22d8 movs r2, #216 | |
10000424: 9901 ldr r1, [sp, #4] | |
10000426: f006 facf bl 0x100069c8 <__aeabi_memcpy8> @ imm = #26014 | |
1000042a: 490b ldr r1, [pc, #44] @ 0x10000458 <$d.6> | |
1000042c: 720e strb r6, [r1, #8] | |
1000042e: 2000 movs r0, #0 | |
10000430: 6028 str r0, [r5] | |
; if token != LOCK_ALREADY_OWNED { | |
10000432: 2c02 cmp r4, #2 | |
10000434: d006 beq 0x10000444 <critical_section::with+0x80> @ imm = #12 | |
10000436: 7408 strb r0, [r1, #16] | |
10000438: 4808 ldr r0, [pc, #32] @ 0x1000045c <$d.6+0x4> | |
1000043a: 6006 str r6, [r0] | |
; if token != 0 { | |
1000043c: 2c00 cmp r4, #0 | |
1000043e: d001 beq 0x10000444 <critical_section::with+0x80> @ imm = #2 | |
; $func($($args),*) | |
10000440: f006 fae4 bl 0x10006a0c <__cpsie> @ imm = #26056 | |
; } | |
10000444: b003 add sp, #12 | |
10000446: bdf0 pop {r4, r5, r6, r7, pc} | |
10000448: 4806 ldr r0, [pc, #24] @ 0x10000464 <$d.6+0xc> | |
1000044a: 2110 movs r1, #16 | |
1000044c: aa02 add r2, sp, #8 | |
1000044e: 4b06 ldr r3, [pc, #24] @ 0x10000468 <$d.6+0x10> | |
10000450: f004 fb5c bl 0x10004b0c <core::result::unwrap_failed> @ imm = #18104 | |
10000454: defe trap | |
10000456: 46c0 mov r8, r8 | |
10000458 <$d.6>: | |
10000458: 18 ed 03 20 .word 0x2003ed18 | |
1000045c: 7c 01 00 d0 .word 0xd000017c | |
10000460: f0 c5 03 20 .word 0x2003c5f0 | |
10000464: 24 72 00 10 .word 0x10007224 | |
10000468: 34 72 00 10 .word 0x10007234 | |
1000046c <<&T as core::fmt::Display>::fmt>: | |
1000046c: b580 push {r7, lr} | |
1000046e: af00 add r7, sp, #0 | |
10000470: 460b mov r3, r1 | |
10000472: c806 ldm r0!, {r1, r2} | |
10000474: 4618 mov r0, r3 | |
10000476: f003 fcad bl 0x10003dd4 <core::fmt::Formatter::pad> @ imm = #14682 | |
1000047a: bd80 pop {r7, pc} | |
1000047c <<() as core::fmt::Debug>::fmt>: | |
1000047c: b580 push {r7, lr} | |
1000047e: af00 add r7, sp, #0 | |
10000480: 4608 mov r0, r1 | |
10000482: 4902 ldr r1, [pc, #8] @ 0x1000048c <$d.9> | |
10000484: 2202 movs r2, #2 | |
10000486: f003 fca5 bl 0x10003dd4 <core::fmt::Formatter::pad> @ imm = #14666 | |
1000048a: bd80 pop {r7, pc} | |
1000048c <$d.9>: | |
1000048c: 09 72 00 10 .word 0x10007209 | |
10000490 <core::ptr::drop_in_place<bool>>: | |
10000490: 4770 bx lr | |
10000492 <<&mut W as core::fmt::Write>::write_char>: | |
10000492: b5d0 push {r4, r6, r7, lr} | |
10000494: af02 add r7, sp, #8 | |
10000496: b082 sub sp, #8 | |
10000498: 6800 ldr r0, [r0] | |
1000049a: 2200 movs r2, #0 | |
1000049c: 9201 str r2, [sp, #4] | |
1000049e: 2980 cmp r1, #128 | |
100004a0: d203 bhs 0x100004aa <<&mut W as core::fmt::Write>::write_char+0x18> @ imm = #6 | |
100004a2: aa01 add r2, sp, #4 | |
100004a4: 7011 strb r1, [r2] | |
100004a6: 2201 movs r2, #1 | |
100004a8: e02f b 0x1000050a <<&mut W as core::fmt::Write>::write_char+0x78> @ imm = #94 | |
100004aa: 0aca lsrs r2, r1, #11 | |
100004ac: d10a bne 0x100004c4 <<&mut W as core::fmt::Write>::write_char+0x32> @ imm = #20 | |
100004ae: 223f movs r2, #63 | |
100004b0: 400a ands r2, r1 | |
100004b2: 3280 adds r2, #128 | |
100004b4: ab01 add r3, sp, #4 | |
100004b6: 705a strb r2, [r3, #1] | |
100004b8: 0989 lsrs r1, r1, #6 | |
100004ba: 22c0 movs r2, #192 | |
100004bc: 430a orrs r2, r1 | |
100004be: 701a strb r2, [r3] | |
100004c0: 2202 movs r2, #2 | |
100004c2: e022 b 0x1000050a <<&mut W as core::fmt::Write>::write_char+0x78> @ imm = #68 | |
100004c4: 0c0a lsrs r2, r1, #16 | |
100004c6: d10e bne 0x100004e6 <<&mut W as core::fmt::Write>::write_char+0x54> @ imm = #28 | |
100004c8: 223f movs r2, #63 | |
100004ca: 400a ands r2, r1 | |
100004cc: 3280 adds r2, #128 | |
100004ce: ab01 add r3, sp, #4 | |
100004d0: 709a strb r2, [r3, #2] | |
100004d2: 0b0a lsrs r2, r1, #12 | |
100004d4: 24e0 movs r4, #224 | |
100004d6: 4314 orrs r4, r2 | |
100004d8: 701c strb r4, [r3] | |
100004da: 0509 lsls r1, r1, #20 | |
100004dc: 0e89 lsrs r1, r1, #26 | |
100004de: 3180 adds r1, #128 | |
100004e0: 7059 strb r1, [r3, #1] | |
100004e2: 2203 movs r2, #3 | |
100004e4: e011 b 0x1000050a <<&mut W as core::fmt::Write>::write_char+0x78> @ imm = #34 | |
100004e6: 233f movs r3, #63 | |
100004e8: 400b ands r3, r1 | |
100004ea: 3380 adds r3, #128 | |
100004ec: aa01 add r2, sp, #4 | |
100004ee: 70d3 strb r3, [r2, #3] | |
100004f0: 050b lsls r3, r1, #20 | |
100004f2: 0e9b lsrs r3, r3, #26 | |
100004f4: 3380 adds r3, #128 | |
100004f6: 7093 strb r3, [r2, #2] | |
100004f8: 038b lsls r3, r1, #14 | |
100004fa: 0e9b lsrs r3, r3, #26 | |
100004fc: 3380 adds r3, #128 | |
100004fe: 7053 strb r3, [r2, #1] | |
10000500: 02c9 lsls r1, r1, #11 | |
10000502: 0f49 lsrs r1, r1, #29 | |
10000504: 31f0 adds r1, #240 | |
10000506: 7011 strb r1, [r2] | |
10000508: 2204 movs r2, #4 | |
1000050a: a901 add r1, sp, #4 | |
1000050c: f000 fb64 bl 0x10000bd8 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str> @ imm = #1736 | |
10000510: 2000 movs r0, #0 | |
10000512: b002 add sp, #8 | |
10000514: bdd0 pop {r4, r6, r7, pc} | |
10000516: d4d4 bmi 0x100004c2 <<&mut W as core::fmt::Write>::write_char+0x30> @ imm = #-88 | |
10000518 <<&mut W as core::fmt::Write>::write_fmt>: | |
10000518: b5b0 push {r4, r5, r7, lr} | |
1000051a: af02 add r7, sp, #8 | |
1000051c: b088 sub sp, #32 | |
1000051e: 6800 ldr r0, [r0] | |
10000520: 9001 str r0, [sp, #4] | |
10000522: aa02 add r2, sp, #8 | |
10000524: 4610 mov r0, r2 | |
10000526: c938 ldm r1!, {r3, r4, r5} | |
10000528: c038 stm r0!, {r3, r4, r5} | |
1000052a: c938 ldm r1!, {r3, r4, r5} | |
1000052c: c038 stm r0!, {r3, r4, r5} | |
1000052e: a801 add r0, sp, #4 | |
10000530: 4902 ldr r1, [pc, #8] @ 0x1000053c <$d.13> | |
10000532: f004 fa2d bl 0x10004990 <core::fmt::write> @ imm = #17498 | |
10000536: b008 add sp, #32 | |
10000538: bdb0 pop {r4, r5, r7, pc} | |
1000053a: 46c0 mov r8, r8 | |
1000053c <$d.13>: | |
1000053c: 0c 72 00 10 .word 0x1000720c | |
10000540 <<&mut W as core::fmt::Write>::write_str>: | |
10000540: b580 push {r7, lr} | |
10000542: af00 add r7, sp, #0 | |
10000544: 6800 ldr r0, [r0] | |
10000546: f000 fb47 bl 0x10000bd8 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str> @ imm = #1678 | |
1000054a: 2000 movs r0, #0 | |
1000054c: bd80 pop {r7, pc} | |
1000054e: d4d4 bmi 0x100004fa <<&mut W as core::fmt::Write>::write_char+0x68> @ imm = #-88 | |
10000550 <defmt::export::fmt>: | |
; pub fn fmt<T: Format + ?Sized>(f: &T) { | |
10000550: b5d0 push {r4, r6, r7, lr} | |
10000552: af02 add r7, sp, #8 | |
10000554: b082 sub sp, #8 | |
10000556: 4604 mov r4, r0 | |
10000558: 4668 mov r0, sp | |
1000055a: 4906 ldr r1, [pc, #24] @ 0x10000574 <$d.16> | |
1000055c: 8001 strh r1, [r0] | |
1000055e: 2102 movs r1, #2 | |
; unsafe { _defmt_write(bytes) } | |
10000560: f004 ffa4 bl 0x100054ac <_defmt_write> @ imm = #20296 | |
10000564: a801 add r0, sp, #4 | |
10000566: 7004 strb r4, [r0] | |
10000568: 2101 movs r1, #1 | |
; unsafe { _defmt_write(bytes) } | |
1000056a: f004 ff9f bl 0x100054ac <_defmt_write> @ imm = #20286 | |
; } | |
1000056e: b002 add sp, #8 | |
10000570: bdd0 pop {r4, r6, r7, pc} | |
10000572: 46c0 mov r8, r8 | |
10000574 <$d.16>: | |
10000574: 01 00 00 00 .word 0x00000001 | |
10000578 <neotron_pico_bios::vga::init>: | |
; pub fn init( | |
10000578: b5f0 push {r4, r5, r6, r7, lr} | |
1000057a: af03 add r7, sp, #12 | |
1000057c: b0b5 sub sp, #212 | |
1000057e: 2501 movs r5, #1 | |
10000580: 02aa lsls r2, r5, #10 | |
10000582: 4bea ldr r3, [pc, #936] @ 0x1000092c <$d.18> | |
10000584: 6818 ldr r0, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); | |
10000586: 4310 orrs r0, r2 | |
10000588: 6018 str r0, [r3] | |
1000058a: 6818 ldr r0, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 10)) | ((value as u32 & 0x01) << 10); | |
1000058c: 4390 bics r0, r2 | |
1000058e: 6018 str r0, [r3] | |
10000590: a90c add r1, sp, #48 | |
10000592: 3148 adds r1, #72 | |
10000594: a81f add r0, sp, #124 | |
; let mut array = ArrayVec::new(); | |
10000596: 3048 adds r0, #72 | |
10000598: 689c ldr r4, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000059a: 4214 tst r4, r2 | |
1000059c: d108 bne 0x100005b0 <neotron_pico_bios::vga::init+0x38> @ imm = #16 | |
1000059e: 689c ldr r4, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100005a0: 4214 tst r4, r2 | |
100005a2: d105 bne 0x100005b0 <neotron_pico_bios::vga::init+0x38> @ imm = #10 | |
100005a4: 689c ldr r4, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100005a6: 4214 tst r4, r2 | |
100005a8: d102 bne 0x100005b0 <neotron_pico_bios::vga::init+0x38> @ imm = #4 | |
100005aa: 689c ldr r4, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100005ac: 4214 tst r4, r2 | |
100005ae: d0f3 beq 0x10000598 <neotron_pico_bios::vga::init+0x20> @ imm = #-26 | |
100005b0: 2600 movs r6, #0 | |
; let (mut pio, sm0, sm1, _sm2, _sm3) = pio.split(resets); | |
100005b2: 960b str r6, [sp, #44] | |
100005b4: aa0c add r2, sp, #48 | |
100005b6: 2343 movs r3, #67 | |
; let timing_program = pio_proc::pio_asm!( | |
100005b8: 80d3 strh r3, [r2, #6] | |
100005ba: 4bf4 ldr r3, [pc, #976] @ 0x1000098c <$d.20> | |
100005bc: 461c mov r4, r3 | |
100005be: 34ee adds r4, #238 | |
100005c0: 8094 strh r4, [r2, #4] | |
100005c2: 461c mov r4, r3 | |
100005c4: 342c adds r4, #44 | |
100005c6: 8054 strh r4, [r2, #2] | |
100005c8: 8013 strh r3, [r2] | |
100005ca: 708e strb r6, [r1, #2] | |
100005cc: 2403 movs r4, #3 | |
100005ce: 9407 str r4, [sp, #28] | |
100005d0: 800c strh r4, [r1] | |
100005d2: 961d str r6, [sp, #116] | |
100005d4: 2104 movs r1, #4 | |
100005d6: 9106 str r1, [sp, #24] | |
100005d8: 911c str r1, [sp, #112] | |
; let pixel_program = pio_proc::pio_asm!( | |
100005da: 331e adds r3, #30 | |
100005dc: a91f add r1, sp, #124 | |
100005de: 804b strh r3, [r1, #2] | |
100005e0: 2383 movs r3, #131 | |
100005e2: 019b lsls r3, r3, #6 | |
100005e4: 800b strh r3, [r1] | |
100005e6: 7086 strb r6, [r0, #2] | |
100005e8: 2105 movs r1, #5 | |
100005ea: 9105 str r1, [sp, #20] | |
100005ec: 8001 strh r1, [r0] | |
100005ee: 9630 str r6, [sp, #192] | |
100005f0: 2006 movs r0, #6 | |
100005f2: 902f str r0, [sp, #188] | |
100005f4: 48e6 ldr r0, [pc, #920] @ 0x10000990 <$d.20+0x4> | |
100005f6: 9021 str r0, [sp, #132] | |
100005f8: 48e6 ldr r0, [pc, #920] @ 0x10000994 <$d.20+0x8> | |
100005fa: 9020 str r0, [sp, #128] | |
100005fc: ac32 add r4, sp, #200 | |
100005fe: a90b add r1, sp, #44 | |
; let timing_installed = pio.install(&timing_program.program).unwrap(); | |
10000600: 4620 mov r0, r4 | |
10000602: f7ff fe37 bl 0x10000274 <rp2040_hal::pio::PIO<P>::install> @ imm = #-914 | |
10000606: 78a0 ldrb r0, [r4, #2] | |
10000608: 2802 cmp r0, #2 | |
1000060a: d100 bne 0x1000060e <neotron_pico_bios::vga::init+0x96> @ imm = #0 | |
1000060c: e2aa b 0x10000b64 <$t.21+0x1ac> @ imm = #1364 | |
1000060e: 9933 ldr r1, [sp, #204] | |
10000610: 9832 ldr r0, [sp, #200] | |
10000612: 4ae1 ldr r2, [pc, #900] @ 0x10000998 <$d.20+0xc> | |
10000614: 6015 str r5, [r2] | |
10000616: 4ae1 ldr r2, [pc, #900] @ 0x1000099c <$d.20+0x10> | |
10000618: 3a2c subs r2, #44 | |
1000061a: 042b lsls r3, r5, #16 | |
1000061c: 9309 str r3, [sp, #36] | |
1000061e: 6013 str r3, [r2] | |
10000620: 22ff movs r2, #255 | |
10000622: 0614 lsls r4, r2, #24 | |
; self.pindirs | |
10000624: 4603 mov r3, r0 | |
10000626: 9400 str r4, [sp] | |
10000628: 4023 ands r3, r4 | |
1000062a: 1e5c subs r4, r3, #1 | |
1000062c: 41a3 sbcs r3, r4 | |
; self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); | |
1000062e: 075b lsls r3, r3, #29 | |
10000630: 0414 lsls r4, r2, #16 | |
; self.opt | |
10000632: 4602 mov r2, r0 | |
10000634: 9401 str r4, [sp, #4] | |
10000636: 4022 ands r2, r4 | |
10000638: 1e54 subs r4, r2, #1 | |
1000063a: 41a2 sbcs r2, r4 | |
; self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); | |
1000063c: 0792 lsls r2, r2, #30 | |
; self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); | |
1000063e: 18d3 adds r3, r2, r3 | |
; let offset = self.program.offset; | |
10000640: 0c0a lsrs r2, r1, #16 | |
; w.wrap_top().bits(offset + self.program.wrap.source); | |
10000642: 188c adds r4, r1, r2 | |
; self.w.bits = (self.w.bits & !(0x1f << 12)) | ((value as u32 & 0x1f) << 12); | |
10000644: 06e4 lsls r4, r4, #27 | |
10000646: 0be4 lsrs r4, r4, #15 | |
10000648: 18e3 adds r3, r4, r3 | |
; w.wrap_bottom().bits(offset + self.program.wrap.target); | |
1000064a: 0a09 lsrs r1, r1, #8 | |
1000064c: 1889 adds r1, r1, r2 | |
; self.w.bits = (self.w.bits & !(0x1f << 7)) | ((value as u32 & 0x1f) << 7); | |
1000064e: 06c9 lsls r1, r1, #27 | |
10000650: 0d09 lsrs r1, r1, #20 | |
10000652: 1859 adds r1, r3, r1 | |
10000654: 4cd1 ldr r4, [pc, #836] @ 0x1000099c <$d.20+0x10> | |
10000656: 4623 mov r3, r4 | |
10000658: 3b28 subs r3, #40 | |
1000065a: 9308 str r3, [sp, #32] | |
1000065c: 6019 str r1, [r3] | |
1000065e: 4621 mov r1, r4 | |
10000660: 3924 subs r1, #36 | |
10000662: 4bcf ldr r3, [pc, #828] @ 0x100009a0 <$d.20+0x14> | |
10000664: 600b str r3, [r1] | |
10000666: 21a1 movs r1, #161 | |
10000668: 0549 lsls r1, r1, #21 | |
; self.w.bits = (self.w.bits & !(0x07 << 29)) | ((value as u32 & 0x07) << 29); | |
1000066a: 0740 lsls r0, r0, #29 | |
; self.w.bits = (self.w.bits & !(0x3f << 20)) | ((value as u32 & 0x3f) << 20); | |
1000066c: 1840 adds r0, r0, r1 | |
1000066e: 462b mov r3, r5 | |
10000670: 950a str r5, [sp, #40] | |
10000672: 4625 mov r5, r4 | |
10000674: 3d18 subs r5, #24 | |
10000676: 6028 str r0, [r5] | |
10000678: 49ca ldr r1, [pc, #808] @ 0x100009a4 <$d.20+0x18> | |
1000067a: 2010 movs r0, #16 | |
1000067c: 6008 str r0, [r1] | |
1000067e: 0218 lsls r0, r3, #8 | |
10000680: 9002 str r0, [sp, #8] | |
10000682: 6008 str r0, [r1] | |
10000684: a832 add r0, sp, #200 | |
; let instr = InstructionOperands::JMP { | |
10000686: 7042 strb r2, [r0, #1] | |
10000688: 7086 strb r6, [r0, #2] | |
1000068a: 7006 strb r6, [r0] | |
1000068c: f006 f8d6 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #25004 | |
10000690: 3c1c subs r4, #28 | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
10000692: b280 uxth r0, r0 | |
10000694: 6020 str r0, [r4] | |
; let set_output_instr = InstructionOperands::SET { | |
10000696: 48c4 ldr r0, [pc, #784] @ 0x100009a8 <$d.20+0x1c> | |
10000698: f006 f8d0 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #24992 | |
1000069c: 9004 str r0, [sp, #16] | |
; let set_input_instr = InstructionOperands::SET { | |
1000069e: 48c3 ldr r0, [pc, #780] @ 0x100009ac <$d.20+0x20> | |
100006a0: f006 f8cc bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #24984 | |
100006a4: 6828 ldr r0, [r5] | |
100006a6: 9003 str r0, [sp, #12] | |
100006a8: 9808 ldr r0, [sp, #32] | |
100006aa: 6801 ldr r1, [r0] | |
100006ac: 4bc0 ldr r3, [pc, #768] @ 0x100009b0 <$d.20+0x24> | |
; self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); | |
100006ae: 460a mov r2, r1 | |
100006b0: 401a ands r2, r3 | |
100006b2: 6002 str r2, [r0] | |
100006b4: 9a0a ldr r2, [sp, #40] | |
100006b6: 0693 lsls r3, r2, #26 | |
100006b8: 602b str r3, [r5] | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
100006ba: 9a04 ldr r2, [sp, #16] | |
100006bc: b292 uxth r2, r2 | |
100006be: 6022 str r2, [r4] | |
100006c0: 9304 str r3, [sp, #16] | |
100006c2: 3320 adds r3, #32 | |
100006c4: 602b str r3, [r5] | |
100006c6: 6022 str r2, [r4] | |
100006c8: 9a03 ldr r2, [sp, #12] | |
100006ca: 602a str r2, [r5] | |
100006cc: 6001 str r1, [r0] | |
100006ce: ac32 add r4, sp, #200 | |
100006d0: a90b add r1, sp, #44 | |
100006d2: aa1f add r2, sp, #124 | |
; let pixels_installed = pio.install(&pixel_program.program).unwrap(); | |
100006d4: 4620 mov r0, r4 | |
100006d6: f7ff fdcd bl 0x10000274 <rp2040_hal::pio::PIO<P>::install> @ imm = #-1126 | |
100006da: 78a0 ldrb r0, [r4, #2] | |
100006dc: 2802 cmp r0, #2 | |
100006de: d100 bne 0x100006e2 <neotron_pico_bios::vga::init+0x16a> @ imm = #0 | |
100006e0: e240 b 0x10000b64 <$t.21+0x1ac> @ imm = #1152 | |
100006e2: 9933 ldr r1, [sp, #204] | |
100006e4: 9832 ldr r0, [sp, #200] | |
100006e6: 2202 movs r2, #2 | |
100006e8: 9203 str r2, [sp, #12] | |
100006ea: 4bab ldr r3, [pc, #684] @ 0x10000998 <$d.20+0xc> | |
100006ec: 601a str r2, [r3] | |
100006ee: 4dab ldr r5, [pc, #684] @ 0x1000099c <$d.20+0x10> | |
100006f0: 462a mov r2, r5 | |
100006f2: 3a14 subs r2, #20 | |
100006f4: 9b09 ldr r3, [sp, #36] | |
100006f6: 6013 str r3, [r2] | |
100006f8: 9a00 ldr r2, [sp] | |
; self.pindirs | |
100006fa: 4002 ands r2, r0 | |
; self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); | |
100006fc: d104 bne 0x10000708 <neotron_pico_bios::vga::init+0x190> @ imm = #8 | |
100006fe: 9c0a ldr r4, [sp, #40] | |
10000700: 9b01 ldr r3, [sp, #4] | |
; self.opt | |
10000702: 4003 ands r3, r0 | |
; self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); | |
10000704: d105 bne 0x10000712 <neotron_pico_bios::vga::init+0x19a> @ imm = #10 | |
10000706: e005 b 0x10000714 <neotron_pico_bios::vga::init+0x19c> @ imm = #10 | |
10000708: 9c0a ldr r4, [sp, #40] | |
1000070a: 0762 lsls r2, r4, #29 | |
1000070c: 9b01 ldr r3, [sp, #4] | |
; self.opt | |
1000070e: 4003 ands r3, r0 | |
; self.w.bits = (self.w.bits & !(0x01 << 30)) | ((value as u32 & 0x01) << 30); | |
10000710: d000 beq 0x10000714 <neotron_pico_bios::vga::init+0x19c> @ imm = #0 | |
10000712: 07a3 lsls r3, r4, #30 | |
; self.w.bits = (self.w.bits & !(0x01 << 29)) | ((value as u32 & 0x01) << 29); | |
10000714: 4313 orrs r3, r2 | |
; let offset = self.program.offset; | |
10000716: 0c0a lsrs r2, r1, #16 | |
10000718: 461c mov r4, r3 | |
; w.wrap_top().bits(offset + self.program.wrap.source); | |
1000071a: 188b adds r3, r1, r2 | |
; self.w.bits = (self.w.bits & !(0x1f << 12)) | ((value as u32 & 0x1f) << 12); | |
1000071c: 06db lsls r3, r3, #27 | |
1000071e: 0bdb lsrs r3, r3, #15 | |
10000720: 4323 orrs r3, r4 | |
; w.wrap_bottom().bits(offset + self.program.wrap.target); | |
10000722: 0a09 lsrs r1, r1, #8 | |
10000724: 1889 adds r1, r1, r2 | |
; self.w.bits = (self.w.bits & !(0x1f << 7)) | ((value as u32 & 0x1f) << 7); | |
10000726: 06c9 lsls r1, r1, #27 | |
10000728: 0d09 lsrs r1, r1, #20 | |
1000072a: 4319 orrs r1, r3 | |
1000072c: 462b mov r3, r5 | |
1000072e: 3b10 subs r3, #16 | |
10000730: 9308 str r3, [sp, #32] | |
10000732: 6019 str r1, [r3] | |
10000734: 4629 mov r1, r5 | |
10000736: 390c subs r1, #12 | |
10000738: 4b99 ldr r3, [pc, #612] @ 0x100009a0 <$d.20+0x14> | |
1000073a: 600b str r3, [r1] | |
; self.w.bits = (self.w.bits & !(0x07 << 29)) | ((value as u32 & 0x07) << 29); | |
1000073c: 0740 lsls r0, r0, #29 | |
1000073e: 499d ldr r1, [pc, #628] @ 0x100009b4 <$d.20+0x28> | |
; self.w.bits = (self.w.bits & !0x1f) | (value as u32 & 0x1f); | |
10000740: 1840 adds r0, r0, r1 | |
10000742: 6028 str r0, [r5] | |
10000744: 2020 movs r0, #32 | |
10000746: 4997 ldr r1, [pc, #604] @ 0x100009a4 <$d.20+0x18> | |
10000748: 6008 str r0, [r1] | |
1000074a: 980a ldr r0, [sp, #40] | |
1000074c: 0240 lsls r0, r0, #9 | |
1000074e: 6008 str r0, [r1] | |
10000750: a832 add r0, sp, #200 | |
; let instr = InstructionOperands::JMP { | |
10000752: 7042 strb r2, [r0, #1] | |
10000754: 7086 strb r6, [r0, #2] | |
10000756: 7006 strb r6, [r0] | |
10000758: f006 f870 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #24800 | |
1000075c: 1f2c subs r4, r5, #4 | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
1000075e: b280 uxth r0, r0 | |
10000760: 6020 str r0, [r4] | |
; let set_output_instr = InstructionOperands::SET { | |
10000762: 4891 ldr r0, [pc, #580] @ 0x100009a8 <$d.20+0x1c> | |
10000764: f006 f86a bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #24788 | |
10000768: 9000 str r0, [sp] | |
; let set_input_instr = InstructionOperands::SET { | |
1000076a: 4890 ldr r0, [pc, #576] @ 0x100009ac <$d.20+0x20> | |
1000076c: f006 f866 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #24780 | |
10000770: 6828 ldr r0, [r5] | |
10000772: 9001 str r0, [sp, #4] | |
10000774: 9a08 ldr r2, [sp, #32] | |
10000776: 6811 ldr r1, [r2] | |
10000778: 488d ldr r0, [pc, #564] @ 0x100009b0 <$d.20+0x24> | |
; self.w.bits = (self.w.bits & !(0x01 << 17)) | ((value as u32 & 0x01) << 17); | |
1000077a: 4008 ands r0, r1 | |
1000077c: 6010 str r0, [r2] | |
1000077e: 9804 ldr r0, [sp, #16] | |
10000780: 4602 mov r2, r0 | |
10000782: 3240 adds r2, #64 | |
10000784: 602a str r2, [r5] | |
10000786: 9a00 ldr r2, [sp] | |
10000788: b292 uxth r2, r2 | |
1000078a: 6022 str r2, [r4] | |
1000078c: 4603 mov r3, r0 | |
1000078e: 3360 adds r3, #96 | |
10000790: 602b str r3, [r5] | |
10000792: 6022 str r2, [r4] | |
10000794: 4603 mov r3, r0 | |
10000796: 3380 adds r3, #128 | |
10000798: 602b str r3, [r5] | |
1000079a: 6022 str r2, [r4] | |
1000079c: 4603 mov r3, r0 | |
1000079e: 33a0 adds r3, #160 | |
100007a0: 602b str r3, [r5] | |
100007a2: 6022 str r2, [r4] | |
100007a4: 4603 mov r3, r0 | |
100007a6: 33c0 adds r3, #192 | |
100007a8: 602b str r3, [r5] | |
100007aa: 6022 str r2, [r4] | |
100007ac: 30e0 adds r0, #224 | |
100007ae: 6028 str r0, [r5] | |
100007b0: 6022 str r2, [r4] | |
100007b2: 4bf4 ldr r3, [pc, #976] @ 0x10000b84 <$d.22+0x4> | |
100007b4: 602b str r3, [r5] | |
100007b6: 6022 str r2, [r4] | |
100007b8: 4628 mov r0, r5 | |
100007ba: 461d mov r5, r3 | |
100007bc: 3520 adds r5, #32 | |
100007be: 6005 str r5, [r0] | |
100007c0: 6022 str r2, [r4] | |
100007c2: 461d mov r5, r3 | |
100007c4: 3540 adds r5, #64 | |
100007c6: 6005 str r5, [r0] | |
100007c8: 6022 str r2, [r4] | |
100007ca: 461d mov r5, r3 | |
100007cc: 3560 adds r5, #96 | |
100007ce: 6005 str r5, [r0] | |
100007d0: 6022 str r2, [r4] | |
100007d2: 461d mov r5, r3 | |
100007d4: 3580 adds r5, #128 | |
100007d6: 6005 str r5, [r0] | |
100007d8: 9d0a ldr r5, [sp, #40] | |
100007da: 6022 str r2, [r4] | |
100007dc: 33a0 adds r3, #160 | |
100007de: 6003 str r3, [r0] | |
100007e0: 6022 str r2, [r4] | |
100007e2: 9a01 ldr r2, [sp, #4] | |
100007e4: 6002 str r2, [r0] | |
100007e6: 9808 ldr r0, [sp, #32] | |
100007e8: 6001 str r1, [r0] | |
100007ea: 9805 ldr r0, [sp, #20] | |
100007ec: 0700 lsls r0, r0, #28 | |
100007ee: 2119 movs r1, #25 | |
100007f0: 60c1 str r1, [r0, #12] | |
100007f2: 49e5 ldr r1, [pc, #916] @ 0x10000b88 <$d.22+0x8> | |
100007f4: 3110 adds r1, #16 | |
100007f6: 6001 str r1, [r0] | |
100007f8: 49e4 ldr r1, [pc, #912] @ 0x10000b8c <$d.22+0xc> | |
100007fa: 6041 str r1, [r0, #4] | |
100007fc: 9a06 ldr r2, [sp, #24] | |
100007fe: 6082 str r2, [r0, #8] | |
10000800: 4ae3 ldr r2, [pc, #908] @ 0x10000b90 <$d.22+0x10> | |
10000802: 64c2 str r2, [r0, #76] | |
10000804: 4ae3 ldr r2, [pc, #908] @ 0x10000b94 <$d.22+0x14> | |
10000806: 6402 str r2, [r0, #64] | |
10000808: 1d09 adds r1, r1, #4 | |
1000080a: 6441 str r1, [r0, #68] | |
1000080c: 9902 ldr r1, [sp, #8] | |
1000080e: 3141 adds r1, #65 | |
10000810: 6481 str r1, [r0, #72] | |
10000812: 48e1 ldr r0, [pc, #900] @ 0x10000b98 <$d.22+0x18> | |
10000814: 9907 ldr r1, [sp, #28] | |
10000816: 6001 str r1, [r0] | |
10000818: 62c1 str r1, [r0, #44] | |
; DMA_PERIPH = Some(dma); | |
1000081a: 48e0 ldr r0, [pc, #896] @ 0x10000b9c <$d.22+0x1c> | |
1000081c: 70c5 strb r5, [r0, #3] | |
1000081e: 49d8 ldr r1, [pc, #864] @ 0x10000b80 <$d.22> | |
10000820: 600d str r5, [r1] | |
10000822: 9803 ldr r0, [sp, #12] | |
10000824: 6008 str r0, [r1] | |
10000826: 4cde ldr r4, [pc, #888] @ 0x10000ba0 <$d.22+0x20> | |
10000828: 6820 ldr r0, [r4] | |
1000082a: 9909 ldr r1, [sp, #36] | |
; self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); | |
1000082c: 4308 orrs r0, r1 | |
1000082e: 6020 str r0, [r4] | |
10000830: 6820 ldr r0, [r4] | |
; while !psm.frce_off.read().proc1().bit_is_set() { | |
10000832: 4208 tst r0, r1 | |
10000834: d105 bne 0x10000842 <neotron_pico_bios::vga::init+0x2ca> @ imm = #10 | |
; $func($($args),*) | |
10000836: f006 f8f0 bl 0x10006a1a <__nop> @ imm = #25056 | |
1000083a: 9909 ldr r1, [sp, #36] | |
1000083c: 6820 ldr r0, [r4] | |
; while !psm.frce_off.read().proc1().bit_is_set() { | |
1000083e: 4208 tst r0, r1 | |
10000840: d0f9 beq 0x10000836 <neotron_pico_bios::vga::init+0x2be> @ imm = #-14 | |
10000842: 6820 ldr r0, [r4] | |
; self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); | |
10000844: 4388 bics r0, r1 | |
10000846: 6020 str r0, [r4] | |
; stack[stack.len() - 3] = main_func as *const () as usize; | |
10000848: 48d6 ldr r0, [pc, #856] @ 0x10000ba4 <$d.22+0x24> | |
1000084a: 0881 lsrs r1, r0, #2 | |
1000084c: 2902 cmp r1, #2 | |
1000084e: d800 bhi 0x10000852 <neotron_pico_bios::vga::init+0x2da> @ imm = #0 | |
10000850: e184 b 0x10000b5c <$t.21+0x1a4> @ imm = #776 | |
10000852: 9a07 ldr r2, [sp, #28] | |
10000854: 4390 bics r0, r2 | |
10000856: 4ad4 ldr r2, [pc, #848] @ 0x10000ba8 <$d.22+0x28> | |
; stack[stack.len() - 1] = core1_wrapper as *const () as usize; | |
10000858: 1883 adds r3, r0, r2 | |
; stack[stack.len() - 2] = stack.as_ptr() as *const _ as usize; | |
1000085a: 4618 mov r0, r3 | |
1000085c: 3808 subs r0, #8 | |
1000085e: 6002 str r2, [r0] | |
; stack[stack.len() - 1] = core1_wrapper as *const () as usize; | |
10000860: 1f18 subs r0, r3, #4 | |
; stack[stack.len() - 3] = main_func as *const () as usize; | |
10000862: 3b0c subs r3, #12 | |
10000864: 4ad1 ldr r2, [pc, #836] @ 0x10000bac <$d.22+0x2c> | |
10000866: 9309 str r3, [sp, #36] | |
10000868: 601a str r2, [r3] | |
; stack[stack.len() - 1] = core1_wrapper as *const () as usize; | |
1000086a: 4ad1 ldr r2, [pc, #836] @ 0x10000bb0 <$d.22+0x30> | |
1000086c: 6002 str r2, [r0] | |
1000086e: 2903 cmp r1, #3 | |
10000870: d100 bne 0x10000874 <neotron_pico_bios::vga::init+0x2fc> @ imm = #0 | |
10000872: e17e b 0x10000b72 <$t.21+0x1ba> @ imm = #764 | |
10000874: 48cf ldr r0, [pc, #828] @ 0x10000bb4 <$d.22+0x34> | |
10000876: 6804 ldr r4, [r0] | |
10000878: 48cf ldr r0, [pc, #828] @ 0x10000bb8 <$d.22+0x38> | |
1000087a: 6800 ldr r0, [r0] | |
1000087c: 9006 str r0, [sp, #24] | |
1000087e: 03e9 lsls r1, r5, #15 | |
10000880: 48ce ldr r0, [pc, #824] @ 0x10000bbc <$d.22+0x3c> | |
10000882: 9107 str r1, [sp, #28] | |
10000884: 6001 str r1, [r0] | |
10000886: 4dce ldr r5, [pc, #824] @ 0x10000bc0 <$d.22+0x40> | |
10000888: 48ce ldr r0, [pc, #824] @ 0x10000bc4 <$d.22+0x44> | |
1000088a: 1c40 adds r0, r0, #1 | |
; 'outer: loop { | |
1000088c: 9008 str r0, [sp, #32] | |
1000088e: e002 b 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #4 | |
10000890: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
10000892: 2800 cmp r0, #0 | |
10000894: d014 beq 0x100008c0 <neotron_pico_bios::vga::init+0x348> @ imm = #40 | |
10000896: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000898: 07c0 lsls r0, r0, #31 | |
1000089a: d100 bne 0x1000089e <neotron_pico_bios::vga::init+0x326> @ imm = #0 | |
1000089c: e08c b 0x100009b8 <$t.21> @ imm = #280 | |
1000089e: 68a8 ldr r0, [r5, #8] | |
100008a0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008a2: 07c0 lsls r0, r0, #31 | |
100008a4: d100 bne 0x100008a8 <neotron_pico_bios::vga::init+0x330> @ imm = #0 | |
100008a6: e087 b 0x100009b8 <$t.21> @ imm = #270 | |
100008a8: 68a8 ldr r0, [r5, #8] | |
100008aa: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008ac: 07c0 lsls r0, r0, #31 | |
100008ae: d100 bne 0x100008b2 <neotron_pico_bios::vga::init+0x33a> @ imm = #0 | |
100008b0: e082 b 0x100009b8 <$t.21> @ imm = #260 | |
100008b2: 68a8 ldr r0, [r5, #8] | |
100008b4: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008b6: 07c0 lsls r0, r0, #31 | |
100008b8: d07e beq 0x100009b8 <$t.21> @ imm = #252 | |
100008ba: 68a8 ldr r0, [r5, #8] | |
100008bc: e7eb b 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-42 | |
100008be: 68a8 ldr r0, [r5, #8] | |
100008c0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008c2: 07c0 lsls r0, r0, #31 | |
100008c4: d00b beq 0x100008de <neotron_pico_bios::vga::init+0x366> @ imm = #22 | |
100008c6: 68a8 ldr r0, [r5, #8] | |
100008c8: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008ca: 07c0 lsls r0, r0, #31 | |
100008cc: d007 beq 0x100008de <neotron_pico_bios::vga::init+0x366> @ imm = #14 | |
100008ce: 68a8 ldr r0, [r5, #8] | |
100008d0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008d2: 07c0 lsls r0, r0, #31 | |
100008d4: d003 beq 0x100008de <neotron_pico_bios::vga::init+0x366> @ imm = #6 | |
100008d6: 68a8 ldr r0, [r5, #8] | |
100008d8: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008da: 07c0 lsls r0, r0, #31 | |
100008dc: d1ef bne 0x100008be <neotron_pico_bios::vga::init+0x346> @ imm = #-34 | |
; $func($($args),*) | |
100008de: f006 f8a1 bl 0x10006a24 <__sev> @ imm = #24898 | |
100008e2: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
100008e4: 0780 lsls r0, r0, #30 | |
100008e6: d404 bmi 0x100008f2 <neotron_pico_bios::vga::init+0x37a> @ imm = #8 | |
; $func($($args),*) | |
100008e8: f006 f897 bl 0x10006a1a <__nop> @ imm = #24878 | |
100008ec: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
100008ee: 0780 lsls r0, r0, #30 | |
100008f0: d5fa bpl 0x100008e8 <neotron_pico_bios::vga::init+0x370> @ imm = #-12 | |
100008f2: 606e str r6, [r5, #4] | |
; $func($($args),*) | |
100008f4: f006 f896 bl 0x10006a24 <__sev> @ imm = #24876 | |
100008f8: f006 f894 bl 0x10006a24 <__sev> @ imm = #24872 | |
100008fc: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100008fe: 07c0 lsls r0, r0, #31 | |
10000900: d10f bne 0x10000922 <neotron_pico_bios::vga::init+0x3aa> @ imm = #30 | |
10000902: 6828 ldr r0, [r5] | |
10000904: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000906: 07c0 lsls r0, r0, #31 | |
10000908: d10b bne 0x10000922 <neotron_pico_bios::vga::init+0x3aa> @ imm = #22 | |
1000090a: 6828 ldr r0, [r5] | |
1000090c: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
1000090e: 07c0 lsls r0, r0, #31 | |
10000910: d107 bne 0x10000922 <neotron_pico_bios::vga::init+0x3aa> @ imm = #14 | |
10000912: 6828 ldr r0, [r5] | |
10000914: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000916: 07c0 lsls r0, r0, #31 | |
10000918: d103 bne 0x10000922 <neotron_pico_bios::vga::init+0x3aa> @ imm = #6 | |
1000091a: 6828 ldr r0, [r5] | |
1000091c: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
1000091e: 07c0 lsls r0, r0, #31 | |
10000920: d0ef beq 0x10000902 <neotron_pico_bios::vga::init+0x38a> @ imm = #-34 | |
10000922: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
10000924: 2800 cmp r0, #0 | |
10000926: d1b6 bne 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-148 | |
10000928: e004 b 0x10000934 <$t.19+0x4> @ imm = #8 | |
1000092a: 46c0 mov r8, r8 | |
1000092c <$d.18>: | |
1000092c: 00 c0 00 40 .word 0x4000c000 | |
10000930 <$t.19>: | |
; $func($($args),*) | |
10000930: f006 f873 bl 0x10006a1a <__nop> @ imm = #24806 | |
10000934: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000936: 0780 lsls r0, r0, #30 | |
10000938: d5fa bpl 0x10000930 <$t.19> @ imm = #-12 | |
1000093a: 980a ldr r0, [sp, #40] | |
1000093c: 6068 str r0, [r5, #4] | |
; $func($($args),*) | |
1000093e: f006 f871 bl 0x10006a24 <__sev> @ imm = #24802 | |
10000942: f006 f86f bl 0x10006a24 <__sev> @ imm = #24798 | |
10000946: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000948: 07c0 lsls r0, r0, #31 | |
1000094a: d10f bne 0x1000096c <$t.19+0x3c> @ imm = #30 | |
1000094c: 6828 ldr r0, [r5] | |
1000094e: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000950: 07c0 lsls r0, r0, #31 | |
10000952: d10b bne 0x1000096c <$t.19+0x3c> @ imm = #22 | |
10000954: 6828 ldr r0, [r5] | |
10000956: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000958: 07c0 lsls r0, r0, #31 | |
1000095a: d107 bne 0x1000096c <$t.19+0x3c> @ imm = #14 | |
1000095c: 6828 ldr r0, [r5] | |
1000095e: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000960: 07c0 lsls r0, r0, #31 | |
10000962: d103 bne 0x1000096c <$t.19+0x3c> @ imm = #6 | |
10000964: 6828 ldr r0, [r5] | |
10000966: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000968: 07c0 lsls r0, r0, #31 | |
1000096a: d0ef beq 0x1000094c <$t.19+0x1c> @ imm = #-34 | |
1000096c: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
1000096e: 2801 cmp r0, #1 | |
10000970: d191 bne 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-222 | |
10000972: 6828 ldr r0, [r5] | |
; if *cmd == 0 { | |
10000974: 2c00 cmp r4, #0 | |
10000976: d048 beq 0x10000a0a <$t.21+0x52> @ imm = #144 | |
; while !self.is_write_ready() { | |
10000978: 0780 lsls r0, r0, #30 | |
1000097a: 4620 mov r0, r4 | |
1000097c: d45f bmi 0x10000a3e <$t.21+0x86> @ imm = #190 | |
; $func($($args),*) | |
1000097e: f006 f84c bl 0x10006a1a <__nop> @ imm = #24728 | |
10000982: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000984: 0780 lsls r0, r0, #30 | |
10000986: d5fa bpl 0x1000097e <$t.19+0x4e> @ imm = #-12 | |
10000988: 4620 mov r0, r4 | |
1000098a: e058 b 0x10000a3e <$t.21+0x86> @ imm = #176 | |
1000098c <$d.20>: | |
1000098c: 02 60 00 00 .word 0x00006002 | |
10000990: 42 00 03 a0 .word 0xa0030042 | |
10000994: 10 64 10 63 .word 0x63106410 | |
10000998: 00 30 20 50 .word 0x50203000 | |
1000099c: f4 00 20 50 .word 0x502000f4 | |
100009a0: 00 00 0a 40 .word 0x400a0000 | |
100009a4: 00 20 20 50 .word 0x50202000 | |
100009a8: b4 71 00 10 .word 0x100071b4 | |
100009ac: b9 71 00 10 .word 0x100071b9 | |
100009b0: ff ff fd ff .word 0xfffdffff | |
100009b4: 02 00 c0 14 .word 0x14c00002 | |
100009b8 <$t.21>: | |
; $func($($args),*) | |
100009b8: f006 f834 bl 0x10006a24 <__sev> @ imm = #24680 | |
100009bc: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
100009be: 0780 lsls r0, r0, #30 | |
100009c0: d404 bmi 0x100009cc <$t.21+0x14> @ imm = #8 | |
; $func($($args),*) | |
100009c2: f006 f82a bl 0x10006a1a <__nop> @ imm = #24660 | |
100009c6: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
100009c8: 0780 lsls r0, r0, #30 | |
100009ca: d5fa bpl 0x100009c2 <$t.21+0xa> @ imm = #-12 | |
100009cc: 606e str r6, [r5, #4] | |
; $func($($args),*) | |
100009ce: f006 f829 bl 0x10006a24 <__sev> @ imm = #24658 | |
100009d2: f006 f827 bl 0x10006a24 <__sev> @ imm = #24654 | |
100009d6: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100009d8: 07c0 lsls r0, r0, #31 | |
100009da: d000 beq 0x100009de <$t.21+0x26> @ imm = #0 | |
100009dc: e758 b 0x10000890 <neotron_pico_bios::vga::init+0x318> @ imm = #-336 | |
100009de: 6828 ldr r0, [r5] | |
100009e0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100009e2: 07c0 lsls r0, r0, #31 | |
100009e4: d000 beq 0x100009e8 <$t.21+0x30> @ imm = #0 | |
100009e6: e753 b 0x10000890 <neotron_pico_bios::vga::init+0x318> @ imm = #-346 | |
100009e8: 6828 ldr r0, [r5] | |
100009ea: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100009ec: 07c0 lsls r0, r0, #31 | |
100009ee: d000 beq 0x100009f2 <$t.21+0x3a> @ imm = #0 | |
100009f0: e74e b 0x10000890 <neotron_pico_bios::vga::init+0x318> @ imm = #-356 | |
100009f2: 6828 ldr r0, [r5] | |
100009f4: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
100009f6: 07c0 lsls r0, r0, #31 | |
100009f8: d000 beq 0x100009fc <$t.21+0x44> @ imm = #0 | |
100009fa: e749 b 0x10000890 <neotron_pico_bios::vga::init+0x318> @ imm = #-366 | |
100009fc: 6828 ldr r0, [r5] | |
100009fe: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a00: 07c0 lsls r0, r0, #31 | |
10000a02: d0ec beq 0x100009de <$t.21+0x26> @ imm = #-40 | |
10000a04: e744 b 0x10000890 <neotron_pico_bios::vga::init+0x318> @ imm = #-376 | |
10000a06: 68a8 ldr r0, [r5, #8] | |
10000a08: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a0a: 07c0 lsls r0, r0, #31 | |
10000a0c: d00b beq 0x10000a26 <$t.21+0x6e> @ imm = #22 | |
10000a0e: 68a8 ldr r0, [r5, #8] | |
10000a10: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a12: 07c0 lsls r0, r0, #31 | |
10000a14: d007 beq 0x10000a26 <$t.21+0x6e> @ imm = #14 | |
10000a16: 68a8 ldr r0, [r5, #8] | |
10000a18: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a1a: 07c0 lsls r0, r0, #31 | |
10000a1c: d003 beq 0x10000a26 <$t.21+0x6e> @ imm = #6 | |
10000a1e: 68a8 ldr r0, [r5, #8] | |
10000a20: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a22: 07c0 lsls r0, r0, #31 | |
10000a24: d1ef bne 0x10000a06 <$t.21+0x4e> @ imm = #-34 | |
; $func($($args),*) | |
10000a26: f005 fffd bl 0x10006a24 <__sev> @ imm = #24570 | |
10000a2a: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000a2c: 0780 lsls r0, r0, #30 | |
10000a2e: 4630 mov r0, r6 | |
10000a30: d405 bmi 0x10000a3e <$t.21+0x86> @ imm = #10 | |
; $func($($args),*) | |
10000a32: f005 fff2 bl 0x10006a1a <__nop> @ imm = #24548 | |
10000a36: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000a38: 0780 lsls r0, r0, #30 | |
10000a3a: d5fa bpl 0x10000a32 <$t.21+0x7a> @ imm = #-12 | |
10000a3c: 4630 mov r0, r6 | |
10000a3e: 6068 str r0, [r5, #4] | |
10000a40: f005 fff0 bl 0x10006a24 <__sev> @ imm = #24544 | |
10000a44: f005 ffee bl 0x10006a24 <__sev> @ imm = #24540 | |
10000a48: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a4a: 07c0 lsls r0, r0, #31 | |
10000a4c: d10f bne 0x10000a6e <$t.21+0xb6> @ imm = #30 | |
10000a4e: 6828 ldr r0, [r5] | |
10000a50: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a52: 07c0 lsls r0, r0, #31 | |
10000a54: d10b bne 0x10000a6e <$t.21+0xb6> @ imm = #22 | |
10000a56: 6828 ldr r0, [r5] | |
10000a58: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a5a: 07c0 lsls r0, r0, #31 | |
10000a5c: d107 bne 0x10000a6e <$t.21+0xb6> @ imm = #14 | |
10000a5e: 6828 ldr r0, [r5] | |
10000a60: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a62: 07c0 lsls r0, r0, #31 | |
10000a64: d103 bne 0x10000a6e <$t.21+0xb6> @ imm = #6 | |
10000a66: 6828 ldr r0, [r5] | |
10000a68: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a6a: 07c0 lsls r0, r0, #31 | |
10000a6c: d0ef beq 0x10000a4e <$t.21+0x96> @ imm = #-34 | |
10000a6e: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
10000a70: 4284 cmp r4, r0 | |
10000a72: d000 beq 0x10000a76 <$t.21+0xbe> @ imm = #0 | |
10000a74: e70f b 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-482 | |
10000a76: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000a78: 0780 lsls r0, r0, #30 | |
10000a7a: d404 bmi 0x10000a86 <$t.21+0xce> @ imm = #8 | |
; $func($($args),*) | |
10000a7c: f005 ffcd bl 0x10006a1a <__nop> @ imm = #24474 | |
10000a80: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000a82: 0780 lsls r0, r0, #30 | |
10000a84: d5fa bpl 0x10000a7c <$t.21+0xc4> @ imm = #-12 | |
10000a86: 9809 ldr r0, [sp, #36] | |
10000a88: 6068 str r0, [r5, #4] | |
; $func($($args),*) | |
10000a8a: f005 ffcb bl 0x10006a24 <__sev> @ imm = #24470 | |
10000a8e: f005 ffc9 bl 0x10006a24 <__sev> @ imm = #24466 | |
10000a92: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a94: 07c0 lsls r0, r0, #31 | |
10000a96: d10f bne 0x10000ab8 <$t.21+0x100> @ imm = #30 | |
10000a98: 6828 ldr r0, [r5] | |
10000a9a: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000a9c: 07c0 lsls r0, r0, #31 | |
10000a9e: d10b bne 0x10000ab8 <$t.21+0x100> @ imm = #22 | |
10000aa0: 6828 ldr r0, [r5] | |
10000aa2: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000aa4: 07c0 lsls r0, r0, #31 | |
10000aa6: d107 bne 0x10000ab8 <$t.21+0x100> @ imm = #14 | |
10000aa8: 6828 ldr r0, [r5] | |
10000aaa: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000aac: 07c0 lsls r0, r0, #31 | |
10000aae: d103 bne 0x10000ab8 <$t.21+0x100> @ imm = #6 | |
10000ab0: 6828 ldr r0, [r5] | |
10000ab2: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000ab4: 07c0 lsls r0, r0, #31 | |
10000ab6: d0ef beq 0x10000a98 <$t.21+0xe0> @ imm = #-34 | |
10000ab8: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
10000aba: 9909 ldr r1, [sp, #36] | |
10000abc: 4288 cmp r0, r1 | |
10000abe: d000 beq 0x10000ac2 <$t.21+0x10a> @ imm = #0 | |
10000ac0: e6e9 b 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-558 | |
; if *cmd == 0 { | |
10000ac2: 9808 ldr r0, [sp, #32] | |
10000ac4: 2800 cmp r0, #0 | |
10000ac6: d117 bne 0x10000af8 <$t.21+0x140> @ imm = #46 | |
10000ac8: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000aca: 07c0 lsls r0, r0, #31 | |
10000acc: d00f beq 0x10000aee <$t.21+0x136> @ imm = #30 | |
10000ace: 68a8 ldr r0, [r5, #8] | |
10000ad0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000ad2: 07c0 lsls r0, r0, #31 | |
10000ad4: d00b beq 0x10000aee <$t.21+0x136> @ imm = #22 | |
10000ad6: 68a8 ldr r0, [r5, #8] | |
10000ad8: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000ada: 07c0 lsls r0, r0, #31 | |
10000adc: d007 beq 0x10000aee <$t.21+0x136> @ imm = #14 | |
10000ade: 68a8 ldr r0, [r5, #8] | |
10000ae0: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000ae2: 07c0 lsls r0, r0, #31 | |
10000ae4: d003 beq 0x10000aee <$t.21+0x136> @ imm = #6 | |
10000ae6: 68a8 ldr r0, [r5, #8] | |
10000ae8: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000aea: 07c0 lsls r0, r0, #31 | |
10000aec: d1ef bne 0x10000ace <$t.21+0x116> @ imm = #-34 | |
; $func($($args),*) | |
10000aee: f005 ff99 bl 0x10006a24 <__sev> @ imm = #24370 | |
10000af2: e001 b 0x10000af8 <$t.21+0x140> @ imm = #2 | |
10000af4: f005 ff91 bl 0x10006a1a <__nop> @ imm = #24354 | |
10000af8: 6828 ldr r0, [r5] | |
; while !self.is_write_ready() { | |
10000afa: 0780 lsls r0, r0, #30 | |
10000afc: d5fa bpl 0x10000af4 <$t.21+0x13c> @ imm = #-12 | |
10000afe: 9808 ldr r0, [sp, #32] | |
10000b00: 6068 str r0, [r5, #4] | |
; $func($($args),*) | |
10000b02: f005 ff8f bl 0x10006a24 <__sev> @ imm = #24350 | |
10000b06: f005 ff8d bl 0x10006a24 <__sev> @ imm = #24346 | |
10000b0a: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000b0c: 07c0 lsls r0, r0, #31 | |
10000b0e: d10f bne 0x10000b30 <$t.21+0x178> @ imm = #30 | |
10000b10: 6828 ldr r0, [r5] | |
10000b12: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000b14: 07c0 lsls r0, r0, #31 | |
10000b16: d10b bne 0x10000b30 <$t.21+0x178> @ imm = #22 | |
10000b18: 6828 ldr r0, [r5] | |
10000b1a: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000b1c: 07c0 lsls r0, r0, #31 | |
10000b1e: d107 bne 0x10000b30 <$t.21+0x178> @ imm = #14 | |
10000b20: 6828 ldr r0, [r5] | |
10000b22: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000b24: 07c0 lsls r0, r0, #31 | |
10000b26: d103 bne 0x10000b30 <$t.21+0x178> @ imm = #6 | |
10000b28: 6828 ldr r0, [r5] | |
10000b2a: 6828 ldr r0, [r5] | |
; if self.is_read_ready() { | |
10000b2c: 07c0 lsls r0, r0, #31 | |
10000b2e: d0ef beq 0x10000b10 <$t.21+0x158> @ imm = #-34 | |
10000b30: 68a8 ldr r0, [r5, #8] | |
; if *cmd != response { | |
10000b32: 9908 ldr r1, [sp, #32] | |
10000b34: 4288 cmp r0, r1 | |
10000b36: d000 beq 0x10000b3a <$t.21+0x182> @ imm = #0 | |
10000b38: e6ad b 0x10000896 <neotron_pico_bios::vga::init+0x31e> @ imm = #-678 | |
10000b3a: 9907 ldr r1, [sp, #28] | |
; if enabled { | |
10000b3c: 9806 ldr r0, [sp, #24] | |
10000b3e: 4208 tst r0, r1 | |
10000b40: d101 bne 0x10000b46 <$t.21+0x18e> @ imm = #2 | |
10000b42: 4c16 ldr r4, [pc, #88] @ 0x10000b9c <$d.22+0x1c> | |
10000b44: e005 b 0x10000b52 <$t.21+0x19a> @ imm = #10 | |
10000b46: 481c ldr r0, [pc, #112] @ 0x10000bb8 <$d.22+0x38> | |
10000b48: 6001 str r1, [r0] | |
10000b4a: 4c14 ldr r4, [pc, #80] @ 0x10000b9c <$d.22+0x1c> | |
10000b4c: e001 b 0x10000b52 <$t.21+0x19a> @ imm = #2 | |
; $func($($args),*) | |
10000b4e: f005 ff64 bl 0x10006a1a <__nop> @ imm = #24264 | |
10000b52: 7820 ldrb r0, [r4] | |
; while !CORE1_START_FLAG.load(Ordering::Relaxed) { | |
10000b54: 2800 cmp r0, #0 | |
10000b56: d0fa beq 0x10000b4e <$t.21+0x196> @ imm = #-12 | |
; } | |
10000b58: b035 add sp, #212 | |
10000b5a: bdf0 pop {r4, r5, r6, r7, pc} | |
; stack[stack.len() - 3] = main_func as *const () as usize; | |
10000b5c: 1ec8 subs r0, r1, #3 | |
10000b5e: f003 f80f bl 0x10003b80 <core::panicking::panic_bounds_check> @ imm = #12318 | |
10000b62: defe trap | |
10000b64: 4818 ldr r0, [pc, #96] @ 0x10000bc8 <$d.22+0x48> | |
10000b66: 212b movs r1, #43 | |
10000b68: aa1f add r2, sp, #124 | |
10000b6a: 4b18 ldr r3, [pc, #96] @ 0x10000bcc <$d.22+0x4c> | |
10000b6c: f003 ffce bl 0x10004b0c <core::result::unwrap_failed> @ imm = #16284 | |
10000b70: defe trap | |
10000b72: 2000 movs r0, #0 | |
10000b74: 43c0 mvns r0, r0 | |
10000b76: 2103 movs r1, #3 | |
10000b78: f003 ffb4 bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #16232 | |
10000b7c: defe trap | |
10000b7e: 46c0 mov r8, r8 | |
10000b80 <$d.22>: | |
10000b80: 00 20 20 50 .word 0x50202000 | |
10000b84: 00 01 00 04 .word 0x04000100 | |
10000b88: 00 c7 03 20 .word 0x2003c700 | |
10000b8c: 10 00 20 50 .word 0x50200010 | |
10000b90: 19 88 00 00 .word 0x00008819 | |
10000b94: d0 bb 03 20 .word 0x2003bbd0 | |
10000b98: 04 04 00 50 .word 0x50000404 | |
10000b9c: 18 ed 03 20 .word 0x2003ed18 | |
10000ba0: 04 00 01 40 .word 0x40010004 | |
10000ba4: 00 10 00 00 .word 0x00001000 | |
10000ba8: 00 10 04 20 .word 0x20041000 | |
10000bac: 01 a0 03 20 .word 0x2003a001 | |
10000bb0: d1 0b 00 10 .word 0x10000bd1 | |
10000bb4: 08 ed 00 e0 .word 0xe000ed08 | |
10000bb8: 00 e1 00 e0 .word 0xe000e100 | |
10000bbc: 80 e1 00 e0 .word 0xe000e180 | |
10000bc0: 50 00 00 d0 .word 0xd0000050 | |
10000bc4: 5c 72 00 10 .word 0x1000725c | |
10000bc8: be 71 00 10 .word 0x100071be | |
10000bcc: 60 72 00 10 .word 0x10007260 | |
10000bd0 <neotron_pico_bios::vga::core1_wrapper>: | |
; extern "C" fn core1_wrapper(entry_func: extern "C" fn() -> u32, _stack_base: *mut u32) -> u32 { | |
10000bd0: b580 push {r7, lr} | |
10000bd2: af00 add r7, sp, #0 | |
; entry_func() | |
10000bd4: 4780 blx r0 | |
; } | |
10000bd6: bd80 pop {r7, pc} | |
10000bd8 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str>: | |
; fn write_str(&mut self, s: &str) -> core::fmt::Result { | |
10000bd8: b5f0 push {r4, r5, r6, r7, lr} | |
10000bda: af03 add r7, sp, #12 | |
10000bdc: b08d sub sp, #52 | |
; let mut row = self.current_row.load(Ordering::Relaxed); | |
10000bde: 6800 ldr r0, [r0] | |
10000be0: 88c6 ldrh r6, [r0, #6] | |
10000be2: 8883 ldrh r3, [r0, #4] | |
10000be4: 930a str r3, [sp, #40] | |
10000be6: 6803 ldr r3, [r0] | |
; if !buffer.is_null() { | |
10000be8: 2b00 cmp r3, #0 | |
10000bea: d101 bne 0x10000bf0 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x18> @ imm = #2 | |
10000bec: f000 fcdc bl 0x100015a8 <$t.32+0x294> @ imm = #2488 | |
10000bf0: 2a00 cmp r2, #0 | |
10000bf2: 9001 str r0, [sp, #4] | |
10000bf4: d101 bne 0x10000bfa <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x22> @ imm = #2 | |
10000bf6: f000 fcd3 bl 0x100015a0 <$t.32+0x28c> @ imm = #2470 | |
10000bfa: 1888 adds r0, r1, r2 | |
10000bfc: 9007 str r0, [sp, #28] | |
10000bfe: 9308 str r3, [sp, #32] | |
10000c00: 3310 adds r3, #16 | |
10000c02: 9302 str r3, [sp, #8] | |
10000c04: e005 b 0x10000c12 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x3a> @ imm = #10 | |
10000c06: 990c ldr r1, [sp, #48] | |
10000c08: 9807 ldr r0, [sp, #28] | |
10000c0a: 4281 cmp r1, r0 | |
10000c0c: d101 bne 0x10000c12 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x3a> @ imm = #2 | |
10000c0e: f000 fcc7 bl 0x100015a0 <$t.32+0x28c> @ imm = #2446 | |
10000c12: 2300 movs r3, #0 | |
10000c14: 56c8 ldrsb r0, [r1, r3] | |
10000c16: b2c2 uxtb r2, r0 | |
10000c18: 2800 cmp r0, #0 | |
10000c1a: d402 bmi 0x10000c22 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x4a> @ imm = #4 | |
10000c1c: 1c49 adds r1, r1, #1 | |
10000c1e: 910c str r1, [sp, #48] | |
10000c20: e026 b 0x10000c70 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x98> @ imm = #76 | |
10000c22: 9309 str r3, [sp, #36] | |
10000c24: 784c ldrb r4, [r1, #1] | |
10000c26: 203f movs r0, #63 | |
10000c28: 900b str r0, [sp, #44] | |
10000c2a: 4004 ands r4, r0 | |
10000c2c: 231f movs r3, #31 | |
10000c2e: 4013 ands r3, r2 | |
10000c30: 2adf cmp r2, #223 | |
10000c32: d916 bls 0x10000c62 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x8a> @ imm = #44 | |
10000c34: 4630 mov r0, r6 | |
10000c36: 788e ldrb r6, [r1, #2] | |
10000c38: 253f movs r5, #63 | |
10000c3a: 402e ands r6, r5 | |
10000c3c: 01a4 lsls r4, r4, #6 | |
10000c3e: 19a4 adds r4, r4, r6 | |
10000c40: 2af0 cmp r2, #240 | |
10000c42: d352 blo 0x10000cea <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x112> @ imm = #164 | |
10000c44: 78ca ldrb r2, [r1, #3] | |
10000c46: 402a ands r2, r5 | |
10000c48: 01a4 lsls r4, r4, #6 | |
10000c4a: 18a2 adds r2, r4, r2 | |
10000c4c: 075b lsls r3, r3, #29 | |
10000c4e: 0adb lsrs r3, r3, #11 | |
10000c50: 18d2 adds r2, r2, r3 | |
10000c52: 2311 movs r3, #17 | |
10000c54: 041b lsls r3, r3, #16 | |
; for ch in s.chars() { | |
10000c56: 429a cmp r2, r3 | |
10000c58: d101 bne 0x10000c5e <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x86> @ imm = #2 | |
10000c5a: f000 fca0 bl 0x1000159e <$t.32+0x28a> @ imm = #2368 | |
10000c5e: 1d09 adds r1, r1, #4 | |
10000c60: e046 b 0x10000cf0 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x118> @ imm = #140 | |
10000c62: 019a lsls r2, r3, #6 | |
10000c64: 1912 adds r2, r2, r4 | |
10000c66: 1c89 adds r1, r1, #2 | |
10000c68: 9b09 ldr r3, [sp, #36] | |
; '\u{0000}'..='\u{007F}' => input as u8, | |
10000c6a: 2a80 cmp r2, #128 | |
10000c6c: 910c str r1, [sp, #48] | |
10000c6e: d244 bhs 0x10000cfa <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x122> @ imm = #136 | |
10000c70: 4827 ldr r0, [pc, #156] @ 0x10000d10 <$d.27> | |
10000c72: 6841 ldr r1, [r0, #4] | |
; '\u{0000}'..='\u{007F}' => input as u8, | |
10000c74: 910b str r1, [sp, #44] | |
10000c76: b2d4 uxtb r4, r2 | |
10000c78: 6805 ldr r5, [r0] | |
10000c7a: 2100 movs r1, #0 | |
; if glyph.0 == b'\r' { | |
10000c7c: 2c0d cmp r4, #13 | |
10000c7e: d002 beq 0x10000c86 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xae> @ imm = #4 | |
10000c80: 2c0a cmp r4, #10 | |
10000c82: d121 bne 0x10000cc8 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xf0> @ imm = #66 | |
; *row += 1; | |
10000c84: 1c76 adds r6, r6, #1 | |
; if *col == (num_cols as u16) { | |
10000c86: b28a uxth r2, r1 | |
10000c88: b2ac uxth r4, r5 | |
10000c8a: 42a2 cmp r2, r4 | |
10000c8c: d000 beq 0x10000c90 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xb8> @ imm = #0 | |
10000c8e: 460b mov r3, r1 | |
; if *col == (num_cols as u16) { | |
10000c90: 930a str r3, [sp, #40] | |
10000c92: 42a2 cmp r2, r4 | |
10000c94: d100 bne 0x10000c98 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xc0> @ imm = #0 | |
10000c96: 1c76 adds r6, r6, #1 | |
10000c98: 9b0b ldr r3, [sp, #44] | |
; if *col == (num_cols as u16) { | |
10000c9a: b2b0 uxth r0, r6 | |
; if *row == (num_rows as u16) { | |
10000c9c: b299 uxth r1, r3 | |
10000c9e: 4288 cmp r0, r1 | |
10000ca0: d1b1 bne 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-158 | |
10000ca2: 006a lsls r2, r5, #1 | |
10000ca4: 9808 ldr r0, [sp, #32] | |
10000ca6: 1881 adds r1, r0, r2 | |
; *row = (num_rows - 1) as u16; | |
10000ca8: 1e5e subs r6, r3, #1 | |
10000caa: 4372 muls r2, r6, r2 | |
10000cac: f005 fecb bl 0x10006a46 <__aeabi_memmove> @ imm = #23958 | |
10000cb0: 2d00 cmp r5, #0 | |
10000cb2: d0a8 beq 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-176 | |
10000cb4: 2203 movs r2, #3 | |
10000cb6: 4628 mov r0, r5 | |
10000cb8: 4010 ands r0, r2 | |
10000cba: b2b1 uxth r1, r6 | |
10000cbc: 4369 muls r1, r5, r1 | |
10000cbe: 1e6b subs r3, r5, #1 | |
10000cc0: 2b03 cmp r3, #3 | |
10000cc2: d205 bhs 0x10000cd0 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xf8> @ imm = #10 | |
10000cc4: 2300 movs r3, #0 | |
10000cc6: e33a b 0x1000133e <$t.32+0x2a> @ imm = #1652 | |
10000cc8: 9309 str r3, [sp, #36] | |
10000cca: 4611 mov r1, r2 | |
10000ccc: f000 fc52 bl 0x10001574 <$t.32+0x260> @ imm = #2212 | |
10000cd0: 9609 str r6, [sp, #36] | |
10000cd2: 1f2b subs r3, r5, #4 | |
10000cd4: 089c lsrs r4, r3, #2 | |
10000cd6: 1c66 adds r6, r4, #1 | |
10000cd8: 4634 mov r4, r6 | |
10000cda: 4014 ands r4, r2 | |
10000cdc: 940b str r4, [sp, #44] | |
10000cde: 2b0c cmp r3, #12 | |
10000ce0: 9206 str r2, [sp, #24] | |
10000ce2: d300 blo 0x10000ce6 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x10e> @ imm = #0 | |
10000ce4: e1fe b 0x100010e4 <$t.28+0x4> @ imm = #1020 | |
10000ce6: 2300 movs r3, #0 | |
10000ce8: e224 b 0x10001134 <$t.28+0x54> @ imm = #1096 | |
10000cea: 031a lsls r2, r3, #12 | |
10000cec: 18a2 adds r2, r4, r2 | |
10000cee: 1cc9 adds r1, r1, #3 | |
10000cf0: 4606 mov r6, r0 | |
10000cf2: 9b09 ldr r3, [sp, #36] | |
; '\u{0000}'..='\u{007F}' => input as u8, | |
10000cf4: 2a80 cmp r2, #128 | |
10000cf6: 910c str r1, [sp, #48] | |
10000cf8: d3ba blo 0x10000c70 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x98> @ imm = #-140 | |
; let index = match input { | |
10000cfa: 4613 mov r3, r2 | |
10000cfc: 3ba0 subs r3, #160 | |
10000cfe: 2bf2 cmp r3, #242 | |
10000d00: d900 bls 0x10000d04 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x12c> @ imm = #0 | |
10000d02: e256 b 0x100011b2 <$t.28+0xd2> @ imm = #1196 | |
10000d04: 009a lsls r2, r3, #2 | |
10000d06: a303 adr r3, #12 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x135> | |
10000d08: 589a ldr r2, [r3, r2] | |
10000d0a: 990b ldr r1, [sp, #44] | |
10000d0c: 4697 mov pc, r2 | |
10000d0e: 46c0 mov r8, r8 | |
10000d10 <$d.27>: | |
10000d10: 00 c7 03 20 .word 0x2003c700 | |
10000d14: e1 10 00 10 .word 0x100010e1 | |
10000d18: 7b 13 00 10 .word 0x1000137b | |
10000d1c: 7f 13 00 10 .word 0x1000137f | |
10000d20: 83 13 00 10 .word 0x10001383 | |
10000d24: 87 13 00 10 .word 0x10001387 | |
10000d28: 8b 13 00 10 .word 0x1000138b | |
10000d2c: 8f 13 00 10 .word 0x1000138f | |
10000d30: 93 13 00 10 .word 0x10001393 | |
10000d34: 97 13 00 10 .word 0x10001397 | |
10000d38: 9b 13 00 10 .word 0x1000139b | |
10000d3c: 9f 13 00 10 .word 0x1000139f | |
10000d40: a3 13 00 10 .word 0x100013a3 | |
10000d44: a7 13 00 10 .word 0x100013a7 | |
10000d48: ab 13 00 10 .word 0x100013ab | |
10000d4c: af 13 00 10 .word 0x100013af | |
10000d50: b3 13 00 10 .word 0x100013b3 | |
10000d54: b7 13 00 10 .word 0x100013b7 | |
10000d58: bb 13 00 10 .word 0x100013bb | |
10000d5c: bf 13 00 10 .word 0x100013bf | |
10000d60: c3 13 00 10 .word 0x100013c3 | |
10000d64: c7 13 00 10 .word 0x100013c7 | |
10000d68: cb 13 00 10 .word 0x100013cb | |
10000d6c: cf 13 00 10 .word 0x100013cf | |
10000d70: d3 13 00 10 .word 0x100013d3 | |
10000d74: d7 13 00 10 .word 0x100013d7 | |
10000d78: db 13 00 10 .word 0x100013db | |
10000d7c: df 13 00 10 .word 0x100013df | |
10000d80: e3 13 00 10 .word 0x100013e3 | |
10000d84: e7 13 00 10 .word 0x100013e7 | |
10000d88: eb 13 00 10 .word 0x100013eb | |
10000d8c: ef 13 00 10 .word 0x100013ef | |
10000d90: f3 13 00 10 .word 0x100013f3 | |
10000d94: f7 13 00 10 .word 0x100013f7 | |
10000d98: fb 13 00 10 .word 0x100013fb | |
10000d9c: ff 13 00 10 .word 0x100013ff | |
10000da0: 03 14 00 10 .word 0x10001403 | |
10000da4: 07 14 00 10 .word 0x10001407 | |
10000da8: 0b 14 00 10 .word 0x1000140b | |
10000dac: 0f 14 00 10 .word 0x1000140f | |
10000db0: 13 14 00 10 .word 0x10001413 | |
10000db4: 17 14 00 10 .word 0x10001417 | |
10000db8: 1b 14 00 10 .word 0x1000141b | |
10000dbc: 1f 14 00 10 .word 0x1000141f | |
10000dc0: 23 14 00 10 .word 0x10001423 | |
10000dc4: 27 14 00 10 .word 0x10001427 | |
10000dc8: 2b 14 00 10 .word 0x1000142b | |
10000dcc: 2f 14 00 10 .word 0x1000142f | |
10000dd0: 33 14 00 10 .word 0x10001433 | |
10000dd4: 37 14 00 10 .word 0x10001437 | |
10000dd8: 3b 14 00 10 .word 0x1000143b | |
10000ddc: 3f 14 00 10 .word 0x1000143f | |
10000de0: 43 14 00 10 .word 0x10001443 | |
10000de4: 47 14 00 10 .word 0x10001447 | |
10000de8: 4b 14 00 10 .word 0x1000144b | |
10000dec: 4f 14 00 10 .word 0x1000144f | |
10000df0: 53 14 00 10 .word 0x10001453 | |
10000df4: 57 14 00 10 .word 0x10001457 | |
10000df8: 5b 14 00 10 .word 0x1000145b | |
10000dfc: 5f 14 00 10 .word 0x1000145f | |
10000e00: 63 14 00 10 .word 0x10001463 | |
10000e04: 67 14 00 10 .word 0x10001467 | |
10000e08: 6b 14 00 10 .word 0x1000146b | |
10000e0c: 6f 14 00 10 .word 0x1000146f | |
10000e10: 73 14 00 10 .word 0x10001473 | |
10000e14: 77 14 00 10 .word 0x10001477 | |
10000e18: 7b 14 00 10 .word 0x1000147b | |
10000e1c: 7f 14 00 10 .word 0x1000147f | |
10000e20: 83 14 00 10 .word 0x10001483 | |
10000e24: 87 14 00 10 .word 0x10001487 | |
10000e28: 8b 14 00 10 .word 0x1000148b | |
10000e2c: 8f 14 00 10 .word 0x1000148f | |
10000e30: 93 14 00 10 .word 0x10001493 | |
10000e34: 97 14 00 10 .word 0x10001497 | |
10000e38: 9b 14 00 10 .word 0x1000149b | |
10000e3c: 9f 14 00 10 .word 0x1000149f | |
10000e40: a3 14 00 10 .word 0x100014a3 | |
10000e44: a7 14 00 10 .word 0x100014a7 | |
10000e48: ab 14 00 10 .word 0x100014ab | |
10000e4c: af 14 00 10 .word 0x100014af | |
10000e50: b3 14 00 10 .word 0x100014b3 | |
10000e54: b7 14 00 10 .word 0x100014b7 | |
10000e58: bb 14 00 10 .word 0x100014bb | |
10000e5c: bf 14 00 10 .word 0x100014bf | |
10000e60: c3 14 00 10 .word 0x100014c3 | |
10000e64: c7 14 00 10 .word 0x100014c7 | |
10000e68: cb 14 00 10 .word 0x100014cb | |
10000e6c: cf 14 00 10 .word 0x100014cf | |
10000e70: d3 14 00 10 .word 0x100014d3 | |
10000e74: d7 14 00 10 .word 0x100014d7 | |
10000e78: db 14 00 10 .word 0x100014db | |
10000e7c: df 14 00 10 .word 0x100014df | |
10000e80: e3 14 00 10 .word 0x100014e3 | |
10000e84: e7 14 00 10 .word 0x100014e7 | |
10000e88: eb 14 00 10 .word 0x100014eb | |
10000e8c: ef 14 00 10 .word 0x100014ef | |
10000e90: f3 14 00 10 .word 0x100014f3 | |
10000e94: 6d 15 00 10 .word 0x1000156d | |
10000e98: 6d 15 00 10 .word 0x1000156d | |
10000e9c: 6d 15 00 10 .word 0x1000156d | |
10000ea0: 6d 15 00 10 .word 0x1000156d | |
10000ea4: 6d 15 00 10 .word 0x1000156d | |
10000ea8: 6d 15 00 10 .word 0x1000156d | |
10000eac: 6d 15 00 10 .word 0x1000156d | |
10000eb0: 6d 15 00 10 .word 0x1000156d | |
10000eb4: 6d 15 00 10 .word 0x1000156d | |
10000eb8: 6d 15 00 10 .word 0x1000156d | |
10000ebc: 6d 15 00 10 .word 0x1000156d | |
10000ec0: 6d 15 00 10 .word 0x1000156d | |
10000ec4: 6d 15 00 10 .word 0x1000156d | |
10000ec8: 6d 15 00 10 .word 0x1000156d | |
10000ecc: 6d 15 00 10 .word 0x1000156d | |
10000ed0: 6d 15 00 10 .word 0x1000156d | |
10000ed4: 6d 15 00 10 .word 0x1000156d | |
10000ed8: 6d 15 00 10 .word 0x1000156d | |
10000edc: 6d 15 00 10 .word 0x1000156d | |
10000ee0: 6d 15 00 10 .word 0x1000156d | |
10000ee4: 6d 15 00 10 .word 0x1000156d | |
10000ee8: 6d 15 00 10 .word 0x1000156d | |
10000eec: 6d 15 00 10 .word 0x1000156d | |
10000ef0: 6d 15 00 10 .word 0x1000156d | |
10000ef4: 6d 15 00 10 .word 0x1000156d | |
10000ef8: 6d 15 00 10 .word 0x1000156d | |
10000efc: 6d 15 00 10 .word 0x1000156d | |
10000f00: 6d 15 00 10 .word 0x1000156d | |
10000f04: 6d 15 00 10 .word 0x1000156d | |
10000f08: 6d 15 00 10 .word 0x1000156d | |
10000f0c: 6d 15 00 10 .word 0x1000156d | |
10000f10: 6d 15 00 10 .word 0x1000156d | |
10000f14: 6d 15 00 10 .word 0x1000156d | |
10000f18: 6d 15 00 10 .word 0x1000156d | |
10000f1c: 6d 15 00 10 .word 0x1000156d | |
10000f20: 6d 15 00 10 .word 0x1000156d | |
10000f24: 6d 15 00 10 .word 0x1000156d | |
10000f28: 6d 15 00 10 .word 0x1000156d | |
10000f2c: 6d 15 00 10 .word 0x1000156d | |
10000f30: 6d 15 00 10 .word 0x1000156d | |
10000f34: 6d 15 00 10 .word 0x1000156d | |
10000f38: 6d 15 00 10 .word 0x1000156d | |
10000f3c: 6d 15 00 10 .word 0x1000156d | |
10000f40: 6d 15 00 10 .word 0x1000156d | |
10000f44: 6d 15 00 10 .word 0x1000156d | |
10000f48: 6d 15 00 10 .word 0x1000156d | |
10000f4c: 6d 15 00 10 .word 0x1000156d | |
10000f50: 6d 15 00 10 .word 0x1000156d | |
10000f54: 6d 15 00 10 .word 0x1000156d | |
10000f58: f7 14 00 10 .word 0x100014f7 | |
10000f5c: 6d 15 00 10 .word 0x1000156d | |
10000f60: 6d 15 00 10 .word 0x1000156d | |
10000f64: 6d 15 00 10 .word 0x1000156d | |
10000f68: 6d 15 00 10 .word 0x1000156d | |
10000f6c: 6d 15 00 10 .word 0x1000156d | |
10000f70: 6d 15 00 10 .word 0x1000156d | |
10000f74: 6d 15 00 10 .word 0x1000156d | |
10000f78: 6d 15 00 10 .word 0x1000156d | |
10000f7c: 6d 15 00 10 .word 0x1000156d | |
10000f80: 6d 15 00 10 .word 0x1000156d | |
10000f84: 6d 15 00 10 .word 0x1000156d | |
10000f88: 6d 15 00 10 .word 0x1000156d | |
10000f8c: 6d 15 00 10 .word 0x1000156d | |
10000f90: 6d 15 00 10 .word 0x1000156d | |
10000f94: 6d 15 00 10 .word 0x1000156d | |
10000f98: 6d 15 00 10 .word 0x1000156d | |
10000f9c: 6d 15 00 10 .word 0x1000156d | |
10000fa0: 6d 15 00 10 .word 0x1000156d | |
10000fa4: 6d 15 00 10 .word 0x1000156d | |
10000fa8: 6d 15 00 10 .word 0x1000156d | |
10000fac: 6d 15 00 10 .word 0x1000156d | |
10000fb0: 6d 15 00 10 .word 0x1000156d | |
10000fb4: 6d 15 00 10 .word 0x1000156d | |
10000fb8: 6d 15 00 10 .word 0x1000156d | |
10000fbc: 6d 15 00 10 .word 0x1000156d | |
10000fc0: 6d 15 00 10 .word 0x1000156d | |
10000fc4: 6d 15 00 10 .word 0x1000156d | |
10000fc8: 6d 15 00 10 .word 0x1000156d | |
10000fcc: 6d 15 00 10 .word 0x1000156d | |
10000fd0: 6d 15 00 10 .word 0x1000156d | |
10000fd4: 6d 15 00 10 .word 0x1000156d | |
10000fd8: 6d 15 00 10 .word 0x1000156d | |
10000fdc: 6d 15 00 10 .word 0x1000156d | |
10000fe0: 6d 15 00 10 .word 0x1000156d | |
10000fe4: 6d 15 00 10 .word 0x1000156d | |
10000fe8: 6d 15 00 10 .word 0x1000156d | |
10000fec: 6d 15 00 10 .word 0x1000156d | |
10000ff0: 6d 15 00 10 .word 0x1000156d | |
10000ff4: 6d 15 00 10 .word 0x1000156d | |
10000ff8: 6d 15 00 10 .word 0x1000156d | |
10000ffc: 6d 15 00 10 .word 0x1000156d | |
10001000: 6d 15 00 10 .word 0x1000156d | |
10001004: 6d 15 00 10 .word 0x1000156d | |
10001008: 6d 15 00 10 .word 0x1000156d | |
1000100c: 6d 15 00 10 .word 0x1000156d | |
10001010: 6d 15 00 10 .word 0x1000156d | |
10001014: 6d 15 00 10 .word 0x1000156d | |
10001018: 6d 15 00 10 .word 0x1000156d | |
1000101c: 6d 15 00 10 .word 0x1000156d | |
10001020: 6d 15 00 10 .word 0x1000156d | |
10001024: 6d 15 00 10 .word 0x1000156d | |
10001028: 6d 15 00 10 .word 0x1000156d | |
1000102c: 6d 15 00 10 .word 0x1000156d | |
10001030: 6d 15 00 10 .word 0x1000156d | |
10001034: 6d 15 00 10 .word 0x1000156d | |
10001038: 6d 15 00 10 .word 0x1000156d | |
1000103c: 6d 15 00 10 .word 0x1000156d | |
10001040: 6d 15 00 10 .word 0x1000156d | |
10001044: 6d 15 00 10 .word 0x1000156d | |
10001048: 6d 15 00 10 .word 0x1000156d | |
1000104c: 6d 15 00 10 .word 0x1000156d | |
10001050: 6d 15 00 10 .word 0x1000156d | |
10001054: 6d 15 00 10 .word 0x1000156d | |
10001058: 6d 15 00 10 .word 0x1000156d | |
1000105c: 6d 15 00 10 .word 0x1000156d | |
10001060: 6d 15 00 10 .word 0x1000156d | |
10001064: 6d 15 00 10 .word 0x1000156d | |
10001068: 6d 15 00 10 .word 0x1000156d | |
1000106c: 6d 15 00 10 .word 0x1000156d | |
10001070: 6d 15 00 10 .word 0x1000156d | |
10001074: 6d 15 00 10 .word 0x1000156d | |
10001078: 6d 15 00 10 .word 0x1000156d | |
1000107c: 6d 15 00 10 .word 0x1000156d | |
10001080: 6d 15 00 10 .word 0x1000156d | |
10001084: 6d 15 00 10 .word 0x1000156d | |
10001088: 6d 15 00 10 .word 0x1000156d | |
1000108c: 6d 15 00 10 .word 0x1000156d | |
10001090: 6d 15 00 10 .word 0x1000156d | |
10001094: 6d 15 00 10 .word 0x1000156d | |
10001098: 6d 15 00 10 .word 0x1000156d | |
1000109c: 6d 15 00 10 .word 0x1000156d | |
100010a0: 6d 15 00 10 .word 0x1000156d | |
100010a4: 6d 15 00 10 .word 0x1000156d | |
100010a8: 6d 15 00 10 .word 0x1000156d | |
100010ac: 6d 15 00 10 .word 0x1000156d | |
100010b0: 6d 15 00 10 .word 0x1000156d | |
100010b4: 6d 15 00 10 .word 0x1000156d | |
100010b8: 6d 15 00 10 .word 0x1000156d | |
100010bc: 6d 15 00 10 .word 0x1000156d | |
100010c0: 6d 15 00 10 .word 0x1000156d | |
100010c4: 6d 15 00 10 .word 0x1000156d | |
100010c8: 6d 15 00 10 .word 0x1000156d | |
100010cc: 6d 15 00 10 .word 0x1000156d | |
100010d0: 6d 15 00 10 .word 0x1000156d | |
100010d4: 6d 15 00 10 .word 0x1000156d | |
100010d8: 6d 15 00 10 .word 0x1000156d | |
100010dc: fb 14 00 10 .word 0x100014fb | |
100010e0 <$t.28>: | |
100010e0: 21ff movs r1, #255 | |
100010e2: e243 b 0x1000156c <$t.32+0x258> @ imm = #1158 | |
100010e4: 4396 bics r6, r2 | |
100010e6: 004b lsls r3, r1, #1 | |
100010e8: 9a02 ldr r2, [sp, #8] | |
100010ea: 18d4 adds r4, r2, r3 | |
100010ec: 2300 movs r3, #0 | |
100010ee: 4622 mov r2, r4 | |
100010f0: 3a10 subs r2, #16 | |
100010f2: 2520 movs r5, #32 | |
100010f4: 8015 strh r5, [r2] | |
100010f6: 4622 mov r2, r4 | |
100010f8: 3a0e subs r2, #14 | |
100010fa: 8015 strh r5, [r2] | |
100010fc: 4622 mov r2, r4 | |
100010fe: 3a0c subs r2, #12 | |
10001100: 8015 strh r5, [r2] | |
10001102: 4622 mov r2, r4 | |
10001104: 3a0a subs r2, #10 | |
10001106: 8015 strh r5, [r2] | |
10001108: 4622 mov r2, r4 | |
1000110a: 3a08 subs r2, #8 | |
1000110c: 8015 strh r5, [r2] | |
1000110e: 1fa2 subs r2, r4, #6 | |
10001110: 8015 strh r5, [r2] | |
10001112: 1f22 subs r2, r4, #4 | |
10001114: 8015 strh r5, [r2] | |
10001116: 1ea2 subs r2, r4, #2 | |
10001118: 8015 strh r5, [r2] | |
1000111a: 8025 strh r5, [r4] | |
1000111c: 8065 strh r5, [r4, #2] | |
1000111e: 80a5 strh r5, [r4, #4] | |
10001120: 80e5 strh r5, [r4, #6] | |
10001122: 8125 strh r5, [r4, #8] | |
10001124: 8165 strh r5, [r4, #10] | |
10001126: 81a5 strh r5, [r4, #12] | |
10001128: 81e5 strh r5, [r4, #14] | |
1000112a: 1f36 subs r6, r6, #4 | |
1000112c: 3420 adds r4, #32 | |
1000112e: 3310 adds r3, #16 | |
10001130: 2e00 cmp r6, #0 | |
10001132: d1dc bne 0x100010ee <$t.28+0xe> @ imm = #-72 | |
10001134: 9a0b ldr r2, [sp, #44] | |
10001136: 2a00 cmp r2, #0 | |
10001138: 9e09 ldr r6, [sp, #36] | |
1000113a: d100 bne 0x1000113e <$t.28+0x5e> @ imm = #0 | |
1000113c: e0ff b 0x1000133e <$t.32+0x2a> @ imm = #510 | |
1000113e: 9005 str r0, [sp, #20] | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001140: 185a adds r2, r3, r1 | |
10001142: 0052 lsls r2, r2, #1 | |
10001144: 2620 movs r6, #32 | |
10001146: 9c08 ldr r4, [sp, #32] | |
10001148: 52a6 strh r6, [r4, r2] | |
1000114a: 2001 movs r0, #1 | |
1000114c: 461a mov r2, r3 | |
1000114e: 9004 str r0, [sp, #16] | |
10001150: 4302 orrs r2, r0 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001152: 1852 adds r2, r2, r1 | |
10001154: 0052 lsls r2, r2, #1 | |
10001156: 52a6 strh r6, [r4, r2] | |
10001158: 2002 movs r0, #2 | |
1000115a: 461a mov r2, r3 | |
1000115c: 4302 orrs r2, r0 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
1000115e: 1852 adds r2, r2, r1 | |
10001160: 0052 lsls r2, r2, #1 | |
10001162: 52a6 strh r6, [r4, r2] | |
10001164: 461a mov r2, r3 | |
10001166: 9d06 ldr r5, [sp, #24] | |
10001168: 432a orrs r2, r5 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
1000116a: 1852 adds r2, r2, r1 | |
1000116c: 0052 lsls r2, r2, #1 | |
1000116e: 52a6 strh r6, [r4, r2] | |
10001170: 9a0b ldr r2, [sp, #44] | |
10001172: 1d1d adds r5, r3, #4 | |
10001174: 2a01 cmp r2, #1 | |
10001176: d01a beq 0x100011ae <$t.28+0xce> @ imm = #52 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001178: 186a adds r2, r5, r1 | |
1000117a: 0052 lsls r2, r2, #1 | |
1000117c: 52a6 strh r6, [r4, r2] | |
1000117e: 462a mov r2, r5 | |
10001180: 9003 str r0, [sp, #12] | |
10001182: 9804 ldr r0, [sp, #16] | |
10001184: 4302 orrs r2, r0 | |
10001186: 9803 ldr r0, [sp, #12] | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001188: 1852 adds r2, r2, r1 | |
1000118a: 0052 lsls r2, r2, #1 | |
1000118c: 52a6 strh r6, [r4, r2] | |
1000118e: 462a mov r2, r5 | |
10001190: 4302 orrs r2, r0 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001192: 1852 adds r2, r2, r1 | |
10001194: 0052 lsls r2, r2, #1 | |
10001196: 52a6 strh r6, [r4, r2] | |
10001198: 9a06 ldr r2, [sp, #24] | |
1000119a: 4315 orrs r5, r2 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
1000119c: 186a adds r2, r5, r1 | |
1000119e: 0052 lsls r2, r2, #1 | |
100011a0: 52a6 strh r6, [r4, r2] | |
100011a2: 461d mov r5, r3 | |
100011a4: 3508 adds r5, #8 | |
100011a6: 9a0b ldr r2, [sp, #44] | |
100011a8: 2a02 cmp r2, #2 | |
100011aa: d000 beq 0x100011ae <$t.28+0xce> @ imm = #0 | |
100011ac: e0b2 b 0x10001314 <$t.32> @ imm = #356 | |
100011ae: 462b mov r3, r5 | |
100011b0: e0c3 b 0x1000133a <$t.32+0x26> @ imm = #390 | |
100011b2: 4857 ldr r0, [pc, #348] @ 0x10001310 <$d.31> | |
100011b4: 1813 adds r3, r2, r0 | |
100011b6: 2ba0 cmp r3, #160 | |
100011b8: d900 bls 0x100011bc <$t.28+0xdc> @ imm = #0 | |
100011ba: e0d7 b 0x1000136c <$t.32+0x58> @ imm = #430 | |
100011bc: 990b ldr r1, [sp, #44] | |
100011be: 005b lsls r3, r3, #1 | |
100011c0: 447b add r3, pc | |
100011c2: 889b ldrh r3, [r3, #4] | |
100011c4: 005b lsls r3, r3, #1 | |
100011c6: 449f add pc, r3 | |
100011c8 <$d.29>: | |
100011c8: a0 00 d1 01 .word 0x01d100a0 | |
100011cc: 9a 01 d1 01 .word 0x01d1019a | |
100011d0: d1 01 d1 01 .word 0x01d101d1 | |
100011d4: d1 01 d1 01 .word 0x01d101d1 | |
100011d8: d1 01 d1 01 .word 0x01d101d1 | |
100011dc: d1 01 d1 01 .word 0x01d101d1 | |
100011e0: 9c 01 d1 01 .word 0x01d1019c | |
100011e4: d1 01 d1 01 .word 0x01d101d1 | |
100011e8: 9e 01 d1 01 .word 0x01d1019e | |
100011ec: d1 01 d1 01 .word 0x01d101d1 | |
100011f0: a0 01 d1 01 .word 0x01d101a0 | |
100011f4: d1 01 d1 01 .word 0x01d101d1 | |
100011f8: a2 01 d1 01 .word 0x01d101a2 | |
100011fc: d1 01 d1 01 .word 0x01d101d1 | |
10001200: a4 01 d1 01 .word 0x01d101a4 | |
10001204: d1 01 d1 01 .word 0x01d101d1 | |
10001208: d1 01 d1 01 .word 0x01d101d1 | |
1000120c: d1 01 d1 01 .word 0x01d101d1 | |
10001210: a6 01 d1 01 .word 0x01d101a6 | |
10001214: d1 01 d1 01 .word 0x01d101d1 | |
10001218: d1 01 d1 01 .word 0x01d101d1 | |
1000121c: d1 01 d1 01 .word 0x01d101d1 | |
10001220: a8 01 d1 01 .word 0x01d101a8 | |
10001224: d1 01 d1 01 .word 0x01d101d1 | |
10001228: d1 01 d1 01 .word 0x01d101d1 | |
1000122c: d1 01 d1 01 .word 0x01d101d1 | |
10001230: aa 01 d1 01 .word 0x01d101aa | |
10001234: d1 01 d1 01 .word 0x01d101d1 | |
10001238: d1 01 d1 01 .word 0x01d101d1 | |
1000123c: d1 01 d1 01 .word 0x01d101d1 | |
10001240: ac 01 d1 01 .word 0x01d101ac | |
10001244: d1 01 d1 01 .word 0x01d101d1 | |
10001248: d1 01 d1 01 .word 0x01d101d1 | |
1000124c: d1 01 d1 01 .word 0x01d101d1 | |
10001250: d1 01 d1 01 .word 0x01d101d1 | |
10001254: d1 01 d1 01 .word 0x01d101d1 | |
10001258: d1 01 d1 01 .word 0x01d101d1 | |
1000125c: d1 01 d1 01 .word 0x01d101d1 | |
10001260: d1 01 d1 01 .word 0x01d101d1 | |
10001264: d1 01 d1 01 .word 0x01d101d1 | |
10001268: ae 01 b0 01 .word 0x01b001ae | |
1000126c: d1 01 d1 01 .word 0x01d101d1 | |
10001270: b2 01 d1 01 .word 0x01d101b2 | |
10001274: d1 01 b4 01 .word 0x01b401d1 | |
10001278: d1 01 d1 01 .word 0x01d101d1 | |
1000127c: b6 01 d1 01 .word 0x01d101b6 | |
10001280: d1 01 b8 01 .word 0x01b801d1 | |
10001284: d1 01 d1 01 .word 0x01d101d1 | |
10001288: ba 01 d1 01 .word 0x01d101ba | |
1000128c: d1 01 bc 01 .word 0x01bc01d1 | |
10001290: d1 01 d1 01 .word 0x01d101d1 | |
10001294: be 01 d1 01 .word 0x01d101be | |
10001298: d1 01 c0 01 .word 0x01c001d1 | |
1000129c: d1 01 d1 01 .word 0x01d101d1 | |
100012a0: c2 01 d1 01 .word 0x01d101c2 | |
100012a4: d1 01 d1 01 .word 0x01d101d1 | |
100012a8: d1 01 d1 01 .word 0x01d101d1 | |
100012ac: d1 01 d1 01 .word 0x01d101d1 | |
100012b0: d1 01 d1 01 .word 0x01d101d1 | |
100012b4: d1 01 d1 01 .word 0x01d101d1 | |
100012b8: d1 01 d1 01 .word 0x01d101d1 | |
100012bc: d1 01 d1 01 .word 0x01d101d1 | |
100012c0: d1 01 d1 01 .word 0x01d101d1 | |
100012c4: d1 01 d1 01 .word 0x01d101d1 | |
100012c8: c4 01 d1 01 .word 0x01d101c4 | |
100012cc: d1 01 d1 01 .word 0x01d101d1 | |
100012d0: c6 01 d1 01 .word 0x01d101c6 | |
100012d4: d1 01 d1 01 .word 0x01d101d1 | |
100012d8: c8 01 d1 01 .word 0x01d101c8 | |
100012dc: d1 01 d1 01 .word 0x01d101d1 | |
100012e0: d1 01 d1 01 .word 0x01d101d1 | |
100012e4: d1 01 d1 01 .word 0x01d101d1 | |
100012e8: d1 01 ca 01 .word 0x01ca01d1 | |
100012ec: cc 01 ce 01 .word 0x01ce01cc | |
100012f0: d1 01 d1 01 .word 0x01d101d1 | |
100012f4: d1 01 d1 01 .word 0x01d101d1 | |
100012f8: d1 01 d1 01 .word 0x01d101d1 | |
100012fc: d1 01 d1 01 .word 0x01d101d1 | |
10001300: d1 01 d1 01 .word 0x01d101d1 | |
10001304: d1 01 d1 01 .word 0x01d101d1 | |
10001308: d0 01 .short 0x01d0 | |
1000130a <$t.30>: | |
1000130a: 21c4 movs r1, #196 | |
1000130c: e12e b 0x1000156c <$t.32+0x258> @ imm = #604 | |
1000130e: 46c0 mov r8, r8 | |
10001310 <$d.31>: | |
10001310: 00 db ff ff .word 0xffffdb00 | |
10001314 <$t.32>: | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001314: 186a adds r2, r5, r1 | |
10001316: 0052 lsls r2, r2, #1 | |
10001318: 52a6 strh r6, [r4, r2] | |
1000131a: 9804 ldr r0, [sp, #16] | |
1000131c: 4328 orrs r0, r5 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
1000131e: 1842 adds r2, r0, r1 | |
10001320: 0052 lsls r2, r2, #1 | |
10001322: 52a6 strh r6, [r4, r2] | |
10001324: 9803 ldr r0, [sp, #12] | |
10001326: 4328 orrs r0, r5 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001328: 1842 adds r2, r0, r1 | |
1000132a: 0052 lsls r2, r2, #1 | |
1000132c: 52a6 strh r6, [r4, r2] | |
1000132e: 9806 ldr r0, [sp, #24] | |
10001330: 4328 orrs r0, r5 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001332: 1842 adds r2, r0, r1 | |
10001334: 0052 lsls r2, r2, #1 | |
10001336: 52a6 strh r6, [r4, r2] | |
10001338: 330c adds r3, #12 | |
1000133a: 9e09 ldr r6, [sp, #36] | |
1000133c: 9805 ldr r0, [sp, #20] | |
1000133e: 2800 cmp r0, #0 | |
10001340: d101 bne 0x10001346 <$t.32+0x32> @ imm = #2 | |
10001342: f7ff fc60 bl 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-1856 | |
; let offset = blank_col + (num_cols * (*row as usize)); | |
10001346: 1859 adds r1, r3, r1 | |
10001348: 004a lsls r2, r1, #1 | |
1000134a: 2120 movs r1, #32 | |
1000134c: 9b08 ldr r3, [sp, #32] | |
1000134e: 5299 strh r1, [r3, r2] | |
10001350: 2801 cmp r0, #1 | |
10001352: d101 bne 0x10001358 <$t.32+0x44> @ imm = #2 | |
10001354: f7ff fc57 bl 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-1874 | |
10001358: 9b08 ldr r3, [sp, #32] | |
1000135a: 18d2 adds r2, r2, r3 | |
1000135c: 8051 strh r1, [r2, #2] | |
1000135e: 2802 cmp r0, #2 | |
10001360: d101 bne 0x10001366 <$t.32+0x52> @ imm = #2 | |
10001362: f7ff fc50 bl 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-1888 | |
10001366: 8091 strh r1, [r2, #4] | |
10001368: f7ff fc4d bl 0x10000c06 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0x2e> @ imm = #-1894 | |
; let index = match input { | |
1000136c: 488f ldr r0, [pc, #572] @ 0x100015ac <$d.33> | |
1000136e: 4282 cmp r2, r0 | |
10001370: 990b ldr r1, [sp, #44] | |
10001372: d000 beq 0x10001376 <$t.32+0x62> @ imm = #0 | |
10001374: e0fa b 0x1000156c <$t.32+0x258> @ imm = #500 | |
10001376: 21f2 movs r1, #242 | |
10001378: e0f8 b 0x1000156c <$t.32+0x258> @ imm = #496 | |
1000137a: 21ad movs r1, #173 | |
1000137c: e0f6 b 0x1000156c <$t.32+0x258> @ imm = #492 | |
1000137e: 21bd movs r1, #189 | |
10001380: e0f4 b 0x1000156c <$t.32+0x258> @ imm = #488 | |
10001382: 219c movs r1, #156 | |
10001384: e0f2 b 0x1000156c <$t.32+0x258> @ imm = #484 | |
10001386: 21cf movs r1, #207 | |
10001388: e0f0 b 0x1000156c <$t.32+0x258> @ imm = #480 | |
1000138a: 21be movs r1, #190 | |
1000138c: e0ee b 0x1000156c <$t.32+0x258> @ imm = #476 | |
1000138e: 21dd movs r1, #221 | |
10001390: e0ec b 0x1000156c <$t.32+0x258> @ imm = #472 | |
10001392: 21f5 movs r1, #245 | |
10001394: e0ea b 0x1000156c <$t.32+0x258> @ imm = #468 | |
10001396: 21f9 movs r1, #249 | |
10001398: e0e8 b 0x1000156c <$t.32+0x258> @ imm = #464 | |
1000139a: 21b8 movs r1, #184 | |
1000139c: e0e6 b 0x1000156c <$t.32+0x258> @ imm = #460 | |
1000139e: 21a6 movs r1, #166 | |
100013a0: e0e4 b 0x1000156c <$t.32+0x258> @ imm = #456 | |
100013a2: 21ae movs r1, #174 | |
100013a4: e0e2 b 0x1000156c <$t.32+0x258> @ imm = #452 | |
100013a6: 21aa movs r1, #170 | |
100013a8: e0e0 b 0x1000156c <$t.32+0x258> @ imm = #448 | |
100013aa: 21f0 movs r1, #240 | |
100013ac: e0de b 0x1000156c <$t.32+0x258> @ imm = #444 | |
100013ae: 21a9 movs r1, #169 | |
100013b0: e0dc b 0x1000156c <$t.32+0x258> @ imm = #440 | |
100013b2: 21ee movs r1, #238 | |
100013b4: e0da b 0x1000156c <$t.32+0x258> @ imm = #436 | |
100013b6: 21f8 movs r1, #248 | |
100013b8: e0d8 b 0x1000156c <$t.32+0x258> @ imm = #432 | |
100013ba: 21f1 movs r1, #241 | |
100013bc: e0d6 b 0x1000156c <$t.32+0x258> @ imm = #428 | |
100013be: 21fd movs r1, #253 | |
100013c0: e0d4 b 0x1000156c <$t.32+0x258> @ imm = #424 | |
100013c2: 21fc movs r1, #252 | |
100013c4: e0d2 b 0x1000156c <$t.32+0x258> @ imm = #420 | |
100013c6: 21ef movs r1, #239 | |
100013c8: e0d0 b 0x1000156c <$t.32+0x258> @ imm = #416 | |
100013ca: 21e6 movs r1, #230 | |
100013cc: e0ce b 0x1000156c <$t.32+0x258> @ imm = #412 | |
100013ce: 21f4 movs r1, #244 | |
100013d0: e0cc b 0x1000156c <$t.32+0x258> @ imm = #408 | |
100013d2: 21fa movs r1, #250 | |
100013d4: e0ca b 0x1000156c <$t.32+0x258> @ imm = #404 | |
100013d6: 21f7 movs r1, #247 | |
100013d8: e0c8 b 0x1000156c <$t.32+0x258> @ imm = #400 | |
100013da: 21fb movs r1, #251 | |
100013dc: e0c6 b 0x1000156c <$t.32+0x258> @ imm = #396 | |
100013de: 21a7 movs r1, #167 | |
100013e0: e0c4 b 0x1000156c <$t.32+0x258> @ imm = #392 | |
100013e2: 21af movs r1, #175 | |
100013e4: e0c2 b 0x1000156c <$t.32+0x258> @ imm = #388 | |
100013e6: 21ac movs r1, #172 | |
100013e8: e0c0 b 0x1000156c <$t.32+0x258> @ imm = #384 | |
100013ea: 21ab movs r1, #171 | |
100013ec: e0be b 0x1000156c <$t.32+0x258> @ imm = #380 | |
100013ee: 21f3 movs r1, #243 | |
100013f0: e0bc b 0x1000156c <$t.32+0x258> @ imm = #376 | |
100013f2: 21a8 movs r1, #168 | |
100013f4: e0ba b 0x1000156c <$t.32+0x258> @ imm = #372 | |
100013f6: 21b7 movs r1, #183 | |
100013f8: e0b8 b 0x1000156c <$t.32+0x258> @ imm = #368 | |
100013fa: 21b5 movs r1, #181 | |
100013fc: e0b6 b 0x1000156c <$t.32+0x258> @ imm = #364 | |
100013fe: 21b6 movs r1, #182 | |
10001400: e0b4 b 0x1000156c <$t.32+0x258> @ imm = #360 | |
10001402: 21c7 movs r1, #199 | |
10001404: e0b2 b 0x1000156c <$t.32+0x258> @ imm = #356 | |
10001406: 218e movs r1, #142 | |
10001408: e0b0 b 0x1000156c <$t.32+0x258> @ imm = #352 | |
1000140a: 218f movs r1, #143 | |
1000140c: e0ae b 0x1000156c <$t.32+0x258> @ imm = #348 | |
1000140e: 2192 movs r1, #146 | |
10001410: e0ac b 0x1000156c <$t.32+0x258> @ imm = #344 | |
10001412: 2180 movs r1, #128 | |
10001414: e0aa b 0x1000156c <$t.32+0x258> @ imm = #340 | |
10001416: 21d4 movs r1, #212 | |
10001418: e0a8 b 0x1000156c <$t.32+0x258> @ imm = #336 | |
1000141a: 2190 movs r1, #144 | |
1000141c: e0a6 b 0x1000156c <$t.32+0x258> @ imm = #332 | |
1000141e: 21d2 movs r1, #210 | |
10001420: e0a4 b 0x1000156c <$t.32+0x258> @ imm = #328 | |
10001422: 21d3 movs r1, #211 | |
10001424: e0a2 b 0x1000156c <$t.32+0x258> @ imm = #324 | |
10001426: 21de movs r1, #222 | |
10001428: e0a0 b 0x1000156c <$t.32+0x258> @ imm = #320 | |
1000142a: 21d6 movs r1, #214 | |
1000142c: e09e b 0x1000156c <$t.32+0x258> @ imm = #316 | |
1000142e: 21d7 movs r1, #215 | |
10001430: e09c b 0x1000156c <$t.32+0x258> @ imm = #312 | |
10001432: 21d8 movs r1, #216 | |
10001434: e09a b 0x1000156c <$t.32+0x258> @ imm = #308 | |
10001436: 21d1 movs r1, #209 | |
10001438: e098 b 0x1000156c <$t.32+0x258> @ imm = #304 | |
1000143a: 21a5 movs r1, #165 | |
1000143c: e096 b 0x1000156c <$t.32+0x258> @ imm = #300 | |
1000143e: 21e3 movs r1, #227 | |
10001440: e094 b 0x1000156c <$t.32+0x258> @ imm = #296 | |
10001442: 21e0 movs r1, #224 | |
10001444: e092 b 0x1000156c <$t.32+0x258> @ imm = #292 | |
10001446: 21e2 movs r1, #226 | |
10001448: e090 b 0x1000156c <$t.32+0x258> @ imm = #288 | |
1000144a: 21e5 movs r1, #229 | |
1000144c: e08e b 0x1000156c <$t.32+0x258> @ imm = #284 | |
1000144e: 2199 movs r1, #153 | |
10001450: e08c b 0x1000156c <$t.32+0x258> @ imm = #280 | |
10001452: 219e movs r1, #158 | |
10001454: e08a b 0x1000156c <$t.32+0x258> @ imm = #276 | |
10001456: 219d movs r1, #157 | |
10001458: e088 b 0x1000156c <$t.32+0x258> @ imm = #272 | |
1000145a: 21eb movs r1, #235 | |
1000145c: e086 b 0x1000156c <$t.32+0x258> @ imm = #268 | |
1000145e: 21e9 movs r1, #233 | |
10001460: e084 b 0x1000156c <$t.32+0x258> @ imm = #264 | |
10001462: 21ea movs r1, #234 | |
10001464: e082 b 0x1000156c <$t.32+0x258> @ imm = #260 | |
10001466: 219a movs r1, #154 | |
10001468: e080 b 0x1000156c <$t.32+0x258> @ imm = #256 | |
1000146a: 21ed movs r1, #237 | |
1000146c: e07e b 0x1000156c <$t.32+0x258> @ imm = #252 | |
1000146e: 21e8 movs r1, #232 | |
10001470: e07c b 0x1000156c <$t.32+0x258> @ imm = #248 | |
10001472: 21e1 movs r1, #225 | |
10001474: e07a b 0x1000156c <$t.32+0x258> @ imm = #244 | |
10001476: 2185 movs r1, #133 | |
10001478: e078 b 0x1000156c <$t.32+0x258> @ imm = #240 | |
1000147a: 21a0 movs r1, #160 | |
1000147c: e076 b 0x1000156c <$t.32+0x258> @ imm = #236 | |
1000147e: 2183 movs r1, #131 | |
10001480: e074 b 0x1000156c <$t.32+0x258> @ imm = #232 | |
10001482: 21c6 movs r1, #198 | |
10001484: e072 b 0x1000156c <$t.32+0x258> @ imm = #228 | |
10001486: 2184 movs r1, #132 | |
10001488: e070 b 0x1000156c <$t.32+0x258> @ imm = #224 | |
1000148a: 2186 movs r1, #134 | |
1000148c: e06e b 0x1000156c <$t.32+0x258> @ imm = #220 | |
1000148e: 2191 movs r1, #145 | |
10001490: e06c b 0x1000156c <$t.32+0x258> @ imm = #216 | |
10001492: 2187 movs r1, #135 | |
10001494: e06a b 0x1000156c <$t.32+0x258> @ imm = #212 | |
10001496: 218a movs r1, #138 | |
10001498: e068 b 0x1000156c <$t.32+0x258> @ imm = #208 | |
1000149a: 2182 movs r1, #130 | |
1000149c: e066 b 0x1000156c <$t.32+0x258> @ imm = #204 | |
1000149e: 2188 movs r1, #136 | |
100014a0: e064 b 0x1000156c <$t.32+0x258> @ imm = #200 | |
100014a2: 2189 movs r1, #137 | |
100014a4: e062 b 0x1000156c <$t.32+0x258> @ imm = #196 | |
100014a6: 218d movs r1, #141 | |
100014a8: e060 b 0x1000156c <$t.32+0x258> @ imm = #192 | |
100014aa: 21a1 movs r1, #161 | |
100014ac: e05e b 0x1000156c <$t.32+0x258> @ imm = #188 | |
100014ae: 218c movs r1, #140 | |
100014b0: e05c b 0x1000156c <$t.32+0x258> @ imm = #184 | |
100014b2: 218b movs r1, #139 | |
100014b4: e05a b 0x1000156c <$t.32+0x258> @ imm = #180 | |
100014b6: 21d0 movs r1, #208 | |
100014b8: e058 b 0x1000156c <$t.32+0x258> @ imm = #176 | |
100014ba: 21a4 movs r1, #164 | |
100014bc: e056 b 0x1000156c <$t.32+0x258> @ imm = #172 | |
100014be: 2195 movs r1, #149 | |
100014c0: e054 b 0x1000156c <$t.32+0x258> @ imm = #168 | |
100014c2: 21a2 movs r1, #162 | |
100014c4: e052 b 0x1000156c <$t.32+0x258> @ imm = #164 | |
100014c6: 2193 movs r1, #147 | |
100014c8: e050 b 0x1000156c <$t.32+0x258> @ imm = #160 | |
100014ca: 21e4 movs r1, #228 | |
100014cc: e04e b 0x1000156c <$t.32+0x258> @ imm = #156 | |
100014ce: 2194 movs r1, #148 | |
100014d0: e04c b 0x1000156c <$t.32+0x258> @ imm = #152 | |
100014d2: 21f6 movs r1, #246 | |
100014d4: e04a b 0x1000156c <$t.32+0x258> @ imm = #148 | |
100014d6: 219b movs r1, #155 | |
100014d8: e048 b 0x1000156c <$t.32+0x258> @ imm = #144 | |
100014da: 2197 movs r1, #151 | |
100014dc: e046 b 0x1000156c <$t.32+0x258> @ imm = #140 | |
100014de: 21a3 movs r1, #163 | |
100014e0: e044 b 0x1000156c <$t.32+0x258> @ imm = #136 | |
100014e2: 2196 movs r1, #150 | |
100014e4: e042 b 0x1000156c <$t.32+0x258> @ imm = #132 | |
100014e6: 2181 movs r1, #129 | |
100014e8: e040 b 0x1000156c <$t.32+0x258> @ imm = #128 | |
100014ea: 21ec movs r1, #236 | |
100014ec: e03e b 0x1000156c <$t.32+0x258> @ imm = #124 | |
100014ee: 21e7 movs r1, #231 | |
100014f0: e03c b 0x1000156c <$t.32+0x258> @ imm = #120 | |
100014f2: 2198 movs r1, #152 | |
100014f4: e03a b 0x1000156c <$t.32+0x258> @ imm = #116 | |
100014f6: 21d5 movs r1, #213 | |
100014f8: e038 b 0x1000156c <$t.32+0x258> @ imm = #112 | |
100014fa: 219f movs r1, #159 | |
100014fc: e036 b 0x1000156c <$t.32+0x258> @ imm = #108 | |
100014fe: 21b3 movs r1, #179 | |
10001500: e034 b 0x1000156c <$t.32+0x258> @ imm = #104 | |
10001502: 21da movs r1, #218 | |
10001504: e032 b 0x1000156c <$t.32+0x258> @ imm = #100 | |
10001506: 21bf movs r1, #191 | |
10001508: e030 b 0x1000156c <$t.32+0x258> @ imm = #96 | |
1000150a: 21c0 movs r1, #192 | |
1000150c: e02e b 0x1000156c <$t.32+0x258> @ imm = #92 | |
1000150e: 21d9 movs r1, #217 | |
10001510: e02c b 0x1000156c <$t.32+0x258> @ imm = #88 | |
10001512: 21c3 movs r1, #195 | |
10001514: e02a b 0x1000156c <$t.32+0x258> @ imm = #84 | |
10001516: 21b4 movs r1, #180 | |
10001518: e028 b 0x1000156c <$t.32+0x258> @ imm = #80 | |
1000151a: 21c2 movs r1, #194 | |
1000151c: e026 b 0x1000156c <$t.32+0x258> @ imm = #76 | |
1000151e: 21c1 movs r1, #193 | |
10001520: e024 b 0x1000156c <$t.32+0x258> @ imm = #72 | |
10001522: 21c5 movs r1, #197 | |
10001524: e022 b 0x1000156c <$t.32+0x258> @ imm = #68 | |
10001526: 21cd movs r1, #205 | |
10001528: e020 b 0x1000156c <$t.32+0x258> @ imm = #64 | |
1000152a: 21ba movs r1, #186 | |
1000152c: e01e b 0x1000156c <$t.32+0x258> @ imm = #60 | |
1000152e: 21c9 movs r1, #201 | |
10001530: e01c b 0x1000156c <$t.32+0x258> @ imm = #56 | |
10001532: 21bb movs r1, #187 | |
10001534: e01a b 0x1000156c <$t.32+0x258> @ imm = #52 | |
10001536: 21c8 movs r1, #200 | |
10001538: e018 b 0x1000156c <$t.32+0x258> @ imm = #48 | |
1000153a: 21bc movs r1, #188 | |
1000153c: e016 b 0x1000156c <$t.32+0x258> @ imm = #44 | |
1000153e: 21cc movs r1, #204 | |
10001540: e014 b 0x1000156c <$t.32+0x258> @ imm = #40 | |
10001542: 21b9 movs r1, #185 | |
10001544: e012 b 0x1000156c <$t.32+0x258> @ imm = #36 | |
10001546: 21cb movs r1, #203 | |
10001548: e010 b 0x1000156c <$t.32+0x258> @ imm = #32 | |
1000154a: 21ca movs r1, #202 | |
1000154c: e00e b 0x1000156c <$t.32+0x258> @ imm = #28 | |
1000154e: 21ce movs r1, #206 | |
10001550: e00c b 0x1000156c <$t.32+0x258> @ imm = #24 | |
10001552: 21df movs r1, #223 | |
10001554: e00a b 0x1000156c <$t.32+0x258> @ imm = #20 | |
10001556: 21dc movs r1, #220 | |
10001558: e008 b 0x1000156c <$t.32+0x258> @ imm = #16 | |
1000155a: 21db movs r1, #219 | |
1000155c: e006 b 0x1000156c <$t.32+0x258> @ imm = #12 | |
1000155e: 21b0 movs r1, #176 | |
10001560: e004 b 0x1000156c <$t.32+0x258> @ imm = #8 | |
10001562: 21b1 movs r1, #177 | |
10001564: e002 b 0x1000156c <$t.32+0x258> @ imm = #4 | |
10001566: 21b2 movs r1, #178 | |
10001568: e000 b 0x1000156c <$t.32+0x258> @ imm = #0 | |
1000156a: 21fe movs r1, #254 | |
1000156c: 4810 ldr r0, [pc, #64] @ 0x100015b0 <$d.33+0x4> | |
1000156e: 6842 ldr r2, [r0, #4] | |
10001570: 920b str r2, [sp, #44] | |
10001572: 6805 ldr r5, [r0] | |
; let offset = (*col as usize) + (num_cols * (*row as usize)); | |
10001574: b2b2 uxth r2, r6 | |
10001576: 436a muls r2, r5, r2 | |
10001578: 4633 mov r3, r6 | |
1000157a: 9e0a ldr r6, [sp, #40] | |
1000157c: b2b4 uxth r4, r6 | |
1000157e: 1912 adds r2, r2, r4 | |
10001580: 0052 lsls r2, r2, #1 | |
; let value: u16 = (glyph.0 as u16) + ((attr.0 as u16) << 8); | |
10001582: b2c9 uxtb r1, r1 | |
10001584: 9808 ldr r0, [sp, #32] | |
10001586: 5281 strh r1, [r0, r2] | |
; *col += 1; | |
10001588: 1c71 adds r1, r6, #1 | |
1000158a: 461e mov r6, r3 | |
1000158c: 9b09 ldr r3, [sp, #36] | |
; if *col == (num_cols as u16) { | |
1000158e: b28a uxth r2, r1 | |
10001590: b2ac uxth r4, r5 | |
10001592: 42a2 cmp r2, r4 | |
10001594: d001 beq 0x1000159a <$t.32+0x286> @ imm = #2 | |
10001596: f7ff fb7a bl 0x10000c8e <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xb6> @ imm = #-2316 | |
1000159a: f7ff fb79 bl 0x10000c90 <<&neotron_pico_bios::vga::TextConsole as core::fmt::Write>::write_str+0xb8> @ imm = #-2318 | |
1000159e: 4606 mov r6, r0 | |
100015a0: 9801 ldr r0, [sp, #4] | |
100015a2: 80c6 strh r6, [r0, #6] | |
100015a4: 990a ldr r1, [sp, #40] | |
100015a6: 8081 strh r1, [r0, #4] | |
; } | |
100015a8: b00d add sp, #52 | |
100015aa: bdf0 pop {r4, r5, r6, r7, pc} | |
100015ac <$d.33>: | |
100015ac: 17 20 00 00 .word 0x00002017 | |
100015b0: 00 c7 03 20 .word 0x2003c700 | |
100015b4 <neotron_pico_bios::Hardware::build>: | |
; fn build( | |
100015b4: b5f0 push {r4, r5, r6, r7, lr} | |
100015b6: af03 add r7, sp, #12 | |
100015b8: b0b1 sub sp, #196 | |
100015ba: 9202 str r2, [sp, #8] | |
100015bc: 9105 str r1, [sp, #20] | |
100015be: 2101 movs r1, #1 | |
100015c0: 460c mov r4, r1 | |
100015c2: 020e lsls r6, r1, #8 | |
100015c4: 4bfb ldr r3, [pc, #1004] @ 0x100019b4 <$d.35> | |
100015c6: 6819 ldr r1, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); | |
100015c8: 4331 orrs r1, r6 | |
100015ca: 6019 str r1, [r3] | |
100015cc: 6819 ldr r1, [r3] | |
100015ce: 2220 movs r2, #32 | |
; self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); | |
100015d0: 4311 orrs r1, r2 | |
100015d2: 6019 str r1, [r3] | |
100015d4: 6819 ldr r1, [r3] | |
100015d6: 920e str r2, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); | |
100015d8: 4391 bics r1, r2 | |
100015da: 6019 str r1, [r3] | |
100015dc: 9004 str r0, [sp, #16] | |
100015de: 30c8 adds r0, #200 | |
100015e0: 9003 str r0, [sp, #12] | |
100015e2: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100015e4: 0689 lsls r1, r1, #26 | |
100015e6: d408 bmi 0x100015fa <neotron_pico_bios::Hardware::build+0x46> @ imm = #16 | |
100015e8: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100015ea: 0689 lsls r1, r1, #26 | |
100015ec: d405 bmi 0x100015fa <neotron_pico_bios::Hardware::build+0x46> @ imm = #10 | |
100015ee: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100015f0: 0689 lsls r1, r1, #26 | |
100015f2: d402 bmi 0x100015fa <neotron_pico_bios::Hardware::build+0x46> @ imm = #4 | |
100015f4: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100015f6: 0689 lsls r1, r1, #26 | |
100015f8: d5f3 bpl 0x100015e2 <neotron_pico_bios::Hardware::build+0x2e> @ imm = #-26 | |
100015fa: 6819 ldr r1, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 8)) | ((value as u32 & 0x01) << 8); | |
100015fc: 43b1 bics r1, r6 | |
100015fe: 6019 str r1, [r3] | |
10001600: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10001602: 4231 tst r1, r6 | |
10001604: d108 bne 0x10001618 <neotron_pico_bios::Hardware::build+0x64> @ imm = #16 | |
10001606: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10001608: 4231 tst r1, r6 | |
1000160a: d105 bne 0x10001618 <neotron_pico_bios::Hardware::build+0x64> @ imm = #10 | |
1000160c: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000160e: 4231 tst r1, r6 | |
10001610: d102 bne 0x10001618 <neotron_pico_bios::Hardware::build+0x64> @ imm = #4 | |
10001612: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10001614: 4231 tst r1, r6 | |
10001616: d0f3 beq 0x10001600 <neotron_pico_bios::Hardware::build+0x4c> @ imm = #-26 | |
10001618: 48e7 ldr r0, [pc, #924] @ 0x100019b8 <$d.35+0x4> | |
1000161a: 2112 movs r1, #18 | |
1000161c: 9108 str r1, [sp, #32] | |
1000161e: 65c1 str r1, [r0, #92] | |
10001620: 4ae6 ldr r2, [pc, #920] @ 0x100019bc <$d.35+0x8> | |
10001622: 2105 movs r1, #5 | |
10001624: 9109 str r1, [sp, #36] | |
10001626: 6391 str r1, [r2, #56] | |
10001628: 4be5 ldr r3, [pc, #916] @ 0x100019c0 <$d.35+0xc> | |
1000162a: 1f1a subs r2, r3, #4 | |
1000162c: 9207 str r2, [sp, #28] | |
1000162e: 05e1 lsls r1, r4, #23 | |
10001630: 940d str r4, [sp, #52] | |
10001632: 6011 str r1, [r2] | |
10001634: 461a mov r2, r3 | |
10001636: 3a14 subs r2, #20 | |
10001638: 9206 str r2, [sp, #24] | |
1000163a: 6011 str r1, [r2] | |
1000163c: 2152 movs r1, #82 | |
1000163e: 910a str r1, [sp, #40] | |
10001640: 6001 str r1, [r0] | |
10001642: 49e0 ldr r1, [pc, #896] @ 0x100019c4 <$d.35+0x10> | |
10001644: 2206 movs r2, #6 | |
10001646: 920b str r2, [sp, #44] | |
10001648: 600a str r2, [r1] | |
1000164a: 601c str r4, [r3] | |
1000164c: 6802 ldr r2, [r0] | |
1000164e: 9d0e ldr r5, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001650: 432a orrs r2, r5 | |
10001652: 2110 movs r1, #16 | |
10001654: 910c str r1, [sp, #48] | |
10001656: 43cb mvns r3, r1 | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001658: 401a ands r2, r3 | |
1000165a: 6002 str r2, [r0] | |
1000165c: 6802 ldr r2, [r0] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
1000165e: 4322 orrs r2, r4 | |
10001660: 6002 str r2, [r0] | |
10001662: 9c0a ldr r4, [sp, #40] | |
10001664: 6044 str r4, [r0, #4] | |
10001666: 49d7 ldr r1, [pc, #860] @ 0x100019c4 <$d.35+0x10> | |
10001668: 9a0b ldr r2, [sp, #44] | |
1000166a: 608a str r2, [r1, #8] | |
1000166c: 2202 movs r2, #2 | |
1000166e: 49d4 ldr r1, [pc, #848] @ 0x100019c0 <$d.35+0xc> | |
10001670: 600a str r2, [r1] | |
10001672: 4629 mov r1, r5 | |
10001674: 6845 ldr r5, [r0, #4] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001676: 430d orrs r5, r1 | |
10001678: 930f str r3, [sp, #60] | |
1000167a: 401d ands r5, r3 | |
1000167c: 6045 str r5, [r0, #4] | |
1000167e: 6845 ldr r5, [r0, #4] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001680: 990d ldr r1, [sp, #52] | |
10001682: 430d orrs r5, r1 | |
10001684: 6045 str r5, [r0, #4] | |
10001686: 6084 str r4, [r0, #8] | |
10001688: 4cce ldr r4, [pc, #824] @ 0x100019c4 <$d.35+0x10> | |
1000168a: 990b ldr r1, [sp, #44] | |
1000168c: 6121 str r1, [r4, #16] | |
1000168e: 2504 movs r5, #4 | |
10001690: 4ccb ldr r4, [pc, #812] @ 0x100019c0 <$d.35+0xc> | |
10001692: 6025 str r5, [r4] | |
10001694: 6885 ldr r5, [r0, #8] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001696: 9c0e ldr r4, [sp, #56] | |
10001698: 4325 orrs r5, r4 | |
1000169a: 401d ands r5, r3 | |
1000169c: 6085 str r5, [r0, #8] | |
1000169e: 6885 ldr r5, [r0, #8] | |
100016a0: 9c0d ldr r4, [sp, #52] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100016a2: 4325 orrs r5, r4 | |
100016a4: 6085 str r5, [r0, #8] | |
100016a6: 9b0a ldr r3, [sp, #40] | |
100016a8: 60c3 str r3, [r0, #12] | |
100016aa: 4dc6 ldr r5, [pc, #792] @ 0x100019c4 <$d.35+0x10> | |
100016ac: 61a9 str r1, [r5, #24] | |
100016ae: 2508 movs r5, #8 | |
100016b0: 49c3 ldr r1, [pc, #780] @ 0x100019c0 <$d.35+0xc> | |
100016b2: 600d str r5, [r1] | |
100016b4: 68c5 ldr r5, [r0, #12] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100016b6: 990e ldr r1, [sp, #56] | |
100016b8: 430d orrs r5, r1 | |
100016ba: 990f ldr r1, [sp, #60] | |
100016bc: 400d ands r5, r1 | |
100016be: 60c5 str r5, [r0, #12] | |
100016c0: 68c5 ldr r5, [r0, #12] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100016c2: 4325 orrs r5, r4 | |
100016c4: 60c5 str r5, [r0, #12] | |
100016c6: 6103 str r3, [r0, #16] | |
100016c8: 4bbe ldr r3, [pc, #760] @ 0x100019c4 <$d.35+0x10> | |
100016ca: 990b ldr r1, [sp, #44] | |
100016cc: 6219 str r1, [r3, #32] | |
100016ce: 4bbc ldr r3, [pc, #752] @ 0x100019c0 <$d.35+0xc> | |
100016d0: 990c ldr r1, [sp, #48] | |
100016d2: 6019 str r1, [r3] | |
100016d4: 6905 ldr r5, [r0, #16] | |
100016d6: 9c0e ldr r4, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100016d8: 4325 orrs r5, r4 | |
100016da: 990f ldr r1, [sp, #60] | |
100016dc: 400d ands r5, r1 | |
100016de: 6105 str r5, [r0, #16] | |
100016e0: 6905 ldr r5, [r0, #16] | |
100016e2: 9b0d ldr r3, [sp, #52] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100016e4: 431d orrs r5, r3 | |
100016e6: 6105 str r5, [r0, #16] | |
100016e8: 990a ldr r1, [sp, #40] | |
100016ea: 6141 str r1, [r0, #20] | |
100016ec: 9d0b ldr r5, [sp, #44] | |
100016ee: 49f9 ldr r1, [pc, #996] @ 0x10001ad4 <$d.37+0x10> | |
100016f0: 628d str r5, [r1, #40] | |
100016f2: 49f7 ldr r1, [pc, #988] @ 0x10001ad0 <$d.37+0xc> | |
100016f4: 600c str r4, [r1] | |
100016f6: 6945 ldr r5, [r0, #20] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100016f8: 4325 orrs r5, r4 | |
100016fa: 990f ldr r1, [sp, #60] | |
100016fc: 400d ands r5, r1 | |
100016fe: 6145 str r5, [r0, #20] | |
10001700: 6945 ldr r5, [r0, #20] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001702: 431d orrs r5, r3 | |
10001704: 6145 str r5, [r0, #20] | |
10001706: 9c0a ldr r4, [sp, #40] | |
10001708: 6184 str r4, [r0, #24] | |
1000170a: 990b ldr r1, [sp, #44] | |
1000170c: 4bf1 ldr r3, [pc, #964] @ 0x10001ad4 <$d.37+0x10> | |
1000170e: 6319 str r1, [r3, #48] | |
10001710: 2540 movs r5, #64 | |
10001712: 49ef ldr r1, [pc, #956] @ 0x10001ad0 <$d.37+0xc> | |
10001714: 600d str r5, [r1] | |
10001716: 6985 ldr r5, [r0, #24] | |
10001718: 9b0e ldr r3, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000171a: 431d orrs r5, r3 | |
1000171c: 990f ldr r1, [sp, #60] | |
1000171e: 400d ands r5, r1 | |
10001720: 6185 str r5, [r0, #24] | |
10001722: 6985 ldr r5, [r0, #24] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001724: 990d ldr r1, [sp, #52] | |
10001726: 430d orrs r5, r1 | |
10001728: 6185 str r5, [r0, #24] | |
1000172a: 61c4 str r4, [r0, #28] | |
1000172c: 4ce9 ldr r4, [pc, #932] @ 0x10001ad4 <$d.37+0x10> | |
1000172e: 990b ldr r1, [sp, #44] | |
10001730: 63a1 str r1, [r4, #56] | |
10001732: 2580 movs r5, #128 | |
10001734: 49e6 ldr r1, [pc, #920] @ 0x10001ad0 <$d.37+0xc> | |
10001736: 600d str r5, [r1] | |
10001738: 69c5 ldr r5, [r0, #28] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000173a: 431d orrs r5, r3 | |
1000173c: 990f ldr r1, [sp, #60] | |
1000173e: 400d ands r5, r1 | |
10001740: 61c5 str r5, [r0, #28] | |
10001742: 69c5 ldr r5, [r0, #28] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001744: 990d ldr r1, [sp, #52] | |
10001746: 430d orrs r5, r1 | |
10001748: 61c5 str r5, [r0, #28] | |
1000174a: 990a ldr r1, [sp, #40] | |
1000174c: 6201 str r1, [r0, #32] | |
1000174e: 9d0b ldr r5, [sp, #44] | |
10001750: 4ce0 ldr r4, [pc, #896] @ 0x10001ad4 <$d.37+0x10> | |
10001752: 6425 str r5, [r4, #64] | |
10001754: 4dde ldr r5, [pc, #888] @ 0x10001ad0 <$d.37+0xc> | |
10001756: 602e str r6, [r5] | |
10001758: 9e0d ldr r6, [sp, #52] | |
1000175a: 6a05 ldr r5, [r0, #32] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000175c: 431d orrs r5, r3 | |
1000175e: 9b0f ldr r3, [sp, #60] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001760: 401d ands r5, r3 | |
10001762: 6205 str r5, [r0, #32] | |
10001764: 6a05 ldr r5, [r0, #32] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001766: 4335 orrs r5, r6 | |
10001768: 6205 str r5, [r0, #32] | |
1000176a: 6241 str r1, [r0, #36] | |
1000176c: 4cd9 ldr r4, [pc, #868] @ 0x10001ad4 <$d.37+0x10> | |
1000176e: 990b ldr r1, [sp, #44] | |
10001770: 64a1 str r1, [r4, #72] | |
10001772: 0274 lsls r4, r6, #9 | |
10001774: 940c str r4, [sp, #48] | |
10001776: 49d6 ldr r1, [pc, #856] @ 0x10001ad0 <$d.37+0xc> | |
10001778: 600c str r4, [r1] | |
1000177a: 6a45 ldr r5, [r0, #36] | |
1000177c: 990e ldr r1, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000177e: 430d orrs r5, r1 | |
10001780: 401d ands r5, r3 | |
10001782: 6245 str r5, [r0, #36] | |
10001784: 6a45 ldr r5, [r0, #36] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001786: 4335 orrs r5, r6 | |
10001788: 6245 str r5, [r0, #36] | |
1000178a: 9c0a ldr r4, [sp, #40] | |
1000178c: 6284 str r4, [r0, #40] | |
1000178e: 9b0b ldr r3, [sp, #44] | |
10001790: 4dd0 ldr r5, [pc, #832] @ 0x10001ad4 <$d.37+0x10> | |
10001792: 652b str r3, [r5, #80] | |
10001794: 02b5 lsls r5, r6, #10 | |
10001796: 4bce ldr r3, [pc, #824] @ 0x10001ad0 <$d.37+0xc> | |
10001798: 601d str r5, [r3] | |
1000179a: 6a85 ldr r5, [r0, #40] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000179c: 430d orrs r5, r1 | |
1000179e: 990f ldr r1, [sp, #60] | |
100017a0: 400d ands r5, r1 | |
100017a2: 6285 str r5, [r0, #40] | |
100017a4: 6a85 ldr r5, [r0, #40] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100017a6: 4335 orrs r5, r6 | |
100017a8: 6285 str r5, [r0, #40] | |
100017aa: 62c4 str r4, [r0, #44] | |
100017ac: 990b ldr r1, [sp, #44] | |
100017ae: 4bc9 ldr r3, [pc, #804] @ 0x10001ad4 <$d.37+0x10> | |
100017b0: 6599 str r1, [r3, #88] | |
100017b2: 02f5 lsls r5, r6, #11 | |
100017b4: 4bc6 ldr r3, [pc, #792] @ 0x10001ad0 <$d.37+0xc> | |
100017b6: 601d str r5, [r3] | |
100017b8: 6ac5 ldr r5, [r0, #44] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100017ba: 9b0e ldr r3, [sp, #56] | |
100017bc: 431d orrs r5, r3 | |
100017be: 9b0f ldr r3, [sp, #60] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100017c0: 401d ands r5, r3 | |
100017c2: 62c5 str r5, [r0, #44] | |
100017c4: 6ac5 ldr r5, [r0, #44] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100017c6: 4335 orrs r5, r6 | |
100017c8: 62c5 str r5, [r0, #44] | |
100017ca: 6304 str r4, [r0, #48] | |
100017cc: 4dc1 ldr r5, [pc, #772] @ 0x10001ad4 <$d.37+0x10> | |
100017ce: 6629 str r1, [r5, #96] | |
100017d0: 0335 lsls r5, r6, #12 | |
100017d2: 49bf ldr r1, [pc, #764] @ 0x10001ad0 <$d.37+0xc> | |
100017d4: 600d str r5, [r1] | |
100017d6: 6b05 ldr r5, [r0, #48] | |
100017d8: 990e ldr r1, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100017da: 430d orrs r5, r1 | |
100017dc: 401d ands r5, r3 | |
100017de: 6305 str r5, [r0, #48] | |
100017e0: 6b05 ldr r5, [r0, #48] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100017e2: 4335 orrs r5, r6 | |
100017e4: 6305 str r5, [r0, #48] | |
100017e6: 6344 str r4, [r0, #52] | |
100017e8: 9b0b ldr r3, [sp, #44] | |
100017ea: 4cba ldr r4, [pc, #744] @ 0x10001ad4 <$d.37+0x10> | |
100017ec: 66a3 str r3, [r4, #104] | |
100017ee: 0374 lsls r4, r6, #13 | |
100017f0: 4bb7 ldr r3, [pc, #732] @ 0x10001ad0 <$d.37+0xc> | |
100017f2: 601c str r4, [r3] | |
100017f4: 6b44 ldr r4, [r0, #52] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100017f6: 430c orrs r4, r1 | |
100017f8: 990f ldr r1, [sp, #60] | |
100017fa: 400c ands r4, r1 | |
100017fc: 6344 str r4, [r0, #52] | |
100017fe: 6b44 ldr r4, [r0, #52] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001800: 4334 orrs r4, r6 | |
10001802: 6344 str r4, [r0, #52] | |
10001804: 235a movs r3, #90 | |
10001806: 6383 str r3, [r0, #56] | |
10001808: 2503 movs r5, #3 | |
1000180a: 49b2 ldr r1, [pc, #712] @ 0x10001ad4 <$d.37+0x10> | |
1000180c: 670d str r5, [r1, #112] | |
1000180e: 03b4 lsls r4, r6, #14 | |
10001810: 49af ldr r1, [pc, #700] @ 0x10001ad0 <$d.37+0xc> | |
10001812: 600c str r4, [r1] | |
10001814: 6b84 ldr r4, [r0, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001816: 990e ldr r1, [sp, #56] | |
10001818: 430c orrs r4, r1 | |
1000181a: 990f ldr r1, [sp, #60] | |
1000181c: 400c ands r4, r1 | |
1000181e: 6384 str r4, [r0, #56] | |
10001820: 6b84 ldr r4, [r0, #56] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001822: 4334 orrs r4, r6 | |
10001824: 6384 str r4, [r0, #56] | |
10001826: 9301 str r3, [sp, #4] | |
10001828: 63c3 str r3, [r0, #60] | |
1000182a: 9500 str r5, [sp] | |
1000182c: 49a9 ldr r1, [pc, #676] @ 0x10001ad4 <$d.37+0x10> | |
1000182e: 678d str r5, [r1, #120] | |
10001830: 03f4 lsls r4, r6, #15 | |
10001832: 4da7 ldr r5, [pc, #668] @ 0x10001ad0 <$d.37+0xc> | |
10001834: 602c str r4, [r5] | |
10001836: 6bc4 ldr r4, [r0, #60] | |
10001838: 9b0e ldr r3, [sp, #56] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000183a: 431c orrs r4, r3 | |
1000183c: 990f ldr r1, [sp, #60] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
1000183e: 400c ands r4, r1 | |
10001840: 63c4 str r4, [r0, #60] | |
10001842: 6bc4 ldr r4, [r0, #60] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001844: 4334 orrs r4, r6 | |
10001846: 63c4 str r4, [r0, #60] | |
10001848: 9c0a ldr r4, [sp, #40] | |
1000184a: 6404 str r4, [r0, #64] | |
1000184c: 4c9f ldr r4, [pc, #636] @ 0x10001acc <$d.37+0x8> | |
1000184e: 6026 str r6, [r4] | |
10001850: 0434 lsls r4, r6, #16 | |
10001852: 602c str r4, [r5] | |
10001854: 6c05 ldr r5, [r0, #64] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001856: 431d orrs r5, r3 | |
10001858: 400d ands r5, r1 | |
1000185a: 6405 str r5, [r0, #64] | |
1000185c: 6c05 ldr r5, [r0, #64] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
1000185e: 4335 orrs r5, r6 | |
10001860: 6405 str r5, [r0, #64] | |
10001862: 9908 ldr r1, [sp, #32] | |
10001864: 6441 str r1, [r0, #68] | |
10001866: 9909 ldr r1, [sp, #36] | |
10001868: 4d98 ldr r5, [pc, #608] @ 0x10001acc <$d.37+0x8> | |
1000186a: 60a9 str r1, [r5, #8] | |
1000186c: 462b mov r3, r5 | |
1000186e: 0475 lsls r5, r6, #17 | |
10001870: 9907 ldr r1, [sp, #28] | |
10001872: 600d str r5, [r1] | |
10001874: 9906 ldr r1, [sp, #24] | |
10001876: 600d str r5, [r1] | |
10001878: 990a ldr r1, [sp, #40] | |
1000187a: 6481 str r1, [r0, #72] | |
1000187c: 611e str r6, [r3, #16] | |
1000187e: 04b5 lsls r5, r6, #18 | |
10001880: 4b93 ldr r3, [pc, #588] @ 0x10001ad0 <$d.37+0xc> | |
10001882: 601d str r5, [r3] | |
10001884: 6c85 ldr r5, [r0, #72] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
10001886: 9b0e ldr r3, [sp, #56] | |
10001888: 431d orrs r5, r3 | |
1000188a: 9b0f ldr r3, [sp, #60] | |
1000188c: 401d ands r5, r3 | |
1000188e: 6485 str r5, [r0, #72] | |
10001890: 6c85 ldr r5, [r0, #72] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001892: 4335 orrs r5, r6 | |
10001894: 6485 str r5, [r0, #72] | |
10001896: 64c1 str r1, [r0, #76] | |
10001898: 498c ldr r1, [pc, #560] @ 0x10001acc <$d.37+0x8> | |
1000189a: 618e str r6, [r1, #24] | |
1000189c: 460b mov r3, r1 | |
1000189e: 04f5 lsls r5, r6, #19 | |
100018a0: 498b ldr r1, [pc, #556] @ 0x10001ad0 <$d.37+0xc> | |
100018a2: 600d str r5, [r1] | |
100018a4: 6cc5 ldr r5, [r0, #76] | |
; self.w.bits = (self.w.bits & !(0x03 << 4)) | ((value as u32 & 0x03) << 4); | |
100018a6: 990e ldr r1, [sp, #56] | |
100018a8: 430d orrs r5, r1 | |
100018aa: 990f ldr r1, [sp, #60] | |
100018ac: 400d ands r5, r1 | |
100018ae: 64c5 str r5, [r0, #76] | |
100018b0: 6cc1 ldr r1, [r0, #76] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100018b2: 4331 orrs r1, r6 | |
100018b4: 64c1 str r1, [r0, #76] | |
100018b6: 9908 ldr r1, [sp, #32] | |
100018b8: 6541 str r1, [r0, #84] | |
100018ba: 9909 ldr r1, [sp, #36] | |
100018bc: 6299 str r1, [r3, #40] | |
100018be: 0571 lsls r1, r6, #21 | |
100018c0: 9d07 ldr r5, [sp, #28] | |
100018c2: 6029 str r1, [r5] | |
100018c4: 9d06 ldr r5, [sp, #24] | |
100018c6: 6029 str r1, [r5] | |
100018c8: 990a ldr r1, [sp, #40] | |
100018ca: 6581 str r1, [r0, #88] | |
100018cc: 2307 movs r3, #7 | |
100018ce: 497f ldr r1, [pc, #508] @ 0x10001acc <$d.37+0x8> | |
100018d0: 630b str r3, [r1, #48] | |
100018d2: 05b1 lsls r1, r6, #22 | |
100018d4: 4d7e ldr r5, [pc, #504] @ 0x10001ad0 <$d.37+0xc> | |
100018d6: 6029 str r1, [r5] | |
100018d8: 9d0a ldr r5, [sp, #40] | |
100018da: 6685 str r5, [r0, #104] | |
100018dc: 497b ldr r1, [pc, #492] @ 0x10001acc <$d.37+0x8> | |
100018de: 650b str r3, [r1, #80] | |
100018e0: 06b1 lsls r1, r6, #26 | |
100018e2: 487b ldr r0, [pc, #492] @ 0x10001ad0 <$d.37+0xc> | |
100018e4: 6001 str r1, [r0] | |
100018e6: 4878 ldr r0, [pc, #480] @ 0x10001ac8 <$d.37+0x4> | |
100018e8: 66c5 str r5, [r0, #108] | |
100018ea: 4878 ldr r0, [pc, #480] @ 0x10001acc <$d.37+0x8> | |
100018ec: 6583 str r3, [r0, #88] | |
100018ee: 06f1 lsls r1, r6, #27 | |
100018f0: 4877 ldr r0, [pc, #476] @ 0x10001ad0 <$d.37+0xc> | |
100018f2: 6001 str r1, [r0] | |
100018f4: 4874 ldr r0, [pc, #464] @ 0x10001ac8 <$d.37+0x4> | |
100018f6: 6705 str r5, [r0, #112] | |
100018f8: 930a str r3, [sp, #40] | |
100018fa: 4974 ldr r1, [pc, #464] @ 0x10001acc <$d.37+0x8> | |
100018fc: 660b str r3, [r1, #96] | |
100018fe: 4b71 ldr r3, [pc, #452] @ 0x10001ac4 <$d.37> | |
10001900: 0731 lsls r1, r6, #28 | |
10001902: 4d73 ldr r5, [pc, #460] @ 0x10001ad0 <$d.37+0xc> | |
10001904: 6029 str r1, [r5] | |
10001906: 9908 ldr r1, [sp, #32] | |
10001908: 6641 str r1, [r0, #100] | |
1000190a: 9809 ldr r0, [sp, #36] | |
1000190c: 496f ldr r1, [pc, #444] @ 0x10001acc <$d.37+0x8> | |
1000190e: 6488 str r0, [r1, #72] | |
10001910: 0671 lsls r1, r6, #25 | |
10001912: 9807 ldr r0, [sp, #28] | |
10001914: 6001 str r1, [r0] | |
10001916: 6819 ldr r1, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); | |
10001918: 4321 orrs r1, r4 | |
1000191a: 6019 str r1, [r3] | |
1000191c: 6819 ldr r1, [r3] | |
; self.w.bits = (self.w.bits & !(0x01 << 16)) | ((value as u32 & 0x01) << 16); | |
1000191e: 43a1 bics r1, r4 | |
10001920: 6019 str r1, [r3] | |
; self.frequency | |
10001922: 9805 ldr r0, [sp, #20] | |
10001924: 6980 ldr r0, [r0, #24] | |
10001926: 900e str r0, [sp, #56] | |
10001928: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000192a: 4221 tst r1, r4 | |
1000192c: d108 bne 0x10001940 <neotron_pico_bios::Hardware::build+0x38c> @ imm = #16 | |
1000192e: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10001930: 4221 tst r1, r4 | |
10001932: d105 bne 0x10001940 <neotron_pico_bios::Hardware::build+0x38c> @ imm = #10 | |
10001934: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10001936: 4221 tst r1, r4 | |
10001938: d102 bne 0x10001940 <neotron_pico_bios::Hardware::build+0x38c> @ imm = #4 | |
1000193a: 6899 ldr r1, [r3, #8] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000193c: 4221 tst r1, r4 | |
1000193e: d0f3 beq 0x10001928 <neotron_pico_bios::Hardware::build+0x374> @ imm = #-26 | |
10001940: 2000 movs r0, #0 | |
10001942: 4605 mov r5, r0 | |
10001944: 900b str r0, [sp, #44] | |
10001946: e005 b 0x10001954 <neotron_pico_bios::Hardware::build+0x3a0> @ imm = #10 | |
10001948: 4632 mov r2, r6 | |
; if freq_in < ((prescale_option + 2) * 256).saturating_mul(baudrate) { | |
1000194a: 990e ldr r1, [sp, #56] | |
1000194c: 4288 cmp r0, r1 | |
1000194e: 9e0d ldr r6, [sp, #52] | |
10001950: 4630 mov r0, r6 | |
; if freq_in < ((prescale_option + 2) * 256).saturating_mul(baudrate) { | |
10001952: d84d bhi 0x100019f0 <$t.36+0x28> @ imm = #154 | |
10001954: 2afe cmp r2, #254 | |
10001956: 4633 mov r3, r6 | |
10001958: d819 bhi 0x1000198e <neotron_pico_bios::Hardware::build+0x3da> @ imm = #50 | |
1000195a: 9b0b ldr r3, [sp, #44] | |
1000195c: 0629 lsls r1, r5, #24 | |
1000195e: 4631 mov r1, r6 | |
10001960: d018 beq 0x10001994 <neotron_pico_bios::Hardware::build+0x3e0> @ imm = #48 | |
10001962: 07c0 lsls r0, r0, #31 | |
10001964: d019 beq 0x1000199a <neotron_pico_bios::Hardware::build+0x3e6> @ imm = #50 | |
10001966: 20ff movs r0, #255 | |
10001968: 900f str r0, [sp, #60] | |
1000196a: 2900 cmp r1, #0 | |
1000196c: d140 bne 0x100019f0 <$t.36+0x28> @ imm = #128 | |
1000196e: 1c50 adds r0, r2, #1 | |
10001970: 4601 mov r1, r0 | |
10001972: 39fe subs r1, #254 | |
10001974: 1e4b subs r3, r1, #1 | |
10001976: 4199 sbcs r1, r3 | |
10001978: 2500 movs r5, #0 | |
1000197a: 2afd cmp r2, #253 | |
1000197c: d200 bhs 0x10001980 <neotron_pico_bios::Hardware::build+0x3cc> @ imm = #0 | |
1000197e: 43e9 mvns r1, r5 | |
10001980: 2900 cmp r1, #0 | |
10001982: d021 beq 0x100019c8 <$t.36> @ imm = #66 | |
10001984: b2c9 uxtb r1, r1 | |
10001986: 29ff cmp r1, #255 | |
10001988: d132 bne 0x100019f0 <$t.36+0x28> @ imm = #100 | |
1000198a: 1c96 adds r6, r2, #2 | |
1000198c: e01e b 0x100019cc <$t.36+0x4> @ imm = #60 | |
1000198e: 0629 lsls r1, r5, #24 | |
10001990: 4631 mov r1, r6 | |
10001992: d1e6 bne 0x10001962 <neotron_pico_bios::Hardware::build+0x3ae> @ imm = #-52 | |
10001994: 4619 mov r1, r3 | |
10001996: 07c0 lsls r0, r0, #31 | |
10001998: d1e5 bne 0x10001966 <neotron_pico_bios::Hardware::build+0x3b2> @ imm = #-54 | |
1000199a: 2900 cmp r1, #0 | |
1000199c: d126 bne 0x100019ec <$t.36+0x24> @ imm = #76 | |
1000199e: 4610 mov r0, r2 | |
100019a0: 38fe subs r0, #254 | |
100019a2: 4245 rsbs r5, r0, #0 | |
100019a4: 4145 adcs r5, r0 | |
100019a6: 2afe cmp r2, #254 | |
100019a8: d101 bne 0x100019ae <neotron_pico_bios::Hardware::build+0x3fa> @ imm = #2 | |
100019aa: 4616 mov r6, r2 | |
100019ac: e00f b 0x100019ce <$t.36+0x6> @ imm = #30 | |
100019ae: 1c56 adds r6, r2, #1 | |
100019b0: e00d b 0x100019ce <$t.36+0x6> @ imm = #26 | |
100019b2: 46c0 mov r8, r8 | |
100019b4 <$d.35>: | |
100019b4: 00 c0 00 40 .word 0x4000c000 | |
100019b8: 04 c0 01 40 .word 0x4001c004 | |
100019bc: 84 40 01 40 .word 0x40014084 | |
100019c0: 28 00 00 d0 .word 0xd0000028 | |
100019c4: 04 40 01 40 .word 0x40014004 | |
100019c8 <$t.36>: | |
100019c8: 2501 movs r5, #1 | |
100019ca: 4606 mov r6, r0 | |
100019cc: 4602 mov r2, r0 | |
100019ce: 920f str r2, [sp, #60] | |
; if freq_in < ((prescale_option + 2) * 256).saturating_mul(baudrate) { | |
100019d0: 0210 lsls r0, r2, #8 | |
100019d2: 990c ldr r1, [sp, #48] | |
100019d4: 1840 adds r0, r0, r1 | |
100019d6: 2400 movs r4, #0 | |
100019d8: 4621 mov r1, r4 | |
100019da: 4a3f ldr r2, [pc, #252] @ 0x10001ad8 <$d.37+0x14> | |
100019dc: 4623 mov r3, r4 | |
100019de: f005 f837 bl 0x10006a50 <__aeabi_lmul> @ imm = #20590 | |
100019e2: 1e4a subs r2, r1, #1 | |
100019e4: 4191 sbcs r1, r2 | |
100019e6: d0af beq 0x10001948 <neotron_pico_bios::Hardware::build+0x394> @ imm = #-162 | |
100019e8: 43e0 mvns r0, r4 | |
100019ea: e7ad b 0x10001948 <neotron_pico_bios::Hardware::build+0x394> @ imm = #-166 | |
100019ec: 20ff movs r0, #255 | |
100019ee: 900f str r0, [sp, #60] | |
100019f0: 2500 movs r5, #0 | |
100019f2: 26ff movs r6, #255 | |
100019f4: 950d str r5, [sp, #52] | |
100019f6: e006 b 0x10001a06 <$t.36+0x3e> @ imm = #12 | |
100019f8: 2500 movs r5, #0 | |
; if freq_in / (prescale as u32 * postdiv_option as u32) > baudrate { | |
100019fa: 980e ldr r0, [sp, #56] | |
100019fc: f7fe fc04 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-6136 | |
10001a00: 4935 ldr r1, [pc, #212] @ 0x10001ad8 <$d.37+0x14> | |
10001a02: 4288 cmp r0, r1 | |
10001a04: d813 bhi 0x10001a2e <$t.36+0x66> @ imm = #38 | |
10001a06: 0628 lsls r0, r5, #24 | |
10001a08: d110 bne 0x10001a2c <$t.36+0x64> @ imm = #32 | |
10001a0a: 4634 mov r4, r6 | |
; if freq_in / (prescale as u32 * postdiv_option as u32) > baudrate { | |
10001a0c: b2f0 uxtb r0, r6 | |
10001a0e: 4601 mov r1, r0 | |
10001a10: 9a0f ldr r2, [sp, #60] | |
10001a12: 4351 muls r1, r2, r1 | |
10001a14: d050 beq 0x10001ab8 <$t.36+0xf0> @ imm = #160 | |
10001a16: 2501 movs r5, #1 | |
10001a18: 2801 cmp r0, #1 | |
10001a1a: d803 bhi 0x10001a24 <$t.36+0x5c> @ imm = #6 | |
10001a1c: 462e mov r6, r5 | |
10001a1e: 2802 cmp r0, #2 | |
10001a20: d3eb blo 0x100019fa <$t.36+0x32> @ imm = #-42 | |
10001a22: e7e9 b 0x100019f8 <$t.36+0x30> @ imm = #-46 | |
10001a24: 1e66 subs r6, r4, #1 | |
10001a26: 2802 cmp r0, #2 | |
10001a28: d3e7 blo 0x100019fa <$t.36+0x32> @ imm = #-50 | |
10001a2a: e7e5 b 0x100019f8 <$t.36+0x30> @ imm = #-54 | |
10001a2c: 9c0d ldr r4, [sp, #52] | |
10001a2e: 482b ldr r0, [pc, #172] @ 0x10001adc <$d.37+0x18> | |
10001a30: 9d0f ldr r5, [sp, #60] | |
10001a32: 6105 str r5, [r0, #16] | |
10001a34: 21ff movs r1, #255 | |
10001a36: 0209 lsls r1, r1, #8 | |
10001a38: 6802 ldr r2, [r0] | |
; self.w.bits = (self.w.bits & !(0xff << 8)) | ((value as u32 & 0xff) << 8); | |
10001a3a: 438a bics r2, r1 | |
10001a3c: b2e1 uxtb r1, r4 | |
10001a3e: 020b lsls r3, r1, #8 | |
10001a40: 18d2 adds r2, r2, r3 | |
10001a42: 6002 str r2, [r0] | |
; (freq_in / (prescale as u32 * (1 + postdiv as u32))).Hz() | |
10001a44: 1c49 adds r1, r1, #1 | |
10001a46: 4369 muls r1, r5, r1 | |
10001a48: d036 beq 0x10001ab8 <$t.36+0xf0> @ imm = #108 | |
10001a4a: 6801 ldr r1, [r0] | |
; self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); | |
10001a4c: 9a0a ldr r2, [sp, #40] | |
10001a4e: 4311 orrs r1, r2 | |
10001a50: 22c8 movs r2, #200 | |
; self.w.bits = (self.w.bits & !0x0f) | (value as u32 & 0x0f); | |
10001a52: 4391 bics r1, r2 | |
10001a54: 6001 str r1, [r0] | |
10001a56: 6a41 ldr r1, [r0, #36] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10001a58: 9a00 ldr r2, [sp] | |
10001a5a: 4311 orrs r1, r2 | |
10001a5c: 6241 str r1, [r0, #36] | |
10001a5e: 6841 ldr r1, [r0, #4] | |
10001a60: 2202 movs r2, #2 | |
; self.w.bits = (self.w.bits & !(0x01 << 1)) | ((value as u32 & 0x01) << 1); | |
10001a62: 430a orrs r2, r1 | |
10001a64: 6042 str r2, [r0, #4] | |
10001a66: 2140 movs r1, #64 | |
10001a68: 9d04 ldr r5, [sp, #16] | |
; bmc_buffer: [0u8; 64], | |
10001a6a: 4628 mov r0, r5 | |
10001a6c: f004 ff72 bl 0x10006954 <__aeabi_memclr> @ imm = #20196 | |
10001a70: 4815 ldr r0, [pc, #84] @ 0x10001ac8 <$d.37+0x4> | |
10001a72: 9901 ldr r1, [sp, #4] | |
10001a74: 6501 str r1, [r0, #80] | |
10001a76: 4815 ldr r0, [pc, #84] @ 0x10001acc <$d.37+0x8> | |
10001a78: 9909 ldr r1, [sp, #36] | |
10001a7a: 6201 str r1, [r0, #32] | |
10001a7c: 2400 movs r4, #0 | |
; ( | |
10001a7e: 9802 ldr r0, [sp, #8] | |
10001a80: 6428 str r0, [r5, #64] | |
10001a82: 646c str r4, [r5, #68] | |
10001a84: 2001 movs r0, #1 | |
10001a86: 0500 lsls r0, r0, #20 | |
10001a88: 4911 ldr r1, [pc, #68] @ 0x10001ad0 <$d.37+0xc> | |
10001a8a: 6008 str r0, [r1] | |
; ( | |
10001a8c: 4628 mov r0, r5 | |
10001a8e: 3048 adds r0, #72 | |
10001a90: a911 add r1, sp, #68 | |
10001a92: 2280 movs r2, #128 | |
10001a94: f004 ff98 bl 0x100069c8 <__aeabi_memcpy8> @ imm = #20272 | |
10001a98: 20d1 movs r0, #209 | |
10001a9a: 9910 ldr r1, [sp, #64] | |
10001a9c: 5429 strb r1, [r5, r0] | |
10001a9e: 9803 ldr r0, [sp, #12] | |
10001aa0: 7204 strb r4, [r0, #8] | |
10001aa2: 6004 str r4, [r0] | |
10001aa4: 6044 str r4, [r0, #4] | |
10001aa6: 60c4 str r4, [r0, #12] | |
10001aa8: 35d1 adds r5, #209 | |
10001aaa: a810 add r0, sp, #64 | |
10001aac: 7841 ldrb r1, [r0, #1] | |
10001aae: 7069 strb r1, [r5, #1] | |
10001ab0: 7880 ldrb r0, [r0, #2] | |
10001ab2: 70a8 strb r0, [r5, #2] | |
; } | |
10001ab4: b031 add sp, #196 | |
10001ab6: bdf0 pop {r4, r5, r6, r7, pc} | |
10001ab8: 4809 ldr r0, [pc, #36] @ 0x10001ae0 <$d.37+0x1c> | |
10001aba: 2119 movs r1, #25 | |
10001abc: f002 ff62 bl 0x10004984 <core::panicking::panic> @ imm = #11972 | |
10001ac0: defe trap | |
10001ac2: 46c0 mov r8, r8 | |
10001ac4 <$d.37>: | |
10001ac4: 00 c0 00 40 .word 0x4000c000 | |
10001ac8: 04 c0 01 40 .word 0x4001c004 | |
10001acc: 84 40 01 40 .word 0x40014084 | |
10001ad0: 28 00 00 d0 .word 0xd0000028 | |
10001ad4: 04 40 01 40 .word 0x40014004 | |
10001ad8: 00 09 3d 00 .word 0x003d0900 | |
10001adc: 00 c0 03 40 .word 0x4003c000 | |
10001ae0: f0 71 00 10 .word 0x100071f0 | |
10001ae4 <neotron_pico_bios::Hardware::io_chip_write>: | |
; fn io_chip_write(&mut self, register: u8, data: u8) { | |
10001ae4: b5f0 push {r4, r5, r6, r7, lr} | |
10001ae6: af03 add r7, sp, #12 | |
10001ae8: b087 sub sp, #28 | |
10001aea: 9104 str r1, [sp, #16] | |
10001aec: 9005 str r0, [sp, #20] | |
10001aee: 260e movs r6, #14 | |
; $func($($args),*) | |
10001af0: 4630 mov r0, r6 | |
10001af2: f004 ff8d bl 0x10006a10 <__delay> @ imm = #20250 | |
10001af6: 2001 movs r0, #1 | |
10001af8: 0440 lsls r0, r0, #17 | |
10001afa: 4970 ldr r1, [pc, #448] @ 0x10001cbc <$d.39> | |
10001afc: 9006 str r0, [sp, #24] | |
10001afe: 6048 str r0, [r1, #4] | |
; $func($($args),*) | |
10001b00: 4630 mov r0, r6 | |
10001b02: f004 ff85 bl 0x10006a10 <__delay> @ imm = #20234 | |
10001b06: 4d6e ldr r5, [pc, #440] @ 0x10001cc0 <$d.39+0x4> | |
10001b08: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b0a: 0780 lsls r0, r0, #30 | |
10001b0c: d408 bmi 0x10001b20 <neotron_pico_bios::Hardware::io_chip_write+0x3c> @ imm = #16 | |
10001b0e: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b10: 0780 lsls r0, r0, #30 | |
10001b12: d405 bmi 0x10001b20 <neotron_pico_bios::Hardware::io_chip_write+0x3c> @ imm = #10 | |
10001b14: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b16: 0780 lsls r0, r0, #30 | |
10001b18: d402 bmi 0x10001b20 <neotron_pico_bios::Hardware::io_chip_write+0x3c> @ imm = #4 | |
10001b1a: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b1c: 0780 lsls r0, r0, #30 | |
10001b1e: d5f3 bpl 0x10001b08 <neotron_pico_bios::Hardware::io_chip_write+0x24> @ imm = #-26 | |
10001b20: 1f29 subs r1, r5, #4 | |
10001b22: 2040 movs r0, #64 | |
10001b24: 6008 str r0, [r1] | |
10001b26: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b28: 0740 lsls r0, r0, #29 | |
10001b2a: d408 bmi 0x10001b3e <neotron_pico_bios::Hardware::io_chip_write+0x5a> @ imm = #16 | |
10001b2c: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b2e: 0740 lsls r0, r0, #29 | |
10001b30: d405 bmi 0x10001b3e <neotron_pico_bios::Hardware::io_chip_write+0x5a> @ imm = #10 | |
10001b32: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b34: 0740 lsls r0, r0, #29 | |
10001b36: d402 bmi 0x10001b3e <neotron_pico_bios::Hardware::io_chip_write+0x5a> @ imm = #4 | |
10001b38: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b3a: 0740 lsls r0, r0, #29 | |
10001b3c: d5f3 bpl 0x10001b26 <neotron_pico_bios::Hardware::io_chip_write+0x42> @ imm = #-26 | |
10001b3e: 6808 ldr r0, [r1] | |
10001b40: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b42: 0780 lsls r0, r0, #30 | |
10001b44: d408 bmi 0x10001b58 <neotron_pico_bios::Hardware::io_chip_write+0x74> @ imm = #16 | |
10001b46: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b48: 0780 lsls r0, r0, #30 | |
10001b4a: d405 bmi 0x10001b58 <neotron_pico_bios::Hardware::io_chip_write+0x74> @ imm = #10 | |
10001b4c: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b4e: 0780 lsls r0, r0, #30 | |
10001b50: d402 bmi 0x10001b58 <neotron_pico_bios::Hardware::io_chip_write+0x74> @ imm = #4 | |
10001b52: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b54: 0780 lsls r0, r0, #30 | |
10001b56: d5f3 bpl 0x10001b40 <neotron_pico_bios::Hardware::io_chip_write+0x5c> @ imm = #-26 | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
10001b58: 9805 ldr r0, [sp, #20] | |
10001b5a: b2c0 uxtb r0, r0 | |
10001b5c: 9001 str r0, [sp, #4] | |
10001b5e: 6008 str r0, [r1] | |
10001b60: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b62: 0740 lsls r0, r0, #29 | |
10001b64: d408 bmi 0x10001b78 <neotron_pico_bios::Hardware::io_chip_write+0x94> @ imm = #16 | |
10001b66: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b68: 0740 lsls r0, r0, #29 | |
10001b6a: d405 bmi 0x10001b78 <neotron_pico_bios::Hardware::io_chip_write+0x94> @ imm = #10 | |
10001b6c: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b6e: 0740 lsls r0, r0, #29 | |
10001b70: d402 bmi 0x10001b78 <neotron_pico_bios::Hardware::io_chip_write+0x94> @ imm = #4 | |
10001b72: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b74: 0740 lsls r0, r0, #29 | |
10001b76: d5f3 bpl 0x10001b60 <neotron_pico_bios::Hardware::io_chip_write+0x7c> @ imm = #-26 | |
10001b78: 6808 ldr r0, [r1] | |
10001b7a: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b7c: 0780 lsls r0, r0, #30 | |
10001b7e: d408 bmi 0x10001b92 <neotron_pico_bios::Hardware::io_chip_write+0xae> @ imm = #16 | |
10001b80: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b82: 0780 lsls r0, r0, #30 | |
10001b84: d405 bmi 0x10001b92 <neotron_pico_bios::Hardware::io_chip_write+0xae> @ imm = #10 | |
10001b86: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b88: 0780 lsls r0, r0, #30 | |
10001b8a: d402 bmi 0x10001b92 <neotron_pico_bios::Hardware::io_chip_write+0xae> @ imm = #4 | |
10001b8c: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001b8e: 0780 lsls r0, r0, #30 | |
10001b90: d5f3 bpl 0x10001b7a <neotron_pico_bios::Hardware::io_chip_write+0x96> @ imm = #-26 | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
10001b92: 9804 ldr r0, [sp, #16] | |
10001b94: b2c0 uxtb r0, r0 | |
10001b96: 9002 str r0, [sp, #8] | |
10001b98: 6008 str r0, [r1] | |
10001b9a: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001b9c: 0740 lsls r0, r0, #29 | |
10001b9e: d408 bmi 0x10001bb2 <neotron_pico_bios::Hardware::io_chip_write+0xce> @ imm = #16 | |
10001ba0: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001ba2: 0740 lsls r0, r0, #29 | |
10001ba4: d405 bmi 0x10001bb2 <neotron_pico_bios::Hardware::io_chip_write+0xce> @ imm = #10 | |
10001ba6: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001ba8: 0740 lsls r0, r0, #29 | |
10001baa: d402 bmi 0x10001bb2 <neotron_pico_bios::Hardware::io_chip_write+0xce> @ imm = #4 | |
10001bac: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001bae: 0740 lsls r0, r0, #29 | |
10001bb0: d5f3 bpl 0x10001b9a <neotron_pico_bios::Hardware::io_chip_write+0xb6> @ imm = #-26 | |
10001bb2: 9103 str r1, [sp, #12] | |
10001bb4: 6808 ldr r0, [r1] | |
10001bb6: 260e movs r6, #14 | |
; $func($($args),*) | |
10001bb8: 4630 mov r0, r6 | |
10001bba: f004 ff29 bl 0x10006a10 <__delay> @ imm = #20050 | |
10001bbe: 9c06 ldr r4, [sp, #24] | |
10001bc0: 483e ldr r0, [pc, #248] @ 0x10001cbc <$d.39> | |
10001bc2: 6004 str r4, [r0] | |
; $func($($args),*) | |
10001bc4: 4630 mov r0, r6 | |
10001bc6: f004 ff23 bl 0x10006a10 <__delay> @ imm = #20038 | |
10001bca: 4630 mov r0, r6 | |
10001bcc: f004 ff20 bl 0x10006a10 <__delay> @ imm = #20032 | |
10001bd0: 483a ldr r0, [pc, #232] @ 0x10001cbc <$d.39> | |
10001bd2: 6044 str r4, [r0, #4] | |
; $func($($args),*) | |
10001bd4: 4630 mov r0, r6 | |
10001bd6: f004 ff1b bl 0x10006a10 <__delay> @ imm = #20022 | |
10001bda: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001bdc: 0780 lsls r0, r0, #30 | |
10001bde: d408 bmi 0x10001bf2 <neotron_pico_bios::Hardware::io_chip_write+0x10e> @ imm = #16 | |
10001be0: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001be2: 0780 lsls r0, r0, #30 | |
10001be4: d405 bmi 0x10001bf2 <neotron_pico_bios::Hardware::io_chip_write+0x10e> @ imm = #10 | |
10001be6: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001be8: 0780 lsls r0, r0, #30 | |
10001bea: d402 bmi 0x10001bf2 <neotron_pico_bios::Hardware::io_chip_write+0x10e> @ imm = #4 | |
10001bec: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001bee: 0780 lsls r0, r0, #30 | |
10001bf0: d5f3 bpl 0x10001bda <neotron_pico_bios::Hardware::io_chip_write+0xf6> @ imm = #-26 | |
10001bf2: 2041 movs r0, #65 | |
10001bf4: 9903 ldr r1, [sp, #12] | |
10001bf6: 6008 str r0, [r1] | |
10001bf8: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001bfa: 0740 lsls r0, r0, #29 | |
10001bfc: d408 bmi 0x10001c10 <neotron_pico_bios::Hardware::io_chip_write+0x12c> @ imm = #16 | |
10001bfe: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c00: 0740 lsls r0, r0, #29 | |
10001c02: d405 bmi 0x10001c10 <neotron_pico_bios::Hardware::io_chip_write+0x12c> @ imm = #10 | |
10001c04: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c06: 0740 lsls r0, r0, #29 | |
10001c08: d402 bmi 0x10001c10 <neotron_pico_bios::Hardware::io_chip_write+0x12c> @ imm = #4 | |
10001c0a: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c0c: 0740 lsls r0, r0, #29 | |
10001c0e: d5f3 bpl 0x10001bf8 <neotron_pico_bios::Hardware::io_chip_write+0x114> @ imm = #-26 | |
10001c10: 6808 ldr r0, [r1] | |
10001c12: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c14: 0780 lsls r0, r0, #30 | |
10001c16: d408 bmi 0x10001c2a <neotron_pico_bios::Hardware::io_chip_write+0x146> @ imm = #16 | |
10001c18: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c1a: 0780 lsls r0, r0, #30 | |
10001c1c: d405 bmi 0x10001c2a <neotron_pico_bios::Hardware::io_chip_write+0x146> @ imm = #10 | |
10001c1e: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c20: 0780 lsls r0, r0, #30 | |
10001c22: d402 bmi 0x10001c2a <neotron_pico_bios::Hardware::io_chip_write+0x146> @ imm = #4 | |
10001c24: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c26: 0780 lsls r0, r0, #30 | |
10001c28: d5f3 bpl 0x10001c12 <neotron_pico_bios::Hardware::io_chip_write+0x12e> @ imm = #-26 | |
10001c2a: 9801 ldr r0, [sp, #4] | |
10001c2c: 6008 str r0, [r1] | |
10001c2e: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c30: 0740 lsls r0, r0, #29 | |
10001c32: d408 bmi 0x10001c46 <neotron_pico_bios::Hardware::io_chip_write+0x162> @ imm = #16 | |
10001c34: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c36: 0740 lsls r0, r0, #29 | |
10001c38: d405 bmi 0x10001c46 <neotron_pico_bios::Hardware::io_chip_write+0x162> @ imm = #10 | |
10001c3a: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c3c: 0740 lsls r0, r0, #29 | |
10001c3e: d402 bmi 0x10001c46 <neotron_pico_bios::Hardware::io_chip_write+0x162> @ imm = #4 | |
10001c40: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c42: 0740 lsls r0, r0, #29 | |
10001c44: d5f3 bpl 0x10001c2e <neotron_pico_bios::Hardware::io_chip_write+0x14a> @ imm = #-26 | |
10001c46: 6808 ldr r0, [r1] | |
10001c48: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c4a: 0780 lsls r0, r0, #30 | |
10001c4c: d408 bmi 0x10001c60 <neotron_pico_bios::Hardware::io_chip_write+0x17c> @ imm = #16 | |
10001c4e: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c50: 0780 lsls r0, r0, #30 | |
10001c52: d405 bmi 0x10001c60 <neotron_pico_bios::Hardware::io_chip_write+0x17c> @ imm = #10 | |
10001c54: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c56: 0780 lsls r0, r0, #30 | |
10001c58: d402 bmi 0x10001c60 <neotron_pico_bios::Hardware::io_chip_write+0x17c> @ imm = #4 | |
10001c5a: 6828 ldr r0, [r5] | |
; if !self.is_writable() { | |
10001c5c: 0780 lsls r0, r0, #30 | |
10001c5e: d5f3 bpl 0x10001c48 <neotron_pico_bios::Hardware::io_chip_write+0x164> @ imm = #-26 | |
10001c60: 2000 movs r0, #0 | |
10001c62: 6008 str r0, [r1] | |
10001c64: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c66: 0740 lsls r0, r0, #29 | |
10001c68: d408 bmi 0x10001c7c <neotron_pico_bios::Hardware::io_chip_write+0x198> @ imm = #16 | |
10001c6a: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c6c: 0740 lsls r0, r0, #29 | |
10001c6e: d405 bmi 0x10001c7c <neotron_pico_bios::Hardware::io_chip_write+0x198> @ imm = #10 | |
10001c70: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c72: 0740 lsls r0, r0, #29 | |
10001c74: d402 bmi 0x10001c7c <neotron_pico_bios::Hardware::io_chip_write+0x198> @ imm = #4 | |
10001c76: 6828 ldr r0, [r5] | |
; if !self.is_readable() { | |
10001c78: 0740 lsls r0, r0, #29 | |
10001c7a: d5f3 bpl 0x10001c64 <neotron_pico_bios::Hardware::io_chip_write+0x180> @ imm = #-26 | |
10001c7c: 680e ldr r6, [r1] | |
10001c7e: 200e movs r0, #14 | |
; $func($($args),*) | |
10001c80: f004 fec6 bl 0x10006a10 <__delay> @ imm = #19852 | |
10001c84: 9806 ldr r0, [sp, #24] | |
10001c86: 490d ldr r1, [pc, #52] @ 0x10001cbc <$d.39> | |
10001c88: 6008 str r0, [r1] | |
; Ok(self.device.sspdr.read().data().bits() as $type) | |
10001c8a: b2f0 uxtb r0, r6 | |
; if read_back != data { | |
10001c8c: 9902 ldr r1, [sp, #8] | |
10001c8e: 4288 cmp r0, r1 | |
10001c90: d101 bne 0x10001c96 <neotron_pico_bios::Hardware::io_chip_write+0x1b2> @ imm = #2 | |
; } | |
10001c92: b007 add sp, #28 | |
10001c94: bdf0 pop {r4, r5, r6, r7, pc} | |
; _defmt_acquire() | |
10001c96: f003 fb3f bl 0x10005318 <_defmt_acquire> @ imm = #13950 | |
; defmt::panic!( | |
10001c9a: 480a ldr r0, [pc, #40] @ 0x10001cc4 <$d.39+0x8> | |
10001c9c: f003 fab0 bl 0x10005200 <defmt::export::header> @ imm = #13664 | |
10001ca0: 9804 ldr r0, [sp, #16] | |
10001ca2: f7fe fc55 bl 0x10000550 <defmt::export::fmt> @ imm = #-5974 | |
10001ca6: 9805 ldr r0, [sp, #20] | |
10001ca8: f7fe fc52 bl 0x10000550 <defmt::export::fmt> @ imm = #-5980 | |
10001cac: 4630 mov r0, r6 | |
10001cae: f7fe fc4f bl 0x10000550 <defmt::export::fmt> @ imm = #-5986 | |
; _defmt_release() | |
10001cb2: f003 fb8b bl 0x100053cc <_defmt_release> @ imm = #14102 | |
; unsafe { _defmt_panic() } | |
10001cb6: f003 fab1 bl 0x1000521c <_defmt_panic> @ imm = #13666 | |
10001cba: defe trap | |
10001cbc <$d.39>: | |
10001cbc: 14 00 00 d0 .word 0xd0000014 | |
10001cc0: 0c c0 03 40 .word 0x4003c00c | |
10001cc4: 02 00 00 00 .word 0x00000002 | |
10001cc8 <neotron_pico_bios::Hardware::init_io_chip>: | |
; fn init_io_chip(&mut self) { | |
10001cc8: b5b0 push {r4, r5, r7, lr} | |
10001cca: af02 add r7, sp, #8 | |
10001ccc: 2001 movs r0, #1 | |
10001cce: 0540 lsls r0, r0, #21 | |
10001cd0: 4911 ldr r1, [pc, #68] @ 0x10001d18 <$d.41> | |
10001cd2: 6008 str r0, [r1] | |
10001cd4: 240e movs r4, #14 | |
; $func($($args),*) | |
10001cd6: 4620 mov r0, r4 | |
10001cd8: f004 fe9a bl 0x10006a10 <__delay> @ imm = #19764 | |
10001cdc: 2500 movs r5, #0 | |
; self.io_chip_write(Self::MCP23S17_DDRA, 0x00); | |
10001cde: 4628 mov r0, r5 | |
10001ce0: 4629 mov r1, r5 | |
10001ce2: f7ff feff bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-514 | |
; $func($($args),*) | |
10001ce6: 4620 mov r0, r4 | |
10001ce8: f004 fe92 bl 0x10006a10 <__delay> @ imm = #19748 | |
10001cec: 2012 movs r0, #18 | |
; self.io_chip_write(Self::MCP23S17_GPIOA, 0x00); | |
10001cee: 4629 mov r1, r5 | |
10001cf0: f7ff fef8 bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-528 | |
10001cf4: 200d movs r0, #13 | |
10001cf6: 24ff movs r4, #255 | |
; self.io_chip_write(Self::MCP23S17_GPPUB, 0xFF); | |
10001cf8: 4621 mov r1, r4 | |
10001cfa: f7ff fef3 bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-538 | |
10001cfe: 2009 movs r0, #9 | |
; self.io_chip_write(Self::MCP23S17_INTCONB, 0xFF); | |
10001d00: 4621 mov r1, r4 | |
10001d02: f7ff feef bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-546 | |
10001d06: 2005 movs r0, #5 | |
; self.io_chip_write(Self::MCP23S17_GPINTENB, 0xFF); | |
10001d08: 4621 mov r1, r4 | |
10001d0a: f7ff feeb bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-554 | |
10001d0e: 2007 movs r0, #7 | |
; self.io_chip_write(Self::MCP23S17_DEFVALB, 0xFF); | |
10001d10: 4621 mov r1, r4 | |
10001d12: f7ff fee7 bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-562 | |
; } | |
10001d16: bdb0 pop {r4, r5, r7, pc} | |
10001d18 <$d.41>: | |
10001d18: 14 00 00 d0 .word 0xd0000014 | |
10001d1c <neotron_pico_bios::Hardware::bmc_do_request>: | |
; fn bmc_do_request( | |
10001d1c: b5f0 push {r4, r5, r6, r7, lr} | |
10001d1e: af03 add r7, sp, #12 | |
10001d20: b093 sub sp, #76 | |
10001d22: 9011 str r0, [sp, #68] | |
10001d24: 2a00 cmp r2, #0 | |
10001d26: 9303 str r3, [sp, #12] | |
10001d28: 9202 str r2, [sp, #8] | |
10001d2a: d001 beq 0x10001d30 <neotron_pico_bios::Hardware::bmc_do_request+0x14> @ imm = #2 | |
10001d2c: 1c98 adds r0, r3, #2 | |
10001d2e: e000 b 0x10001d32 <neotron_pico_bios::Hardware::bmc_do_request+0x16> @ imm = #0 | |
10001d30: 2002 movs r0, #2 | |
10001d32: 2203 movs r2, #3 | |
10001d34: 4603 mov r3, r0 | |
10001d36: 920b str r2, [sp, #44] | |
10001d38: 4393 bics r3, r2 | |
10001d3a: 9304 str r3, [sp, #16] | |
10001d3c: 9a11 ldr r2, [sp, #68] | |
10001d3e: 1815 adds r5, r2, r0 | |
10001d40: 900d str r0, [sp, #52] | |
10001d42: 1e40 subs r0, r0, #1 | |
10001d44: 9009 str r0, [sp, #36] | |
10001d46: 1c50 adds r0, r2, #1 | |
; } | |
10001d48: 900c str r0, [sp, #48] | |
10001d4a: b2c8 uxtb r0, r1 | |
10001d4c: 9008 str r0, [sp, #32] | |
10001d4e: 0e08 lsrs r0, r1, #24 | |
10001d50: 9007 str r0, [sp, #28] | |
10001d52: 2001 movs r0, #1 | |
10001d54: 9001 str r0, [sp, #4] | |
10001d56: 0540 lsls r0, r0, #21 | |
10001d58: 900f str r0, [sp, #60] | |
10001d5a: 32d4 adds r2, #212 | |
10001d5c: 920e str r2, [sp, #56] | |
10001d5e: 0a08 lsrs r0, r1, #8 | |
; } | |
10001d60: b2c0 uxtb r0, r0 | |
10001d62: 9006 str r0, [sp, #24] | |
10001d64: 0c08 lsrs r0, r1, #16 | |
; } | |
10001d66: b2c0 uxtb r0, r0 | |
10001d68: 9005 str r0, [sp, #20] | |
10001d6a: 2000 movs r0, #0 | |
10001d6c: 9010 str r0, [sp, #64] | |
10001d6e: 4ca0 ldr r4, [pc, #640] @ 0x10001ff0 <$d.43> | |
10001d70: 950a str r5, [sp, #40] | |
10001d72: e009 b 0x10001d88 <neotron_pico_bios::Hardware::bmc_do_request+0x6c> @ imm = #18 | |
; if calc_crc != 0 { | |
10001d74: 2900 cmp r1, #0 | |
10001d76: d100 bne 0x10001d7a <neotron_pico_bios::Hardware::bmc_do_request+0x5e> @ imm = #0 | |
10001d78: e117 b 0x10001faa <neotron_pico_bios::Hardware::bmc_do_request+0x28e> @ imm = #558 | |
; $func($($args),*) | |
10001d7a: 48a2 ldr r0, [pc, #648] @ 0x10002004 <$d.43+0x14> | |
10001d7c: f004 fe48 bl 0x10006a10 <__delay> @ imm = #19600 | |
10001d80: 9810 ldr r0, [sp, #64] | |
10001d82: 2804 cmp r0, #4 | |
10001d84: d100 bne 0x10001d88 <neotron_pico_bios::Hardware::bmc_do_request+0x6c> @ imm = #0 | |
10001d86: e12e b 0x10001fe6 <neotron_pico_bios::Hardware::bmc_do_request+0x2ca> @ imm = #604 | |
10001d88: 2140 movs r1, #64 | |
10001d8a: 26ff movs r6, #255 | |
; *byte = 0xFF; | |
10001d8c: 9811 ldr r0, [sp, #68] | |
10001d8e: 4632 mov r2, r6 | |
10001d90: f004 fdc2 bl 0x10006918 <__aeabi_memset8> @ imm = #19332 | |
10001d94: 990e ldr r1, [sp, #56] | |
; if cs != self.last_cs { | |
10001d96: 7848 ldrb r0, [r1, #1] | |
10001d98: 2800 cmp r0, #0 | |
10001d9a: d007 beq 0x10001dac <neotron_pico_bios::Hardware::bmc_do_request+0x90> @ imm = #14 | |
; self.io_chip_write(0x12, self.led_state << 3 | cs); | |
10001d9c: 7808 ldrb r0, [r1] | |
10001d9e: 00c1 lsls r1, r0, #3 | |
10001da0: 2012 movs r0, #18 | |
10001da2: f7ff fe9f bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-706 | |
10001da6: 2000 movs r0, #0 | |
; self.last_cs = cs; | |
10001da8: 990e ldr r1, [sp, #56] | |
10001daa: 7048 strb r0, [r1, #1] | |
10001dac: 9810 ldr r0, [sp, #64] | |
10001dae: 1c40 adds r0, r0, #1 | |
10001db0: 9010 str r0, [sp, #64] | |
10001db2: 980f ldr r0, [sp, #60] | |
10001db4: 498f ldr r1, [pc, #572] @ 0x10001ff4 <$d.43+0x4> | |
10001db6: 6048 str r0, [r1, #4] | |
; $func($($args),*) | |
10001db8: 488f ldr r0, [pc, #572] @ 0x10001ff8 <$d.43+0x8> | |
10001dba: f004 fe29 bl 0x10006a10 <__delay> @ imm = #19538 | |
10001dbe: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001dc0: 0780 lsls r0, r0, #30 | |
10001dc2: d408 bmi 0x10001dd6 <neotron_pico_bios::Hardware::bmc_do_request+0xba> @ imm = #16 | |
10001dc4: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001dc6: 0780 lsls r0, r0, #30 | |
10001dc8: d405 bmi 0x10001dd6 <neotron_pico_bios::Hardware::bmc_do_request+0xba> @ imm = #10 | |
10001dca: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001dcc: 0780 lsls r0, r0, #30 | |
10001dce: d402 bmi 0x10001dd6 <neotron_pico_bios::Hardware::bmc_do_request+0xba> @ imm = #4 | |
10001dd0: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001dd2: 0780 lsls r0, r0, #30 | |
10001dd4: d5f3 bpl 0x10001dbe <neotron_pico_bios::Hardware::bmc_do_request+0xa2> @ imm = #-26 | |
10001dd6: 1f23 subs r3, r4, #4 | |
10001dd8: 9807 ldr r0, [sp, #28] | |
10001dda: 6018 str r0, [r3] | |
10001ddc: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001dde: 0740 lsls r0, r0, #29 | |
10001de0: d408 bmi 0x10001df4 <neotron_pico_bios::Hardware::bmc_do_request+0xd8> @ imm = #16 | |
10001de2: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001de4: 0740 lsls r0, r0, #29 | |
10001de6: d405 bmi 0x10001df4 <neotron_pico_bios::Hardware::bmc_do_request+0xd8> @ imm = #10 | |
10001de8: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001dea: 0740 lsls r0, r0, #29 | |
10001dec: d402 bmi 0x10001df4 <neotron_pico_bios::Hardware::bmc_do_request+0xd8> @ imm = #4 | |
10001dee: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001df0: 0740 lsls r0, r0, #29 | |
10001df2: d5f3 bpl 0x10001ddc <neotron_pico_bios::Hardware::bmc_do_request+0xc0> @ imm = #-26 | |
10001df4: 6818 ldr r0, [r3] | |
10001df6: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001df8: 0780 lsls r0, r0, #30 | |
10001dfa: d408 bmi 0x10001e0e <neotron_pico_bios::Hardware::bmc_do_request+0xf2> @ imm = #16 | |
10001dfc: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001dfe: 0780 lsls r0, r0, #30 | |
10001e00: d405 bmi 0x10001e0e <neotron_pico_bios::Hardware::bmc_do_request+0xf2> @ imm = #10 | |
10001e02: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e04: 0780 lsls r0, r0, #30 | |
10001e06: d402 bmi 0x10001e0e <neotron_pico_bios::Hardware::bmc_do_request+0xf2> @ imm = #4 | |
10001e08: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e0a: 0780 lsls r0, r0, #30 | |
10001e0c: d5f3 bpl 0x10001df6 <neotron_pico_bios::Hardware::bmc_do_request+0xda> @ imm = #-26 | |
10001e0e: 9808 ldr r0, [sp, #32] | |
10001e10: 6018 str r0, [r3] | |
10001e12: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e14: 0740 lsls r0, r0, #29 | |
10001e16: d408 bmi 0x10001e2a <neotron_pico_bios::Hardware::bmc_do_request+0x10e> @ imm = #16 | |
10001e18: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e1a: 0740 lsls r0, r0, #29 | |
10001e1c: d405 bmi 0x10001e2a <neotron_pico_bios::Hardware::bmc_do_request+0x10e> @ imm = #10 | |
10001e1e: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e20: 0740 lsls r0, r0, #29 | |
10001e22: d402 bmi 0x10001e2a <neotron_pico_bios::Hardware::bmc_do_request+0x10e> @ imm = #4 | |
10001e24: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e26: 0740 lsls r0, r0, #29 | |
10001e28: d5f3 bpl 0x10001e12 <neotron_pico_bios::Hardware::bmc_do_request+0xf6> @ imm = #-26 | |
10001e2a: 6818 ldr r0, [r3] | |
10001e2c: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e2e: 0780 lsls r0, r0, #30 | |
10001e30: d408 bmi 0x10001e44 <neotron_pico_bios::Hardware::bmc_do_request+0x128> @ imm = #16 | |
10001e32: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e34: 0780 lsls r0, r0, #30 | |
10001e36: d405 bmi 0x10001e44 <neotron_pico_bios::Hardware::bmc_do_request+0x128> @ imm = #10 | |
10001e38: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e3a: 0780 lsls r0, r0, #30 | |
10001e3c: d402 bmi 0x10001e44 <neotron_pico_bios::Hardware::bmc_do_request+0x128> @ imm = #4 | |
10001e3e: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e40: 0780 lsls r0, r0, #30 | |
10001e42: d5f3 bpl 0x10001e2c <neotron_pico_bios::Hardware::bmc_do_request+0x110> @ imm = #-26 | |
10001e44: 9806 ldr r0, [sp, #24] | |
10001e46: 6018 str r0, [r3] | |
10001e48: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e4a: 0740 lsls r0, r0, #29 | |
10001e4c: d408 bmi 0x10001e60 <neotron_pico_bios::Hardware::bmc_do_request+0x144> @ imm = #16 | |
10001e4e: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e50: 0740 lsls r0, r0, #29 | |
10001e52: d405 bmi 0x10001e60 <neotron_pico_bios::Hardware::bmc_do_request+0x144> @ imm = #10 | |
10001e54: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e56: 0740 lsls r0, r0, #29 | |
10001e58: d402 bmi 0x10001e60 <neotron_pico_bios::Hardware::bmc_do_request+0x144> @ imm = #4 | |
10001e5a: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e5c: 0740 lsls r0, r0, #29 | |
10001e5e: d5f3 bpl 0x10001e48 <neotron_pico_bios::Hardware::bmc_do_request+0x12c> @ imm = #-26 | |
10001e60: 6818 ldr r0, [r3] | |
10001e62: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e64: 0780 lsls r0, r0, #30 | |
10001e66: d408 bmi 0x10001e7a <neotron_pico_bios::Hardware::bmc_do_request+0x15e> @ imm = #16 | |
10001e68: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e6a: 0780 lsls r0, r0, #30 | |
10001e6c: d405 bmi 0x10001e7a <neotron_pico_bios::Hardware::bmc_do_request+0x15e> @ imm = #10 | |
10001e6e: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e70: 0780 lsls r0, r0, #30 | |
10001e72: d402 bmi 0x10001e7a <neotron_pico_bios::Hardware::bmc_do_request+0x15e> @ imm = #4 | |
10001e74: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001e76: 0780 lsls r0, r0, #30 | |
10001e78: d5f3 bpl 0x10001e62 <neotron_pico_bios::Hardware::bmc_do_request+0x146> @ imm = #-26 | |
10001e7a: 9805 ldr r0, [sp, #20] | |
10001e7c: 6018 str r0, [r3] | |
10001e7e: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e80: 0740 lsls r0, r0, #29 | |
10001e82: d408 bmi 0x10001e96 <neotron_pico_bios::Hardware::bmc_do_request+0x17a> @ imm = #16 | |
10001e84: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e86: 0740 lsls r0, r0, #29 | |
10001e88: d405 bmi 0x10001e96 <neotron_pico_bios::Hardware::bmc_do_request+0x17a> @ imm = #10 | |
10001e8a: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e8c: 0740 lsls r0, r0, #29 | |
10001e8e: d402 bmi 0x10001e96 <neotron_pico_bios::Hardware::bmc_do_request+0x17a> @ imm = #4 | |
10001e90: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001e92: 0740 lsls r0, r0, #29 | |
10001e94: d5f3 bpl 0x10001e7e <neotron_pico_bios::Hardware::bmc_do_request+0x162> @ imm = #-26 | |
10001e96: 6818 ldr r0, [r3] | |
10001e98: 2000 movs r0, #0 | |
10001e9a: 2880 cmp r0, #128 | |
10001e9c: d02b beq 0x10001ef6 <neotron_pico_bios::Hardware::bmc_do_request+0x1da> @ imm = #86 | |
10001e9e: 9012 str r0, [sp, #72] | |
10001ea0: 461d mov r5, r3 | |
; $func($($args),*) | |
10001ea2: 4856 ldr r0, [pc, #344] @ 0x10001ffc <$d.43+0xc> | |
10001ea4: f004 fdb4 bl 0x10006a10 <__delay> @ imm = #19304 | |
10001ea8: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001eaa: 0780 lsls r0, r0, #30 | |
10001eac: d408 bmi 0x10001ec0 <neotron_pico_bios::Hardware::bmc_do_request+0x1a4> @ imm = #16 | |
10001eae: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001eb0: 0780 lsls r0, r0, #30 | |
10001eb2: d405 bmi 0x10001ec0 <neotron_pico_bios::Hardware::bmc_do_request+0x1a4> @ imm = #10 | |
10001eb4: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001eb6: 0780 lsls r0, r0, #30 | |
10001eb8: d402 bmi 0x10001ec0 <neotron_pico_bios::Hardware::bmc_do_request+0x1a4> @ imm = #4 | |
10001eba: 6820 ldr r0, [r4] | |
; if !self.is_writable() { | |
10001ebc: 0780 lsls r0, r0, #30 | |
10001ebe: d5f3 bpl 0x10001ea8 <neotron_pico_bios::Hardware::bmc_do_request+0x18c> @ imm = #-26 | |
; self.w.bits = (self.w.bits & !0xffff) | (value as u32 & 0xffff); | |
10001ec0: b2f0 uxtb r0, r6 | |
10001ec2: 462b mov r3, r5 | |
10001ec4: 6028 str r0, [r5] | |
10001ec6: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001ec8: 0740 lsls r0, r0, #29 | |
10001eca: d408 bmi 0x10001ede <neotron_pico_bios::Hardware::bmc_do_request+0x1c2> @ imm = #16 | |
10001ecc: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001ece: 0740 lsls r0, r0, #29 | |
10001ed0: d405 bmi 0x10001ede <neotron_pico_bios::Hardware::bmc_do_request+0x1c2> @ imm = #10 | |
10001ed2: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001ed4: 0740 lsls r0, r0, #29 | |
10001ed6: d402 bmi 0x10001ede <neotron_pico_bios::Hardware::bmc_do_request+0x1c2> @ imm = #4 | |
10001ed8: 6820 ldr r0, [r4] | |
; if !self.is_readable() { | |
10001eda: 0740 lsls r0, r0, #29 | |
10001edc: d5f3 bpl 0x10001ec6 <neotron_pico_bios::Hardware::bmc_do_request+0x1aa> @ imm = #-26 | |
10001ede: 681e ldr r6, [r3] | |
; *word = block!(self.read())?; | |
10001ee0: 9811 ldr r0, [sp, #68] | |
10001ee2: 7006 strb r6, [r0] | |
; Debug, Copy, Clone, PartialEq, Eq, num_enum::IntoPrimitive, num_enum::TryFromPrimitive, | |
10001ee4: 4630 mov r0, r6 | |
10001ee6: 3060 adds r0, #96 | |
10001ee8: b2c0 uxtb r0, r0 | |
10001eea: 2805 cmp r0, #5 | |
10001eec: 9812 ldr r0, [sp, #72] | |
10001eee: d302 blo 0x10001ef6 <neotron_pico_bios::Hardware::bmc_do_request+0x1da> @ imm = #4 | |
10001ef0: 1c40 adds r0, r0, #1 | |
10001ef2: 2880 cmp r0, #128 | |
10001ef4: d1d3 bne 0x10001e9e <neotron_pico_bios::Hardware::bmc_do_request+0x182> @ imm = #-90 | |
10001ef6: 980c ldr r0, [sp, #48] | |
10001ef8: 9d0a ldr r5, [sp, #40] | |
10001efa: e004 b 0x10001f06 <neotron_pico_bios::Hardware::bmc_do_request+0x1ea> @ imm = #8 | |
10001efc: 6819 ldr r1, [r3] | |
; *word = block!(self.read())?; | |
10001efe: 7001 strb r1, [r0] | |
10001f00: 1c40 adds r0, r0, #1 | |
10001f02: 42a8 cmp r0, r5 | |
10001f04: d01a beq 0x10001f3c <neotron_pico_bios::Hardware::bmc_do_request+0x220> @ imm = #52 | |
10001f06: 7801 ldrb r1, [r0] | |
10001f08: 6822 ldr r2, [r4] | |
; if !self.is_writable() { | |
10001f0a: 0792 lsls r2, r2, #30 | |
10001f0c: d408 bmi 0x10001f20 <neotron_pico_bios::Hardware::bmc_do_request+0x204> @ imm = #16 | |
10001f0e: 6822 ldr r2, [r4] | |
; if !self.is_writable() { | |
10001f10: 0792 lsls r2, r2, #30 | |
10001f12: d405 bmi 0x10001f20 <neotron_pico_bios::Hardware::bmc_do_request+0x204> @ imm = #10 | |
10001f14: 6822 ldr r2, [r4] | |
; if !self.is_writable() { | |
10001f16: 0792 lsls r2, r2, #30 | |
10001f18: d402 bmi 0x10001f20 <neotron_pico_bios::Hardware::bmc_do_request+0x204> @ imm = #4 | |
10001f1a: 6822 ldr r2, [r4] | |
; if !self.is_writable() { | |
10001f1c: 0792 lsls r2, r2, #30 | |
10001f1e: d5f3 bpl 0x10001f08 <neotron_pico_bios::Hardware::bmc_do_request+0x1ec> @ imm = #-26 | |
10001f20: 6019 str r1, [r3] | |
10001f22: 6821 ldr r1, [r4] | |
; if !self.is_readable() { | |
10001f24: 0749 lsls r1, r1, #29 | |
10001f26: d4e9 bmi 0x10001efc <neotron_pico_bios::Hardware::bmc_do_request+0x1e0> @ imm = #-46 | |
10001f28: 6821 ldr r1, [r4] | |
; if !self.is_readable() { | |
10001f2a: 0749 lsls r1, r1, #29 | |
10001f2c: d4e6 bmi 0x10001efc <neotron_pico_bios::Hardware::bmc_do_request+0x1e0> @ imm = #-52 | |
10001f2e: 6821 ldr r1, [r4] | |
; if !self.is_readable() { | |
10001f30: 0749 lsls r1, r1, #29 | |
10001f32: d4e3 bmi 0x10001efc <neotron_pico_bios::Hardware::bmc_do_request+0x1e0> @ imm = #-58 | |
10001f34: 6821 ldr r1, [r4] | |
; if !self.is_readable() { | |
10001f36: 0749 lsls r1, r1, #29 | |
10001f38: d5f3 bpl 0x10001f22 <neotron_pico_bios::Hardware::bmc_do_request+0x206> @ imm = #-26 | |
10001f3a: e7df b 0x10001efc <neotron_pico_bios::Hardware::bmc_do_request+0x1e0> @ imm = #-66 | |
10001f3c: 20ff movs r0, #255 | |
10001f3e: 301e adds r0, #30 | |
; $func($($args),*) | |
10001f40: f004 fd66 bl 0x10006a10 <__delay> @ imm = #19148 | |
10001f44: 980f ldr r0, [sp, #60] | |
10001f46: 492b ldr r1, [pc, #172] @ 0x10001ff4 <$d.43+0x4> | |
10001f48: 6008 str r0, [r1] | |
10001f4a: 980d ldr r0, [sp, #52] | |
10001f4c: 990b ldr r1, [sp, #44] | |
10001f4e: 4008 ands r0, r1 | |
10001f50: 9909 ldr r1, [sp, #36] | |
10001f52: 2903 cmp r1, #3 | |
10001f54: d202 bhs 0x10001f5c <neotron_pico_bios::Hardware::bmc_do_request+0x240> @ imm = #4 | |
10001f56: 2100 movs r1, #0 | |
10001f58: 9a11 ldr r2, [sp, #68] | |
10001f5a: e012 b 0x10001f82 <neotron_pico_bios::Hardware::bmc_do_request+0x266> @ imm = #36 | |
10001f5c: 2100 movs r1, #0 | |
10001f5e: 9b04 ldr r3, [sp, #16] | |
10001f60: 9a11 ldr r2, [sp, #68] | |
10001f62: 4e27 ldr r6, [pc, #156] @ 0x10002000 <$d.43+0x10> | |
; let idx = crc ^ *d; | |
10001f64: 7815 ldrb r5, [r2] | |
10001f66: 404d eors r5, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f68: 5d71 ldrb r1, [r6, r5] | |
; let idx = crc ^ *d; | |
10001f6a: 7855 ldrb r5, [r2, #1] | |
10001f6c: 404d eors r5, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f6e: 5d71 ldrb r1, [r6, r5] | |
; let idx = crc ^ *d; | |
10001f70: 7895 ldrb r5, [r2, #2] | |
10001f72: 404d eors r5, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f74: 5d71 ldrb r1, [r6, r5] | |
; let idx = crc ^ *d; | |
10001f76: 78d5 ldrb r5, [r2, #3] | |
10001f78: 404d eors r5, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f7a: 5d71 ldrb r1, [r6, r5] | |
10001f7c: 1d12 adds r2, r2, #4 | |
10001f7e: 1f1b subs r3, r3, #4 | |
10001f80: d1f0 bne 0x10001f64 <neotron_pico_bios::Hardware::bmc_do_request+0x248> @ imm = #-32 | |
10001f82: 2800 cmp r0, #0 | |
10001f84: d100 bne 0x10001f88 <neotron_pico_bios::Hardware::bmc_do_request+0x26c> @ imm = #0 | |
10001f86: e6f5 b 0x10001d74 <neotron_pico_bios::Hardware::bmc_do_request+0x58> @ imm = #-534 | |
; let idx = crc ^ *d; | |
10001f88: 7813 ldrb r3, [r2] | |
10001f8a: 404b eors r3, r1 | |
10001f8c: 4e1c ldr r6, [pc, #112] @ 0x10002000 <$d.43+0x10> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f8e: 5cf1 ldrb r1, [r6, r3] | |
10001f90: 2801 cmp r0, #1 | |
10001f92: d100 bne 0x10001f96 <neotron_pico_bios::Hardware::bmc_do_request+0x27a> @ imm = #0 | |
10001f94: e6ee b 0x10001d74 <neotron_pico_bios::Hardware::bmc_do_request+0x58> @ imm = #-548 | |
; let idx = crc ^ *d; | |
10001f96: 7853 ldrb r3, [r2, #1] | |
10001f98: 404b eors r3, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001f9a: 5cf1 ldrb r1, [r6, r3] | |
10001f9c: 2802 cmp r0, #2 | |
10001f9e: d100 bne 0x10001fa2 <neotron_pico_bios::Hardware::bmc_do_request+0x286> @ imm = #0 | |
10001fa0: e6e8 b 0x10001d74 <neotron_pico_bios::Hardware::bmc_do_request+0x58> @ imm = #-560 | |
; let idx = crc ^ *d; | |
10001fa2: 7890 ldrb r0, [r2, #2] | |
10001fa4: 4048 eors r0, r1 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10001fa6: 5c31 ldrb r1, [r6, r0] | |
10001fa8: e6e4 b 0x10001d74 <neotron_pico_bios::Hardware::bmc_do_request+0x58> @ imm = #-568 | |
; result: data[0].try_into().map_err(|_| Error::BadResponseResult)?, | |
10001faa: 9811 ldr r0, [sp, #68] | |
10001fac: 7801 ldrb r1, [r0] | |
; Debug, Copy, Clone, PartialEq, Eq, num_enum::IntoPrimitive, num_enum::TryFromPrimitive, | |
10001fae: 4608 mov r0, r1 | |
10001fb0: 3060 adds r0, #96 | |
10001fb2: b2c0 uxtb r0, r0 | |
10001fb4: 2805 cmp r0, #5 | |
10001fb6: d300 blo 0x10001fba <neotron_pico_bios::Hardware::bmc_do_request+0x29e> @ imm = #0 | |
10001fb8: e6df b 0x10001d7a <neotron_pico_bios::Hardware::bmc_do_request+0x5e> @ imm = #-578 | |
10001fba: 4608 mov r0, r1 | |
10001fbc: 38a0 subs r0, #160 | |
10001fbe: 1e42 subs r2, r0, #1 | |
10001fc0: 4190 sbcs r0, r2 | |
; if res.result == neotron_bmc_protocol::ResponseResult::Ok { | |
10001fc2: 29a0 cmp r1, #160 | |
10001fc4: d10d bne 0x10001fe2 <neotron_pico_bios::Hardware::bmc_do_request+0x2c6> @ imm = #26 | |
10001fc6: 9902 ldr r1, [sp, #8] | |
; if res.result == neotron_bmc_protocol::ResponseResult::Ok { | |
10001fc8: 2900 cmp r1, #0 | |
10001fca: 9a03 ldr r2, [sp, #12] | |
10001fcc: d009 beq 0x10001fe2 <neotron_pico_bios::Hardware::bmc_do_request+0x2c6> @ imm = #18 | |
10001fce: 980d ldr r0, [sp, #52] | |
10001fd0: 1e80 subs r0, r0, #2 | |
; if res.data.len() == buffer.len() { | |
10001fd2: 4290 cmp r0, r2 | |
10001fd4: 9801 ldr r0, [sp, #4] | |
10001fd6: d104 bne 0x10001fe2 <neotron_pico_bios::Hardware::bmc_do_request+0x2c6> @ imm = #8 | |
10001fd8: 4608 mov r0, r1 | |
10001fda: 990c ldr r1, [sp, #48] | |
10001fdc: f004 fcd6 bl 0x1000698c <__aeabi_memcpy> @ imm = #18860 | |
10001fe0: 2000 movs r0, #0 | |
; } | |
10001fe2: b013 add sp, #76 | |
10001fe4: bdf0 pop {r4, r5, r6, r7, pc} | |
; panic!("Failed to talk to BMC after several retries."); | |
10001fe6: 4808 ldr r0, [pc, #32] @ 0x10002008 <$d.43+0x18> | |
10001fe8: 212c movs r1, #44 | |
10001fea: f002 fccb bl 0x10004984 <core::panicking::panic> @ imm = #10646 | |
10001fee: defe trap | |
10001ff0 <$d.43>: | |
10001ff0: 0c c0 03 40 .word 0x4003c00c | |
10001ff4: 14 00 00 d0 .word 0xd0000014 | |
10001ff8: 94 05 00 00 .word 0x00000594 | |
10001ffc: 59 03 00 00 .word 0x00000359 | |
10002000: ca 77 00 10 .word 0x100077ca | |
10002004: 92 fb d9 00 .word 0x00d9fb92 | |
10002008: 54 73 00 10 .word 0x10007354 | |
1000200c <neotron_pico_bios::sign_on>: | |
; fn sign_on() { | |
1000200c: b5f0 push {r4, r5, r6, r7, lr} | |
1000200e: af03 add r7, sp, #12 | |
10002010: b0b1 sub sp, #196 | |
10002012: 2000 movs r0, #0 | |
; TextConsole { | |
10002014: 9013 str r0, [sp, #76] | |
10002016: 9011 str r0, [sp, #68] | |
10002018: 9012 str r0, [sp, #72] | |
1000201a: a812 add r0, sp, #72 | |
1000201c: 49fb ldr r1, [pc, #1004] @ 0x1000240c <$d.45> | |
1000201e: 6001 str r1, [r0] | |
10002020: 253c movs r5, #60 | |
10002022: 4cfb ldr r4, [pc, #1004] @ 0x10002410 <$d.45+0x4> | |
10002024: a812 add r0, sp, #72 | |
; writeln!(&tc).unwrap(); | |
10002026: 902b str r0, [sp, #172] | |
10002028: a82b add r0, sp, #172 | |
1000202a: 9015 str r0, [sp, #84] | |
1000202c: 9911 ldr r1, [sp, #68] | |
1000202e: 9127 str r1, [sp, #156] | |
10002030: 48f8 ldr r0, [pc, #992] @ 0x10002414 <$d.45+0x8> | |
10002032: 9026 str r0, [sp, #152] | |
10002034: 2601 movs r6, #1 | |
10002036: 9625 str r6, [sp, #148] | |
10002038: 48f7 ldr r0, [pc, #988] @ 0x10002418 <$d.45+0xc> | |
1000203a: 9024 str r0, [sp, #144] | |
1000203c: 9122 str r1, [sp, #136] | |
1000203e: a815 add r0, sp, #84 | |
10002040: aa22 add r2, sp, #136 | |
10002042: 4621 mov r1, r4 | |
10002044: f002 fca4 bl 0x10004990 <core::fmt::write> @ imm = #10568 | |
10002048: 2800 cmp r0, #0 | |
1000204a: d001 beq 0x10002050 <neotron_pico_bios::sign_on+0x44> @ imm = #2 | |
1000204c: f000 fcbf bl 0x100029ce <$t.48+0x132> @ imm = #2430 | |
10002050: 1e6d subs r5, r5, #1 | |
10002052: d1e7 bne 0x10002024 <neotron_pico_bios::sign_on+0x18> @ imm = #-50 | |
10002054: 48f1 ldr r0, [pc, #964] @ 0x1000241c <$d.45+0x10> | |
10002056: 6841 ldr r1, [r0, #4] | |
; if (row as usize) < NUM_TEXT_ROWS.load(Ordering::Relaxed) { | |
10002058: 2900 cmp r1, #0 | |
1000205a: 9a11 ldr r2, [sp, #68] | |
1000205c: d001 beq 0x10002062 <neotron_pico_bios::sign_on+0x56> @ imm = #2 | |
1000205e: a912 add r1, sp, #72 | |
10002060: 80ca strh r2, [r1, #6] | |
10002062: 6800 ldr r0, [r0] | |
; if (col as usize) < NUM_TEXT_COLS.load(Ordering::Relaxed) { | |
10002064: 2800 cmp r0, #0 | |
10002066: d001 beq 0x1000206c <neotron_pico_bios::sign_on+0x60> @ imm = #2 | |
10002068: a812 add r0, sp, #72 | |
1000206a: 8082 strh r2, [r0, #4] | |
1000206c: a812 add r0, sp, #72 | |
; writeln!(&tc, "Neotron Pico BIOS {}", VERSION.trim_matches('\0')).unwrap(); | |
1000206e: 901d str r0, [sp, #116] | |
10002070: 2019 movs r0, #25 | |
10002072: 4deb ldr r5, [pc, #940] @ 0x10002420 <$d.45+0x14> | |
10002074: e00e b 0x10002094 <neotron_pico_bios::sign_on+0x88> @ imm = #28 | |
10002076: 201f movs r0, #31 | |
10002078: 9c0f ldr r4, [sp, #60] | |
1000207a: 4004 ands r4, r0 | |
1000207c: 4de8 ldr r5, [pc, #928] @ 0x10002420 <$d.45+0x14> | |
1000207e: 9810 ldr r0, [sp, #64] | |
10002080: 4003 ands r3, r0 | |
10002082: 01a0 lsls r0, r4, #6 | |
10002084: 18c4 adds r4, r0, r3 | |
10002086: 2011 movs r0, #17 | |
10002088: 0400 lsls r0, r0, #16 | |
1000208a: 4284 cmp r4, r0 | |
1000208c: d033 beq 0x100020f6 <neotron_pico_bios::sign_on+0xea> @ imm = #102 | |
1000208e: 1b50 subs r0, r2, r5 | |
10002090: 2c00 cmp r4, #0 | |
10002092: d131 bne 0x100020f8 <neotron_pico_bios::sign_on+0xec> @ imm = #98 | |
10002094: 2801 cmp r0, #1 | |
10002096: d02e beq 0x100020f6 <neotron_pico_bios::sign_on+0xea> @ imm = #92 | |
10002098: 4601 mov r1, r0 | |
1000209a: 1828 adds r0, r5, r0 | |
1000209c: 1e42 subs r2, r0, #1 | |
1000209e: 7814 ldrb r4, [r2] | |
100020a0: b263 sxtb r3, r4 | |
100020a2: 2b00 cmp r3, #0 | |
100020a4: d5f3 bpl 0x1000208e <neotron_pico_bios::sign_on+0x82> @ imm = #-26 | |
100020a6: 1e82 subs r2, r0, #2 | |
100020a8: 7814 ldrb r4, [r2] | |
100020aa: 940f str r4, [sp, #60] | |
100020ac: b264 sxtb r4, r4 | |
100020ae: 253f movs r5, #63 | |
100020b0: 9510 str r5, [sp, #64] | |
100020b2: 43ed mvns r5, r5 | |
100020b4: 940e str r4, [sp, #56] | |
100020b6: 42ac cmp r4, r5 | |
100020b8: dadd bge 0x10002076 <neotron_pico_bios::sign_on+0x6a> @ imm = #-70 | |
100020ba: 1ec2 subs r2, r0, #3 | |
100020bc: 7814 ldrb r4, [r2] | |
100020be: 940f str r4, [sp, #60] | |
100020c0: b264 sxtb r4, r4 | |
100020c2: 42ac cmp r4, r5 | |
100020c4: da0b bge 0x100020de <neotron_pico_bios::sign_on+0xd2> @ imm = #22 | |
100020c6: 4625 mov r5, r4 | |
100020c8: 9c10 ldr r4, [sp, #64] | |
100020ca: 4025 ands r5, r4 | |
100020cc: 1f02 subs r2, r0, #4 | |
100020ce: 7810 ldrb r0, [r2] | |
100020d0: 0740 lsls r0, r0, #29 | |
100020d2: 0dc0 lsrs r0, r0, #23 | |
100020d4: 1940 adds r0, r0, r5 | |
100020d6: 900f str r0, [sp, #60] | |
100020d8: 4620 mov r0, r4 | |
100020da: 4dd1 ldr r5, [pc, #836] @ 0x10002420 <$d.45+0x14> | |
100020dc: e005 b 0x100020ea <neotron_pico_bios::sign_on+0xde> @ imm = #10 | |
100020de: 200f movs r0, #15 | |
100020e0: 9c0f ldr r4, [sp, #60] | |
100020e2: 4004 ands r4, r0 | |
100020e4: 940f str r4, [sp, #60] | |
100020e6: 4dce ldr r5, [pc, #824] @ 0x10002420 <$d.45+0x14> | |
100020e8: 9810 ldr r0, [sp, #64] | |
100020ea: 9c0e ldr r4, [sp, #56] | |
100020ec: 4004 ands r4, r0 | |
100020ee: 980f ldr r0, [sp, #60] | |
100020f0: 0180 lsls r0, r0, #6 | |
100020f2: 1904 adds r4, r0, r4 | |
100020f4: e7c3 b 0x1000207e <neotron_pico_bios::sign_on+0x72> @ imm = #-122 | |
100020f6: 4631 mov r1, r6 | |
; writeln!(&tc, "Neotron Pico BIOS {}", VERSION.trim_matches('\0')).unwrap(); | |
100020f8: 9116 str r1, [sp, #88] | |
100020fa: 9515 str r5, [sp, #84] | |
100020fc: 4cc9 ldr r4, [pc, #804] @ 0x10002424 <$d.45+0x18> | |
100020fe: 942c str r4, [sp, #176] | |
10002100: a815 add r0, sp, #84 | |
10002102: 902b str r0, [sp, #172] | |
10002104: a81d add r0, sp, #116 | |
10002106: 9020 str r0, [sp, #128] | |
10002108: 9627 str r6, [sp, #156] | |
1000210a: a82b add r0, sp, #172 | |
1000210c: 9026 str r0, [sp, #152] | |
1000210e: 2002 movs r0, #2 | |
10002110: 900e str r0, [sp, #56] | |
10002112: 9025 str r0, [sp, #148] | |
10002114: 48c4 ldr r0, [pc, #784] @ 0x10002428 <$d.45+0x1c> | |
10002116: 9024 str r0, [sp, #144] | |
10002118: 9d11 ldr r5, [sp, #68] | |
1000211a: 9522 str r5, [sp, #136] | |
1000211c: a820 add r0, sp, #128 | |
1000211e: 49bc ldr r1, [pc, #752] @ 0x10002410 <$d.45+0x4> | |
10002120: aa22 add r2, sp, #136 | |
10002122: f002 fc35 bl 0x10004990 <core::fmt::write> @ imm = #10346 | |
10002126: 2800 cmp r0, #0 | |
10002128: d001 beq 0x1000212e <neotron_pico_bios::sign_on+0x122> @ imm = #2 | |
1000212a: f000 fc50 bl 0x100029ce <$t.48+0x132> @ imm = #2208 | |
1000212e: a812 add r0, sp, #72 | |
; write!(&tc, "{}", LICENCE_TEXT).unwrap(); | |
10002130: 9020 str r0, [sp, #128] | |
10002132: 9416 str r4, [sp, #88] | |
10002134: 48bd ldr r0, [pc, #756] @ 0x1000242c <$d.45+0x20> | |
10002136: 9015 str r0, [sp, #84] | |
10002138: a820 add r0, sp, #128 | |
1000213a: 902b str r0, [sp, #172] | |
1000213c: 2101 movs r1, #1 | |
1000213e: 9127 str r1, [sp, #156] | |
10002140: a815 add r0, sp, #84 | |
10002142: 9026 str r0, [sp, #152] | |
10002144: 9110 str r1, [sp, #64] | |
10002146: 9125 str r1, [sp, #148] | |
10002148: 48b9 ldr r0, [pc, #740] @ 0x10002430 <$d.45+0x24> | |
1000214a: 9024 str r0, [sp, #144] | |
1000214c: 9522 str r5, [sp, #136] | |
1000214e: a82b add r0, sp, #172 | |
10002150: 49af ldr r1, [pc, #700] @ 0x10002410 <$d.45+0x4> | |
10002152: aa22 add r2, sp, #136 | |
10002154: f002 fc1c bl 0x10004990 <core::fmt::write> @ imm = #10296 | |
10002158: 2800 cmp r0, #0 | |
1000215a: d001 beq 0x10002160 <neotron_pico_bios::sign_on+0x154> @ imm = #2 | |
1000215c: f000 fc37 bl 0x100029ce <$t.48+0x132> @ imm = #2158 | |
; $func($($args),*) | |
10002160: f004 fc5d bl 0x10006a1e <__primask_r> @ imm = #18618 | |
10002164: 4604 mov r4, r0 | |
10002166: 200d movs r0, #13 | |
10002168: 0700 lsls r0, r0, #28 | |
1000216a: 900c str r0, [sp, #48] | |
1000216c: 6800 ldr r0, [r0] | |
1000216e: 49b1 ldr r1, [pc, #708] @ 0x10002434 <$d.45+0x28> | |
10002170: 7c09 ldrb r1, [r1, #16] | |
10002172: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
10002176: 1c46 adds r6, r0, #1 | |
10002178: b2f0 uxtb r0, r6 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
1000217a: 4281 cmp r1, r0 | |
1000217c: d016 beq 0x100021ac <neotron_pico_bios::sign_on+0x1a0> @ imm = #44 | |
1000217e: 9810 ldr r0, [sp, #64] | |
10002180: 4004 ands r4, r0 | |
; if interrupts_active { | |
10002182: d108 bne 0x10002196 <neotron_pico_bios::sign_on+0x18a> @ imm = #16 | |
; $func($($args),*) | |
10002184: f004 fc40 bl 0x10006a08 <__cpsid> @ imm = #18560 | |
10002188: 48ab ldr r0, [pc, #684] @ 0x10002438 <$d.45+0x2c> | |
1000218a: 6800 ldr r0, [r0] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000218c: 2800 cmp r0, #0 | |
1000218e: d108 bne 0x100021a2 <neotron_pico_bios::sign_on+0x196> @ imm = #16 | |
; $func($($args),*) | |
10002190: f004 fc3c bl 0x10006a0c <__cpsie> @ imm = #18552 | |
10002194: e7f6 b 0x10002184 <neotron_pico_bios::sign_on+0x178> @ imm = #-20 | |
10002196: 4da8 ldr r5, [pc, #672] @ 0x10002438 <$d.45+0x2c> | |
; $func($($args),*) | |
10002198: f004 fc36 bl 0x10006a08 <__cpsid> @ imm = #18540 | |
1000219c: 6828 ldr r0, [r5] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000219e: 2800 cmp r0, #0 | |
100021a0: d0fa beq 0x10002198 <neotron_pico_bios::sign_on+0x18c> @ imm = #-12 | |
100021a2: 48a4 ldr r0, [pc, #656] @ 0x10002434 <$d.45+0x28> | |
100021a4: 7406 strb r6, [r0, #16] | |
; interrupts_active as _ | |
100021a6: 9810 ldr r0, [sp, #64] | |
100021a8: 4044 eors r4, r0 | |
100021aa: 940e str r4, [sp, #56] | |
100021ac: 4aa3 ldr r2, [pc, #652] @ 0x1000243c <$d.45+0x30> | |
100021ae: 6810 ldr r0, [r2] | |
100021b0: 2800 cmp r0, #0 | |
100021b2: d001 beq 0x100021b8 <neotron_pico_bios::sign_on+0x1ac> @ imm = #2 | |
100021b4: f000 fc12 bl 0x100029dc <$t.48+0x140> @ imm = #2084 | |
100021b8: 25d4 movs r5, #212 | |
100021ba: 5d50 ldrb r0, [r2, r5] | |
100021bc: 9911 ldr r1, [sp, #68] | |
100021be: 43ce mvns r6, r1 | |
100021c0: 4611 mov r1, r2 | |
100021c2: c140 stm r1!, {r6} | |
100021c4: 2802 cmp r0, #2 | |
100021c6: d000 beq 0x100021ca <neotron_pico_bios::sign_on+0x1be> @ imm = #0 | |
100021c8: 9111 str r1, [sp, #68] | |
100021ca: 2802 cmp r0, #2 | |
100021cc: d101 bne 0x100021d2 <neotron_pico_bios::sign_on+0x1c6> @ imm = #2 | |
100021ce: f000 fc0c bl 0x100029ea <$t.48+0x14e> @ imm = #2072 | |
100021d2: 2000 movs r0, #0 | |
; let mut firmware_version = [0u8; 32]; | |
100021d4: 9029 str r0, [sp, #164] | |
100021d6: 9028 str r0, [sp, #160] | |
100021d8: 9027 str r0, [sp, #156] | |
100021da: 9026 str r0, [sp, #152] | |
100021dc: 9025 str r0, [sp, #148] | |
100021de: 9024 str r0, [sp, #144] | |
100021e0: 9023 str r0, [sp, #140] | |
100021e2: 9022 str r0, [sp, #136] | |
100021e4: 4a93 ldr r2, [pc, #588] @ 0x10002434 <$d.45+0x28> | |
100021e6: 7910 ldrb r0, [r2, #4] | |
100021e8: 4241 rsbs r1, r0, #0 | |
100021ea: 4141 adcs r1, r0 | |
100021ec: 7111 strb r1, [r2, #4] | |
; } | |
100021ee: 2800 cmp r0, #0 | |
100021f0: d001 beq 0x100021f6 <neotron_pico_bios::sign_on+0x1ea> @ imm = #2 | |
100021f2: 20c1 movs r0, #193 | |
100021f4: e000 b 0x100021f8 <neotron_pico_bios::sign_on+0x1ec> @ imm = #0 | |
100021f6: 20c0 movs r0, #192 | |
; } | |
100021f8: 0601 lsls r1, r0, #24 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100021fa: 4c91 ldr r4, [pc, #580] @ 0x10002440 <$d.45+0x34> | |
100021fc: 5c20 ldrb r0, [r4, r0] | |
; let idx = crc ^ *d; | |
100021fe: 9a10 ldr r2, [sp, #64] | |
10002200: 4050 eors r0, r2 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002202: 5c20 ldrb r0, [r4, r0] | |
10002204: 2320 movs r3, #32 | |
; let idx = crc ^ *d; | |
10002206: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002208: 5c20 ldrb r0, [r4, r0] | |
; } | |
1000220a: 0400 lsls r0, r0, #16 | |
1000220c: 1840 adds r0, r0, r1 | |
1000220e: 498d ldr r1, [pc, #564] @ 0x10002444 <$d.45+0x38> | |
10002210: 1841 adds r1, r0, r1 | |
10002212: aa22 add r2, sp, #136 | |
; self.bmc_do_request( | |
10002214: 9811 ldr r0, [sp, #68] | |
10002216: 9308 str r3, [sp, #32] | |
10002218: f7ff fd80 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1280 | |
1000221c: 900b str r0, [sp, #44] | |
1000221e: 2800 cmp r0, #0 | |
10002220: 950a str r5, [sp, #40] | |
10002222: 9609 str r6, [sp, #36] | |
10002224: d002 beq 0x1000222c <neotron_pico_bios::sign_on+0x220> @ imm = #4 | |
10002226: 4d83 ldr r5, [pc, #524] @ 0x10002434 <$d.45+0x28> | |
10002228: 4c84 ldr r4, [pc, #528] @ 0x1000243c <$d.45+0x30> | |
1000222a: e007 b 0x1000223c <neotron_pico_bios::sign_on+0x230> @ imm = #14 | |
1000222c: a822 add r0, sp, #136 | |
1000222e: a915 add r1, sp, #84 | |
; Ok(firmware_version) | |
10002230: c83c ldm r0!, {r2, r3, r4, r5} | |
10002232: c13c stm r1!, {r2, r3, r4, r5} | |
10002234: c83c ldm r0!, {r2, r3, r4, r5} | |
10002236: c13c stm r1!, {r2, r3, r4, r5} | |
10002238: 4c80 ldr r4, [pc, #512] @ 0x1000243c <$d.45+0x30> | |
1000223a: 4d7e ldr r5, [pc, #504] @ 0x10002434 <$d.45+0x28> | |
1000223c: 7928 ldrb r0, [r5, #4] | |
1000223e: 4241 rsbs r1, r0, #0 | |
10002240: 4141 adcs r1, r0 | |
10002242: 7129 strb r1, [r5, #4] | |
; } | |
10002244: 2800 cmp r0, #0 | |
10002246: d001 beq 0x1000224c <neotron_pico_bios::sign_on+0x240> @ imm = #2 | |
10002248: 20c3 movs r0, #195 | |
1000224a: e000 b 0x1000224e <neotron_pico_bios::sign_on+0x242> @ imm = #0 | |
1000224c: 20c2 movs r0, #194 | |
; } | |
1000224e: 0601 lsls r1, r0, #24 | |
10002250: 4b7b ldr r3, [pc, #492] @ 0x10002440 <$d.45+0x34> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002252: 5c18 ldrb r0, [r3, r0] | |
10002254: 2272 movs r2, #114 | |
10002256: 9207 str r2, [sp, #28] | |
; let idx = crc ^ *d; | |
10002258: 4050 eors r0, r2 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000225a: 5c18 ldrb r0, [r3, r0] | |
1000225c: 2289 movs r2, #137 | |
; let idx = crc ^ *d; | |
1000225e: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002260: 5c98 ldrb r0, [r3, r2] | |
; } | |
10002262: 0400 lsls r0, r0, #16 | |
10002264: 1840 adds r0, r0, r1 | |
10002266: 4978 ldr r1, [pc, #480] @ 0x10002448 <$d.45+0x3c> | |
10002268: 1841 adds r1, r0, r1 | |
1000226a: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
1000226c: 9811 ldr r0, [sp, #68] | |
1000226e: 920f str r2, [sp, #60] | |
10002270: f7ff fd54 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1368 | |
10002274: 9910 ldr r1, [sp, #64] | |
10002276: 078a lsls r2, r1, #30 | |
10002278: 920d str r2, [sp, #52] | |
1000227a: 040e lsls r6, r1, #16 | |
1000227c: 2800 cmp r0, #0 | |
1000227e: d000 beq 0x10002282 <neotron_pico_bios::sign_on+0x276> @ imm = #0 | |
10002280: e158 b 0x10002534 <$t.46+0xcc> @ imm = #688 | |
10002282: 7928 ldrb r0, [r5, #4] | |
10002284: 4241 rsbs r1, r0, #0 | |
10002286: 4141 adcs r1, r0 | |
10002288: 7129 strb r1, [r5, #4] | |
; } | |
1000228a: 2800 cmp r0, #0 | |
1000228c: d001 beq 0x10002292 <neotron_pico_bios::sign_on+0x286> @ imm = #2 | |
1000228e: 20c3 movs r0, #195 | |
10002290: e000 b 0x10002294 <neotron_pico_bios::sign_on+0x288> @ imm = #0 | |
10002292: 20c2 movs r0, #194 | |
; } | |
10002294: 0601 lsls r1, r0, #24 | |
10002296: 4b6a ldr r3, [pc, #424] @ 0x10002440 <$d.45+0x34> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002298: 5c18 ldrb r0, [r3, r0] | |
1000229a: 2271 movs r2, #113 | |
; let idx = crc ^ *d; | |
1000229c: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000229e: 5c98 ldrb r0, [r3, r2] | |
100022a0: 5c18 ldrb r0, [r3, r0] | |
; } | |
100022a2: 0400 lsls r0, r0, #16 | |
100022a4: 1841 adds r1, r0, r1 | |
100022a6: 3171 adds r1, #113 | |
100022a8: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
100022aa: 9811 ldr r0, [sp, #68] | |
100022ac: f7ff fd36 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1428 | |
100022b0: 2800 cmp r0, #0 | |
100022b2: d000 beq 0x100022b6 <neotron_pico_bios::sign_on+0x2aa> @ imm = #0 | |
100022b4: e13e b 0x10002534 <$t.46+0xcc> @ imm = #636 | |
100022b6: 7928 ldrb r0, [r5, #4] | |
100022b8: 4241 rsbs r1, r0, #0 | |
100022ba: 4141 adcs r1, r0 | |
100022bc: 7129 strb r1, [r5, #4] | |
; } | |
100022be: 2800 cmp r0, #0 | |
100022c0: d001 beq 0x100022c6 <neotron_pico_bios::sign_on+0x2ba> @ imm = #2 | |
100022c2: 20c3 movs r0, #195 | |
100022c4: e000 b 0x100022c8 <neotron_pico_bios::sign_on+0x2bc> @ imm = #0 | |
100022c6: 20c2 movs r0, #194 | |
; } | |
100022c8: 0601 lsls r1, r0, #24 | |
100022ca: 4b5d ldr r3, [pc, #372] @ 0x10002440 <$d.45+0x34> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100022cc: 5c18 ldrb r0, [r3, r0] | |
100022ce: 2273 movs r2, #115 | |
; let idx = crc ^ *d; | |
100022d0: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100022d2: 5c98 ldrb r0, [r3, r2] | |
100022d4: 227f movs r2, #127 | |
; let idx = crc ^ *d; | |
100022d6: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100022d8: 5c98 ldrb r0, [r3, r2] | |
; } | |
100022da: 0400 lsls r0, r0, #16 | |
100022dc: 1840 adds r0, r0, r1 | |
100022de: 495b ldr r1, [pc, #364] @ 0x1000244c <$d.45+0x40> | |
100022e0: 1841 adds r1, r0, r1 | |
100022e2: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
100022e4: 9811 ldr r0, [sp, #68] | |
100022e6: f7ff fd19 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1486 | |
100022ea: 2800 cmp r0, #0 | |
100022ec: d000 beq 0x100022f0 <neotron_pico_bios::sign_on+0x2e4> @ imm = #0 | |
100022ee: e121 b 0x10002534 <$t.46+0xcc> @ imm = #578 | |
100022f0: 7928 ldrb r0, [r5, #4] | |
100022f2: 4241 rsbs r1, r0, #0 | |
100022f4: 4141 adcs r1, r0 | |
100022f6: 7129 strb r1, [r5, #4] | |
; } | |
100022f8: 2800 cmp r0, #0 | |
100022fa: d001 beq 0x10002300 <neotron_pico_bios::sign_on+0x2f4> @ imm = #2 | |
100022fc: 20c3 movs r0, #195 | |
100022fe: e000 b 0x10002302 <neotron_pico_bios::sign_on+0x2f6> @ imm = #0 | |
10002300: 20c2 movs r0, #194 | |
; } | |
10002302: 0601 lsls r1, r0, #24 | |
10002304: 4a4e ldr r2, [pc, #312] @ 0x10002440 <$d.45+0x34> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002306: 5c10 ldrb r0, [r2, r0] | |
10002308: 2370 movs r3, #112 | |
1000230a: 9306 str r3, [sp, #24] | |
; let idx = crc ^ *d; | |
1000230c: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000230e: 5c10 ldrb r0, [r2, r0] | |
10002310: 2307 movs r3, #7 | |
10002312: 9305 str r3, [sp, #20] | |
; let idx = crc ^ *d; | |
10002314: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002316: 5c10 ldrb r0, [r2, r0] | |
; } | |
10002318: 0400 lsls r0, r0, #16 | |
1000231a: 1840 adds r0, r0, r1 | |
1000231c: 2177 movs r1, #119 | |
1000231e: 0109 lsls r1, r1, #4 | |
10002320: 9104 str r1, [sp, #16] | |
10002322: 1841 adds r1, r0, r1 | |
10002324: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
10002326: 9811 ldr r0, [sp, #68] | |
10002328: f7ff fcf8 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1552 | |
1000232c: 2800 cmp r0, #0 | |
1000232e: d000 beq 0x10002332 <neotron_pico_bios::sign_on+0x326> @ imm = #0 | |
10002330: e100 b 0x10002534 <$t.46+0xcc> @ imm = #512 | |
10002332: 7928 ldrb r0, [r5, #4] | |
10002334: 4241 rsbs r1, r0, #0 | |
10002336: 4141 adcs r1, r0 | |
10002338: 7129 strb r1, [r5, #4] | |
; } | |
1000233a: 2800 cmp r0, #0 | |
1000233c: d001 beq 0x10002342 <neotron_pico_bios::sign_on+0x336> @ imm = #2 | |
1000233e: 20c3 movs r0, #195 | |
10002340: e000 b 0x10002344 <neotron_pico_bios::sign_on+0x338> @ imm = #0 | |
10002342: 20c2 movs r0, #194 | |
; } | |
10002344: 0601 lsls r1, r0, #24 | |
10002346: 4b3e ldr r3, [pc, #248] @ 0x10002440 <$d.45+0x34> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002348: 5c18 ldrb r0, [r3, r0] | |
; let idx = crc ^ *d; | |
1000234a: 9a07 ldr r2, [sp, #28] | |
1000234c: 4050 eors r0, r2 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000234e: 5c18 ldrb r0, [r3, r0] | |
10002350: 2274 movs r2, #116 | |
; let idx = crc ^ *d; | |
10002352: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002354: 5c98 ldrb r0, [r3, r2] | |
; } | |
10002356: 0400 lsls r0, r0, #16 | |
10002358: 1840 adds r0, r0, r1 | |
1000235a: 493d ldr r1, [pc, #244] @ 0x10002450 <$d.45+0x44> | |
1000235c: 1841 adds r1, r0, r1 | |
1000235e: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
10002360: 9811 ldr r0, [sp, #68] | |
10002362: f7ff fcdb bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1610 | |
10002366: 2800 cmp r0, #0 | |
10002368: d000 beq 0x1000236c <neotron_pico_bios::sign_on+0x360> @ imm = #0 | |
1000236a: e0e3 b 0x10002534 <$t.46+0xcc> @ imm = #454 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
1000236c: 6c60 ldr r0, [r4, #68] | |
1000236e: 4a39 ldr r2, [pc, #228] @ 0x10002454 <$d.45+0x48> | |
10002370: 2500 movs r5, #0 | |
10002372: 4629 mov r1, r5 | |
10002374: 462b mov r3, r5 | |
10002376: f004 fb6b bl 0x10006a50 <__aeabi_lmul> @ imm = #18134 | |
1000237a: 9001 str r0, [sp, #4] | |
1000237c: 9102 str r1, [sp, #8] | |
1000237e: 4a36 ldr r2, [pc, #216] @ 0x10002458 <$d.45+0x4c> | |
10002380: 462c mov r4, r5 | |
10002382: 462b mov r3, r5 | |
10002384: f004 fb54 bl 0x10006a30 <__aeabi_uldivmod> @ imm = #18088 | |
10002388: 9003 str r0, [sp, #12] | |
; if full_cycles > 0 { | |
1000238a: 980d ldr r0, [sp, #52] | |
1000238c: 9a01 ldr r2, [sp, #4] | |
1000238e: 1a12 subs r2, r2, r0 | |
10002390: 4832 ldr r0, [pc, #200] @ 0x1000245c <$d.45+0x50> | |
10002392: 9a02 ldr r2, [sp, #8] | |
10002394: 4182 sbcs r2, r0 | |
10002396: d228 bhs 0x100023ea <neotron_pico_bios::sign_on+0x3de> @ imm = #80 | |
; let ticks = (ticks & 0xffffff) as u32; | |
10002398: 4831 ldr r0, [pc, #196] @ 0x10002460 <$d.45+0x54> | |
1000239a: 9903 ldr r1, [sp, #12] | |
1000239c: 4001 ands r1, r0 | |
1000239e: 4608 mov r0, r1 | |
; if ticks > 1 { | |
100023a0: 2901 cmp r1, #1 | |
100023a2: 4930 ldr r1, [pc, #192] @ 0x10002464 <$d.45+0x58> | |
100023a4: d913 bls 0x100023ce <neotron_pico_bios::sign_on+0x3c2> @ imm = #38 | |
; self.syst.set_reload(ticks - 1); | |
100023a6: 1e40 subs r0, r0, #1 | |
100023a8: 6048 str r0, [r1, #4] | |
100023aa: 2000 movs r0, #0 | |
100023ac: 6088 str r0, [r1, #8] | |
100023ae: 6808 ldr r0, [r1] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
100023b0: 9a10 ldr r2, [sp, #64] | |
100023b2: 4310 orrs r0, r2 | |
100023b4: 6008 str r0, [r1] | |
100023b6: 6808 ldr r0, [r1] | |
; while !self.syst.has_wrapped() {} | |
100023b8: 4230 tst r0, r6 | |
100023ba: d108 bne 0x100023ce <neotron_pico_bios::sign_on+0x3c2> @ imm = #16 | |
100023bc: 6808 ldr r0, [r1] | |
; while !self.syst.has_wrapped() {} | |
100023be: 4230 tst r0, r6 | |
100023c0: d105 bne 0x100023ce <neotron_pico_bios::sign_on+0x3c2> @ imm = #10 | |
100023c2: 6808 ldr r0, [r1] | |
; while !self.syst.has_wrapped() {} | |
100023c4: 4230 tst r0, r6 | |
100023c6: d102 bne 0x100023ce <neotron_pico_bios::sign_on+0x3c2> @ imm = #4 | |
100023c8: 6808 ldr r0, [r1] | |
; while !self.syst.has_wrapped() {} | |
100023ca: 4230 tst r0, r6 | |
100023cc: d0f3 beq 0x100023b6 <neotron_pico_bios::sign_on+0x3aa> @ imm = #-26 | |
100023ce: 6808 ldr r0, [r1] | |
; unsafe { self.csr.modify(|v| v & !SYST_CSR_ENABLE) } | |
100023d0: 9a10 ldr r2, [sp, #64] | |
100023d2: 4390 bics r0, r2 | |
100023d4: 6008 str r0, [r1] | |
100023d6: 4d17 ldr r5, [pc, #92] @ 0x10002434 <$d.45+0x28> | |
100023d8: 7928 ldrb r0, [r5, #4] | |
100023da: 4241 rsbs r1, r0, #0 | |
100023dc: 4141 adcs r1, r0 | |
100023de: 7129 strb r1, [r5, #4] | |
; } | |
100023e0: 2800 cmp r0, #0 | |
100023e2: 4c16 ldr r4, [pc, #88] @ 0x1000243c <$d.45+0x30> | |
100023e4: d057 beq 0x10002496 <$t.46+0x2e> @ imm = #174 | |
100023e6: 20c3 movs r0, #195 | |
100023e8: e056 b 0x10002498 <$t.46+0x30> @ imm = #172 | |
100023ea: 481e ldr r0, [pc, #120] @ 0x10002464 <$d.45+0x58> | |
100023ec: 4a1c ldr r2, [pc, #112] @ 0x10002460 <$d.45+0x54> | |
100023ee: 6042 str r2, [r0, #4] | |
100023f0: 4625 mov r5, r4 | |
100023f2: 6084 str r4, [r0, #8] | |
100023f4: 6802 ldr r2, [r0] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
100023f6: 9b10 ldr r3, [sp, #64] | |
100023f8: 431a orrs r2, r3 | |
100023fa: 6002 str r2, [r0] | |
; let full_cycles = ticks >> 24; | |
100023fc: 9803 ldr r0, [sp, #12] | |
100023fe: 0e02 lsrs r2, r0, #24 | |
10002400: 020b lsls r3, r1, #8 | |
10002402: 18d0 adds r0, r2, r3 | |
10002404: 0e09 lsrs r1, r1, #24 | |
10002406: 4623 mov r3, r4 | |
10002408: e037 b 0x1000247a <$t.46+0x12> @ imm = #110 | |
1000240a: 46c0 mov r8, r8 | |
1000240c <$d.45>: | |
1000240c: 8c c7 03 20 .word 0x2003c78c | |
10002410: 0c 72 00 10 .word 0x1000720c | |
10002414: bc 77 00 10 .word 0x100077bc | |
10002418: 84 73 00 10 .word 0x10007384 | |
1000241c: 00 c7 03 20 .word 0x2003c700 | |
10002420: 7a 72 00 10 .word 0x1000727a | |
10002424: 6d 04 00 10 .word 0x1000046d | |
10002428: b0 73 00 10 .word 0x100073b0 | |
1000242c: b0 74 00 10 .word 0x100074b0 | |
10002430: c0 73 00 10 .word 0x100073c0 | |
10002434: 18 ed 03 20 .word 0x2003ed18 | |
10002438: 7c 01 00 d0 .word 0xd000017c | |
1000243c: f0 c5 03 20 .word 0x2003c5f0 | |
10002440: ca 77 00 10 .word 0x100077ca | |
10002444: 01 20 00 00 .word 0x00002001 | |
10002448: 72 89 00 00 .word 0x00008972 | |
1000244c: 73 7f 00 00 .word 0x00007f73 | |
10002450: 72 74 00 00 .word 0x00007472 | |
10002454: 70 11 01 00 .word 0x00011170 | |
10002458: 40 42 0f 00 .word 0x000f4240 | |
1000245c: 42 0f 00 00 .word 0x00000f42 | |
10002460: ff ff ff 00 .word 0x00ffffff | |
10002464: 10 e0 00 e0 .word 0xe000e010 | |
10002468 <$t.46>: | |
10002468: 2500 movs r5, #0 | |
1000246a: 4622 mov r2, r4 | |
1000246c: 1c62 adds r2, r4, #1 | |
1000246e: 416b adcs r3, r5 | |
10002470: 4614 mov r4, r2 | |
10002472: 1a15 subs r5, r2, r0 | |
10002474: 461d mov r5, r3 | |
10002476: 418d sbcs r5, r1 | |
10002478: d28e bhs 0x10002398 <neotron_pico_bios::sign_on+0x38c> @ imm = #-228 | |
1000247a: 4afb ldr r2, [pc, #1004] @ 0x10002868 <$d.47> | |
1000247c: 6815 ldr r5, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000247e: 4235 tst r5, r6 | |
10002480: d1f2 bne 0x10002468 <$t.46> @ imm = #-28 | |
10002482: 6815 ldr r5, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002484: 4235 tst r5, r6 | |
10002486: d1ef bne 0x10002468 <$t.46> @ imm = #-34 | |
10002488: 6815 ldr r5, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000248a: 4235 tst r5, r6 | |
1000248c: d1ec bne 0x10002468 <$t.46> @ imm = #-40 | |
1000248e: 6815 ldr r5, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002490: 4235 tst r5, r6 | |
10002492: d0f3 beq 0x1000247c <$t.46+0x14> @ imm = #-26 | |
10002494: e7e8 b 0x10002468 <$t.46> @ imm = #-48 | |
10002496: 20c2 movs r0, #194 | |
; } | |
10002498: 0601 lsls r1, r0, #24 | |
1000249a: 4af4 ldr r2, [pc, #976] @ 0x1000286c <$d.47+0x4> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000249c: 5c10 ldrb r0, [r2, r0] | |
; let idx = crc ^ *d; | |
1000249e: 9b06 ldr r3, [sp, #24] | |
100024a0: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100024a2: 5c10 ldrb r0, [r2, r0] | |
; let idx = crc ^ *d; | |
100024a4: 9b05 ldr r3, [sp, #20] | |
100024a6: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100024a8: 5c10 ldrb r0, [r2, r0] | |
; } | |
100024aa: 0400 lsls r0, r0, #16 | |
100024ac: 1840 adds r0, r0, r1 | |
100024ae: 9904 ldr r1, [sp, #16] | |
100024b0: 1841 adds r1, r0, r1 | |
100024b2: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
100024b4: 9811 ldr r0, [sp, #68] | |
100024b6: f7ff fc31 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-1950 | |
100024ba: 2800 cmp r0, #0 | |
100024bc: d13a bne 0x10002534 <$t.46+0xcc> @ imm = #116 | |
100024be: 7928 ldrb r0, [r5, #4] | |
100024c0: 4241 rsbs r1, r0, #0 | |
100024c2: 4141 adcs r1, r0 | |
100024c4: 7129 strb r1, [r5, #4] | |
; } | |
100024c6: 2800 cmp r0, #0 | |
100024c8: d001 beq 0x100024ce <$t.46+0x66> @ imm = #2 | |
100024ca: 20c3 movs r0, #195 | |
100024cc: e000 b 0x100024d0 <$t.46+0x68> @ imm = #0 | |
100024ce: 20c2 movs r0, #194 | |
; } | |
100024d0: 0601 lsls r1, r0, #24 | |
100024d2: 4be6 ldr r3, [pc, #920] @ 0x1000286c <$d.47+0x4> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100024d4: 5c18 ldrb r0, [r3, r0] | |
; let idx = crc ^ *d; | |
100024d6: 9a07 ldr r2, [sp, #28] | |
100024d8: 4050 eors r0, r2 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100024da: 5c18 ldrb r0, [r3, r0] | |
100024dc: 2261 movs r2, #97 | |
; let idx = crc ^ *d; | |
100024de: 4042 eors r2, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
100024e0: 5c98 ldrb r0, [r3, r2] | |
; } | |
100024e2: 0400 lsls r0, r0, #16 | |
100024e4: 1840 adds r0, r0, r1 | |
100024e6: 49e2 ldr r1, [pc, #904] @ 0x10002870 <$d.47+0x8> | |
100024e8: 1841 adds r1, r0, r1 | |
100024ea: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
100024ec: 9811 ldr r0, [sp, #68] | |
100024ee: f7ff fc15 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-2006 | |
100024f2: 2800 cmp r0, #0 | |
100024f4: d11e bne 0x10002534 <$t.46+0xcc> @ imm = #60 | |
100024f6: 48df ldr r0, [pc, #892] @ 0x10002874 <$d.47+0xc> | |
; self.delay_us(ms * 1_000); | |
100024f8: f002 fe14 bl 0x10005124 <cortex_m::delay::Delay::delay_us> @ imm = #11304 | |
100024fc: 7928 ldrb r0, [r5, #4] | |
100024fe: 4241 rsbs r1, r0, #0 | |
10002500: 4141 adcs r1, r0 | |
10002502: 7129 strb r1, [r5, #4] | |
; } | |
10002504: 2800 cmp r0, #0 | |
10002506: d001 beq 0x1000250c <$t.46+0xa4> @ imm = #2 | |
10002508: 20c3 movs r0, #195 | |
1000250a: e000 b 0x1000250e <$t.46+0xa6> @ imm = #0 | |
1000250c: 20c2 movs r0, #194 | |
; } | |
1000250e: 0601 lsls r1, r0, #24 | |
10002510: 4ad6 ldr r2, [pc, #856] @ 0x1000286c <$d.47+0x4> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002512: 5c10 ldrb r0, [r2, r0] | |
; let idx = crc ^ *d; | |
10002514: 9b06 ldr r3, [sp, #24] | |
10002516: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002518: 5c10 ldrb r0, [r2, r0] | |
; let idx = crc ^ *d; | |
1000251a: 9b05 ldr r3, [sp, #20] | |
1000251c: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
1000251e: 5c10 ldrb r0, [r2, r0] | |
; } | |
10002520: 0400 lsls r0, r0, #16 | |
10002522: 1840 adds r0, r0, r1 | |
10002524: 9904 ldr r1, [sp, #16] | |
10002526: 1841 adds r1, r0, r1 | |
10002528: 2200 movs r2, #0 | |
; self.bmc_do_request( | |
1000252a: 9811 ldr r0, [sp, #68] | |
1000252c: f7ff fbf6 bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-2068 | |
; if let Err(e) = hw.play_startup_tune() { | |
10002530: 2800 cmp r0, #0 | |
10002532: d019 beq 0x10002568 <$t.46+0x100> @ imm = #50 | |
10002534: a812 add r0, sp, #72 | |
; writeln!(&tc, "BMC error: {e:?}").unwrap(); | |
10002536: 901d str r0, [sp, #116] | |
10002538: 48cf ldr r0, [pc, #828] @ 0x10002878 <$d.47+0x10> | |
1000253a: 902c str r0, [sp, #176] | |
1000253c: a822 add r0, sp, #136 | |
1000253e: 902b str r0, [sp, #172] | |
10002540: a81d add r0, sp, #116 | |
10002542: 9020 str r0, [sp, #128] | |
10002544: 9810 ldr r0, [sp, #64] | |
10002546: 9027 str r0, [sp, #156] | |
10002548: a82b add r0, sp, #172 | |
1000254a: 9026 str r0, [sp, #152] | |
1000254c: 2002 movs r0, #2 | |
1000254e: 9025 str r0, [sp, #148] | |
10002550: 48ca ldr r0, [pc, #808] @ 0x1000287c <$d.47+0x14> | |
10002552: 9024 str r0, [sp, #144] | |
10002554: 980f ldr r0, [sp, #60] | |
10002556: 9022 str r0, [sp, #136] | |
10002558: a820 add r0, sp, #128 | |
1000255a: 49c9 ldr r1, [pc, #804] @ 0x10002880 <$d.47+0x18> | |
1000255c: aa22 add r2, sp, #136 | |
1000255e: f002 fa17 bl 0x10004990 <core::fmt::write> @ imm = #9262 | |
10002562: 2800 cmp r0, #0 | |
10002564: d000 beq 0x10002568 <$t.46+0x100> @ imm = #0 | |
10002566: e232 b 0x100029ce <$t.48+0x132> @ imm = #1124 | |
10002568: 6820 ldr r0, [r4] | |
1000256a: 1c40 adds r0, r0, #1 | |
1000256c: 6020 str r0, [r4] | |
1000256e: 980e ldr r0, [sp, #56] | |
; if token != LOCK_ALREADY_OWNED { | |
10002570: 2802 cmp r0, #2 | |
10002572: d009 beq 0x10002588 <$t.46+0x120> @ imm = #18 | |
10002574: 990f ldr r1, [sp, #60] | |
10002576: 7429 strb r1, [r5, #16] | |
10002578: 4602 mov r2, r0 | |
1000257a: 48c2 ldr r0, [pc, #776] @ 0x10002884 <$d.47+0x1c> | |
1000257c: 9910 ldr r1, [sp, #64] | |
1000257e: 6001 str r1, [r0] | |
; if token != 0 { | |
10002580: 2a00 cmp r2, #0 | |
10002582: d001 beq 0x10002588 <$t.46+0x120> @ imm = #2 | |
; $func($($args),*) | |
10002584: f004 fa42 bl 0x10006a0c <__cpsie> @ imm = #17540 | |
; match bmc_ver { | |
10002588: 980b ldr r0, [sp, #44] | |
1000258a: 2800 cmp r0, #0 | |
1000258c: d015 beq 0x100025ba <$t.46+0x152> @ imm = #42 | |
1000258e: a812 add r0, sp, #72 | |
; writeln!(&tc, "BMC Version: Error reading").unwrap(); | |
10002590: 9020 str r0, [sp, #128] | |
10002592: a820 add r0, sp, #128 | |
10002594: 902b str r0, [sp, #172] | |
10002596: 990f ldr r1, [sp, #60] | |
10002598: 9127 str r1, [sp, #156] | |
1000259a: 48bb ldr r0, [pc, #748] @ 0x10002888 <$d.47+0x20> | |
1000259c: 9026 str r0, [sp, #152] | |
1000259e: 9810 ldr r0, [sp, #64] | |
100025a0: 9025 str r0, [sp, #148] | |
100025a2: 48ba ldr r0, [pc, #744] @ 0x1000288c <$d.47+0x24> | |
100025a4: 9024 str r0, [sp, #144] | |
100025a6: 9122 str r1, [sp, #136] | |
100025a8: a82b add r0, sp, #172 | |
100025aa: 49b5 ldr r1, [pc, #724] @ 0x10002880 <$d.47+0x18> | |
100025ac: aa22 add r2, sp, #136 | |
100025ae: f002 f9ef bl 0x10004990 <core::fmt::write> @ imm = #9182 | |
100025b2: 2800 cmp r0, #0 | |
100025b4: d100 bne 0x100025b8 <$t.46+0x150> @ imm = #0 | |
100025b6: e13c b 0x10002832 <$t.46+0x3ca> @ imm = #632 | |
100025b8: e209 b 0x100029ce <$t.48+0x132> @ imm = #1042 | |
100025ba: ac15 add r4, sp, #84 | |
100025bc: a922 add r1, sp, #136 | |
; Ok(string_bytes) => match core::str::from_utf8(&string_bytes) { | |
100025be: cc2d ldm r4!, {r0, r2, r3, r5} | |
100025c0: c12d stm r1!, {r0, r2, r3, r5} | |
100025c2: cc2d ldm r4!, {r0, r2, r3, r5} | |
100025c4: c12d stm r1!, {r0, r2, r3, r5} | |
100025c6: 4cb2 ldr r4, [pc, #712] @ 0x10002890 <$d.47+0x28> | |
100025c8: 2000 movs r0, #0 | |
100025ca: 9011 str r0, [sp, #68] | |
100025cc: a922 add r1, sp, #136 | |
100025ce: 5c0d ldrb r5, [r1, r0] | |
100025d0: b26b sxtb r3, r5 | |
100025d2: 2b00 cmp r3, #0 | |
100025d4: d413 bmi 0x100025fe <$t.46+0x196> @ imm = #38 | |
100025d6: 9911 ldr r1, [sp, #68] | |
100025d8: 2900 cmp r1, #0 | |
100025da: d000 beq 0x100025de <$t.46+0x176> @ imm = #0 | |
100025dc: e0dc b 0x10002798 <$t.46+0x330> @ imm = #440 | |
100025de: 4241 rsbs r1, r0, #0 | |
100025e0: 2503 movs r5, #3 | |
100025e2: 4029 ands r1, r5 | |
100025e4: d000 beq 0x100025e8 <$t.46+0x180> @ imm = #0 | |
100025e6: e0d7 b 0x10002798 <$t.46+0x330> @ imm = #430 | |
100025e8: 2819 cmp r0, #25 | |
100025ea: d240 bhs 0x1000266e <$t.46+0x206> @ imm = #128 | |
100025ec: 4622 mov r2, r4 | |
100025ee: a922 add r1, sp, #136 | |
100025f0: 580b ldr r3, [r1, r0] | |
100025f2: 4ca8 ldr r4, [pc, #672] @ 0x10002894 <$d.47+0x2c> | |
100025f4: 4223 tst r3, r4 | |
100025f6: d035 beq 0x10002664 <$t.46+0x1fc> @ imm = #106 | |
100025f8: 4603 mov r3, r0 | |
100025fa: 4614 mov r4, r2 | |
100025fc: e038 b 0x10002670 <$t.46+0x208> @ imm = #112 | |
100025fe: 49a6 ldr r1, [pc, #664] @ 0x10002898 <$d.47+0x30> | |
10002600: 5d49 ldrb r1, [r1, r5] | |
10002602: 2904 cmp r1, #4 | |
10002604: d009 beq 0x1000261a <$t.46+0x1b2> @ imm = #18 | |
10002606: 2903 cmp r1, #3 | |
10002608: d01b beq 0x10002642 <$t.46+0x1da> @ imm = #54 | |
1000260a: 2902 cmp r1, #2 | |
1000260c: d000 beq 0x10002610 <$t.46+0x1a8> @ imm = #0 | |
1000260e: e1c8 b 0x100029a2 <$t.48+0x106> @ imm = #912 | |
10002610: 281f cmp r0, #31 | |
10002612: d300 blo 0x10002616 <$t.46+0x1ae> @ imm = #0 | |
10002614: e1c5 b 0x100029a2 <$t.48+0x106> @ imm = #906 | |
10002616: 1c40 adds r0, r0, #1 | |
10002618: e0b7 b 0x1000278a <$t.46+0x322> @ imm = #366 | |
1000261a: 281e cmp r0, #30 | |
1000261c: d900 bls 0x10002620 <$t.46+0x1b8> @ imm = #0 | |
1000261e: e1c0 b 0x100029a2 <$t.48+0x106> @ imm = #896 | |
10002620: a922 add r1, sp, #136 | |
10002622: 1841 adds r1, r0, r1 | |
10002624: 9a10 ldr r2, [sp, #64] | |
10002626: 5689 ldrsb r1, [r1, r2] | |
10002628: 2df0 cmp r5, #240 | |
1000262a: d04a beq 0x100026c2 <$t.46+0x25a> @ imm = #148 | |
1000262c: 2df4 cmp r5, #244 | |
1000262e: d14e bne 0x100026ce <$t.46+0x266> @ imm = #156 | |
10002630: 2370 movs r3, #112 | |
10002632: 43db mvns r3, r3 | |
10002634: 4299 cmp r1, r3 | |
10002636: 4cf4 ldr r4, [pc, #976] @ 0x10002a08 <$d.49+0x14> | |
10002638: dd00 ble 0x1000263c <$t.46+0x1d4> @ imm = #0 | |
1000263a: e1b2 b 0x100029a2 <$t.48+0x106> @ imm = #868 | |
1000263c: 281d cmp r0, #29 | |
1000263e: d957 bls 0x100026f0 <$t.46+0x288> @ imm = #174 | |
10002640: e1af b 0x100029a2 <$t.48+0x106> @ imm = #862 | |
10002642: 281f cmp r0, #31 | |
10002644: d300 blo 0x10002648 <$t.46+0x1e0> @ imm = #0 | |
10002646: e1ac b 0x100029a2 <$t.48+0x106> @ imm = #856 | |
10002648: a922 add r1, sp, #136 | |
1000264a: 1841 adds r1, r0, r1 | |
1000264c: 7849 ldrb r1, [r1, #1] | |
1000264e: 2de0 cmp r5, #224 | |
10002650: d060 beq 0x10002714 <$t.46+0x2ac> @ imm = #192 | |
10002652: 2ded cmp r5, #237 | |
10002654: d163 bne 0x1000271e <$t.46+0x2b6> @ imm = #198 | |
10002656: 2360 movs r3, #96 | |
10002658: 43db mvns r3, r3 | |
1000265a: b249 sxtb r1, r1 | |
1000265c: 4299 cmp r1, r3 | |
1000265e: dc00 bgt 0x10002662 <$t.46+0x1fa> @ imm = #0 | |
10002660: e08f b 0x10002782 <$t.46+0x31a> @ imm = #286 | |
10002662: e19e b 0x100029a2 <$t.48+0x106> @ imm = #828 | |
10002664: 1809 adds r1, r1, r0 | |
10002666: 6849 ldr r1, [r1, #4] | |
10002668: 4221 tst r1, r4 | |
1000266a: 4614 mov r4, r2 | |
1000266c: d071 beq 0x10002752 <$t.46+0x2ea> @ imm = #226 | |
1000266e: 4603 mov r3, r0 | |
10002670: 2b1f cmp r3, #31 | |
10002672: d900 bls 0x10002676 <$t.46+0x20e> @ imm = #0 | |
10002674: e0be b 0x100027f4 <$t.46+0x38c> @ imm = #380 | |
10002676: a822 add r0, sp, #136 | |
10002678: 56c0 ldrsb r0, [r0, r3] | |
1000267a: 2800 cmp r0, #0 | |
1000267c: d41d bmi 0x100026ba <$t.46+0x252> @ imm = #58 | |
1000267e: 2b1f cmp r3, #31 | |
10002680: d100 bne 0x10002684 <$t.46+0x21c> @ imm = #0 | |
10002682: e0b7 b 0x100027f4 <$t.46+0x38c> @ imm = #366 | |
10002684: a822 add r0, sp, #136 | |
10002686: 18c0 adds r0, r0, r3 | |
10002688: 9910 ldr r1, [sp, #64] | |
1000268a: 5640 ldrsb r0, [r0, r1] | |
1000268c: 2800 cmp r0, #0 | |
1000268e: d454 bmi 0x1000273a <$t.46+0x2d2> @ imm = #168 | |
10002690: 2b1e cmp r3, #30 | |
10002692: d100 bne 0x10002696 <$t.46+0x22e> @ imm = #0 | |
10002694: e0ae b 0x100027f4 <$t.46+0x38c> @ imm = #348 | |
10002696: a822 add r0, sp, #136 | |
10002698: 18c0 adds r0, r0, r3 | |
1000269a: 2102 movs r1, #2 | |
1000269c: 5640 ldrsb r0, [r0, r1] | |
1000269e: 2800 cmp r0, #0 | |
100026a0: d44f bmi 0x10002742 <$t.46+0x2da> @ imm = #158 | |
100026a2: 2b1d cmp r3, #29 | |
100026a4: d100 bne 0x100026a8 <$t.46+0x240> @ imm = #0 | |
100026a6: e0a5 b 0x100027f4 <$t.46+0x38c> @ imm = #330 | |
100026a8: a822 add r0, sp, #136 | |
100026aa: 18c0 adds r0, r0, r3 | |
100026ac: 5740 ldrsb r0, [r0, r5] | |
100026ae: 2800 cmp r0, #0 | |
100026b0: d44b bmi 0x1000274a <$t.46+0x2e2> @ imm = #150 | |
100026b2: 1d1b adds r3, r3, #4 | |
100026b4: 2b20 cmp r3, #32 | |
100026b6: d1de bne 0x10002676 <$t.46+0x20e> @ imm = #-68 | |
100026b8: e09c b 0x100027f4 <$t.46+0x38c> @ imm = #312 | |
100026ba: 4618 mov r0, r3 | |
100026bc: 2820 cmp r0, #32 | |
100026be: d385 blo 0x100025cc <$t.46+0x164> @ imm = #-246 | |
100026c0: e098 b 0x100027f4 <$t.46+0x38c> @ imm = #304 | |
100026c2: 3170 adds r1, #112 | |
100026c4: b2c9 uxtb r1, r1 | |
100026c6: 292f cmp r1, #47 | |
100026c8: 4ccf ldr r4, [pc, #828] @ 0x10002a08 <$d.49+0x14> | |
100026ca: d90e bls 0x100026ea <$t.46+0x282> @ imm = #28 | |
100026cc: e169 b 0x100029a2 <$t.48+0x106> @ imm = #722 | |
100026ce: 330f adds r3, #15 | |
100026d0: b2db uxtb r3, r3 | |
100026d2: 2b02 cmp r3, #2 | |
100026d4: 4ccc ldr r4, [pc, #816] @ 0x10002a08 <$d.49+0x14> | |
100026d6: d900 bls 0x100026da <$t.46+0x272> @ imm = #0 | |
100026d8: e163 b 0x100029a2 <$t.48+0x106> @ imm = #710 | |
100026da: 2900 cmp r1, #0 | |
100026dc: d400 bmi 0x100026e0 <$t.46+0x278> @ imm = #0 | |
100026de: e160 b 0x100029a2 <$t.48+0x106> @ imm = #704 | |
100026e0: b2c9 uxtb r1, r1 | |
100026e2: 0989 lsrs r1, r1, #6 | |
100026e4: 2902 cmp r1, #2 | |
100026e6: d900 bls 0x100026ea <$t.46+0x282> @ imm = #0 | |
100026e8: e15b b 0x100029a2 <$t.48+0x106> @ imm = #694 | |
100026ea: 281e cmp r0, #30 | |
100026ec: d300 blo 0x100026f0 <$t.46+0x288> @ imm = #0 | |
100026ee: e158 b 0x100029a2 <$t.48+0x106> @ imm = #688 | |
100026f0: a922 add r1, sp, #136 | |
100026f2: 1841 adds r1, r0, r1 | |
100026f4: 2302 movs r3, #2 | |
100026f6: 56cb ldrsb r3, [r1, r3] | |
100026f8: 2140 movs r1, #64 | |
100026fa: 43c9 mvns r1, r1 | |
100026fc: 428b cmp r3, r1 | |
100026fe: dd00 ble 0x10002702 <$t.46+0x29a> @ imm = #0 | |
10002700: e14f b 0x100029a2 <$t.48+0x106> @ imm = #670 | |
10002702: 281c cmp r0, #28 | |
10002704: d900 bls 0x10002708 <$t.46+0x2a0> @ imm = #0 | |
10002706: e14c b 0x100029a2 <$t.48+0x106> @ imm = #664 | |
10002708: 1cc0 adds r0, r0, #3 | |
1000270a: ab22 add r3, sp, #136 | |
1000270c: 561b ldrsb r3, [r3, r0] | |
1000270e: 428b cmp r3, r1 | |
10002710: dd42 ble 0x10002798 <$t.46+0x330> @ imm = #132 | |
10002712: e146 b 0x100029a2 <$t.48+0x106> @ imm = #652 | |
10002714: 23e0 movs r3, #224 | |
10002716: 4019 ands r1, r3 | |
10002718: 29a0 cmp r1, #160 | |
1000271a: d032 beq 0x10002782 <$t.46+0x31a> @ imm = #100 | |
1000271c: e141 b 0x100029a2 <$t.48+0x106> @ imm = #642 | |
1000271e: 461d mov r5, r3 | |
10002720: 351f adds r5, #31 | |
10002722: b2ed uxtb r5, r5 | |
10002724: 2d0c cmp r5, #12 | |
10002726: d220 bhs 0x1000276a <$t.46+0x302> @ imm = #64 | |
10002728: 2340 movs r3, #64 | |
1000272a: 43db mvns r3, r3 | |
1000272c: b249 sxtb r1, r1 | |
1000272e: 4299 cmp r1, r3 | |
10002730: dd00 ble 0x10002734 <$t.46+0x2cc> @ imm = #0 | |
10002732: e136 b 0x100029a2 <$t.48+0x106> @ imm = #620 | |
10002734: 281d cmp r0, #29 | |
10002736: d927 bls 0x10002788 <$t.46+0x320> @ imm = #78 | |
10002738: e133 b 0x100029a2 <$t.48+0x106> @ imm = #614 | |
1000273a: 1c58 adds r0, r3, #1 | |
1000273c: 2820 cmp r0, #32 | |
1000273e: d259 bhs 0x100027f4 <$t.46+0x38c> @ imm = #178 | |
10002740: e744 b 0x100025cc <$t.46+0x164> @ imm = #-376 | |
10002742: 1c98 adds r0, r3, #2 | |
10002744: 2820 cmp r0, #32 | |
10002746: d255 bhs 0x100027f4 <$t.46+0x38c> @ imm = #170 | |
10002748: e740 b 0x100025cc <$t.46+0x164> @ imm = #-384 | |
1000274a: 1cd8 adds r0, r3, #3 | |
1000274c: 2820 cmp r0, #32 | |
1000274e: d251 bhs 0x100027f4 <$t.46+0x38c> @ imm = #162 | |
10002750: e73c b 0x100025cc <$t.46+0x164> @ imm = #-392 | |
10002752: 4603 mov r3, r0 | |
10002754: 3308 adds r3, #8 | |
10002756: 2810 cmp r0, #16 | |
10002758: d88a bhi 0x10002670 <$t.46+0x208> @ imm = #-236 | |
1000275a: a922 add r1, sp, #136 | |
1000275c: 910f str r1, [sp, #60] | |
1000275e: 58c9 ldr r1, [r1, r3] | |
10002760: 4caf ldr r4, [pc, #700] @ 0x10002a20 <$d.49+0x2c> | |
10002762: 4221 tst r1, r4 | |
10002764: d01c beq 0x100027a0 <$t.46+0x338> @ imm = #56 | |
10002766: 4614 mov r4, r2 | |
10002768: e782 b 0x10002670 <$t.46+0x208> @ imm = #-252 | |
1000276a: b2db uxtb r3, r3 | |
1000276c: 085b lsrs r3, r3, #1 | |
1000276e: 2b77 cmp r3, #119 | |
10002770: d000 beq 0x10002774 <$t.46+0x30c> @ imm = #0 | |
10002772: e116 b 0x100029a2 <$t.48+0x106> @ imm = #556 | |
10002774: b24b sxtb r3, r1 | |
10002776: 2b00 cmp r3, #0 | |
10002778: d400 bmi 0x1000277c <$t.46+0x314> @ imm = #0 | |
1000277a: e112 b 0x100029a2 <$t.48+0x106> @ imm = #548 | |
1000277c: 29bf cmp r1, #191 | |
1000277e: d900 bls 0x10002782 <$t.46+0x31a> @ imm = #0 | |
10002780: e10f b 0x100029a2 <$t.48+0x106> @ imm = #542 | |
10002782: 281e cmp r0, #30 | |
10002784: d300 blo 0x10002788 <$t.46+0x320> @ imm = #0 | |
10002786: e10c b 0x100029a2 <$t.48+0x106> @ imm = #536 | |
10002788: 1c80 adds r0, r0, #2 | |
1000278a: a922 add r1, sp, #136 | |
1000278c: 5609 ldrsb r1, [r1, r0] | |
1000278e: 2340 movs r3, #64 | |
10002790: 43db mvns r3, r3 | |
10002792: 4299 cmp r1, r3 | |
10002794: dd00 ble 0x10002798 <$t.46+0x330> @ imm = #0 | |
10002796: e104 b 0x100029a2 <$t.48+0x106> @ imm = #520 | |
10002798: 1c40 adds r0, r0, #1 | |
1000279a: 2820 cmp r0, #32 | |
1000279c: d22a bhs 0x100027f4 <$t.46+0x38c> @ imm = #84 | |
1000279e: e715 b 0x100025cc <$t.46+0x164> @ imm = #-470 | |
100027a0: 990f ldr r1, [sp, #60] | |
100027a2: 18c9 adds r1, r1, r3 | |
100027a4: 6849 ldr r1, [r1, #4] | |
100027a6: 4221 tst r1, r4 | |
100027a8: 4614 mov r4, r2 | |
100027aa: d000 beq 0x100027ae <$t.46+0x346> @ imm = #0 | |
100027ac: e760 b 0x10002670 <$t.46+0x208> @ imm = #-320 | |
100027ae: 4603 mov r3, r0 | |
100027b0: 3310 adds r3, #16 | |
100027b2: 2808 cmp r0, #8 | |
100027b4: d900 bls 0x100027b8 <$t.46+0x350> @ imm = #0 | |
100027b6: e75b b 0x10002670 <$t.46+0x208> @ imm = #-330 | |
100027b8: a922 add r1, sp, #136 | |
100027ba: 910f str r1, [sp, #60] | |
100027bc: 58c9 ldr r1, [r1, r3] | |
100027be: 4c98 ldr r4, [pc, #608] @ 0x10002a20 <$d.49+0x2c> | |
100027c0: 4221 tst r1, r4 | |
100027c2: d1d0 bne 0x10002766 <$t.46+0x2fe> @ imm = #-96 | |
100027c4: 990f ldr r1, [sp, #60] | |
100027c6: 18c9 adds r1, r1, r3 | |
100027c8: 6849 ldr r1, [r1, #4] | |
100027ca: 4221 tst r1, r4 | |
100027cc: 4614 mov r4, r2 | |
100027ce: d000 beq 0x100027d2 <$t.46+0x36a> @ imm = #0 | |
100027d0: e74e b 0x10002670 <$t.46+0x208> @ imm = #-356 | |
100027d2: 4603 mov r3, r0 | |
100027d4: 3318 adds r3, #24 | |
100027d6: 2800 cmp r0, #0 | |
100027d8: d000 beq 0x100027dc <$t.46+0x374> @ imm = #0 | |
100027da: e749 b 0x10002670 <$t.46+0x208> @ imm = #-366 | |
100027dc: aa22 add r2, sp, #136 | |
100027de: 58d1 ldr r1, [r2, r3] | |
100027e0: 488f ldr r0, [pc, #572] @ 0x10002a20 <$d.49+0x2c> | |
100027e2: 4201 tst r1, r0 | |
100027e4: d000 beq 0x100027e8 <$t.46+0x380> @ imm = #0 | |
100027e6: e743 b 0x10002670 <$t.46+0x208> @ imm = #-378 | |
100027e8: 18d0 adds r0, r2, r3 | |
100027ea: 6840 ldr r0, [r0, #4] | |
100027ec: 498c ldr r1, [pc, #560] @ 0x10002a20 <$d.49+0x2c> | |
100027ee: 4208 tst r0, r1 | |
100027f0: d000 beq 0x100027f4 <$t.46+0x38c> @ imm = #0 | |
100027f2: e73d b 0x10002670 <$t.46+0x208> @ imm = #-390 | |
; Ok(s) => { | |
100027f4: 9808 ldr r0, [sp, #32] | |
100027f6: 901e str r0, [sp, #120] | |
100027f8: a822 add r0, sp, #136 | |
100027fa: 901d str r0, [sp, #116] | |
100027fc: a812 add r0, sp, #72 | |
; writeln!(&tc, "BMC Version: {s}").unwrap(); | |
100027fe: 901f str r0, [sp, #124] | |
10002800: 487e ldr r0, [pc, #504] @ 0x100029fc <$d.49+0x8> | |
10002802: 9021 str r0, [sp, #132] | |
10002804: a81d add r0, sp, #116 | |
10002806: 9020 str r0, [sp, #128] | |
10002808: a81f add r0, sp, #124 | |
1000280a: 902a str r0, [sp, #168] | |
1000280c: 9810 ldr r0, [sp, #64] | |
1000280e: 9030 str r0, [sp, #192] | |
10002810: a820 add r0, sp, #128 | |
10002812: 902f str r0, [sp, #188] | |
10002814: 2002 movs r0, #2 | |
10002816: 902e str r0, [sp, #184] | |
10002818: 4882 ldr r0, [pc, #520] @ 0x10002a24 <$d.49+0x30> | |
1000281a: 902d str r0, [sp, #180] | |
1000281c: 9811 ldr r0, [sp, #68] | |
1000281e: 902b str r0, [sp, #172] | |
10002820: a82a add r0, sp, #168 | |
10002822: 4975 ldr r1, [pc, #468] @ 0x100029f8 <$d.49+0x4> | |
10002824: aa2b add r2, sp, #172 | |
10002826: f002 f8b3 bl 0x10004990 <core::fmt::write> @ imm = #8550 | |
1000282a: 2800 cmp r0, #0 | |
1000282c: 4d74 ldr r5, [pc, #464] @ 0x10002a00 <$d.49+0xc> | |
1000282e: d000 beq 0x10002832 <$t.46+0x3ca> @ imm = #0 | |
10002830: e0cd b 0x100029ce <$t.48+0x132> @ imm = #410 | |
; $func($($args),*) | |
10002832: f004 f8f4 bl 0x10006a1e <__primask_r> @ imm = #16872 | |
10002836: 4602 mov r2, r0 | |
10002838: 980c ldr r0, [sp, #48] | |
1000283a: 6800 ldr r0, [r0] | |
1000283c: 7c29 ldrb r1, [r5, #16] | |
1000283e: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
10002842: 1c45 adds r5, r0, #1 | |
10002844: b2e8 uxtb r0, r5 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
10002846: 4281 cmp r1, r0 | |
10002848: d101 bne 0x1000284e <$t.46+0x3e6> @ imm = #2 | |
1000284a: 2102 movs r1, #2 | |
1000284c: e032 b 0x100028b4 <$t.48+0x18> @ imm = #100 | |
1000284e: 9810 ldr r0, [sp, #64] | |
10002850: 4002 ands r2, r0 | |
10002852: 9211 str r2, [sp, #68] | |
; if interrupts_active { | |
10002854: d122 bne 0x1000289c <$t.48> @ imm = #68 | |
; $func($($args),*) | |
10002856: f004 f8d7 bl 0x10006a08 <__cpsid> @ imm = #16814 | |
1000285a: 486a ldr r0, [pc, #424] @ 0x10002a04 <$d.49+0x10> | |
1000285c: 6800 ldr r0, [r0] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000285e: 2800 cmp r0, #0 | |
10002860: d122 bne 0x100028a8 <$t.48+0xc> @ imm = #68 | |
; $func($($args),*) | |
10002862: f004 f8d3 bl 0x10006a0c <__cpsie> @ imm = #16806 | |
10002866: e7f6 b 0x10002856 <$t.46+0x3ee> @ imm = #-20 | |
10002868 <$d.47>: | |
10002868: 10 e0 00 e0 .word 0xe000e010 | |
1000286c: ca 77 00 10 .word 0x100077ca | |
10002870: 72 61 00 00 .word 0x00006172 | |
10002874: 70 11 01 00 .word 0x00011170 | |
10002878: 7d 04 00 10 .word 0x1000047d | |
1000287c: c4 74 00 10 .word 0x100074c4 | |
10002880: 0c 72 00 10 .word 0x1000720c | |
10002884: 7c 01 00 d0 .word 0xd000017c | |
10002888: bc 77 00 10 .word 0x100077bc | |
1000288c: e4 73 00 10 .word 0x100073e4 | |
10002890: f0 c5 03 20 .word 0x2003c5f0 | |
10002894: 80 80 80 80 .word 0x80808080 | |
10002898: b4 76 00 10 .word 0x100076b4 | |
1000289c <$t.48>: | |
1000289c: 4c59 ldr r4, [pc, #356] @ 0x10002a04 <$d.49+0x10> | |
; $func($($args),*) | |
1000289e: f004 f8b3 bl 0x10006a08 <__cpsid> @ imm = #16742 | |
100028a2: 6820 ldr r0, [r4] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
100028a4: 2800 cmp r0, #0 | |
100028a6: d0fa beq 0x1000289e <$t.48+0x2> @ imm = #-12 | |
100028a8: 4855 ldr r0, [pc, #340] @ 0x10002a00 <$d.49+0xc> | |
100028aa: 7405 strb r5, [r0, #16] | |
; interrupts_active as _ | |
100028ac: 9810 ldr r0, [sp, #64] | |
100028ae: 9911 ldr r1, [sp, #68] | |
100028b0: 4041 eors r1, r0 | |
100028b2: 4c55 ldr r4, [pc, #340] @ 0x10002a08 <$d.49+0x14> | |
100028b4: 6820 ldr r0, [r4] | |
100028b6: 2800 cmp r0, #0 | |
100028b8: d000 beq 0x100028bc <$t.48+0x20> @ imm = #0 | |
100028ba: e08f b 0x100029dc <$t.48+0x140> @ imm = #286 | |
100028bc: 9111 str r1, [sp, #68] | |
100028be: 9809 ldr r0, [sp, #36] | |
100028c0: 6020 str r0, [r4] | |
100028c2: 980a ldr r0, [sp, #40] | |
100028c4: 5c20 ldrb r0, [r4, r0] | |
100028c6: 2802 cmp r0, #2 | |
100028c8: d100 bne 0x100028cc <$t.48+0x30> @ imm = #0 | |
100028ca: e08e b 0x100029ea <$t.48+0x14e> @ imm = #284 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
100028cc: 6c60 ldr r0, [r4, #68] | |
100028ce: 900f str r0, [sp, #60] | |
100028d0: 4a58 ldr r2, [pc, #352] @ 0x10002a34 <$d.49+0x40> | |
100028d2: 2500 movs r5, #0 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
100028d4: 4629 mov r1, r5 | |
100028d6: 462b mov r3, r5 | |
100028d8: f004 f8ba bl 0x10006a50 <__aeabi_lmul> @ imm = #16756 | |
100028dc: 900e str r0, [sp, #56] | |
100028de: 460c mov r4, r1 | |
100028e0: 2205 movs r2, #5 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
100028e2: 980f ldr r0, [sp, #60] | |
100028e4: 4629 mov r1, r5 | |
100028e6: 462b mov r3, r5 | |
100028e8: f004 f8b2 bl 0x10006a50 <__aeabi_lmul> @ imm = #16740 | |
100028ec: 900f str r0, [sp, #60] | |
; if full_cycles > 0 { | |
100028ee: 980d ldr r0, [sp, #52] | |
100028f0: 9a0e ldr r2, [sp, #56] | |
100028f2: 1a12 subs r2, r2, r0 | |
100028f4: 4847 ldr r0, [pc, #284] @ 0x10002a14 <$d.49+0x20> | |
100028f6: 4184 sbcs r4, r0 | |
100028f8: d22f bhs 0x1000295a <$t.48+0xbe> @ imm = #94 | |
; let ticks = (ticks & 0xffffff) as u32; | |
100028fa: 4847 ldr r0, [pc, #284] @ 0x10002a18 <$d.49+0x24> | |
100028fc: 990f ldr r1, [sp, #60] | |
100028fe: 4001 ands r1, r0 | |
10002900: 4608 mov r0, r1 | |
; if ticks > 1 { | |
10002902: 2901 cmp r1, #1 | |
10002904: 9910 ldr r1, [sp, #64] | |
10002906: 4a45 ldr r2, [pc, #276] @ 0x10002a1c <$d.49+0x28> | |
10002908: d912 bls 0x10002930 <$t.48+0x94> @ imm = #36 | |
; self.syst.set_reload(ticks - 1); | |
1000290a: 1e40 subs r0, r0, #1 | |
1000290c: 6050 str r0, [r2, #4] | |
1000290e: 2000 movs r0, #0 | |
10002910: 6090 str r0, [r2, #8] | |
10002912: 6810 ldr r0, [r2] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
10002914: 4308 orrs r0, r1 | |
10002916: 6010 str r0, [r2] | |
10002918: 6810 ldr r0, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000291a: 4230 tst r0, r6 | |
1000291c: d108 bne 0x10002930 <$t.48+0x94> @ imm = #16 | |
1000291e: 6810 ldr r0, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002920: 4230 tst r0, r6 | |
10002922: d105 bne 0x10002930 <$t.48+0x94> @ imm = #10 | |
10002924: 6810 ldr r0, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002926: 4230 tst r0, r6 | |
10002928: d102 bne 0x10002930 <$t.48+0x94> @ imm = #4 | |
1000292a: 6810 ldr r0, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000292c: 4230 tst r0, r6 | |
1000292e: d0f3 beq 0x10002918 <$t.48+0x7c> @ imm = #-26 | |
10002930: 6810 ldr r0, [r2] | |
; unsafe { self.csr.modify(|v| v & !SYST_CSR_ENABLE) } | |
10002932: 4388 bics r0, r1 | |
10002934: 6010 str r0, [r2] | |
10002936: 4a34 ldr r2, [pc, #208] @ 0x10002a08 <$d.49+0x14> | |
10002938: 6810 ldr r0, [r2] | |
1000293a: 1c40 adds r0, r0, #1 | |
1000293c: 6010 str r0, [r2] | |
1000293e: 9c11 ldr r4, [sp, #68] | |
; if token != LOCK_ALREADY_OWNED { | |
10002940: 2c02 cmp r4, #2 | |
10002942: 4a2f ldr r2, [pc, #188] @ 0x10002a00 <$d.49+0xc> | |
10002944: 4b2f ldr r3, [pc, #188] @ 0x10002a04 <$d.49+0x10> | |
10002946: d006 beq 0x10002956 <$t.48+0xba> @ imm = #12 | |
10002948: 2000 movs r0, #0 | |
1000294a: 7410 strb r0, [r2, #16] | |
1000294c: 6019 str r1, [r3] | |
; if token != 0 { | |
1000294e: 2c00 cmp r4, #0 | |
10002950: d001 beq 0x10002956 <$t.48+0xba> @ imm = #2 | |
; $func($($args),*) | |
10002952: f004 f85b bl 0x10006a0c <__cpsie> @ imm = #16566 | |
; } | |
10002956: b031 add sp, #196 | |
10002958: bdf0 pop {r4, r5, r6, r7, pc} | |
1000295a: 4830 ldr r0, [pc, #192] @ 0x10002a1c <$d.49+0x28> | |
1000295c: 4a2e ldr r2, [pc, #184] @ 0x10002a18 <$d.49+0x24> | |
1000295e: 6042 str r2, [r0, #4] | |
10002960: 6085 str r5, [r0, #8] | |
10002962: 6802 ldr r2, [r0] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
10002964: 9b10 ldr r3, [sp, #64] | |
10002966: 431a orrs r2, r3 | |
10002968: 6002 str r2, [r0] | |
; let full_cycles = ticks >> 24; | |
1000296a: 980f ldr r0, [sp, #60] | |
1000296c: 0e02 lsrs r2, r0, #24 | |
1000296e: 020b lsls r3, r1, #8 | |
10002970: 18d0 adds r0, r2, r3 | |
10002972: 0e09 lsrs r1, r1, #24 | |
10002974: 462b mov r3, r5 | |
10002976: 4a29 ldr r2, [pc, #164] @ 0x10002a1c <$d.49+0x28> | |
10002978: e006 b 0x10002988 <$t.48+0xec> @ imm = #12 | |
1000297a: 2400 movs r4, #0 | |
1000297c: 1c6d adds r5, r5, #1 | |
1000297e: 4163 adcs r3, r4 | |
10002980: 1a2c subs r4, r5, r0 | |
10002982: 461c mov r4, r3 | |
10002984: 418c sbcs r4, r1 | |
10002986: d2b8 bhs 0x100028fa <$t.48+0x5e> @ imm = #-144 | |
10002988: 6814 ldr r4, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000298a: 4234 tst r4, r6 | |
1000298c: d1f5 bne 0x1000297a <$t.48+0xde> @ imm = #-22 | |
1000298e: 6814 ldr r4, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002990: 4234 tst r4, r6 | |
10002992: d1f2 bne 0x1000297a <$t.48+0xde> @ imm = #-28 | |
10002994: 6814 ldr r4, [r2] | |
; while !self.syst.has_wrapped() {} | |
10002996: 4234 tst r4, r6 | |
10002998: d1ef bne 0x1000297a <$t.48+0xde> @ imm = #-34 | |
1000299a: 6814 ldr r4, [r2] | |
; while !self.syst.has_wrapped() {} | |
1000299c: 4234 tst r4, r6 | |
1000299e: d0f3 beq 0x10002988 <$t.48+0xec> @ imm = #-26 | |
100029a0: e7eb b 0x1000297a <$t.48+0xde> @ imm = #-42 | |
100029a2: a812 add r0, sp, #72 | |
; writeln!(&tc, "BMC Version: Unknown").unwrap(); | |
100029a4: 901d str r0, [sp, #116] | |
100029a6: a81d add r0, sp, #116 | |
100029a8: 9020 str r0, [sp, #128] | |
100029aa: 9911 ldr r1, [sp, #68] | |
100029ac: 9130 str r1, [sp, #192] | |
100029ae: 4811 ldr r0, [pc, #68] @ 0x100029f4 <$d.49> | |
100029b0: 902f str r0, [sp, #188] | |
100029b2: 9810 ldr r0, [sp, #64] | |
100029b4: 902e str r0, [sp, #184] | |
100029b6: 481e ldr r0, [pc, #120] @ 0x10002a30 <$d.49+0x3c> | |
100029b8: 902d str r0, [sp, #180] | |
100029ba: 912b str r1, [sp, #172] | |
100029bc: a820 add r0, sp, #128 | |
100029be: 490e ldr r1, [pc, #56] @ 0x100029f8 <$d.49+0x4> | |
100029c0: aa2b add r2, sp, #172 | |
100029c2: f001 ffe5 bl 0x10004990 <core::fmt::write> @ imm = #8138 | |
100029c6: 2800 cmp r0, #0 | |
100029c8: d101 bne 0x100029ce <$t.48+0x132> @ imm = #2 | |
100029ca: 4d0d ldr r5, [pc, #52] @ 0x10002a00 <$d.49+0xc> | |
100029cc: e731 b 0x10002832 <$t.46+0x3ca> @ imm = #-414 | |
100029ce: 4816 ldr r0, [pc, #88] @ 0x10002a28 <$d.49+0x34> | |
100029d0: 212b movs r1, #43 | |
100029d2: aa22 add r2, sp, #136 | |
100029d4: 4b15 ldr r3, [pc, #84] @ 0x10002a2c <$d.49+0x38> | |
100029d6: f002 f899 bl 0x10004b0c <core::result::unwrap_failed> @ imm = #8498 | |
100029da: defe trap | |
100029dc: 480b ldr r0, [pc, #44] @ 0x10002a0c <$d.49+0x18> | |
100029de: 2110 movs r1, #16 | |
100029e0: aa22 add r2, sp, #136 | |
100029e2: 4b0b ldr r3, [pc, #44] @ 0x10002a10 <$d.49+0x1c> | |
100029e4: f002 f892 bl 0x10004b0c <core::result::unwrap_failed> @ imm = #8484 | |
100029e8: defe trap | |
100029ea: 4813 ldr r0, [pc, #76] @ 0x10002a38 <$d.49+0x44> | |
100029ec: 212b movs r1, #43 | |
100029ee: f001 ffc9 bl 0x10004984 <core::panicking::panic> @ imm = #8082 | |
100029f2: defe trap | |
100029f4 <$d.49>: | |
100029f4: bc 77 00 10 .word 0x100077bc | |
100029f8: 0c 72 00 10 .word 0x1000720c | |
100029fc: 6d 04 00 10 .word 0x1000046d | |
10002a00: 18 ed 03 20 .word 0x2003ed18 | |
10002a04: 7c 01 00 d0 .word 0xd000017c | |
10002a08: f0 c5 03 20 .word 0x2003c5f0 | |
10002a0c: 24 72 00 10 .word 0x10007224 | |
10002a10: 34 72 00 10 .word 0x10007234 | |
10002a14: 42 0f 00 00 .word 0x00000f42 | |
10002a18: ff ff ff 00 .word 0x00ffffff | |
10002a1c: 10 e0 00 e0 .word 0xe000e010 | |
10002a20: 80 80 80 80 .word 0x80808080 | |
10002a24: 1c 74 00 10 .word 0x1000741c | |
10002a28: be 71 00 10 .word 0x100071be | |
10002a2c: 8c 73 00 10 .word 0x1000738c | |
10002a30: 04 74 00 10 .word 0x10007404 | |
10002a34: 40 4b 4c 00 .word 0x004c4b40 | |
10002a38: d4 74 00 10 .word 0x100074d4 | |
10002a3c <neotron_pico_bios::api_version_get>: | |
; pub extern "C" fn api_version_get() -> common::Version { | |
10002a3c: 4800 ldr r0, [pc, #0] @ 0x10002a40 <$d.51> | |
; } | |
10002a3e: 4770 bx lr | |
10002a40 <$d.51>: | |
10002a40: 01 06 00 00 .word 0x00000601 | |
10002a44 <neotron_pico_bios::bios_version_get>: | |
; pub extern "C" fn bios_version_get() -> common::ApiString<'static> { | |
10002a44: 2119 movs r1, #25 | |
; common::ApiString::new(VERSION) | |
10002a46: 4a02 ldr r2, [pc, #8] @ 0x10002a50 <$d.53> | |
10002a48: 6002 str r2, [r0] | |
10002a4a: 6041 str r1, [r0, #4] | |
; } | |
10002a4c: 4770 bx lr | |
10002a4e: 46c0 mov r8, r8 | |
10002a50 <$d.53>: | |
10002a50: 7a 72 00 10 .word 0x1000727a | |
10002a54 <neotron_pico_bios::serial_get_info>: | |
; pub extern "C" fn serial_get_info(_device: u8) -> common::Option<common::serial::DeviceInfo> { | |
10002a54: 2101 movs r1, #1 | |
; common::Option::None | |
10002a56: 7001 strb r1, [r0] | |
; } | |
10002a58: 4770 bx lr | |
10002a5a <neotron_pico_bios::serial_configure>: | |
; pub extern "C" fn serial_configure( | |
10002a5a: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10002a5c: 7001 strb r1, [r0] | |
10002a5e: 7081 strb r1, [r0, #2] | |
; } | |
10002a60: 4770 bx lr | |
10002a62 <neotron_pico_bios::serial_read>: | |
; pub extern "C" fn serial_read( | |
10002a62: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10002a64: 7001 strb r1, [r0] | |
10002a66: 7101 strb r1, [r0, #4] | |
; } | |
10002a68: 4770 bx lr | |
10002a6a <neotron_pico_bios::time_clock_get>: | |
; pub extern "C" fn time_clock_get() -> common::Time { | |
10002a6a: 2100 movs r1, #0 | |
; common::Time { secs: 0, nsecs: 0 } | |
10002a6c: 6001 str r1, [r0] | |
10002a6e: 6041 str r1, [r0, #4] | |
; } | |
10002a70: 4770 bx lr | |
10002a72 <neotron_pico_bios::time_clock_set>: | |
; } | |
10002a72: 4770 bx lr | |
10002a74 <neotron_pico_bios::configuration_get>: | |
; pub extern "C" fn configuration_get(_buffer: common::ApiBuffer) -> common::Result<usize> { | |
10002a74: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10002a76: 7001 strb r1, [r0] | |
10002a78: 7101 strb r1, [r0, #4] | |
; } | |
10002a7a: 4770 bx lr | |
10002a7c <neotron_pico_bios::configuration_set>: | |
; pub extern "C" fn configuration_set(_buffer: common::ApiByteSlice) -> common::Result<()> { | |
10002a7c: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10002a7e: 7001 strb r1, [r0] | |
10002a80: 7081 strb r1, [r0, #2] | |
; } | |
10002a82: 4770 bx lr | |
10002a84 <neotron_pico_bios::video_is_valid_mode>: | |
; pub struct Mode(u8); | |
10002a84: 4241 rsbs r1, r0, #0 | |
10002a86: 4148 adcs r0, r1 | |
; } | |
10002a88: 4770 bx lr | |
10002a8a: d4d4 bmi 0x10002a36 <$d.49+0x42> @ imm = #-88 | |
10002a8c <neotron_pico_bios::video_set_mode>: | |
; pub extern "C" fn video_set_mode(mode: common::video::Mode) -> common::Result<()> { | |
10002a8c: b5f0 push {r4, r5, r6, r7, lr} | |
10002a8e: af03 add r7, sp, #12 | |
10002a90: b09d sub sp, #116 | |
10002a92: 901b str r0, [sp, #108] | |
10002a94: 911c str r1, [sp, #112] | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002a96: 090d lsrs r5, r1, #4 | |
10002a98: 2407 movs r4, #7 | |
10002a9a: 462e mov r6, r5 | |
10002a9c: 4026 ands r6, r4 | |
; $func($($args),*) | |
10002a9e: f003 ffb3 bl 0x10006a08 <__cpsid> @ imm = #16230 | |
10002aa2: 961a str r6, [sp, #104] | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002aa4: 2e03 cmp r6, #3 | |
10002aa6: d300 blo 0x10002aaa <neotron_pico_bios::video_set_mode+0x1e> @ imm = #0 | |
10002aa8: e14a b 0x10002d40 <neotron_pico_bios::video_set_mode+0x2b4> @ imm = #660 | |
10002aaa: 2303 movs r3, #3 | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002aac: 401d ands r5, r3 | |
10002aae: 9a1c ldr r2, [sp, #112] | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002ab0: 4014 ands r4, r2 | |
10002ab2: 2104 movs r1, #4 | |
10002ab4: 4061 eors r1, r4 | |
10002ab6: 20cf movs r0, #207 | |
10002ab8: 40c8 lsrs r0, r1 | |
10002aba: 2601 movs r6, #1 | |
10002abc: 4030 ands r0, r6 | |
; let mode_ok = match ( | |
10002abe: 2d01 cmp r5, #1 | |
10002ac0: d02b beq 0x10002b1a <neotron_pico_bios::video_set_mode+0x8e> @ imm = #86 | |
10002ac2: 2d00 cmp r5, #0 | |
10002ac4: d12d bne 0x10002b22 <neotron_pico_bios::video_set_mode+0x96> @ imm = #90 | |
10002ac6: 2188 movs r1, #136 | |
; let mode_ok = match ( | |
10002ac8: 4011 ands r1, r2 | |
10002aca: 1840 adds r0, r0, r1 | |
10002acc: d129 bne 0x10002b22 <neotron_pico_bios::video_set_mode+0x96> @ imm = #82 | |
10002ace: 9419 str r4, [sp, #100] | |
10002ad0: 489f ldr r0, [pc, #636] @ 0x10002d50 <$d.63+0x4> | |
10002ad2: 4601 mov r1, r0 | |
10002ad4: 3116 adds r1, #22 | |
10002ad6: 9117 str r1, [sp, #92] | |
10002ad8: 9018 str r0, [sp, #96] | |
10002ada: 1c80 adds r0, r0, #2 | |
10002adc: 9014 str r0, [sp, #80] | |
10002ade: 499d ldr r1, [pc, #628] @ 0x10002d54 <$d.63+0x8> | |
10002ae0: 1c88 adds r0, r1, #2 | |
10002ae2: 9012 str r0, [sp, #72] | |
10002ae4: 9111 str r1, [sp, #68] | |
10002ae6: 4608 mov r0, r1 | |
10002ae8: 3812 subs r0, #18 | |
10002aea: 9016 str r0, [sp, #88] | |
10002aec: 20ed movs r0, #237 | |
10002aee: 00c0 lsls r0, r0, #3 | |
10002af0: 9010 str r0, [sp, #64] | |
10002af2: 1c80 adds r0, r0, #2 | |
10002af4: 9015 str r0, [sp, #84] | |
10002af6: 24ff movs r4, #255 | |
10002af8: 4620 mov r0, r4 | |
10002afa: 302a adds r0, #42 | |
10002afc: 900f str r0, [sp, #60] | |
10002afe: 1c80 adds r0, r0, #2 | |
10002b00: 9013 str r0, [sp, #76] | |
10002b02: 3490 adds r4, #144 | |
10002b04: 4620 mov r0, r4 | |
10002b06: 307d adds r0, #125 | |
10002b08: 900e str r0, [sp, #56] | |
10002b0a: 4620 mov r0, r4 | |
10002b0c: 305c adds r0, #92 | |
10002b0e: 900d str r0, [sp, #52] | |
10002b10: 4620 mov r0, r4 | |
10002b12: 305a adds r0, #90 | |
10002b14: 900c str r0, [sp, #48] | |
10002b16: 3450 adds r4, #80 | |
10002b18: e031 b 0x10002b7e <neotron_pico_bios::video_set_mode+0xf2> @ imm = #98 | |
10002b1a: 2188 movs r1, #136 | |
; let mode_ok = match ( | |
10002b1c: 4011 ands r1, r2 | |
10002b1e: 1840 adds r0, r0, r1 | |
10002b20: d00a beq 0x10002b38 <neotron_pico_bios::video_set_mode+0xac> @ imm = #20 | |
10002b22: 461c mov r4, r3 | |
; $func($($args),*) | |
10002b24: f003 ff72 bl 0x10006a0c <__cpsie> @ imm = #16100 | |
10002b28: 2000 movs r0, #0 | |
10002b2a: 991b ldr r1, [sp, #108] | |
; common::Result::Err(common::Error::UnsupportedConfiguration(0)) | |
10002b2c: 8088 strh r0, [r1, #4] | |
10002b2e: 4608 mov r0, r1 | |
10002b30: 708c strb r4, [r1, #2] | |
10002b32: 7006 strb r6, [r0] | |
; } | |
10002b34: b01d add sp, #116 | |
10002b36: bdf0 pop {r4, r5, r6, r7, pc} | |
10002b38: 9419 str r4, [sp, #100] | |
10002b3a: 4985 ldr r1, [pc, #532] @ 0x10002d50 <$d.63+0x4> | |
10002b3c: 4608 mov r0, r1 | |
10002b3e: 3014 adds r0, #20 | |
10002b40: 9017 str r0, [sp, #92] | |
10002b42: 9114 str r1, [sp, #80] | |
10002b44: 1c88 adds r0, r1, #2 | |
10002b46: 9018 str r0, [sp, #96] | |
10002b48: 4882 ldr r0, [pc, #520] @ 0x10002d54 <$d.63+0x8> | |
10002b4a: 1c81 adds r1, r0, #2 | |
10002b4c: 9111 str r1, [sp, #68] | |
10002b4e: 9012 str r0, [sp, #72] | |
10002b50: 3814 subs r0, #20 | |
10002b52: 9016 str r0, [sp, #88] | |
10002b54: 20ed movs r0, #237 | |
10002b56: 00c0 lsls r0, r0, #3 | |
10002b58: 9015 str r0, [sp, #84] | |
10002b5a: 1c80 adds r0, r0, #2 | |
10002b5c: 9010 str r0, [sp, #64] | |
10002b5e: 24ff movs r4, #255 | |
10002b60: 4620 mov r0, r4 | |
10002b62: 302a adds r0, #42 | |
10002b64: 9013 str r0, [sp, #76] | |
10002b66: 1c80 adds r0, r0, #2 | |
10002b68: 900f str r0, [sp, #60] | |
10002b6a: 3490 adds r4, #144 | |
10002b6c: 4620 mov r0, r4 | |
10002b6e: 3031 adds r0, #49 | |
10002b70: 900e str r0, [sp, #56] | |
10002b72: 4620 mov r0, r4 | |
10002b74: 300e adds r0, #14 | |
10002b76: 900d str r0, [sp, #52] | |
10002b78: 4620 mov r0, r4 | |
10002b7a: 300c adds r0, #12 | |
10002b7c: 900c str r0, [sp, #48] | |
10002b7e: 4876 ldr r0, [pc, #472] @ 0x10002d58 <$d.63+0xc> | |
10002b80: 4615 mov r5, r2 | |
10002b82: 7042 strb r2, [r0, #1] | |
10002b84: 4e75 ldr r6, [pc, #468] @ 0x10002d5c <$d.63+0x10> | |
10002b86: 4630 mov r0, r6 | |
10002b88: f003 fe58 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15536 | |
10002b8c: 900b str r0, [sp, #44] | |
10002b8e: 4630 mov r0, r6 | |
10002b90: f003 fe54 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15528 | |
10002b94: 900a str r0, [sp, #40] | |
10002b96: 4630 mov r0, r6 | |
10002b98: f003 fe50 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15520 | |
10002b9c: 9009 str r0, [sp, #36] | |
10002b9e: 4870 ldr r0, [pc, #448] @ 0x10002d60 <$d.63+0x14> | |
10002ba0: f003 fe4c bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15512 | |
10002ba4: 9008 str r0, [sp, #32] | |
10002ba6: 4630 mov r0, r6 | |
10002ba8: f003 fe48 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15504 | |
10002bac: 9007 str r0, [sp, #28] | |
10002bae: 4630 mov r0, r6 | |
10002bb0: f003 fe44 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15496 | |
10002bb4: 9006 str r0, [sp, #24] | |
10002bb6: 4630 mov r0, r6 | |
10002bb8: f003 fe40 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15488 | |
10002bbc: 9005 str r0, [sp, #20] | |
10002bbe: 4630 mov r0, r6 | |
10002bc0: f003 fe3c bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15480 | |
10002bc4: 9004 str r0, [sp, #16] | |
10002bc6: 4630 mov r0, r6 | |
10002bc8: f003 fe38 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15472 | |
10002bcc: 9003 str r0, [sp, #12] | |
10002bce: 4630 mov r0, r6 | |
10002bd0: f003 fe34 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15464 | |
10002bd4: 9002 str r0, [sp, #8] | |
10002bd6: 4630 mov r0, r6 | |
10002bd8: f003 fe30 bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15456 | |
10002bdc: 9001 str r0, [sp, #4] | |
10002bde: 4630 mov r0, r6 | |
10002be0: f003 fe2c bl 0x1000683c <pio::InstructionOperands::encode> @ imm = #15448 | |
10002be4: 495f ldr r1, [pc, #380] @ 0x10002d64 <$d.63+0x18> | |
10002be6: 460a mov r2, r1 | |
10002be8: 3210 adds r2, #16 | |
10002bea: 9b0e ldr r3, [sp, #56] | |
10002bec: 86d3 strh r3, [r2, #54] | |
10002bee: 9b0d ldr r3, [sp, #52] | |
10002bf0: 8693 strh r3, [r2, #52] | |
10002bf2: 9b0c ldr r3, [sp, #48] | |
10002bf4: 8653 strh r3, [r2, #50] | |
10002bf6: 8614 strh r4, [r2, #48] | |
10002bf8: 9a01 ldr r2, [sp, #4] | |
10002bfa: 0412 lsls r2, r2, #16 | |
10002bfc: 9b11 ldr r3, [sp, #68] | |
10002bfe: 18d2 adds r2, r2, r3 | |
10002c00: 638a str r2, [r1, #56] | |
10002c02: 9a02 ldr r2, [sp, #8] | |
10002c04: 0412 lsls r2, r2, #16 | |
10002c06: 9b10 ldr r3, [sp, #64] | |
10002c08: 18d2 adds r2, r2, r3 | |
10002c0a: 634a str r2, [r1, #52] | |
10002c0c: 9a03 ldr r2, [sp, #12] | |
10002c0e: 0412 lsls r2, r2, #16 | |
10002c10: 9b0f ldr r3, [sp, #60] | |
10002c12: 18d2 adds r2, r2, r3 | |
10002c14: 630a str r2, [r1, #48] | |
10002c16: 9a04 ldr r2, [sp, #16] | |
10002c18: 0412 lsls r2, r2, #16 | |
10002c1a: 9b14 ldr r3, [sp, #80] | |
10002c1c: 18d2 adds r2, r2, r3 | |
10002c1e: 62ca str r2, [r1, #44] | |
10002c20: 9a05 ldr r2, [sp, #20] | |
10002c22: 0412 lsls r2, r2, #16 | |
10002c24: 9b12 ldr r3, [sp, #72] | |
10002c26: 18d2 adds r2, r2, r3 | |
10002c28: 628a str r2, [r1, #40] | |
10002c2a: 9a06 ldr r2, [sp, #24] | |
10002c2c: 0412 lsls r2, r2, #16 | |
10002c2e: 9c15 ldr r4, [sp, #84] | |
10002c30: 1912 adds r2, r2, r4 | |
10002c32: 624a str r2, [r1, #36] | |
10002c34: 9a07 ldr r2, [sp, #28] | |
10002c36: 0412 lsls r2, r2, #16 | |
10002c38: 9e13 ldr r6, [sp, #76] | |
10002c3a: 1992 adds r2, r2, r6 | |
10002c3c: 620a str r2, [r1, #32] | |
10002c3e: 9a08 ldr r2, [sp, #32] | |
10002c40: 0412 lsls r2, r2, #16 | |
10002c42: 9b17 ldr r3, [sp, #92] | |
10002c44: 18d2 adds r2, r2, r3 | |
10002c46: 61ca str r2, [r1, #28] | |
10002c48: 9a09 ldr r2, [sp, #36] | |
10002c4a: 0412 lsls r2, r2, #16 | |
10002c4c: 9b16 ldr r3, [sp, #88] | |
10002c4e: 18d2 adds r2, r2, r3 | |
10002c50: 618a str r2, [r1, #24] | |
10002c52: 9a0a ldr r2, [sp, #40] | |
10002c54: 0412 lsls r2, r2, #16 | |
10002c56: 1912 adds r2, r2, r4 | |
10002c58: 614a str r2, [r1, #20] | |
10002c5a: 9a0b ldr r2, [sp, #44] | |
10002c5c: 0412 lsls r2, r2, #16 | |
10002c5e: 1992 adds r2, r2, r6 | |
10002c60: 610a str r2, [r1, #16] | |
10002c62: 0400 lsls r0, r0, #16 | |
10002c64: 9a18 ldr r2, [sp, #96] | |
10002c66: 1880 adds r0, r0, r2 | |
10002c68: 63c8 str r0, [r1, #60] | |
10002c6a: 9a1a ldr r2, [sp, #104] | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002c6c: 2a00 cmp r2, #0 | |
10002c6e: d00a beq 0x10002c86 <neotron_pico_bios::video_set_mode+0x1fa> @ imm = #20 | |
10002c70: 2a01 cmp r2, #1 | |
10002c72: 9b19 ldr r3, [sp, #100] | |
10002c74: d017 beq 0x10002ca6 <neotron_pico_bios::video_set_mode+0x21a> @ imm = #46 | |
10002c76: 2a02 cmp r2, #2 | |
10002c78: d162 bne 0x10002d40 <neotron_pico_bios::video_set_mode+0x2b4> @ imm = #196 | |
10002c7a: 0728 lsls r0, r5, #28 | |
10002c7c: d52a bpl 0x10002cd4 <neotron_pico_bios::video_set_mode+0x248> @ imm = #84 | |
10002c7e: 2032 movs r0, #50 | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002c80: 2b02 cmp r3, #2 | |
10002c82: d215 bhs 0x10002cb0 <neotron_pico_bios::video_set_mode+0x224> @ imm = #42 | |
10002c84: e005 b 0x10002c92 <neotron_pico_bios::video_set_mode+0x206> @ imm = #10 | |
10002c86: 0728 lsls r0, r5, #28 | |
10002c88: 9b19 ldr r3, [sp, #100] | |
10002c8a: d50e bpl 0x10002caa <neotron_pico_bios::video_set_mode+0x21e> @ imm = #28 | |
10002c8c: 2028 movs r0, #40 | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002c8e: 2b02 cmp r3, #2 | |
10002c90: d20e bhs 0x10002cb0 <neotron_pico_bios::video_set_mode+0x224> @ imm = #28 | |
10002c92: f3bf 8f5f dmb sy | |
10002c96: 6008 str r0, [r1] | |
10002c98: f3bf 8f5f dmb sy | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002c9c: 1e98 subs r0, r3, #2 | |
10002c9e: 2806 cmp r0, #6 | |
10002ca0: d21c bhs 0x10002cdc <neotron_pico_bios::video_set_mode+0x250> @ imm = #56 | |
10002ca2: 2000 movs r0, #0 | |
10002ca4: e00a b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #20 | |
10002ca6: 0728 lsls r0, r5, #28 | |
10002ca8: d4f0 bmi 0x10002c8c <neotron_pico_bios::video_set_mode+0x200> @ imm = #-32 | |
10002caa: 2050 movs r0, #80 | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002cac: 2b02 cmp r3, #2 | |
10002cae: d3f0 blo 0x10002c92 <neotron_pico_bios::video_set_mode+0x206> @ imm = #-32 | |
10002cb0: f3bf 8f5f dmb sy | |
10002cb4: 2000 movs r0, #0 | |
10002cb6: 6008 str r0, [r1] | |
10002cb8: f3bf 8f5f dmb sy | |
10002cbc: f3bf 8f5f dmb sy | |
10002cc0: 6048 str r0, [r1, #4] | |
10002cc2: f3bf 8f5f dmb sy | |
; $func($($args),*) | |
10002cc6: f003 fea1 bl 0x10006a0c <__cpsie> @ imm = #15682 | |
10002cca: 2600 movs r6, #0 | |
10002ccc: 981b ldr r0, [sp, #108] | |
10002cce: 7006 strb r6, [r0] | |
; } | |
10002cd0: b01d add sp, #116 | |
10002cd2: bdf0 pop {r4, r5, r6, r7, pc} | |
10002cd4: 2064 movs r0, #100 | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
10002cd6: 2b02 cmp r3, #2 | |
10002cd8: d2ea bhs 0x10002cb0 <neotron_pico_bios::video_set_mode+0x224> @ imm = #-44 | |
10002cda: e7da b 0x10002c92 <neotron_pico_bios::video_set_mode+0x206> @ imm = #-76 | |
10002cdc: 2b00 cmp r3, #0 | |
10002cde: d10a bne 0x10002cf6 <neotron_pico_bios::video_set_mode+0x26a> @ imm = #20 | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002ce0: 2a00 cmp r2, #0 | |
10002ce2: d013 beq 0x10002d0c <neotron_pico_bios::video_set_mode+0x280> @ imm = #38 | |
10002ce4: 2a01 cmp r2, #1 | |
10002ce6: d016 beq 0x10002d16 <neotron_pico_bios::video_set_mode+0x28a> @ imm = #44 | |
10002ce8: 2a02 cmp r2, #2 | |
10002cea: d129 bne 0x10002d40 <neotron_pico_bios::video_set_mode+0x2b4> @ imm = #82 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002cec: b268 sxtb r0, r5 | |
10002cee: 2800 cmp r0, #0 | |
10002cf0: d520 bpl 0x10002d34 <neotron_pico_bios::video_set_mode+0x2a8> @ imm = #64 | |
10002cf2: 2012 movs r0, #18 | |
10002cf4: e7e2 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-60 | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10002cf6: 2a00 cmp r2, #0 | |
10002cf8: d012 beq 0x10002d20 <neotron_pico_bios::video_set_mode+0x294> @ imm = #36 | |
10002cfa: 2a01 cmp r2, #1 | |
10002cfc: d015 beq 0x10002d2a <neotron_pico_bios::video_set_mode+0x29e> @ imm = #42 | |
10002cfe: 2a02 cmp r2, #2 | |
10002d00: d11e bne 0x10002d40 <neotron_pico_bios::video_set_mode+0x2b4> @ imm = #60 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002d02: b268 sxtb r0, r5 | |
10002d04: 2800 cmp r0, #0 | |
10002d06: d415 bmi 0x10002d34 <neotron_pico_bios::video_set_mode+0x2a8> @ imm = #42 | |
10002d08: 204b movs r0, #75 | |
10002d0a: e7d7 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-82 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002d0c: b268 sxtb r0, r5 | |
10002d0e: 2800 cmp r0, #0 | |
10002d10: d512 bpl 0x10002d38 <neotron_pico_bios::video_set_mode+0x2ac> @ imm = #36 | |
10002d12: 200f movs r0, #15 | |
10002d14: e7d2 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-92 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002d16: b268 sxtb r0, r5 | |
10002d18: 2800 cmp r0, #0 | |
10002d1a: d50f bpl 0x10002d3c <neotron_pico_bios::video_set_mode+0x2b0> @ imm = #30 | |
10002d1c: 200c movs r0, #12 | |
10002d1e: e7cd b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-102 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002d20: b268 sxtb r0, r5 | |
10002d22: 2800 cmp r0, #0 | |
10002d24: d408 bmi 0x10002d38 <neotron_pico_bios::video_set_mode+0x2ac> @ imm = #16 | |
10002d26: 203c movs r0, #60 | |
10002d28: e7c8 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-112 | |
; (self.0 & (1 << Self::VERT_2X_SHIFT)) != 0 | |
10002d2a: b268 sxtb r0, r5 | |
10002d2c: 2800 cmp r0, #0 | |
10002d2e: d405 bmi 0x10002d3c <neotron_pico_bios::video_set_mode+0x2b0> @ imm = #10 | |
10002d30: 2032 movs r0, #50 | |
10002d32: e7c3 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-122 | |
10002d34: 2025 movs r0, #37 | |
10002d36: e7c1 b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-126 | |
10002d38: 201e movs r0, #30 | |
10002d3a: e7bf b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-130 | |
10002d3c: 2019 movs r0, #25 | |
10002d3e: e7bd b 0x10002cbc <neotron_pico_bios::video_set_mode+0x230> @ imm = #-134 | |
10002d40: 4802 ldr r0, [pc, #8] @ 0x10002d4c <$d.63> | |
10002d42: 2128 movs r1, #40 | |
10002d44: f001 fe1e bl 0x10004984 <core::panicking::panic> @ imm = #7228 | |
10002d48: defe trap | |
10002d4a: 46c0 mov r8, r8 | |
10002d4c <$d.63>: | |
10002d4c: ca 78 00 10 .word 0x100078ca | |
10002d50: e9 31 00 00 .word 0x000031e9 | |
10002d54: a9 03 00 00 .word 0x000003a9 | |
10002d58: 18 ed 03 20 .word 0x2003ed18 | |
10002d5c: 75 72 00 10 .word 0x10007275 | |
10002d60: 70 72 00 10 .word 0x10007270 | |
10002d64: 00 c7 03 20 .word 0x2003c700 | |
10002d68 <neotron_pico_bios::video_get_mode>: | |
; unsafe { VIDEO_MODE } | |
10002d68: 4801 ldr r0, [pc, #4] @ 0x10002d70 <$d.65> | |
10002d6a: 7840 ldrb r0, [r0, #1] | |
; } | |
10002d6c: 4770 bx lr | |
10002d6e: 46c0 mov r8, r8 | |
10002d70 <$d.65>: | |
10002d70: 18 ed 03 20 .word 0x2003ed18 | |
10002d74 <neotron_pico_bios::video_get_framebuffer>: | |
; } | |
10002d74: 4800 ldr r0, [pc, #0] @ 0x10002d78 <$d.67> | |
10002d76: 4770 bx lr | |
10002d78 <$d.67>: | |
10002d78: 8c c7 03 20 .word 0x2003c78c | |
10002d7c <neotron_pico_bios::video_set_framebuffer>: | |
; pub unsafe extern "C" fn video_set_framebuffer(_buffer: *const u8) -> common::Result<()> { | |
10002d7c: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10002d7e: 7001 strb r1, [r0] | |
10002d80: 7081 strb r1, [r0, #2] | |
; } | |
10002d82: 4770 bx lr | |
10002d84 <neotron_pico_bios::video_mode_needs_vram>: | |
; pub extern "C" fn video_mode_needs_vram(_mode: common::video::Mode) -> bool { | |
10002d84: 2000 movs r0, #0 | |
; } | |
10002d86: 4770 bx lr | |
10002d88 <neotron_pico_bios::memory_get_region>: | |
; match region { | |
10002d88: 2900 cmp r1, #0 | |
10002d8a: d002 beq 0x10002d92 <neotron_pico_bios::memory_get_region+0xa> @ imm = #4 | |
10002d8c: 2101 movs r1, #1 | |
10002d8e: 7001 strb r1, [r0] | |
; } | |
10002d90: 4770 bx lr | |
10002d92: 2100 movs r1, #0 | |
; common::Option::Some(MemoryRegion { | |
10002d94: 7301 strb r1, [r0, #12] | |
10002d96: 4a03 ldr r2, [pc, #12] @ 0x10002da4 <$d.71> | |
10002d98: 4b03 ldr r3, [pc, #12] @ 0x10002da8 <$d.71+0x4> | |
10002d9a: 6043 str r3, [r0, #4] | |
10002d9c: 6082 str r2, [r0, #8] | |
10002d9e: 7001 strb r1, [r0] | |
; } | |
10002da0: 4770 bx lr | |
10002da2: 46c0 mov r8, r8 | |
10002da4 <$d.71>: | |
10002da4: 00 a0 03 00 .word 0x0003a000 | |
10002da8: 00 00 00 20 .word 0x20000000 | |
10002dac <neotron_pico_bios::hid_get_event>: | |
; pub extern "C" fn hid_get_event() -> common::Result<common::Option<common::hid::HidEvent>> { | |
10002dac: b5f0 push {r4, r5, r6, r7, lr} | |
10002dae: af03 add r7, sp, #12 | |
10002db0: b08f sub sp, #60 | |
10002db2: 9001 str r0, [sp, #4] | |
10002db4: 2000 movs r0, #0 | |
; let mut buffer = [0u8; 8]; | |
10002db6: 900b str r0, [sp, #44] | |
10002db8: 9002 str r0, [sp, #8] | |
10002dba: 900a str r0, [sp, #40] | |
; $func($($args),*) | |
10002dbc: f003 fe2f bl 0x10006a1e <__primask_r> @ imm = #15454 | |
10002dc0: 2501 movs r5, #1 | |
10002dc2: 4997 ldr r1, [pc, #604] @ 0x10003020 <$d.73+0x8> | |
10002dc4: 3914 subs r1, #20 | |
10002dc6: 680a ldr r2, [r1] | |
10002dc8: 4996 ldr r1, [pc, #600] @ 0x10003024 <$d.73+0xc> | |
10002dca: 7c09 ldrb r1, [r1, #16] | |
10002dcc: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
10002dd0: 1c54 adds r4, r2, #1 | |
10002dd2: b2e2 uxtb r2, r4 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
10002dd4: 4291 cmp r1, r2 | |
10002dd6: 9504 str r5, [sp, #16] | |
10002dd8: d101 bne 0x10002dde <neotron_pico_bios::hid_get_event+0x32> @ imm = #2 | |
10002dda: 2402 movs r4, #2 | |
10002ddc: e015 b 0x10002e0a <neotron_pico_bios::hid_get_event+0x5e> @ imm = #42 | |
10002dde: 4028 ands r0, r5 | |
10002de0: 4606 mov r6, r0 | |
10002de2: 4d91 ldr r5, [pc, #580] @ 0x10003028 <$d.73+0x10> | |
; if interrupts_active { | |
10002de4: d107 bne 0x10002df6 <neotron_pico_bios::hid_get_event+0x4a> @ imm = #14 | |
; $func($($args),*) | |
10002de6: f003 fe0f bl 0x10006a08 <__cpsid> @ imm = #15390 | |
10002dea: 6828 ldr r0, [r5] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
10002dec: 2800 cmp r0, #0 | |
10002dee: d107 bne 0x10002e00 <neotron_pico_bios::hid_get_event+0x54> @ imm = #14 | |
; $func($($args),*) | |
10002df0: f003 fe0c bl 0x10006a0c <__cpsie> @ imm = #15384 | |
10002df4: e7f7 b 0x10002de6 <neotron_pico_bios::hid_get_event+0x3a> @ imm = #-18 | |
10002df6: f003 fe07 bl 0x10006a08 <__cpsid> @ imm = #15374 | |
10002dfa: 6828 ldr r0, [r5] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
10002dfc: 2800 cmp r0, #0 | |
10002dfe: d0fa beq 0x10002df6 <neotron_pico_bios::hid_get_event+0x4a> @ imm = #-12 | |
10002e00: 4888 ldr r0, [pc, #544] @ 0x10003024 <$d.73+0xc> | |
10002e02: 7404 strb r4, [r0, #16] | |
10002e04: 4634 mov r4, r6 | |
10002e06: 9d04 ldr r5, [sp, #16] | |
; interrupts_active as _ | |
10002e08: 406c eors r4, r5 | |
10002e0a: 4b88 ldr r3, [pc, #544] @ 0x1000302c <$d.73+0x14> | |
10002e0c: 6818 ldr r0, [r3] | |
10002e0e: 2800 cmp r0, #0 | |
10002e10: d000 beq 0x10002e14 <neotron_pico_bios::hid_get_event+0x68> @ imm = #0 | |
10002e12: e256 b 0x100032c2 <$t.74+0x28e> @ imm = #1196 | |
10002e14: 20d4 movs r0, #212 | |
10002e16: 9007 str r0, [sp, #28] | |
10002e18: 5c19 ldrb r1, [r3, r0] | |
10002e1a: 9802 ldr r0, [sp, #8] | |
10002e1c: 43c2 mvns r2, r0 | |
10002e1e: 4618 mov r0, r3 | |
10002e20: c004 stm r0!, {r2} | |
10002e22: 2902 cmp r1, #2 | |
10002e24: d000 beq 0x10002e28 <neotron_pico_bios::hid_get_event+0x7c> @ imm = #0 | |
10002e26: 9002 str r0, [sp, #8] | |
10002e28: 2902 cmp r1, #2 | |
10002e2a: d100 bne 0x10002e2e <neotron_pico_bios::hid_get_event+0x82> @ imm = #0 | |
10002e2c: e250 b 0x100032d0 <$t.74+0x29c> @ imm = #1184 | |
10002e2e: 20d0 movs r0, #208 | |
10002e30: 9009 str r0, [sp, #36] | |
10002e32: 20cc movs r0, #204 | |
10002e34: 9006 str r0, [sp, #24] | |
; self.front == self.back && !self.full | |
10002e36: 5818 ldr r0, [r3, r0] | |
; if self.is_empty() { | |
10002e38: 2900 cmp r1, #0 | |
10002e3a: d103 bne 0x10002e44 <neotron_pico_bios::hid_get_event+0x98> @ imm = #6 | |
10002e3c: 9909 ldr r1, [sp, #36] | |
10002e3e: 5859 ldr r1, [r3, r1] | |
; if self.is_empty() { | |
10002e40: 4288 cmp r0, r1 | |
10002e42: d00f beq 0x10002e64 <neotron_pico_bios::hid_get_event+0xb8> @ imm = #30 | |
10002e44: 2100 movs r1, #0 | |
; self.full = false; | |
10002e46: 9a07 ldr r2, [sp, #28] | |
10002e48: 5499 strb r1, [r3, r2] | |
; if i + 1 == N { | |
10002e4a: 1c42 adds r2, r0, #1 | |
10002e4c: 2a10 cmp r2, #16 | |
10002e4e: d000 beq 0x10002e52 <neotron_pico_bios::hid_get_event+0xa6> @ imm = #0 | |
10002e50: 4611 mov r1, r2 | |
; self.front = Self::increment(self.front); | |
10002e52: 9a06 ldr r2, [sp, #24] | |
10002e54: 5099 str r1, [r3, r2] | |
10002e56: 00c0 lsls r0, r0, #3 | |
; self.front = Self::increment(self.front); | |
10002e58: 1818 adds r0, r3, r0 | |
10002e5a: 6cc1 ldr r1, [r0, #76] | |
; Some(unsafe { self.pop_front_unchecked() }) | |
10002e5c: b2ca uxtb r2, r1 | |
; if let Some(ev) = hw.event_queue.pop_front() { | |
10002e5e: 2a03 cmp r2, #3 | |
10002e60: d000 beq 0x10002e64 <neotron_pico_bios::hid_get_event+0xb8> @ imm = #0 | |
10002e62: e1e5 b 0x10003230 <$t.74+0x1fc> @ imm = #970 | |
10002e64: 9400 str r4, [sp] | |
10002e66: 0468 lsls r0, r5, #17 | |
10002e68: 9003 str r0, [sp, #12] | |
10002e6a: e000 b 0x10002e6e <neotron_pico_bios::hid_get_event+0xc2> @ imm = #0 | |
10002e6c: 4b6f ldr r3, [pc, #444] @ 0x1000302c <$d.73+0x14> | |
10002e6e: 486d ldr r0, [pc, #436] @ 0x10003024 <$d.73+0xc> | |
10002e70: 7940 ldrb r0, [r0, #5] | |
; if INTERRUPT_PENDING.load(Ordering::Relaxed) { | |
10002e72: 2800 cmp r0, #0 | |
10002e74: d07e beq 0x10002f74 <neotron_pico_bios::hid_get_event+0x1c8> @ imm = #252 | |
10002e76: 240e movs r4, #14 | |
; $func($($args),*) | |
10002e78: 4620 mov r0, r4 | |
10002e7a: f003 fdc9 bl 0x10006a10 <__delay> @ imm = #15250 | |
10002e7e: 4868 ldr r0, [pc, #416] @ 0x10003020 <$d.73+0x8> | |
10002e80: 9903 ldr r1, [sp, #12] | |
10002e82: 6041 str r1, [r0, #4] | |
; $func($($args),*) | |
10002e84: 4620 mov r0, r4 | |
10002e86: f003 fdc3 bl 0x10006a10 <__delay> @ imm = #15238 | |
10002e8a: 4a69 ldr r2, [pc, #420] @ 0x10003030 <$d.73+0x18> | |
10002e8c: 6810 ldr r0, [r2] | |
; if !self.is_writable() { | |
10002e8e: 0780 lsls r0, r0, #30 | |
10002e90: d408 bmi 0x10002ea4 <neotron_pico_bios::hid_get_event+0xf8> @ imm = #16 | |
10002e92: 6810 ldr r0, [r2] | |
; if !self.is_writable() { | |
10002e94: 0780 lsls r0, r0, #30 | |
10002e96: d405 bmi 0x10002ea4 <neotron_pico_bios::hid_get_event+0xf8> @ imm = #10 | |
10002e98: 6810 ldr r0, [r2] | |
; if !self.is_writable() { | |
10002e9a: 0780 lsls r0, r0, #30 | |
10002e9c: d402 bmi 0x10002ea4 <neotron_pico_bios::hid_get_event+0xf8> @ imm = #4 | |
10002e9e: 6810 ldr r0, [r2] | |
; if !self.is_writable() { | |
10002ea0: 0780 lsls r0, r0, #30 | |
10002ea2: d5f3 bpl 0x10002e8c <neotron_pico_bios::hid_get_event+0xe0> @ imm = #-26 | |
10002ea4: 1f10 subs r0, r2, #4 | |
10002ea6: 2141 movs r1, #65 | |
10002ea8: 6001 str r1, [r0] | |
10002eaa: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002eac: 0749 lsls r1, r1, #29 | |
10002eae: d408 bmi 0x10002ec2 <neotron_pico_bios::hid_get_event+0x116> @ imm = #16 | |
10002eb0: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002eb2: 0749 lsls r1, r1, #29 | |
10002eb4: d405 bmi 0x10002ec2 <neotron_pico_bios::hid_get_event+0x116> @ imm = #10 | |
10002eb6: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002eb8: 0749 lsls r1, r1, #29 | |
10002eba: d402 bmi 0x10002ec2 <neotron_pico_bios::hid_get_event+0x116> @ imm = #4 | |
10002ebc: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002ebe: 0749 lsls r1, r1, #29 | |
10002ec0: d5f3 bpl 0x10002eaa <neotron_pico_bios::hid_get_event+0xfe> @ imm = #-26 | |
10002ec2: 6801 ldr r1, [r0] | |
10002ec4: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002ec6: 0789 lsls r1, r1, #30 | |
10002ec8: d408 bmi 0x10002edc <neotron_pico_bios::hid_get_event+0x130> @ imm = #16 | |
10002eca: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002ecc: 0789 lsls r1, r1, #30 | |
10002ece: d405 bmi 0x10002edc <neotron_pico_bios::hid_get_event+0x130> @ imm = #10 | |
10002ed0: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002ed2: 0789 lsls r1, r1, #30 | |
10002ed4: d402 bmi 0x10002edc <neotron_pico_bios::hid_get_event+0x130> @ imm = #4 | |
10002ed6: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002ed8: 0789 lsls r1, r1, #30 | |
10002eda: d5f3 bpl 0x10002ec4 <neotron_pico_bios::hid_get_event+0x118> @ imm = #-26 | |
10002edc: 2113 movs r1, #19 | |
10002ede: 6001 str r1, [r0] | |
10002ee0: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002ee2: 0749 lsls r1, r1, #29 | |
10002ee4: d408 bmi 0x10002ef8 <neotron_pico_bios::hid_get_event+0x14c> @ imm = #16 | |
10002ee6: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002ee8: 0749 lsls r1, r1, #29 | |
10002eea: d405 bmi 0x10002ef8 <neotron_pico_bios::hid_get_event+0x14c> @ imm = #10 | |
10002eec: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002eee: 0749 lsls r1, r1, #29 | |
10002ef0: d402 bmi 0x10002ef8 <neotron_pico_bios::hid_get_event+0x14c> @ imm = #4 | |
10002ef2: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002ef4: 0749 lsls r1, r1, #29 | |
10002ef6: d5f3 bpl 0x10002ee0 <neotron_pico_bios::hid_get_event+0x134> @ imm = #-26 | |
10002ef8: 6801 ldr r1, [r0] | |
10002efa: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002efc: 0789 lsls r1, r1, #30 | |
10002efe: d408 bmi 0x10002f12 <neotron_pico_bios::hid_get_event+0x166> @ imm = #16 | |
10002f00: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002f02: 0789 lsls r1, r1, #30 | |
10002f04: d405 bmi 0x10002f12 <neotron_pico_bios::hid_get_event+0x166> @ imm = #10 | |
10002f06: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002f08: 0789 lsls r1, r1, #30 | |
10002f0a: d402 bmi 0x10002f12 <neotron_pico_bios::hid_get_event+0x166> @ imm = #4 | |
10002f0c: 6811 ldr r1, [r2] | |
; if !self.is_writable() { | |
10002f0e: 0789 lsls r1, r1, #30 | |
10002f10: d5f3 bpl 0x10002efa <neotron_pico_bios::hid_get_event+0x14e> @ imm = #-26 | |
10002f12: 2100 movs r1, #0 | |
10002f14: 6001 str r1, [r0] | |
10002f16: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002f18: 0749 lsls r1, r1, #29 | |
10002f1a: d408 bmi 0x10002f2e <neotron_pico_bios::hid_get_event+0x182> @ imm = #16 | |
10002f1c: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002f1e: 0749 lsls r1, r1, #29 | |
10002f20: d405 bmi 0x10002f2e <neotron_pico_bios::hid_get_event+0x182> @ imm = #10 | |
10002f22: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002f24: 0749 lsls r1, r1, #29 | |
10002f26: d402 bmi 0x10002f2e <neotron_pico_bios::hid_get_event+0x182> @ imm = #4 | |
10002f28: 6811 ldr r1, [r2] | |
; if !self.is_readable() { | |
10002f2a: 0749 lsls r1, r1, #29 | |
10002f2c: d5f3 bpl 0x10002f16 <neotron_pico_bios::hid_get_event+0x16a> @ imm = #-26 | |
10002f2e: 6804 ldr r4, [r0] | |
10002f30: 200e movs r0, #14 | |
; $func($($args),*) | |
10002f32: f003 fd6d bl 0x10006a10 <__delay> @ imm = #15066 | |
10002f36: 48e9 ldr r0, [pc, #932] @ 0x100032dc <$d.75> | |
10002f38: 9903 ldr r1, [sp, #12] | |
10002f3a: 6001 str r1, [r0] | |
10002f3c: 4aea ldr r2, [pc, #936] @ 0x100032e8 <$d.75+0xc> | |
; self.interrupts_pending = self.io_read_interrupts() ^ 0xFF; | |
10002f3e: 4610 mov r0, r2 | |
10002f40: 30d5 adds r0, #213 | |
10002f42: 43e1 mvns r1, r4 | |
; self.interrupts_pending = self.io_read_interrupts() ^ 0xFF; | |
10002f44: 7141 strb r1, [r0, #5] | |
; self.irq_count = self.irq_count.wrapping_add(1); | |
10002f46: 6c91 ldr r1, [r2, #72] | |
10002f48: 1c49 adds r1, r1, #1 | |
; self.irq_count = self.irq_count.wrapping_add(1); | |
10002f4a: 6491 str r1, [r2, #72] | |
; self.led_state = leds << 1 | (self.led_state & 1); | |
10002f4c: 78c2 ldrb r2, [r0, #3] | |
10002f4e: 9b04 ldr r3, [sp, #16] | |
10002f50: 401a ands r2, r3 | |
10002f52: 0709 lsls r1, r1, #28 | |
10002f54: 0ec9 lsrs r1, r1, #27 | |
10002f56: 1851 adds r1, r2, r1 | |
10002f58: 221e movs r2, #30 | |
10002f5a: 404a eors r2, r1 | |
10002f5c: 70c2 strb r2, [r0, #3] | |
; self.io_chip_write(0x12, self.led_state << 3 | self.last_cs); | |
10002f5e: 00d2 lsls r2, r2, #3 | |
10002f60: 7901 ldrb r1, [r0, #4] | |
10002f62: 4311 orrs r1, r2 | |
10002f64: 2012 movs r0, #18 | |
10002f66: f7fe fdbd bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-5254 | |
10002f6a: 20ff movs r0, #255 | |
; self.interrupts_pending = self.io_read_interrupts() ^ 0xFF; | |
10002f6c: 43a0 bics r0, r4 | |
; if !self.is_irq_pending_on_slot(0) { | |
10002f6e: 07c0 lsls r0, r0, #31 | |
10002f70: d105 bne 0x10002f7e <neotron_pico_bios::hid_get_event+0x1d2> @ imm = #10 | |
10002f72: e13d b 0x100031f0 <$t.74+0x1bc> @ imm = #634 | |
10002f74: 20da movs r0, #218 | |
; if !self.is_irq_pending_on_slot(0) { | |
10002f76: 5c18 ldrb r0, [r3, r0] | |
10002f78: 07c0 lsls r0, r0, #31 | |
10002f7a: d100 bne 0x10002f7e <neotron_pico_bios::hid_get_event+0x1d2> @ imm = #0 | |
10002f7c: e138 b 0x100031f0 <$t.74+0x1bc> @ imm = #624 | |
10002f7e: aa0c add r2, sp, #48 | |
10002f80: 2000 movs r0, #0 | |
; let mut fifo_data = [0u8; 9]; | |
10002f82: 7210 strb r0, [r2, #8] | |
10002f84: 900d str r0, [sp, #52] | |
10002f86: 9008 str r0, [sp, #32] | |
10002f88: 900c str r0, [sp, #48] | |
10002f8a: 4bd5 ldr r3, [pc, #852] @ 0x100032e0 <$d.75+0x4> | |
10002f8c: 7918 ldrb r0, [r3, #4] | |
10002f8e: 4241 rsbs r1, r0, #0 | |
10002f90: 4141 adcs r1, r0 | |
10002f92: 7119 strb r1, [r3, #4] | |
; } | |
10002f94: 2800 cmp r0, #0 | |
10002f96: d001 beq 0x10002f9c <neotron_pico_bios::hid_get_event+0x1f0> @ imm = #2 | |
10002f98: 20c1 movs r0, #193 | |
10002f9a: e000 b 0x10002f9e <neotron_pico_bios::hid_get_event+0x1f2> @ imm = #0 | |
10002f9c: 20c0 movs r0, #192 | |
; } | |
10002f9e: 0601 lsls r1, r0, #24 | |
10002fa0: 4cd4 ldr r4, [pc, #848] @ 0x100032f4 <$d.75+0x18> | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002fa2: 5c20 ldrb r0, [r4, r0] | |
10002fa4: 2340 movs r3, #64 | |
; let idx = crc ^ *d; | |
10002fa6: 4043 eors r3, r0 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002fa8: 5ce0 ldrb r0, [r4, r3] | |
10002faa: 2309 movs r3, #9 | |
; let idx = crc ^ *d; | |
10002fac: 4058 eors r0, r3 | |
; crc = CRC_TABLE[usize::from(idx)]; | |
10002fae: 5c20 ldrb r0, [r4, r0] | |
; } | |
10002fb0: 0400 lsls r0, r0, #16 | |
10002fb2: 1840 adds r0, r0, r1 | |
10002fb4: 2125 movs r1, #37 | |
10002fb6: 0189 lsls r1, r1, #6 | |
10002fb8: 1841 adds r1, r0, r1 | |
; self.bmc_do_request( | |
10002fba: 9802 ldr r0, [sp, #8] | |
10002fbc: f7fe feae bl 0x10001d1c <neotron_pico_bios::Hardware::bmc_do_request> @ imm = #-4772 | |
10002fc0: 2800 cmp r0, #0 | |
10002fc2: d000 beq 0x10002fc6 <neotron_pico_bios::hid_get_event+0x21a> @ imm = #0 | |
10002fc4: e752 b 0x10002e6c <neotron_pico_bios::hid_get_event+0xc0> @ imm = #-348 | |
10002fc6: a80a add r0, sp, #40 | |
; *dest = *src; | |
10002fc8: 990d ldr r1, [sp, #52] | |
10002fca: 70c1 strb r1, [r0, #3] | |
10002fcc: 990e ldr r1, [sp, #56] | |
10002fce: 71c1 strb r1, [r0, #7] | |
10002fd0: a90c add r1, sp, #48 | |
10002fd2: 784a ldrb r2, [r1, #1] | |
10002fd4: 7002 strb r2, [r0] | |
10002fd6: 788a ldrb r2, [r1, #2] | |
10002fd8: 7042 strb r2, [r0, #1] | |
10002fda: 78ca ldrb r2, [r1, #3] | |
10002fdc: 7082 strb r2, [r0, #2] | |
10002fde: 794a ldrb r2, [r1, #5] | |
10002fe0: 7102 strb r2, [r0, #4] | |
10002fe2: 798a ldrb r2, [r1, #6] | |
10002fe4: 7142 strb r2, [r0, #5] | |
10002fe6: 79ca ldrb r2, [r1, #7] | |
10002fe8: 7182 strb r2, [r0, #6] | |
; let bytes_in_fifo = fifo_data[0]; | |
10002fea: 780c ldrb r4, [r1] | |
; Ok(n) if n > 0 => { | |
10002fec: 2c00 cmp r4, #0 | |
10002fee: d100 bne 0x10002ff2 <neotron_pico_bios::hid_get_event+0x246> @ imm = #0 | |
10002ff0: e0fe b 0x100031f0 <$t.74+0x1bc> @ imm = #508 | |
; let slice = if n >= 8 { &buffer } else { &buffer[0..n] }; | |
10002ff2: 2c08 cmp r4, #8 | |
10002ff4: d300 blo 0x10002ff8 <neotron_pico_bios::hid_get_event+0x24c> @ imm = #0 | |
10002ff6: 2408 movs r4, #8 | |
10002ff8: ae0a add r6, sp, #40 | |
10002ffa: 4bbb ldr r3, [pc, #748] @ 0x100032e8 <$d.75+0xc> | |
10002ffc: e004 b 0x10003008 <neotron_pico_bios::hid_get_event+0x25c> @ imm = #8 | |
10002ffe: 2005 movs r0, #5 | |
10003000: 5458 strb r0, [r3, r1] | |
10003002: 1e64 subs r4, r4, #1 | |
10003004: d100 bne 0x10003008 <neotron_pico_bios::hid_get_event+0x25c> @ imm = #0 | |
10003006: e732 b 0x10002e6e <neotron_pico_bios::hid_get_event+0xc2> @ imm = #-412 | |
10003008: 21db movs r1, #219 | |
; match self.state { | |
1000300a: 5c5a ldrb r2, [r3, r1] | |
; match hw.keyboard.advance_state(*b) { | |
1000300c: 7830 ldrb r0, [r6] | |
1000300e: 1c76 adds r6, r6, #1 | |
10003010: 447a add r2, pc | |
10003012: 7912 ldrb r2, [r2, #4] | |
10003014: 0052 lsls r2, r2, #1 | |
10003016: 4497 add pc, r2 | |
10003018 <$d.73>: | |
10003018: 0d 16 1b 21 .word 0x211b160d | |
1000301c: 2d 3d c0 46 .word 0x46c03d2d | |
10003020: 14 00 00 d0 .word 0xd0000014 | |
10003024: 18 ed 03 20 .word 0x2003ed18 | |
10003028: 7c 01 00 d0 .word 0xd000017c | |
1000302c: f0 c5 03 20 .word 0x2003c5f0 | |
10003030: 0c c0 03 40 .word 0x4003c00c | |
10003034 <$t.74>: | |
; DecodeState::Start => match code { | |
10003034: 28e0 cmp r0, #224 | |
10003036: 4bac ldr r3, [pc, #688] @ 0x100032e8 <$d.75+0xc> | |
10003038: d048 beq 0x100030cc <$t.74+0x98> @ imm = #144 | |
1000303a: 28e1 cmp r0, #225 | |
1000303c: d048 beq 0x100030d0 <$t.74+0x9c> @ imm = #144 | |
1000303e: 28f0 cmp r0, #240 | |
10003040: d148 bne 0x100030d4 <$t.74+0xa0> @ imm = #144 | |
10003042: 2002 movs r0, #2 | |
10003044: e7dc b 0x10003000 <neotron_pico_bios::hid_get_event+0x254> @ imm = #-72 | |
; DecodeState::Extended => match code { | |
10003046: 28f0 cmp r0, #240 | |
10003048: 4ba7 ldr r3, [pc, #668] @ 0x100032e8 <$d.75+0xc> | |
1000304a: d12a bne 0x100030a2 <$t.74+0x6e> @ imm = #84 | |
1000304c: 2003 movs r0, #3 | |
1000304e: e7d7 b 0x10003000 <neotron_pico_bios::hid_get_event+0x254> @ imm = #-82 | |
10003050: 4da5 ldr r5, [pc, #660] @ 0x100032e8 <$d.75+0xc> | |
; self.state = DecodeState::Start; | |
10003052: 9a08 ldr r2, [sp, #32] | |
10003054: 546a strb r2, [r5, r1] | |
; Ok(Some(KeyEvent::new(Self::map_scancode(code)?, KeyState::Up))) | |
10003056: f003 f953 bl 0x10006300 <pc_keyboard::scancodes::set2::ScancodeSet2::map_scancode> @ imm = #12966 | |
1000305a: e004 b 0x10003066 <$t.74+0x32> @ imm = #8 | |
1000305c: 4da2 ldr r5, [pc, #648] @ 0x100032e8 <$d.75+0xc> | |
; self.state = DecodeState::Start; | |
1000305e: 9a08 ldr r2, [sp, #32] | |
10003060: 546a strb r2, [r5, r1] | |
; Self::map_extended_scancode(code)?, | |
10003062: f003 fb1d bl 0x100066a0 <pc_keyboard::scancodes::set2::ScancodeSet2::map_extended_scancode> @ imm = #13882 | |
10003066: 462b mov r3, r5 | |
10003068: 07c0 lsls r0, r0, #31 | |
1000306a: 0f42 lsrs r2, r0, #29 | |
; match hw.keyboard.advance_state(*b) { | |
1000306c: 1ed0 subs r0, r2, #3 | |
1000306e: 2801 cmp r0, #1 | |
10003070: d9c7 bls 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-114 | |
10003072: e04d b 0x10003110 <$t.74+0xdc> @ imm = #154 | |
; DecodeState::Extended2 => match code { | |
10003074: 28f0 cmp r0, #240 | |
10003076: 4b9c ldr r3, [pc, #624] @ 0x100032e8 <$d.75+0xc> | |
10003078: d0c1 beq 0x10002ffe <neotron_pico_bios::hid_get_event+0x252> @ imm = #-126 | |
; self.state = DecodeState::Start; | |
1000307a: 9a08 ldr r2, [sp, #32] | |
1000307c: 545a strb r2, [r3, r1] | |
; Self::map_extended2_scancode(code)?, | |
1000307e: 2814 cmp r0, #20 | |
10003080: 9a04 ldr r2, [sp, #16] | |
10003082: d000 beq 0x10003086 <$t.74+0x52> @ imm = #0 | |
10003084: 2204 movs r2, #4 | |
10003086: 2814 cmp r0, #20 | |
10003088: d032 beq 0x100030f0 <$t.74+0xbc> @ imm = #100 | |
1000308a: 2103 movs r1, #3 | |
; match hw.keyboard.advance_state(*b) { | |
1000308c: 1ed0 subs r0, r2, #3 | |
1000308e: 2801 cmp r0, #1 | |
10003090: d9b7 bls 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-146 | |
10003092: e03d b 0x10003110 <$t.74+0xdc> @ imm = #122 | |
10003094: 4b94 ldr r3, [pc, #592] @ 0x100032e8 <$d.75+0xc> | |
; self.state = DecodeState::Start; | |
10003096: 9a08 ldr r2, [sp, #32] | |
10003098: 545a strb r2, [r3, r1] | |
1000309a: 2814 cmp r0, #20 | |
1000309c: d00d beq 0x100030ba <$t.74+0x86> @ imm = #26 | |
1000309e: 2103 movs r1, #3 | |
100030a0: e00c b 0x100030bc <$t.74+0x88> @ imm = #24 | |
; self.state = DecodeState::Start; | |
100030a2: 9a08 ldr r2, [sp, #32] | |
100030a4: 545a strb r2, [r3, r1] | |
; let keycode = Self::map_extended_scancode(code)?; | |
100030a6: f003 fafb bl 0x100066a0 <pc_keyboard::scancodes::set2::ScancodeSet2::map_extended_scancode> @ imm = #13814 | |
100030aa: 07c0 lsls r0, r0, #31 | |
100030ac: d025 beq 0x100030fa <$t.74+0xc6> @ imm = #74 | |
100030ae: 2204 movs r2, #4 | |
100030b0: 4b8d ldr r3, [pc, #564] @ 0x100032e8 <$d.75+0xc> | |
; match hw.keyboard.advance_state(*b) { | |
100030b2: 1ed0 subs r0, r2, #3 | |
100030b4: 2801 cmp r0, #1 | |
100030b6: d9a4 bls 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-184 | |
100030b8: e02a b 0x10003110 <$t.74+0xdc> @ imm = #84 | |
100030ba: 217a movs r1, #122 | |
; match code { | |
100030bc: 3814 subs r0, #20 | |
100030be: 1e42 subs r2, r0, #1 | |
100030c0: 4190 sbcs r0, r2 | |
; Self::map_extended2_scancode(code)?, | |
100030c2: 0082 lsls r2, r0, #2 | |
; match hw.keyboard.advance_state(*b) { | |
100030c4: 1ed0 subs r0, r2, #3 | |
100030c6: 2801 cmp r0, #1 | |
100030c8: d99b bls 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-202 | |
100030ca: e021 b 0x10003110 <$t.74+0xdc> @ imm = #66 | |
100030cc: 2001 movs r0, #1 | |
100030ce: e797 b 0x10003000 <neotron_pico_bios::hid_get_event+0x254> @ imm = #-210 | |
100030d0: 2004 movs r0, #4 | |
100030d2: e795 b 0x10003000 <neotron_pico_bios::hid_get_event+0x254> @ imm = #-214 | |
; let keycode = Self::map_scancode(code)?; | |
100030d4: f003 f914 bl 0x10006300 <pc_keyboard::scancodes::set2::ScancodeSet2::map_scancode> @ imm = #12840 | |
100030d8: 4b83 ldr r3, [pc, #524] @ 0x100032e8 <$d.75+0xc> | |
100030da: 07c0 lsls r0, r0, #31 | |
100030dc: d191 bne 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-222 | |
100030de: 20fe movs r0, #254 | |
; if keycode == KeyCode::TooManyKeys || keycode == KeyCode::PowerOnTestOk { | |
100030e0: 4008 ands r0, r1 | |
100030e2: 2878 cmp r0, #120 | |
100030e4: d00f beq 0x10003106 <$t.74+0xd2> @ imm = #30 | |
100030e6: 2201 movs r2, #1 | |
; match hw.keyboard.advance_state(*b) { | |
100030e8: 1ed0 subs r0, r2, #3 | |
100030ea: 2801 cmp r0, #1 | |
100030ec: d810 bhi 0x10003110 <$t.74+0xdc> @ imm = #32 | |
100030ee: e788 b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-240 | |
100030f0: 217a movs r1, #122 | |
; match hw.keyboard.advance_state(*b) { | |
100030f2: 1ed0 subs r0, r2, #3 | |
100030f4: 2801 cmp r0, #1 | |
100030f6: d80b bhi 0x10003110 <$t.74+0xdc> @ imm = #22 | |
100030f8: e783 b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-250 | |
100030fa: 2201 movs r2, #1 | |
100030fc: 4b7a ldr r3, [pc, #488] @ 0x100032e8 <$d.75+0xc> | |
; match hw.keyboard.advance_state(*b) { | |
100030fe: 1ed0 subs r0, r2, #3 | |
10003100: 2801 cmp r0, #1 | |
10003102: d805 bhi 0x10003110 <$t.74+0xdc> @ imm = #10 | |
10003104: e77d b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-262 | |
10003106: 2202 movs r2, #2 | |
; match hw.keyboard.advance_state(*b) { | |
10003108: 1ed0 subs r0, r2, #3 | |
1000310a: 2801 cmp r0, #1 | |
1000310c: d800 bhi 0x10003110 <$t.74+0xdc> @ imm = #0 | |
1000310e: e778 b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-272 | |
; match pc_keyboard_ev.state { | |
10003110: 2a00 cmp r2, #0 | |
10003112: d017 beq 0x10003144 <$t.74+0x110> @ imm = #46 | |
10003114: 2a01 cmp r2, #1 | |
10003116: d131 bne 0x1000317c <$t.74+0x148> @ imm = #98 | |
; if self.is_full() { | |
10003118: 9807 ldr r0, [sp, #28] | |
1000311a: 5c18 ldrb r0, [r3, r0] | |
1000311c: 2800 cmp r0, #0 | |
1000311e: d000 beq 0x10003122 <$t.74+0xee> @ imm = #0 | |
10003120: e0c8 b 0x100032b4 <$t.74+0x280> @ imm = #400 | |
10003122: 9d09 ldr r5, [sp, #36] | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003124: 5958 ldr r0, [r3, r5] | |
10003126: 00c0 lsls r0, r0, #3 | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003128: 1818 adds r0, r3, r0 | |
1000312a: 2200 movs r2, #0 | |
1000312c: 6502 str r2, [r0, #80] | |
; self.back = Self::increment(self.back); | |
1000312e: 595b ldr r3, [r3, r5] | |
; if i + 1 == N { | |
10003130: 1c5b adds r3, r3, #1 | |
10003132: 2b10 cmp r3, #16 | |
10003134: d000 beq 0x10003138 <$t.74+0x104> @ imm = #0 | |
10003136: 461a mov r2, r3 | |
10003138: 4b6b ldr r3, [pc, #428] @ 0x100032e8 <$d.75+0xc> | |
; self.back = Self::increment(self.back); | |
1000313a: 9d09 ldr r5, [sp, #36] | |
1000313c: 515a str r2, [r3, r5] | |
; ev_queue | |
1000313e: b2c9 uxtb r1, r1 | |
10003140: 0409 lsls r1, r1, #16 | |
10003142: e015 b 0x10003170 <$t.74+0x13c> @ imm = #42 | |
; if self.is_full() { | |
10003144: 9807 ldr r0, [sp, #28] | |
10003146: 5c18 ldrb r0, [r3, r0] | |
10003148: 2800 cmp r0, #0 | |
1000314a: d000 beq 0x1000314e <$t.74+0x11a> @ imm = #0 | |
1000314c: e0b2 b 0x100032b4 <$t.74+0x280> @ imm = #356 | |
1000314e: 9d09 ldr r5, [sp, #36] | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003150: 5958 ldr r0, [r3, r5] | |
10003152: 00c0 lsls r0, r0, #3 | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003154: 1818 adds r0, r3, r0 | |
10003156: 2200 movs r2, #0 | |
10003158: 6502 str r2, [r0, #80] | |
; self.back = Self::increment(self.back); | |
1000315a: 595b ldr r3, [r3, r5] | |
; if i + 1 == N { | |
1000315c: 1c5b adds r3, r3, #1 | |
1000315e: 2b10 cmp r3, #16 | |
10003160: d000 beq 0x10003164 <$t.74+0x130> @ imm = #0 | |
10003162: 461a mov r2, r3 | |
10003164: 4b60 ldr r3, [pc, #384] @ 0x100032e8 <$d.75+0xc> | |
; self.back = Self::increment(self.back); | |
10003166: 9d09 ldr r5, [sp, #36] | |
10003168: 515a str r2, [r3, r5] | |
; ev_queue | |
1000316a: b2c9 uxtb r1, r1 | |
1000316c: 0409 lsls r1, r1, #16 | |
1000316e: 1c49 adds r1, r1, #1 | |
10003170: 64c1 str r1, [r0, #76] | |
10003172: 9806 ldr r0, [sp, #24] | |
10003174: 5818 ldr r0, [r3, r0] | |
10003176: 4290 cmp r0, r2 | |
10003178: d037 beq 0x100031ea <$t.74+0x1b6> @ imm = #110 | |
1000317a: e742 b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-380 | |
; if self.is_full() { | |
1000317c: 9807 ldr r0, [sp, #28] | |
1000317e: 5c18 ldrb r0, [r3, r0] | |
10003180: 2800 cmp r0, #0 | |
10003182: d000 beq 0x10003186 <$t.74+0x152> @ imm = #0 | |
10003184: e096 b 0x100032b4 <$t.74+0x280> @ imm = #300 | |
10003186: b2c8 uxtb r0, r1 | |
10003188: 0400 lsls r0, r0, #16 | |
1000318a: 9005 str r0, [sp, #20] | |
1000318c: 9d09 ldr r5, [sp, #36] | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
1000318e: 5959 ldr r1, [r3, r5] | |
10003190: 00c9 lsls r1, r1, #3 | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003192: 185a adds r2, r3, r1 | |
10003194: 9808 ldr r0, [sp, #32] | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
10003196: 6510 str r0, [r2, #80] | |
; self.back = Self::increment(self.back); | |
10003198: 5959 ldr r1, [r3, r5] | |
; if i + 1 == N { | |
1000319a: 1c4b adds r3, r1, #1 | |
1000319c: 2b10 cmp r3, #16 | |
1000319e: 4601 mov r1, r0 | |
100031a0: d000 beq 0x100031a4 <$t.74+0x170> @ imm = #0 | |
100031a2: 4619 mov r1, r3 | |
100031a4: 4b50 ldr r3, [pc, #320] @ 0x100032e8 <$d.75+0xc> | |
; self.back = Self::increment(self.back); | |
100031a6: 9d09 ldr r5, [sp, #36] | |
100031a8: 5159 str r1, [r3, r5] | |
100031aa: 9805 ldr r0, [sp, #20] | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
100031ac: 64d0 str r0, [r2, #76] | |
; if self.front == self.back { | |
100031ae: 9a06 ldr r2, [sp, #24] | |
100031b0: 589a ldr r2, [r3, r2] | |
100031b2: 428a cmp r2, r1 | |
100031b4: d07b beq 0x100032ae <$t.74+0x27a> @ imm = #246 | |
; if self.is_full() { | |
100031b6: 9a07 ldr r2, [sp, #28] | |
100031b8: 5c9a ldrb r2, [r3, r2] | |
100031ba: 2a00 cmp r2, #0 | |
100031bc: d17a bne 0x100032b4 <$t.74+0x280> @ imm = #244 | |
100031be: 00c9 lsls r1, r1, #3 | |
100031c0: 1859 adds r1, r3, r1 | |
100031c2: 2200 movs r2, #0 | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
100031c4: 650a str r2, [r1, #80] | |
; self.back = Self::increment(self.back); | |
100031c6: 9d09 ldr r5, [sp, #36] | |
100031c8: 595b ldr r3, [r3, r5] | |
; if i + 1 == N { | |
100031ca: 1c5b adds r3, r3, #1 | |
100031cc: 2b10 cmp r3, #16 | |
100031ce: d000 beq 0x100031d2 <$t.74+0x19e> @ imm = #0 | |
100031d0: 461a mov r2, r3 | |
100031d2: 4d45 ldr r5, [pc, #276] @ 0x100032e8 <$d.75+0xc> | |
; self.back = Self::increment(self.back); | |
100031d4: 9b09 ldr r3, [sp, #36] | |
100031d6: 50ea str r2, [r5, r3] | |
100031d8: 2301 movs r3, #1 | |
; ev_queue | |
100031da: 4318 orrs r0, r3 | |
100031dc: 462b mov r3, r5 | |
; *self.buffer.get_unchecked_mut(self.back) = MaybeUninit::new(item); | |
100031de: 64c8 str r0, [r1, #76] | |
; if self.front == self.back { | |
100031e0: 9806 ldr r0, [sp, #24] | |
100031e2: 5828 ldr r0, [r5, r0] | |
100031e4: 4290 cmp r0, r2 | |
100031e6: d000 beq 0x100031ea <$t.74+0x1b6> @ imm = #0 | |
100031e8: e70b b 0x10003002 <neotron_pico_bios::hid_get_event+0x256> @ imm = #-490 | |
100031ea: 2001 movs r0, #1 | |
100031ec: 9907 ldr r1, [sp, #28] | |
100031ee: e707 b 0x10003000 <neotron_pico_bios::hid_get_event+0x254> @ imm = #-498 | |
100031f0: 4b3d ldr r3, [pc, #244] @ 0x100032e8 <$d.75+0xc> | |
; self.front == self.back && !self.full | |
100031f2: 9806 ldr r0, [sp, #24] | |
100031f4: 5818 ldr r0, [r3, r0] | |
100031f6: 9909 ldr r1, [sp, #36] | |
100031f8: 5859 ldr r1, [r3, r1] | |
; if self.is_empty() { | |
100031fa: 4288 cmp r0, r1 | |
100031fc: 9c00 ldr r4, [sp] | |
100031fe: 9d04 ldr r5, [sp, #16] | |
10003200: d103 bne 0x1000320a <$t.74+0x1d6> @ imm = #6 | |
10003202: 9907 ldr r1, [sp, #28] | |
10003204: 5c59 ldrb r1, [r3, r1] | |
; if self.is_empty() { | |
10003206: 2900 cmp r1, #0 | |
10003208: d00e beq 0x10003228 <$t.74+0x1f4> @ imm = #28 | |
1000320a: 2100 movs r1, #0 | |
; self.full = false; | |
1000320c: 9a07 ldr r2, [sp, #28] | |
1000320e: 5499 strb r1, [r3, r2] | |
; if i + 1 == N { | |
10003210: 1c42 adds r2, r0, #1 | |
10003212: 2a10 cmp r2, #16 | |
10003214: d000 beq 0x10003218 <$t.74+0x1e4> @ imm = #0 | |
10003216: 4611 mov r1, r2 | |
; self.front = Self::increment(self.front); | |
10003218: 9a06 ldr r2, [sp, #24] | |
1000321a: 5099 str r1, [r3, r2] | |
1000321c: 00c0 lsls r0, r0, #3 | |
; self.front = Self::increment(self.front); | |
1000321e: 1819 adds r1, r3, r0 | |
10003220: 6cc8 ldr r0, [r1, #76] | |
; Some(unsafe { self.pop_front_unchecked() }) | |
10003222: b2c2 uxtb r2, r0 | |
; if let Some(ev) = hw.event_queue.pop_front() { | |
10003224: 2a03 cmp r2, #3 | |
10003226: d11b bne 0x10003260 <$t.74+0x22c> @ imm = #54 | |
10003228: 2001 movs r0, #1 | |
1000322a: 9b01 ldr r3, [sp, #4] | |
; common::Result::Ok(common::Option::None) | |
1000322c: 7098 strb r0, [r3, #2] | |
1000322e: e029 b 0x10003284 <$t.74+0x250> @ imm = #82 | |
10003230: 6d02 ldr r2, [r0, #80] | |
10003232: 9e01 ldr r6, [sp, #4] | |
; return common::Result::Ok(common::Option::Some(ev)); | |
10003234: 7131 strb r1, [r6, #4] | |
10003236: 2000 movs r0, #0 | |
10003238: 70b0 strb r0, [r6, #2] | |
1000323a: 7030 strb r0, [r6] | |
1000323c: 7232 strb r2, [r6, #8] | |
1000323e: 0e0b lsrs r3, r1, #24 | |
10003240: 71f3 strb r3, [r6, #7] | |
10003242: 0c0b lsrs r3, r1, #16 | |
10003244: 71b3 strb r3, [r6, #6] | |
10003246: 4b28 ldr r3, [pc, #160] @ 0x100032e8 <$d.75+0xc> | |
10003248: 0a09 lsrs r1, r1, #8 | |
1000324a: 7171 strb r1, [r6, #5] | |
1000324c: 0e11 lsrs r1, r2, #24 | |
1000324e: 72f1 strb r1, [r6, #11] | |
10003250: 0c11 lsrs r1, r2, #16 | |
10003252: 72b1 strb r1, [r6, #10] | |
10003254: 0a11 lsrs r1, r2, #8 | |
10003256: 7271 strb r1, [r6, #9] | |
10003258: 6018 str r0, [r3] | |
; if token != LOCK_ALREADY_OWNED { | |
1000325a: 2c02 cmp r4, #2 | |
1000325c: d11a bne 0x10003294 <$t.74+0x260> @ imm = #52 | |
1000325e: e024 b 0x100032aa <$t.74+0x276> @ imm = #72 | |
10003260: 6d09 ldr r1, [r1, #80] | |
10003262: 9b01 ldr r3, [sp, #4] | |
; common::Result::Ok(common::Option::Some(ev)) | |
10003264: 7118 strb r0, [r3, #4] | |
10003266: 2200 movs r2, #0 | |
10003268: 709a strb r2, [r3, #2] | |
1000326a: 7219 strb r1, [r3, #8] | |
1000326c: 0e02 lsrs r2, r0, #24 | |
1000326e: 71da strb r2, [r3, #7] | |
10003270: 0c02 lsrs r2, r0, #16 | |
10003272: 719a strb r2, [r3, #6] | |
10003274: 0a00 lsrs r0, r0, #8 | |
10003276: 7158 strb r0, [r3, #5] | |
10003278: 0e08 lsrs r0, r1, #24 | |
1000327a: 72d8 strb r0, [r3, #11] | |
1000327c: 0c08 lsrs r0, r1, #16 | |
1000327e: 7298 strb r0, [r3, #10] | |
10003280: 0a08 lsrs r0, r1, #8 | |
10003282: 7258 strb r0, [r3, #9] | |
10003284: 2000 movs r0, #0 | |
10003286: 7018 strb r0, [r3] | |
10003288: 4b17 ldr r3, [pc, #92] @ 0x100032e8 <$d.75+0xc> | |
1000328a: 6818 ldr r0, [r3] | |
1000328c: 1c40 adds r0, r0, #1 | |
1000328e: 6018 str r0, [r3] | |
; if token != LOCK_ALREADY_OWNED { | |
10003290: 2c02 cmp r4, #2 | |
10003292: d00a beq 0x100032aa <$t.74+0x276> @ imm = #20 | |
10003294: 2000 movs r0, #0 | |
10003296: 4912 ldr r1, [pc, #72] @ 0x100032e0 <$d.75+0x4> | |
10003298: 7408 strb r0, [r1, #16] | |
1000329a: 4812 ldr r0, [pc, #72] @ 0x100032e4 <$d.75+0x8> | |
1000329c: 6005 str r5, [r0] | |
; if token != 0 { | |
1000329e: 2c00 cmp r4, #0 | |
100032a0: d003 beq 0x100032aa <$t.74+0x276> @ imm = #6 | |
; $func($($args),*) | |
100032a2: f003 fbb3 bl 0x10006a0c <__cpsie> @ imm = #14182 | |
; } | |
100032a6: b00f add sp, #60 | |
100032a8: bdf0 pop {r4, r5, r6, r7, pc} | |
100032aa: b00f add sp, #60 | |
100032ac: bdf0 pop {r4, r5, r6, r7, pc} | |
100032ae: 2001 movs r0, #1 | |
; self.full = true; | |
100032b0: 9907 ldr r1, [sp, #28] | |
100032b2: 5458 strb r0, [r3, r1] | |
100032b4: 4810 ldr r0, [pc, #64] @ 0x100032f8 <$d.75+0x1c> | |
100032b6: 212b movs r1, #43 | |
100032b8: aa0c add r2, sp, #48 | |
100032ba: 4b10 ldr r3, [pc, #64] @ 0x100032fc <$d.75+0x20> | |
100032bc: f001 fc26 bl 0x10004b0c <core::result::unwrap_failed> @ imm = #6220 | |
100032c0: defe trap | |
100032c2: 480a ldr r0, [pc, #40] @ 0x100032ec <$d.75+0x10> | |
100032c4: 2110 movs r1, #16 | |
100032c6: aa0c add r2, sp, #48 | |
100032c8: 4b09 ldr r3, [pc, #36] @ 0x100032f0 <$d.75+0x14> | |
100032ca: f001 fc1f bl 0x10004b0c <core::result::unwrap_failed> @ imm = #6206 | |
100032ce: defe trap | |
100032d0: 480b ldr r0, [pc, #44] @ 0x10003300 <$d.75+0x24> | |
100032d2: 212b movs r1, #43 | |
100032d4: f001 fb56 bl 0x10004984 <core::panicking::panic> @ imm = #5804 | |
100032d8: defe trap | |
100032da: 46c0 mov r8, r8 | |
100032dc <$d.75>: | |
100032dc: 14 00 00 d0 .word 0xd0000014 | |
100032e0: 18 ed 03 20 .word 0x2003ed18 | |
100032e4: 7c 01 00 d0 .word 0xd000017c | |
100032e8: f0 c5 03 20 .word 0x2003c5f0 | |
100032ec: 24 72 00 10 .word 0x10007224 | |
100032f0: 34 72 00 10 .word 0x10007234 | |
100032f4: ca 77 00 10 .word 0x100077ca | |
100032f8: be 71 00 10 .word 0x100071be | |
100032fc: 00 75 00 10 .word 0x10007500 | |
10003300: d4 74 00 10 .word 0x100074d4 | |
10003304 <neotron_pico_bios::hid_set_leds>: | |
; pub extern "C" fn hid_set_leds(_leds: common::hid::KeyboardLeds) -> common::Result<()> { | |
10003304: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
10003306: 7001 strb r1, [r0] | |
10003308: 7081 strb r1, [r0, #2] | |
; } | |
1000330a: 4770 bx lr | |
1000330c <neotron_pico_bios::video_wait_for_line>: | |
; pub extern "C" fn video_wait_for_line(line: u16) { | |
1000330c: b580 push {r7, lr} | |
1000330e: af00 add r7, sp, #0 | |
; unsafe { VIDEO_MODE } | |
10003310: 491f ldr r1, [pc, #124] @ 0x10003390 <$d.78> | |
10003312: 784b ldrb r3, [r1, #1] | |
10003314: b25a sxtb r2, r3 | |
; match (self.0 >> Self::TIMING_SHIFT) & 0b111 { | |
10003316: 065b lsls r3, r3, #25 | |
10003318: 0f5b lsrs r3, r3, #29 | |
1000331a: d00a beq 0x10003332 <neotron_pico_bios::video_wait_for_line+0x26> @ imm = #20 | |
1000331c: 2b01 cmp r3, #1 | |
1000331e: d010 beq 0x10003342 <neotron_pico_bios::video_wait_for_line+0x36> @ imm = #32 | |
10003320: 2b02 cmp r3, #2 | |
10003322: d12f bne 0x10003384 <neotron_pico_bios::video_wait_for_line+0x78> @ imm = #94 | |
10003324: 234b movs r3, #75 | |
10003326: 2a00 cmp r2, #0 | |
10003328: d41b bmi 0x10003362 <neotron_pico_bios::video_wait_for_line+0x56> @ imm = #54 | |
1000332a: 00da lsls r2, r3, #3 | |
1000332c: 4290 cmp r0, r2 | |
1000332e: d31c blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #56 | |
10003330: e01a b 0x10003368 <neotron_pico_bios::video_wait_for_line+0x5c> @ imm = #52 | |
10003332: 2a00 cmp r2, #0 | |
10003334: d40d bmi 0x10003352 <neotron_pico_bios::video_wait_for_line+0x46> @ imm = #26 | |
10003336: 224b movs r2, #75 | |
10003338: 0092 lsls r2, r2, #2 | |
1000333a: 32b4 adds r2, #180 | |
1000333c: 4290 cmp r0, r2 | |
1000333e: d314 blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #40 | |
10003340: e012 b 0x10003368 <neotron_pico_bios::video_wait_for_line+0x5c> @ imm = #36 | |
10003342: 2a00 cmp r2, #0 | |
10003344: d409 bmi 0x1000335a <neotron_pico_bios::video_wait_for_line+0x4e> @ imm = #18 | |
10003346: 224b movs r2, #75 | |
10003348: 0092 lsls r2, r2, #2 | |
1000334a: 3264 adds r2, #100 | |
1000334c: 4290 cmp r0, r2 | |
1000334e: d30c blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #24 | |
10003350: e00a b 0x10003368 <neotron_pico_bios::video_wait_for_line+0x5c> @ imm = #20 | |
10003352: 22f0 movs r2, #240 | |
10003354: 4290 cmp r0, r2 | |
10003356: d308 blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #16 | |
10003358: e006 b 0x10003368 <neotron_pico_bios::video_wait_for_line+0x5c> @ imm = #12 | |
1000335a: 22c8 movs r2, #200 | |
1000335c: 4290 cmp r0, r2 | |
1000335e: d304 blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #8 | |
10003360: e002 b 0x10003368 <neotron_pico_bios::video_wait_for_line+0x5c> @ imm = #4 | |
10003362: 009a lsls r2, r3, #2 | |
10003364: 4290 cmp r0, r2 | |
10003366: d300 blo 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #0 | |
10003368: 4610 mov r0, r2 | |
1000336a: 8a8a ldrh r2, [r1, #20] | |
; if current_line == desired_line { | |
1000336c: 4282 cmp r2, r0 | |
1000336e: d008 beq 0x10003382 <neotron_pico_bios::video_wait_for_line+0x76> @ imm = #16 | |
10003370: 8a8a ldrh r2, [r1, #20] | |
; if current_line == desired_line { | |
10003372: 4282 cmp r2, r0 | |
10003374: d005 beq 0x10003382 <neotron_pico_bios::video_wait_for_line+0x76> @ imm = #10 | |
10003376: 8a8a ldrh r2, [r1, #20] | |
; if current_line == desired_line { | |
10003378: 4282 cmp r2, r0 | |
1000337a: d002 beq 0x10003382 <neotron_pico_bios::video_wait_for_line+0x76> @ imm = #4 | |
1000337c: 8a8a ldrh r2, [r1, #20] | |
; if current_line == desired_line { | |
1000337e: 4282 cmp r2, r0 | |
10003380: d1f3 bne 0x1000336a <neotron_pico_bios::video_wait_for_line+0x5e> @ imm = #-26 | |
; } | |
10003382: bd80 pop {r7, pc} | |
; _ => unreachable!(), | |
10003384: 4803 ldr r0, [pc, #12] @ 0x10003394 <$d.78+0x4> | |
10003386: 2128 movs r1, #40 | |
; _ => unreachable!(), | |
10003388: f001 fafc bl 0x10004984 <core::panicking::panic> @ imm = #5624 | |
1000338c: defe trap | |
1000338e: 46c0 mov r8, r8 | |
10003390 <$d.78>: | |
10003390: 18 ed 03 20 .word 0x2003ed18 | |
10003394: ca 78 00 10 .word 0x100078ca | |
10003398 <neotron_pico_bios::video_get_palette>: | |
; match index { | |
10003398: 2900 cmp r1, #0 | |
1000339a: d006 beq 0x100033aa <neotron_pico_bios::video_get_palette+0x12> @ imm = #12 | |
1000339c: 2901 cmp r1, #1 | |
1000339e: d109 bne 0x100033b4 <neotron_pico_bios::video_get_palette+0x1c> @ imm = #18 | |
100033a0: 4906 ldr r1, [pc, #24] @ 0x100033bc <$d.80> | |
100033a2: 6041 str r1, [r0, #4] | |
100033a4: 2100 movs r1, #0 | |
100033a6: 7001 strb r1, [r0] | |
; } | |
100033a8: 4770 bx lr | |
100033aa: 2180 movs r1, #128 | |
100033ac: 6041 str r1, [r0, #4] | |
100033ae: 2100 movs r1, #0 | |
100033b0: 7001 strb r1, [r0] | |
; } | |
100033b2: 4770 bx lr | |
100033b4: 2101 movs r1, #1 | |
100033b6: 7001 strb r1, [r0] | |
; } | |
100033b8: 4770 bx lr | |
100033ba: 46c0 mov r8, r8 | |
100033bc <$d.80>: | |
100033bc: 00 f0 f0 00 .word 0x00f0f000 | |
100033c0 <neotron_pico_bios::video_set_palette>: | |
; } | |
100033c0: 4770 bx lr | |
100033c2 <neotron_pico_bios::video_set_whole_palette>: | |
; } | |
100033c2: 4770 bx lr | |
100033c4 <neotron_pico_bios::i2c_bus_get_info>: | |
; extern "C" fn i2c_bus_get_info(_i2c_bus: u8) -> common::Option<common::i2c::BusInfo> { | |
100033c4: b580 push {r7, lr} | |
100033c6: af00 add r7, sp, #0 | |
; unimplemented!(); | |
100033c8: 4802 ldr r0, [pc, #8] @ 0x100033d4 <$d.84> | |
100033ca: 210f movs r1, #15 | |
100033cc: f001 fada bl 0x10004984 <core::panicking::panic> @ imm = #5556 | |
100033d0: defe trap | |
100033d2: 46c0 mov r8, r8 | |
100033d4 <$d.84>: | |
100033d4: 10 75 00 10 .word 0x10007510 | |
100033d8 <neotron_pico_bios::i2c_write_read>: | |
; extern "C" fn i2c_write_read( | |
100033d8: b580 push {r7, lr} | |
100033da: af00 add r7, sp, #0 | |
; unimplemented!(); | |
100033dc: 4802 ldr r0, [pc, #8] @ 0x100033e8 <$d.86> | |
100033de: 210f movs r1, #15 | |
100033e0: f001 fad0 bl 0x10004984 <core::panicking::panic> @ imm = #5536 | |
100033e4: defe trap | |
100033e6: 46c0 mov r8, r8 | |
100033e8 <$d.86>: | |
100033e8: 10 75 00 10 .word 0x10007510 | |
100033ec <neotron_pico_bios::audio_mixer_channel_set_level>: | |
; extern "C" fn audio_mixer_channel_set_level(_audio_mixer_id: u8, _level: u8) -> common::Result<()> { | |
100033ec: b580 push {r7, lr} | |
100033ee: af00 add r7, sp, #0 | |
; unimplemented!(); | |
100033f0: 4802 ldr r0, [pc, #8] @ 0x100033fc <$d.88> | |
100033f2: 210f movs r1, #15 | |
100033f4: f001 fac6 bl 0x10004984 <core::panicking::panic> @ imm = #5516 | |
100033f8: defe trap | |
100033fa: 46c0 mov r8, r8 | |
100033fc <$d.88>: | |
100033fc: 10 75 00 10 .word 0x10007510 | |
10003400 <neotron_pico_bios::audio_input_get_config>: | |
; extern "C" fn audio_input_get_config() -> common::Result<common::audio::Config> { | |
10003400: b580 push {r7, lr} | |
10003402: af00 add r7, sp, #0 | |
; unimplemented!(); | |
10003404: 4802 ldr r0, [pc, #8] @ 0x10003410 <$d.90> | |
10003406: 210f movs r1, #15 | |
10003408: f001 fabc bl 0x10004984 <core::panicking::panic> @ imm = #5496 | |
1000340c: defe trap | |
1000340e: 46c0 mov r8, r8 | |
10003410 <$d.90>: | |
10003410: 10 75 00 10 .word 0x10007510 | |
10003414 <neotron_pico_bios::audio_input_data>: | |
; extern "C" fn audio_input_data(_samples: common::ApiBuffer) -> common::Result<usize> { | |
10003414: b580 push {r7, lr} | |
10003416: af00 add r7, sp, #0 | |
; unimplemented!(); | |
10003418: 4802 ldr r0, [pc, #8] @ 0x10003424 <$d.92> | |
1000341a: 210f movs r1, #15 | |
1000341c: f001 fab2 bl 0x10004984 <core::panicking::panic> @ imm = #5476 | |
10003420: defe trap | |
10003422: 46c0 mov r8, r8 | |
10003424 <$d.92>: | |
10003424: 10 75 00 10 .word 0x10007510 | |
10003428 <neotron_pico_bios::audio_input_get_count>: | |
; extern "C" fn audio_input_get_count() -> common::Result<usize> { | |
10003428: b580 push {r7, lr} | |
1000342a: af00 add r7, sp, #0 | |
; unimplemented!(); | |
1000342c: 4802 ldr r0, [pc, #8] @ 0x10003438 <$d.94> | |
1000342e: 210f movs r1, #15 | |
10003430: f001 faa8 bl 0x10004984 <core::panicking::panic> @ imm = #5456 | |
10003434: defe trap | |
10003436: 46c0 mov r8, r8 | |
10003438 <$d.94>: | |
10003438: 10 75 00 10 .word 0x10007510 | |
1000343c <neotron_pico_bios::bus_select>: | |
; extern "C" fn bus_select(_periperal_id: common::Option<u8>) { | |
1000343c: b580 push {r7, lr} | |
1000343e: af00 add r7, sp, #0 | |
; unimplemented!(); | |
10003440: 4802 ldr r0, [pc, #8] @ 0x1000344c <$d.96> | |
10003442: 210f movs r1, #15 | |
10003444: f001 fa9e bl 0x10004984 <core::panicking::panic> @ imm = #5436 | |
10003448: defe trap | |
1000344a: 46c0 mov r8, r8 | |
1000344c <$d.96>: | |
1000344c: 10 75 00 10 .word 0x10007510 | |
10003450 <neotron_pico_bios::bus_get_info>: | |
; extern "C" fn bus_get_info(_periperal_id: u8) -> common::Option<common::bus::PeripheralInfo> { | |
10003450: b580 push {r7, lr} | |
10003452: af00 add r7, sp, #0 | |
; unimplemented!(); | |
10003454: 4802 ldr r0, [pc, #8] @ 0x10003460 <$d.98> | |
10003456: 210f movs r1, #15 | |
10003458: f001 fa94 bl 0x10004984 <core::panicking::panic> @ imm = #5416 | |
1000345c: defe trap | |
1000345e: 46c0 mov r8, r8 | |
10003460 <$d.98>: | |
10003460: 10 75 00 10 .word 0x10007510 | |
10003464 <neotron_pico_bios::bus_write_read>: | |
; extern "C" fn bus_write_read( | |
10003464: b580 push {r7, lr} | |
10003466: af00 add r7, sp, #0 | |
; unimplemented!(); | |
10003468: 4802 ldr r0, [pc, #8] @ 0x10003474 <$d.100> | |
1000346a: 210f movs r1, #15 | |
1000346c: f001 fa8a bl 0x10004984 <core::panicking::panic> @ imm = #5396 | |
10003470: defe trap | |
10003472: 46c0 mov r8, r8 | |
10003474 <$d.100>: | |
10003474: 10 75 00 10 .word 0x10007510 | |
10003478 <neotron_pico_bios::bus_exchange>: | |
; extern "C" fn bus_exchange(_buffer: common::ApiBuffer) -> common::Result<()> { | |
10003478: b580 push {r7, lr} | |
1000347a: af00 add r7, sp, #0 | |
; unimplemented!(); | |
1000347c: 4802 ldr r0, [pc, #8] @ 0x10003488 <$d.102> | |
1000347e: 210f movs r1, #15 | |
10003480: f001 fa80 bl 0x10004984 <core::panicking::panic> @ imm = #5376 | |
10003484: defe trap | |
10003486: 46c0 mov r8, r8 | |
10003488 <$d.102>: | |
10003488: 10 75 00 10 .word 0x10007510 | |
1000348c <neotron_pico_bios::bus_interrupt_status>: | |
; extern "C" fn bus_interrupt_status() -> u32 { | |
1000348c: 2000 movs r0, #0 | |
; } | |
1000348e: 4770 bx lr | |
10003490 <neotron_pico_bios::block_dev_get_info>: | |
; pub extern "C" fn block_dev_get_info(device: u8) -> common::Option<common::block_dev::DeviceInfo> { | |
10003490: b5d0 push {r4, r6, r7, lr} | |
10003492: af02 add r7, sp, #8 | |
; match device { | |
10003494: 2900 cmp r1, #0 | |
10003496: d002 beq 0x1000349e <neotron_pico_bios::block_dev_get_info+0xe> @ imm = #4 | |
10003498: 2101 movs r1, #1 | |
1000349a: 7001 strb r1, [r0] | |
; } | |
1000349c: bdd0 pop {r4, r6, r7, pc} | |
1000349e: 4602 mov r2, r0 | |
100034a0: 3220 adds r2, #32 | |
100034a2: 2100 movs r1, #0 | |
; common::Option::Some(common::block_dev::DeviceInfo { | |
100034a4: 7401 strb r1, [r0, #16] | |
100034a6: 2307 movs r3, #7 | |
100034a8: 4c05 ldr r4, [pc, #20] @ 0x100034c0 <$d.105> | |
100034aa: 6084 str r4, [r0, #8] | |
100034ac: 60c3 str r3, [r0, #12] | |
100034ae: 4b05 ldr r3, [pc, #20] @ 0x100034c4 <$d.105+0x4> | |
100034b0: 6013 str r3, [r2] | |
100034b2: 2201 movs r2, #1 | |
100034b4: 0252 lsls r2, r2, #9 | |
100034b6: 6142 str r2, [r0, #20] | |
100034b8: 6181 str r1, [r0, #24] | |
100034ba: 61c1 str r1, [r0, #28] | |
100034bc: 7001 strb r1, [r0] | |
; } | |
100034be: bdd0 pop {r4, r6, r7, pc} | |
100034c0 <$d.105>: | |
100034c0: 1f 75 00 10 .word 0x1000751f | |
100034c4: 00 01 01 00 .word 0x00010100 | |
100034c8 <neotron_pico_bios::block_read>: | |
; pub extern "C" fn block_read( | |
100034c8: 2101 movs r1, #1 | |
; common::Result::Err(common::Error::Unimplemented) | |
100034ca: 7001 strb r1, [r0] | |
100034cc: 7081 strb r1, [r0, #2] | |
; } | |
100034ce: 4770 bx lr | |
100034d0 <neotron_pico_bios::block_dev_eject>: | |
; extern "C" fn block_dev_eject(_dev_id: u8) -> common::Result<()> { | |
100034d0: 2100 movs r1, #0 | |
; common::Result::Ok(()) | |
100034d2: 7001 strb r1, [r0] | |
; } | |
100034d4: 4770 bx lr | |
100034d6: d4d4 bmi 0x10003482 <neotron_pico_bios::bus_exchange+0xa> @ imm = #-88 | |
100034d8 <neotron_pico_bios::power_idle>: | |
; extern "C" fn power_idle() { | |
100034d8: b580 push {r7, lr} | |
100034da: af00 add r7, sp, #0 | |
100034dc: 4803 ldr r0, [pc, #12] @ 0x100034ec <$d.109> | |
100034de: 7940 ldrb r0, [r0, #5] | |
; if !INTERRUPT_PENDING.load(Ordering::Relaxed) { | |
100034e0: 2800 cmp r0, #0 | |
100034e2: d000 beq 0x100034e6 <neotron_pico_bios::power_idle+0xe> @ imm = #0 | |
; } | |
100034e4: bd80 pop {r7, pc} | |
; $func($($args),*) | |
100034e6: f003 faa1 bl 0x10006a2c <__wfe> @ imm = #13634 | |
; } | |
100034ea: bd80 pop {r7, pc} | |
100034ec <$d.109>: | |
100034ec: 18 ed 03 20 .word 0x2003ed18 | |
100034f0 <neotron_pico_bios::time_ticks_get>: | |
; extern "C" fn time_ticks_get() -> common::Ticks { | |
100034f0: 2100 movs r1, #0 | |
; common::Ticks(0) | |
100034f2: 6001 str r1, [r0] | |
100034f4: 6041 str r1, [r0, #4] | |
; } | |
100034f6: 4770 bx lr | |
100034f8 <neotron_pico_bios::time_ticks_per_second>: | |
; extern "C" fn time_ticks_per_second() -> common::Ticks { | |
100034f8: 2100 movs r1, #0 | |
100034fa: 227d movs r2, #125 | |
100034fc: 00d2 lsls r2, r2, #3 | |
; common::Ticks(1000) | |
100034fe: 6002 str r2, [r0] | |
10003500: 6041 str r1, [r0, #4] | |
; } | |
10003502: 4770 bx lr | |
10003504 <main>: | |
; #[entry] | |
10003504: b580 push {r7, lr} | |
10003506: af00 add r7, sp, #0 | |
10003508: f000 f802 bl 0x10003510 <neotron_pico_bios::__cortex_m_rt_main> @ imm = #4 | |
1000350c: defe trap | |
1000350e: d4d4 bmi 0x100034ba <neotron_pico_bios::block_dev_get_info+0x2a> @ imm = #-88 | |
10003510 <neotron_pico_bios::__cortex_m_rt_main>: | |
; fn main() -> ! { | |
10003510: b580 push {r7, lr} | |
10003512: af00 add r7, sp, #0 | |
10003514: b0fa sub sp, #488 | |
; $func($($args),*) | |
10003516: f003 fa77 bl 0x10006a08 <__cpsid> @ imm = #13550 | |
1000351a: f003 fa80 bl 0x10006a1e <__primask_r> @ imm = #13568 | |
1000351e: 4604 mov r4, r0 | |
10003520: 2001 movs r0, #1 | |
10003522: 9008 str r0, [sp, #32] | |
; if r & (1 << 0) == (1 << 0) { | |
10003524: 4004 ands r4, r0 | |
10003526: a844 add r0, sp, #272 | |
10003528: 9007 str r0, [sp, #28] | |
1000352a: ae44 add r6, sp, #272 | |
; $func($($args),*) | |
1000352c: f003 fa6c bl 0x10006a08 <__cpsid> @ imm = #13528 | |
; if unsafe { DEVICE_PERIPHERALS } { | |
10003530: 4899 ldr r0, [pc, #612] @ 0x10003798 <$d.114> | |
10003532: 7c45 ldrb r5, [r0, #17] | |
10003534: 2d00 cmp r5, #0 | |
10003536: d004 beq 0x10003542 <neotron_pico_bios::__cortex_m_rt_main+0x32> @ imm = #8 | |
; if primask.is_active() { | |
10003538: 2c00 cmp r4, #0 | |
1000353a: d007 beq 0x1000354c <neotron_pico_bios::__cortex_m_rt_main+0x3c> @ imm = #14 | |
1000353c: 2d00 cmp r5, #0 | |
1000353e: d009 beq 0x10003554 <neotron_pico_bios::__cortex_m_rt_main+0x44> @ imm = #18 | |
10003540: e017 b 0x10003572 <neotron_pico_bios::__cortex_m_rt_main+0x62> @ imm = #46 | |
; DEVICE_PERIPHERALS = true; | |
10003542: 9808 ldr r0, [sp, #32] | |
10003544: 4994 ldr r1, [pc, #592] @ 0x10003798 <$d.114> | |
10003546: 7448 strb r0, [r1, #17] | |
; if primask.is_active() { | |
10003548: 2c00 cmp r4, #0 | |
1000354a: d1f7 bne 0x1000353c <neotron_pico_bios::__cortex_m_rt_main+0x2c> @ imm = #-18 | |
; $func($($args),*) | |
1000354c: f003 fa5e bl 0x10006a0c <__cpsie> @ imm = #13500 | |
10003550: 2d00 cmp r5, #0 | |
10003552: d10e bne 0x10003572 <neotron_pico_bios::__cortex_m_rt_main+0x62> @ imm = #28 | |
; $func($($args),*) | |
10003554: f003 fa63 bl 0x10006a1e <__primask_r> @ imm = #13510 | |
10003558: 4604 mov r4, r0 | |
; if r & (1 << 0) == (1 << 0) { | |
1000355a: 9808 ldr r0, [sp, #32] | |
1000355c: 4004 ands r4, r0 | |
; $func($($args),*) | |
1000355e: f003 fa53 bl 0x10006a08 <__cpsid> @ imm = #13478 | |
; if unsafe { TAKEN } { | |
10003562: 488d ldr r0, [pc, #564] @ 0x10003798 <$d.114> | |
10003564: 7a85 ldrb r5, [r0, #10] | |
10003566: 2d00 cmp r5, #0 | |
10003568: d008 beq 0x1000357c <neotron_pico_bios::__cortex_m_rt_main+0x6c> @ imm = #16 | |
; if primask.is_active() { | |
1000356a: 2c00 cmp r4, #0 | |
1000356c: d00b beq 0x10003586 <neotron_pico_bios::__cortex_m_rt_main+0x76> @ imm = #22 | |
1000356e: 2d00 cmp r5, #0 | |
10003570: d00d beq 0x1000358e <neotron_pico_bios::__cortex_m_rt_main+0x7e> @ imm = #26 | |
10003572: 488a ldr r0, [pc, #552] @ 0x1000379c <$d.114+0x4> | |
10003574: 212b movs r1, #43 | |
10003576: f001 fa05 bl 0x10004984 <core::panicking::panic> @ imm = #5130 | |
1000357a: defe trap | |
; TAKEN = true; | |
1000357c: 9808 ldr r0, [sp, #32] | |
1000357e: 4986 ldr r1, [pc, #536] @ 0x10003798 <$d.114> | |
10003580: 7288 strb r0, [r1, #10] | |
; if primask.is_active() { | |
10003582: 2c00 cmp r4, #0 | |
10003584: d1f3 bne 0x1000356e <neotron_pico_bios::__cortex_m_rt_main+0x5e> @ imm = #-26 | |
; $func($($args),*) | |
10003586: f003 fa41 bl 0x10006a0c <__cpsie> @ imm = #13442 | |
1000358a: 2d00 cmp r5, #0 | |
1000358c: d1f1 bne 0x10003572 <neotron_pico_bios::__cortex_m_rt_main+0x62> @ imm = #-30 | |
1000358e: 9807 ldr r0, [sp, #28] | |
10003590: 30d4 adds r0, #212 | |
10003592: 9007 str r0, [sp, #28] | |
10003594: 36d4 adds r6, #212 | |
10003596: 9604 str r6, [sp, #16] | |
10003598: 4d81 ldr r5, [pc, #516] @ 0x100037a0 <$d.114+0x8> | |
1000359a: 462e mov r6, r5 | |
1000359c: 3e08 subs r6, #8 | |
1000359e: 6830 ldr r0, [r6] | |
100035a0: 2404 movs r4, #4 | |
; self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); | |
100035a2: 4320 orrs r0, r4 | |
100035a4: 6030 str r0, [r6] | |
; $func($($args),*) | |
100035a6: f003 fa38 bl 0x10006a1a <__nop> @ imm = #13424 | |
100035aa: 6830 ldr r0, [r6] | |
100035ac: 9403 str r4, [sp, #12] | |
; self.w.bits = (self.w.bits & !(0x01 << 2)) | ((value as u32 & 0x01) << 2); | |
100035ae: 43a0 bics r0, r4 | |
100035b0: 9605 str r6, [sp, #20] | |
100035b2: 6030 str r0, [r6] | |
100035b4: 6828 ldr r0, [r5] | |
; while pp.RESETS.reset_done.read().dma().bit_is_clear() {} | |
100035b6: 0740 lsls r0, r0, #29 | |
100035b8: d408 bmi 0x100035cc <neotron_pico_bios::__cortex_m_rt_main+0xbc> @ imm = #16 | |
100035ba: 6828 ldr r0, [r5] | |
; while pp.RESETS.reset_done.read().dma().bit_is_clear() {} | |
100035bc: 0740 lsls r0, r0, #29 | |
100035be: d405 bmi 0x100035cc <neotron_pico_bios::__cortex_m_rt_main+0xbc> @ imm = #10 | |
100035c0: 6828 ldr r0, [r5] | |
; while pp.RESETS.reset_done.read().dma().bit_is_clear() {} | |
100035c2: 0740 lsls r0, r0, #29 | |
100035c4: d402 bmi 0x100035cc <neotron_pico_bios::__cortex_m_rt_main+0xbc> @ imm = #4 | |
100035c6: 6828 ldr r0, [r5] | |
; while pp.RESETS.reset_done.read().dma().bit_is_clear() {} | |
100035c8: 0740 lsls r0, r0, #29 | |
100035ca: d5f3 bpl 0x100035b4 <neotron_pico_bios::__cortex_m_rt_main+0xa4> @ imm = #-26 | |
100035cc: 4875 ldr r0, [pc, #468] @ 0x100037a4 <$d.114+0xc> | |
100035ce: 2100 movs r1, #0 | |
100035d0: 9106 str r1, [sp, #24] | |
100035d2: 6001 str r1, [r0] | |
100035d4: 2219 movs r2, #25 | |
100035d6: 4974 ldr r1, [pc, #464] @ 0x100037a8 <$d.114+0x10> | |
100035d8: e00c b 0x100035f4 <neotron_pico_bios::__cortex_m_rt_main+0xe4> @ imm = #24 | |
100035da: 201f movs r0, #31 | |
100035dc: 4004 ands r4, r0 | |
100035de: 4033 ands r3, r6 | |
100035e0: 01a0 lsls r0, r4, #6 | |
100035e2: 18c0 adds r0, r0, r3 | |
100035e4: 2111 movs r1, #17 | |
100035e6: 0409 lsls r1, r1, #16 | |
100035e8: 4288 cmp r0, r1 | |
100035ea: 496f ldr r1, [pc, #444] @ 0x100037a8 <$d.114+0x10> | |
100035ec: d028 beq 0x10003640 <neotron_pico_bios::__cortex_m_rt_main+0x130> @ imm = #80 | |
100035ee: 1a52 subs r2, r2, r1 | |
100035f0: 2800 cmp r0, #0 | |
100035f2: d125 bne 0x10003640 <neotron_pico_bios::__cortex_m_rt_main+0x130> @ imm = #74 | |
100035f4: 2a01 cmp r2, #1 | |
100035f6: d023 beq 0x10003640 <neotron_pico_bios::__cortex_m_rt_main+0x130> @ imm = #70 | |
100035f8: 188d adds r5, r1, r2 | |
100035fa: 1e6a subs r2, r5, #1 | |
100035fc: 7810 ldrb r0, [r2] | |
100035fe: b243 sxtb r3, r0 | |
10003600: 2b00 cmp r3, #0 | |
10003602: d5f4 bpl 0x100035ee <neotron_pico_bios::__cortex_m_rt_main+0xde> @ imm = #-24 | |
10003604: 1eaa subs r2, r5, #2 | |
10003606: 7814 ldrb r4, [r2] | |
10003608: b260 sxtb r0, r4 | |
1000360a: 263f movs r6, #63 | |
1000360c: 43f1 mvns r1, r6 | |
1000360e: 4288 cmp r0, r1 | |
10003610: dae3 bge 0x100035da <neotron_pico_bios::__cortex_m_rt_main+0xca> @ imm = #-58 | |
10003612: 1eea subs r2, r5, #3 | |
10003614: 7814 ldrb r4, [r2] | |
10003616: 9409 str r4, [sp, #36] | |
10003618: b264 sxtb r4, r4 | |
1000361a: 940a str r4, [sp, #40] | |
1000361c: 428c cmp r4, r1 | |
1000361e: da07 bge 0x10003630 <neotron_pico_bios::__cortex_m_rt_main+0x120> @ imm = #14 | |
10003620: 9c0a ldr r4, [sp, #40] | |
10003622: 4034 ands r4, r6 | |
10003624: 1f2a subs r2, r5, #4 | |
10003626: 7811 ldrb r1, [r2] | |
10003628: 0749 lsls r1, r1, #29 | |
1000362a: 0dc9 lsrs r1, r1, #23 | |
1000362c: 1909 adds r1, r1, r4 | |
1000362e: e003 b 0x10003638 <neotron_pico_bios::__cortex_m_rt_main+0x128> @ imm = #6 | |
10003630: 210f movs r1, #15 | |
10003632: 9c09 ldr r4, [sp, #36] | |
10003634: 400c ands r4, r1 | |
10003636: 4621 mov r1, r4 | |
10003638: 4030 ands r0, r6 | |
1000363a: 0189 lsls r1, r1, #6 | |
1000363c: 180c adds r4, r1, r0 | |
1000363e: e7ce b 0x100035de <neotron_pico_bios::__cortex_m_rt_main+0xce> @ imm = #-100 | |
10003640: 485a ldr r0, [pc, #360] @ 0x100037ac <$d.114+0x14> | |
10003642: 1f01 subs r1, r0, #4 | |
10003644: 2255 movs r2, #85 | |
10003646: 0152 lsls r2, r2, #5 | |
10003648: 600a str r2, [r1] | |
1000364a: 222e movs r2, #46 | |
1000364c: 6082 str r2, [r0, #8] | |
1000364e: 4a58 ldr r2, [pc, #352] @ 0x100037b0 <$d.114+0x18> | |
10003650: 600a str r2, [r1] | |
10003652: 6801 ldr r1, [r0] | |
; let stable_xosc_token = nb::block!(initialized_xosc.await_stabilization()).unwrap(); | |
10003654: 2900 cmp r1, #0 | |
10003656: d408 bmi 0x1000366a <neotron_pico_bios::__cortex_m_rt_main+0x15a> @ imm = #16 | |
10003658: 6801 ldr r1, [r0] | |
; let stable_xosc_token = nb::block!(initialized_xosc.await_stabilization()).unwrap(); | |
1000365a: 2900 cmp r1, #0 | |
1000365c: d405 bmi 0x1000366a <neotron_pico_bios::__cortex_m_rt_main+0x15a> @ imm = #10 | |
1000365e: 6801 ldr r1, [r0] | |
; let stable_xosc_token = nb::block!(initialized_xosc.await_stabilization()).unwrap(); | |
10003660: 2900 cmp r1, #0 | |
10003662: d402 bmi 0x1000366a <neotron_pico_bios::__cortex_m_rt_main+0x15a> @ imm = #4 | |
10003664: 6801 ldr r1, [r0] | |
; let stable_xosc_token = nb::block!(initialized_xosc.await_stabilization()).unwrap(); | |
10003666: 2900 cmp r1, #0 | |
10003668: d5f3 bpl 0x10003652 <neotron_pico_bios::__cortex_m_rt_main+0x142> @ imm = #-26 | |
1000366a: 2083 movs r0, #131 | |
1000366c: 0080 lsls r0, r0, #2 | |
1000366e: 4951 ldr r1, [pc, #324] @ 0x100037b4 <$d.114+0x1c> | |
10003670: 6008 str r0, [r1] | |
10003672: 4e51 ldr r6, [pc, #324] @ 0x100037b8 <$d.114+0x20> | |
10003674: 9806 ldr r0, [sp, #24] | |
10003676: 63f0 str r0, [r6, #60] | |
; ClocksManager { | |
10003678: 900b str r0, [sp, #44] | |
1000367a: 900c str r0, [sp, #48] | |
1000367c: 900d str r0, [sp, #52] | |
1000367e: 900e str r0, [sp, #56] | |
10003680: 9c08 ldr r4, [sp, #32] | |
10003682: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10003684: 43a0 bics r0, r4 | |
10003686: 6030 str r0, [r6] | |
10003688: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
1000368a: 2801 cmp r0, #1 | |
1000368c: d024 beq 0x100036d8 <neotron_pico_bios::__cortex_m_rt_main+0x1c8> @ imm = #72 | |
1000368e: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10003690: 43a0 bics r0, r4 | |
10003692: 6030 str r0, [r6] | |
10003694: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
10003696: 2801 cmp r0, #1 | |
10003698: d01e beq 0x100036d8 <neotron_pico_bios::__cortex_m_rt_main+0x1c8> @ imm = #60 | |
1000369a: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
1000369c: 43a0 bics r0, r4 | |
1000369e: 6030 str r0, [r6] | |
100036a0: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
100036a2: 2801 cmp r0, #1 | |
100036a4: d018 beq 0x100036d8 <neotron_pico_bios::__cortex_m_rt_main+0x1c8> @ imm = #48 | |
100036a6: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100036a8: 43a0 bics r0, r4 | |
100036aa: 6030 str r0, [r6] | |
100036ac: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
100036ae: 2801 cmp r0, #1 | |
100036b0: d1e7 bne 0x10003682 <neotron_pico_bios::__cortex_m_rt_main+0x172> @ imm = #-50 | |
100036b2: e011 b 0x100036d8 <neotron_pico_bios::__cortex_m_rt_main+0x1c8> @ imm = #34 | |
100036b4: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100036b6: 4018 ands r0, r3 | |
100036b8: 6010 str r0, [r2] | |
100036ba: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100036bc: 2801 cmp r0, #1 | |
100036be: d016 beq 0x100036ee <neotron_pico_bios::__cortex_m_rt_main+0x1de> @ imm = #44 | |
100036c0: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100036c2: 4018 ands r0, r3 | |
100036c4: 6010 str r0, [r2] | |
100036c6: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100036c8: 2801 cmp r0, #1 | |
100036ca: d010 beq 0x100036ee <neotron_pico_bios::__cortex_m_rt_main+0x1de> @ imm = #32 | |
100036cc: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100036ce: 4018 ands r0, r3 | |
100036d0: 6010 str r0, [r2] | |
100036d2: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100036d4: 2801 cmp r0, #1 | |
100036d6: d00a beq 0x100036ee <neotron_pico_bios::__cortex_m_rt_main+0x1de> @ imm = #20 | |
100036d8: 2003 movs r0, #3 | |
100036da: 43c3 mvns r3, r0 | |
100036dc: 4632 mov r2, r6 | |
100036de: 3a0c subs r2, #12 | |
100036e0: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100036e2: 4018 ands r0, r3 | |
100036e4: 6010 str r0, [r2] | |
100036e6: 1f31 subs r1, r6, #4 | |
100036e8: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100036ea: 2801 cmp r0, #1 | |
100036ec: d1e2 bne 0x100036b4 <neotron_pico_bios::__cortex_m_rt_main+0x1a4> @ imm = #-60 | |
100036ee: 0320 lsls r0, r4, #12 | |
100036f0: 9d05 ldr r5, [sp, #20] | |
100036f2: 682c ldr r4, [r5] | |
; self.w.bits = (self.w.bits & !(0x01 << 12)) | ((value as u32 & 0x01) << 12); | |
100036f4: 4384 bics r4, r0 | |
100036f6: 602c str r4, [r5] | |
100036f8: 4de4 ldr r5, [pc, #912] @ 0x10003a8c <$d.116+0x4> | |
100036fa: 682c ldr r4, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100036fc: 4204 tst r4, r0 | |
100036fe: d108 bne 0x10003712 <neotron_pico_bios::__cortex_m_rt_main+0x202> @ imm = #16 | |
10003700: 682c ldr r4, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10003702: 4204 tst r4, r0 | |
10003704: d105 bne 0x10003712 <neotron_pico_bios::__cortex_m_rt_main+0x202> @ imm = #10 | |
10003706: 682c ldr r4, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10003708: 4204 tst r4, r0 | |
1000370a: d102 bne 0x10003712 <neotron_pico_bios::__cortex_m_rt_main+0x202> @ imm = #4 | |
1000370c: 682c ldr r4, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000370e: 4204 tst r4, r0 | |
10003710: d0f3 beq 0x100036fa <neotron_pico_bios::__cortex_m_rt_main+0x1ea> @ imm = #-26 | |
10003712: 48df ldr r0, [pc, #892] @ 0x10003a90 <$d.116+0x8> | |
10003714: 242d movs r4, #45 | |
10003716: 9402 str r4, [sp, #8] | |
10003718: 6044 str r4, [r0, #4] | |
1000371a: 9c06 ldr r4, [sp, #24] | |
1000371c: 6084 str r4, [r0, #8] | |
1000371e: 9c08 ldr r4, [sp, #32] | |
10003720: 6004 str r4, [r0] | |
10003722: 247e movs r4, #126 | |
10003724: 6084 str r4, [r0, #8] | |
10003726: 6844 ldr r4, [r0, #4] | |
10003728: 940a str r4, [sp, #40] | |
1000372a: 2421 movs r4, #33 | |
1000372c: 9409 str r4, [sp, #36] | |
; self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); | |
1000372e: 9c09 ldr r4, [sp, #36] | |
10003730: 9d0a ldr r5, [sp, #40] | |
10003732: 43a5 bics r5, r4 | |
10003734: 950a str r5, [sp, #40] | |
10003736: 9c0a ldr r4, [sp, #40] | |
10003738: 6044 str r4, [r0, #4] | |
1000373a: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
1000373c: 2c00 cmp r4, #0 | |
1000373e: d408 bmi 0x10003752 <neotron_pico_bios::__cortex_m_rt_main+0x242> @ imm = #16 | |
10003740: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
10003742: 2c00 cmp r4, #0 | |
10003744: d405 bmi 0x10003752 <neotron_pico_bios::__cortex_m_rt_main+0x242> @ imm = #10 | |
10003746: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
10003748: 2c00 cmp r4, #0 | |
1000374a: d402 bmi 0x10003752 <neotron_pico_bios::__cortex_m_rt_main+0x242> @ imm = #4 | |
1000374c: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
1000374e: 2c00 cmp r4, #0 | |
10003750: d5f3 bpl 0x1000373a <neotron_pico_bios::__cortex_m_rt_main+0x22a> @ imm = #-26 | |
10003752: 2431 movs r4, #49 | |
10003754: 0364 lsls r4, r4, #13 | |
10003756: 60c4 str r4, [r0, #12] | |
10003758: 6844 ldr r4, [r0, #4] | |
1000375a: 2508 movs r5, #8 | |
1000375c: 9501 str r5, [sp, #4] | |
; self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); | |
1000375e: 43ac bics r4, r5 | |
10003760: 6044 str r4, [r0, #4] | |
10003762: 9c08 ldr r4, [sp, #32] | |
10003764: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10003766: 43a0 bics r0, r4 | |
10003768: 6030 str r0, [r6] | |
1000376a: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
1000376c: 2801 cmp r0, #1 | |
1000376e: d037 beq 0x100037e0 <$t.115+0x24> @ imm = #110 | |
10003770: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10003772: 43a0 bics r0, r4 | |
10003774: 6030 str r0, [r6] | |
10003776: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
10003778: 2801 cmp r0, #1 | |
1000377a: d031 beq 0x100037e0 <$t.115+0x24> @ imm = #98 | |
1000377c: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
1000377e: 43a0 bics r0, r4 | |
10003780: 6030 str r0, [r6] | |
10003782: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
10003784: 2801 cmp r0, #1 | |
10003786: d02b beq 0x100037e0 <$t.115+0x24> @ imm = #86 | |
10003788: 6830 ldr r0, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
1000378a: 43a0 bics r0, r4 | |
1000378c: 6030 str r0, [r6] | |
1000378e: 68b0 ldr r0, [r6, #8] | |
; nb::block!(clocks.system_clock.reset_source_await()).unwrap(); | |
10003790: 2801 cmp r0, #1 | |
10003792: d1e7 bne 0x10003764 <neotron_pico_bios::__cortex_m_rt_main+0x254> @ imm = #-50 | |
10003794: e024 b 0x100037e0 <$t.115+0x24> @ imm = #72 | |
10003796: 46c0 mov r8, r8 | |
10003798 <$d.114>: | |
10003798: 18 ed 03 20 .word 0x2003ed18 | |
1000379c: d4 74 00 10 .word 0x100074d4 | |
100037a0: 08 c0 00 40 .word 0x4000c008 | |
100037a4: 7c 01 00 d0 .word 0xd000017c | |
100037a8: 7a 72 00 10 .word 0x1000727a | |
100037ac: 04 40 02 40 .word 0x40024004 | |
100037b0: 00 b0 fa 00 .word 0x00fab000 | |
100037b4: 2c 80 05 40 .word 0x4005802c | |
100037b8: 3c 80 00 40 .word 0x4000803c | |
100037bc <$t.115>: | |
100037bc: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100037be: 4018 ands r0, r3 | |
100037c0: 6010 str r0, [r2] | |
100037c2: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100037c4: 2801 cmp r0, #1 | |
100037c6: d011 beq 0x100037ec <$t.115+0x30> @ imm = #34 | |
100037c8: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100037ca: 4018 ands r0, r3 | |
100037cc: 6010 str r0, [r2] | |
100037ce: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100037d0: 2801 cmp r0, #1 | |
100037d2: d00b beq 0x100037ec <$t.115+0x30> @ imm = #22 | |
100037d4: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100037d6: 4018 ands r0, r3 | |
100037d8: 6010 str r0, [r2] | |
100037da: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100037dc: 2801 cmp r0, #1 | |
100037de: d005 beq 0x100037ec <$t.115+0x30> @ imm = #10 | |
100037e0: 6810 ldr r0, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
100037e2: 4018 ands r0, r3 | |
100037e4: 6010 str r0, [r2] | |
100037e6: 6808 ldr r0, [r1] | |
; nb::block!(clocks.reference_clock.reset_source_await()).unwrap(); | |
100037e8: 2801 cmp r0, #1 | |
100037ea: d1e7 bne 0x100037bc <$t.115> @ imm = #-50 | |
100037ec: 0364 lsls r4, r4, #13 | |
100037ee: 9d05 ldr r5, [sp, #20] | |
100037f0: 6828 ldr r0, [r5] | |
; self.w.bits = (self.w.bits & !(0x01 << 13)) | ((value as u32 & 0x01) << 13); | |
100037f2: 43a0 bics r0, r4 | |
100037f4: 6028 str r0, [r5] | |
100037f6: 4da5 ldr r5, [pc, #660] @ 0x10003a8c <$d.116+0x4> | |
100037f8: 6828 ldr r0, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
100037fa: 4220 tst r0, r4 | |
100037fc: d108 bne 0x10003810 <$t.115+0x54> @ imm = #16 | |
100037fe: 6828 ldr r0, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10003800: 4220 tst r0, r4 | |
10003802: d105 bne 0x10003810 <$t.115+0x54> @ imm = #10 | |
10003804: 6828 ldr r0, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
10003806: 4220 tst r0, r4 | |
10003808: d102 bne 0x10003810 <$t.115+0x54> @ imm = #4 | |
1000380a: 6828 ldr r0, [r5] | |
; while resets.reset_done.read().$module().bit_is_clear() {} | |
1000380c: 4220 tst r0, r4 | |
1000380e: d0f3 beq 0x100037f8 <$t.115+0x3c> @ imm = #-26 | |
10003810: 940a str r4, [sp, #40] | |
10003812: 48a0 ldr r0, [pc, #640] @ 0x10003a94 <$d.116+0xc> | |
10003814: 9c02 ldr r4, [sp, #8] | |
10003816: 6044 str r4, [r0, #4] | |
10003818: 9c06 ldr r4, [sp, #24] | |
1000381a: 6084 str r4, [r0, #8] | |
1000381c: 9c08 ldr r4, [sp, #32] | |
1000381e: 6004 str r4, [r0] | |
10003820: 2428 movs r4, #40 | |
10003822: 6084 str r4, [r0, #8] | |
10003824: 6844 ldr r4, [r0, #4] | |
; self.w.bits = (self.w.bits & !(0x01 << 5)) | ((value as u32 & 0x01) << 5); | |
10003826: 9d09 ldr r5, [sp, #36] | |
10003828: 43ac bics r4, r5 | |
1000382a: 6044 str r4, [r0, #4] | |
1000382c: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
1000382e: 2c00 cmp r4, #0 | |
10003830: d408 bmi 0x10003844 <$t.115+0x88> @ imm = #16 | |
10003832: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
10003834: 2c00 cmp r4, #0 | |
10003836: d405 bmi 0x10003844 <$t.115+0x88> @ imm = #10 | |
10003838: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
1000383a: 2c00 cmp r4, #0 | |
1000383c: d402 bmi 0x10003844 <$t.115+0x88> @ imm = #4 | |
1000383e: 6804 ldr r4, [r0] | |
; let locked_pll_token = nb::block!(initialized_pll.await_lock()).unwrap(); | |
10003840: 2c00 cmp r4, #0 | |
10003842: d5f3 bpl 0x1000382c <$t.115+0x70> @ imm = #-26 | |
10003844: 2429 movs r4, #41 | |
10003846: 0364 lsls r4, r4, #13 | |
10003848: 60c4 str r4, [r0, #12] | |
1000384a: 6844 ldr r4, [r0, #4] | |
; self.w.bits = (self.w.bits & !(0x01 << 3)) | ((value as u32 & 0x01) << 3); | |
1000384c: 9d01 ldr r5, [sp, #4] | |
1000384e: 43ac bics r4, r5 | |
10003850: 6044 str r4, [r0, #4] | |
10003852: 9808 ldr r0, [sp, #32] | |
10003854: 0200 lsls r0, r0, #8 | |
10003856: 4634 mov r4, r6 | |
10003858: 3c08 subs r4, #8 | |
1000385a: 6825 ldr r5, [r4] | |
; if div > self.get_div() { | |
1000385c: 2dff cmp r5, #255 | |
1000385e: d801 bhi 0x10003864 <$t.115+0xa8> @ imm = #2 | |
10003860: 6825 ldr r5, [r4] | |
10003862: 6020 str r0, [r4] | |
10003864: 6815 ldr r5, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
10003866: 401d ands r5, r3 | |
10003868: 6015 str r5, [r2] | |
1000386a: 680d ldr r5, [r1] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
1000386c: 2d01 cmp r5, #1 | |
1000386e: d011 beq 0x10003894 <$t.115+0xd8> @ imm = #34 | |
10003870: 6815 ldr r5, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
10003872: 401d ands r5, r3 | |
10003874: 6015 str r5, [r2] | |
10003876: 680d ldr r5, [r1] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
10003878: 2d01 cmp r5, #1 | |
1000387a: d00b beq 0x10003894 <$t.115+0xd8> @ imm = #22 | |
1000387c: 6815 ldr r5, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
1000387e: 401d ands r5, r3 | |
10003880: 6015 str r5, [r2] | |
10003882: 680d ldr r5, [r1] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
10003884: 2d01 cmp r5, #1 | |
10003886: d005 beq 0x10003894 <$t.115+0xd8> @ imm = #10 | |
10003888: 6815 ldr r5, [r2] | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
1000388a: 401d ands r5, r3 | |
1000388c: 6015 str r5, [r2] | |
1000388e: 680d ldr r5, [r1] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
10003890: 2d01 cmp r5, #1 | |
10003892: d1e7 bne 0x10003864 <$t.115+0xa8> @ imm = #-50 | |
10003894: 6813 ldr r3, [r2] | |
10003896: 2502 movs r5, #2 | |
; self.w.bits = (self.w.bits & !0x03) | (value as u32 & 0x03); | |
10003898: 431d orrs r5, r3 | |
1000389a: 9b08 ldr r3, [sp, #32] | |
1000389c: 439d bics r5, r3 | |
1000389e: 6015 str r5, [r2] | |
100038a0: 680a ldr r2, [r1] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
100038a2: 2a04 cmp r2, #4 | |
100038a4: d008 beq 0x100038b8 <$t.115+0xfc> @ imm = #16 | |
100038a6: 680a ldr r2, [r1] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
100038a8: 2a04 cmp r2, #4 | |
100038aa: d005 beq 0x100038b8 <$t.115+0xfc> @ imm = #10 | |
100038ac: 680a ldr r2, [r1] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
100038ae: 2a04 cmp r2, #4 | |
100038b0: d002 beq 0x100038b8 <$t.115+0xfc> @ imm = #4 | |
100038b2: 680a ldr r2, [r1] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
100038b4: 2a04 cmp r2, #4 | |
100038b6: d1f3 bne 0x100038a0 <$t.115+0xe4> @ imm = #-26 | |
100038b8: 6821 ldr r1, [r4] | |
100038ba: 6020 str r0, [r4] | |
100038bc: 6871 ldr r1, [r6, #4] | |
; if div > self.get_div() { | |
100038be: 4281 cmp r1, r0 | |
100038c0: d201 bhs 0x100038c6 <$t.115+0x10a> @ imm = #2 | |
100038c2: 6871 ldr r1, [r6, #4] | |
100038c4: 6070 str r0, [r6, #4] | |
100038c6: 9d08 ldr r5, [sp, #32] | |
100038c8: 6831 ldr r1, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100038ca: 43a9 bics r1, r5 | |
100038cc: 6031 str r1, [r6] | |
100038ce: 68b1 ldr r1, [r6, #8] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
100038d0: 2901 cmp r1, #1 | |
100038d2: d011 beq 0x100038f8 <$t.115+0x13c> @ imm = #34 | |
100038d4: 6831 ldr r1, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100038d6: 43a9 bics r1, r5 | |
100038d8: 6031 str r1, [r6] | |
100038da: 68b1 ldr r1, [r6, #8] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
100038dc: 2901 cmp r1, #1 | |
100038de: d00b beq 0x100038f8 <$t.115+0x13c> @ imm = #22 | |
100038e0: 6831 ldr r1, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100038e2: 43a9 bics r1, r5 | |
100038e4: 6031 str r1, [r6] | |
100038e6: 68b1 ldr r1, [r6, #8] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
100038e8: 2901 cmp r1, #1 | |
100038ea: d005 beq 0x100038f8 <$t.115+0x13c> @ imm = #10 | |
100038ec: 6831 ldr r1, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
100038ee: 43a9 bics r1, r5 | |
100038f0: 6031 str r1, [r6] | |
100038f2: 68b1 ldr r1, [r6, #8] | |
; nb::block!(self.reset_source_await()).unwrap(); | |
100038f4: 2901 cmp r1, #1 | |
100038f6: d1e7 bne 0x100038c8 <$t.115+0x10c> @ imm = #-50 | |
100038f8: 6832 ldr r2, [r6] | |
100038fa: 21e0 movs r1, #224 | |
; self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); | |
100038fc: 438a bics r2, r1 | |
100038fe: 6032 str r2, [r6] | |
10003900: 6832 ldr r2, [r6] | |
; self.w.bits = (self.w.bits & !0x01) | (value as u32 & 0x01); | |
10003902: 432a orrs r2, r5 | |
10003904: 6032 str r2, [r6] | |
10003906: 68b2 ldr r2, [r6, #8] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
10003908: 2a02 cmp r2, #2 | |
1000390a: d008 beq 0x1000391e <$t.115+0x162> @ imm = #16 | |
1000390c: 68b2 ldr r2, [r6, #8] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
1000390e: 2a02 cmp r2, #2 | |
10003910: d005 beq 0x1000391e <$t.115+0x162> @ imm = #10 | |
10003912: 68b2 ldr r2, [r6, #8] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
10003914: 2a02 cmp r2, #2 | |
10003916: d002 beq 0x1000391e <$t.115+0x162> @ imm = #4 | |
10003918: 68b2 ldr r2, [r6, #8] | |
; nb::block!(self.await_select(&token)).unwrap(); | |
1000391a: 2a02 cmp r2, #2 | |
1000391c: d1f3 bne 0x10003906 <$t.115+0x14a> @ imm = #-26 | |
1000391e: 6872 ldr r2, [r6, #4] | |
10003920: 6070 str r0, [r6, #4] | |
10003922: 69f2 ldr r2, [r6, #28] | |
; if div > self.get_div() { | |
10003924: 4282 cmp r2, r0 | |
10003926: d201 bhs 0x1000392c <$t.115+0x170> @ imm = #2 | |
10003928: 69f2 ldr r2, [r6, #28] | |
1000392a: 61f0 str r0, [r6, #28] | |
1000392c: 69b3 ldr r3, [r6, #24] | |
1000392e: 4a5a ldr r2, [pc, #360] @ 0x10003a98 <$d.116+0x10> | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
10003930: 4013 ands r3, r2 | |
10003932: 61b3 str r3, [r6, #24] | |
10003934: 69b3 ldr r3, [r6, #24] | |
; self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); | |
10003936: 438b bics r3, r1 | |
10003938: 61b3 str r3, [r6, #24] | |
1000393a: 02ec lsls r4, r5, #11 | |
1000393c: 69b3 ldr r3, [r6, #24] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
1000393e: 4323 orrs r3, r4 | |
10003940: 61b3 str r3, [r6, #24] | |
10003942: 69f3 ldr r3, [r6, #28] | |
10003944: 61f0 str r0, [r6, #28] | |
10003946: 6ab3 ldr r3, [r6, #40] | |
; if div > self.get_div() { | |
10003948: 4283 cmp r3, r0 | |
1000394a: d201 bhs 0x10003950 <$t.115+0x194> @ imm = #2 | |
1000394c: 6ab3 ldr r3, [r6, #40] | |
1000394e: 62b0 str r0, [r6, #40] | |
10003950: 6a73 ldr r3, [r6, #36] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
10003952: 4013 ands r3, r2 | |
10003954: 6273 str r3, [r6, #36] | |
10003956: 6a73 ldr r3, [r6, #36] | |
; self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); | |
10003958: 438b bics r3, r1 | |
1000395a: 6273 str r3, [r6, #36] | |
1000395c: 6a73 ldr r3, [r6, #36] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
1000395e: 4323 orrs r3, r4 | |
10003960: 6273 str r3, [r6, #36] | |
10003962: 6ab3 ldr r3, [r6, #40] | |
10003964: 62b0 str r0, [r6, #40] | |
10003966: 04ab lsls r3, r5, #18 | |
10003968: 6b70 ldr r0, [r6, #52] | |
; if div > self.get_div() { | |
1000396a: 0c80 lsrs r0, r0, #18 | |
1000396c: d101 bne 0x10003972 <$t.115+0x1b6> @ imm = #2 | |
1000396e: 6b70 ldr r0, [r6, #52] | |
10003970: 6373 str r3, [r6, #52] | |
10003972: 6b30 ldr r0, [r6, #48] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
10003974: 4010 ands r0, r2 | |
10003976: 6330 str r0, [r6, #48] | |
10003978: 43cd mvns r5, r1 | |
1000397a: 6b30 ldr r0, [r6, #48] | |
; self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); | |
1000397c: 4028 ands r0, r5 | |
1000397e: 6330 str r0, [r6, #48] | |
10003980: 6b30 ldr r0, [r6, #48] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
10003982: 4320 orrs r0, r4 | |
10003984: 6330 str r0, [r6, #48] | |
10003986: 6b70 ldr r0, [r6, #52] | |
10003988: 9309 str r3, [sp, #36] | |
1000398a: 6373 str r3, [r6, #52] | |
1000398c: 68f0 ldr r0, [r6, #12] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
1000398e: 4010 ands r0, r2 | |
10003990: 60f0 str r0, [r6, #12] | |
10003992: 200b movs r0, #11 | |
; $func($($args),*) | |
10003994: f003 f83c bl 0x10006a10 <__delay> @ imm = #12408 | |
10003998: 68f0 ldr r0, [r6, #12] | |
; self.w.bits = (self.w.bits & !(0x07 << 5)) | ((value as u32 & 0x07) << 5); | |
1000399a: 4028 ands r0, r5 | |
1000399c: 60f0 str r0, [r6, #12] | |
1000399e: 68f0 ldr r0, [r6, #12] | |
; self.w.bits = (self.w.bits & !(0x01 << 11)) | ((value as u32 & 0x01) << 11); | |
100039a0: 4320 orrs r0, r4 | |
100039a2: 60f0 str r0, [r6, #12] | |
100039a4: 483d ldr r0, [pc, #244] @ 0x10003a9c <$d.116+0x14> | |
100039a6: 6800 ldr r0, [r0] | |
100039a8: 483d ldr r0, [pc, #244] @ 0x10003aa0 <$d.116+0x18> | |
100039aa: 6801 ldr r1, [r0] | |
; SystClkSource::Core => unsafe { self.csr.modify(|v| v | SYST_CSR_CLKSOURCE) }, | |
100039ac: 9a03 ldr r2, [sp, #12] | |
100039ae: 4311 orrs r1, r2 | |
100039b0: 6001 str r1, [r0] | |
; clocks, | |
100039b2: 980e ldr r0, [sp, #56] | |
100039b4: 9012 str r0, [sp, #72] | |
100039b6: 980d ldr r0, [sp, #52] | |
100039b8: 9011 str r0, [sp, #68] | |
100039ba: 980c ldr r0, [sp, #48] | |
100039bc: 9010 str r0, [sp, #64] | |
100039be: 980b ldr r0, [sp, #44] | |
100039c0: 900f str r0, [sp, #60] | |
100039c2: 4838 ldr r0, [pc, #224] @ 0x10003aa4 <$d.116+0x1c> | |
100039c4: 9018 str r0, [sp, #96] | |
100039c6: 4838 ldr r0, [pc, #224] @ 0x10003aa8 <$d.116+0x20> | |
100039c8: 9017 str r0, [sp, #92] | |
100039ca: 9016 str r0, [sp, #88] | |
100039cc: 4a37 ldr r2, [pc, #220] @ 0x10003aac <$d.116+0x24> | |
100039ce: 9215 str r2, [sp, #84] | |
100039d0: 9214 str r2, [sp, #80] | |
100039d2: 4837 ldr r0, [pc, #220] @ 0x10003ab0 <$d.116+0x28> | |
100039d4: 9013 str r0, [sp, #76] | |
100039d6: ae44 add r6, sp, #272 | |
100039d8: a90f add r1, sp, #60 | |
; let (mut hw, nirq_io) = Hardware::build( | |
100039da: 4630 mov r0, r6 | |
100039dc: f7fd fdea bl 0x100015b4 <neotron_pico_bios::Hardware::build> @ imm = #-9260 | |
100039e0: a80f add r0, sp, #60 | |
100039e2: 22d4 movs r2, #212 | |
100039e4: 9006 str r0, [sp, #24] | |
100039e6: 4631 mov r1, r6 | |
100039e8: 9205 str r2, [sp, #20] | |
100039ea: f002 ffed bl 0x100069c8 <__aeabi_memcpy8> @ imm = #12250 | |
100039ee: 9a07 ldr r2, [sp, #28] | |
100039f0: 7810 ldrb r0, [r2] | |
100039f2: 211e movs r1, #30 | |
; self.led_state = (self.led_state & 0x1e) | u8::from(!enabled); | |
100039f4: 4001 ands r1, r0 | |
100039f6: 1c48 adds r0, r1, #1 | |
100039f8: 9003 str r0, [sp, #12] | |
; self.io_chip_write(0x12, self.led_state << 3 | self.last_cs); | |
100039fa: 00c6 lsls r6, r0, #3 | |
; let (mut hw, nirq_io) = Hardware::build( | |
100039fc: 8850 ldrh r0, [r2, #2] | |
100039fe: 9002 str r0, [sp, #8] | |
10003a00: 7854 ldrb r4, [r2, #1] | |
; hw.init_io_chip(); | |
10003a02: f7fe f961 bl 0x10001cc8 <neotron_pico_bios::Hardware::init_io_chip> @ imm = #-7486 | |
; self.io_chip_write(0x12, self.led_state << 3 | self.last_cs); | |
10003a06: 4326 orrs r6, r4 | |
10003a08: 2012 movs r0, #18 | |
10003a0a: 4631 mov r1, r6 | |
10003a0c: f7fe f86a bl 0x10001ae4 <neotron_pico_bios::Hardware::io_chip_write> @ imm = #-7980 | |
10003a10: 4828 ldr r0, [pc, #160] @ 0x10003ab4 <$d.116+0x2c> | |
; let alias = (register as usize + 0x2000) as *mut u32; | |
10003a12: 4601 mov r1, r0 | |
10003a14: 3130 adds r1, #48 | |
10003a16: 220d movs r2, #13 | |
10003a18: 0715 lsls r5, r2, #28 | |
; let cpuid = *(pac::SIO::ptr() as *const u32); | |
10003a1a: 682a ldr r2, [r5] | |
; let alias = (register as usize + 0x2000) as *mut u32; | |
10003a1c: 2a00 cmp r2, #0 | |
10003a1e: 4602 mov r2, r0 | |
10003a20: d000 beq 0x10003a24 <$t.115+0x268> @ imm = #0 | |
10003a22: 460a mov r2, r1 | |
10003a24: 9b09 ldr r3, [sp, #36] | |
10003a26: 6013 str r3, [r2] | |
; let cpuid = *(pac::SIO::ptr() as *const u32); | |
10003a28: 682a ldr r2, [r5] | |
; let alias = (register as usize + 0x2000) as *mut u32; | |
10003a2a: 2a00 cmp r2, #0 | |
10003a2c: d000 beq 0x10003a30 <$t.115+0x274> @ imm = #0 | |
10003a2e: 4608 mov r0, r1 | |
10003a30: 9e08 ldr r6, [sp, #32] | |
10003a32: 04f1 lsls r1, r6, #19 | |
10003a34: 6001 str r1, [r0] | |
; vga::init( | |
10003a36: f7fc fd9f bl 0x10000578 <neotron_pico_bios::vga::init> @ imm = #-13506 | |
10003a3a: 6868 ldr r0, [r5, #4] | |
; Ok(self._is_low()) | |
10003a3c: 0d00 lsrs r0, r0, #20 | |
10003a3e: 4386 bics r6, r0 | |
10003a40: 4811 ldr r0, [pc, #68] @ 0x10003a88 <$d.116> | |
10003a42: 7146 strb r6, [r0, #5] | |
10003a44: ae44 add r6, sp, #272 | |
; critical_section::with(|cs| { | |
10003a46: 4630 mov r0, r6 | |
10003a48: 9906 ldr r1, [sp, #24] | |
10003a4a: 9a05 ldr r2, [sp, #20] | |
10003a4c: f002 ffbc bl 0x100069c8 <__aeabi_memcpy8> @ imm = #12152 | |
10003a50: 9804 ldr r0, [sp, #16] | |
10003a52: 9902 ldr r1, [sp, #8] | |
10003a54: 8041 strh r1, [r0, #2] | |
10003a56: 7044 strb r4, [r0, #1] | |
10003a58: 9903 ldr r1, [sp, #12] | |
10003a5a: 7001 strb r1, [r0] | |
10003a5c: 4630 mov r0, r6 | |
10003a5e: f7fc fcb1 bl 0x100003c4 <critical_section::with> @ imm = #-13982 | |
10003a62: 4815 ldr r0, [pc, #84] @ 0x10003ab8 <$d.116+0x30> | |
10003a64: 990a ldr r1, [sp, #40] | |
10003a66: 6001 str r1, [r0] | |
10003a68: ac44 add r4, sp, #272 | |
; while let common::Result::Ok(common::Option::Some(_x)) = hid_get_event() { | |
10003a6a: 4620 mov r0, r4 | |
10003a6c: f7ff f99e bl 0x10002dac <neotron_pico_bios::hid_get_event> @ imm = #-3268 | |
10003a70: 78a0 ldrb r0, [r4, #2] | |
10003a72: 7821 ldrb r1, [r4] | |
10003a74: 4301 orrs r1, r0 | |
10003a76: d0f7 beq 0x10003a68 <$t.115+0x2ac> @ imm = #-18 | |
; sign_on(); | |
10003a78: f7fe fac8 bl 0x1000200c <neotron_pico_bios::sign_on> @ imm = #-6768 | |
; code(&API_CALLS); | |
10003a7c: 480f ldr r0, [pc, #60] @ 0x10003abc <$d.116+0x34> | |
10003a7e: 6801 ldr r1, [r0] | |
10003a80: 480f ldr r0, [pc, #60] @ 0x10003ac0 <$d.116+0x38> | |
10003a82: 4788 blx r1 | |
10003a84: defe trap | |
10003a86: 46c0 mov r8, r8 | |
10003a88 <$d.116>: | |
10003a88: 18 ed 03 20 .word 0x2003ed18 | |
10003a8c: 08 c0 00 40 .word 0x4000c008 | |
10003a90: 00 80 02 40 .word 0x40028000 | |
10003a94: 00 c0 02 40 .word 0x4002c000 | |
10003a98: ff f7 ff ff .word 0xfffff7ff | |
10003a9c: 14 00 00 18 .word 0x18000014 | |
10003aa0: 10 e0 00 e0 .word 0xe000e010 | |
10003aa4: 1b b7 00 00 .word 0x0000b71b | |
10003aa8: 00 6c dc 02 .word 0x02dc6c00 | |
10003aac: 80 9b 82 07 .word 0x07829b80 | |
10003ab0: 00 1b b7 00 .word 0x00b71b00 | |
10003ab4: 08 61 01 40 .word 0x40016108 | |
10003ab8: 00 e1 00 e0 .word 0xe000e100 | |
10003abc: 00 00 02 10 .word 0x10020000 | |
10003ac0: 94 72 00 10 .word 0x10007294 | |
10003ac4 <IO_IRQ_BANK0>: | |
; #[interrupt] | |
10003ac4: b5f0 push {r4, r5, r6, r7, lr} | |
10003ac6: af03 add r7, sp, #12 | |
10003ac8: b083 sub sp, #12 | |
10003aca: 4d25 ldr r5, [pc, #148] @ 0x10003b60 <$d.120> | |
10003acc: 7a68 ldrb r0, [r5, #9] | |
10003ace: 4c25 ldr r4, [pc, #148] @ 0x10003b64 <$d.120+0x4> | |
; if LOCAL_IRQ_PIN.is_none() { | |
10003ad0: 2800 cmp r0, #0 | |
10003ad2: d135 bne 0x10003b40 <IO_IRQ_BANK0+0x7c> @ imm = #106 | |
; $func($($args),*) | |
10003ad4: f002 ffa3 bl 0x10006a1e <__primask_r> @ imm = #12102 | |
10003ad8: 1f21 subs r1, r4, #4 | |
10003ada: 680a ldr r2, [r1] | |
10003adc: 7c29 ldrb r1, [r5, #16] | |
10003ade: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
10003ae2: 1c56 adds r6, r2, #1 | |
10003ae4: b2f2 uxtb r2, r6 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
10003ae6: 4291 cmp r1, r2 | |
10003ae8: d106 bne 0x10003af8 <IO_IRQ_BANK0+0x34> @ imm = #12 | |
10003aea: 7a28 ldrb r0, [r5, #8] | |
; *LOCAL_IRQ_PIN = IRQ_PIN.borrow(cs).take(); | |
10003aec: 7268 strb r0, [r5, #9] | |
10003aee: 2100 movs r1, #0 | |
10003af0: 7229 strb r1, [r5, #8] | |
; if let Some(pin) = LOCAL_IRQ_PIN { | |
10003af2: 2800 cmp r0, #0 | |
10003af4: d124 bne 0x10003b40 <IO_IRQ_BANK0+0x7c> @ imm = #72 | |
10003af6: e02e b 0x10003b56 <IO_IRQ_BANK0+0x92> @ imm = #92 | |
10003af8: 2101 movs r1, #1 | |
10003afa: 9101 str r1, [sp, #4] | |
10003afc: 4008 ands r0, r1 | |
10003afe: 9002 str r0, [sp, #8] | |
10003b00: 4c19 ldr r4, [pc, #100] @ 0x10003b68 <$d.120+0x8> | |
; if interrupts_active { | |
10003b02: d107 bne 0x10003b14 <IO_IRQ_BANK0+0x50> @ imm = #14 | |
; $func($($args),*) | |
10003b04: f002 ff80 bl 0x10006a08 <__cpsid> @ imm = #12032 | |
10003b08: 6820 ldr r0, [r4] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
10003b0a: 2800 cmp r0, #0 | |
10003b0c: d107 bne 0x10003b1e <IO_IRQ_BANK0+0x5a> @ imm = #14 | |
; $func($($args),*) | |
10003b0e: f002 ff7d bl 0x10006a0c <__cpsie> @ imm = #12026 | |
10003b12: e7f7 b 0x10003b04 <IO_IRQ_BANK0+0x40> @ imm = #-18 | |
10003b14: f002 ff78 bl 0x10006a08 <__cpsid> @ imm = #12016 | |
10003b18: 6820 ldr r0, [r4] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
10003b1a: 2800 cmp r0, #0 | |
10003b1c: d0fa beq 0x10003b14 <IO_IRQ_BANK0+0x50> @ imm = #-12 | |
10003b1e: 742e strb r6, [r5, #16] | |
10003b20: 7a28 ldrb r0, [r5, #8] | |
; *LOCAL_IRQ_PIN = IRQ_PIN.borrow(cs).take(); | |
10003b22: 7268 strb r0, [r5, #9] | |
10003b24: 2000 movs r0, #0 | |
10003b26: 7228 strb r0, [r5, #8] | |
10003b28: 7428 strb r0, [r5, #16] | |
10003b2a: 9801 ldr r0, [sp, #4] | |
10003b2c: 6020 str r0, [r4] | |
; if token != 0 { | |
10003b2e: 9802 ldr r0, [sp, #8] | |
10003b30: 2800 cmp r0, #0 | |
10003b32: d101 bne 0x10003b38 <IO_IRQ_BANK0+0x74> @ imm = #2 | |
; $func($($args),*) | |
10003b34: f002 ff6a bl 0x10006a0c <__cpsie> @ imm = #11988 | |
; if let Some(pin) = LOCAL_IRQ_PIN { | |
10003b38: 7a68 ldrb r0, [r5, #9] | |
10003b3a: 4c0a ldr r4, [pc, #40] @ 0x10003b64 <$d.120+0x4> | |
10003b3c: 2800 cmp r0, #0 | |
10003b3e: d00a beq 0x10003b56 <IO_IRQ_BANK0+0x92> @ imm = #20 | |
10003b40: 6820 ldr r0, [r4] | |
; Ok(self._is_low()) | |
10003b42: 0d00 lsrs r0, r0, #20 | |
10003b44: 2101 movs r1, #1 | |
10003b46: 460a mov r2, r1 | |
10003b48: 4382 bics r2, r0 | |
10003b4a: 716a strb r2, [r5, #5] | |
10003b4c: 0488 lsls r0, r1, #18 | |
10003b4e: 4a07 ldr r2, [pc, #28] @ 0x10003b6c <$d.120+0xc> | |
10003b50: 6010 str r0, [r2] | |
10003b52: 04c8 lsls r0, r1, #19 | |
10003b54: 6010 str r0, [r2] | |
; $func($($args),*) | |
10003b56: f002 ff65 bl 0x10006a24 <__sev> @ imm = #11978 | |
; #[interrupt] | |
10003b5a: b003 add sp, #12 | |
10003b5c: bdf0 pop {r4, r5, r6, r7, pc} | |
10003b5e: 46c0 mov r8, r8 | |
10003b60 <$d.120>: | |
10003b60: 18 ed 03 20 .word 0x2003ed18 | |
10003b64: 04 00 00 d0 .word 0xd0000004 | |
10003b68: 7c 01 00 d0 .word 0xd000017c | |
10003b6c: f8 40 01 40 .word 0x400140f8 | |
10003b70 <core::ops::function::FnOnce::call_once>: | |
10003b70: 6800 ldr r0, [r0] | |
10003b72: e7fe b 0x10003b72 <core::ops::function::FnOnce::call_once+0x2> @ imm = #-4 | |
10003b74 <core::panicking::panic_fmt>: | |
10003b74: b580 push {r7, lr} | |
10003b76: af00 add r7, sp, #0 | |
10003b78: f002 fbaa bl 0x100062d0 <rust_begin_unwind> @ imm = #10068 | |
10003b7c: defe trap | |
10003b7e <core::ptr::drop_in_place<&core::iter::adapters::copied::Copied<core::slice::iter::Iter<u8>>>>: | |
10003b7e: 4770 bx lr | |
10003b80 <core::panicking::panic_bounds_check>: | |
10003b80: b580 push {r7, lr} | |
10003b82: af00 add r7, sp, #0 | |
10003b84: f7ff fff6 bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-20 | |
10003b88: defe trap | |
10003b8a <core::fmt::Formatter::pad_integral>: | |
10003b8a: b5f0 push {r4, r5, r6, r7, lr} | |
10003b8c: af03 add r7, sp, #12 | |
10003b8e: b08d sub sp, #52 | |
10003b90: 4614 mov r4, r2 | |
10003b92: 4605 mov r5, r0 | |
10003b94: 68fe ldr r6, [r7, #12] | |
10003b96: 2900 cmp r1, #0 | |
10003b98: d009 beq 0x10003bae <core::fmt::Formatter::pad_integral+0x24> @ imm = #18 | |
10003b9a: 69a8 ldr r0, [r5, #24] | |
10003b9c: 2101 movs r1, #1 | |
10003b9e: 4001 ands r1, r0 | |
10003ba0: d00e beq 0x10003bc0 <core::fmt::Formatter::pad_integral+0x36> @ imm = #28 | |
10003ba2: 222b movs r2, #43 | |
10003ba4: 920a str r2, [sp, #40] | |
10003ba6: 198a adds r2, r1, r6 | |
10003ba8: 0741 lsls r1, r0, #29 | |
10003baa: d40f bmi 0x10003bcc <core::fmt::Formatter::pad_integral+0x42> @ imm = #30 | |
10003bac: e005 b 0x10003bba <core::fmt::Formatter::pad_integral+0x30> @ imm = #10 | |
10003bae: 69a8 ldr r0, [r5, #24] | |
10003bb0: 1c72 adds r2, r6, #1 | |
10003bb2: 212d movs r1, #45 | |
10003bb4: 910a str r1, [sp, #40] | |
10003bb6: 0741 lsls r1, r0, #29 | |
10003bb8: d408 bmi 0x10003bcc <core::fmt::Formatter::pad_integral+0x42> @ imm = #16 | |
10003bba: 2100 movs r1, #0 | |
10003bbc: 910b str r1, [sp, #44] | |
10003bbe: e022 b 0x10003c06 <core::fmt::Formatter::pad_integral+0x7c> @ imm = #68 | |
10003bc0: 2211 movs r2, #17 | |
10003bc2: 0412 lsls r2, r2, #16 | |
10003bc4: 920a str r2, [sp, #40] | |
10003bc6: 198a adds r2, r1, r6 | |
10003bc8: 0741 lsls r1, r0, #29 | |
10003bca: d5f6 bpl 0x10003bba <core::fmt::Formatter::pad_integral+0x30> @ imm = #-20 | |
10003bcc: 2b00 cmp r3, #0 | |
10003bce: 940b str r4, [sp, #44] | |
10003bd0: d015 beq 0x10003bfe <core::fmt::Formatter::pad_integral+0x74> @ imm = #42 | |
10003bd2: 9208 str r2, [sp, #32] | |
10003bd4: 2203 movs r2, #3 | |
10003bd6: 401a ands r2, r3 | |
10003bd8: d013 beq 0x10003c02 <core::fmt::Formatter::pad_integral+0x78> @ imm = #38 | |
10003bda: 9306 str r3, [sp, #24] | |
10003bdc: 2100 movs r1, #0 | |
10003bde: 5664 ldrsb r4, [r4, r1] | |
10003be0: 2340 movs r3, #64 | |
10003be2: 43db mvns r3, r3 | |
10003be4: 429c cmp r4, r3 | |
10003be6: dd00 ble 0x10003bea <core::fmt::Formatter::pad_integral+0x60> @ imm = #0 | |
10003be8: 2101 movs r1, #1 | |
10003bea: 2a01 cmp r2, #1 | |
10003bec: d005 beq 0x10003bfa <core::fmt::Formatter::pad_integral+0x70> @ imm = #10 | |
10003bee: 2201 movs r2, #1 | |
10003bf0: 9c0b ldr r4, [sp, #44] | |
10003bf2: 56a2 ldrsb r2, [r4, r2] | |
10003bf4: 429a cmp r2, r3 | |
10003bf6: dd00 ble 0x10003bfa <core::fmt::Formatter::pad_integral+0x70> @ imm = #0 | |
10003bf8: 1c49 adds r1, r1, #1 | |
10003bfa: 9b06 ldr r3, [sp, #24] | |
10003bfc: e001 b 0x10003c02 <core::fmt::Formatter::pad_integral+0x78> @ imm = #2 | |
10003bfe: 2100 movs r1, #0 | |
10003c00: e000 b 0x10003c04 <core::fmt::Formatter::pad_integral+0x7a> @ imm = #0 | |
10003c02: 9a08 ldr r2, [sp, #32] | |
10003c04: 188a adds r2, r1, r2 | |
10003c06: 68bc ldr r4, [r7, #8] | |
10003c08: 68a9 ldr r1, [r5, #8] | |
10003c0a: 2900 cmp r1, #0 | |
10003c0c: 9409 str r4, [sp, #36] | |
10003c0e: d015 beq 0x10003c3c <core::fmt::Formatter::pad_integral+0xb2> @ imm = #42 | |
10003c10: 68e9 ldr r1, [r5, #12] | |
10003c12: 4291 cmp r1, r2 | |
10003c14: d920 bls 0x10003c58 <core::fmt::Formatter::pad_integral+0xce> @ imm = #64 | |
10003c16: 9105 str r1, [sp, #20] | |
10003c18: 0700 lsls r0, r0, #28 | |
10003c1a: 9604 str r6, [sp, #16] | |
10003c1c: d433 bmi 0x10003c86 <core::fmt::Formatter::pad_integral+0xfc> @ imm = #102 | |
10003c1e: 2020 movs r0, #32 | |
10003c20: 5c29 ldrb r1, [r5, r0] | |
10003c22: 2903 cmp r1, #3 | |
10003c24: d100 bne 0x10003c28 <core::fmt::Formatter::pad_integral+0x9e> @ imm = #0 | |
10003c26: 2101 movs r1, #1 | |
10003c28: 9805 ldr r0, [sp, #20] | |
10003c2a: 1a80 subs r0, r0, r2 | |
10003c2c: 078a lsls r2, r1, #30 | |
10003c2e: 9306 str r3, [sp, #24] | |
10003c30: d052 beq 0x10003cd8 <core::fmt::Formatter::pad_integral+0x14e> @ imm = #164 | |
10003c32: 2901 cmp r1, #1 | |
10003c34: d14d bne 0x10003cd2 <core::fmt::Formatter::pad_integral+0x148> @ imm = #154 | |
10003c36: 2100 movs r1, #0 | |
10003c38: 9108 str r1, [sp, #32] | |
10003c3a: e04f b 0x10003cdc <core::fmt::Formatter::pad_integral+0x152> @ imm = #158 | |
10003c3c: cd30 ldm r5, {r4, r5} | |
10003c3e: 9300 str r3, [sp] | |
10003c40: 4620 mov r0, r4 | |
10003c42: 4629 mov r1, r5 | |
10003c44: 9a0a ldr r2, [sp, #40] | |
10003c46: 9b0b ldr r3, [sp, #44] | |
10003c48: f000 f89b bl 0x10003d82 <core::fmt::Formatter::pad_integral::write_prefix> @ imm = #310 | |
10003c4c: 2800 cmp r0, #0 | |
10003c4e: d011 beq 0x10003c74 <core::fmt::Formatter::pad_integral+0xea> @ imm = #34 | |
10003c50: 2401 movs r4, #1 | |
10003c52: 4620 mov r0, r4 | |
10003c54: b00d add sp, #52 | |
10003c56: bdf0 pop {r4, r5, r6, r7, pc} | |
10003c58: cd30 ldm r5, {r4, r5} | |
10003c5a: 9300 str r3, [sp] | |
10003c5c: 4620 mov r0, r4 | |
10003c5e: 4629 mov r1, r5 | |
10003c60: 9a0a ldr r2, [sp, #40] | |
10003c62: 9b0b ldr r3, [sp, #44] | |
10003c64: f000 f88d bl 0x10003d82 <core::fmt::Formatter::pad_integral::write_prefix> @ imm = #282 | |
10003c68: 2800 cmp r0, #0 | |
10003c6a: d003 beq 0x10003c74 <core::fmt::Formatter::pad_integral+0xea> @ imm = #6 | |
10003c6c: 2401 movs r4, #1 | |
10003c6e: 4620 mov r0, r4 | |
10003c70: b00d add sp, #52 | |
10003c72: bdf0 pop {r4, r5, r6, r7, pc} | |
10003c74: 68eb ldr r3, [r5, #12] | |
10003c76: 4620 mov r0, r4 | |
10003c78: 9909 ldr r1, [sp, #36] | |
10003c7a: 4632 mov r2, r6 | |
10003c7c: 4798 blx r3 | |
10003c7e: 4604 mov r4, r0 | |
10003c80: 4620 mov r0, r4 | |
10003c82: b00d add sp, #52 | |
10003c84: bdf0 pop {r4, r5, r6, r7, pc} | |
10003c86: 9208 str r2, [sp, #32] | |
10003c88: 2020 movs r0, #32 | |
10003c8a: 5c29 ldrb r1, [r5, r0] | |
10003c8c: 9103 str r1, [sp, #12] | |
10003c8e: 2101 movs r1, #1 | |
10003c90: 9107 str r1, [sp, #28] | |
10003c92: 5429 strb r1, [r5, r0] | |
10003c94: 69e8 ldr r0, [r5, #28] | |
10003c96: 9002 str r0, [sp, #8] | |
10003c98: 2030 movs r0, #48 | |
10003c9a: 61e8 str r0, [r5, #28] | |
10003c9c: cd41 ldm r5!, {r0, r6} | |
10003c9e: 9300 str r3, [sp] | |
10003ca0: 900c str r0, [sp, #48] | |
10003ca2: 4631 mov r1, r6 | |
10003ca4: 9a0a ldr r2, [sp, #40] | |
10003ca6: 9b0b ldr r3, [sp, #44] | |
10003ca8: 3d08 subs r5, #8 | |
10003caa: f000 f86a bl 0x10003d82 <core::fmt::Formatter::pad_integral::write_prefix> @ imm = #212 | |
10003cae: 2800 cmp r0, #0 | |
10003cb0: d129 bne 0x10003d06 <core::fmt::Formatter::pad_integral+0x17c> @ imm = #82 | |
10003cb2: 4628 mov r0, r5 | |
10003cb4: 3020 adds r0, #32 | |
10003cb6: 900b str r0, [sp, #44] | |
10003cb8: 9808 ldr r0, [sp, #32] | |
10003cba: 9905 ldr r1, [sp, #20] | |
10003cbc: 1a08 subs r0, r1, r0 | |
10003cbe: 1c44 adds r4, r0, #1 | |
10003cc0: 1e64 subs r4, r4, #1 | |
10003cc2: d024 beq 0x10003d0e <core::fmt::Formatter::pad_integral+0x184> @ imm = #72 | |
10003cc4: 6932 ldr r2, [r6, #16] | |
10003cc6: 2130 movs r1, #48 | |
10003cc8: 980c ldr r0, [sp, #48] | |
10003cca: 4790 blx r2 | |
10003ccc: 2800 cmp r0, #0 | |
10003cce: d0f7 beq 0x10003cc0 <core::fmt::Formatter::pad_integral+0x136> @ imm = #-18 | |
10003cd0: e019 b 0x10003d06 <core::fmt::Formatter::pad_integral+0x17c> @ imm = #50 | |
10003cd2: 0841 lsrs r1, r0, #1 | |
10003cd4: 1c40 adds r0, r0, #1 | |
10003cd6: 0840 lsrs r0, r0, #1 | |
10003cd8: 9008 str r0, [sp, #32] | |
10003cda: 4608 mov r0, r1 | |
10003cdc: 1c44 adds r4, r0, #1 | |
10003cde: 69e8 ldr r0, [r5, #28] | |
10003ce0: 900c str r0, [sp, #48] | |
10003ce2: 682e ldr r6, [r5] | |
10003ce4: 686d ldr r5, [r5, #4] | |
10003ce6: 2001 movs r0, #1 | |
10003ce8: 9007 str r0, [sp, #28] | |
10003cea: 1e64 subs r4, r4, #1 | |
10003cec: d006 beq 0x10003cfc <core::fmt::Formatter::pad_integral+0x172> @ imm = #12 | |
10003cee: 692a ldr r2, [r5, #16] | |
10003cf0: 4630 mov r0, r6 | |
10003cf2: 990c ldr r1, [sp, #48] | |
10003cf4: 4790 blx r2 | |
10003cf6: 2800 cmp r0, #0 | |
10003cf8: d0f7 beq 0x10003cea <core::fmt::Formatter::pad_integral+0x160> @ imm = #-18 | |
10003cfa: e004 b 0x10003d06 <core::fmt::Formatter::pad_integral+0x17c> @ imm = #8 | |
10003cfc: 2011 movs r0, #17 | |
10003cfe: 0400 lsls r0, r0, #16 | |
10003d00: 990c ldr r1, [sp, #48] | |
10003d02: 4281 cmp r1, r0 | |
10003d04: d114 bne 0x10003d30 <core::fmt::Formatter::pad_integral+0x1a6> @ imm = #40 | |
10003d06: 9c07 ldr r4, [sp, #28] | |
10003d08: 4620 mov r0, r4 | |
10003d0a: b00d add sp, #52 | |
10003d0c: bdf0 pop {r4, r5, r6, r7, pc} | |
10003d0e: 68f3 ldr r3, [r6, #12] | |
10003d10: 980c ldr r0, [sp, #48] | |
10003d12: 9909 ldr r1, [sp, #36] | |
10003d14: 9a04 ldr r2, [sp, #16] | |
10003d16: 4798 blx r3 | |
10003d18: 2800 cmp r0, #0 | |
10003d1a: 9c07 ldr r4, [sp, #28] | |
10003d1c: d199 bne 0x10003c52 <core::fmt::Formatter::pad_integral+0xc8> @ imm = #-206 | |
10003d1e: 9803 ldr r0, [sp, #12] | |
10003d20: 990b ldr r1, [sp, #44] | |
10003d22: 7008 strb r0, [r1] | |
10003d24: 9802 ldr r0, [sp, #8] | |
10003d26: 61e8 str r0, [r5, #28] | |
10003d28: 2400 movs r4, #0 | |
10003d2a: 4620 mov r0, r4 | |
10003d2c: b00d add sp, #52 | |
10003d2e: bdf0 pop {r4, r5, r6, r7, pc} | |
10003d30: 9806 ldr r0, [sp, #24] | |
10003d32: 9000 str r0, [sp] | |
10003d34: 4630 mov r0, r6 | |
10003d36: 4629 mov r1, r5 | |
10003d38: 9a0a ldr r2, [sp, #40] | |
10003d3a: 9b0b ldr r3, [sp, #44] | |
10003d3c: f000 f821 bl 0x10003d82 <core::fmt::Formatter::pad_integral::write_prefix> @ imm = #66 | |
10003d40: 2800 cmp r0, #0 | |
10003d42: 9c07 ldr r4, [sp, #28] | |
10003d44: d185 bne 0x10003c52 <core::fmt::Formatter::pad_integral+0xc8> @ imm = #-246 | |
10003d46: 68eb ldr r3, [r5, #12] | |
10003d48: 4630 mov r0, r6 | |
10003d4a: 9909 ldr r1, [sp, #36] | |
10003d4c: 9a04 ldr r2, [sp, #16] | |
10003d4e: 4798 blx r3 | |
10003d50: 2800 cmp r0, #0 | |
10003d52: d000 beq 0x10003d56 <core::fmt::Formatter::pad_integral+0x1cc> @ imm = #0 | |
10003d54: e77d b 0x10003c52 <core::fmt::Formatter::pad_integral+0xc8> @ imm = #-262 | |
10003d56: 2400 movs r4, #0 | |
10003d58: 9908 ldr r1, [sp, #32] | |
10003d5a: 42a1 cmp r1, r4 | |
10003d5c: d009 beq 0x10003d72 <core::fmt::Formatter::pad_integral+0x1e8> @ imm = #18 | |
10003d5e: 692a ldr r2, [r5, #16] | |
10003d60: 4630 mov r0, r6 | |
10003d62: 990c ldr r1, [sp, #48] | |
10003d64: 4790 blx r2 | |
10003d66: 9908 ldr r1, [sp, #32] | |
10003d68: 1c64 adds r4, r4, #1 | |
10003d6a: 2800 cmp r0, #0 | |
10003d6c: d0f5 beq 0x10003d5a <core::fmt::Formatter::pad_integral+0x1d0> @ imm = #-22 | |
10003d6e: 1e60 subs r0, r4, #1 | |
10003d70: e000 b 0x10003d74 <core::fmt::Formatter::pad_integral+0x1ea> @ imm = #0 | |
10003d72: 4608 mov r0, r1 | |
10003d74: 4288 cmp r0, r1 | |
10003d76: d200 bhs 0x10003d7a <core::fmt::Formatter::pad_integral+0x1f0> @ imm = #0 | |
10003d78: e778 b 0x10003c6c <core::fmt::Formatter::pad_integral+0xe2> @ imm = #-272 | |
10003d7a: 2400 movs r4, #0 | |
10003d7c: 4620 mov r0, r4 | |
10003d7e: b00d add sp, #52 | |
10003d80: bdf0 pop {r4, r5, r6, r7, pc} | |
10003d82 <core::fmt::Formatter::pad_integral::write_prefix>: | |
10003d82: b5f0 push {r4, r5, r6, r7, lr} | |
10003d84: af03 add r7, sp, #12 | |
10003d86: b081 sub sp, #4 | |
10003d88: 461c mov r4, r3 | |
10003d8a: 460e mov r6, r1 | |
10003d8c: 4605 mov r5, r0 | |
10003d8e: 2011 movs r0, #17 | |
10003d90: 0400 lsls r0, r0, #16 | |
10003d92: 4282 cmp r2, r0 | |
10003d94: d008 beq 0x10003da8 <core::fmt::Formatter::pad_integral::write_prefix+0x26> @ imm = #16 | |
10003d96: 6933 ldr r3, [r6, #16] | |
10003d98: 4628 mov r0, r5 | |
10003d9a: 4611 mov r1, r2 | |
10003d9c: 4798 blx r3 | |
10003d9e: 2800 cmp r0, #0 | |
10003da0: d002 beq 0x10003da8 <core::fmt::Formatter::pad_integral::write_prefix+0x26> @ imm = #4 | |
10003da2: 2001 movs r0, #1 | |
10003da4: b001 add sp, #4 | |
10003da6: bdf0 pop {r4, r5, r6, r7, pc} | |
10003da8: 2c00 cmp r4, #0 | |
10003daa: d006 beq 0x10003dba <core::fmt::Formatter::pad_integral::write_prefix+0x38> @ imm = #12 | |
10003dac: 68ba ldr r2, [r7, #8] | |
10003dae: 68f3 ldr r3, [r6, #12] | |
10003db0: 4628 mov r0, r5 | |
10003db2: 4621 mov r1, r4 | |
10003db4: 4798 blx r3 | |
10003db6: b001 add sp, #4 | |
10003db8: bdf0 pop {r4, r5, r6, r7, pc} | |
10003dba: 2000 movs r0, #0 | |
10003dbc: b001 add sp, #4 | |
10003dbe: bdf0 pop {r4, r5, r6, r7, pc} | |
10003dc0 <core::slice::index::slice_end_index_len_fail>: | |
10003dc0: b580 push {r7, lr} | |
10003dc2: af00 add r7, sp, #0 | |
10003dc4: f000 f801 bl 0x10003dca <core::slice::index::slice_end_index_len_fail_rt> @ imm = #2 | |
10003dc8: defe trap | |
10003dca <core::slice::index::slice_end_index_len_fail_rt>: | |
10003dca: b580 push {r7, lr} | |
10003dcc: af00 add r7, sp, #0 | |
10003dce: f7ff fed1 bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-606 | |
10003dd2: defe trap | |
10003dd4 <core::fmt::Formatter::pad>: | |
10003dd4: b5f0 push {r4, r5, r6, r7, lr} | |
10003dd6: af03 add r7, sp, #12 | |
10003dd8: b091 sub sp, #68 | |
10003dda: 4615 mov r5, r2 | |
10003ddc: 460a mov r2, r1 | |
10003dde: 4603 mov r3, r0 | |
10003de0: 6900 ldr r0, [r0, #16] | |
10003de2: 6899 ldr r1, [r3, #8] | |
10003de4: 2901 cmp r1, #1 | |
10003de6: d001 beq 0x10003dec <core::fmt::Formatter::pad+0x18> @ imm = #2 | |
10003de8: 2801 cmp r0, #1 | |
10003dea: d163 bne 0x10003eb4 <core::fmt::Formatter::pad+0xe0> @ imm = #198 | |
10003dec: 2801 cmp r0, #1 | |
10003dee: 9305 str r3, [sp, #20] | |
10003df0: d14b bne 0x10003e8a <core::fmt::Formatter::pad+0xb6> @ imm = #150 | |
10003df2: 910c str r1, [sp, #48] | |
10003df4: 9504 str r5, [sp, #16] | |
10003df6: 1950 adds r0, r2, r5 | |
10003df8: 9010 str r0, [sp, #64] | |
10003dfa: 2011 movs r0, #17 | |
10003dfc: 0404 lsls r4, r0, #16 | |
10003dfe: 6958 ldr r0, [r3, #20] | |
10003e00: 1c45 adds r5, r0, #1 | |
10003e02: 2100 movs r1, #0 | |
10003e04: 4610 mov r0, r2 | |
10003e06: 9206 str r2, [sp, #24] | |
10003e08: 940e str r4, [sp, #56] | |
10003e0a: e004 b 0x10003e16 <core::fmt::Formatter::pad+0x42> @ imm = #8 | |
10003e0c: 1c58 adds r0, r3, #1 | |
10003e0e: 1ac9 subs r1, r1, r3 | |
10003e10: 1809 adds r1, r1, r0 | |
10003e12: 42a6 cmp r6, r4 | |
10003e14: d036 beq 0x10003e84 <core::fmt::Formatter::pad+0xb0> @ imm = #108 | |
10003e16: 4603 mov r3, r0 | |
10003e18: 1e6d subs r5, r5, #1 | |
10003e1a: d100 bne 0x10003e1e <core::fmt::Formatter::pad+0x4a> @ imm = #0 | |
10003e1c: e13a b 0x10004094 <core::fmt::Formatter::pad+0x2c0> @ imm = #628 | |
10003e1e: 9810 ldr r0, [sp, #64] | |
10003e20: 4283 cmp r3, r0 | |
10003e22: d02f beq 0x10003e84 <core::fmt::Formatter::pad+0xb0> @ imm = #94 | |
10003e24: 2000 movs r0, #0 | |
10003e26: 5618 ldrsb r0, [r3, r0] | |
10003e28: b2c6 uxtb r6, r0 | |
10003e2a: 2800 cmp r0, #0 | |
10003e2c: d5ee bpl 0x10003e0c <core::fmt::Formatter::pad+0x38> @ imm = #-36 | |
10003e2e: 785c ldrb r4, [r3, #1] | |
10003e30: 203f movs r0, #63 | |
10003e32: 900f str r0, [sp, #60] | |
10003e34: 4004 ands r4, r0 | |
10003e36: 201f movs r0, #31 | |
10003e38: 4030 ands r0, r6 | |
10003e3a: 2edf cmp r6, #223 | |
10003e3c: d916 bls 0x10003e6c <core::fmt::Formatter::pad+0x98> @ imm = #44 | |
10003e3e: 910d str r1, [sp, #52] | |
10003e40: 789a ldrb r2, [r3, #2] | |
10003e42: 990f ldr r1, [sp, #60] | |
10003e44: 400a ands r2, r1 | |
10003e46: 01a4 lsls r4, r4, #6 | |
10003e48: 18a4 adds r4, r4, r2 | |
10003e4a: 2ef0 cmp r6, #240 | |
10003e4c: d313 blo 0x10003e76 <core::fmt::Formatter::pad+0xa2> @ imm = #38 | |
10003e4e: 78da ldrb r2, [r3, #3] | |
10003e50: 990f ldr r1, [sp, #60] | |
10003e52: 400a ands r2, r1 | |
10003e54: 01a4 lsls r4, r4, #6 | |
10003e56: 18a2 adds r2, r4, r2 | |
10003e58: 0740 lsls r0, r0, #29 | |
10003e5a: 0ac0 lsrs r0, r0, #11 | |
10003e5c: 1816 adds r6, r2, r0 | |
10003e5e: 9c0e ldr r4, [sp, #56] | |
10003e60: 42a6 cmp r6, r4 | |
10003e62: d100 bne 0x10003e66 <core::fmt::Formatter::pad+0x92> @ imm = #0 | |
10003e64: e297 b 0x10004396 <core::fmt::Formatter::pad+0x5c2> @ imm = #1326 | |
10003e66: 1d18 adds r0, r3, #4 | |
10003e68: 9a06 ldr r2, [sp, #24] | |
10003e6a: e009 b 0x10003e80 <core::fmt::Formatter::pad+0xac> @ imm = #18 | |
10003e6c: 0180 lsls r0, r0, #6 | |
10003e6e: 1906 adds r6, r0, r4 | |
10003e70: 1c98 adds r0, r3, #2 | |
10003e72: 9c0e ldr r4, [sp, #56] | |
10003e74: e7cb b 0x10003e0e <core::fmt::Formatter::pad+0x3a> @ imm = #-106 | |
10003e76: 0300 lsls r0, r0, #12 | |
10003e78: 1826 adds r6, r4, r0 | |
10003e7a: 1cd8 adds r0, r3, #3 | |
10003e7c: 9a06 ldr r2, [sp, #24] | |
10003e7e: 9c0e ldr r4, [sp, #56] | |
10003e80: 990d ldr r1, [sp, #52] | |
10003e82: e7c4 b 0x10003e0e <core::fmt::Formatter::pad+0x3a> @ imm = #-120 | |
10003e84: 9d04 ldr r5, [sp, #16] | |
10003e86: 9b05 ldr r3, [sp, #20] | |
10003e88: 990c ldr r1, [sp, #48] | |
10003e8a: 2900 cmp r1, #0 | |
10003e8c: d012 beq 0x10003eb4 <core::fmt::Formatter::pad+0xe0> @ imm = #36 | |
10003e8e: 68d8 ldr r0, [r3, #12] | |
10003e90: 9003 str r0, [sp, #12] | |
10003e92: 2d10 cmp r5, #16 | |
10003e94: 9504 str r5, [sp, #16] | |
10003e96: 9206 str r2, [sp, #24] | |
10003e98: d215 bhs 0x10003ec6 <core::fmt::Formatter::pad+0xf2> @ imm = #42 | |
10003e9a: 2d00 cmp r5, #0 | |
10003e9c: d100 bne 0x10003ea0 <core::fmt::Formatter::pad+0xcc> @ imm = #0 | |
10003e9e: e12d b 0x100040fc <core::fmt::Formatter::pad+0x328> @ imm = #602 | |
10003ea0: 2403 movs r4, #3 | |
10003ea2: 4629 mov r1, r5 | |
10003ea4: 4021 ands r1, r4 | |
10003ea6: 1e68 subs r0, r5, #1 | |
10003ea8: 2803 cmp r0, #3 | |
10003eaa: d300 blo 0x10003eae <core::fmt::Formatter::pad+0xda> @ imm = #0 | |
10003eac: e12d b 0x1000410a <core::fmt::Formatter::pad+0x336> @ imm = #602 | |
10003eae: 2300 movs r3, #0 | |
10003eb0: 4610 mov r0, r2 | |
10003eb2: e204 b 0x100042be <core::fmt::Formatter::pad+0x4ea> @ imm = #1032 | |
10003eb4: 6819 ldr r1, [r3] | |
10003eb6: 6858 ldr r0, [r3, #4] | |
10003eb8: 68c3 ldr r3, [r0, #12] | |
10003eba: 4608 mov r0, r1 | |
10003ebc: 4611 mov r1, r2 | |
10003ebe: 462a mov r2, r5 | |
10003ec0: 4798 blx r3 | |
10003ec2: b011 add sp, #68 | |
10003ec4: bdf0 pop {r4, r5, r6, r7, pc} | |
10003ec6: 1cd0 adds r0, r2, #3 | |
10003ec8: 2103 movs r1, #3 | |
10003eca: 4388 bics r0, r1 | |
10003ecc: 1a86 subs r6, r0, r2 | |
10003ece: 42b5 cmp r5, r6 | |
10003ed0: 910f str r1, [sp, #60] | |
10003ed2: d31b blo 0x10003f0c <core::fmt::Formatter::pad+0x138> @ imm = #54 | |
10003ed4: 2e04 cmp r6, #4 | |
10003ed6: d819 bhi 0x10003f0c <core::fmt::Formatter::pad+0x138> @ imm = #50 | |
10003ed8: 1bac subs r4, r5, r6 | |
10003eda: 2c04 cmp r4, #4 | |
10003edc: d316 blo 0x10003f0c <core::fmt::Formatter::pad+0x138> @ imm = #44 | |
10003ede: 960b str r6, [sp, #44] | |
10003ee0: 940c str r4, [sp, #48] | |
10003ee2: 400c ands r4, r1 | |
10003ee4: 940d str r4, [sp, #52] | |
10003ee6: 2600 movs r6, #0 | |
10003ee8: 4290 cmp r0, r2 | |
10003eea: 960e str r6, [sp, #56] | |
10003eec: d100 bne 0x10003ef0 <core::fmt::Formatter::pad+0x11c> @ imm = #0 | |
10003eee: e36e b 0x100045ce <core::fmt::Formatter::pad+0x7fa> @ imm = #1756 | |
10003ef0: 9e0b ldr r6, [sp, #44] | |
10003ef2: 4631 mov r1, r6 | |
10003ef4: 9c0f ldr r4, [sp, #60] | |
10003ef6: 4021 ands r1, r4 | |
10003ef8: 910a str r1, [sp, #40] | |
10003efa: 43d1 mvns r1, r2 | |
10003efc: 1840 adds r0, r0, r1 | |
10003efe: 2803 cmp r0, #3 | |
10003f00: d300 blo 0x10003f04 <core::fmt::Formatter::pad+0x130> @ imm = #0 | |
10003f02: e1a7 b 0x10004254 <core::fmt::Formatter::pad+0x480> @ imm = #846 | |
10003f04: 2600 movs r6, #0 | |
10003f06: 4611 mov r1, r2 | |
10003f08: 9c0a ldr r4, [sp, #40] | |
10003f0a: e348 b 0x1000459e <core::fmt::Formatter::pad+0x7ca> @ imm = #1680 | |
10003f0c: 460b mov r3, r1 | |
10003f0e: 4611 mov r1, r2 | |
10003f10: 43da mvns r2, r3 | |
10003f12: 1f2c subs r4, r5, #4 | |
10003f14: 08a0 lsrs r0, r4, #2 | |
10003f16: 4014 ands r4, r2 | |
10003f18: 9401 str r4, [sp, #4] | |
10003f1a: 1c40 adds r0, r0, #1 | |
10003f1c: 4002 ands r2, r0 | |
10003f1e: 4018 ands r0, r3 | |
10003f20: 9002 str r0, [sp, #8] | |
10003f22: 2300 movs r3, #0 | |
10003f24: 9310 str r3, [sp, #64] | |
10003f26: 460d mov r5, r1 | |
10003f28: e002 b 0x10003f30 <core::fmt::Formatter::pad+0x15c> @ imm = #4 | |
10003f2a: 3510 adds r5, #16 | |
10003f2c: 1f12 subs r2, r2, #4 | |
10003f2e: d06f beq 0x10004010 <core::fmt::Formatter::pad+0x23c> @ imm = #222 | |
10003f30: 2601 movs r6, #1 | |
10003f32: 9810 ldr r0, [sp, #64] | |
10003f34: 5628 ldrsb r0, [r5, r0] | |
10003f36: 2140 movs r1, #64 | |
10003f38: 43cc mvns r4, r1 | |
10003f3a: 42a0 cmp r0, r4 | |
10003f3c: dd00 ble 0x10003f40 <core::fmt::Formatter::pad+0x16c> @ imm = #0 | |
10003f3e: 1c5b adds r3, r3, #1 | |
10003f40: 57a8 ldrsb r0, [r5, r6] | |
10003f42: 42a0 cmp r0, r4 | |
10003f44: dd00 ble 0x10003f48 <core::fmt::Formatter::pad+0x174> @ imm = #0 | |
10003f46: 1c5b adds r3, r3, #1 | |
10003f48: 2002 movs r0, #2 | |
10003f4a: 5629 ldrsb r1, [r5, r0] | |
10003f4c: 42a1 cmp r1, r4 | |
10003f4e: 900c str r0, [sp, #48] | |
10003f50: dd00 ble 0x10003f54 <core::fmt::Formatter::pad+0x180> @ imm = #0 | |
10003f52: 1c5b adds r3, r3, #1 | |
10003f54: 980f ldr r0, [sp, #60] | |
10003f56: 5629 ldrsb r1, [r5, r0] | |
10003f58: 42a1 cmp r1, r4 | |
10003f5a: dd00 ble 0x10003f5e <core::fmt::Formatter::pad+0x18a> @ imm = #0 | |
10003f5c: 1c5b adds r3, r3, #1 | |
10003f5e: 2004 movs r0, #4 | |
10003f60: 5629 ldrsb r1, [r5, r0] | |
10003f62: 42a1 cmp r1, r4 | |
10003f64: 9009 str r0, [sp, #36] | |
10003f66: dd00 ble 0x10003f6a <core::fmt::Formatter::pad+0x196> @ imm = #0 | |
10003f68: 1c5b adds r3, r3, #1 | |
10003f6a: 2005 movs r0, #5 | |
10003f6c: 900e str r0, [sp, #56] | |
10003f6e: 5629 ldrsb r1, [r5, r0] | |
10003f70: 42a1 cmp r1, r4 | |
10003f72: dd00 ble 0x10003f76 <core::fmt::Formatter::pad+0x1a2> @ imm = #0 | |
10003f74: 1c5b adds r3, r3, #1 | |
10003f76: 2006 movs r0, #6 | |
10003f78: 900b str r0, [sp, #44] | |
10003f7a: 5629 ldrsb r1, [r5, r0] | |
10003f7c: 42a1 cmp r1, r4 | |
10003f7e: dd00 ble 0x10003f82 <core::fmt::Formatter::pad+0x1ae> @ imm = #0 | |
10003f80: 1c5b adds r3, r3, #1 | |
10003f82: 2007 movs r0, #7 | |
10003f84: 5629 ldrsb r1, [r5, r0] | |
10003f86: 42a1 cmp r1, r4 | |
10003f88: 900a str r0, [sp, #40] | |
10003f8a: dd00 ble 0x10003f8e <core::fmt::Formatter::pad+0x1ba> @ imm = #0 | |
10003f8c: 1c5b adds r3, r3, #1 | |
10003f8e: 2008 movs r0, #8 | |
10003f90: 5629 ldrsb r1, [r5, r0] | |
10003f92: 42a1 cmp r1, r4 | |
10003f94: 960d str r6, [sp, #52] | |
10003f96: dd00 ble 0x10003f9a <core::fmt::Formatter::pad+0x1c6> @ imm = #0 | |
10003f98: 1c5b adds r3, r3, #1 | |
10003f9a: 2109 movs r1, #9 | |
10003f9c: 566e ldrsb r6, [r5, r1] | |
10003f9e: 42a6 cmp r6, r4 | |
10003fa0: dd00 ble 0x10003fa4 <core::fmt::Formatter::pad+0x1d0> @ imm = #0 | |
10003fa2: 1c5b adds r3, r3, #1 | |
10003fa4: 260a movs r6, #10 | |
10003fa6: 9607 str r6, [sp, #28] | |
10003fa8: 57ae ldrsb r6, [r5, r6] | |
10003faa: 42a6 cmp r6, r4 | |
10003fac: 9008 str r0, [sp, #32] | |
10003fae: dc14 bgt 0x10003fda <core::fmt::Formatter::pad+0x206> @ imm = #40 | |
10003fb0: 260b movs r6, #11 | |
10003fb2: 57a8 ldrsb r0, [r5, r6] | |
10003fb4: 42a0 cmp r0, r4 | |
10003fb6: dc15 bgt 0x10003fe4 <core::fmt::Formatter::pad+0x210> @ imm = #42 | |
10003fb8: 200c movs r0, #12 | |
10003fba: 5628 ldrsb r0, [r5, r0] | |
10003fbc: 42a0 cmp r0, r4 | |
10003fbe: dc16 bgt 0x10003fee <core::fmt::Formatter::pad+0x21a> @ imm = #44 | |
10003fc0: 200d movs r0, #13 | |
10003fc2: 5628 ldrsb r0, [r5, r0] | |
10003fc4: 42a0 cmp r0, r4 | |
10003fc6: dc17 bgt 0x10003ff8 <core::fmt::Formatter::pad+0x224> @ imm = #46 | |
10003fc8: 200e movs r0, #14 | |
10003fca: 5628 ldrsb r0, [r5, r0] | |
10003fcc: 42a0 cmp r0, r4 | |
10003fce: dc18 bgt 0x10004002 <core::fmt::Formatter::pad+0x22e> @ imm = #48 | |
10003fd0: 200f movs r0, #15 | |
10003fd2: 5628 ldrsb r0, [r5, r0] | |
10003fd4: 42a0 cmp r0, r4 | |
10003fd6: dda8 ble 0x10003f2a <core::fmt::Formatter::pad+0x156> @ imm = #-176 | |
10003fd8: e018 b 0x1000400c <core::fmt::Formatter::pad+0x238> @ imm = #48 | |
10003fda: 1c5b adds r3, r3, #1 | |
10003fdc: 260b movs r6, #11 | |
10003fde: 57a8 ldrsb r0, [r5, r6] | |
10003fe0: 42a0 cmp r0, r4 | |
10003fe2: dde9 ble 0x10003fb8 <core::fmt::Formatter::pad+0x1e4> @ imm = #-46 | |
10003fe4: 1c5b adds r3, r3, #1 | |
10003fe6: 200c movs r0, #12 | |
10003fe8: 5628 ldrsb r0, [r5, r0] | |
10003fea: 42a0 cmp r0, r4 | |
10003fec: dde8 ble 0x10003fc0 <core::fmt::Formatter::pad+0x1ec> @ imm = #-48 | |
10003fee: 1c5b adds r3, r3, #1 | |
10003ff0: 200d movs r0, #13 | |
10003ff2: 5628 ldrsb r0, [r5, r0] | |
10003ff4: 42a0 cmp r0, r4 | |
10003ff6: dde7 ble 0x10003fc8 <core::fmt::Formatter::pad+0x1f4> @ imm = #-50 | |
10003ff8: 1c5b adds r3, r3, #1 | |
10003ffa: 200e movs r0, #14 | |
10003ffc: 5628 ldrsb r0, [r5, r0] | |
10003ffe: 42a0 cmp r0, r4 | |
10004000: dde6 ble 0x10003fd0 <core::fmt::Formatter::pad+0x1fc> @ imm = #-52 | |
10004002: 1c5b adds r3, r3, #1 | |
10004004: 200f movs r0, #15 | |
10004006: 5628 ldrsb r0, [r5, r0] | |
10004008: 42a0 cmp r0, r4 | |
1000400a: dd8e ble 0x10003f2a <core::fmt::Formatter::pad+0x156> @ imm = #-228 | |
1000400c: 1c5b adds r3, r3, #1 | |
1000400e: e78c b 0x10003f2a <core::fmt::Formatter::pad+0x156> @ imm = #-232 | |
10004010: 9802 ldr r0, [sp, #8] | |
10004012: 2800 cmp r0, #0 | |
10004014: d018 beq 0x10004048 <core::fmt::Formatter::pad+0x274> @ imm = #48 | |
10004016: 980d ldr r0, [sp, #52] | |
10004018: 562a ldrsb r2, [r5, r0] | |
1000401a: 2000 movs r0, #0 | |
1000401c: 5628 ldrsb r0, [r5, r0] | |
1000401e: 42a0 cmp r0, r4 | |
10004020: dd00 ble 0x10004024 <core::fmt::Formatter::pad+0x250> @ imm = #0 | |
10004022: e096 b 0x10004152 <core::fmt::Formatter::pad+0x37e> @ imm = #300 | |
10004024: 980c ldr r0, [sp, #48] | |
10004026: 42a2 cmp r2, r4 | |
10004028: dd00 ble 0x1000402c <core::fmt::Formatter::pad+0x258> @ imm = #0 | |
1000402a: e097 b 0x1000415c <core::fmt::Formatter::pad+0x388> @ imm = #302 | |
1000402c: 5628 ldrsb r0, [r5, r0] | |
1000402e: 42a0 cmp r0, r4 | |
10004030: dd00 ble 0x10004034 <core::fmt::Formatter::pad+0x260> @ imm = #0 | |
10004032: e098 b 0x10004166 <core::fmt::Formatter::pad+0x392> @ imm = #304 | |
10004034: 980f ldr r0, [sp, #60] | |
10004036: 5628 ldrsb r0, [r5, r0] | |
10004038: 42a0 cmp r0, r4 | |
1000403a: dd00 ble 0x1000403e <core::fmt::Formatter::pad+0x26a> @ imm = #0 | |
1000403c: e099 b 0x10004172 <core::fmt::Formatter::pad+0x39e> @ imm = #306 | |
1000403e: 9802 ldr r0, [sp, #8] | |
10004040: 2801 cmp r0, #1 | |
10004042: d000 beq 0x10004046 <core::fmt::Formatter::pad+0x272> @ imm = #0 | |
10004044: e09a b 0x1000417c <core::fmt::Formatter::pad+0x3a8> @ imm = #308 | |
10004046: 1d2d adds r5, r5, #4 | |
10004048: 9a06 ldr r2, [sp, #24] | |
1000404a: 990f ldr r1, [sp, #60] | |
1000404c: 9804 ldr r0, [sp, #16] | |
1000404e: 4001 ands r1, r0 | |
10004050: d100 bne 0x10004054 <core::fmt::Formatter::pad+0x280> @ imm = #0 | |
10004052: e0d1 b 0x100041f8 <core::fmt::Formatter::pad+0x424> @ imm = #418 | |
10004054: 2000 movs r0, #0 | |
10004056: 5628 ldrsb r0, [r5, r0] | |
10004058: 42a0 cmp r0, r4 | |
1000405a: dd00 ble 0x1000405e <core::fmt::Formatter::pad+0x28a> @ imm = #0 | |
1000405c: 1c5b adds r3, r3, #1 | |
1000405e: 9d04 ldr r5, [sp, #16] | |
10004060: 2901 cmp r1, #1 | |
10004062: d100 bne 0x10004066 <core::fmt::Formatter::pad+0x292> @ imm = #0 | |
10004064: e143 b 0x100042ee <core::fmt::Formatter::pad+0x51a> @ imm = #646 | |
10004066: 460e mov r6, r1 | |
10004068: 9801 ldr r0, [sp, #4] | |
1000406a: 1810 adds r0, r2, r0 | |
1000406c: 990e ldr r1, [sp, #56] | |
1000406e: 5641 ldrsb r1, [r0, r1] | |
10004070: 42a1 cmp r1, r4 | |
10004072: dd00 ble 0x10004076 <core::fmt::Formatter::pad+0x2a2> @ imm = #0 | |
10004074: 1c5b adds r3, r3, #1 | |
10004076: 2e02 cmp r6, #2 | |
10004078: d100 bne 0x1000407c <core::fmt::Formatter::pad+0x2a8> @ imm = #0 | |
1000407a: e138 b 0x100042ee <core::fmt::Formatter::pad+0x51a> @ imm = #624 | |
1000407c: 990b ldr r1, [sp, #44] | |
1000407e: 5640 ldrsb r0, [r0, r1] | |
10004080: 42a0 cmp r0, r4 | |
10004082: dc00 bgt 0x10004086 <core::fmt::Formatter::pad+0x2b2> @ imm = #0 | |
10004084: e133 b 0x100042ee <core::fmt::Formatter::pad+0x51a> @ imm = #614 | |
10004086: 1c5b adds r3, r3, #1 | |
10004088: 9803 ldr r0, [sp, #12] | |
1000408a: 4298 cmp r0, r3 | |
1000408c: d801 bhi 0x10004092 <core::fmt::Formatter::pad+0x2be> @ imm = #2 | |
1000408e: f000 fc5a bl 0x10004946 <core::fmt::Formatter::pad+0xb72> @ imm = #2228 | |
10004092: e130 b 0x100042f6 <core::fmt::Formatter::pad+0x522> @ imm = #608 | |
10004094: 9810 ldr r0, [sp, #64] | |
10004096: 4283 cmp r3, r0 | |
10004098: 9d04 ldr r5, [sp, #16] | |
1000409a: d100 bne 0x1000409e <core::fmt::Formatter::pad+0x2ca> @ imm = #0 | |
1000409c: e6f3 b 0x10003e86 <core::fmt::Formatter::pad+0xb2> @ imm = #-538 | |
1000409e: 4626 mov r6, r4 | |
100040a0: 2400 movs r4, #0 | |
100040a2: 5718 ldrsb r0, [r3, r4] | |
100040a4: 2800 cmp r0, #0 | |
100040a6: d51b bpl 0x100040e0 <core::fmt::Formatter::pad+0x30c> @ imm = #54 | |
100040a8: b2c0 uxtb r0, r0 | |
100040aa: 28e0 cmp r0, #224 | |
100040ac: d318 blo 0x100040e0 <core::fmt::Formatter::pad+0x30c> @ imm = #48 | |
100040ae: 28f0 cmp r0, #240 | |
100040b0: d316 blo 0x100040e0 <core::fmt::Formatter::pad+0x30c> @ imm = #44 | |
100040b2: 785a ldrb r2, [r3, #1] | |
100040b4: 920f str r2, [sp, #60] | |
100040b6: 78dd ldrb r5, [r3, #3] | |
100040b8: 223f movs r2, #63 | |
100040ba: 402a ands r2, r5 | |
100040bc: 9210 str r2, [sp, #64] | |
100040be: 9d04 ldr r5, [sp, #16] | |
100040c0: 9a0f ldr r2, [sp, #60] | |
100040c2: 0692 lsls r2, r2, #26 | |
100040c4: 0b92 lsrs r2, r2, #14 | |
100040c6: 789b ldrb r3, [r3, #2] | |
100040c8: 069b lsls r3, r3, #26 | |
100040ca: 0d1b lsrs r3, r3, #20 | |
100040cc: 189a adds r2, r3, r2 | |
100040ce: 9b10 ldr r3, [sp, #64] | |
100040d0: 18d2 adds r2, r2, r3 | |
100040d2: 0740 lsls r0, r0, #29 | |
100040d4: 0ac0 lsrs r0, r0, #11 | |
100040d6: 1810 adds r0, r2, r0 | |
100040d8: 9a06 ldr r2, [sp, #24] | |
100040da: 42b0 cmp r0, r6 | |
100040dc: d100 bne 0x100040e0 <core::fmt::Formatter::pad+0x30c> @ imm = #0 | |
100040de: e6d2 b 0x10003e86 <core::fmt::Formatter::pad+0xb2> @ imm = #-604 | |
100040e0: 2900 cmp r1, #0 | |
100040e2: d100 bne 0x100040e6 <core::fmt::Formatter::pad+0x312> @ imm = #0 | |
100040e4: e08e b 0x10004204 <core::fmt::Formatter::pad+0x430> @ imm = #284 | |
100040e6: 42a9 cmp r1, r5 | |
100040e8: d300 blo 0x100040ec <core::fmt::Formatter::pad+0x318> @ imm = #0 | |
100040ea: e08a b 0x10004202 <core::fmt::Formatter::pad+0x42e> @ imm = #276 | |
100040ec: 5650 ldrsb r0, [r2, r1] | |
100040ee: 223f movs r2, #63 | |
100040f0: 43d2 mvns r2, r2 | |
100040f2: 4290 cmp r0, r2 | |
100040f4: 9a06 ldr r2, [sp, #24] | |
100040f6: db00 blt 0x100040fa <core::fmt::Formatter::pad+0x326> @ imm = #0 | |
100040f8: e084 b 0x10004204 <core::fmt::Formatter::pad+0x430> @ imm = #264 | |
100040fa: e084 b 0x10004206 <core::fmt::Formatter::pad+0x432> @ imm = #264 | |
100040fc: 2300 movs r3, #0 | |
100040fe: 9803 ldr r0, [sp, #12] | |
10004100: 4298 cmp r0, r3 | |
10004102: d801 bhi 0x10004108 <core::fmt::Formatter::pad+0x334> @ imm = #2 | |
10004104: f000 fc1f bl 0x10004946 <core::fmt::Formatter::pad+0xb72> @ imm = #2110 | |
10004108: e0f5 b 0x100042f6 <core::fmt::Formatter::pad+0x522> @ imm = #490 | |
1000410a: 1f28 subs r0, r5, #4 | |
1000410c: 0880 lsrs r0, r0, #2 | |
1000410e: 1c40 adds r0, r0, #1 | |
10004110: 4020 ands r0, r4 | |
10004112: d049 beq 0x100041a8 <core::fmt::Formatter::pad+0x3d4> @ imm = #146 | |
10004114: 9010 str r0, [sp, #64] | |
10004116: 2600 movs r6, #0 | |
10004118: 5795 ldrsb r5, [r2, r6] | |
1000411a: 2301 movs r3, #1 | |
1000411c: 56d2 ldrsb r2, [r2, r3] | |
1000411e: 2040 movs r0, #64 | |
10004120: 43c0 mvns r0, r0 | |
10004122: 4282 cmp r2, r0 | |
10004124: dc00 bgt 0x10004128 <core::fmt::Formatter::pad+0x354> @ imm = #0 | |
10004126: 4633 mov r3, r6 | |
10004128: 4285 cmp r5, r0 | |
1000412a: dd00 ble 0x1000412e <core::fmt::Formatter::pad+0x35a> @ imm = #0 | |
1000412c: 1c5b adds r3, r3, #1 | |
1000412e: 9d04 ldr r5, [sp, #16] | |
10004130: 2202 movs r2, #2 | |
10004132: 9e06 ldr r6, [sp, #24] | |
10004134: 56b2 ldrsb r2, [r6, r2] | |
10004136: 4282 cmp r2, r0 | |
10004138: dd00 ble 0x1000413c <core::fmt::Formatter::pad+0x368> @ imm = #0 | |
1000413a: 1c5b adds r3, r3, #1 | |
1000413c: 9e10 ldr r6, [sp, #64] | |
1000413e: 9a06 ldr r2, [sp, #24] | |
10004140: 5712 ldrsb r2, [r2, r4] | |
10004142: 4282 cmp r2, r0 | |
10004144: dd00 ble 0x10004148 <core::fmt::Formatter::pad+0x374> @ imm = #0 | |
10004146: 1c5b adds r3, r3, #1 | |
10004148: 2e01 cmp r6, #1 | |
1000414a: d165 bne 0x10004218 <core::fmt::Formatter::pad+0x444> @ imm = #202 | |
1000414c: 9a06 ldr r2, [sp, #24] | |
1000414e: 1d10 adds r0, r2, #4 | |
10004150: e0b5 b 0x100042be <core::fmt::Formatter::pad+0x4ea> @ imm = #362 | |
10004152: 1c5b adds r3, r3, #1 | |
10004154: 980c ldr r0, [sp, #48] | |
10004156: 42a2 cmp r2, r4 | |
10004158: dc00 bgt 0x1000415c <core::fmt::Formatter::pad+0x388> @ imm = #0 | |
1000415a: e767 b 0x1000402c <core::fmt::Formatter::pad+0x258> @ imm = #-306 | |
1000415c: 1c5b adds r3, r3, #1 | |
1000415e: 5628 ldrsb r0, [r5, r0] | |
10004160: 42a0 cmp r0, r4 | |
10004162: dc00 bgt 0x10004166 <core::fmt::Formatter::pad+0x392> @ imm = #0 | |
10004164: e766 b 0x10004034 <core::fmt::Formatter::pad+0x260> @ imm = #-308 | |
10004166: 1c5b adds r3, r3, #1 | |
10004168: 980f ldr r0, [sp, #60] | |
1000416a: 5628 ldrsb r0, [r5, r0] | |
1000416c: 42a0 cmp r0, r4 | |
1000416e: dc00 bgt 0x10004172 <core::fmt::Formatter::pad+0x39e> @ imm = #0 | |
10004170: e765 b 0x1000403e <core::fmt::Formatter::pad+0x26a> @ imm = #-310 | |
10004172: 1c5b adds r3, r3, #1 | |
10004174: 9802 ldr r0, [sp, #8] | |
10004176: 2801 cmp r0, #1 | |
10004178: d100 bne 0x1000417c <core::fmt::Formatter::pad+0x3a8> @ imm = #0 | |
1000417a: e764 b 0x10004046 <core::fmt::Formatter::pad+0x272> @ imm = #-312 | |
1000417c: 980e ldr r0, [sp, #56] | |
1000417e: 5628 ldrsb r0, [r5, r0] | |
10004180: 9a09 ldr r2, [sp, #36] | |
10004182: 56aa ldrsb r2, [r5, r2] | |
10004184: 42a2 cmp r2, r4 | |
10004186: dc10 bgt 0x100041aa <core::fmt::Formatter::pad+0x3d6> @ imm = #32 | |
10004188: 42a0 cmp r0, r4 | |
1000418a: 9a06 ldr r2, [sp, #24] | |
1000418c: dc11 bgt 0x100041b2 <core::fmt::Formatter::pad+0x3de> @ imm = #34 | |
1000418e: 980b ldr r0, [sp, #44] | |
10004190: 5628 ldrsb r0, [r5, r0] | |
10004192: 42a0 cmp r0, r4 | |
10004194: dc12 bgt 0x100041bc <core::fmt::Formatter::pad+0x3e8> @ imm = #36 | |
10004196: 980a ldr r0, [sp, #40] | |
10004198: 5628 ldrsb r0, [r5, r0] | |
1000419a: 42a0 cmp r0, r4 | |
1000419c: dc13 bgt 0x100041c6 <core::fmt::Formatter::pad+0x3f2> @ imm = #38 | |
1000419e: 9802 ldr r0, [sp, #8] | |
100041a0: 2802 cmp r0, #2 | |
100041a2: d114 bne 0x100041ce <core::fmt::Formatter::pad+0x3fa> @ imm = #40 | |
100041a4: 3508 adds r5, #8 | |
100041a6: e750 b 0x1000404a <core::fmt::Formatter::pad+0x276> @ imm = #-352 | |
100041a8: e089 b 0x100042be <core::fmt::Formatter::pad+0x4ea> @ imm = #274 | |
100041aa: 1c5b adds r3, r3, #1 | |
100041ac: 42a0 cmp r0, r4 | |
100041ae: 9a06 ldr r2, [sp, #24] | |
100041b0: dded ble 0x1000418e <core::fmt::Formatter::pad+0x3ba> @ imm = #-38 | |
100041b2: 1c5b adds r3, r3, #1 | |
100041b4: 980b ldr r0, [sp, #44] | |
100041b6: 5628 ldrsb r0, [r5, r0] | |
100041b8: 42a0 cmp r0, r4 | |
100041ba: ddec ble 0x10004196 <core::fmt::Formatter::pad+0x3c2> @ imm = #-40 | |
100041bc: 1c5b adds r3, r3, #1 | |
100041be: 980a ldr r0, [sp, #40] | |
100041c0: 5628 ldrsb r0, [r5, r0] | |
100041c2: 42a0 cmp r0, r4 | |
100041c4: ddeb ble 0x1000419e <core::fmt::Formatter::pad+0x3ca> @ imm = #-42 | |
100041c6: 1c5b adds r3, r3, #1 | |
100041c8: 9802 ldr r0, [sp, #8] | |
100041ca: 2802 cmp r0, #2 | |
100041cc: d0ea beq 0x100041a4 <core::fmt::Formatter::pad+0x3d0> @ imm = #-44 | |
100041ce: 5668 ldrsb r0, [r5, r1] | |
100041d0: 9908 ldr r1, [sp, #32] | |
100041d2: 5669 ldrsb r1, [r5, r1] | |
100041d4: 42a1 cmp r1, r4 | |
100041d6: dc4a bgt 0x1000426e <core::fmt::Formatter::pad+0x49a> @ imm = #148 | |
100041d8: 42a0 cmp r0, r4 | |
100041da: 990f ldr r1, [sp, #60] | |
100041dc: dc4b bgt 0x10004276 <core::fmt::Formatter::pad+0x4a2> @ imm = #150 | |
100041de: 9807 ldr r0, [sp, #28] | |
100041e0: 5628 ldrsb r0, [r5, r0] | |
100041e2: 42a0 cmp r0, r4 | |
100041e4: dc4c bgt 0x10004280 <core::fmt::Formatter::pad+0x4ac> @ imm = #152 | |
100041e6: 57a8 ldrsb r0, [r5, r6] | |
100041e8: 42a0 cmp r0, r4 | |
100041ea: dd00 ble 0x100041ee <core::fmt::Formatter::pad+0x41a> @ imm = #0 | |
100041ec: 1c5b adds r3, r3, #1 | |
100041ee: 350c adds r5, #12 | |
100041f0: 9804 ldr r0, [sp, #16] | |
100041f2: 4001 ands r1, r0 | |
100041f4: d000 beq 0x100041f8 <core::fmt::Formatter::pad+0x424> @ imm = #0 | |
100041f6: e72d b 0x10004054 <core::fmt::Formatter::pad+0x280> @ imm = #-422 | |
100041f8: 9d04 ldr r5, [sp, #16] | |
100041fa: 9803 ldr r0, [sp, #12] | |
100041fc: 4298 cmp r0, r3 | |
100041fe: d87a bhi 0x100042f6 <core::fmt::Formatter::pad+0x522> @ imm = #244 | |
10004200: e3a1 b 0x10004946 <core::fmt::Formatter::pad+0xb72> @ imm = #1858 | |
10004202: d100 bne 0x10004206 <core::fmt::Formatter::pad+0x432> @ imm = #0 | |
10004204: 4614 mov r4, r2 | |
10004206: 2c00 cmp r4, #0 | |
10004208: d000 beq 0x1000420c <core::fmt::Formatter::pad+0x438> @ imm = #0 | |
1000420a: 460d mov r5, r1 | |
1000420c: 2c00 cmp r4, #0 | |
1000420e: 9b05 ldr r3, [sp, #20] | |
10004210: d100 bne 0x10004214 <core::fmt::Formatter::pad+0x440> @ imm = #0 | |
10004212: e639 b 0x10003e88 <core::fmt::Formatter::pad+0xb4> @ imm = #-910 | |
10004214: 4622 mov r2, r4 | |
10004216: e637 b 0x10003e88 <core::fmt::Formatter::pad+0xb4> @ imm = #-914 | |
10004218: 2205 movs r2, #5 | |
1000421a: 9e06 ldr r6, [sp, #24] | |
1000421c: 56b4 ldrsb r4, [r6, r2] | |
1000421e: 2204 movs r2, #4 | |
10004220: 56b2 ldrsb r2, [r6, r2] | |
10004222: 4282 cmp r2, r0 | |
10004224: dd00 ble 0x10004228 <core::fmt::Formatter::pad+0x454> @ imm = #0 | |
10004226: 1c5b adds r3, r3, #1 | |
10004228: 4284 cmp r4, r0 | |
1000422a: 9e10 ldr r6, [sp, #64] | |
1000422c: dd00 ble 0x10004230 <core::fmt::Formatter::pad+0x45c> @ imm = #0 | |
1000422e: 1c5b adds r3, r3, #1 | |
10004230: 2206 movs r2, #6 | |
10004232: 9c06 ldr r4, [sp, #24] | |
10004234: 56a2 ldrsb r2, [r4, r2] | |
10004236: 4282 cmp r2, r0 | |
10004238: dd00 ble 0x1000423c <core::fmt::Formatter::pad+0x468> @ imm = #0 | |
1000423a: 1c5b adds r3, r3, #1 | |
1000423c: 2207 movs r2, #7 | |
1000423e: 9c06 ldr r4, [sp, #24] | |
10004240: 56a2 ldrsb r2, [r4, r2] | |
10004242: 4282 cmp r2, r0 | |
10004244: dd00 ble 0x10004248 <core::fmt::Formatter::pad+0x474> @ imm = #0 | |
10004246: 1c5b adds r3, r3, #1 | |
10004248: 2e02 cmp r6, #2 | |
1000424a: d11e bne 0x1000428a <core::fmt::Formatter::pad+0x4b6> @ imm = #60 | |
1000424c: 9a06 ldr r2, [sp, #24] | |
1000424e: 4610 mov r0, r2 | |
10004250: 3008 adds r0, #8 | |
10004252: e034 b 0x100042be <core::fmt::Formatter::pad+0x4ea> @ imm = #104 | |
10004254: 1f30 subs r0, r6, #4 | |
10004256: 0881 lsrs r1, r0, #2 | |
10004258: 1c4a adds r2, r1, #1 | |
1000425a: 4611 mov r1, r2 | |
1000425c: 4021 ands r1, r4 | |
1000425e: 9109 str r1, [sp, #36] | |
10004260: 280c cmp r0, #12 | |
10004262: d300 blo 0x10004266 <core::fmt::Formatter::pad+0x492> @ imm = #0 | |
10004264: e09a b 0x1000439c <core::fmt::Formatter::pad+0x5c8> @ imm = #308 | |
10004266: 2600 movs r6, #0 | |
10004268: 9a06 ldr r2, [sp, #24] | |
1000426a: 4611 mov r1, r2 | |
1000426c: e12b b 0x100044c6 <core::fmt::Formatter::pad+0x6f2> @ imm = #598 | |
1000426e: 1c5b adds r3, r3, #1 | |
10004270: 42a0 cmp r0, r4 | |
10004272: 990f ldr r1, [sp, #60] | |
10004274: ddb3 ble 0x100041de <core::fmt::Formatter::pad+0x40a> @ imm = #-154 | |
10004276: 1c5b adds r3, r3, #1 | |
10004278: 9807 ldr r0, [sp, #28] | |
1000427a: 5628 ldrsb r0, [r5, r0] | |
1000427c: 42a0 cmp r0, r4 | |
1000427e: ddb2 ble 0x100041e6 <core::fmt::Formatter::pad+0x412> @ imm = #-156 | |
10004280: 1c5b adds r3, r3, #1 | |
10004282: 57a8 ldrsb r0, [r5, r6] | |
10004284: 42a0 cmp r0, r4 | |
10004286: dcb1 bgt 0x100041ec <core::fmt::Formatter::pad+0x418> @ imm = #-158 | |
10004288: e7b1 b 0x100041ee <core::fmt::Formatter::pad+0x41a> @ imm = #-158 | |
1000428a: 2209 movs r2, #9 | |
1000428c: 9e06 ldr r6, [sp, #24] | |
1000428e: 56b2 ldrsb r2, [r6, r2] | |
10004290: 2408 movs r4, #8 | |
10004292: 5734 ldrsb r4, [r6, r4] | |
10004294: 4284 cmp r4, r0 | |
10004296: dd00 ble 0x1000429a <core::fmt::Formatter::pad+0x4c6> @ imm = #0 | |
10004298: 1c5b adds r3, r3, #1 | |
1000429a: 4282 cmp r2, r0 | |
1000429c: dd00 ble 0x100042a0 <core::fmt::Formatter::pad+0x4cc> @ imm = #0 | |
1000429e: 1c5b adds r3, r3, #1 | |
100042a0: 220a movs r2, #10 | |
100042a2: 9c06 ldr r4, [sp, #24] | |
100042a4: 56a2 ldrsb r2, [r4, r2] | |
100042a6: 4282 cmp r2, r0 | |
100042a8: dd00 ble 0x100042ac <core::fmt::Formatter::pad+0x4d8> @ imm = #0 | |
100042aa: 1c5b adds r3, r3, #1 | |
100042ac: 220b movs r2, #11 | |
100042ae: 9c06 ldr r4, [sp, #24] | |
100042b0: 56a2 ldrsb r2, [r4, r2] | |
100042b2: 4282 cmp r2, r0 | |
100042b4: dd00 ble 0x100042b8 <core::fmt::Formatter::pad+0x4e4> @ imm = #0 | |
100042b6: 1c5b adds r3, r3, #1 | |
100042b8: 9a06 ldr r2, [sp, #24] | |
100042ba: 4610 mov r0, r2 | |
100042bc: 300c adds r0, #12 | |
100042be: 2900 cmp r1, #0 | |
100042c0: d015 beq 0x100042ee <core::fmt::Formatter::pad+0x51a> @ imm = #42 | |
100042c2: 2200 movs r2, #0 | |
100042c4: 5684 ldrsb r4, [r0, r2] | |
100042c6: 2240 movs r2, #64 | |
100042c8: 43d2 mvns r2, r2 | |
100042ca: 4294 cmp r4, r2 | |
100042cc: dd00 ble 0x100042d0 <core::fmt::Formatter::pad+0x4fc> @ imm = #0 | |
100042ce: 1c5b adds r3, r3, #1 | |
100042d0: 2901 cmp r1, #1 | |
100042d2: d00b beq 0x100042ec <core::fmt::Formatter::pad+0x518> @ imm = #22 | |
100042d4: 2401 movs r4, #1 | |
100042d6: 5704 ldrsb r4, [r0, r4] | |
100042d8: 4294 cmp r4, r2 | |
100042da: dd00 ble 0x100042de <core::fmt::Formatter::pad+0x50a> @ imm = #0 | |
100042dc: 1c5b adds r3, r3, #1 | |
100042de: 2902 cmp r1, #2 | |
100042e0: d004 beq 0x100042ec <core::fmt::Formatter::pad+0x518> @ imm = #8 | |
100042e2: 2102 movs r1, #2 | |
100042e4: 5640 ldrsb r0, [r0, r1] | |
100042e6: 4290 cmp r0, r2 | |
100042e8: dd00 ble 0x100042ec <core::fmt::Formatter::pad+0x518> @ imm = #0 | |
100042ea: 1c5b adds r3, r3, #1 | |
100042ec: 9a06 ldr r2, [sp, #24] | |
100042ee: 9803 ldr r0, [sp, #12] | |
100042f0: 4298 cmp r0, r3 | |
100042f2: d800 bhi 0x100042f6 <core::fmt::Formatter::pad+0x522> @ imm = #0 | |
100042f4: e327 b 0x10004946 <core::fmt::Formatter::pad+0xb72> @ imm = #1614 | |
100042f6: 2020 movs r0, #32 | |
100042f8: 9905 ldr r1, [sp, #20] | |
100042fa: 5c09 ldrb r1, [r1, r0] | |
100042fc: 2903 cmp r1, #3 | |
100042fe: d100 bne 0x10004302 <core::fmt::Formatter::pad+0x52e> @ imm = #0 | |
10004300: 2100 movs r1, #0 | |
10004302: 9803 ldr r0, [sp, #12] | |
10004304: 1ac0 subs r0, r0, r3 | |
10004306: 078a lsls r2, r1, #30 | |
10004308: d005 beq 0x10004316 <core::fmt::Formatter::pad+0x542> @ imm = #10 | |
1000430a: 2901 cmp r1, #1 | |
1000430c: 9a05 ldr r2, [sp, #20] | |
1000430e: d106 bne 0x1000431e <core::fmt::Formatter::pad+0x54a> @ imm = #12 | |
10004310: 2100 movs r1, #0 | |
10004312: 910f str r1, [sp, #60] | |
10004314: e008 b 0x10004328 <core::fmt::Formatter::pad+0x554> @ imm = #16 | |
10004316: 900f str r0, [sp, #60] | |
10004318: 4608 mov r0, r1 | |
1000431a: 9a05 ldr r2, [sp, #20] | |
1000431c: e004 b 0x10004328 <core::fmt::Formatter::pad+0x554> @ imm = #8 | |
1000431e: 0841 lsrs r1, r0, #1 | |
10004320: 1c40 adds r0, r0, #1 | |
10004322: 0840 lsrs r0, r0, #1 | |
10004324: 900f str r0, [sp, #60] | |
10004326: 4608 mov r0, r1 | |
10004328: 1c44 adds r4, r0, #1 | |
1000432a: 69d5 ldr r5, [r2, #28] | |
1000432c: 6810 ldr r0, [r2] | |
1000432e: 9010 str r0, [sp, #64] | |
10004330: 6856 ldr r6, [r2, #4] | |
10004332: 2001 movs r0, #1 | |
10004334: 900e str r0, [sp, #56] | |
10004336: 1e64 subs r4, r4, #1 | |
10004338: d006 beq 0x10004348 <core::fmt::Formatter::pad+0x574> @ imm = #12 | |
1000433a: 6932 ldr r2, [r6, #16] | |
1000433c: 9810 ldr r0, [sp, #64] | |
1000433e: 4629 mov r1, r5 | |
10004340: 4790 blx r2 | |
10004342: 2800 cmp r0, #0 | |
10004344: d0f7 beq 0x10004336 <core::fmt::Formatter::pad+0x562> @ imm = #-18 | |
10004346: e003 b 0x10004350 <core::fmt::Formatter::pad+0x57c> @ imm = #6 | |
10004348: 2011 movs r0, #17 | |
1000434a: 0400 lsls r0, r0, #16 | |
1000434c: 4285 cmp r5, r0 | |
1000434e: d102 bne 0x10004356 <core::fmt::Formatter::pad+0x582> @ imm = #4 | |
10004350: 980e ldr r0, [sp, #56] | |
10004352: b011 add sp, #68 | |
10004354: bdf0 pop {r4, r5, r6, r7, pc} | |
10004356: 68f3 ldr r3, [r6, #12] | |
10004358: 9810 ldr r0, [sp, #64] | |
1000435a: 9906 ldr r1, [sp, #24] | |
1000435c: 9a04 ldr r2, [sp, #16] | |
1000435e: 4798 blx r3 | |
10004360: 2800 cmp r0, #0 | |
10004362: 980e ldr r0, [sp, #56] | |
10004364: d000 beq 0x10004368 <core::fmt::Formatter::pad+0x594> @ imm = #0 | |
10004366: e5ac b 0x10003ec2 <core::fmt::Formatter::pad+0xee> @ imm = #-1192 | |
10004368: 2400 movs r4, #0 | |
1000436a: 990f ldr r1, [sp, #60] | |
1000436c: 42a1 cmp r1, r4 | |
1000436e: d009 beq 0x10004384 <core::fmt::Formatter::pad+0x5b0> @ imm = #18 | |
10004370: 6932 ldr r2, [r6, #16] | |
10004372: 9810 ldr r0, [sp, #64] | |
10004374: 4629 mov r1, r5 | |
10004376: 4790 blx r2 | |
10004378: 1c64 adds r4, r4, #1 | |
1000437a: 2800 cmp r0, #0 | |
1000437c: d0f5 beq 0x1000436a <core::fmt::Formatter::pad+0x596> @ imm = #-22 | |
1000437e: 1e60 subs r0, r4, #1 | |
10004380: 990f ldr r1, [sp, #60] | |
10004382: e000 b 0x10004386 <core::fmt::Formatter::pad+0x5b2> @ imm = #0 | |
10004384: 4608 mov r0, r1 | |
10004386: 4288 cmp r0, r1 | |
10004388: d302 blo 0x10004390 <core::fmt::Formatter::pad+0x5bc> @ imm = #4 | |
1000438a: 2000 movs r0, #0 | |
1000438c: b011 add sp, #68 | |
1000438e: bdf0 pop {r4, r5, r6, r7, pc} | |
10004390: 2001 movs r0, #1 | |
10004392: b011 add sp, #68 | |
10004394: bdf0 pop {r4, r5, r6, r7, pc} | |
10004396: 9d04 ldr r5, [sp, #16] | |
10004398: 9a06 ldr r2, [sp, #24] | |
1000439a: e574 b 0x10003e86 <core::fmt::Formatter::pad+0xb2> @ imm = #-1304 | |
1000439c: 43a2 bics r2, r4 | |
1000439e: 2600 movs r6, #0 | |
100043a0: 9610 str r6, [sp, #64] | |
100043a2: 9906 ldr r1, [sp, #24] | |
100043a4: e003 b 0x100043ae <core::fmt::Formatter::pad+0x5da> @ imm = #6 | |
100043a6: 3110 adds r1, #16 | |
100043a8: 1f12 subs r2, r2, #4 | |
100043aa: d100 bne 0x100043ae <core::fmt::Formatter::pad+0x5da> @ imm = #0 | |
100043ac: e08a b 0x100044c4 <core::fmt::Formatter::pad+0x6f0> @ imm = #276 | |
100043ae: 461c mov r4, r3 | |
100043b0: 2301 movs r3, #1 | |
100043b2: 9810 ldr r0, [sp, #64] | |
100043b4: 5608 ldrsb r0, [r1, r0] | |
100043b6: 2540 movs r5, #64 | |
100043b8: 43ed mvns r5, r5 | |
100043ba: 42a8 cmp r0, r5 | |
100043bc: dd00 ble 0x100043c0 <core::fmt::Formatter::pad+0x5ec> @ imm = #0 | |
100043be: 1c76 adds r6, r6, #1 | |
100043c0: 56c8 ldrsb r0, [r1, r3] | |
100043c2: 42a8 cmp r0, r5 | |
100043c4: dd00 ble 0x100043c8 <core::fmt::Formatter::pad+0x5f4> @ imm = #0 | |
100043c6: 1c76 adds r6, r6, #1 | |
100043c8: 4623 mov r3, r4 | |
100043ca: 2002 movs r0, #2 | |
100043cc: 5608 ldrsb r0, [r1, r0] | |
100043ce: 42a8 cmp r0, r5 | |
100043d0: dc34 bgt 0x1000443c <core::fmt::Formatter::pad+0x668> @ imm = #104 | |
100043d2: 980f ldr r0, [sp, #60] | |
100043d4: 5608 ldrsb r0, [r1, r0] | |
100043d6: 42a8 cmp r0, r5 | |
100043d8: dc35 bgt 0x10004446 <core::fmt::Formatter::pad+0x672> @ imm = #106 | |
100043da: 2004 movs r0, #4 | |
100043dc: 5608 ldrsb r0, [r1, r0] | |
100043de: 42a8 cmp r0, r5 | |
100043e0: dc36 bgt 0x10004450 <core::fmt::Formatter::pad+0x67c> @ imm = #108 | |
100043e2: 2005 movs r0, #5 | |
100043e4: 5608 ldrsb r0, [r1, r0] | |
100043e6: 42a8 cmp r0, r5 | |
100043e8: dc37 bgt 0x1000445a <core::fmt::Formatter::pad+0x686> @ imm = #110 | |
100043ea: 2006 movs r0, #6 | |
100043ec: 5608 ldrsb r0, [r1, r0] | |
100043ee: 42a8 cmp r0, r5 | |
100043f0: dc38 bgt 0x10004464 <core::fmt::Formatter::pad+0x690> @ imm = #112 | |
100043f2: 2007 movs r0, #7 | |
100043f4: 5608 ldrsb r0, [r1, r0] | |
100043f6: 42a8 cmp r0, r5 | |
100043f8: dc39 bgt 0x1000446e <core::fmt::Formatter::pad+0x69a> @ imm = #114 | |
100043fa: 2008 movs r0, #8 | |
100043fc: 5608 ldrsb r0, [r1, r0] | |
100043fe: 42a8 cmp r0, r5 | |
10004400: dc3a bgt 0x10004478 <core::fmt::Formatter::pad+0x6a4> @ imm = #116 | |
10004402: 2009 movs r0, #9 | |
10004404: 5608 ldrsb r0, [r1, r0] | |
10004406: 42a8 cmp r0, r5 | |
10004408: dc3b bgt 0x10004482 <core::fmt::Formatter::pad+0x6ae> @ imm = #118 | |
1000440a: 200a movs r0, #10 | |
1000440c: 5608 ldrsb r0, [r1, r0] | |
1000440e: 42a8 cmp r0, r5 | |
10004410: dc3c bgt 0x1000448c <core::fmt::Formatter::pad+0x6b8> @ imm = #120 | |
10004412: 200b movs r0, #11 | |
10004414: 5608 ldrsb r0, [r1, r0] | |
10004416: 42a8 cmp r0, r5 | |
10004418: dc3d bgt 0x10004496 <core::fmt::Formatter::pad+0x6c2> @ imm = #122 | |
1000441a: 200c movs r0, #12 | |
1000441c: 5608 ldrsb r0, [r1, r0] | |
1000441e: 42a8 cmp r0, r5 | |
10004420: dc3e bgt 0x100044a0 <core::fmt::Formatter::pad+0x6cc> @ imm = #124 | |
10004422: 200d movs r0, #13 | |
10004424: 5608 ldrsb r0, [r1, r0] | |
10004426: 42a8 cmp r0, r5 | |
10004428: dc3f bgt 0x100044aa <core::fmt::Formatter::pad+0x6d6> @ imm = #126 | |
1000442a: 200e movs r0, #14 | |
1000442c: 5608 ldrsb r0, [r1, r0] | |
1000442e: 42a8 cmp r0, r5 | |
10004430: dc40 bgt 0x100044b4 <core::fmt::Formatter::pad+0x6e0> @ imm = #128 | |
10004432: 200f movs r0, #15 | |
10004434: 5608 ldrsb r0, [r1, r0] | |
10004436: 42a8 cmp r0, r5 | |
10004438: ddb5 ble 0x100043a6 <core::fmt::Formatter::pad+0x5d2> @ imm = #-150 | |
1000443a: e041 b 0x100044c0 <core::fmt::Formatter::pad+0x6ec> @ imm = #130 | |
1000443c: 1c76 adds r6, r6, #1 | |
1000443e: 980f ldr r0, [sp, #60] | |
10004440: 5608 ldrsb r0, [r1, r0] | |
10004442: 42a8 cmp r0, r5 | |
10004444: ddc9 ble 0x100043da <core::fmt::Formatter::pad+0x606> @ imm = #-110 | |
10004446: 1c76 adds r6, r6, #1 | |
10004448: 2004 movs r0, #4 | |
1000444a: 5608 ldrsb r0, [r1, r0] | |
1000444c: 42a8 cmp r0, r5 | |
1000444e: ddc8 ble 0x100043e2 <core::fmt::Formatter::pad+0x60e> @ imm = #-112 | |
10004450: 1c76 adds r6, r6, #1 | |
10004452: 2005 movs r0, #5 | |
10004454: 5608 ldrsb r0, [r1, r0] | |
10004456: 42a8 cmp r0, r5 | |
10004458: ddc7 ble 0x100043ea <core::fmt::Formatter::pad+0x616> @ imm = #-114 | |
1000445a: 1c76 adds r6, r6, #1 | |
1000445c: 2006 movs r0, #6 | |
1000445e: 5608 ldrsb r0, [r1, r0] | |
10004460: 42a8 cmp r0, r5 | |
10004462: ddc6 ble 0x100043f2 <core::fmt::Formatter::pad+0x61e> @ imm = #-116 | |
10004464: 1c76 adds r6, r6, #1 | |
10004466: 2007 movs r0, #7 | |
10004468: 5608 ldrsb r0, [r1, r0] | |
1000446a: 42a8 cmp r0, r5 | |
1000446c: ddc5 ble 0x100043fa <core::fmt::Formatter::pad+0x626> @ imm = #-118 | |
1000446e: 1c76 adds r6, r6, #1 | |
10004470: 2008 movs r0, #8 | |
10004472: 5608 ldrsb r0, [r1, r0] | |
10004474: 42a8 cmp r0, r5 | |
10004476: ddc4 ble 0x10004402 <core::fmt::Formatter::pad+0x62e> @ imm = #-120 | |
10004478: 1c76 adds r6, r6, #1 | |
1000447a: 2009 movs r0, #9 | |
1000447c: 5608 ldrsb r0, [r1, r0] | |
1000447e: 42a8 cmp r0, r5 | |
10004480: ddc3 ble 0x1000440a <core::fmt::Formatter::pad+0x636> @ imm = #-122 | |
10004482: 1c76 adds r6, r6, #1 | |
10004484: 200a movs r0, #10 | |
10004486: 5608 ldrsb r0, [r1, r0] | |
10004488: 42a8 cmp r0, r5 | |
1000448a: ddc2 ble 0x10004412 <core::fmt::Formatter::pad+0x63e> @ imm = #-124 | |
1000448c: 1c76 adds r6, r6, #1 | |
1000448e: 200b movs r0, #11 | |
10004490: 5608 ldrsb r0, [r1, r0] | |
10004492: 42a8 cmp r0, r5 | |
10004494: ddc1 ble 0x1000441a <core::fmt::Formatter::pad+0x646> @ imm = #-126 | |
10004496: 1c76 adds r6, r6, #1 | |
10004498: 200c movs r0, #12 | |
1000449a: 5608 ldrsb r0, [r1, r0] | |
1000449c: 42a8 cmp r0, r5 | |
1000449e: ddc0 ble 0x10004422 <core::fmt::Formatter::pad+0x64e> @ imm = #-128 | |
100044a0: 1c76 adds r6, r6, #1 | |
100044a2: 200d movs r0, #13 | |
100044a4: 5608 ldrsb r0, [r1, r0] | |
100044a6: 42a8 cmp r0, r5 | |
100044a8: ddbf ble 0x1000442a <core::fmt::Formatter::pad+0x656> @ imm = #-130 | |
100044aa: 1c76 adds r6, r6, #1 | |
100044ac: 200e movs r0, #14 | |
100044ae: 5608 ldrsb r0, [r1, r0] | |
100044b0: 42a8 cmp r0, r5 | |
100044b2: ddbe ble 0x10004432 <core::fmt::Formatter::pad+0x65e> @ imm = #-132 | |
100044b4: 1c76 adds r6, r6, #1 | |
100044b6: 200f movs r0, #15 | |
100044b8: 5608 ldrsb r0, [r1, r0] | |
100044ba: 42a8 cmp r0, r5 | |
100044bc: dc00 bgt 0x100044c0 <core::fmt::Formatter::pad+0x6ec> @ imm = #0 | |
100044be: e772 b 0x100043a6 <core::fmt::Formatter::pad+0x5d2> @ imm = #-284 | |
100044c0: 1c76 adds r6, r6, #1 | |
100044c2: e770 b 0x100043a6 <core::fmt::Formatter::pad+0x5d2> @ imm = #-288 | |
100044c4: 9a06 ldr r2, [sp, #24] | |
100044c6: 9809 ldr r0, [sp, #36] | |
100044c8: 2800 cmp r0, #0 | |
100044ca: 9c0a ldr r4, [sp, #40] | |
100044cc: d067 beq 0x1000459e <core::fmt::Formatter::pad+0x7ca> @ imm = #206 | |
100044ce: 2001 movs r0, #1 | |
100044d0: 560a ldrsb r2, [r1, r0] | |
100044d2: 2000 movs r0, #0 | |
100044d4: 560b ldrsb r3, [r1, r0] | |
100044d6: 2040 movs r0, #64 | |
100044d8: 43c0 mvns r0, r0 | |
100044da: 4283 cmp r3, r0 | |
100044dc: dc0f bgt 0x100044fe <core::fmt::Formatter::pad+0x72a> @ imm = #30 | |
100044de: 4282 cmp r2, r0 | |
100044e0: dc10 bgt 0x10004504 <core::fmt::Formatter::pad+0x730> @ imm = #32 | |
100044e2: 2202 movs r2, #2 | |
100044e4: 568a ldrsb r2, [r1, r2] | |
100044e6: 4282 cmp r2, r0 | |
100044e8: dc11 bgt 0x1000450e <core::fmt::Formatter::pad+0x73a> @ imm = #34 | |
100044ea: 9a0f ldr r2, [sp, #60] | |
100044ec: 568a ldrsb r2, [r1, r2] | |
100044ee: 4282 cmp r2, r0 | |
100044f0: dc12 bgt 0x10004518 <core::fmt::Formatter::pad+0x744> @ imm = #36 | |
100044f2: 9a06 ldr r2, [sp, #24] | |
100044f4: 9b09 ldr r3, [sp, #36] | |
100044f6: 2b01 cmp r3, #1 | |
100044f8: d113 bne 0x10004522 <core::fmt::Formatter::pad+0x74e> @ imm = #38 | |
100044fa: 1d09 adds r1, r1, #4 | |
100044fc: e04f b 0x1000459e <core::fmt::Formatter::pad+0x7ca> @ imm = #158 | |
100044fe: 1c76 adds r6, r6, #1 | |
10004500: 4282 cmp r2, r0 | |
10004502: ddee ble 0x100044e2 <core::fmt::Formatter::pad+0x70e> @ imm = #-36 | |
10004504: 1c76 adds r6, r6, #1 | |
10004506: 2202 movs r2, #2 | |
10004508: 568a ldrsb r2, [r1, r2] | |
1000450a: 4282 cmp r2, r0 | |
1000450c: dded ble 0x100044ea <core::fmt::Formatter::pad+0x716> @ imm = #-38 | |
1000450e: 1c76 adds r6, r6, #1 | |
10004510: 9a0f ldr r2, [sp, #60] | |
10004512: 568a ldrsb r2, [r1, r2] | |
10004514: 4282 cmp r2, r0 | |
10004516: ddec ble 0x100044f2 <core::fmt::Formatter::pad+0x71e> @ imm = #-40 | |
10004518: 1c76 adds r6, r6, #1 | |
1000451a: 9a06 ldr r2, [sp, #24] | |
1000451c: 9b09 ldr r3, [sp, #36] | |
1000451e: 2b01 cmp r3, #1 | |
10004520: d0eb beq 0x100044fa <core::fmt::Formatter::pad+0x726> @ imm = #-42 | |
10004522: 2205 movs r2, #5 | |
10004524: 568a ldrsb r2, [r1, r2] | |
10004526: 2304 movs r3, #4 | |
10004528: 56cb ldrsb r3, [r1, r3] | |
1000452a: 4283 cmp r3, r0 | |
1000452c: dc0f bgt 0x1000454e <core::fmt::Formatter::pad+0x77a> @ imm = #30 | |
1000452e: 4282 cmp r2, r0 | |
10004530: dc10 bgt 0x10004554 <core::fmt::Formatter::pad+0x780> @ imm = #32 | |
10004532: 2206 movs r2, #6 | |
10004534: 568a ldrsb r2, [r1, r2] | |
10004536: 4282 cmp r2, r0 | |
10004538: dc11 bgt 0x1000455e <core::fmt::Formatter::pad+0x78a> @ imm = #34 | |
1000453a: 2207 movs r2, #7 | |
1000453c: 568a ldrsb r2, [r1, r2] | |
1000453e: 4282 cmp r2, r0 | |
10004540: dc12 bgt 0x10004568 <core::fmt::Formatter::pad+0x794> @ imm = #36 | |
10004542: 9a06 ldr r2, [sp, #24] | |
10004544: 9b09 ldr r3, [sp, #36] | |
10004546: 2b02 cmp r3, #2 | |
10004548: d113 bne 0x10004572 <core::fmt::Formatter::pad+0x79e> @ imm = #38 | |
1000454a: 3108 adds r1, #8 | |
1000454c: e027 b 0x1000459e <core::fmt::Formatter::pad+0x7ca> @ imm = #78 | |
1000454e: 1c76 adds r6, r6, #1 | |
10004550: 4282 cmp r2, r0 | |
10004552: ddee ble 0x10004532 <core::fmt::Formatter::pad+0x75e> @ imm = #-36 | |
10004554: 1c76 adds r6, r6, #1 | |
10004556: 2206 movs r2, #6 | |
10004558: 568a ldrsb r2, [r1, r2] | |
1000455a: 4282 cmp r2, r0 | |
1000455c: dded ble 0x1000453a <core::fmt::Formatter::pad+0x766> @ imm = #-38 | |
1000455e: 1c76 adds r6, r6, #1 | |
10004560: 2207 movs r2, #7 | |
10004562: 568a ldrsb r2, [r1, r2] | |
10004564: 4282 cmp r2, r0 | |
10004566: ddec ble 0x10004542 <core::fmt::Formatter::pad+0x76e> @ imm = #-40 | |
10004568: 1c76 adds r6, r6, #1 | |
1000456a: 9a06 ldr r2, [sp, #24] | |
1000456c: 9b09 ldr r3, [sp, #36] | |
1000456e: 2b02 cmp r3, #2 | |
10004570: d0eb beq 0x1000454a <core::fmt::Formatter::pad+0x776> @ imm = #-42 | |
10004572: 2209 movs r2, #9 | |
10004574: 568a ldrsb r2, [r1, r2] | |
10004576: 2308 movs r3, #8 | |
10004578: 56cb ldrsb r3, [r1, r3] | |
1000457a: 4283 cmp r3, r0 | |
1000457c: dd00 ble 0x10004580 <core::fmt::Formatter::pad+0x7ac> @ imm = #0 | |
1000457e: e1e7 b 0x10004950 <core::fmt::Formatter::pad+0xb7c> @ imm = #974 | |
10004580: 4282 cmp r2, r0 | |
10004582: dd00 ble 0x10004586 <core::fmt::Formatter::pad+0x7b2> @ imm = #0 | |
10004584: e1e8 b 0x10004958 <core::fmt::Formatter::pad+0xb84> @ imm = #976 | |
10004586: 220a movs r2, #10 | |
10004588: 568a ldrsb r2, [r1, r2] | |
1000458a: 4282 cmp r2, r0 | |
1000458c: dd00 ble 0x10004590 <core::fmt::Formatter::pad+0x7bc> @ imm = #0 | |
1000458e: e1e9 b 0x10004964 <core::fmt::Formatter::pad+0xb90> @ imm = #978 | |
10004590: 220b movs r2, #11 | |
10004592: 568a ldrsb r2, [r1, r2] | |
10004594: 4282 cmp r2, r0 | |
10004596: dd00 ble 0x1000459a <core::fmt::Formatter::pad+0x7c6> @ imm = #0 | |
10004598: 1c76 adds r6, r6, #1 | |
1000459a: 9a06 ldr r2, [sp, #24] | |
1000459c: 310c adds r1, #12 | |
1000459e: 2c00 cmp r4, #0 | |
100045a0: d015 beq 0x100045ce <core::fmt::Formatter::pad+0x7fa> @ imm = #42 | |
100045a2: 2000 movs r0, #0 | |
100045a4: 560a ldrsb r2, [r1, r0] | |
100045a6: 2040 movs r0, #64 | |
100045a8: 43c0 mvns r0, r0 | |
100045aa: 4282 cmp r2, r0 | |
100045ac: dd00 ble 0x100045b0 <core::fmt::Formatter::pad+0x7dc> @ imm = #0 | |
100045ae: 1c76 adds r6, r6, #1 | |
100045b0: 2c01 cmp r4, #1 | |
100045b2: d00b beq 0x100045cc <core::fmt::Formatter::pad+0x7f8> @ imm = #22 | |
100045b4: 2201 movs r2, #1 | |
100045b6: 568a ldrsb r2, [r1, r2] | |
100045b8: 4282 cmp r2, r0 | |
100045ba: dd00 ble 0x100045be <core::fmt::Formatter::pad+0x7ea> @ imm = #0 | |
100045bc: 1c76 adds r6, r6, #1 | |
100045be: 2c02 cmp r4, #2 | |
100045c0: d004 beq 0x100045cc <core::fmt::Formatter::pad+0x7f8> @ imm = #8 | |
100045c2: 2202 movs r2, #2 | |
100045c4: 5689 ldrsb r1, [r1, r2] | |
100045c6: 4281 cmp r1, r0 | |
100045c8: dd00 ble 0x100045cc <core::fmt::Formatter::pad+0x7f8> @ imm = #0 | |
100045ca: 1c76 adds r6, r6, #1 | |
100045cc: 9a06 ldr r2, [sp, #24] | |
100045ce: 980b ldr r0, [sp, #44] | |
100045d0: 1814 adds r4, r2, r0 | |
100045d2: 980d ldr r0, [sp, #52] | |
100045d4: 2800 cmp r0, #0 | |
100045d6: 990f ldr r1, [sp, #60] | |
100045d8: d021 beq 0x1000461e <core::fmt::Formatter::pad+0x84a> @ imm = #66 | |
100045da: 980c ldr r0, [sp, #48] | |
100045dc: 4388 bics r0, r1 | |
100045de: 1820 adds r0, r4, r0 | |
100045e0: 2100 movs r1, #0 | |
100045e2: 910e str r1, [sp, #56] | |
100045e4: 5642 ldrsb r2, [r0, r1] | |
100045e6: 2140 movs r1, #64 | |
100045e8: 43c9 mvns r1, r1 | |
100045ea: 428a cmp r2, r1 | |
100045ec: dd01 ble 0x100045f2 <core::fmt::Formatter::pad+0x81e> @ imm = #2 | |
100045ee: 2201 movs r2, #1 | |
100045f0: 920e str r2, [sp, #56] | |
100045f2: 9a0d ldr r2, [sp, #52] | |
100045f4: 2a01 cmp r2, #1 | |
100045f6: d010 beq 0x1000461a <core::fmt::Formatter::pad+0x846> @ imm = #32 | |
100045f8: 2201 movs r2, #1 | |
100045fa: 5682 ldrsb r2, [r0, r2] | |
100045fc: 428a cmp r2, r1 | |
100045fe: dd02 ble 0x10004606 <core::fmt::Formatter::pad+0x832> @ imm = #4 | |
10004600: 9a0e ldr r2, [sp, #56] | |
10004602: 1c52 adds r2, r2, #1 | |
10004604: 920e str r2, [sp, #56] | |
10004606: 9a0d ldr r2, [sp, #52] | |
10004608: 2a02 cmp r2, #2 | |
1000460a: d006 beq 0x1000461a <core::fmt::Formatter::pad+0x846> @ imm = #12 | |
1000460c: 2202 movs r2, #2 | |
1000460e: 5680 ldrsb r0, [r0, r2] | |
10004610: 4288 cmp r0, r1 | |
10004612: dd02 ble 0x1000461a <core::fmt::Formatter::pad+0x846> @ imm = #4 | |
10004614: 980e ldr r0, [sp, #56] | |
10004616: 1c40 adds r0, r0, #1 | |
10004618: 900e str r0, [sp, #56] | |
1000461a: 9a06 ldr r2, [sp, #24] | |
1000461c: 990f ldr r1, [sp, #60] | |
1000461e: 980c ldr r0, [sp, #48] | |
10004620: 0880 lsrs r0, r0, #2 | |
10004622: 9b0e ldr r3, [sp, #56] | |
10004624: 199b adds r3, r3, r6 | |
10004626: 940e str r4, [sp, #56] | |
10004628: e015 b 0x10004656 <core::fmt::Formatter::pad+0x882> @ imm = #42 | |
1000462a: 2500 movs r5, #0 | |
1000462c: 980e ldr r0, [sp, #56] | |
1000462e: 990b ldr r1, [sp, #44] | |
10004630: 1a40 subs r0, r0, r1 | |
10004632: 9c0d ldr r4, [sp, #52] | |
10004634: 990a ldr r1, [sp, #40] | |
10004636: 1861 adds r1, r4, r1 | |
10004638: 910e str r1, [sp, #56] | |
1000463a: 0a29 lsrs r1, r5, #8 | |
1000463c: 4ace ldr r2, [pc, #824] @ 0x10004978 <$d.130+0x4> | |
1000463e: 4015 ands r5, r2 | |
10004640: 4011 ands r1, r2 | |
10004642: 1949 adds r1, r1, r5 | |
10004644: 4acb ldr r2, [pc, #812] @ 0x10004974 <$d.130> | |
10004646: 4351 muls r1, r2, r1 | |
10004648: 0c09 lsrs r1, r1, #16 | |
1000464a: 18cb adds r3, r1, r3 | |
1000464c: 9d0c ldr r5, [sp, #48] | |
1000464e: 2d00 cmp r5, #0 | |
10004650: 9a06 ldr r2, [sp, #24] | |
10004652: 990f ldr r1, [sp, #60] | |
10004654: d13e bne 0x100046d4 <core::fmt::Formatter::pad+0x900> @ imm = #124 | |
10004656: 9c0e ldr r4, [sp, #56] | |
10004658: 2800 cmp r0, #0 | |
1000465a: d100 bne 0x1000465e <core::fmt::Formatter::pad+0x88a> @ imm = #0 | |
1000465c: e5cc b 0x100041f8 <core::fmt::Formatter::pad+0x424> @ imm = #-1128 | |
1000465e: 28c0 cmp r0, #192 | |
10004660: 900e str r0, [sp, #56] | |
10004662: 4605 mov r5, r0 | |
10004664: d300 blo 0x10004668 <core::fmt::Formatter::pad+0x894> @ imm = #0 | |
10004666: 25c0 movs r5, #192 | |
10004668: 4628 mov r0, r5 | |
1000466a: 4008 ands r0, r1 | |
1000466c: 00a9 lsls r1, r5, #2 | |
1000466e: 22fc movs r2, #252 | |
10004670: 950b str r5, [sp, #44] | |
10004672: 402a ands r2, r5 | |
10004674: 0095 lsls r5, r2, #2 | |
10004676: 1966 adds r6, r4, r5 | |
10004678: 2a00 cmp r2, #0 | |
1000467a: 940d str r4, [sp, #52] | |
1000467c: 900c str r0, [sp, #48] | |
1000467e: 910a str r1, [sp, #40] | |
10004680: d0d3 beq 0x1000462a <core::fmt::Formatter::pad+0x856> @ imm = #-90 | |
10004682: 2500 movs r5, #0 | |
10004684: 4622 mov r2, r4 | |
10004686: 9310 str r3, [sp, #64] | |
10004688: 2a00 cmp r2, #0 | |
1000468a: d0cf beq 0x1000462c <core::fmt::Formatter::pad+0x858> @ imm = #-98 | |
1000468c: 4633 mov r3, r6 | |
1000468e: 6856 ldr r6, [r2, #4] | |
10004690: 09b1 lsrs r1, r6, #6 | |
10004692: 43f6 mvns r6, r6 | |
10004694: 09f6 lsrs r6, r6, #7 | |
10004696: 430e orrs r6, r1 | |
10004698: 48b8 ldr r0, [pc, #736] @ 0x1000497c <$d.130+0x8> | |
1000469a: 4006 ands r6, r0 | |
1000469c: 6811 ldr r1, [r2] | |
1000469e: 098c lsrs r4, r1, #6 | |
100046a0: 43c9 mvns r1, r1 | |
100046a2: 09c9 lsrs r1, r1, #7 | |
100046a4: 4321 orrs r1, r4 | |
100046a6: 4001 ands r1, r0 | |
100046a8: 1949 adds r1, r1, r5 | |
100046aa: 1871 adds r1, r6, r1 | |
100046ac: 461e mov r6, r3 | |
100046ae: 9b10 ldr r3, [sp, #64] | |
100046b0: 6894 ldr r4, [r2, #8] | |
100046b2: 09a5 lsrs r5, r4, #6 | |
100046b4: 43e4 mvns r4, r4 | |
100046b6: 09e4 lsrs r4, r4, #7 | |
100046b8: 432c orrs r4, r5 | |
100046ba: 4004 ands r4, r0 | |
100046bc: 1861 adds r1, r4, r1 | |
100046be: 68d4 ldr r4, [r2, #12] | |
100046c0: 09a5 lsrs r5, r4, #6 | |
100046c2: 43e4 mvns r4, r4 | |
100046c4: 09e4 lsrs r4, r4, #7 | |
100046c6: 432c orrs r4, r5 | |
100046c8: 4004 ands r4, r0 | |
100046ca: 1865 adds r5, r4, r1 | |
100046cc: 3210 adds r2, #16 | |
100046ce: 42b2 cmp r2, r6 | |
100046d0: d1da bne 0x10004688 <core::fmt::Formatter::pad+0x8b4> @ imm = #-76 | |
100046d2: e7ab b 0x1000462c <core::fmt::Formatter::pad+0x858> @ imm = #-170 | |
100046d4: 2c00 cmp r4, #0 | |
100046d6: d00d beq 0x100046f4 <core::fmt::Formatter::pad+0x920> @ imm = #26 | |
100046d8: 0788 lsls r0, r1, #30 | |
100046da: 460c mov r4, r1 | |
100046dc: 1e69 subs r1, r5, #1 | |
100046de: 4625 mov r5, r4 | |
100046e0: 4381 bics r1, r0 | |
100046e2: 1c48 adds r0, r1, #1 | |
100046e4: 4604 mov r4, r0 | |
100046e6: 402c ands r4, r5 | |
100046e8: 940e str r4, [sp, #56] | |
100046ea: 2903 cmp r1, #3 | |
100046ec: d205 bhs 0x100046fa <core::fmt::Formatter::pad+0x926> @ imm = #10 | |
100046ee: 2000 movs r0, #0 | |
100046f0: 9d04 ldr r5, [sp, #16] | |
100046f2: e0fb b 0x100048ec <core::fmt::Formatter::pad+0xb18> @ imm = #502 | |
100046f4: 2000 movs r0, #0 | |
100046f6: 9d04 ldr r5, [sp, #16] | |
100046f8: e118 b 0x1000492c <core::fmt::Formatter::pad+0xb58> @ imm = #560 | |
100046fa: 43a8 bics r0, r5 | |
100046fc: 1f00 subs r0, r0, #4 | |
100046fe: 0881 lsrs r1, r0, #2 | |
10004700: 1c49 adds r1, r1, #1 | |
10004702: 400d ands r5, r1 | |
10004704: 280c cmp r0, #12 | |
10004706: 950f str r5, [sp, #60] | |
10004708: d203 bhs 0x10004712 <core::fmt::Formatter::pad+0x93e> @ imm = #6 | |
1000470a: 462c mov r4, r5 | |
1000470c: 2000 movs r0, #0 | |
1000470e: 9d04 ldr r5, [sp, #16] | |
10004710: e07a b 0x10004808 <core::fmt::Formatter::pad+0xa34> @ imm = #244 | |
10004712: 489b ldr r0, [pc, #620] @ 0x10004980 <$d.130+0xc> | |
10004714: 4001 ands r1, r0 | |
10004716: 2000 movs r0, #0 | |
10004718: 4a98 ldr r2, [pc, #608] @ 0x1000497c <$d.130+0x8> | |
1000471a: 9110 str r1, [sp, #64] | |
1000471c: 6871 ldr r1, [r6, #4] | |
1000471e: 098c lsrs r4, r1, #6 | |
10004720: 43c9 mvns r1, r1 | |
10004722: 09c9 lsrs r1, r1, #7 | |
10004724: 4321 orrs r1, r4 | |
10004726: 4011 ands r1, r2 | |
10004728: 6834 ldr r4, [r6] | |
1000472a: 09a5 lsrs r5, r4, #6 | |
1000472c: 43e4 mvns r4, r4 | |
1000472e: 09e4 lsrs r4, r4, #7 | |
10004730: 432c orrs r4, r5 | |
10004732: 4014 ands r4, r2 | |
10004734: 1820 adds r0, r4, r0 | |
10004736: 1808 adds r0, r1, r0 | |
10004738: 68b1 ldr r1, [r6, #8] | |
1000473a: 098c lsrs r4, r1, #6 | |
1000473c: 43c9 mvns r1, r1 | |
1000473e: 09c9 lsrs r1, r1, #7 | |
10004740: 4321 orrs r1, r4 | |
10004742: 4011 ands r1, r2 | |
10004744: 1808 adds r0, r1, r0 | |
10004746: 68f1 ldr r1, [r6, #12] | |
10004748: 098c lsrs r4, r1, #6 | |
1000474a: 43c9 mvns r1, r1 | |
1000474c: 09c9 lsrs r1, r1, #7 | |
1000474e: 4321 orrs r1, r4 | |
10004750: 4011 ands r1, r2 | |
10004752: 1808 adds r0, r1, r0 | |
10004754: 6931 ldr r1, [r6, #16] | |
10004756: 098c lsrs r4, r1, #6 | |
10004758: 43c9 mvns r1, r1 | |
1000475a: 09c9 lsrs r1, r1, #7 | |
1000475c: 4321 orrs r1, r4 | |
1000475e: 4011 ands r1, r2 | |
10004760: 1808 adds r0, r1, r0 | |
10004762: 6971 ldr r1, [r6, #20] | |
10004764: 098c lsrs r4, r1, #6 | |
10004766: 43c9 mvns r1, r1 | |
10004768: 09c9 lsrs r1, r1, #7 | |
1000476a: 4321 orrs r1, r4 | |
1000476c: 4011 ands r1, r2 | |
1000476e: 1808 adds r0, r1, r0 | |
10004770: 69b1 ldr r1, [r6, #24] | |
10004772: 098c lsrs r4, r1, #6 | |
10004774: 43c9 mvns r1, r1 | |
10004776: 09c9 lsrs r1, r1, #7 | |
10004778: 4321 orrs r1, r4 | |
1000477a: 4011 ands r1, r2 | |
1000477c: 1808 adds r0, r1, r0 | |
1000477e: 69f1 ldr r1, [r6, #28] | |
10004780: 098c lsrs r4, r1, #6 | |
10004782: 43c9 mvns r1, r1 | |
10004784: 09c9 lsrs r1, r1, #7 | |
10004786: 4321 orrs r1, r4 | |
10004788: 4011 ands r1, r2 | |
1000478a: 1808 adds r0, r1, r0 | |
1000478c: 6a31 ldr r1, [r6, #32] | |
1000478e: 098c lsrs r4, r1, #6 | |
10004790: 43c9 mvns r1, r1 | |
10004792: 09c9 lsrs r1, r1, #7 | |
10004794: 4321 orrs r1, r4 | |
10004796: 4011 ands r1, r2 | |
10004798: 1808 adds r0, r1, r0 | |
1000479a: 6a71 ldr r1, [r6, #36] | |
1000479c: 098c lsrs r4, r1, #6 | |
1000479e: 43c9 mvns r1, r1 | |
100047a0: 09c9 lsrs r1, r1, #7 | |
100047a2: 4321 orrs r1, r4 | |
100047a4: 4011 ands r1, r2 | |
100047a6: 1808 adds r0, r1, r0 | |
100047a8: 6ab1 ldr r1, [r6, #40] | |
100047aa: 098c lsrs r4, r1, #6 | |
100047ac: 43c9 mvns r1, r1 | |
100047ae: 09c9 lsrs r1, r1, #7 | |
100047b0: 4321 orrs r1, r4 | |
100047b2: 4011 ands r1, r2 | |
100047b4: 1808 adds r0, r1, r0 | |
100047b6: 6af1 ldr r1, [r6, #44] | |
100047b8: 098c lsrs r4, r1, #6 | |
100047ba: 43c9 mvns r1, r1 | |
100047bc: 09c9 lsrs r1, r1, #7 | |
100047be: 4321 orrs r1, r4 | |
100047c0: 4011 ands r1, r2 | |
100047c2: 1808 adds r0, r1, r0 | |
100047c4: 6b31 ldr r1, [r6, #48] | |
100047c6: 098c lsrs r4, r1, #6 | |
100047c8: 43c9 mvns r1, r1 | |
100047ca: 09c9 lsrs r1, r1, #7 | |
100047cc: 4321 orrs r1, r4 | |
100047ce: 4011 ands r1, r2 | |
100047d0: 1808 adds r0, r1, r0 | |
100047d2: 6b71 ldr r1, [r6, #52] | |
100047d4: 098c lsrs r4, r1, #6 | |
100047d6: 43c9 mvns r1, r1 | |
100047d8: 09c9 lsrs r1, r1, #7 | |
100047da: 4321 orrs r1, r4 | |
100047dc: 4011 ands r1, r2 | |
100047de: 1808 adds r0, r1, r0 | |
100047e0: 6bb1 ldr r1, [r6, #56] | |
100047e2: 098c lsrs r4, r1, #6 | |
100047e4: 43c9 mvns r1, r1 | |
100047e6: 09c9 lsrs r1, r1, #7 | |
100047e8: 4321 orrs r1, r4 | |
100047ea: 4011 ands r1, r2 | |
100047ec: 1808 adds r0, r1, r0 | |
100047ee: 6bf1 ldr r1, [r6, #60] | |
100047f0: 098c lsrs r4, r1, #6 | |
100047f2: 43c9 mvns r1, r1 | |
100047f4: 09c9 lsrs r1, r1, #7 | |
100047f6: 4321 orrs r1, r4 | |
100047f8: 4011 ands r1, r2 | |
100047fa: 1808 adds r0, r1, r0 | |
100047fc: 9910 ldr r1, [sp, #64] | |
100047fe: 3640 adds r6, #64 | |
10004800: 1f09 subs r1, r1, #4 | |
10004802: d18a bne 0x1000471a <core::fmt::Formatter::pad+0x946> @ imm = #-236 | |
10004804: 9d04 ldr r5, [sp, #16] | |
10004806: 9c0f ldr r4, [sp, #60] | |
10004808: 2c00 cmp r4, #0 | |
1000480a: 9a06 ldr r2, [sp, #24] | |
1000480c: d06e beq 0x100048ec <core::fmt::Formatter::pad+0xb18> @ imm = #220 | |
1000480e: 6871 ldr r1, [r6, #4] | |
10004810: 098a lsrs r2, r1, #6 | |
10004812: 43c9 mvns r1, r1 | |
10004814: 09c9 lsrs r1, r1, #7 | |
10004816: 4311 orrs r1, r2 | |
10004818: 4634 mov r4, r6 | |
1000481a: 4e58 ldr r6, [pc, #352] @ 0x1000497c <$d.130+0x8> | |
1000481c: 4031 ands r1, r6 | |
1000481e: 6822 ldr r2, [r4] | |
10004820: 0996 lsrs r6, r2, #6 | |
10004822: 43d2 mvns r2, r2 | |
10004824: 09d2 lsrs r2, r2, #7 | |
10004826: 4332 orrs r2, r6 | |
10004828: 4e54 ldr r6, [pc, #336] @ 0x1000497c <$d.130+0x8> | |
1000482a: 4032 ands r2, r6 | |
1000482c: 1810 adds r0, r2, r0 | |
1000482e: 1808 adds r0, r1, r0 | |
10004830: 68a1 ldr r1, [r4, #8] | |
10004832: 098a lsrs r2, r1, #6 | |
10004834: 43c9 mvns r1, r1 | |
10004836: 09c9 lsrs r1, r1, #7 | |
10004838: 4311 orrs r1, r2 | |
1000483a: 4e50 ldr r6, [pc, #320] @ 0x1000497c <$d.130+0x8> | |
1000483c: 4031 ands r1, r6 | |
1000483e: 1808 adds r0, r1, r0 | |
10004840: 68e1 ldr r1, [r4, #12] | |
10004842: 098a lsrs r2, r1, #6 | |
10004844: 43c9 mvns r1, r1 | |
10004846: 09c9 lsrs r1, r1, #7 | |
10004848: 4311 orrs r1, r2 | |
1000484a: 4031 ands r1, r6 | |
1000484c: 1808 adds r0, r1, r0 | |
1000484e: 9e0f ldr r6, [sp, #60] | |
10004850: 2e01 cmp r6, #1 | |
10004852: d101 bne 0x10004858 <core::fmt::Formatter::pad+0xa84> @ imm = #2 | |
10004854: 3410 adds r4, #16 | |
10004856: e025 b 0x100048a4 <core::fmt::Formatter::pad+0xad0> @ imm = #74 | |
10004858: 6961 ldr r1, [r4, #20] | |
1000485a: 098a lsrs r2, r1, #6 | |
1000485c: 43c9 mvns r1, r1 | |
1000485e: 09c9 lsrs r1, r1, #7 | |
10004860: 4311 orrs r1, r2 | |
10004862: 4a46 ldr r2, [pc, #280] @ 0x1000497c <$d.130+0x8> | |
10004864: 4011 ands r1, r2 | |
10004866: 6922 ldr r2, [r4, #16] | |
10004868: 4626 mov r6, r4 | |
1000486a: 0994 lsrs r4, r2, #6 | |
1000486c: 43d2 mvns r2, r2 | |
1000486e: 09d2 lsrs r2, r2, #7 | |
10004870: 4322 orrs r2, r4 | |
10004872: 4c42 ldr r4, [pc, #264] @ 0x1000497c <$d.130+0x8> | |
10004874: 4022 ands r2, r4 | |
10004876: 4634 mov r4, r6 | |
10004878: 1810 adds r0, r2, r0 | |
1000487a: 1808 adds r0, r1, r0 | |
1000487c: 69b1 ldr r1, [r6, #24] | |
1000487e: 098a lsrs r2, r1, #6 | |
10004880: 43c9 mvns r1, r1 | |
10004882: 09c9 lsrs r1, r1, #7 | |
10004884: 4311 orrs r1, r2 | |
10004886: 4a3d ldr r2, [pc, #244] @ 0x1000497c <$d.130+0x8> | |
10004888: 4011 ands r1, r2 | |
1000488a: 1808 adds r0, r1, r0 | |
1000488c: 69f1 ldr r1, [r6, #28] | |
1000488e: 098a lsrs r2, r1, #6 | |
10004890: 43c9 mvns r1, r1 | |
10004892: 09c9 lsrs r1, r1, #7 | |
10004894: 4311 orrs r1, r2 | |
10004896: 4a39 ldr r2, [pc, #228] @ 0x1000497c <$d.130+0x8> | |
10004898: 4011 ands r1, r2 | |
1000489a: 1808 adds r0, r1, r0 | |
1000489c: 990f ldr r1, [sp, #60] | |
1000489e: 2902 cmp r1, #2 | |
100048a0: d103 bne 0x100048aa <core::fmt::Formatter::pad+0xad6> @ imm = #6 | |
100048a2: 3420 adds r4, #32 | |
100048a4: 9a06 ldr r2, [sp, #24] | |
100048a6: 4626 mov r6, r4 | |
100048a8: e020 b 0x100048ec <core::fmt::Formatter::pad+0xb18> @ imm = #64 | |
100048aa: 6a61 ldr r1, [r4, #36] | |
100048ac: 4616 mov r6, r2 | |
100048ae: 098a lsrs r2, r1, #6 | |
100048b0: 43c9 mvns r1, r1 | |
100048b2: 09c9 lsrs r1, r1, #7 | |
100048b4: 4311 orrs r1, r2 | |
100048b6: 4031 ands r1, r6 | |
100048b8: 6a22 ldr r2, [r4, #32] | |
100048ba: 4626 mov r6, r4 | |
100048bc: 0994 lsrs r4, r2, #6 | |
100048be: 43d2 mvns r2, r2 | |
100048c0: 09d2 lsrs r2, r2, #7 | |
100048c2: 4322 orrs r2, r4 | |
100048c4: 4c2d ldr r4, [pc, #180] @ 0x1000497c <$d.130+0x8> | |
100048c6: 4022 ands r2, r4 | |
100048c8: 1810 adds r0, r2, r0 | |
100048ca: 1808 adds r0, r1, r0 | |
100048cc: 6ab1 ldr r1, [r6, #40] | |
100048ce: 098a lsrs r2, r1, #6 | |
100048d0: 43c9 mvns r1, r1 | |
100048d2: 09c9 lsrs r1, r1, #7 | |
100048d4: 4311 orrs r1, r2 | |
100048d6: 4021 ands r1, r4 | |
100048d8: 1808 adds r0, r1, r0 | |
100048da: 6af1 ldr r1, [r6, #44] | |
100048dc: 098a lsrs r2, r1, #6 | |
100048de: 43c9 mvns r1, r1 | |
100048e0: 09c9 lsrs r1, r1, #7 | |
100048e2: 4311 orrs r1, r2 | |
100048e4: 4021 ands r1, r4 | |
100048e6: 1808 adds r0, r1, r0 | |
100048e8: 3630 adds r6, #48 | |
100048ea: 9a06 ldr r2, [sp, #24] | |
100048ec: 9c0e ldr r4, [sp, #56] | |
100048ee: 2c00 cmp r4, #0 | |
100048f0: d01c beq 0x1000492c <core::fmt::Formatter::pad+0xb58> @ imm = #56 | |
100048f2: 6831 ldr r1, [r6] | |
100048f4: 098a lsrs r2, r1, #6 | |
100048f6: 43c9 mvns r1, r1 | |
100048f8: 09c9 lsrs r1, r1, #7 | |
100048fa: 4311 orrs r1, r2 | |
100048fc: 4a1f ldr r2, [pc, #124] @ 0x1000497c <$d.130+0x8> | |
100048fe: 4011 ands r1, r2 | |
10004900: 1808 adds r0, r1, r0 | |
10004902: 2c01 cmp r4, #1 | |
10004904: d011 beq 0x1000492a <core::fmt::Formatter::pad+0xb56> @ imm = #34 | |
10004906: 6871 ldr r1, [r6, #4] | |
10004908: 098a lsrs r2, r1, #6 | |
1000490a: 43c9 mvns r1, r1 | |
1000490c: 09c9 lsrs r1, r1, #7 | |
1000490e: 4311 orrs r1, r2 | |
10004910: 4a1a ldr r2, [pc, #104] @ 0x1000497c <$d.130+0x8> | |
10004912: 4011 ands r1, r2 | |
10004914: 1808 adds r0, r1, r0 | |
10004916: 2c02 cmp r4, #2 | |
10004918: d007 beq 0x1000492a <core::fmt::Formatter::pad+0xb56> @ imm = #14 | |
1000491a: 68b1 ldr r1, [r6, #8] | |
1000491c: 4614 mov r4, r2 | |
1000491e: 098a lsrs r2, r1, #6 | |
10004920: 43c9 mvns r1, r1 | |
10004922: 09c9 lsrs r1, r1, #7 | |
10004924: 4311 orrs r1, r2 | |
10004926: 4021 ands r1, r4 | |
10004928: 1808 adds r0, r1, r0 | |
1000492a: 9a06 ldr r2, [sp, #24] | |
1000492c: 0a01 lsrs r1, r0, #8 | |
1000492e: 4c12 ldr r4, [pc, #72] @ 0x10004978 <$d.130+0x4> | |
10004930: 4020 ands r0, r4 | |
10004932: 4021 ands r1, r4 | |
10004934: 1808 adds r0, r1, r0 | |
10004936: 490f ldr r1, [pc, #60] @ 0x10004974 <$d.130> | |
10004938: 4341 muls r1, r0, r1 | |
1000493a: 0c08 lsrs r0, r1, #16 | |
1000493c: 18c3 adds r3, r0, r3 | |
1000493e: 9803 ldr r0, [sp, #12] | |
10004940: 4298 cmp r0, r3 | |
10004942: d900 bls 0x10004946 <core::fmt::Formatter::pad+0xb72> @ imm = #0 | |
10004944: e4d7 b 0x100042f6 <core::fmt::Formatter::pad+0x522> @ imm = #-1618 | |
10004946: 9805 ldr r0, [sp, #20] | |
10004948: 6801 ldr r1, [r0] | |
1000494a: 6840 ldr r0, [r0, #4] | |
1000494c: f7ff fab4 bl 0x10003eb8 <core::fmt::Formatter::pad+0xe4> @ imm = #-2712 | |
10004950: 1c76 adds r6, r6, #1 | |
10004952: 4282 cmp r2, r0 | |
10004954: dc00 bgt 0x10004958 <core::fmt::Formatter::pad+0xb84> @ imm = #0 | |
10004956: e616 b 0x10004586 <core::fmt::Formatter::pad+0x7b2> @ imm = #-980 | |
10004958: 1c76 adds r6, r6, #1 | |
1000495a: 220a movs r2, #10 | |
1000495c: 568a ldrsb r2, [r1, r2] | |
1000495e: 4282 cmp r2, r0 | |
10004960: dc00 bgt 0x10004964 <core::fmt::Formatter::pad+0xb90> @ imm = #0 | |
10004962: e615 b 0x10004590 <core::fmt::Formatter::pad+0x7bc> @ imm = #-982 | |
10004964: 1c76 adds r6, r6, #1 | |
10004966: 220b movs r2, #11 | |
10004968: 568a ldrsb r2, [r1, r2] | |
1000496a: 4282 cmp r2, r0 | |
1000496c: dd00 ble 0x10004970 <core::fmt::Formatter::pad+0xb9c> @ imm = #0 | |
1000496e: e613 b 0x10004598 <core::fmt::Formatter::pad+0x7c4> @ imm = #-986 | |
10004970: e613 b 0x1000459a <core::fmt::Formatter::pad+0x7c6> @ imm = #-986 | |
10004972: 46c0 mov r8, r8 | |
10004974 <$d.130>: | |
10004974: 01 00 01 00 .word 0x00010001 | |
10004978: ff 00 ff 00 .word 0x00ff00ff | |
1000497c: 01 01 01 01 .word 0x01010101 | |
10004980: fc ff ff 7f .word 0x7ffffffc | |
10004984 <core::panicking::panic>: | |
10004984: b580 push {r7, lr} | |
10004986: af00 add r7, sp, #0 | |
10004988: f7ff f8f4 bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-3608 | |
1000498c: defe trap | |
1000498e: d4d4 bmi 0x1000493a <core::fmt::Formatter::pad+0xb66> @ imm = #-88 | |
10004990 <core::fmt::write>: | |
10004990: b5f0 push {r4, r5, r6, r7, lr} | |
10004992: af03 add r7, sp, #12 | |
10004994: b08f sub sp, #60 | |
10004996: 2420 movs r4, #32 | |
10004998: ad06 add r5, sp, #24 | |
1000499a: 2303 movs r3, #3 | |
1000499c: 9505 str r5, [sp, #20] | |
1000499e: 552b strb r3, [r5, r4] | |
100049a0: 940d str r4, [sp, #52] | |
100049a2: 2300 movs r3, #0 | |
100049a4: 930c str r3, [sp, #48] | |
100049a6: 930a str r3, [sp, #40] | |
100049a8: ac06 add r4, sp, #24 | |
100049aa: c40b stm r4!, {r0, r1, r3} | |
100049ac: 6815 ldr r5, [r2] | |
100049ae: 2d00 cmp r5, #0 | |
100049b0: d05d beq 0x10004a6e <core::fmt::write+0xde> @ imm = #186 | |
100049b2: 6850 ldr r0, [r2, #4] | |
100049b4: 2800 cmp r0, #0 | |
100049b6: d07e beq 0x10004ab6 <core::fmt::write+0x126> @ imm = #252 | |
100049b8: 9905 ldr r1, [sp, #20] | |
100049ba: 3120 adds r1, #32 | |
100049bc: 9105 str r1, [sp, #20] | |
100049be: 211f movs r1, #31 | |
100049c0: 06c9 lsls r1, r1, #27 | |
100049c2: 1e43 subs r3, r0, #1 | |
100049c4: 438b bics r3, r1 | |
100049c6: 1c59 adds r1, r3, #1 | |
100049c8: 9100 str r1, [sp] | |
100049ca: 0140 lsls r0, r0, #5 | |
100049cc: 9002 str r0, [sp, #8] | |
100049ce: 9204 str r2, [sp, #16] | |
100049d0: 6894 ldr r4, [r2, #8] | |
100049d2: 2600 movs r6, #0 | |
100049d4: 9503 str r5, [sp, #12] | |
100049d6: 6862 ldr r2, [r4, #4] | |
100049d8: 2a00 cmp r2, #0 | |
100049da: d006 beq 0x100049ea <core::fmt::write+0x5a> @ imm = #12 | |
100049dc: 9807 ldr r0, [sp, #28] | |
100049de: 68c3 ldr r3, [r0, #12] | |
100049e0: 6821 ldr r1, [r4] | |
100049e2: 9806 ldr r0, [sp, #24] | |
100049e4: 4798 blx r3 | |
100049e6: 2800 cmp r0, #0 | |
100049e8: d174 bne 0x10004ad4 <core::fmt::write+0x144> @ imm = #232 | |
100049ea: 19aa adds r2, r5, r6 | |
100049ec: 7f10 ldrb r0, [r2, #28] | |
100049ee: 9905 ldr r1, [sp, #20] | |
100049f0: 7008 strb r0, [r1] | |
100049f2: 6990 ldr r0, [r2, #24] | |
100049f4: 900d str r0, [sp, #52] | |
100049f6: 6950 ldr r0, [r2, #20] | |
100049f8: 900c str r0, [sp, #48] | |
100049fa: 68d0 ldr r0, [r2, #12] | |
100049fc: 6913 ldr r3, [r2, #16] | |
100049fe: 9904 ldr r1, [sp, #16] | |
10004a00: 6909 ldr r1, [r1, #16] | |
10004a02: 2500 movs r5, #0 | |
10004a04: 2800 cmp r0, #0 | |
10004a06: d00d beq 0x10004a24 <core::fmt::write+0x94> @ imm = #26 | |
10004a08: 2801 cmp r0, #1 | |
10004a0a: 4628 mov r0, r5 | |
10004a0c: d10b bne 0x10004a26 <core::fmt::write+0x96> @ imm = #22 | |
10004a0e: 00d8 lsls r0, r3, #3 | |
10004a10: 1808 adds r0, r1, r0 | |
10004a12: 9001 str r0, [sp, #4] | |
10004a14: 6840 ldr r0, [r0, #4] | |
10004a16: 4b32 ldr r3, [pc, #200] @ 0x10004ae0 <$d.133> | |
10004a18: 4298 cmp r0, r3 | |
10004a1a: 4628 mov r0, r5 | |
10004a1c: d103 bne 0x10004a26 <core::fmt::write+0x96> @ imm = #6 | |
10004a1e: 9801 ldr r0, [sp, #4] | |
10004a20: 6800 ldr r0, [r0] | |
10004a22: 6803 ldr r3, [r0] | |
10004a24: 2001 movs r0, #1 | |
10004a26: 9309 str r3, [sp, #36] | |
10004a28: 9008 str r0, [sp, #32] | |
10004a2a: 6850 ldr r0, [r2, #4] | |
10004a2c: 6892 ldr r2, [r2, #8] | |
10004a2e: 2800 cmp r0, #0 | |
10004a30: d009 beq 0x10004a46 <core::fmt::write+0xb6> @ imm = #18 | |
10004a32: 2801 cmp r0, #1 | |
10004a34: d109 bne 0x10004a4a <core::fmt::write+0xba> @ imm = #18 | |
10004a36: 00d0 lsls r0, r2, #3 | |
10004a38: 1808 adds r0, r1, r0 | |
10004a3a: 6842 ldr r2, [r0, #4] | |
10004a3c: 4b28 ldr r3, [pc, #160] @ 0x10004ae0 <$d.133> | |
10004a3e: 429a cmp r2, r3 | |
10004a40: d103 bne 0x10004a4a <core::fmt::write+0xba> @ imm = #6 | |
10004a42: 6800 ldr r0, [r0] | |
10004a44: 6802 ldr r2, [r0] | |
10004a46: 2501 movs r5, #1 | |
10004a48: e7ff b 0x10004a4a <core::fmt::write+0xba> @ imm = #-2 | |
10004a4a: 920b str r2, [sp, #44] | |
10004a4c: 950a str r5, [sp, #40] | |
10004a4e: 9d03 ldr r5, [sp, #12] | |
10004a50: 59a8 ldr r0, [r5, r6] | |
10004a52: 00c2 lsls r2, r0, #3 | |
10004a54: 5888 ldr r0, [r1, r2] | |
10004a56: 1889 adds r1, r1, r2 | |
10004a58: 684a ldr r2, [r1, #4] | |
10004a5a: a906 add r1, sp, #24 | |
10004a5c: 4790 blx r2 | |
10004a5e: 2800 cmp r0, #0 | |
10004a60: d138 bne 0x10004ad4 <core::fmt::write+0x144> @ imm = #112 | |
10004a62: 3620 adds r6, #32 | |
10004a64: 3408 adds r4, #8 | |
10004a66: 9802 ldr r0, [sp, #8] | |
10004a68: 42b0 cmp r0, r6 | |
10004a6a: d1b4 bne 0x100049d6 <core::fmt::write+0x46> @ imm = #-152 | |
10004a6c: e021 b 0x10004ab2 <core::fmt::write+0x122> @ imm = #66 | |
10004a6e: 6950 ldr r0, [r2, #20] | |
10004a70: 2800 cmp r0, #0 | |
10004a72: d020 beq 0x10004ab6 <core::fmt::write+0x126> @ imm = #64 | |
10004a74: 6914 ldr r4, [r2, #16] | |
10004a76: 2107 movs r1, #7 | |
10004a78: 0749 lsls r1, r1, #29 | |
10004a7a: 1e43 subs r3, r0, #1 | |
10004a7c: 438b bics r3, r1 | |
10004a7e: 1c59 adds r1, r3, #1 | |
10004a80: 9100 str r1, [sp] | |
10004a82: 00c5 lsls r5, r0, #3 | |
10004a84: 9204 str r2, [sp, #16] | |
10004a86: 6896 ldr r6, [r2, #8] | |
10004a88: 6872 ldr r2, [r6, #4] | |
10004a8a: 2a00 cmp r2, #0 | |
10004a8c: d006 beq 0x10004a9c <core::fmt::write+0x10c> @ imm = #12 | |
10004a8e: 9807 ldr r0, [sp, #28] | |
10004a90: 68c3 ldr r3, [r0, #12] | |
10004a92: 6831 ldr r1, [r6] | |
10004a94: 9806 ldr r0, [sp, #24] | |
10004a96: 4798 blx r3 | |
10004a98: 2800 cmp r0, #0 | |
10004a9a: d11b bne 0x10004ad4 <core::fmt::write+0x144> @ imm = #54 | |
10004a9c: cc05 ldm r4!, {r0, r2} | |
10004a9e: a906 add r1, sp, #24 | |
10004aa0: 3c08 subs r4, #8 | |
10004aa2: 4790 blx r2 | |
10004aa4: 2800 cmp r0, #0 | |
10004aa6: d115 bne 0x10004ad4 <core::fmt::write+0x144> @ imm = #42 | |
10004aa8: 3408 adds r4, #8 | |
10004aaa: 3d08 subs r5, #8 | |
10004aac: 3608 adds r6, #8 | |
10004aae: 2d00 cmp r5, #0 | |
10004ab0: d1ea bne 0x10004a88 <core::fmt::write+0xf8> @ imm = #-44 | |
10004ab2: 9a04 ldr r2, [sp, #16] | |
10004ab4: 9b00 ldr r3, [sp] | |
10004ab6: 68d0 ldr r0, [r2, #12] | |
10004ab8: 4283 cmp r3, r0 | |
10004aba: d20e bhs 0x10004ada <core::fmt::write+0x14a> @ imm = #28 | |
10004abc: 4611 mov r1, r2 | |
10004abe: 00d8 lsls r0, r3, #3 | |
10004ac0: 688a ldr r2, [r1, #8] | |
10004ac2: 5811 ldr r1, [r2, r0] | |
10004ac4: 1810 adds r0, r2, r0 | |
10004ac6: 6842 ldr r2, [r0, #4] | |
10004ac8: 9807 ldr r0, [sp, #28] | |
10004aca: 68c3 ldr r3, [r0, #12] | |
10004acc: 9806 ldr r0, [sp, #24] | |
10004ace: 4798 blx r3 | |
10004ad0: 2800 cmp r0, #0 | |
10004ad2: d002 beq 0x10004ada <core::fmt::write+0x14a> @ imm = #4 | |
10004ad4: 2001 movs r0, #1 | |
10004ad6: b00f add sp, #60 | |
10004ad8: bdf0 pop {r4, r5, r6, r7, pc} | |
10004ada: 2000 movs r0, #0 | |
10004adc: b00f add sp, #60 | |
10004ade: bdf0 pop {r4, r5, r6, r7, pc} | |
10004ae0 <$d.133>: | |
10004ae0: 71 3b 00 10 .word 0x10003b71 | |
10004ae4 <core::slice::index::slice_index_order_fail>: | |
10004ae4: b580 push {r7, lr} | |
10004ae6: af00 add r7, sp, #0 | |
10004ae8: f000 f801 bl 0x10004aee <core::slice::index::slice_index_order_fail_rt> @ imm = #2 | |
10004aec: defe trap | |
10004aee <core::slice::index::slice_index_order_fail_rt>: | |
10004aee: b580 push {r7, lr} | |
10004af0: af00 add r7, sp, #0 | |
10004af2: f7ff f83f bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-3970 | |
10004af6: defe trap | |
10004af8 <<core::cell::BorrowMutError as core::fmt::Debug>::fmt>: | |
10004af8: b580 push {r7, lr} | |
10004afa: af00 add r7, sp, #0 | |
10004afc: c903 ldm r1, {r0, r1} | |
10004afe: 68cb ldr r3, [r1, #12] | |
10004b00: 4901 ldr r1, [pc, #4] @ 0x10004b08 <$d.137> | |
10004b02: 220e movs r2, #14 | |
10004b04: 4798 blx r3 | |
10004b06: bd80 pop {r7, pc} | |
10004b08 <$d.137>: | |
10004b08: 26 75 00 10 .word 0x10007526 | |
10004b0c <core::result::unwrap_failed>: | |
10004b0c: b580 push {r7, lr} | |
10004b0e: af00 add r7, sp, #0 | |
10004b10: f7ff f830 bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-4000 | |
10004b14: defe trap | |
10004b16: d4d4 bmi 0x10004ac2 <core::fmt::write+0x132> @ imm = #-88 | |
10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str>: | |
10004b18: b5f0 push {r4, r5, r6, r7, lr} | |
10004b1a: af03 add r7, sp, #12 | |
10004b1c: b08f sub sp, #60 | |
10004b1e: 4615 mov r5, r2 | |
10004b20: 910b str r1, [sp, #44] | |
10004b22: 4251 rsbs r1, r2, #0 | |
10004b24: 9103 str r1, [sp, #12] | |
10004b26: 1e51 subs r1, r2, #1 | |
10004b28: 9102 str r1, [sp, #8] | |
10004b2a: 1e91 subs r1, r2, #2 | |
10004b2c: 9101 str r1, [sp, #4] | |
10004b2e: 1ed1 subs r1, r2, #3 | |
10004b30: 9100 str r1, [sp] | |
10004b32: 6801 ldr r1, [r0] | |
10004b34: 9108 str r1, [sp, #32] | |
10004b36: 6841 ldr r1, [r0, #4] | |
10004b38: 9107 str r1, [sp, #28] | |
10004b3a: 6880 ldr r0, [r0, #8] | |
10004b3c: 900a str r0, [sp, #40] | |
10004b3e: 2000 movs r0, #0 | |
10004b40: 2101 movs r1, #1 | |
10004b42: 9104 str r1, [sp, #16] | |
10004b44: 4602 mov r2, r0 | |
10004b46: 4603 mov r3, r0 | |
10004b48: 4604 mov r4, r0 | |
10004b4a: 950c str r5, [sp, #48] | |
10004b4c: 9005 str r0, [sp, #20] | |
10004b4e: e012 b 0x10004b76 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x5e> @ imm = #36 | |
10004b50: 1850 adds r0, r2, r1 | |
10004b52: 1e40 subs r0, r0, #1 | |
10004b54: 7803 ldrb r3, [r0] | |
10004b56: 3b0a subs r3, #10 | |
10004b58: 4258 rsbs r0, r3, #0 | |
10004b5a: 4158 adcs r0, r3 | |
10004b5c: 9b0a ldr r3, [sp, #40] | |
10004b5e: 7018 strb r0, [r3] | |
10004b60: 9807 ldr r0, [sp, #28] | |
10004b62: 68c3 ldr r3, [r0, #12] | |
10004b64: 9808 ldr r0, [sp, #32] | |
10004b66: 4798 blx r3 | |
10004b68: 2800 cmp r0, #0 | |
10004b6a: 4632 mov r2, r6 | |
10004b6c: 9805 ldr r0, [sp, #20] | |
10004b6e: 9d0c ldr r5, [sp, #48] | |
10004b70: 9b0d ldr r3, [sp, #52] | |
10004b72: d000 beq 0x10004b76 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x5e> @ imm = #0 | |
10004b74: e0ee b 0x10004d54 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x23c> @ imm = #476 | |
10004b76: 2c00 cmp r4, #0 | |
10004b78: d000 beq 0x10004b7c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x64> @ imm = #0 | |
10004b7a: e0ec b 0x10004d56 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x23e> @ imm = #472 | |
10004b7c: 42ab cmp r3, r5 | |
10004b7e: d900 bls 0x10004b82 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x6a> @ imm = #0 | |
10004b80: e0be b 0x10004d00 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e8> @ imm = #380 | |
10004b82: 9206 str r2, [sp, #24] | |
10004b84: 980b ldr r0, [sp, #44] | |
10004b86: 18c2 adds r2, r0, r3 | |
10004b88: 1ae9 subs r1, r5, r3 | |
10004b8a: 2908 cmp r1, #8 | |
10004b8c: 930d str r3, [sp, #52] | |
10004b8e: d215 bhs 0x10004bbc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xa4> @ imm = #42 | |
10004b90: 42ab cmp r3, r5 | |
10004b92: d100 bne 0x10004b96 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x7e> @ imm = #0 | |
10004b94: e0b2 b 0x10004cfc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e4> @ imm = #356 | |
10004b96: 9803 ldr r0, [sp, #12] | |
10004b98: 18c0 adds r0, r0, r3 | |
10004b9a: 2300 movs r3, #0 | |
10004b9c: 5cd1 ldrb r1, [r2, r3] | |
10004b9e: 290a cmp r1, #10 | |
10004ba0: d100 bne 0x10004ba4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x8c> @ imm = #0 | |
10004ba2: e08c b 0x10004cbe <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a6> @ imm = #280 | |
10004ba4: 18c1 adds r1, r0, r3 | |
10004ba6: 1c49 adds r1, r1, #1 | |
10004ba8: d300 blo 0x10004bac <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x94> @ imm = #0 | |
10004baa: e0a6 b 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #332 | |
10004bac: 18d1 adds r1, r2, r3 | |
10004bae: 7849 ldrb r1, [r1, #1] | |
10004bb0: 290a cmp r1, #10 | |
10004bb2: d07c beq 0x10004cae <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x196> @ imm = #248 | |
10004bb4: 1c9b adds r3, r3, #2 | |
10004bb6: 18c1 adds r1, r0, r3 | |
10004bb8: d1f0 bne 0x10004b9c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x84> @ imm = #-32 | |
10004bba: e09e b 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #316 | |
10004bbc: 1cd0 adds r0, r2, #3 | |
10004bbe: 2303 movs r3, #3 | |
10004bc0: 4398 bics r0, r3 | |
10004bc2: 4290 cmp r0, r2 | |
10004bc4: 4d69 ldr r5, [pc, #420] @ 0x10004d6c <$d.140+0x4> | |
10004bc6: d028 beq 0x10004c1a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x102> @ imm = #80 | |
10004bc8: 1a80 subs r0, r0, r2 | |
10004bca: 4288 cmp r0, r1 | |
10004bcc: d300 blo 0x10004bd0 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xb8> @ imm = #0 | |
10004bce: 4608 mov r0, r1 | |
10004bd0: 2800 cmp r0, #0 | |
10004bd2: d022 beq 0x10004c1a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x102> @ imm = #68 | |
10004bd4: 4243 rsbs r3, r0, #0 | |
10004bd6: 930e str r3, [sp, #56] | |
10004bd8: 2300 movs r3, #0 | |
10004bda: 5cd5 ldrb r5, [r2, r3] | |
10004bdc: 2d0a cmp r5, #10 | |
10004bde: d06e beq 0x10004cbe <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a6> @ imm = #220 | |
10004be0: 9c0e ldr r4, [sp, #56] | |
10004be2: 18e5 adds r5, r4, r3 | |
10004be4: 1c6e adds r6, r5, #1 | |
10004be6: d211 bhs 0x10004c0c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xf4> @ imm = #34 | |
10004be8: 18d6 adds r6, r2, r3 | |
10004bea: 7874 ldrb r4, [r6, #1] | |
10004bec: 2c0a cmp r4, #10 | |
10004bee: d05e beq 0x10004cae <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x196> @ imm = #188 | |
10004bf0: 1cac adds r4, r5, #2 | |
10004bf2: d00b beq 0x10004c0c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xf4> @ imm = #22 | |
10004bf4: 78b4 ldrb r4, [r6, #2] | |
10004bf6: 2c0a cmp r4, #10 | |
10004bf8: d07b beq 0x10004cf2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1da> @ imm = #246 | |
10004bfa: 1cec adds r4, r5, #3 | |
10004bfc: d006 beq 0x10004c0c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xf4> @ imm = #12 | |
10004bfe: 78f4 ldrb r4, [r6, #3] | |
10004c00: 2c0a cmp r4, #10 | |
10004c02: d078 beq 0x10004cf6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1de> @ imm = #240 | |
10004c04: 1d1b adds r3, r3, #4 | |
10004c06: 9c0e ldr r4, [sp, #56] | |
10004c08: 18e4 adds r4, r4, r3 | |
10004c0a: d1e6 bne 0x10004bda <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0xc2> @ imm = #-52 | |
10004c0c: 460b mov r3, r1 | |
10004c0e: 3b08 subs r3, #8 | |
10004c10: 930e str r3, [sp, #56] | |
10004c12: 4298 cmp r0, r3 | |
10004c14: 4d55 ldr r5, [pc, #340] @ 0x10004d6c <$d.140+0x4> | |
10004c16: d904 bls 0x10004c22 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x10a> @ imm = #8 | |
10004c18: e01d b 0x10004c56 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x13e> @ imm = #58 | |
10004c1a: 4608 mov r0, r1 | |
10004c1c: 3808 subs r0, #8 | |
10004c1e: 900e str r0, [sp, #56] | |
10004c20: 2000 movs r0, #0 | |
10004c22: 9109 str r1, [sp, #36] | |
10004c24: 5814 ldr r4, [r2, r0] | |
10004c26: 462e mov r6, r5 | |
10004c28: 43a6 bics r6, r4 | |
10004c2a: 494f ldr r1, [pc, #316] @ 0x10004d68 <$d.140> | |
10004c2c: 404c eors r4, r1 | |
10004c2e: 4b50 ldr r3, [pc, #320] @ 0x10004d70 <$d.140+0x8> | |
10004c30: 18e4 adds r4, r4, r3 | |
10004c32: 4226 tst r6, r4 | |
10004c34: d10b bne 0x10004c4e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x136> @ imm = #22 | |
10004c36: 1814 adds r4, r2, r0 | |
10004c38: 6864 ldr r4, [r4, #4] | |
10004c3a: 43a5 bics r5, r4 | |
10004c3c: 404c eors r4, r1 | |
10004c3e: 18e4 adds r4, r4, r3 | |
10004c40: 4225 tst r5, r4 | |
10004c42: d104 bne 0x10004c4e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x136> @ imm = #8 | |
10004c44: 3008 adds r0, #8 | |
10004c46: 990e ldr r1, [sp, #56] | |
10004c48: 4288 cmp r0, r1 | |
10004c4a: 4d48 ldr r5, [pc, #288] @ 0x10004d6c <$d.140+0x4> | |
10004c4c: d9ea bls 0x10004c24 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x10c> @ imm = #-44 | |
10004c4e: 9909 ldr r1, [sp, #36] | |
10004c50: 4288 cmp r0, r1 | |
10004c52: d900 bls 0x10004c56 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x13e> @ imm = #0 | |
10004c54: e084 b 0x10004d60 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x248> @ imm = #264 | |
10004c56: 4281 cmp r1, r0 | |
10004c58: d04f beq 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #158 | |
10004c5a: 1812 adds r2, r2, r0 | |
10004c5c: 9902 ldr r1, [sp, #8] | |
10004c5e: 9d0d ldr r5, [sp, #52] | |
10004c60: 1b49 subs r1, r1, r5 | |
10004c62: 1a0b subs r3, r1, r0 | |
10004c64: 9901 ldr r1, [sp, #4] | |
10004c66: 1b49 subs r1, r1, r5 | |
10004c68: 1a0c subs r4, r1, r0 | |
10004c6a: 9900 ldr r1, [sp] | |
10004c6c: 1b49 subs r1, r1, r5 | |
10004c6e: 1a09 subs r1, r1, r0 | |
10004c70: 910e str r1, [sp, #56] | |
10004c72: 990c ldr r1, [sp, #48] | |
10004c74: 1a09 subs r1, r1, r0 | |
10004c76: 1b49 subs r1, r1, r5 | |
10004c78: 9109 str r1, [sp, #36] | |
10004c7a: 2100 movs r1, #0 | |
10004c7c: 5c55 ldrb r5, [r2, r1] | |
10004c7e: 2d0a cmp r5, #10 | |
10004c80: d01c beq 0x10004cbc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a4> @ imm = #56 | |
10004c82: 428b cmp r3, r1 | |
10004c84: d039 beq 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #114 | |
10004c86: 1855 adds r5, r2, r1 | |
10004c88: 786e ldrb r6, [r5, #1] | |
10004c8a: 2e0a cmp r6, #10 | |
10004c8c: d011 beq 0x10004cb2 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x19a> @ imm = #34 | |
10004c8e: 428c cmp r4, r1 | |
10004c90: d033 beq 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #102 | |
10004c92: 78ae ldrb r6, [r5, #2] | |
10004c94: 2e0a cmp r6, #10 | |
10004c96: d00e beq 0x10004cb6 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x19e> @ imm = #28 | |
10004c98: 9e0e ldr r6, [sp, #56] | |
10004c9a: 428e cmp r6, r1 | |
10004c9c: d02d beq 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #90 | |
10004c9e: 78ed ldrb r5, [r5, #3] | |
10004ca0: 2d0a cmp r5, #10 | |
10004ca2: d00a beq 0x10004cba <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a2> @ imm = #20 | |
10004ca4: 1d09 adds r1, r1, #4 | |
10004ca6: 9d09 ldr r5, [sp, #36] | |
10004ca8: 428d cmp r5, r1 | |
10004caa: d1e7 bne 0x10004c7c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x164> @ imm = #-50 | |
10004cac: e025 b 0x10004cfa <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e2> @ imm = #74 | |
10004cae: 1c5b adds r3, r3, #1 | |
10004cb0: e005 b 0x10004cbe <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a6> @ imm = #10 | |
10004cb2: 1c49 adds r1, r1, #1 | |
10004cb4: e002 b 0x10004cbc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a4> @ imm = #4 | |
10004cb6: 1c89 adds r1, r1, #2 | |
10004cb8: e000 b 0x10004cbc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a4> @ imm = #0 | |
10004cba: 1cc9 adds r1, r1, #3 | |
10004cbc: 180b adds r3, r1, r0 | |
10004cbe: 980d ldr r0, [sp, #52] | |
10004cc0: 18c0 adds r0, r0, r3 | |
10004cc2: 1c43 adds r3, r0, #1 | |
10004cc4: 9d0c ldr r5, [sp, #48] | |
10004cc6: 42ab cmp r3, r5 | |
10004cc8: d804 bhi 0x10004cd4 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1bc> @ imm = #8 | |
10004cca: 2100 movs r1, #0 | |
10004ccc: 2b00 cmp r3, #0 | |
10004cce: 9a04 ldr r2, [sp, #16] | |
10004cd0: d104 bne 0x10004cdc <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1c4> @ imm = #8 | |
10004cd2: e004 b 0x10004cde <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1c6> @ imm = #8 | |
10004cd4: 2101 movs r1, #1 | |
10004cd6: 2b00 cmp r3, #0 | |
10004cd8: 9a04 ldr r2, [sp, #16] | |
10004cda: d000 beq 0x10004cde <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1c6> @ imm = #0 | |
10004cdc: 460a mov r2, r1 | |
10004cde: 2a01 cmp r2, #1 | |
10004ce0: d003 beq 0x10004cea <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1d2> @ imm = #6 | |
10004ce2: 990b ldr r1, [sp, #44] | |
10004ce4: 5c08 ldrb r0, [r1, r0] | |
10004ce6: 280a cmp r0, #10 | |
10004ce8: d02b beq 0x10004d42 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x22a> @ imm = #86 | |
10004cea: 42ab cmp r3, r5 | |
10004cec: 9a06 ldr r2, [sp, #24] | |
10004cee: d807 bhi 0x10004d00 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1e8> @ imm = #14 | |
10004cf0: e748 b 0x10004b84 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x6c> @ imm = #-368 | |
10004cf2: 1c9b adds r3, r3, #2 | |
10004cf4: e7e3 b 0x10004cbe <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a6> @ imm = #-58 | |
10004cf6: 1cdb adds r3, r3, #3 | |
10004cf8: e7e1 b 0x10004cbe <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1a6> @ imm = #-62 | |
10004cfa: 9d0c ldr r5, [sp, #48] | |
10004cfc: 462b mov r3, r5 | |
10004cfe: 9a06 ldr r2, [sp, #24] | |
10004d00: 42aa cmp r2, r5 | |
10004d02: d02a beq 0x10004d5a <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x242> @ imm = #84 | |
10004d04: 930d str r3, [sp, #52] | |
10004d06: 2401 movs r4, #1 | |
10004d08: 4616 mov r6, r2 | |
10004d0a: 462b mov r3, r5 | |
10004d0c: 980a ldr r0, [sp, #40] | |
10004d0e: 7800 ldrb r0, [r0] | |
10004d10: 2800 cmp r0, #0 | |
10004d12: d00f beq 0x10004d34 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x21c> @ imm = #30 | |
10004d14: 9807 ldr r0, [sp, #28] | |
10004d16: 930e str r3, [sp, #56] | |
10004d18: 68c3 ldr r3, [r0, #12] | |
10004d1a: 4635 mov r5, r6 | |
10004d1c: 4626 mov r6, r4 | |
10004d1e: 4614 mov r4, r2 | |
10004d20: 2204 movs r2, #4 | |
10004d22: 9808 ldr r0, [sp, #32] | |
10004d24: 4913 ldr r1, [pc, #76] @ 0x10004d74 <$d.140+0xc> | |
10004d26: 4798 blx r3 | |
10004d28: 9b0e ldr r3, [sp, #56] | |
10004d2a: 4622 mov r2, r4 | |
10004d2c: 4634 mov r4, r6 | |
10004d2e: 462e mov r6, r5 | |
10004d30: 2800 cmp r0, #0 | |
10004d32: d10f bne 0x10004d54 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x23c> @ imm = #30 | |
10004d34: 980b ldr r0, [sp, #44] | |
10004d36: 1881 adds r1, r0, r2 | |
10004d38: 1a9a subs r2, r3, r2 | |
10004d3a: d000 beq 0x10004d3e <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x226> @ imm = #0 | |
10004d3c: e708 b 0x10004b50 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x38> @ imm = #-496 | |
10004d3e: 2000 movs r0, #0 | |
10004d40: e70c b 0x10004b5c <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x44> @ imm = #-488 | |
10004d42: 2400 movs r4, #0 | |
10004d44: 461e mov r6, r3 | |
10004d46: 930d str r3, [sp, #52] | |
10004d48: 9a06 ldr r2, [sp, #24] | |
10004d4a: 980a ldr r0, [sp, #40] | |
10004d4c: 7800 ldrb r0, [r0] | |
10004d4e: 2800 cmp r0, #0 | |
10004d50: d1e0 bne 0x10004d14 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x1fc> @ imm = #-64 | |
10004d52: e7ef b 0x10004d34 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str+0x21c> @ imm = #-34 | |
10004d54: 9804 ldr r0, [sp, #16] | |
10004d56: b00f add sp, #60 | |
10004d58: bdf0 pop {r4, r5, r6, r7, pc} | |
10004d5a: 9805 ldr r0, [sp, #20] | |
10004d5c: b00f add sp, #60 | |
10004d5e: bdf0 pop {r4, r5, r6, r7, pc} | |
10004d60: f7ff fec0 bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #-640 | |
10004d64: defe trap | |
10004d66: 46c0 mov r8, r8 | |
10004d68 <$d.140>: | |
10004d68: 0a 0a 0a 0a .word 0x0a0a0a0a | |
10004d6c: 80 80 80 80 .word 0x80808080 | |
10004d70: ff fe fe fe .word 0xfefefeff | |
10004d74: 60 75 00 10 .word 0x10007560 | |
10004d78 <core::fmt::builders::DebugStruct::field>: | |
10004d78: b5f0 push {r4, r5, r6, r7, lr} | |
10004d7a: af03 add r7, sp, #12 | |
10004d7c: b093 sub sp, #76 | |
10004d7e: 4604 mov r4, r0 | |
10004d80: 7900 ldrb r0, [r0, #4] | |
10004d82: 2501 movs r5, #1 | |
10004d84: 2800 cmp r0, #0 | |
10004d86: 4628 mov r0, r5 | |
10004d88: d004 beq 0x10004d94 <core::fmt::builders::DebugStruct::field+0x1c> @ imm = #8 | |
10004d8a: 7165 strb r5, [r4, #5] | |
10004d8c: 7120 strb r0, [r4, #4] | |
10004d8e: 4620 mov r0, r4 | |
10004d90: b013 add sp, #76 | |
10004d92: bdf0 pop {r4, r5, r6, r7, pc} | |
10004d94: 9104 str r1, [sp, #16] | |
10004d96: 9205 str r2, [sp, #20] | |
10004d98: 68b8 ldr r0, [r7, #8] | |
10004d9a: 9002 str r0, [sp, #8] | |
10004d9c: 7962 ldrb r2, [r4, #5] | |
10004d9e: 6826 ldr r6, [r4] | |
10004da0: 69b0 ldr r0, [r6, #24] | |
10004da2: 0741 lsls r1, r0, #29 | |
10004da4: 9303 str r3, [sp, #12] | |
10004da6: d406 bmi 0x10004db6 <core::fmt::builders::DebugStruct::field+0x3e> @ imm = #12 | |
10004da8: 2a00 cmp r2, #0 | |
10004daa: d044 beq 0x10004e36 <core::fmt::builders::DebugStruct::field+0xbe> @ imm = #136 | |
10004dac: 493d ldr r1, [pc, #244] @ 0x10004ea4 <$d.142+0x14> | |
10004dae: 2a00 cmp r2, #0 | |
10004db0: d144 bne 0x10004e3c <core::fmt::builders::DebugStruct::field+0xc4> @ imm = #136 | |
10004db2: 2203 movs r2, #3 | |
10004db4: e043 b 0x10004e3e <core::fmt::builders::DebugStruct::field+0xc6> @ imm = #134 | |
10004db6: 2a00 cmp r2, #0 | |
10004db8: d109 bne 0x10004dce <core::fmt::builders::DebugStruct::field+0x56> @ imm = #18 | |
10004dba: ce03 ldm r6!, {r0, r1} | |
10004dbc: 68cb ldr r3, [r1, #12] | |
10004dbe: 4934 ldr r1, [pc, #208] @ 0x10004e90 <$d.142> | |
10004dc0: 2203 movs r2, #3 | |
10004dc2: 3e08 subs r6, #8 | |
10004dc4: 4798 blx r3 | |
10004dc6: 2800 cmp r0, #0 | |
10004dc8: 4628 mov r0, r5 | |
10004dca: d1de bne 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-68 | |
10004dcc: 69b0 ldr r0, [r6, #24] | |
10004dce: a909 add r1, sp, #36 | |
10004dd0: 9100 str r1, [sp] | |
10004dd2: 2201 movs r2, #1 | |
10004dd4: 700a strb r2, [r1] | |
10004dd6: 2220 movs r2, #32 | |
10004dd8: 5cb3 ldrb r3, [r6, r2] | |
10004dda: 9301 str r3, [sp, #4] | |
10004ddc: ab0a add r3, sp, #40 | |
10004dde: 9901 ldr r1, [sp, #4] | |
10004de0: 5499 strb r1, [r3, r2] | |
10004de2: 9900 ldr r1, [sp] | |
10004de4: 9108 str r1, [sp, #32] | |
10004de6: 9010 str r0, [sp, #64] | |
10004de8: 6870 ldr r0, [r6, #4] | |
10004dea: 9007 str r0, [sp, #28] | |
10004dec: 6830 ldr r0, [r6] | |
10004dee: 9006 str r0, [sp, #24] | |
10004df0: 69f0 ldr r0, [r6, #28] | |
10004df2: 9011 str r0, [sp, #68] | |
10004df4: 6970 ldr r0, [r6, #20] | |
10004df6: 900f str r0, [sp, #60] | |
10004df8: 6930 ldr r0, [r6, #16] | |
10004dfa: 900e str r0, [sp, #56] | |
10004dfc: 68f0 ldr r0, [r6, #12] | |
10004dfe: 900d str r0, [sp, #52] | |
10004e00: 68b0 ldr r0, [r6, #8] | |
10004e02: 900c str r0, [sp, #48] | |
10004e04: 4823 ldr r0, [pc, #140] @ 0x10004e94 <$d.142+0x4> | |
10004e06: 900b str r0, [sp, #44] | |
10004e08: a806 add r0, sp, #24 | |
10004e0a: 900a str r0, [sp, #40] | |
10004e0c: 9904 ldr r1, [sp, #16] | |
10004e0e: 9a05 ldr r2, [sp, #20] | |
10004e10: f7ff fe82 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-764 | |
10004e14: 2800 cmp r0, #0 | |
10004e16: d10c bne 0x10004e32 <core::fmt::builders::DebugStruct::field+0xba> @ imm = #24 | |
10004e18: a806 add r0, sp, #24 | |
10004e1a: 491f ldr r1, [pc, #124] @ 0x10004e98 <$d.142+0x8> | |
10004e1c: 2202 movs r2, #2 | |
10004e1e: f7ff fe7b bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-778 | |
10004e22: 2800 cmp r0, #0 | |
10004e24: d105 bne 0x10004e32 <core::fmt::builders::DebugStruct::field+0xba> @ imm = #10 | |
10004e26: a90a add r1, sp, #40 | |
10004e28: 9803 ldr r0, [sp, #12] | |
10004e2a: 9a02 ldr r2, [sp, #8] | |
10004e2c: 4790 blx r2 | |
10004e2e: 2800 cmp r0, #0 | |
10004e30: d027 beq 0x10004e82 <core::fmt::builders::DebugStruct::field+0x10a> @ imm = #78 | |
10004e32: 4628 mov r0, r5 | |
10004e34: e7a9 b 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-174 | |
10004e36: 491a ldr r1, [pc, #104] @ 0x10004ea0 <$d.142+0x10> | |
10004e38: 2a00 cmp r2, #0 | |
10004e3a: d0ba beq 0x10004db2 <core::fmt::builders::DebugStruct::field+0x3a> @ imm = #-140 | |
10004e3c: 2202 movs r2, #2 | |
10004e3e: ce09 ldm r6!, {r0, r3} | |
10004e40: 68db ldr r3, [r3, #12] | |
10004e42: 3e08 subs r6, #8 | |
10004e44: 4798 blx r3 | |
10004e46: 2800 cmp r0, #0 | |
10004e48: 4628 mov r0, r5 | |
10004e4a: 9a05 ldr r2, [sp, #20] | |
10004e4c: 9b04 ldr r3, [sp, #16] | |
10004e4e: d19c bne 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-200 | |
10004e50: ce03 ldm r6!, {r0, r1} | |
10004e52: 68c9 ldr r1, [r1, #12] | |
10004e54: 9101 str r1, [sp, #4] | |
10004e56: 4619 mov r1, r3 | |
10004e58: 9b01 ldr r3, [sp, #4] | |
10004e5a: 3e08 subs r6, #8 | |
10004e5c: 4798 blx r3 | |
10004e5e: 2800 cmp r0, #0 | |
10004e60: 4628 mov r0, r5 | |
10004e62: d192 bne 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-220 | |
10004e64: ce03 ldm r6!, {r0, r1} | |
10004e66: 68cb ldr r3, [r1, #12] | |
10004e68: 490b ldr r1, [pc, #44] @ 0x10004e98 <$d.142+0x8> | |
10004e6a: 2202 movs r2, #2 | |
10004e6c: 3e08 subs r6, #8 | |
10004e6e: 4798 blx r3 | |
10004e70: 9903 ldr r1, [sp, #12] | |
10004e72: 2800 cmp r0, #0 | |
10004e74: 4628 mov r0, r5 | |
10004e76: d188 bne 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-240 | |
10004e78: 4608 mov r0, r1 | |
10004e7a: 4631 mov r1, r6 | |
10004e7c: 9a02 ldr r2, [sp, #8] | |
10004e7e: 4790 blx r2 | |
10004e80: e783 b 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-250 | |
10004e82: 980b ldr r0, [sp, #44] | |
10004e84: 68c3 ldr r3, [r0, #12] | |
10004e86: 980a ldr r0, [sp, #40] | |
10004e88: 4904 ldr r1, [pc, #16] @ 0x10004e9c <$d.142+0xc> | |
10004e8a: 2202 movs r2, #2 | |
10004e8c: 4798 blx r3 | |
10004e8e: e77c b 0x10004d8a <core::fmt::builders::DebugStruct::field+0x12> @ imm = #-264 | |
10004e90 <$d.142>: | |
10004e90: c0 75 00 10 .word 0x100075c0 | |
10004e94: 38 75 00 10 .word 0x10007538 | |
10004e98: 34 75 00 10 .word 0x10007534 | |
10004e9c: c3 75 00 10 .word 0x100075c3 | |
10004ea0: c7 75 00 10 .word 0x100075c7 | |
10004ea4: c5 75 00 10 .word 0x100075c5 | |
10004ea8 <core::fmt::Write::write_char>: | |
10004ea8: b5d0 push {r4, r6, r7, lr} | |
10004eaa: af02 add r7, sp, #8 | |
10004eac: b082 sub sp, #8 | |
10004eae: 2200 movs r2, #0 | |
10004eb0: 9201 str r2, [sp, #4] | |
10004eb2: 2980 cmp r1, #128 | |
10004eb4: d207 bhs 0x10004ec6 <core::fmt::Write::write_char+0x1e> @ imm = #14 | |
10004eb6: aa01 add r2, sp, #4 | |
10004eb8: 7011 strb r1, [r2] | |
10004eba: 2201 movs r2, #1 | |
10004ebc: a901 add r1, sp, #4 | |
10004ebe: f7ff fe2b bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-938 | |
10004ec2: b002 add sp, #8 | |
10004ec4: bdd0 pop {r4, r6, r7, pc} | |
10004ec6: 0aca lsrs r2, r1, #11 | |
10004ec8: d10e bne 0x10004ee8 <core::fmt::Write::write_char+0x40> @ imm = #28 | |
10004eca: 223f movs r2, #63 | |
10004ecc: 400a ands r2, r1 | |
10004ece: 3280 adds r2, #128 | |
10004ed0: ab01 add r3, sp, #4 | |
10004ed2: 705a strb r2, [r3, #1] | |
10004ed4: 0989 lsrs r1, r1, #6 | |
10004ed6: 22c0 movs r2, #192 | |
10004ed8: 430a orrs r2, r1 | |
10004eda: 701a strb r2, [r3] | |
10004edc: 2202 movs r2, #2 | |
10004ede: a901 add r1, sp, #4 | |
10004ee0: f7ff fe1a bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-972 | |
10004ee4: b002 add sp, #8 | |
10004ee6: bdd0 pop {r4, r6, r7, pc} | |
10004ee8: 0c0a lsrs r2, r1, #16 | |
10004eea: d112 bne 0x10004f12 <core::fmt::Write::write_char+0x6a> @ imm = #36 | |
10004eec: 223f movs r2, #63 | |
10004eee: 400a ands r2, r1 | |
10004ef0: 3280 adds r2, #128 | |
10004ef2: ab01 add r3, sp, #4 | |
10004ef4: 709a strb r2, [r3, #2] | |
10004ef6: 0b0a lsrs r2, r1, #12 | |
10004ef8: 24e0 movs r4, #224 | |
10004efa: 4314 orrs r4, r2 | |
10004efc: 701c strb r4, [r3] | |
10004efe: 0509 lsls r1, r1, #20 | |
10004f00: 0e89 lsrs r1, r1, #26 | |
10004f02: 3180 adds r1, #128 | |
10004f04: 7059 strb r1, [r3, #1] | |
10004f06: 2203 movs r2, #3 | |
10004f08: a901 add r1, sp, #4 | |
10004f0a: f7ff fe05 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1014 | |
10004f0e: b002 add sp, #8 | |
10004f10: bdd0 pop {r4, r6, r7, pc} | |
10004f12: 233f movs r3, #63 | |
10004f14: 400b ands r3, r1 | |
10004f16: 3380 adds r3, #128 | |
10004f18: aa01 add r2, sp, #4 | |
10004f1a: 70d3 strb r3, [r2, #3] | |
10004f1c: 050b lsls r3, r1, #20 | |
10004f1e: 0e9b lsrs r3, r3, #26 | |
10004f20: 3380 adds r3, #128 | |
10004f22: 7093 strb r3, [r2, #2] | |
10004f24: 038b lsls r3, r1, #14 | |
10004f26: 0e9b lsrs r3, r3, #26 | |
10004f28: 3380 adds r3, #128 | |
10004f2a: 7053 strb r3, [r2, #1] | |
10004f2c: 02c9 lsls r1, r1, #11 | |
10004f2e: 0f49 lsrs r1, r1, #29 | |
10004f30: 31f0 adds r1, #240 | |
10004f32: 7011 strb r1, [r2] | |
10004f34: 2204 movs r2, #4 | |
10004f36: a901 add r1, sp, #4 | |
10004f38: f7ff fdee bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1060 | |
10004f3c: b002 add sp, #8 | |
10004f3e: bdd0 pop {r4, r6, r7, pc} | |
10004f40 <core::fmt::Write::write_fmt>: | |
10004f40: b5b0 push {r4, r5, r7, lr} | |
10004f42: af02 add r7, sp, #8 | |
10004f44: b088 sub sp, #32 | |
10004f46: 9001 str r0, [sp, #4] | |
10004f48: aa02 add r2, sp, #8 | |
10004f4a: 4610 mov r0, r2 | |
10004f4c: c938 ldm r1!, {r3, r4, r5} | |
10004f4e: c038 stm r0!, {r3, r4, r5} | |
10004f50: c938 ldm r1!, {r3, r4, r5} | |
10004f52: c038 stm r0!, {r3, r4, r5} | |
10004f54: a801 add r0, sp, #4 | |
10004f56: 4902 ldr r1, [pc, #8] @ 0x10004f60 <$d.145> | |
10004f58: f7ff fd1a bl 0x10004990 <core::fmt::write> @ imm = #-1484 | |
10004f5c: b008 add sp, #32 | |
10004f5e: bdb0 pop {r4, r5, r7, pc} | |
10004f60 <$d.145>: | |
10004f60: 9c 76 00 10 .word 0x1000769c | |
10004f64 <<&mut W as core::fmt::Write>::write_str>: | |
10004f64: b580 push {r7, lr} | |
10004f66: af00 add r7, sp, #0 | |
10004f68: 6800 ldr r0, [r0] | |
10004f6a: f7ff fdd5 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1110 | |
10004f6e: bd80 pop {r7, pc} | |
10004f70 <<&mut W as core::fmt::Write>::write_char>: | |
10004f70: b5d0 push {r4, r6, r7, lr} | |
10004f72: af02 add r7, sp, #8 | |
10004f74: b082 sub sp, #8 | |
10004f76: 6800 ldr r0, [r0] | |
10004f78: 2200 movs r2, #0 | |
10004f7a: 9201 str r2, [sp, #4] | |
10004f7c: 2980 cmp r1, #128 | |
10004f7e: d207 bhs 0x10004f90 <<&mut W as core::fmt::Write>::write_char+0x20> @ imm = #14 | |
10004f80: aa01 add r2, sp, #4 | |
10004f82: 7011 strb r1, [r2] | |
10004f84: 2201 movs r2, #1 | |
10004f86: a901 add r1, sp, #4 | |
10004f88: f7ff fdc6 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1140 | |
10004f8c: b002 add sp, #8 | |
10004f8e: bdd0 pop {r4, r6, r7, pc} | |
10004f90: 0aca lsrs r2, r1, #11 | |
10004f92: d10e bne 0x10004fb2 <<&mut W as core::fmt::Write>::write_char+0x42> @ imm = #28 | |
10004f94: 223f movs r2, #63 | |
10004f96: 400a ands r2, r1 | |
10004f98: 3280 adds r2, #128 | |
10004f9a: ab01 add r3, sp, #4 | |
10004f9c: 705a strb r2, [r3, #1] | |
10004f9e: 0989 lsrs r1, r1, #6 | |
10004fa0: 22c0 movs r2, #192 | |
10004fa2: 430a orrs r2, r1 | |
10004fa4: 701a strb r2, [r3] | |
10004fa6: 2202 movs r2, #2 | |
10004fa8: a901 add r1, sp, #4 | |
10004faa: f7ff fdb5 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1174 | |
10004fae: b002 add sp, #8 | |
10004fb0: bdd0 pop {r4, r6, r7, pc} | |
10004fb2: 0c0a lsrs r2, r1, #16 | |
10004fb4: d112 bne 0x10004fdc <<&mut W as core::fmt::Write>::write_char+0x6c> @ imm = #36 | |
10004fb6: 223f movs r2, #63 | |
10004fb8: 400a ands r2, r1 | |
10004fba: 3280 adds r2, #128 | |
10004fbc: ab01 add r3, sp, #4 | |
10004fbe: 709a strb r2, [r3, #2] | |
10004fc0: 0b0a lsrs r2, r1, #12 | |
10004fc2: 24e0 movs r4, #224 | |
10004fc4: 4314 orrs r4, r2 | |
10004fc6: 701c strb r4, [r3] | |
10004fc8: 0509 lsls r1, r1, #20 | |
10004fca: 0e89 lsrs r1, r1, #26 | |
10004fcc: 3180 adds r1, #128 | |
10004fce: 7059 strb r1, [r3, #1] | |
10004fd0: 2203 movs r2, #3 | |
10004fd2: a901 add r1, sp, #4 | |
10004fd4: f7ff fda0 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1216 | |
10004fd8: b002 add sp, #8 | |
10004fda: bdd0 pop {r4, r6, r7, pc} | |
10004fdc: 233f movs r3, #63 | |
10004fde: 400b ands r3, r1 | |
10004fe0: 3380 adds r3, #128 | |
10004fe2: aa01 add r2, sp, #4 | |
10004fe4: 70d3 strb r3, [r2, #3] | |
10004fe6: 050b lsls r3, r1, #20 | |
10004fe8: 0e9b lsrs r3, r3, #26 | |
10004fea: 3380 adds r3, #128 | |
10004fec: 7093 strb r3, [r2, #2] | |
10004fee: 038b lsls r3, r1, #14 | |
10004ff0: 0e9b lsrs r3, r3, #26 | |
10004ff2: 3380 adds r3, #128 | |
10004ff4: 7053 strb r3, [r2, #1] | |
10004ff6: 02c9 lsls r1, r1, #11 | |
10004ff8: 0f49 lsrs r1, r1, #29 | |
10004ffa: 31f0 adds r1, #240 | |
10004ffc: 7011 strb r1, [r2] | |
10004ffe: 2204 movs r2, #4 | |
10005000: a901 add r1, sp, #4 | |
10005002: f7ff fd89 bl 0x10004b18 <<core::fmt::builders::PadAdapter as core::fmt::Write>::write_str> @ imm = #-1262 | |
10005006: b002 add sp, #8 | |
10005008: bdd0 pop {r4, r6, r7, pc} | |
1000500a: d4d4 bmi 0x10004fb6 <<&mut W as core::fmt::Write>::write_char+0x46> @ imm = #-88 | |
1000500c <<&mut W as core::fmt::Write>::write_fmt>: | |
1000500c: b5b0 push {r4, r5, r7, lr} | |
1000500e: af02 add r7, sp, #8 | |
10005010: b088 sub sp, #32 | |
10005012: 6800 ldr r0, [r0] | |
10005014: 9001 str r0, [sp, #4] | |
10005016: aa02 add r2, sp, #8 | |
10005018: 4610 mov r0, r2 | |
1000501a: c938 ldm r1!, {r3, r4, r5} | |
1000501c: c038 stm r0!, {r3, r4, r5} | |
1000501e: c938 ldm r1!, {r3, r4, r5} | |
10005020: c038 stm r0!, {r3, r4, r5} | |
10005022: a801 add r0, sp, #4 | |
10005024: 4902 ldr r1, [pc, #8] @ 0x10005030 <$d.149> | |
10005026: f7ff fcb3 bl 0x10004990 <core::fmt::write> @ imm = #-1690 | |
1000502a: b008 add sp, #32 | |
1000502c: bdb0 pop {r4, r5, r7, pc} | |
1000502e: 46c0 mov r8, r8 | |
10005030 <$d.149>: | |
10005030: 9c 76 00 10 .word 0x1000769c | |
10005034 <core::fmt::Formatter::debug_tuple_field1_finish>: | |
10005034: b5f0 push {r4, r5, r6, r7, lr} | |
10005036: af03 add r7, sp, #12 | |
10005038: b093 sub sp, #76 | |
1000503a: 9305 str r3, [sp, #20] | |
1000503c: 4605 mov r5, r0 | |
1000503e: 6806 ldr r6, [r0] | |
10005040: 6840 ldr r0, [r0, #4] | |
10005042: 9004 str r0, [sp, #16] | |
10005044: 68c4 ldr r4, [r0, #12] | |
10005046: 4630 mov r0, r6 | |
10005048: 47a0 blx r4 | |
1000504a: 2101 movs r1, #1 | |
1000504c: 2800 cmp r0, #0 | |
1000504e: d10c bne 0x1000506a <core::fmt::Formatter::debug_tuple_field1_finish+0x36> @ imm = #24 | |
10005050: 9103 str r1, [sp, #12] | |
10005052: 68b8 ldr r0, [r7, #8] | |
10005054: 9002 str r0, [sp, #8] | |
10005056: 69a9 ldr r1, [r5, #24] | |
10005058: 0748 lsls r0, r1, #29 | |
1000505a: d409 bmi 0x10005070 <core::fmt::Formatter::debug_tuple_field1_finish+0x3c> @ imm = #18 | |
1000505c: 492a ldr r1, [pc, #168] @ 0x10005108 <$d.151+0xc> | |
1000505e: 2201 movs r2, #1 | |
10005060: 4630 mov r0, r6 | |
10005062: 47a0 blx r4 | |
10005064: 2800 cmp r0, #0 | |
10005066: d00e beq 0x10005086 <core::fmt::Formatter::debug_tuple_field1_finish+0x52> @ imm = #28 | |
10005068: 9903 ldr r1, [sp, #12] | |
1000506a: 4608 mov r0, r1 | |
1000506c: b013 add sp, #76 | |
1000506e: bdf0 pop {r4, r5, r6, r7, pc} | |
10005070: 9101 str r1, [sp, #4] | |
10005072: 4922 ldr r1, [pc, #136] @ 0x100050fc <$d.151> | |
10005074: 2202 movs r2, #2 | |
10005076: 4630 mov r0, r6 | |
10005078: 47a0 blx r4 | |
1000507a: 2800 cmp r0, #0 | |
1000507c: d00b beq 0x10005096 <core::fmt::Formatter::debug_tuple_field1_finish+0x62> @ imm = #22 | |
1000507e: 9903 ldr r1, [sp, #12] | |
10005080: 4608 mov r0, r1 | |
10005082: b013 add sp, #76 | |
10005084: bdf0 pop {r4, r5, r6, r7, pc} | |
10005086: 9805 ldr r0, [sp, #20] | |
10005088: 4629 mov r1, r5 | |
1000508a: 9a02 ldr r2, [sp, #8] | |
1000508c: 4790 blx r2 | |
1000508e: 2800 cmp r0, #0 | |
10005090: 9903 ldr r1, [sp, #12] | |
10005092: d1ea bne 0x1000506a <core::fmt::Formatter::debug_tuple_field1_finish+0x36> @ imm = #-44 | |
10005094: e029 b 0x100050ea <core::fmt::Formatter::debug_tuple_field1_finish+0xb6> @ imm = #82 | |
10005096: a809 add r0, sp, #36 | |
10005098: 2101 movs r1, #1 | |
1000509a: 7001 strb r1, [r0] | |
1000509c: 2220 movs r2, #32 | |
1000509e: 5cab ldrb r3, [r5, r2] | |
100050a0: a90a add r1, sp, #40 | |
100050a2: 548b strb r3, [r1, r2] | |
100050a4: 9008 str r0, [sp, #32] | |
100050a6: 9804 ldr r0, [sp, #16] | |
100050a8: 9007 str r0, [sp, #28] | |
100050aa: 9606 str r6, [sp, #24] | |
100050ac: 9801 ldr r0, [sp, #4] | |
100050ae: 9010 str r0, [sp, #64] | |
100050b0: 4813 ldr r0, [pc, #76] @ 0x10005100 <$d.151+0x4> | |
100050b2: 900b str r0, [sp, #44] | |
100050b4: a806 add r0, sp, #24 | |
100050b6: 900a str r0, [sp, #40] | |
100050b8: 69e8 ldr r0, [r5, #28] | |
100050ba: 9011 str r0, [sp, #68] | |
100050bc: 462c mov r4, r5 | |
100050be: 3408 adds r4, #8 | |
100050c0: cc1d ldm r4, {r0, r2, r3, r4} | |
100050c2: ae0c add r6, sp, #48 | |
100050c4: c61d stm r6!, {r0, r2, r3, r4} | |
100050c6: 9805 ldr r0, [sp, #20] | |
100050c8: 9a02 ldr r2, [sp, #8] | |
100050ca: 4790 blx r2 | |
100050cc: 2800 cmp r0, #0 | |
100050ce: d003 beq 0x100050d8 <core::fmt::Formatter::debug_tuple_field1_finish+0xa4> @ imm = #6 | |
100050d0: 9903 ldr r1, [sp, #12] | |
100050d2: 4608 mov r0, r1 | |
100050d4: b013 add sp, #76 | |
100050d6: bdf0 pop {r4, r5, r6, r7, pc} | |
100050d8: 980b ldr r0, [sp, #44] | |
100050da: 68c3 ldr r3, [r0, #12] | |
100050dc: 980a ldr r0, [sp, #40] | |
100050de: 4909 ldr r1, [pc, #36] @ 0x10005104 <$d.151+0x8> | |
100050e0: 2202 movs r2, #2 | |
100050e2: 4798 blx r3 | |
100050e4: 2800 cmp r0, #0 | |
100050e6: 9903 ldr r1, [sp, #12] | |
100050e8: d1bf bne 0x1000506a <core::fmt::Formatter::debug_tuple_field1_finish+0x36> @ imm = #-130 | |
100050ea: cd03 ldm r5!, {r0, r1} | |
100050ec: 68cb ldr r3, [r1, #12] | |
100050ee: 4907 ldr r1, [pc, #28] @ 0x1000510c <$d.151+0x10> | |
100050f0: 2201 movs r2, #1 | |
100050f2: 4798 blx r3 | |
100050f4: 4601 mov r1, r0 | |
100050f6: 4608 mov r0, r1 | |
100050f8: b013 add sp, #76 | |
100050fa: bdf0 pop {r4, r5, r6, r7, pc} | |
100050fc <$d.151>: | |
100050fc: cd 75 00 10 .word 0x100075cd | |
10005100: 38 75 00 10 .word 0x10007538 | |
10005104: c3 75 00 10 .word 0x100075c3 | |
10005108: cf 75 00 10 .word 0x100075cf | |
1000510c: b5 7b 00 10 .word 0x10007bb5 | |
10005110 <<core::fmt::Error as core::fmt::Debug>::fmt>: | |
10005110: b580 push {r7, lr} | |
10005112: af00 add r7, sp, #0 | |
10005114: c903 ldm r1, {r0, r1} | |
10005116: 68cb ldr r3, [r1, #12] | |
10005118: 4901 ldr r1, [pc, #4] @ 0x10005120 <$d.153> | |
1000511a: 2205 movs r2, #5 | |
1000511c: 4798 blx r3 | |
1000511e: bd80 pop {r7, pc} | |
10005120 <$d.153>: | |
10005120: b4 77 00 10 .word 0x100077b4 | |
10005124 <cortex_m::delay::Delay::delay_us>: | |
; pub fn delay_us(&mut self, us: u32) { | |
10005124: b5f0 push {r4, r5, r6, r7, lr} | |
10005126: af03 add r7, sp, #12 | |
10005128: b085 sub sp, #20 | |
1000512a: 4602 mov r2, r0 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
1000512c: 482d ldr r0, [pc, #180] @ 0x100051e4 <$d.155> | |
1000512e: 6c40 ldr r0, [r0, #68] | |
10005130: 2400 movs r4, #0 | |
; let ticks = (u64::from(us)) * (u64::from(self.frequency)) / 1_000_000; | |
10005132: 4621 mov r1, r4 | |
10005134: 4623 mov r3, r4 | |
10005136: f001 fc8b bl 0x10006a50 <__aeabi_lmul> @ imm = #6422 | |
1000513a: 4606 mov r6, r0 | |
1000513c: 9102 str r1, [sp, #8] | |
1000513e: 4a2a ldr r2, [pc, #168] @ 0x100051e8 <$d.155+0x4> | |
10005140: 4623 mov r3, r4 | |
10005142: f001 fc75 bl 0x10006a30 <__aeabi_uldivmod> @ imm = #6378 | |
10005146: 9003 str r0, [sp, #12] | |
10005148: 9101 str r1, [sp, #4] | |
1000514a: 2001 movs r0, #1 | |
1000514c: 9004 str r0, [sp, #16] | |
1000514e: 0402 lsls r2, r0, #16 | |
10005150: 4b27 ldr r3, [pc, #156] @ 0x100051f0 <$d.155+0xc> | |
10005152: 4928 ldr r1, [pc, #160] @ 0x100051f4 <$d.155+0x10> | |
10005154: 4d28 ldr r5, [pc, #160] @ 0x100051f8 <$d.155+0x14> | |
; if full_cycles > 0 { | |
10005156: 1bad subs r5, r5, r6 | |
10005158: 9802 ldr r0, [sp, #8] | |
1000515a: 4181 sbcs r1, r0 | |
1000515c: d31e blo 0x1000519c <cortex_m::delay::Delay::delay_us+0x78> @ imm = #60 | |
1000515e: 9803 ldr r0, [sp, #12] | |
; let ticks = (ticks & 0xffffff) as u32; | |
10005160: 4922 ldr r1, [pc, #136] @ 0x100051ec <$d.155+0x8> | |
10005162: 4008 ands r0, r1 | |
; if ticks > 1 { | |
10005164: 2801 cmp r0, #1 | |
10005166: d913 bls 0x10005190 <cortex_m::delay::Delay::delay_us+0x6c> @ imm = #38 | |
; self.syst.set_reload(ticks - 1); | |
10005168: 1e40 subs r0, r0, #1 | |
1000516a: 6058 str r0, [r3, #4] | |
1000516c: 2000 movs r0, #0 | |
1000516e: 6098 str r0, [r3, #8] | |
10005170: 6818 ldr r0, [r3] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
10005172: 9904 ldr r1, [sp, #16] | |
10005174: 4308 orrs r0, r1 | |
10005176: 6018 str r0, [r3] | |
10005178: 6818 ldr r0, [r3] | |
; while !self.syst.has_wrapped() {} | |
1000517a: 4210 tst r0, r2 | |
1000517c: d108 bne 0x10005190 <cortex_m::delay::Delay::delay_us+0x6c> @ imm = #16 | |
1000517e: 6818 ldr r0, [r3] | |
; while !self.syst.has_wrapped() {} | |
10005180: 4210 tst r0, r2 | |
10005182: d105 bne 0x10005190 <cortex_m::delay::Delay::delay_us+0x6c> @ imm = #10 | |
10005184: 6818 ldr r0, [r3] | |
; while !self.syst.has_wrapped() {} | |
10005186: 4210 tst r0, r2 | |
10005188: d102 bne 0x10005190 <cortex_m::delay::Delay::delay_us+0x6c> @ imm = #4 | |
1000518a: 6818 ldr r0, [r3] | |
; while !self.syst.has_wrapped() {} | |
1000518c: 4210 tst r0, r2 | |
1000518e: d0f3 beq 0x10005178 <cortex_m::delay::Delay::delay_us+0x54> @ imm = #-26 | |
10005190: 6818 ldr r0, [r3] | |
; unsafe { self.csr.modify(|v| v & !SYST_CSR_ENABLE) } | |
10005192: 9904 ldr r1, [sp, #16] | |
10005194: 4388 bics r0, r1 | |
10005196: 6018 str r0, [r3] | |
; } | |
10005198: b005 add sp, #20 | |
1000519a: bdf0 pop {r4, r5, r6, r7, pc} | |
1000519c: 4813 ldr r0, [pc, #76] @ 0x100051ec <$d.155+0x8> | |
1000519e: 6058 str r0, [r3, #4] | |
100051a0: 609c str r4, [r3, #8] | |
100051a2: 6819 ldr r1, [r3] | |
; unsafe { self.csr.modify(|v| v | SYST_CSR_ENABLE) } | |
100051a4: 9804 ldr r0, [sp, #16] | |
100051a6: 4301 orrs r1, r0 | |
100051a8: 6019 str r1, [r3] | |
; let full_cycles = ticks >> 24; | |
100051aa: 9803 ldr r0, [sp, #12] | |
100051ac: 0e01 lsrs r1, r0, #24 | |
100051ae: 9e01 ldr r6, [sp, #4] | |
; let full_cycles = ticks >> 24; | |
100051b0: 0235 lsls r5, r6, #8 | |
100051b2: 1948 adds r0, r1, r5 | |
100051b4: 0e31 lsrs r1, r6, #24 | |
100051b6: 4626 mov r6, r4 | |
100051b8: e006 b 0x100051c8 <cortex_m::delay::Delay::delay_us+0xa4> @ imm = #12 | |
100051ba: 2500 movs r5, #0 | |
100051bc: 1c64 adds r4, r4, #1 | |
100051be: 416e adcs r6, r5 | |
100051c0: 1a25 subs r5, r4, r0 | |
100051c2: 4635 mov r5, r6 | |
100051c4: 418d sbcs r5, r1 | |
100051c6: d2ca bhs 0x1000515e <cortex_m::delay::Delay::delay_us+0x3a> @ imm = #-108 | |
100051c8: 681d ldr r5, [r3] | |
; while !self.syst.has_wrapped() {} | |
100051ca: 4215 tst r5, r2 | |
100051cc: d1f5 bne 0x100051ba <cortex_m::delay::Delay::delay_us+0x96> @ imm = #-22 | |
100051ce: 681d ldr r5, [r3] | |
; while !self.syst.has_wrapped() {} | |
100051d0: 4215 tst r5, r2 | |
100051d2: d1f2 bne 0x100051ba <cortex_m::delay::Delay::delay_us+0x96> @ imm = #-28 | |
100051d4: 681d ldr r5, [r3] | |
; while !self.syst.has_wrapped() {} | |
100051d6: 4215 tst r5, r2 | |
100051d8: d1ef bne 0x100051ba <cortex_m::delay::Delay::delay_us+0x96> @ imm = #-34 | |
100051da: 681d ldr r5, [r3] | |
; while !self.syst.has_wrapped() {} | |
100051dc: 4215 tst r5, r2 | |
100051de: d0f3 beq 0x100051c8 <cortex_m::delay::Delay::delay_us+0xa4> @ imm = #-26 | |
100051e0: e7eb b 0x100051ba <cortex_m::delay::Delay::delay_us+0x96> @ imm = #-42 | |
100051e2: 46c0 mov r8, r8 | |
100051e4 <$d.155>: | |
100051e4: f0 c5 03 20 .word 0x2003c5f0 | |
100051e8: 40 42 0f 00 .word 0x000f4240 | |
100051ec: ff ff ff 00 .word 0x00ffffff | |
100051f0: 10 e0 00 e0 .word 0xe000e010 | |
100051f4: 42 0f 00 00 .word 0x00000f42 | |
100051f8: ff ff ff 3f .word 0x3fffffff | |
100051fc <XIP_IRQ>: | |
; loop {} | |
100051fc: e7fe b 0x100051fc <XIP_IRQ> @ imm = #-4 | |
100051fe <__pre_init>: | |
; pub unsafe extern "C" fn DefaultPreInit() {} | |
100051fe: 4770 bx lr | |
10005200 <defmt::export::header>: | |
; pub fn header(s: &Str) { | |
10005200: b580 push {r7, lr} | |
10005202: af00 add r7, sp, #0 | |
10005204: b082 sub sp, #8 | |
10005206: aa01 add r2, sp, #4 | |
10005208: 8010 strh r0, [r2] | |
1000520a: 2102 movs r1, #2 | |
; unsafe { _defmt_write(bytes) } | |
1000520c: 4610 mov r0, r2 | |
1000520e: f000 f94d bl 0x100054ac <_defmt_write> @ imm = #666 | |
; unsafe { _defmt_timestamp(fmt) } | |
10005212: f000 f802 bl 0x1000521a <_defmt_timestamp> @ imm = #4 | |
; } | |
10005216: b002 add sp, #8 | |
10005218: bd80 pop {r7, pc} | |
1000521a <_defmt_timestamp>: | |
; fn default_timestamp(_f: Formatter<'_>) {} | |
1000521a: 4770 bx lr | |
1000521c <_defmt_panic>: | |
; fn default_panic() -> ! { | |
1000521c: b580 push {r7, lr} | |
1000521e: af00 add r7, sp, #0 | |
; core::panic!() | |
10005220: 4802 ldr r0, [pc, #8] @ 0x1000522c <$d.162> | |
10005222: 210e movs r1, #14 | |
10005224: f7ff fbae bl 0x10004984 <core::panicking::panic> @ imm = #-2212 | |
10005228: defe trap | |
1000522a: 46c0 mov r8, r8 | |
1000522c <$d.162>: | |
1000522c: bc 77 00 10 .word 0x100077bc | |
10005230 <defmt_rtt::channel::Channel::blocking_write>: | |
; fn blocking_write(&self, bytes: &[u8]) -> usize { | |
10005230: b5f0 push {r4, r5, r6, r7, lr} | |
10005232: af03 add r7, sp, #12 | |
10005234: b083 sub sp, #12 | |
10005236: 4605 mov r5, r0 | |
10005238: 2000 movs r0, #0 | |
; if bytes.is_empty() { | |
1000523a: 2a00 cmp r2, #0 | |
1000523c: d015 beq 0x1000526a <defmt_rtt::channel::Channel::blocking_write+0x3a> @ imm = #42 | |
1000523e: 4614 mov r4, r2 | |
10005240: 9102 str r1, [sp, #8] | |
10005242: 692a ldr r2, [r5, #16] | |
10005244: 68e9 ldr r1, [r5, #12] | |
10005246: f3bf 8f5f dmb sy | |
1000524a: 2301 movs r3, #1 | |
1000524c: 029b lsls r3, r3, #10 | |
; if read_cursor > write_cursor { | |
1000524e: 428a cmp r2, r1 | |
10005250: d906 bls 0x10005260 <defmt_rtt::channel::Channel::blocking_write+0x30> @ imm = #12 | |
10005252: 461e mov r6, r3 | |
; read_cursor - write_cursor - 1 | |
10005254: 43cb mvns r3, r1 | |
10005256: 18d2 adds r2, r2, r3 | |
10005258: 4633 mov r3, r6 | |
; if available == 0 { | |
1000525a: 2a00 cmp r2, #0 | |
1000525c: d10b bne 0x10005276 <defmt_rtt::channel::Channel::blocking_write+0x46> @ imm = #22 | |
1000525e: e004 b 0x1000526a <defmt_rtt::channel::Channel::blocking_write+0x3a> @ imm = #8 | |
; } else if read_cursor == 0 { | |
10005260: 2a00 cmp r2, #0 | |
10005262: d004 beq 0x1000526e <defmt_rtt::channel::Channel::blocking_write+0x3e> @ imm = #8 | |
; BUF_SIZE - write_cursor | |
10005264: 1a5a subs r2, r3, r1 | |
; if available == 0 { | |
10005266: 2a00 cmp r2, #0 | |
10005268: d105 bne 0x10005276 <defmt_rtt::channel::Channel::blocking_write+0x46> @ imm = #10 | |
; } | |
1000526a: b003 add sp, #12 | |
1000526c: bdf0 pop {r4, r5, r6, r7, pc} | |
; BUF_SIZE - write_cursor - 1 | |
1000526e: 43ca mvns r2, r1 | |
10005270: 18d2 adds r2, r2, r3 | |
; if available == 0 { | |
10005272: 2a00 cmp r2, #0 | |
10005274: d0f9 beq 0x1000526a <defmt_rtt::channel::Channel::blocking_write+0x3a> @ imm = #-14 | |
10005276: 4294 cmp r4, r2 | |
10005278: d300 blo 0x1000527c <defmt_rtt::channel::Channel::blocking_write+0x4c> @ imm = #0 | |
1000527a: 4614 mov r4, r2 | |
; if cursor + len > BUF_SIZE { | |
1000527c: 1866 adds r6, r4, r1 | |
1000527e: 429e cmp r6, r3 | |
10005280: 9301 str r3, [sp, #4] | |
10005282: d90d bls 0x100052a0 <defmt_rtt::channel::Channel::blocking_write+0x70> @ imm = #26 | |
; let pivot = BUF_SIZE - cursor; | |
10005284: 1a58 subs r0, r3, r1 | |
; ptr::copy_nonoverlapping(bytes.as_ptr(), self.buffer.add(cursor), pivot); | |
10005286: 9000 str r0, [sp] | |
10005288: 6868 ldr r0, [r5, #4] | |
1000528a: 1840 adds r0, r0, r1 | |
1000528c: 9902 ldr r1, [sp, #8] | |
1000528e: 9a00 ldr r2, [sp] | |
10005290: f001 fb7c bl 0x1000698c <__aeabi_memcpy> @ imm = #5880 | |
10005294: 9800 ldr r0, [sp] | |
10005296: 9902 ldr r1, [sp, #8] | |
10005298: 1809 adds r1, r1, r0 | |
; ptr::copy_nonoverlapping(bytes.as_ptr().add(pivot), self.buffer, len - pivot); | |
1000529a: 1a22 subs r2, r4, r0 | |
1000529c: 6868 ldr r0, [r5, #4] | |
1000529e: e003 b 0x100052a8 <defmt_rtt::channel::Channel::blocking_write+0x78> @ imm = #6 | |
; ptr::copy_nonoverlapping(bytes.as_ptr(), self.buffer.add(cursor), len); | |
100052a0: 6868 ldr r0, [r5, #4] | |
100052a2: 1840 adds r0, r0, r1 | |
100052a4: 9902 ldr r1, [sp, #8] | |
100052a6: 4622 mov r2, r4 | |
100052a8: f001 fb70 bl 0x1000698c <__aeabi_memcpy> @ imm = #5856 | |
; .store(cursor.wrapping_add(len) % BUF_SIZE, Ordering::Release); | |
100052ac: 9801 ldr r0, [sp, #4] | |
100052ae: 1e40 subs r0, r0, #1 | |
100052b0: 4006 ands r6, r0 | |
100052b2: f3bf 8f5f dmb sy | |
100052b6: 60ee str r6, [r5, #12] | |
100052b8: 4620 mov r0, r4 | |
; } | |
100052ba: b003 add sp, #12 | |
100052bc: bdf0 pop {r4, r5, r6, r7, pc} | |
100052be <defmt_rtt::channel::Channel::nonblocking_write>: | |
; fn nonblocking_write(&self, bytes: &[u8]) -> usize { | |
100052be: b5f0 push {r4, r5, r6, r7, lr} | |
100052c0: af03 add r7, sp, #12 | |
100052c2: b083 sub sp, #12 | |
100052c4: 4616 mov r6, r2 | |
100052c6: 2201 movs r2, #1 | |
100052c8: 0294 lsls r4, r2, #10 | |
100052ca: 42a6 cmp r6, r4 | |
100052cc: d300 blo 0x100052d0 <defmt_rtt::channel::Channel::nonblocking_write+0x12> @ imm = #0 | |
100052ce: 4626 mov r6, r4 | |
100052d0: 68c3 ldr r3, [r0, #12] | |
; if cursor + len > BUF_SIZE { | |
100052d2: 199d adds r5, r3, r6 | |
100052d4: f3bf 8f5f dmb sy | |
; if cursor + len > BUF_SIZE { | |
100052d8: 42a5 cmp r5, r4 | |
100052da: 9002 str r0, [sp, #8] | |
100052dc: d90d bls 0x100052fa <defmt_rtt::channel::Channel::nonblocking_write+0x3c> @ imm = #26 | |
; let pivot = BUF_SIZE - cursor; | |
100052de: 1ae2 subs r2, r4, r3 | |
100052e0: 9200 str r2, [sp] | |
; ptr::copy_nonoverlapping(bytes.as_ptr(), self.buffer.add(cursor), pivot); | |
100052e2: 6840 ldr r0, [r0, #4] | |
100052e4: 18c0 adds r0, r0, r3 | |
100052e6: 9101 str r1, [sp, #4] | |
100052e8: f001 fb50 bl 0x1000698c <__aeabi_memcpy> @ imm = #5792 | |
100052ec: 9800 ldr r0, [sp] | |
100052ee: 9901 ldr r1, [sp, #4] | |
100052f0: 1809 adds r1, r1, r0 | |
; ptr::copy_nonoverlapping(bytes.as_ptr().add(pivot), self.buffer, len - pivot); | |
100052f2: 1a32 subs r2, r6, r0 | |
100052f4: 9802 ldr r0, [sp, #8] | |
100052f6: 6840 ldr r0, [r0, #4] | |
100052f8: e002 b 0x10005300 <defmt_rtt::channel::Channel::nonblocking_write+0x42> @ imm = #4 | |
; ptr::copy_nonoverlapping(bytes.as_ptr(), self.buffer.add(cursor), len); | |
100052fa: 6840 ldr r0, [r0, #4] | |
100052fc: 18c0 adds r0, r0, r3 | |
100052fe: 4632 mov r2, r6 | |
10005300: f001 fb44 bl 0x1000698c <__aeabi_memcpy> @ imm = #5768 | |
; .store(cursor.wrapping_add(len) % BUF_SIZE, Ordering::Release); | |
10005304: 1e60 subs r0, r4, #1 | |
10005306: 4005 ands r5, r0 | |
10005308: f3bf 8f5f dmb sy | |
1000530c: 9802 ldr r0, [sp, #8] | |
1000530e: 60c5 str r5, [r0, #12] | |
; } | |
10005310: 4630 mov r0, r6 | |
10005312: b003 add sp, #12 | |
10005314: bdf0 pop {r4, r5, r6, r7, pc} | |
10005316: d4d4 bmi 0x100052c2 <defmt_rtt::channel::Channel::nonblocking_write+0x4> @ imm = #-88 | |
10005318 <_defmt_acquire>: | |
; #[defmt::global_logger] | |
10005318: b5f0 push {r4, r5, r6, r7, lr} | |
1000531a: af03 add r7, sp, #12 | |
1000531c: b083 sub sp, #12 | |
; $func($($args),*) | |
1000531e: f001 fb7e bl 0x10006a1e <__primask_r> @ imm = #5884 | |
10005322: 4604 mov r4, r0 | |
10005324: 2201 movs r2, #1 | |
10005326: 200d movs r0, #13 | |
10005328: 0700 lsls r0, r0, #28 | |
1000532a: 6800 ldr r0, [r0] | |
1000532c: 4b22 ldr r3, [pc, #136] @ 0x100053b8 <$d.166> | |
1000532e: 7c19 ldrb r1, [r3, #16] | |
10005330: f3bf 8f5f dmb sy | |
; let core = crate::Sio::core() + 1_u8; | |
10005334: 1c45 adds r5, r0, #1 | |
10005336: b2e8 uxtb r0, r5 | |
; if LOCK_OWNER.load(Ordering::Acquire) == core { | |
10005338: 4281 cmp r1, r0 | |
1000533a: d101 bne 0x10005340 <_defmt_acquire+0x28> @ imm = #2 | |
1000533c: 2402 movs r4, #2 | |
1000533e: e014 b 0x1000536a <_defmt_acquire+0x52> @ imm = #40 | |
10005340: 9201 str r2, [sp, #4] | |
10005342: 4014 ands r4, r2 | |
10005344: 4e1d ldr r6, [pc, #116] @ 0x100053bc <$d.166+0x4> | |
; if interrupts_active { | |
10005346: d107 bne 0x10005358 <_defmt_acquire+0x40> @ imm = #14 | |
; $func($($args),*) | |
10005348: f001 fb5e bl 0x10006a08 <__cpsid> @ imm = #5820 | |
1000534c: 6830 ldr r0, [r6] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000534e: 2800 cmp r0, #0 | |
10005350: d107 bne 0x10005362 <_defmt_acquire+0x4a> @ imm = #14 | |
; $func($($args),*) | |
10005352: f001 fb5b bl 0x10006a0c <__cpsie> @ imm = #5814 | |
10005356: e7f7 b 0x10005348 <_defmt_acquire+0x30> @ imm = #-18 | |
10005358: f001 fb56 bl 0x10006a08 <__cpsid> @ imm = #5804 | |
1000535c: 6830 ldr r0, [r6] | |
; if let Some(lock) = crate::sio::Spinlock31::try_claim() { | |
1000535e: 2800 cmp r0, #0 | |
10005360: d0fa beq 0x10005358 <_defmt_acquire+0x40> @ imm = #-12 | |
10005362: 4b15 ldr r3, [pc, #84] @ 0x100053b8 <$d.166> | |
10005364: 741d strb r5, [r3, #16] | |
10005366: 9a01 ldr r2, [sp, #4] | |
; interrupts_active as _ | |
10005368: 4054 eors r4, r2 | |
1000536a: 7ad8 ldrb r0, [r3, #11] | |
; if TAKEN.load(Ordering::Relaxed) { | |
1000536c: 2800 cmp r0, #0 | |
1000536e: d120 bne 0x100053b2 <_defmt_acquire+0x9a> @ imm = #64 | |
10005370: 72da strb r2, [r3, #11] | |
; unsafe { CS_RESTORE = restore }; | |
10005372: 731c strb r4, [r3, #12] | |
; if !self.started { | |
10005374: 7bd8 ldrb r0, [r3, #15] | |
10005376: 2800 cmp r0, #0 | |
10005378: d115 bne 0x100053a6 <_defmt_acquire+0x8e> @ imm = #42 | |
; self.started = true; | |
1000537a: 73da strb r2, [r3, #15] | |
1000537c: a802 add r0, sp, #8 | |
1000537e: 2100 movs r1, #0 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
10005380: 7001 strb r1, [r0] | |
10005382: 4c0f ldr r4, [pc, #60] @ 0x100053c0 <$d.166+0x8> | |
10005384: 6ae0 ldr r0, [r4, #44] | |
10005386: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
10005388: 4001 ands r1, r0 | |
1000538a: 2902 cmp r1, #2 | |
1000538c: d001 beq 0x10005392 <_defmt_acquire+0x7a> @ imm = #2 | |
1000538e: 4d0e ldr r5, [pc, #56] @ 0x100053c8 <$d.166+0x10> | |
10005390: e000 b 0x10005394 <_defmt_acquire+0x7c> @ imm = #0 | |
10005392: 4d0c ldr r5, [pc, #48] @ 0x100053c4 <$d.166+0xc> | |
10005394: 3418 adds r4, #24 | |
10005396: a902 add r1, sp, #8 | |
10005398: 2201 movs r2, #1 | |
; let consumed = write(self, bytes); | |
1000539a: 4620 mov r0, r4 | |
1000539c: 47a8 blx r5 | |
; if consumed != 0 { | |
1000539e: 2800 cmp r0, #0 | |
100053a0: d0f9 beq 0x10005396 <_defmt_acquire+0x7e> @ imm = #-14 | |
100053a2: 2801 cmp r0, #1 | |
100053a4: d101 bne 0x100053aa <_defmt_acquire+0x92> @ imm = #2 | |
; #[defmt::global_logger] | |
100053a6: b003 add sp, #12 | |
100053a8: bdf0 pop {r4, r5, r6, r7, pc} | |
100053aa: 2101 movs r1, #1 | |
100053ac: f7ff fb9a bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #-2252 | |
100053b0: defe trap | |
; panic!("defmt logger taken reentrantly") | |
100053b2: f7fe fbdf bl 0x10003b74 <core::panicking::panic_fmt> @ imm = #-6210 | |
100053b6: defe trap | |
100053b8 <$d.166>: | |
100053b8: 18 ed 03 20 .word 0x2003ed18 | |
100053bc: 7c 01 00 d0 .word 0xd000017c | |
100053c0: cc c6 03 20 .word 0x2003c6cc | |
100053c4: 31 52 00 10 .word 0x10005231 | |
100053c8: bf 52 00 10 .word 0x100052bf | |
100053cc <_defmt_release>: | |
; #[defmt::global_logger] | |
100053cc: b5f0 push {r4, r5, r6, r7, lr} | |
100053ce: af03 add r7, sp, #12 | |
100053d0: b085 sub sp, #20 | |
; match self.run { | |
100053d2: 4a31 ldr r2, [pc, #196] @ 0x10005498 <$d.170> | |
100053d4: 7b50 ldrb r0, [r2, #13] | |
100053d6: 2800 cmp r0, #0 | |
100053d8: d032 beq 0x10005440 <_defmt_release+0x74> @ imm = #100 | |
; 1..=6 => write_byte((self.zeros | (0xFF << self.run)) & 0x7F), | |
100053da: 2807 cmp r0, #7 | |
100053dc: d210 bhs 0x10005400 <_defmt_release+0x34> @ imm = #32 | |
100053de: 2100 movs r1, #0 | |
100053e0: 43c9 mvns r1, r1 | |
; 1..=6 => write_byte((self.zeros | (0xFF << self.run)) & 0x7F), | |
100053e2: 4081 lsls r1, r0 | |
100053e4: 7b90 ldrb r0, [r2, #14] | |
100053e6: 4308 orrs r0, r1 | |
100053e8: 217f movs r1, #127 | |
100053ea: 4001 ands r1, r0 | |
100053ec: a804 add r0, sp, #16 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
100053ee: 7001 strb r1, [r0] | |
100053f0: 4c2a ldr r4, [pc, #168] @ 0x1000549c <$d.170+0x4> | |
100053f2: 6ae0 ldr r0, [r4, #44] | |
100053f4: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
100053f6: 4001 ands r1, r0 | |
100053f8: 2902 cmp r1, #2 | |
100053fa: d00e beq 0x1000541a <_defmt_release+0x4e> @ imm = #28 | |
100053fc: 4d29 ldr r5, [pc, #164] @ 0x100054a4 <$d.170+0xc> | |
100053fe: e00d b 0x1000541c <_defmt_release+0x50> @ imm = #26 | |
; _ => write_byte((self.run - 7) | 0x80), | |
10005400: 3079 adds r0, #121 | |
10005402: 2180 movs r1, #128 | |
10005404: 4301 orrs r1, r0 | |
10005406: a803 add r0, sp, #12 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
10005408: 7001 strb r1, [r0] | |
1000540a: 4c24 ldr r4, [pc, #144] @ 0x1000549c <$d.170+0x4> | |
1000540c: 6ae0 ldr r0, [r4, #44] | |
1000540e: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
10005410: 4001 ands r1, r0 | |
10005412: 2902 cmp r1, #2 | |
10005414: d00a beq 0x1000542c <_defmt_release+0x60> @ imm = #20 | |
10005416: 4d23 ldr r5, [pc, #140] @ 0x100054a4 <$d.170+0xc> | |
10005418: e009 b 0x1000542e <_defmt_release+0x62> @ imm = #18 | |
1000541a: 4d21 ldr r5, [pc, #132] @ 0x100054a0 <$d.170+0x8> | |
1000541c: 3418 adds r4, #24 | |
1000541e: a904 add r1, sp, #16 | |
10005420: 2201 movs r2, #1 | |
; let consumed = write(self, bytes); | |
10005422: 4620 mov r0, r4 | |
10005424: 47a8 blx r5 | |
; if consumed != 0 { | |
10005426: 2800 cmp r0, #0 | |
10005428: d0f9 beq 0x1000541e <_defmt_release+0x52> @ imm = #-14 | |
1000542a: e007 b 0x1000543c <_defmt_release+0x70> @ imm = #14 | |
1000542c: 4d1c ldr r5, [pc, #112] @ 0x100054a0 <$d.170+0x8> | |
1000542e: 3418 adds r4, #24 | |
10005430: a903 add r1, sp, #12 | |
10005432: 2201 movs r2, #1 | |
; let consumed = write(self, bytes); | |
10005434: 4620 mov r0, r4 | |
10005436: 47a8 blx r5 | |
; if consumed != 0 { | |
10005438: 2800 cmp r0, #0 | |
1000543a: d0f9 beq 0x10005430 <_defmt_release+0x64> @ imm = #-14 | |
1000543c: 2801 cmp r0, #1 | |
1000543e: d127 bne 0x10005490 <_defmt_release+0xc4> @ imm = #78 | |
10005440: a802 add r0, sp, #8 | |
10005442: 2200 movs r2, #0 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
10005444: 7002 strb r2, [r0] | |
10005446: 4c15 ldr r4, [pc, #84] @ 0x1000549c <$d.170+0x4> | |
10005448: 6ae0 ldr r0, [r4, #44] | |
1000544a: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
1000544c: 4001 ands r1, r0 | |
1000544e: 2902 cmp r1, #2 | |
10005450: 9201 str r2, [sp, #4] | |
10005452: d001 beq 0x10005458 <_defmt_release+0x8c> @ imm = #2 | |
10005454: 4e13 ldr r6, [pc, #76] @ 0x100054a4 <$d.170+0xc> | |
10005456: e000 b 0x1000545a <_defmt_release+0x8e> @ imm = #0 | |
10005458: 4e11 ldr r6, [pc, #68] @ 0x100054a0 <$d.170+0x8> | |
1000545a: 3418 adds r4, #24 | |
1000545c: a902 add r1, sp, #8 | |
1000545e: 2501 movs r5, #1 | |
; let consumed = write(self, bytes); | |
10005460: 4620 mov r0, r4 | |
10005462: 462a mov r2, r5 | |
10005464: 47b0 blx r6 | |
; if consumed != 0 { | |
10005466: 2800 cmp r0, #0 | |
10005468: d0f8 beq 0x1000545c <_defmt_release+0x90> @ imm = #-16 | |
1000546a: 2801 cmp r0, #1 | |
1000546c: d110 bne 0x10005490 <_defmt_release+0xc4> @ imm = #32 | |
1000546e: 490a ldr r1, [pc, #40] @ 0x10005498 <$d.170> | |
10005470: 9a01 ldr r2, [sp, #4] | |
; self.zeros = 0; | |
10005472: 738a strb r2, [r1, #14] | |
; self.run = 0; | |
10005474: 734a strb r2, [r1, #13] | |
10005476: 72ca strb r2, [r1, #11] | |
; let restore = CS_RESTORE; | |
10005478: 7b08 ldrb r0, [r1, #12] | |
; if token != LOCK_ALREADY_OWNED { | |
1000547a: 2802 cmp r0, #2 | |
1000547c: d006 beq 0x1000548c <_defmt_release+0xc0> @ imm = #12 | |
1000547e: 740a strb r2, [r1, #16] | |
10005480: 4909 ldr r1, [pc, #36] @ 0x100054a8 <$d.170+0x10> | |
10005482: 600d str r5, [r1] | |
; if token != 0 { | |
10005484: 2800 cmp r0, #0 | |
10005486: d001 beq 0x1000548c <_defmt_release+0xc0> @ imm = #2 | |
; $func($($args),*) | |
10005488: f001 fac0 bl 0x10006a0c <__cpsie> @ imm = #5504 | |
; #[defmt::global_logger] | |
1000548c: b005 add sp, #20 | |
1000548e: bdf0 pop {r4, r5, r6, r7, pc} | |
10005490: 2101 movs r1, #1 | |
10005492: f7ff fb27 bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #-2482 | |
10005496: defe trap | |
10005498 <$d.170>: | |
10005498: 18 ed 03 20 .word 0x2003ed18 | |
1000549c: cc c6 03 20 .word 0x2003c6cc | |
100054a0: 31 52 00 10 .word 0x10005231 | |
100054a4: bf 52 00 10 .word 0x100052bf | |
100054a8: 7c 01 00 d0 .word 0xd000017c | |
100054ac <_defmt_write>: | |
; #[defmt::global_logger] | |
100054ac: b5f0 push {r4, r5, r6, r7, lr} | |
100054ae: af03 add r7, sp, #12 | |
100054b0: b089 sub sp, #36 | |
100054b2: 2900 cmp r1, #0 | |
100054b4: d100 bne 0x100054b8 <_defmt_write+0xc> @ imm = #0 | |
100054b6: e094 b 0x100055e2 <_defmt_write+0x136> @ imm = #296 | |
100054b8: 4604 mov r4, r0 | |
100054ba: 1840 adds r0, r0, r1 | |
; if self.run < 7 { | |
100054bc: 9003 str r0, [sp, #12] | |
100054be: 484c ldr r0, [pc, #304] @ 0x100055f0 <$d.172> | |
100054c0: 7b40 ldrb r0, [r0, #13] | |
100054c2: 4e4c ldr r6, [pc, #304] @ 0x100055f4 <$d.172+0x4> | |
100054c4: e00b b 0x100054de <_defmt_write+0x32> @ imm = #22 | |
100054c6: 2801 cmp r0, #1 | |
100054c8: d000 beq 0x100054cc <_defmt_write+0x20> @ imm = #0 | |
100054ca: e08c b 0x100055e6 <_defmt_write+0x13a> @ imm = #280 | |
100054cc: 4948 ldr r1, [pc, #288] @ 0x100055f0 <$d.172> | |
100054ce: 2000 movs r0, #0 | |
100054d0: 7388 strb r0, [r1, #14] | |
100054d2: 7348 strb r0, [r1, #13] | |
100054d4: 1c64 adds r4, r4, #1 | |
100054d6: 9903 ldr r1, [sp, #12] | |
100054d8: 428c cmp r4, r1 | |
100054da: d100 bne 0x100054de <_defmt_write+0x32> @ imm = #0 | |
100054dc: e081 b 0x100055e2 <_defmt_write+0x136> @ imm = #258 | |
; for &byte in data { | |
100054de: 7821 ldrb r1, [r4] | |
; if self.run < 7 { | |
100054e0: b2c2 uxtb r2, r0 | |
100054e2: 2a07 cmp r2, #7 | |
100054e4: d217 bhs 0x10005516 <_defmt_write+0x6a> @ imm = #46 | |
; if byte == 0 { | |
100054e6: 2900 cmp r1, #0 | |
100054e8: d048 beq 0x1000557c <_defmt_write+0xd0> @ imm = #144 | |
100054ea: a804 add r0, sp, #16 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
100054ec: 7001 strb r1, [r0] | |
100054ee: 6af0 ldr r0, [r6, #44] | |
100054f0: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
100054f2: 4001 ands r1, r0 | |
100054f4: 2902 cmp r1, #2 | |
100054f6: 4d40 ldr r5, [pc, #256] @ 0x100055f8 <$d.172+0x8> | |
100054f8: d000 beq 0x100054fc <_defmt_write+0x50> @ imm = #0 | |
100054fa: 4d40 ldr r5, [pc, #256] @ 0x100055fc <$d.172+0xc> | |
; let consumed = write(self, bytes); | |
100054fc: 4630 mov r0, r6 | |
100054fe: 3018 adds r0, #24 | |
10005500: a904 add r1, sp, #16 | |
10005502: 2201 movs r2, #1 | |
10005504: 47a8 blx r5 | |
; if consumed != 0 { | |
10005506: 2800 cmp r0, #0 | |
10005508: d0f8 beq 0x100054fc <_defmt_write+0x50> @ imm = #-16 | |
1000550a: 2801 cmp r0, #1 | |
1000550c: d16b bne 0x100055e6 <_defmt_write+0x13a> @ imm = #214 | |
1000550e: 4a38 ldr r2, [pc, #224] @ 0x100055f0 <$d.172> | |
; if self.run == 7 && self.zeros != 0x00 { | |
10005510: 7b91 ldrb r1, [r2, #14] | |
; self.run += 1; | |
10005512: 7b50 ldrb r0, [r2, #13] | |
10005514: e039 b 0x1000558a <_defmt_write+0xde> @ imm = #114 | |
; } else if byte == 0 { | |
10005516: 2900 cmp r1, #0 | |
10005518: d04f beq 0x100055ba <_defmt_write+0x10e> @ imm = #158 | |
1000551a: 9402 str r4, [sp, #8] | |
1000551c: a807 add r0, sp, #28 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
1000551e: 7001 strb r1, [r0] | |
10005520: 6af0 ldr r0, [r6, #44] | |
10005522: 2103 movs r1, #3 | |
10005524: 9101 str r1, [sp, #4] | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
10005526: 4008 ands r0, r1 | |
10005528: 2802 cmp r0, #2 | |
1000552a: 4c33 ldr r4, [pc, #204] @ 0x100055f8 <$d.172+0x8> | |
1000552c: d000 beq 0x10005530 <_defmt_write+0x84> @ imm = #0 | |
1000552e: 4c33 ldr r4, [pc, #204] @ 0x100055fc <$d.172+0xc> | |
; let consumed = write(self, bytes); | |
10005530: 4635 mov r5, r6 | |
10005532: 3518 adds r5, #24 | |
10005534: a907 add r1, sp, #28 | |
10005536: 2201 movs r2, #1 | |
10005538: 4628 mov r0, r5 | |
1000553a: 47a0 blx r4 | |
; if consumed != 0 { | |
1000553c: 2800 cmp r0, #0 | |
1000553e: d0f7 beq 0x10005530 <_defmt_write+0x84> @ imm = #-18 | |
10005540: 2801 cmp r0, #1 | |
10005542: d150 bne 0x100055e6 <_defmt_write+0x13a> @ imm = #160 | |
10005544: 492a ldr r1, [pc, #168] @ 0x100055f0 <$d.172> | |
; self.run += 1; | |
10005546: 7b48 ldrb r0, [r1, #13] | |
10005548: 1c40 adds r0, r0, #1 | |
1000554a: 7348 strb r0, [r1, #13] | |
1000554c: b2c1 uxtb r1, r0 | |
; if self.run == 134 { | |
1000554e: 2986 cmp r1, #134 | |
10005550: 9c02 ldr r4, [sp, #8] | |
10005552: d1bf bne 0x100054d4 <_defmt_write+0x28> @ imm = #-130 | |
10005554: a808 add r0, sp, #32 | |
10005556: 21ff movs r1, #255 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
10005558: 7001 strb r1, [r0] | |
1000555a: 6af0 ldr r0, [r6, #44] | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
1000555c: 9901 ldr r1, [sp, #4] | |
1000555e: 4008 ands r0, r1 | |
10005560: 2802 cmp r0, #2 | |
10005562: 4c25 ldr r4, [pc, #148] @ 0x100055f8 <$d.172+0x8> | |
10005564: d000 beq 0x10005568 <_defmt_write+0xbc> @ imm = #0 | |
10005566: 4c25 ldr r4, [pc, #148] @ 0x100055fc <$d.172+0xc> | |
10005568: a908 add r1, sp, #32 | |
1000556a: 2201 movs r2, #1 | |
; let consumed = write(self, bytes); | |
1000556c: 4628 mov r0, r5 | |
1000556e: 47a0 blx r4 | |
; if consumed != 0 { | |
10005570: 2800 cmp r0, #0 | |
10005572: d0f9 beq 0x10005568 <_defmt_write+0xbc> @ imm = #-14 | |
10005574: 2801 cmp r0, #1 | |
10005576: d136 bne 0x100055e6 <_defmt_write+0x13a> @ imm = #108 | |
10005578: 9c02 ldr r4, [sp, #8] | |
1000557a: e7a7 b 0x100054cc <_defmt_write+0x20> @ imm = #-178 | |
1000557c: 2301 movs r3, #1 | |
; self.zeros |= 1 << self.run; | |
1000557e: 4093 lsls r3, r2 | |
10005580: 491b ldr r1, [pc, #108] @ 0x100055f0 <$d.172> | |
10005582: 7b89 ldrb r1, [r1, #14] | |
10005584: 4319 orrs r1, r3 | |
10005586: 4a1a ldr r2, [pc, #104] @ 0x100055f0 <$d.172> | |
10005588: 7391 strb r1, [r2, #14] | |
; self.run += 1; | |
1000558a: 1c40 adds r0, r0, #1 | |
1000558c: 7350 strb r0, [r2, #13] | |
1000558e: b2c2 uxtb r2, r0 | |
; if self.run == 7 && self.zeros != 0x00 { | |
10005590: 2a07 cmp r2, #7 | |
10005592: d19f bne 0x100054d4 <_defmt_write+0x28> @ imm = #-194 | |
10005594: 060a lsls r2, r1, #24 | |
10005596: d09d beq 0x100054d4 <_defmt_write+0x28> @ imm = #-198 | |
10005598: a805 add r0, sp, #20 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
1000559a: 7001 strb r1, [r0] | |
1000559c: 6af0 ldr r0, [r6, #44] | |
1000559e: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
100055a0: 4001 ands r1, r0 | |
100055a2: 2902 cmp r1, #2 | |
100055a4: 4d14 ldr r5, [pc, #80] @ 0x100055f8 <$d.172+0x8> | |
100055a6: d000 beq 0x100055aa <_defmt_write+0xfe> @ imm = #0 | |
100055a8: 4d14 ldr r5, [pc, #80] @ 0x100055fc <$d.172+0xc> | |
; let consumed = write(self, bytes); | |
100055aa: 4630 mov r0, r6 | |
100055ac: 3018 adds r0, #24 | |
100055ae: a905 add r1, sp, #20 | |
100055b0: 2201 movs r2, #1 | |
100055b2: 47a8 blx r5 | |
; if consumed != 0 { | |
100055b4: 2800 cmp r0, #0 | |
100055b6: d0f8 beq 0x100055aa <_defmt_write+0xfe> @ imm = #-16 | |
100055b8: e785 b 0x100054c6 <_defmt_write+0x1a> @ imm = #-246 | |
; write_byte((self.run - 7) | 0x80); | |
100055ba: 3079 adds r0, #121 | |
100055bc: 2180 movs r1, #128 | |
100055be: 4301 orrs r1, r0 | |
100055c0: a806 add r0, sp, #24 | |
; let mut write_byte = move |b: u8| write(&[b]); | |
100055c2: 7001 strb r1, [r0] | |
100055c4: 6af0 ldr r0, [r6, #44] | |
100055c6: 2103 movs r1, #3 | |
; self.flags.load(Ordering::Relaxed) & MODE_MASK == MODE_BLOCK_IF_FULL | |
100055c8: 4001 ands r1, r0 | |
100055ca: 2902 cmp r1, #2 | |
100055cc: 4d0a ldr r5, [pc, #40] @ 0x100055f8 <$d.172+0x8> | |
100055ce: d000 beq 0x100055d2 <_defmt_write+0x126> @ imm = #0 | |
100055d0: 4d0a ldr r5, [pc, #40] @ 0x100055fc <$d.172+0xc> | |
; let consumed = write(self, bytes); | |
100055d2: 4630 mov r0, r6 | |
100055d4: 3018 adds r0, #24 | |
100055d6: a906 add r1, sp, #24 | |
100055d8: 2201 movs r2, #1 | |
100055da: 47a8 blx r5 | |
; if consumed != 0 { | |
100055dc: 2800 cmp r0, #0 | |
100055de: d0f8 beq 0x100055d2 <_defmt_write+0x126> @ imm = #-16 | |
100055e0: e771 b 0x100054c6 <_defmt_write+0x1a> @ imm = #-286 | |
; #[defmt::global_logger] | |
100055e2: b009 add sp, #36 | |
100055e4: bdf0 pop {r4, r5, r6, r7, pc} | |
100055e6: 2101 movs r1, #1 | |
100055e8: f7ff fa7c bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #-2824 | |
100055ec: defe trap | |
100055ee: 46c0 mov r8, r8 | |
100055f0 <$d.172>: | |
100055f0: 18 ed 03 20 .word 0x2003ed18 | |
100055f4: cc c6 03 20 .word 0x2003c6cc | |
100055f8: 31 52 00 10 .word 0x10005231 | |
100055fc: bf 52 00 10 .word 0x100052bf | |
10005600 <<&T as core::fmt::Debug>::fmt>: | |
10005600: b5f0 push {r4, r5, r6, r7, lr} | |
10005602: af03 add r7, sp, #12 | |
10005604: b0a3 sub sp, #140 | |
10005606: 6803 ldr r3, [r0] | |
10005608: aa03 add r2, sp, #12 | |
1000560a: a803 add r0, sp, #12 | |
1000560c: 698c ldr r4, [r1, #24] | |
1000560e: 06e5 lsls r5, r4, #27 | |
10005610: d41a bmi 0x10005648 <<&T as core::fmt::Debug>::fmt+0x48> @ imm = #52 | |
10005612: 06a2 lsls r2, r4, #26 | |
10005614: d424 bmi 0x10005660 <<&T as core::fmt::Debug>::fmt+0x60> @ imm = #72 | |
10005616: 781a ldrb r2, [r3] | |
10005618: b2d0 uxtb r0, r2 | |
1000561a: 2863 cmp r0, #99 | |
1000561c: d939 bls 0x10005692 <<&T as core::fmt::Debug>::fmt+0x92> @ imm = #114 | |
1000561e: 2329 movs r3, #41 | |
10005620: 4343 muls r3, r0, r3 | |
10005622: 0b1b lsrs r3, r3, #12 | |
10005624: 2063 movs r0, #99 | |
10005626: 43c0 mvns r0, r0 | |
10005628: 4358 muls r0, r3, r0 | |
1000562a: 1880 adds r0, r0, r2 | |
1000562c: b2c0 uxtb r0, r0 | |
1000562e: 0040 lsls r0, r0, #1 | |
10005630: 4a35 ldr r2, [pc, #212] @ 0x10005708 <$d.174+0x4> | |
10005632: 5c14 ldrb r4, [r2, r0] | |
10005634: 2525 movs r5, #37 | |
10005636: ae03 add r6, sp, #12 | |
10005638: 5574 strb r4, [r6, r5] | |
1000563a: 1810 adds r0, r2, r0 | |
1000563c: 7840 ldrb r0, [r0, #1] | |
1000563e: 3625 adds r6, #37 | |
10005640: 7070 strb r0, [r6, #1] | |
10005642: 2024 movs r0, #36 | |
10005644: 461a mov r2, r3 | |
10005646: e027 b 0x10005698 <<&T as core::fmt::Debug>::fmt+0x98> @ imm = #78 | |
10005648: 327e adds r2, #126 | |
1000564a: 7818 ldrb r0, [r3] | |
1000564c: 230f movs r3, #15 | |
1000564e: 4003 ands r3, r0 | |
10005650: 2b0a cmp r3, #10 | |
10005652: d311 blo 0x10005678 <<&T as core::fmt::Debug>::fmt+0x78> @ imm = #34 | |
10005654: 2457 movs r4, #87 | |
10005656: 18e3 adds r3, r4, r3 | |
10005658: 7053 strb r3, [r2, #1] | |
1000565a: 0903 lsrs r3, r0, #4 | |
1000565c: d111 bne 0x10005682 <<&T as core::fmt::Debug>::fmt+0x82> @ imm = #34 | |
1000565e: e028 b 0x100056b2 <<&T as core::fmt::Debug>::fmt+0xb2> @ imm = #80 | |
10005660: 307e adds r0, #126 | |
10005662: 781a ldrb r2, [r3] | |
10005664: 230f movs r3, #15 | |
10005666: 4013 ands r3, r2 | |
10005668: 2b0a cmp r3, #10 | |
1000566a: d319 blo 0x100056a0 <<&T as core::fmt::Debug>::fmt+0xa0> @ imm = #50 | |
1000566c: 2437 movs r4, #55 | |
1000566e: 18e3 adds r3, r4, r3 | |
10005670: 7043 strb r3, [r0, #1] | |
10005672: 0913 lsrs r3, r2, #4 | |
10005674: d119 bne 0x100056aa <<&T as core::fmt::Debug>::fmt+0xaa> @ imm = #50 | |
10005676: e01c b 0x100056b2 <<&T as core::fmt::Debug>::fmt+0xb2> @ imm = #56 | |
10005678: 2430 movs r4, #48 | |
1000567a: 18e3 adds r3, r4, r3 | |
1000567c: 7053 strb r3, [r2, #1] | |
1000567e: 0903 lsrs r3, r0, #4 | |
10005680: d017 beq 0x100056b2 <<&T as core::fmt::Debug>::fmt+0xb2> @ imm = #46 | |
10005682: 28a0 cmp r0, #160 | |
10005684: d301 blo 0x1000568a <<&T as core::fmt::Debug>::fmt+0x8a> @ imm = #2 | |
10005686: 2057 movs r0, #87 | |
10005688: e000 b 0x1000568c <<&T as core::fmt::Debug>::fmt+0x8c> @ imm = #0 | |
1000568a: 2030 movs r0, #48 | |
1000568c: 18c0 adds r0, r0, r3 | |
1000568e: 7010 strb r0, [r2] | |
10005690: e015 b 0x100056be <<&T as core::fmt::Debug>::fmt+0xbe> @ imm = #42 | |
10005692: 280a cmp r0, #10 | |
10005694: d21d bhs 0x100056d2 <<&T as core::fmt::Debug>::fmt+0xd2> @ imm = #58 | |
10005696: 2026 movs r0, #38 | |
10005698: 3230 adds r2, #48 | |
1000569a: ab03 add r3, sp, #12 | |
1000569c: 541a strb r2, [r3, r0] | |
1000569e: e022 b 0x100056e6 <<&T as core::fmt::Debug>::fmt+0xe6> @ imm = #68 | |
100056a0: 2430 movs r4, #48 | |
100056a2: 18e3 adds r3, r4, r3 | |
100056a4: 7043 strb r3, [r0, #1] | |
100056a6: 0913 lsrs r3, r2, #4 | |
100056a8: d003 beq 0x100056b2 <<&T as core::fmt::Debug>::fmt+0xb2> @ imm = #6 | |
100056aa: 2aa0 cmp r2, #160 | |
100056ac: d304 blo 0x100056b8 <<&T as core::fmt::Debug>::fmt+0xb8> @ imm = #8 | |
100056ae: 2237 movs r2, #55 | |
100056b0: e003 b 0x100056ba <<&T as core::fmt::Debug>::fmt+0xba> @ imm = #6 | |
100056b2: 207f movs r0, #127 | |
100056b4: 2201 movs r2, #1 | |
100056b6: e004 b 0x100056c2 <<&T as core::fmt::Debug>::fmt+0xc2> @ imm = #8 | |
100056b8: 2230 movs r2, #48 | |
100056ba: 18d2 adds r2, r2, r3 | |
100056bc: 7002 strb r2, [r0] | |
100056be: 207e movs r0, #126 | |
100056c0: 2202 movs r2, #2 | |
100056c2: 9201 str r2, [sp, #4] | |
100056c4: aa03 add r2, sp, #12 | |
100056c6: 1810 adds r0, r2, r0 | |
100056c8: 9000 str r0, [sp] | |
100056ca: 2401 movs r4, #1 | |
100056cc: 4a0d ldr r2, [pc, #52] @ 0x10005704 <$d.174> | |
100056ce: 2302 movs r3, #2 | |
100056d0: e012 b 0x100056f8 <<&T as core::fmt::Debug>::fmt+0xf8> @ imm = #36 | |
100056d2: 0042 lsls r2, r0, #1 | |
100056d4: 4b0c ldr r3, [pc, #48] @ 0x10005708 <$d.174+0x4> | |
100056d6: 5c9c ldrb r4, [r3, r2] | |
100056d8: 2025 movs r0, #37 | |
100056da: ad03 add r5, sp, #12 | |
100056dc: 542c strb r4, [r5, r0] | |
100056de: 189a adds r2, r3, r2 | |
100056e0: 7852 ldrb r2, [r2, #1] | |
100056e2: 3525 adds r5, #37 | |
100056e4: 706a strb r2, [r5, #1] | |
100056e6: 2227 movs r2, #39 | |
100056e8: 1a12 subs r2, r2, r0 | |
100056ea: 9201 str r2, [sp, #4] | |
100056ec: aa03 add r2, sp, #12 | |
100056ee: 1810 adds r0, r2, r0 | |
100056f0: 9000 str r0, [sp] | |
100056f2: 2401 movs r4, #1 | |
100056f4: 4a05 ldr r2, [pc, #20] @ 0x1000570c <$d.174+0x8> | |
100056f6: 2300 movs r3, #0 | |
100056f8: 4608 mov r0, r1 | |
100056fa: 4621 mov r1, r4 | |
100056fc: f7fe fa45 bl 0x10003b8a <core::fmt::Formatter::pad_integral> @ imm = #-7030 | |
10005700: b023 add sp, #140 | |
10005702: bdf0 pop {r4, r5, r6, r7, pc} | |
10005704 <$d.174>: | |
10005704: d0 75 00 10 .word 0x100075d0 | |
10005708: d2 75 00 10 .word 0x100075d2 | |
1000570c: bc 77 00 10 .word 0x100077bc | |
10005710 <<neotron_common_bios::hid::HidEvent as core::fmt::Debug>::fmt>: | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
10005710: b5d0 push {r4, r6, r7, lr} | |
10005712: af02 add r7, sp, #8 | |
10005714: b084 sub sp, #16 | |
10005716: 460c mov r4, r1 | |
10005718: 7801 ldrb r1, [r0] | |
; KeyPress(KeyCode), | |
1000571a: 1c80 adds r0, r0, #2 | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
1000571c: 2900 cmp r1, #0 | |
1000571e: d00c beq 0x1000573a <<neotron_common_bios::hid::HidEvent as core::fmt::Debug>::fmt+0x2a> @ imm = #24 | |
10005720: 2901 cmp r1, #1 | |
10005722: d115 bne 0x10005750 <<neotron_common_bios::hid::HidEvent as core::fmt::Debug>::fmt+0x40> @ imm = #42 | |
; KeyRelease(KeyCode), | |
10005724: 9002 str r0, [sp, #8] | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
10005726: 4812 ldr r0, [pc, #72] @ 0x10005770 <$d.176+0x8> | |
10005728: 9000 str r0, [sp] | |
1000572a: 4912 ldr r1, [pc, #72] @ 0x10005774 <$d.176+0xc> | |
1000572c: 220a movs r2, #10 | |
1000572e: ab02 add r3, sp, #8 | |
10005730: 4620 mov r0, r4 | |
10005732: f7ff fc7f bl 0x10005034 <core::fmt::Formatter::debug_tuple_field1_finish> @ imm = #-1794 | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
10005736: b004 add sp, #16 | |
10005738: bdd0 pop {r4, r6, r7, pc} | |
; KeyPress(KeyCode), | |
1000573a: 9001 str r0, [sp, #4] | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
1000573c: 480c ldr r0, [pc, #48] @ 0x10005770 <$d.176+0x8> | |
1000573e: 9000 str r0, [sp] | |
10005740: 490d ldr r1, [pc, #52] @ 0x10005778 <$d.176+0x10> | |
10005742: 2208 movs r2, #8 | |
10005744: ab01 add r3, sp, #4 | |
10005746: 4620 mov r0, r4 | |
10005748: f7ff fc74 bl 0x10005034 <core::fmt::Formatter::debug_tuple_field1_finish> @ imm = #-1816 | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
1000574c: b004 add sp, #16 | |
1000574e: bdd0 pop {r4, r6, r7, pc} | |
; MouseInput(MouseData), | |
10005750: 9003 str r0, [sp, #12] | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
10005752: 4805 ldr r0, [pc, #20] @ 0x10005768 <$d.176> | |
10005754: 9000 str r0, [sp] | |
10005756: 4905 ldr r1, [pc, #20] @ 0x1000576c <$d.176+0x4> | |
10005758: 220a movs r2, #10 | |
1000575a: ab03 add r3, sp, #12 | |
1000575c: 4620 mov r0, r4 | |
1000575e: f7ff fc69 bl 0x10005034 <core::fmt::Formatter::debug_tuple_field1_finish> @ imm = #-1838 | |
; #[derive(Clone, PartialEq, Eq, Debug)] | |
10005762: b004 add sp, #16 | |
10005764: bdd0 pop {r4, r6, r7, pc} | |
10005766: 46c0 mov r8, r8 | |
10005768 <$d.176>: | |
10005768: 7d 57 00 10 .word 0x1000577d | |
1000576c: f2 78 00 10 .word 0x100078f2 | |
10005770: 19 5a 00 10 .word 0x10005a19 | |
10005774: fc 78 00 10 .word 0x100078fc | |
10005778: 0e 79 00 10 .word 0x1000790e | |
1000577c <<&T as core::fmt::Debug>::fmt>: | |
1000577c: b5b0 push {r4, r5, r7, lr} | |
1000577e: af02 add r7, sp, #8 | |
10005780: b086 sub sp, #24 | |
10005782: 460c mov r4, r1 | |
10005784: 6800 ldr r0, [r0] | |
; pub x: i16, | |
10005786: 9001 str r0, [sp, #4] | |
; pub y: i16, | |
10005788: 1c81 adds r1, r0, #2 | |
1000578a: 9102 str r1, [sp, #8] | |
; pub buttons: MouseButtons, | |
1000578c: 1d00 adds r0, r0, #4 | |
1000578e: 9003 str r0, [sp, #12] | |
10005790: cc03 ldm r4!, {r0, r1} | |
10005792: 68cb ldr r3, [r1, #12] | |
10005794: 491d ldr r1, [pc, #116] @ 0x1000580c <$d.178> | |
10005796: 2209 movs r2, #9 | |
10005798: 3c08 subs r4, #8 | |
1000579a: 4798 blx r3 | |
1000579c: 4601 mov r1, r0 | |
1000579e: a804 add r0, sp, #16 | |
100057a0: 2200 movs r2, #0 | |
100057a2: 7142 strb r2, [r0, #5] | |
100057a4: 7101 strb r1, [r0, #4] | |
100057a6: 9404 str r4, [sp, #16] | |
100057a8: 4d19 ldr r5, [pc, #100] @ 0x10005810 <$d.178+0x4> | |
100057aa: 9500 str r5, [sp] | |
100057ac: 4919 ldr r1, [pc, #100] @ 0x10005814 <$d.178+0x8> | |
100057ae: 2401 movs r4, #1 | |
100057b0: ab01 add r3, sp, #4 | |
100057b2: 4622 mov r2, r4 | |
100057b4: f7ff fae0 bl 0x10004d78 <core::fmt::builders::DebugStruct::field> @ imm = #-2624 | |
100057b8: 9500 str r5, [sp] | |
100057ba: 4917 ldr r1, [pc, #92] @ 0x10005818 <$d.178+0xc> | |
100057bc: ab02 add r3, sp, #8 | |
100057be: 4622 mov r2, r4 | |
100057c0: f7ff fada bl 0x10004d78 <core::fmt::builders::DebugStruct::field> @ imm = #-2636 | |
100057c4: 4915 ldr r1, [pc, #84] @ 0x1000581c <$d.178+0x10> | |
100057c6: 9100 str r1, [sp] | |
100057c8: 4915 ldr r1, [pc, #84] @ 0x10005820 <$d.178+0x14> | |
100057ca: 2207 movs r2, #7 | |
100057cc: ab03 add r3, sp, #12 | |
100057ce: f7ff fad3 bl 0x10004d78 <core::fmt::builders::DebugStruct::field> @ imm = #-2650 | |
100057d2: 7901 ldrb r1, [r0, #4] | |
100057d4: 7940 ldrb r0, [r0, #5] | |
100057d6: 2800 cmp r0, #0 | |
100057d8: d00a beq 0x100057f0 <<&T as core::fmt::Debug>::fmt+0x74> @ imm = #20 | |
100057da: 2900 cmp r1, #0 | |
100057dc: d110 bne 0x10005800 <<&T as core::fmt::Debug>::fmt+0x84> @ imm = #32 | |
100057de: 9904 ldr r1, [sp, #16] | |
100057e0: 7e08 ldrb r0, [r1, #24] | |
100057e2: 0740 lsls r0, r0, #29 | |
100057e4: d406 bmi 0x100057f4 <<&T as core::fmt::Debug>::fmt+0x78> @ imm = #12 | |
100057e6: c903 ldm r1, {r0, r1} | |
100057e8: 68cb ldr r3, [r1, #12] | |
100057ea: 490f ldr r1, [pc, #60] @ 0x10005828 <$d.178+0x1c> | |
100057ec: 2202 movs r2, #2 | |
100057ee: e005 b 0x100057fc <<&T as core::fmt::Debug>::fmt+0x80> @ imm = #10 | |
100057f0: 460c mov r4, r1 | |
100057f2: e005 b 0x10005800 <<&T as core::fmt::Debug>::fmt+0x84> @ imm = #10 | |
100057f4: c903 ldm r1, {r0, r1} | |
100057f6: 68cb ldr r3, [r1, #12] | |
100057f8: 490a ldr r1, [pc, #40] @ 0x10005824 <$d.178+0x18> | |
100057fa: 2201 movs r2, #1 | |
100057fc: 4798 blx r3 | |
100057fe: 4604 mov r4, r0 | |
10005800: 1e60 subs r0, r4, #1 | |
10005802: 4184 sbcs r4, r0 | |
10005804: 4620 mov r0, r4 | |
10005806: b006 add sp, #24 | |
10005808: bdb0 pop {r4, r5, r7, pc} | |
1000580a: 46c0 mov r8, r8 | |
1000580c <$d.178>: | |
1000580c: 4e 79 00 10 .word 0x1000794e | |
10005810: 55 58 00 10 .word 0x10005855 | |
10005814: 57 79 00 10 .word 0x10007957 | |
10005818: 58 79 00 10 .word 0x10007958 | |
1000581c: 2d 58 00 10 .word 0x1000582d | |
10005820: 59 79 00 10 .word 0x10007959 | |
10005824: ca 75 00 10 .word 0x100075ca | |
10005828: cb 75 00 10 .word 0x100075cb | |
1000582c <<&T as core::fmt::Debug>::fmt>: | |
1000582c: b5d0 push {r4, r6, r7, lr} | |
1000582e: af02 add r7, sp, #8 | |
10005830: b082 sub sp, #8 | |
10005832: 460c mov r4, r1 | |
10005834: 6800 ldr r0, [r0] | |
; pub struct MouseButtons(u8); | |
10005836: 9001 str r0, [sp, #4] | |
; #[derive(Copy, Clone, PartialEq, Eq, Debug)] | |
10005838: 4804 ldr r0, [pc, #16] @ 0x1000584c <$d.180> | |
1000583a: 9000 str r0, [sp] | |
1000583c: 4904 ldr r1, [pc, #16] @ 0x10005850 <$d.180+0x4> | |
1000583e: 220c movs r2, #12 | |
10005840: ab01 add r3, sp, #4 | |
10005842: 4620 mov r0, r4 | |
10005844: f7ff fbf6 bl 0x10005034 <core::fmt::Formatter::debug_tuple_field1_finish> @ imm = #-2068 | |
10005848: b002 add sp, #8 | |
1000584a: bdd0 pop {r4, r6, r7, pc} | |
1000584c <$d.180>: | |
1000584c: 01 56 00 10 .word 0x10005601 | |
10005850: 60 79 00 10 .word 0x10007960 | |
10005854 <<&T as core::fmt::Debug>::fmt>: | |
10005854: b5f0 push {r4, r5, r6, r7, lr} | |
10005856: af03 add r7, sp, #12 | |
10005858: b0a3 sub sp, #140 | |
1000585a: 6800 ldr r0, [r0] | |
1000585c: aa03 add r2, sp, #12 | |
1000585e: 698b ldr r3, [r1, #24] | |
10005860: 06dc lsls r4, r3, #27 | |
10005862: d42f bmi 0x100058c4 <<&T as core::fmt::Debug>::fmt+0x70> @ imm = #94 | |
10005864: 069b lsls r3, r3, #26 | |
10005866: d451 bmi 0x1000590c <<&T as core::fmt::Debug>::fmt+0xb8> @ imm = #162 | |
10005868: 8803 ldrh r3, [r0] | |
1000586a: b21e sxth r6, r3 | |
1000586c: 2e00 cmp r6, #0 | |
1000586e: da00 bge 0x10005872 <<&T as core::fmt::Debug>::fmt+0x1e> @ imm = #0 | |
10005870: 4273 rsbs r3, r6, #0 | |
10005872: 3223 adds r2, #35 | |
10005874: 4c62 ldr r4, [pc, #392] @ 0x10005a00 <$d.182+0x4> | |
10005876: 42a3 cmp r3, r4 | |
10005878: d800 bhi 0x1000587c <<&T as core::fmt::Debug>::fmt+0x28> @ imm = #0 | |
1000587a: e085 b 0x10005988 <<&T as core::fmt::Debug>::fmt+0x134> @ imm = #266 | |
1000587c: b29c uxth r4, r3 | |
1000587e: 0924 lsrs r4, r4, #4 | |
10005880: 4d62 ldr r5, [pc, #392] @ 0x10005a0c <$d.182+0x10> | |
10005882: 4365 muls r5, r4, r5 | |
10005884: 0cec lsrs r4, r5, #19 | |
10005886: 4d62 ldr r5, [pc, #392] @ 0x10005a10 <$d.182+0x14> | |
10005888: 4365 muls r5, r4, r5 | |
1000588a: 18eb adds r3, r5, r3 | |
1000588c: b29d uxth r5, r3 | |
1000588e: 08ad lsrs r5, r5, #2 | |
10005890: 9602 str r6, [sp, #8] | |
10005892: 4e5c ldr r6, [pc, #368] @ 0x10005a04 <$d.182+0x8> | |
10005894: 436e muls r6, r5, r6 | |
10005896: 0c76 lsrs r6, r6, #17 | |
10005898: 0070 lsls r0, r6, #1 | |
1000589a: 4d5b ldr r5, [pc, #364] @ 0x10005a08 <$d.182+0xc> | |
1000589c: 5c2d ldrb r5, [r5, r0] | |
1000589e: 7015 strb r5, [r2] | |
100058a0: 4d59 ldr r5, [pc, #356] @ 0x10005a08 <$d.182+0xc> | |
100058a2: 1828 adds r0, r5, r0 | |
100058a4: 7840 ldrb r0, [r0, #1] | |
100058a6: 7050 strb r0, [r2, #1] | |
100058a8: 2063 movs r0, #99 | |
100058aa: 43c0 mvns r0, r0 | |
100058ac: 4370 muls r0, r6, r0 | |
100058ae: 9e02 ldr r6, [sp, #8] | |
100058b0: 18c0 adds r0, r0, r3 | |
100058b2: b280 uxth r0, r0 | |
100058b4: 0040 lsls r0, r0, #1 | |
100058b6: 5c2b ldrb r3, [r5, r0] | |
100058b8: 7093 strb r3, [r2, #2] | |
100058ba: 1828 adds r0, r5, r0 | |
100058bc: 7840 ldrb r0, [r0, #1] | |
100058be: 70d0 strb r0, [r2, #3] | |
100058c0: 2223 movs r2, #35 | |
100058c2: e087 b 0x100059d4 <<&T as core::fmt::Debug>::fmt+0x180> @ imm = #270 | |
100058c4: 8803 ldrh r3, [r0] | |
100058c6: 2001 movs r0, #1 | |
100058c8: 0200 lsls r0, r0, #8 | |
100058ca: 2281 movs r2, #129 | |
100058cc: e00a b 0x100058e4 <<&T as core::fmt::Debug>::fmt+0x90> @ imm = #20 | |
100058ce: 2557 movs r5, #87 | |
100058d0: 091b lsrs r3, r3, #4 | |
100058d2: 18eb adds r3, r5, r3 | |
100058d4: ad03 add r5, sp, #12 | |
100058d6: 18ad adds r5, r5, r2 | |
100058d8: 1eed subs r5, r5, #3 | |
100058da: 702b strb r3, [r5] | |
100058dc: 1e92 subs r2, r2, #2 | |
100058de: 0a23 lsrs r3, r4, #8 | |
100058e0: 4284 cmp r4, r0 | |
100058e2: d34a blo 0x1000597a <<&T as core::fmt::Debug>::fmt+0x126> @ imm = #148 | |
100058e4: 240f movs r4, #15 | |
100058e6: 401c ands r4, r3 | |
100058e8: 2c0a cmp r4, #10 | |
100058ea: d301 blo 0x100058f0 <<&T as core::fmt::Debug>::fmt+0x9c> @ imm = #2 | |
100058ec: 2557 movs r5, #87 | |
100058ee: e000 b 0x100058f2 <<&T as core::fmt::Debug>::fmt+0x9e> @ imm = #0 | |
100058f0: 2530 movs r5, #48 | |
100058f2: 192c adds r4, r5, r4 | |
100058f4: ad03 add r5, sp, #12 | |
100058f6: 18ad adds r5, r5, r2 | |
100058f8: 1ead subs r5, r5, #2 | |
100058fa: 702c strb r4, [r5] | |
100058fc: b29c uxth r4, r3 | |
100058fe: 2c10 cmp r4, #16 | |
10005900: d328 blo 0x10005954 <<&T as core::fmt::Debug>::fmt+0x100> @ imm = #80 | |
10005902: b2db uxtb r3, r3 | |
10005904: 2ba0 cmp r3, #160 | |
10005906: d2e2 bhs 0x100058ce <<&T as core::fmt::Debug>::fmt+0x7a> @ imm = #-60 | |
10005908: 2530 movs r5, #48 | |
1000590a: e7e1 b 0x100058d0 <<&T as core::fmt::Debug>::fmt+0x7c> @ imm = #-62 | |
1000590c: 8803 ldrh r3, [r0] | |
1000590e: 2001 movs r0, #1 | |
10005910: 0200 lsls r0, r0, #8 | |
10005912: 2281 movs r2, #129 | |
10005914: e00a b 0x1000592c <<&T as core::fmt::Debug>::fmt+0xd8> @ imm = #20 | |
10005916: 2537 movs r5, #55 | |
10005918: 091b lsrs r3, r3, #4 | |
1000591a: 18eb adds r3, r5, r3 | |
1000591c: ad03 add r5, sp, #12 | |
1000591e: 18ad adds r5, r5, r2 | |
10005920: 1eed subs r5, r5, #3 | |
10005922: 702b strb r3, [r5] | |
10005924: 1e92 subs r2, r2, #2 | |
10005926: 0a23 lsrs r3, r4, #8 | |
10005928: 4284 cmp r4, r0 | |
1000592a: d326 blo 0x1000597a <<&T as core::fmt::Debug>::fmt+0x126> @ imm = #76 | |
1000592c: 240f movs r4, #15 | |
1000592e: 401c ands r4, r3 | |
10005930: 2c0a cmp r4, #10 | |
10005932: d301 blo 0x10005938 <<&T as core::fmt::Debug>::fmt+0xe4> @ imm = #2 | |
10005934: 2537 movs r5, #55 | |
10005936: e000 b 0x1000593a <<&T as core::fmt::Debug>::fmt+0xe6> @ imm = #0 | |
10005938: 2530 movs r5, #48 | |
1000593a: 192c adds r4, r5, r4 | |
1000593c: ad03 add r5, sp, #12 | |
1000593e: 18ad adds r5, r5, r2 | |
10005940: 1ead subs r5, r5, #2 | |
10005942: 702c strb r4, [r5] | |
10005944: b29c uxth r4, r3 | |
10005946: 2c10 cmp r4, #16 | |
10005948: d304 blo 0x10005954 <<&T as core::fmt::Debug>::fmt+0x100> @ imm = #8 | |
1000594a: b2db uxtb r3, r3 | |
1000594c: 2ba0 cmp r3, #160 | |
1000594e: d2e2 bhs 0x10005916 <<&T as core::fmt::Debug>::fmt+0xc2> @ imm = #-60 | |
10005950: 2530 movs r5, #48 | |
10005952: e7e1 b 0x10005918 <<&T as core::fmt::Debug>::fmt+0xc4> @ imm = #-62 | |
10005954: 1e90 subs r0, r2, #2 | |
10005956: 1e52 subs r2, r2, #1 | |
10005958: 2881 cmp r0, #129 | |
1000595a: d211 bhs 0x10005980 <<&T as core::fmt::Debug>::fmt+0x12c> @ imm = #34 | |
1000595c: 2381 movs r3, #129 | |
1000595e: 1a9a subs r2, r3, r2 | |
10005960: 9201 str r2, [sp, #4] | |
10005962: aa03 add r2, sp, #12 | |
10005964: 1810 adds r0, r2, r0 | |
10005966: 9000 str r0, [sp] | |
10005968: 2401 movs r4, #1 | |
1000596a: 4a24 ldr r2, [pc, #144] @ 0x100059fc <$d.182> | |
1000596c: 2302 movs r3, #2 | |
1000596e: 4608 mov r0, r1 | |
10005970: 4621 mov r1, r4 | |
10005972: f7fe f90a bl 0x10003b8a <core::fmt::Formatter::pad_integral> @ imm = #-7660 | |
10005976: b023 add sp, #140 | |
10005978: bdf0 pop {r4, r5, r6, r7, pc} | |
1000597a: 1e50 subs r0, r2, #1 | |
1000597c: 2881 cmp r0, #129 | |
1000597e: d3ed blo 0x1000595c <<&T as core::fmt::Debug>::fmt+0x108> @ imm = #-38 | |
10005980: 2180 movs r1, #128 | |
10005982: f7ff f8af bl 0x10004ae4 <core::slice::index::slice_index_order_fail> @ imm = #-3746 | |
10005986: defe trap | |
10005988: 2b63 cmp r3, #99 | |
1000598a: d91f bls 0x100059cc <<&T as core::fmt::Debug>::fmt+0x178> @ imm = #62 | |
1000598c: b298 uxth r0, r3 | |
1000598e: 0880 lsrs r0, r0, #2 | |
10005990: 4c1c ldr r4, [pc, #112] @ 0x10005a04 <$d.182+0x8> | |
10005992: 4344 muls r4, r0, r4 | |
10005994: 0c64 lsrs r4, r4, #17 | |
10005996: 2063 movs r0, #99 | |
10005998: 43c0 mvns r0, r0 | |
1000599a: 4360 muls r0, r4, r0 | |
1000599c: 18c0 adds r0, r0, r3 | |
1000599e: b280 uxth r0, r0 | |
100059a0: 0040 lsls r0, r0, #1 | |
100059a2: 4b19 ldr r3, [pc, #100] @ 0x10005a08 <$d.182+0xc> | |
100059a4: 5c1d ldrb r5, [r3, r0] | |
100059a6: 7095 strb r5, [r2, #2] | |
100059a8: 1818 adds r0, r3, r0 | |
100059aa: 7840 ldrb r0, [r0, #1] | |
100059ac: 70d0 strb r0, [r2, #3] | |
100059ae: 2225 movs r2, #37 | |
100059b0: 4623 mov r3, r4 | |
100059b2: 2b0a cmp r3, #10 | |
100059b4: d30d blo 0x100059d2 <<&T as core::fmt::Debug>::fmt+0x17e> @ imm = #26 | |
100059b6: 0058 lsls r0, r3, #1 | |
100059b8: 4b13 ldr r3, [pc, #76] @ 0x10005a08 <$d.182+0xc> | |
100059ba: 5c1c ldrb r4, [r3, r0] | |
100059bc: 1e92 subs r2, r2, #2 | |
100059be: ad03 add r5, sp, #12 | |
100059c0: 54ac strb r4, [r5, r2] | |
100059c2: 18ac adds r4, r5, r2 | |
100059c4: 1818 adds r0, r3, r0 | |
100059c6: 7840 ldrb r0, [r0, #1] | |
100059c8: 7060 strb r0, [r4, #1] | |
100059ca: e007 b 0x100059dc <<&T as core::fmt::Debug>::fmt+0x188> @ imm = #14 | |
100059cc: 2227 movs r2, #39 | |
100059ce: 2b0a cmp r3, #10 | |
100059d0: d2f1 bhs 0x100059b6 <<&T as core::fmt::Debug>::fmt+0x162> @ imm = #-30 | |
100059d2: 461c mov r4, r3 | |
100059d4: 1e52 subs r2, r2, #1 | |
100059d6: 3430 adds r4, #48 | |
100059d8: a803 add r0, sp, #12 | |
100059da: 5484 strb r4, [r0, r2] | |
100059dc: 2027 movs r0, #39 | |
100059de: 1a80 subs r0, r0, r2 | |
100059e0: 9001 str r0, [sp, #4] | |
100059e2: a803 add r0, sp, #12 | |
100059e4: 1880 adds r0, r0, r2 | |
100059e6: 9000 str r0, [sp] | |
100059e8: 2300 movs r3, #0 | |
100059ea: 2e00 cmp r6, #0 | |
100059ec: da02 bge 0x100059f4 <<&T as core::fmt::Debug>::fmt+0x1a0> @ imm = #4 | |
100059ee: 461c mov r4, r3 | |
100059f0: 4a08 ldr r2, [pc, #32] @ 0x10005a14 <$d.182+0x18> | |
100059f2: e7bc b 0x1000596e <<&T as core::fmt::Debug>::fmt+0x11a> @ imm = #-136 | |
100059f4: 2401 movs r4, #1 | |
100059f6: 4a07 ldr r2, [pc, #28] @ 0x10005a14 <$d.182+0x18> | |
100059f8: e7b9 b 0x1000596e <<&T as core::fmt::Debug>::fmt+0x11a> @ imm = #-142 | |
100059fa: 46c0 mov r8, r8 | |
100059fc <$d.182>: | |
100059fc: d0 75 00 10 .word 0x100075d0 | |
10005a00: 0f 27 00 00 .word 0x0000270f | |
10005a04: 7b 14 00 00 .word 0x0000147b | |
10005a08: d2 75 00 10 .word 0x100075d2 | |
10005a0c: 47 03 00 00 .word 0x00000347 | |
10005a10: f0 d8 ff ff .word 0xffffd8f0 | |
10005a14: bc 77 00 10 .word 0x100077bc | |
10005a18 <<&T as core::fmt::Debug>::fmt>: | |
10005a18: b580 push {r7, lr} | |
10005a1a: af00 add r7, sp, #0 | |
10005a1c: 6800 ldr r0, [r0] | |
; #[derive(Debug, PartialEq, Eq, Copy, Clone, PartialOrd, Ord)] | |
10005a1e: 7800 ldrb r0, [r0] | |
10005a20: 0040 lsls r0, r0, #1 | |
10005a22: 46c0 mov r8, r8 | |
10005a24: 4478 add r0, pc | |
10005a26: 8880 ldrh r0, [r0, #4] | |
10005a28: 0040 lsls r0, r0, #1 | |
10005a2a: 4487 add pc, r0 | |
10005a2c <$d.184>: | |
10005a2c: 7b 00 81 00 .word 0x0081007b | |
10005a30: 87 00 8d 00 .word 0x008d0087 | |
10005a34: 93 00 99 00 .word 0x00990093 | |
10005a38: 9f 00 a5 00 .word 0x00a5009f | |
10005a3c: ab 00 b1 00 .word 0x00b100ab | |
10005a40: b7 00 bd 00 .word 0x00bd00b7 | |
10005a44: c3 00 c9 00 .word 0x00c900c3 | |
10005a48: cf 00 d3 00 .word 0x00d300cf | |
10005a4c: d9 00 df 00 .word 0x00df00d9 | |
10005a50: e5 00 eb 00 .word 0x00eb00e5 | |
10005a54: f1 00 f7 00 .word 0x00f700f1 | |
10005a58: fd 00 03 01 .word 0x010300fd | |
10005a5c: 09 01 0f 01 .word 0x010f0109 | |
10005a60: 15 01 1b 01 .word 0x011b0115 | |
10005a64: 21 01 27 01 .word 0x01270121 | |
10005a68: 2d 01 33 01 .word 0x0133012d | |
10005a6c: 39 01 3f 01 .word 0x013f0139 | |
10005a70: 45 01 4b 01 .word 0x014b0145 | |
10005a74: 51 01 57 01 .word 0x01570151 | |
10005a78: 5d 01 63 01 .word 0x0163015d | |
10005a7c: 69 01 6f 01 .word 0x016f0169 | |
10005a80: 75 01 7b 01 .word 0x017b0175 | |
10005a84: 81 01 87 01 .word 0x01870181 | |
10005a88: 8d 01 93 01 .word 0x0193018d | |
10005a8c: 99 01 9f 01 .word 0x019f0199 | |
10005a90: a5 01 ab 01 .word 0x01ab01a5 | |
10005a94: b1 01 b7 01 .word 0x01b701b1 | |
10005a98: bd 01 c3 01 .word 0x01c301bd | |
10005a9c: c9 01 cf 01 .word 0x01cf01c9 | |
10005aa0: d5 01 db 01 .word 0x01db01d5 | |
10005aa4: e1 01 e7 01 .word 0x01e701e1 | |
10005aa8: ed 01 f3 01 .word 0x01f301ed | |
10005aac: f9 01 ff 01 .word 0x01ff01f9 | |
10005ab0: 05 02 0b 02 .word 0x020b0205 | |
10005ab4: 11 02 17 02 .word 0x02170211 | |
10005ab8: 1d 02 23 02 .word 0x0223021d | |
10005abc: 29 02 2f 02 .word 0x022f0229 | |
10005ac0: 35 02 3b 02 .word 0x023b0235 | |
10005ac4: 41 02 47 02 .word 0x02470241 | |
10005ac8: 4d 02 53 02 .word 0x0253024d | |
10005acc: 59 02 5f 02 .word 0x025f0259 | |
10005ad0: 65 02 6b 02 .word 0x026b0265 | |
10005ad4: 71 02 79 02 .word 0x02790271 | |
10005ad8: 81 02 8b 02 .word 0x028b0281 | |
10005adc: 93 02 9d 02 .word 0x029d0293 | |
10005ae0: a5 02 af 02 .word 0x02af02a5 | |
10005ae4: b7 02 c1 02 .word 0x02c102b7 | |
10005ae8: c9 02 d3 02 .word 0x02d302c9 | |
10005aec: dd 02 e5 02 .word 0x02e502dd | |
10005af0: ef 02 f7 02 .word 0x02f702ef | |
10005af4: 01 03 09 03 .word 0x03090301 | |
10005af8: 13 03 1b 03 .word 0x031b0313 | |
10005afc: 25 03 2d 03 .word 0x032d0325 | |
10005b00: 37 03 3f 03 .word 0x033f0337 | |
10005b04: 45 03 4b 03 .word 0x034b0345 | |
10005b08: 51 03 57 03 .word 0x03570351 | |
10005b0c: 61 03 69 03 .word 0x03690361 | |
10005b10: 73 03 7b 03 .word 0x037b0373 | |
10005b14: 85 03 8d 03 .word 0x038d0385 | |
10005b18: 97 03 9f 03 .word 0x039f0397 | |
10005b1c: a9 03 b1 03 .word 0x03b103a9 | |
10005b20: bb 03 c5 03 .word 0x03c503bb | |
10005b24 <$t.185>: | |
10005b24: c903 ldm r1, {r0, r1} | |
10005b26: 68cb ldr r3, [r1, #12] | |
10005b28: 49fc ldr r1, [pc, #1008] @ 0x10005f1c <$d.186> | |
10005b2a: 2206 movs r2, #6 | |
10005b2c: 4798 blx r3 | |
10005b2e: bd80 pop {r7, pc} | |
10005b30: c903 ldm r1, {r0, r1} | |
10005b32: 68cb ldr r3, [r1, #12] | |
10005b34: 49fd ldr r1, [pc, #1012] @ 0x10005f2c <$d.188> | |
10005b36: 2202 movs r2, #2 | |
10005b38: 4798 blx r3 | |
10005b3a: bd80 pop {r7, pc} | |
10005b3c: c903 ldm r1, {r0, r1} | |
10005b3e: 68cb ldr r3, [r1, #12] | |
10005b40: 49fe ldr r1, [pc, #1016] @ 0x10005f3c <$d.190> | |
10005b42: 2202 movs r2, #2 | |
10005b44: 4798 blx r3 | |
10005b46: bd80 pop {r7, pc} | |
10005b48: c903 ldm r1, {r0, r1} | |
10005b4a: 68cb ldr r3, [r1, #12] | |
10005b4c: 49fc ldr r1, [pc, #1008] @ 0x10005f40 <$d.190+0x4> | |
10005b4e: 2202 movs r2, #2 | |
10005b50: 4798 blx r3 | |
10005b52: bd80 pop {r7, pc} | |
10005b54: c903 ldm r1, {r0, r1} | |
10005b56: 68cb ldr r3, [r1, #12] | |
10005b58: 49fd ldr r1, [pc, #1012] @ 0x10005f50 <$d.192> | |
10005b5a: 2202 movs r2, #2 | |
10005b5c: 4798 blx r3 | |
10005b5e: bd80 pop {r7, pc} | |
10005b60: c903 ldm r1, {r0, r1} | |
10005b62: 68cb ldr r3, [r1, #12] | |
10005b64: 49fe ldr r1, [pc, #1016] @ 0x10005f60 <$d.194> | |
10005b66: 2202 movs r2, #2 | |
10005b68: 4798 blx r3 | |
10005b6a: bd80 pop {r7, pc} | |
10005b6c: c903 ldm r1, {r0, r1} | |
10005b6e: 68cb ldr r3, [r1, #12] | |
10005b70: 49fc ldr r1, [pc, #1008] @ 0x10005f64 <$d.194+0x4> | |
10005b72: 2202 movs r2, #2 | |
10005b74: 4798 blx r3 | |
10005b76: bd80 pop {r7, pc} | |
10005b78: c903 ldm r1, {r0, r1} | |
10005b7a: 68cb ldr r3, [r1, #12] | |
10005b7c: 49fd ldr r1, [pc, #1012] @ 0x10005f74 <$d.196> | |
10005b7e: 2202 movs r2, #2 | |
10005b80: 4798 blx r3 | |
10005b82: bd80 pop {r7, pc} | |
10005b84: c903 ldm r1, {r0, r1} | |
10005b86: 68cb ldr r3, [r1, #12] | |
10005b88: 49fe ldr r1, [pc, #1016] @ 0x10005f84 <$d.198> | |
10005b8a: 2202 movs r2, #2 | |
10005b8c: 4798 blx r3 | |
10005b8e: bd80 pop {r7, pc} | |
10005b90: c903 ldm r1, {r0, r1} | |
10005b92: 68cb ldr r3, [r1, #12] | |
10005b94: 49fc ldr r1, [pc, #1008] @ 0x10005f88 <$d.198+0x4> | |
10005b96: 2202 movs r2, #2 | |
10005b98: 4798 blx r3 | |
10005b9a: bd80 pop {r7, pc} | |
10005b9c: c903 ldm r1, {r0, r1} | |
10005b9e: 68cb ldr r3, [r1, #12] | |
10005ba0: 49fd ldr r1, [pc, #1012] @ 0x10005f98 <$d.200> | |
10005ba2: 2203 movs r2, #3 | |
10005ba4: 4798 blx r3 | |
10005ba6: bd80 pop {r7, pc} | |
10005ba8: c903 ldm r1, {r0, r1} | |
10005baa: 68cb ldr r3, [r1, #12] | |
10005bac: 49fe ldr r1, [pc, #1016] @ 0x10005fa8 <$d.202> | |
10005bae: 2203 movs r2, #3 | |
10005bb0: 4798 blx r3 | |
10005bb2: bd80 pop {r7, pc} | |
10005bb4: c903 ldm r1, {r0, r1} | |
10005bb6: 68cb ldr r3, [r1, #12] | |
10005bb8: 49fc ldr r1, [pc, #1008] @ 0x10005fac <$d.202+0x4> | |
10005bba: 2203 movs r2, #3 | |
10005bbc: 4798 blx r3 | |
10005bbe: bd80 pop {r7, pc} | |
10005bc0: c903 ldm r1, {r0, r1} | |
10005bc2: 68cb ldr r3, [r1, #12] | |
10005bc4: 49fd ldr r1, [pc, #1012] @ 0x10005fbc <$d.204> | |
10005bc6: 220b movs r2, #11 | |
10005bc8: 4798 blx r3 | |
10005bca: bd80 pop {r7, pc} | |
10005bcc: c903 ldm r1, {r0, r1} | |
10005bce: 68cb ldr r3, [r1, #12] | |
10005bd0: 49fe ldr r1, [pc, #1016] @ 0x10005fcc <$d.206> | |
10005bd2: e2f4 b 0x100061be <$t.263+0x6> @ imm = #1512 | |
10005bd4: c903 ldm r1, {r0, r1} | |
10005bd6: 68cb ldr r3, [r1, #12] | |
10005bd8: 49fd ldr r1, [pc, #1012] @ 0x10005fd0 <$d.206+0x4> | |
10005bda: 220a movs r2, #10 | |
10005bdc: 4798 blx r3 | |
10005bde: bd80 pop {r7, pc} | |
10005be0: c903 ldm r1, {r0, r1} | |
10005be2: 68cb ldr r3, [r1, #12] | |
10005be4: 49fe ldr r1, [pc, #1016] @ 0x10005fe0 <$d.208> | |
10005be6: 220a movs r2, #10 | |
10005be8: 4798 blx r3 | |
10005bea: bd80 pop {r7, pc} | |
10005bec: c903 ldm r1, {r0, r1} | |
10005bee: 68cb ldr r3, [r1, #12] | |
10005bf0: 49fc ldr r1, [pc, #1008] @ 0x10005fe4 <$d.208+0x4> | |
10005bf2: 2204 movs r2, #4 | |
10005bf4: 4798 blx r3 | |
10005bf6: bd80 pop {r7, pc} | |
10005bf8: c903 ldm r1, {r0, r1} | |
10005bfa: 68cb ldr r3, [r1, #12] | |
10005bfc: 49fd ldr r1, [pc, #1012] @ 0x10005ff4 <$d.210> | |
10005bfe: 2204 movs r2, #4 | |
10005c00: 4798 blx r3 | |
10005c02: bd80 pop {r7, pc} | |
10005c04: c903 ldm r1, {r0, r1} | |
10005c06: 68cb ldr r3, [r1, #12] | |
10005c08: 49fe ldr r1, [pc, #1016] @ 0x10006004 <$d.212> | |
10005c0a: 2204 movs r2, #4 | |
10005c0c: 4798 blx r3 | |
10005c0e: bd80 pop {r7, pc} | |
10005c10: c903 ldm r1, {r0, r1} | |
10005c12: 68cb ldr r3, [r1, #12] | |
10005c14: 49fc ldr r1, [pc, #1008] @ 0x10006008 <$d.212+0x4> | |
10005c16: 2204 movs r2, #4 | |
10005c18: 4798 blx r3 | |
10005c1a: bd80 pop {r7, pc} | |
10005c1c: c903 ldm r1, {r0, r1} | |
10005c1e: 68cb ldr r3, [r1, #12] | |
10005c20: 49fd ldr r1, [pc, #1012] @ 0x10006018 <$d.214> | |
10005c22: 2204 movs r2, #4 | |
10005c24: 4798 blx r3 | |
10005c26: bd80 pop {r7, pc} | |
10005c28: c903 ldm r1, {r0, r1} | |
10005c2a: 68cb ldr r3, [r1, #12] | |
10005c2c: 49fe ldr r1, [pc, #1016] @ 0x10006028 <$d.216> | |
10005c2e: 2204 movs r2, #4 | |
10005c30: 4798 blx r3 | |
10005c32: bd80 pop {r7, pc} | |
10005c34: c903 ldm r1, {r0, r1} | |
10005c36: 68cb ldr r3, [r1, #12] | |
10005c38: 49fc ldr r1, [pc, #1008] @ 0x1000602c <$d.216+0x4> | |
10005c3a: 2204 movs r2, #4 | |
10005c3c: 4798 blx r3 | |
10005c3e: bd80 pop {r7, pc} | |
10005c40: c903 ldm r1, {r0, r1} | |
10005c42: 68cb ldr r3, [r1, #12] | |
10005c44: 49fd ldr r1, [pc, #1012] @ 0x1000603c <$d.218> | |
10005c46: 2204 movs r2, #4 | |
10005c48: 4798 blx r3 | |
10005c4a: bd80 pop {r7, pc} | |
10005c4c: c903 ldm r1, {r0, r1} | |
10005c4e: 68cb ldr r3, [r1, #12] | |
10005c50: 49fe ldr r1, [pc, #1016] @ 0x1000604c <$d.220> | |
10005c52: 2204 movs r2, #4 | |
10005c54: 4798 blx r3 | |
10005c56: bd80 pop {r7, pc} | |
10005c58: c903 ldm r1, {r0, r1} | |
10005c5a: 68cb ldr r3, [r1, #12] | |
10005c5c: 49fc ldr r1, [pc, #1008] @ 0x10006050 <$d.220+0x4> | |
10005c5e: 2204 movs r2, #4 | |
10005c60: 4798 blx r3 | |
10005c62: bd80 pop {r7, pc} | |
10005c64: c903 ldm r1, {r0, r1} | |
10005c66: 68cb ldr r3, [r1, #12] | |
10005c68: 49fd ldr r1, [pc, #1012] @ 0x10006060 <$d.222> | |
10005c6a: 2204 movs r2, #4 | |
10005c6c: 4798 blx r3 | |
10005c6e: bd80 pop {r7, pc} | |
10005c70: c903 ldm r1, {r0, r1} | |
10005c72: 68cb ldr r3, [r1, #12] | |
10005c74: 49fe ldr r1, [pc, #1016] @ 0x10006070 <$d.224> | |
10005c76: 2208 movs r2, #8 | |
10005c78: 4798 blx r3 | |
10005c7a: bd80 pop {r7, pc} | |
10005c7c: c903 ldm r1, {r0, r1} | |
10005c7e: 68cb ldr r3, [r1, #12] | |
10005c80: 49fc ldr r1, [pc, #1008] @ 0x10006074 <$d.224+0x4> | |
10005c82: 2207 movs r2, #7 | |
10005c84: 4798 blx r3 | |
10005c86: bd80 pop {r7, pc} | |
10005c88: c903 ldm r1, {r0, r1} | |
10005c8a: 68cb ldr r3, [r1, #12] | |
10005c8c: 49fd ldr r1, [pc, #1012] @ 0x10006084 <$d.226> | |
10005c8e: 2209 movs r2, #9 | |
10005c90: 4798 blx r3 | |
10005c92: bd80 pop {r7, pc} | |
10005c94: c903 ldm r1, {r0, r1} | |
10005c96: 68cb ldr r3, [r1, #12] | |
10005c98: 49fe ldr r1, [pc, #1016] @ 0x10006094 <$d.228> | |
10005c9a: 2206 movs r2, #6 | |
10005c9c: 4798 blx r3 | |
10005c9e: bd80 pop {r7, pc} | |
10005ca0: c903 ldm r1, {r0, r1} | |
10005ca2: 68cb ldr r3, [r1, #12] | |
10005ca4: 49fc ldr r1, [pc, #1008] @ 0x10006098 <$d.228+0x4> | |
10005ca6: 2204 movs r2, #4 | |
10005ca8: 4798 blx r3 | |
10005caa: bd80 pop {r7, pc} | |
10005cac: c903 ldm r1, {r0, r1} | |
10005cae: 68cb ldr r3, [r1, #12] | |
10005cb0: 49fd ldr r1, [pc, #1012] @ 0x100060a8 <$d.230> | |
10005cb2: 2206 movs r2, #6 | |
10005cb4: 4798 blx r3 | |
10005cb6: bd80 pop {r7, pc} | |
10005cb8: c903 ldm r1, {r0, r1} | |
10005cba: 68cb ldr r3, [r1, #12] | |
10005cbc: 49fd ldr r1, [pc, #1012] @ 0x100060b4 <$d.232> | |
10005cbe: 220a movs r2, #10 | |
10005cc0: 4798 blx r3 | |
10005cc2: bd80 pop {r7, pc} | |
10005cc4: c903 ldm r1, {r0, r1} | |
10005cc6: 68cb ldr r3, [r1, #12] | |
10005cc8: 49fd ldr r1, [pc, #1012] @ 0x100060c0 <$d.234> | |
10005cca: 220c movs r2, #12 | |
10005ccc: 4798 blx r3 | |
10005cce: bd80 pop {r7, pc} | |
10005cd0: c903 ldm r1, {r0, r1} | |
10005cd2: 68cb ldr r3, [r1, #12] | |
10005cd4: 49fd ldr r1, [pc, #1012] @ 0x100060cc <$d.236> | |
10005cd6: 220e movs r2, #14 | |
10005cd8: 4798 blx r3 | |
10005cda: bd80 pop {r7, pc} | |
10005cdc: c903 ldm r1, {r0, r1} | |
10005cde: 68cb ldr r3, [r1, #12] | |
10005ce0: 49fd ldr r1, [pc, #1012] @ 0x100060d8 <$d.238> | |
10005ce2: 220e movs r2, #14 | |
10005ce4: 4798 blx r3 | |
10005ce6: bd80 pop {r7, pc} | |
10005ce8: c903 ldm r1, {r0, r1} | |
10005cea: 68cb ldr r3, [r1, #12] | |
10005cec: 49fe ldr r1, [pc, #1016] @ 0x100060e8 <$d.240> | |
10005cee: 2203 movs r2, #3 | |
10005cf0: 4798 blx r3 | |
10005cf2: bd80 pop {r7, pc} | |
10005cf4: c903 ldm r1, {r0, r1} | |
10005cf6: 68cb ldr r3, [r1, #12] | |
10005cf8: 49fc ldr r1, [pc, #1008] @ 0x100060ec <$d.240+0x4> | |
10005cfa: 2201 movs r2, #1 | |
10005cfc: 4798 blx r3 | |
10005cfe: bd80 pop {r7, pc} | |
10005d00: c903 ldm r1, {r0, r1} | |
10005d02: 68cb ldr r3, [r1, #12] | |
10005d04: 49fd ldr r1, [pc, #1012] @ 0x100060fc <$d.242> | |
10005d06: 2201 movs r2, #1 | |
10005d08: 4798 blx r3 | |
10005d0a: bd80 pop {r7, pc} | |
10005d0c: c903 ldm r1, {r0, r1} | |
10005d0e: 68cb ldr r3, [r1, #12] | |
10005d10: 49fe ldr r1, [pc, #1016] @ 0x1000610c <$d.244> | |
10005d12: 2201 movs r2, #1 | |
10005d14: 4798 blx r3 | |
10005d16: bd80 pop {r7, pc} | |
10005d18: c903 ldm r1, {r0, r1} | |
10005d1a: 68cb ldr r3, [r1, #12] | |
10005d1c: 49fc ldr r1, [pc, #1008] @ 0x10006110 <$d.244+0x4> | |
10005d1e: 2201 movs r2, #1 | |
10005d20: 4798 blx r3 | |
10005d22: bd80 pop {r7, pc} | |
10005d24: c903 ldm r1, {r0, r1} | |
10005d26: 68cb ldr r3, [r1, #12] | |
10005d28: 49fd ldr r1, [pc, #1012] @ 0x10006120 <$d.246> | |
10005d2a: 2201 movs r2, #1 | |
10005d2c: 4798 blx r3 | |
10005d2e: bd80 pop {r7, pc} | |
10005d30: c903 ldm r1, {r0, r1} | |
10005d32: 68cb ldr r3, [r1, #12] | |
10005d34: 49fe ldr r1, [pc, #1016] @ 0x10006130 <$d.248> | |
10005d36: 2201 movs r2, #1 | |
10005d38: 4798 blx r3 | |
10005d3a: bd80 pop {r7, pc} | |
10005d3c: c903 ldm r1, {r0, r1} | |
10005d3e: 68cb ldr r3, [r1, #12] | |
10005d40: 49fc ldr r1, [pc, #1008] @ 0x10006134 <$d.248+0x4> | |
10005d42: 2201 movs r2, #1 | |
10005d44: 4798 blx r3 | |
10005d46: bd80 pop {r7, pc} | |
10005d48: c903 ldm r1, {r0, r1} | |
10005d4a: 68cb ldr r3, [r1, #12] | |
10005d4c: 49fd ldr r1, [pc, #1012] @ 0x10006144 <$d.250> | |
10005d4e: 2201 movs r2, #1 | |
10005d50: 4798 blx r3 | |
10005d52: bd80 pop {r7, pc} | |
10005d54: c903 ldm r1, {r0, r1} | |
10005d56: 68cb ldr r3, [r1, #12] | |
10005d58: 49fe ldr r1, [pc, #1016] @ 0x10006154 <$d.252> | |
10005d5a: 2201 movs r2, #1 | |
10005d5c: 4798 blx r3 | |
10005d5e: bd80 pop {r7, pc} | |
10005d60: c903 ldm r1, {r0, r1} | |
10005d62: 68cb ldr r3, [r1, #12] | |
10005d64: 49fc ldr r1, [pc, #1008] @ 0x10006158 <$d.252+0x4> | |
10005d66: 2201 movs r2, #1 | |
10005d68: 4798 blx r3 | |
10005d6a: bd80 pop {r7, pc} | |
10005d6c: c903 ldm r1, {r0, r1} | |
10005d6e: 68cb ldr r3, [r1, #12] | |
10005d70: 49fd ldr r1, [pc, #1012] @ 0x10006168 <$d.254> | |
10005d72: 2204 movs r2, #4 | |
10005d74: 4798 blx r3 | |
10005d76: bd80 pop {r7, pc} | |
10005d78: c903 ldm r1, {r0, r1} | |
10005d7a: 68cb ldr r3, [r1, #12] | |
10005d7c: 49fe ldr r1, [pc, #1016] @ 0x10006178 <$d.256> | |
10005d7e: 2204 movs r2, #4 | |
10005d80: 4798 blx r3 | |
10005d82: bd80 pop {r7, pc} | |
10005d84: c903 ldm r1, {r0, r1} | |
10005d86: 68cb ldr r3, [r1, #12] | |
10005d88: 49fc ldr r1, [pc, #1008] @ 0x1000617c <$d.256+0x4> | |
10005d8a: 2204 movs r2, #4 | |
10005d8c: 4798 blx r3 | |
10005d8e: bd80 pop {r7, pc} | |
10005d90: c903 ldm r1, {r0, r1} | |
10005d92: 68cb ldr r3, [r1, #12] | |
10005d94: 49fd ldr r1, [pc, #1012] @ 0x1000618c <$d.258> | |
10005d96: 2204 movs r2, #4 | |
10005d98: 4798 blx r3 | |
10005d9a: bd80 pop {r7, pc} | |
10005d9c: c903 ldm r1, {r0, r1} | |
10005d9e: 68cb ldr r3, [r1, #12] | |
10005da0: 49fe ldr r1, [pc, #1016] @ 0x1000619c <$d.260> | |
10005da2: 2206 movs r2, #6 | |
10005da4: 4798 blx r3 | |
10005da6: bd80 pop {r7, pc} | |
10005da8: c903 ldm r1, {r0, r1} | |
10005daa: 68cb ldr r3, [r1, #12] | |
10005dac: 49fc ldr r1, [pc, #1008] @ 0x100061a0 <$d.260+0x4> | |
10005dae: 2203 movs r2, #3 | |
10005db0: 4798 blx r3 | |
10005db2: bd80 pop {r7, pc} | |
10005db4: c903 ldm r1, {r0, r1} | |
10005db6: 68cb ldr r3, [r1, #12] | |
10005db8: 49fd ldr r1, [pc, #1012] @ 0x100061b0 <$d.262> | |
10005dba: 2208 movs r2, #8 | |
10005dbc: 4798 blx r3 | |
10005dbe: bd80 pop {r7, pc} | |
10005dc0: c903 ldm r1, {r0, r1} | |
10005dc2: 68cb ldr r3, [r1, #12] | |
10005dc4: 49fb ldr r1, [pc, #1004] @ 0x100061b4 <$d.262+0x4> | |
10005dc6: 2207 movs r2, #7 | |
10005dc8: 4798 blx r3 | |
10005dca: bd80 pop {r7, pc} | |
10005dcc: c903 ldm r1, {r0, r1} | |
10005dce: 68cb ldr r3, [r1, #12] | |
10005dd0: 49fc ldr r1, [pc, #1008] @ 0x100061c4 <$d.264> | |
10005dd2: 2207 movs r2, #7 | |
10005dd4: 4798 blx r3 | |
10005dd6: bd80 pop {r7, pc} | |
10005dd8: c903 ldm r1, {r0, r1} | |
10005dda: 68cb ldr r3, [r1, #12] | |
10005ddc: 49fa ldr r1, [pc, #1000] @ 0x100061c8 <$d.264+0x4> | |
10005dde: 2207 movs r2, #7 | |
10005de0: 4798 blx r3 | |
10005de2: bd80 pop {r7, pc} | |
10005de4: c903 ldm r1, {r0, r1} | |
10005de6: 68cb ldr r3, [r1, #12] | |
10005de8: 49f8 ldr r1, [pc, #992] @ 0x100061cc <$d.264+0x8> | |
10005dea: 2209 movs r2, #9 | |
10005dec: 4798 blx r3 | |
10005dee: bd80 pop {r7, pc} | |
10005df0: c903 ldm r1, {r0, r1} | |
10005df2: 68cb ldr r3, [r1, #12] | |
10005df4: 49f6 ldr r1, [pc, #984] @ 0x100061d0 <$d.264+0xc> | |
10005df6: 2208 movs r2, #8 | |
10005df8: 4798 blx r3 | |
10005dfa: bd80 pop {r7, pc} | |
10005dfc: c903 ldm r1, {r0, r1} | |
10005dfe: 68cb ldr r3, [r1, #12] | |
10005e00: 49f4 ldr r1, [pc, #976] @ 0x100061d4 <$d.264+0x10> | |
10005e02: 2201 movs r2, #1 | |
10005e04: 4798 blx r3 | |
10005e06: bd80 pop {r7, pc} | |
10005e08: c903 ldm r1, {r0, r1} | |
10005e0a: 68cb ldr r3, [r1, #12] | |
10005e0c: 49f2 ldr r1, [pc, #968] @ 0x100061d8 <$d.264+0x14> | |
10005e0e: 2201 movs r2, #1 | |
10005e10: 4798 blx r3 | |
10005e12: bd80 pop {r7, pc} | |
10005e14: c903 ldm r1, {r0, r1} | |
10005e16: 68cb ldr r3, [r1, #12] | |
10005e18: 49f0 ldr r1, [pc, #960] @ 0x100061dc <$d.264+0x18> | |
10005e1a: 2201 movs r2, #1 | |
10005e1c: 4798 blx r3 | |
10005e1e: bd80 pop {r7, pc} | |
10005e20: c903 ldm r1, {r0, r1} | |
10005e22: 68cb ldr r3, [r1, #12] | |
10005e24: 49ee ldr r1, [pc, #952] @ 0x100061e0 <$d.264+0x1c> | |
10005e26: 2201 movs r2, #1 | |
10005e28: 4798 blx r3 | |
10005e2a: bd80 pop {r7, pc} | |
10005e2c: c903 ldm r1, {r0, r1} | |
10005e2e: 68cb ldr r3, [r1, #12] | |
10005e30: 49ec ldr r1, [pc, #944] @ 0x100061e4 <$d.264+0x20> | |
10005e32: 2201 movs r2, #1 | |
10005e34: 4798 blx r3 | |
10005e36: bd80 pop {r7, pc} | |
10005e38: c903 ldm r1, {r0, r1} | |
10005e3a: 68cb ldr r3, [r1, #12] | |
10005e3c: 49ea ldr r1, [pc, #936] @ 0x100061e8 <$d.264+0x24> | |
10005e3e: 2201 movs r2, #1 | |
10005e40: 4798 blx r3 | |
10005e42: bd80 pop {r7, pc} | |
10005e44: c903 ldm r1, {r0, r1} | |
10005e46: 68cb ldr r3, [r1, #12] | |
10005e48: 49e8 ldr r1, [pc, #928] @ 0x100061ec <$d.264+0x28> | |
10005e4a: 2201 movs r2, #1 | |
10005e4c: 4798 blx r3 | |
10005e4e: bd80 pop {r7, pc} | |
10005e50: c903 ldm r1, {r0, r1} | |
10005e52: 68cb ldr r3, [r1, #12] | |
10005e54: 49e6 ldr r1, [pc, #920] @ 0x100061f0 <$d.264+0x2c> | |
10005e56: 2201 movs r2, #1 | |
10005e58: 4798 blx r3 | |
10005e5a: bd80 pop {r7, pc} | |
10005e5c: c903 ldm r1, {r0, r1} | |
10005e5e: 68cb ldr r3, [r1, #12] | |
10005e60: 49e4 ldr r1, [pc, #912] @ 0x100061f4 <$d.264+0x30> | |
10005e62: 2201 movs r2, #1 | |
10005e64: 4798 blx r3 | |
10005e66: bd80 pop {r7, pc} | |
10005e68: c903 ldm r1, {r0, r1} | |
10005e6a: 68cb ldr r3, [r1, #12] | |
10005e6c: 49e2 ldr r1, [pc, #904] @ 0x100061f8 <$d.264+0x34> | |
10005e6e: 2204 movs r2, #4 | |
10005e70: 4798 blx r3 | |
10005e72: bd80 pop {r7, pc} | |
10005e74: c903 ldm r1, {r0, r1} | |
10005e76: 68cb ldr r3, [r1, #12] | |
10005e78: 49e0 ldr r1, [pc, #896] @ 0x100061fc <$d.264+0x38> | |
10005e7a: 2204 movs r2, #4 | |
10005e7c: 4798 blx r3 | |
10005e7e: bd80 pop {r7, pc} | |
10005e80: c903 ldm r1, {r0, r1} | |
10005e82: 68cb ldr r3, [r1, #12] | |
10005e84: 49de ldr r1, [pc, #888] @ 0x10006200 <$d.264+0x3c> | |
10005e86: 2206 movs r2, #6 | |
10005e88: 4798 blx r3 | |
10005e8a: bd80 pop {r7, pc} | |
10005e8c: c903 ldm r1, {r0, r1} | |
10005e8e: 68cb ldr r3, [r1, #12] | |
10005e90: 49dc ldr r1, [pc, #880] @ 0x10006204 <$d.264+0x40> | |
10005e92: 2207 movs r2, #7 | |
10005e94: 4798 blx r3 | |
10005e96: bd80 pop {r7, pc} | |
10005e98: c903 ldm r1, {r0, r1} | |
10005e9a: 68cb ldr r3, [r1, #12] | |
10005e9c: 49da ldr r1, [pc, #872] @ 0x10006208 <$d.264+0x44> | |
10005e9e: 2207 movs r2, #7 | |
10005ea0: 4798 blx r3 | |
10005ea2: bd80 pop {r7, pc} | |
10005ea4: c903 ldm r1, {r0, r1} | |
10005ea6: 68cb ldr r3, [r1, #12] | |
10005ea8: 49d8 ldr r1, [pc, #864] @ 0x1000620c <$d.264+0x48> | |
10005eaa: 2207 movs r2, #7 | |
10005eac: 4798 blx r3 | |
10005eae: bd80 pop {r7, pc} | |
10005eb0: c903 ldm r1, {r0, r1} | |
10005eb2: 68cb ldr r3, [r1, #12] | |
10005eb4: 49d6 ldr r1, [pc, #856] @ 0x10006210 <$d.264+0x4c> | |
10005eb6: 2206 movs r2, #6 | |
10005eb8: 4798 blx r3 | |
10005eba: bd80 pop {r7, pc} | |
10005ebc: c903 ldm r1, {r0, r1} | |
10005ebe: 68cb ldr r3, [r1, #12] | |
10005ec0: 49d4 ldr r1, [pc, #848] @ 0x10006214 <$d.264+0x50> | |
10005ec2: 2201 movs r2, #1 | |
10005ec4: 4798 blx r3 | |
10005ec6: bd80 pop {r7, pc} | |
10005ec8: c903 ldm r1, {r0, r1} | |
10005eca: 68cb ldr r3, [r1, #12] | |
10005ecc: 49d2 ldr r1, [pc, #840] @ 0x10006218 <$d.264+0x54> | |
10005ece: 2201 movs r2, #1 | |
10005ed0: 4798 blx r3 | |
10005ed2: bd80 pop {r7, pc} | |
10005ed4: c903 ldm r1, {r0, r1} | |
10005ed6: 68cb ldr r3, [r1, #12] | |
10005ed8: 49fc ldr r1, [pc, #1008] @ 0x100062cc <$d.264+0x108> | |
10005eda: 2201 movs r2, #1 | |
10005edc: 4798 blx r3 | |
10005ede: bd80 pop {r7, pc} | |
10005ee0: c903 ldm r1, {r0, r1} | |
10005ee2: 68cb ldr r3, [r1, #12] | |
10005ee4: 49f8 ldr r1, [pc, #992] @ 0x100062c8 <$d.264+0x104> | |
10005ee6: 2201 movs r2, #1 | |
10005ee8: 4798 blx r3 | |
10005eea: bd80 pop {r7, pc} | |
10005eec: c903 ldm r1, {r0, r1} | |
10005eee: 68cb ldr r3, [r1, #12] | |
10005ef0: 49f4 ldr r1, [pc, #976] @ 0x100062c4 <$d.264+0x100> | |
10005ef2: 2201 movs r2, #1 | |
10005ef4: 4798 blx r3 | |
10005ef6: bd80 pop {r7, pc} | |
10005ef8: c903 ldm r1, {r0, r1} | |
10005efa: 68cb ldr r3, [r1, #12] | |
10005efc: 49f0 ldr r1, [pc, #960] @ 0x100062c0 <$d.264+0xfc> | |
10005efe: 2201 movs r2, #1 | |
10005f00: 4798 blx r3 | |
10005f02: bd80 pop {r7, pc} | |
10005f04: c903 ldm r1, {r0, r1} | |
10005f06: 68cb ldr r3, [r1, #12] | |
10005f08: 49ec ldr r1, [pc, #944] @ 0x100062bc <$d.264+0xf8> | |
10005f0a: 2201 movs r2, #1 | |
10005f0c: 4798 blx r3 | |
10005f0e: bd80 pop {r7, pc} | |
10005f10: c903 ldm r1, {r0, r1} | |
10005f12: 68cb ldr r3, [r1, #12] | |
10005f14: 49e8 ldr r1, [pc, #928] @ 0x100062b8 <$d.264+0xf4> | |
10005f16: 2208 movs r2, #8 | |
10005f18: 4798 blx r3 | |
10005f1a: bd80 pop {r7, pc} | |
10005f1c <$d.186>: | |
10005f1c: 30 7b 00 10 .word 0x10007b30 | |
10005f20 <$t.187>: | |
10005f20: c903 ldm r1, {r0, r1} | |
10005f22: 68cb ldr r3, [r1, #12] | |
10005f24: 49e3 ldr r1, [pc, #908] @ 0x100062b4 <$d.264+0xf0> | |
10005f26: 2209 movs r2, #9 | |
10005f28: 4798 blx r3 | |
10005f2a: bd80 pop {r7, pc} | |
10005f2c <$d.188>: | |
10005f2c: 2e 7b 00 10 .word 0x10007b2e | |
10005f30 <$t.189>: | |
10005f30: c903 ldm r1, {r0, r1} | |
10005f32: 68cb ldr r3, [r1, #12] | |
10005f34: 49de ldr r1, [pc, #888] @ 0x100062b0 <$d.264+0xec> | |
10005f36: 2204 movs r2, #4 | |
10005f38: 4798 blx r3 | |
10005f3a: bd80 pop {r7, pc} | |
10005f3c <$d.190>: | |
10005f3c: 2c 7b 00 10 .word 0x10007b2c | |
10005f40: 2a 7b 00 10 .word 0x10007b2a | |
10005f44 <$t.191>: | |
10005f44: c903 ldm r1, {r0, r1} | |
10005f46: 68cb ldr r3, [r1, #12] | |
10005f48: 49d8 ldr r1, [pc, #864] @ 0x100062ac <$d.264+0xe8> | |
10005f4a: 2206 movs r2, #6 | |
10005f4c: 4798 blx r3 | |
10005f4e: bd80 pop {r7, pc} | |
10005f50 <$d.192>: | |
10005f50: 28 7b 00 10 .word 0x10007b28 | |
10005f54 <$t.193>: | |
10005f54: c903 ldm r1, {r0, r1} | |
10005f56: 68cb ldr r3, [r1, #12] | |
10005f58: 49d3 ldr r1, [pc, #844] @ 0x100062a8 <$d.264+0xe4> | |
10005f5a: 2207 movs r2, #7 | |
10005f5c: 4798 blx r3 | |
10005f5e: bd80 pop {r7, pc} | |
10005f60 <$d.194>: | |
10005f60: 26 7b 00 10 .word 0x10007b26 | |
10005f64: 24 7b 00 10 .word 0x10007b24 | |
10005f68 <$t.195>: | |
10005f68: c903 ldm r1, {r0, r1} | |
10005f6a: 68cb ldr r3, [r1, #12] | |
10005f6c: 49cd ldr r1, [pc, #820] @ 0x100062a4 <$d.264+0xe0> | |
10005f6e: 2207 movs r2, #7 | |
10005f70: 4798 blx r3 | |
10005f72: bd80 pop {r7, pc} | |
10005f74 <$d.196>: | |
10005f74: 22 7b 00 10 .word 0x10007b22 | |
10005f78 <$t.197>: | |
10005f78: c903 ldm r1, {r0, r1} | |
10005f7a: 68cb ldr r3, [r1, #12] | |
10005f7c: 49c8 ldr r1, [pc, #800] @ 0x100062a0 <$d.264+0xdc> | |
10005f7e: 2207 movs r2, #7 | |
10005f80: 4798 blx r3 | |
10005f82: bd80 pop {r7, pc} | |
10005f84 <$d.198>: | |
10005f84: 20 7b 00 10 .word 0x10007b20 | |
10005f88: 1e 7b 00 10 .word 0x10007b1e | |
10005f8c <$t.199>: | |
10005f8c: c903 ldm r1, {r0, r1} | |
10005f8e: 68cb ldr r3, [r1, #12] | |
10005f90: 49c2 ldr r1, [pc, #776] @ 0x1000629c <$d.264+0xd8> | |
10005f92: 2207 movs r2, #7 | |
10005f94: 4798 blx r3 | |
10005f96: bd80 pop {r7, pc} | |
10005f98 <$d.200>: | |
10005f98: 1b 7b 00 10 .word 0x10007b1b | |
10005f9c <$t.201>: | |
10005f9c: c903 ldm r1, {r0, r1} | |
10005f9e: 68cb ldr r3, [r1, #12] | |
10005fa0: 49bd ldr r1, [pc, #756] @ 0x10006298 <$d.264+0xd4> | |
10005fa2: 220b movs r2, #11 | |
10005fa4: 4798 blx r3 | |
10005fa6: bd80 pop {r7, pc} | |
10005fa8 <$d.202>: | |
10005fa8: 18 7b 00 10 .word 0x10007b18 | |
10005fac: 15 7b 00 10 .word 0x10007b15 | |
10005fb0 <$t.203>: | |
10005fb0: c903 ldm r1, {r0, r1} | |
10005fb2: 68cb ldr r3, [r1, #12] | |
10005fb4: 49b7 ldr r1, [pc, #732] @ 0x10006294 <$d.264+0xd0> | |
10005fb6: 2208 movs r2, #8 | |
10005fb8: 4798 blx r3 | |
10005fba: bd80 pop {r7, pc} | |
10005fbc <$d.204>: | |
10005fbc: 0a 7b 00 10 .word 0x10007b0a | |
10005fc0 <$t.205>: | |
10005fc0: c903 ldm r1, {r0, r1} | |
10005fc2: 68cb ldr r3, [r1, #12] | |
10005fc4: 49b2 ldr r1, [pc, #712] @ 0x10006290 <$d.264+0xcc> | |
10005fc6: 2204 movs r2, #4 | |
10005fc8: 4798 blx r3 | |
10005fca: bd80 pop {r7, pc} | |
10005fcc <$d.206>: | |
10005fcc: 05 7b 00 10 .word 0x10007b05 | |
10005fd0: fb 7a 00 10 .word 0x10007afb | |
10005fd4 <$t.207>: | |
10005fd4: c903 ldm r1, {r0, r1} | |
10005fd6: 68cb ldr r3, [r1, #12] | |
10005fd8: 49ac ldr r1, [pc, #688] @ 0x1000628c <$d.264+0xc8> | |
10005fda: 2204 movs r2, #4 | |
10005fdc: 4798 blx r3 | |
10005fde: bd80 pop {r7, pc} | |
10005fe0 <$d.208>: | |
10005fe0: f1 7a 00 10 .word 0x10007af1 | |
10005fe4: 80 75 00 10 .word 0x10007580 | |
10005fe8 <$t.209>: | |
10005fe8: c903 ldm r1, {r0, r1} | |
10005fea: 68cb ldr r3, [r1, #12] | |
10005fec: 49a6 ldr r1, [pc, #664] @ 0x10006288 <$d.264+0xc4> | |
10005fee: 2208 movs r2, #8 | |
10005ff0: 4798 blx r3 | |
10005ff2: bd80 pop {r7, pc} | |
10005ff4 <$d.210>: | |
10005ff4: 88 75 00 10 .word 0x10007588 | |
10005ff8 <$t.211>: | |
10005ff8: c903 ldm r1, {r0, r1} | |
10005ffa: 68cb ldr r3, [r1, #12] | |
10005ffc: 49a1 ldr r1, [pc, #644] @ 0x10006284 <$d.264+0xc0> | |
10005ffe: 2206 movs r2, #6 | |
10006000: 4798 blx r3 | |
10006002: bd80 pop {r7, pc} | |
10006004 <$d.212>: | |
10006004: bc 75 00 10 .word 0x100075bc | |
10006008: 68 75 00 10 .word 0x10007568 | |
1000600c <$t.213>: | |
1000600c: c903 ldm r1, {r0, r1} | |
1000600e: 68cb ldr r3, [r1, #12] | |
10006010: 499b ldr r1, [pc, #620] @ 0x10006280 <$d.264+0xbc> | |
10006012: 2204 movs r2, #4 | |
10006014: 4798 blx r3 | |
10006016: bd80 pop {r7, pc} | |
10006018 <$d.214>: | |
10006018: ac 75 00 10 .word 0x100075ac | |
1000601c <$t.215>: | |
1000601c: c903 ldm r1, {r0, r1} | |
1000601e: 68cb ldr r3, [r1, #12] | |
10006020: 4996 ldr r1, [pc, #600] @ 0x1000627c <$d.264+0xb8> | |
10006022: 2204 movs r2, #4 | |
10006024: 4798 blx r3 | |
10006026: bd80 pop {r7, pc} | |
10006028 <$d.216>: | |
10006028: b4 75 00 10 .word 0x100075b4 | |
1000602c: 7c 75 00 10 .word 0x1000757c | |
10006030 <$t.217>: | |
10006030: c903 ldm r1, {r0, r1} | |
10006032: 68cb ldr r3, [r1, #12] | |
10006034: 4990 ldr r1, [pc, #576] @ 0x10006278 <$d.264+0xb4> | |
10006036: 2208 movs r2, #8 | |
10006038: 4798 blx r3 | |
1000603a: bd80 pop {r7, pc} | |
1000603c <$d.218>: | |
1000603c: 98 75 00 10 .word 0x10007598 | |
10006040 <$t.219>: | |
10006040: c903 ldm r1, {r0, r1} | |
10006042: 68cb ldr r3, [r1, #12] | |
10006044: 498b ldr r1, [pc, #556] @ 0x10006274 <$d.264+0xb0> | |
10006046: 2209 movs r2, #9 | |
10006048: 4798 blx r3 | |
1000604a: bd80 pop {r7, pc} | |
1000604c <$d.220>: | |
1000604c: a8 75 00 10 .word 0x100075a8 | |
10006050: 70 75 00 10 .word 0x10007570 | |
10006054 <$t.221>: | |
10006054: c903 ldm r1, {r0, r1} | |
10006056: 68cb ldr r3, [r1, #12] | |
10006058: 4985 ldr r1, [pc, #532] @ 0x10006270 <$d.264+0xac> | |
1000605a: 2209 movs r2, #9 | |
1000605c: 4798 blx r3 | |
1000605e: bd80 pop {r7, pc} | |
10006060 <$d.222>: | |
10006060: 94 75 00 10 .word 0x10007594 | |
10006064 <$t.223>: | |
10006064: c903 ldm r1, {r0, r1} | |
10006066: 68cb ldr r3, [r1, #12] | |
10006068: 4980 ldr r1, [pc, #512] @ 0x1000626c <$d.264+0xa8> | |
1000606a: 220a movs r2, #10 | |
1000606c: 4798 blx r3 | |
1000606e: bd80 pop {r7, pc} | |
10006070 <$d.224>: | |
10006070: 1e 79 00 10 .word 0x1000791e | |
10006074: ea 7a 00 10 .word 0x10007aea | |
10006078 <$t.225>: | |
10006078: c903 ldm r1, {r0, r1} | |
1000607a: 68cb ldr r3, [r1, #12] | |
1000607c: 497a ldr r1, [pc, #488] @ 0x10006268 <$d.264+0xa4> | |
1000607e: 2207 movs r2, #7 | |
10006080: 4798 blx r3 | |
10006082: bd80 pop {r7, pc} | |
10006084 <$d.226>: | |
10006084: e1 7a 00 10 .word 0x10007ae1 | |
10006088 <$t.227>: | |
10006088: c903 ldm r1, {r0, r1} | |
1000608a: 68cb ldr r3, [r1, #12] | |
1000608c: 4975 ldr r1, [pc, #468] @ 0x10006264 <$d.264+0xa0> | |
1000608e: 220c movs r2, #12 | |
10006090: 4798 blx r3 | |
10006092: bd80 pop {r7, pc} | |
10006094 <$d.228>: | |
10006094: db 7a 00 10 .word 0x10007adb | |
10006098: 54 75 00 10 .word 0x10007554 | |
1000609c <$t.229>: | |
1000609c: c903 ldm r1, {r0, r1} | |
1000609e: 68cb ldr r3, [r1, #12] | |
100060a0: 496f ldr r1, [pc, #444] @ 0x10006260 <$d.264+0x9c> | |
100060a2: 2204 movs r2, #4 | |
100060a4: 4798 blx r3 | |
100060a6: bd80 pop {r7, pc} | |
100060a8 <$d.230>: | |
100060a8: d5 7a 00 10 .word 0x10007ad5 | |
100060ac <$t.231>: | |
100060ac: c903 ldm r1, {r0, r1} | |
100060ae: 68cb ldr r3, [r1, #12] | |
100060b0: 496a ldr r1, [pc, #424] @ 0x1000625c <$d.264+0x98> | |
100060b2: e084 b 0x100061be <$t.263+0x6> @ imm = #264 | |
100060b4 <$d.232>: | |
100060b4: cb 7a 00 10 .word 0x10007acb | |
100060b8 <$t.233>: | |
100060b8: c903 ldm r1, {r0, r1} | |
100060ba: 68cb ldr r3, [r1, #12] | |
100060bc: 4966 ldr r1, [pc, #408] @ 0x10006258 <$d.264+0x94> | |
100060be: e07e b 0x100061be <$t.263+0x6> @ imm = #252 | |
100060c0 <$d.234>: | |
100060c0: bf 7a 00 10 .word 0x10007abf | |
100060c4 <$t.235>: | |
100060c4: c903 ldm r1, {r0, r1} | |
100060c6: 68cb ldr r3, [r1, #12] | |
100060c8: 4962 ldr r1, [pc, #392] @ 0x10006254 <$d.264+0x90> | |
100060ca: e078 b 0x100061be <$t.263+0x6> @ imm = #240 | |
100060cc <$d.236>: | |
100060cc: b1 7a 00 10 .word 0x10007ab1 | |
100060d0 <$t.237>: | |
100060d0: c903 ldm r1, {r0, r1} | |
100060d2: 68cb ldr r3, [r1, #12] | |
100060d4: 495e ldr r1, [pc, #376] @ 0x10006250 <$d.264+0x8c> | |
100060d6: e072 b 0x100061be <$t.263+0x6> @ imm = #228 | |
100060d8 <$d.238>: | |
100060d8: a3 7a 00 10 .word 0x10007aa3 | |
100060dc <$t.239>: | |
100060dc: c903 ldm r1, {r0, r1} | |
100060de: 68cb ldr r3, [r1, #12] | |
100060e0: 495a ldr r1, [pc, #360] @ 0x1000624c <$d.264+0x88> | |
100060e2: 2209 movs r2, #9 | |
100060e4: 4798 blx r3 | |
100060e6: bd80 pop {r7, pc} | |
100060e8 <$d.240>: | |
100060e8: a0 7a 00 10 .word 0x10007aa0 | |
100060ec: 9f 7a 00 10 .word 0x10007a9f | |
100060f0 <$t.241>: | |
100060f0: c903 ldm r1, {r0, r1} | |
100060f2: 68cb ldr r3, [r1, #12] | |
100060f4: 4954 ldr r1, [pc, #336] @ 0x10006248 <$d.264+0x84> | |
100060f6: 2209 movs r2, #9 | |
100060f8: 4798 blx r3 | |
100060fa: bd80 pop {r7, pc} | |
100060fc <$d.242>: | |
100060fc: 9e 7a 00 10 .word 0x10007a9e | |
10006100 <$t.243>: | |
10006100: c903 ldm r1, {r0, r1} | |
10006102: 68cb ldr r3, [r1, #12] | |
10006104: 494f ldr r1, [pc, #316] @ 0x10006244 <$d.264+0x80> | |
10006106: 2204 movs r2, #4 | |
10006108: 4798 blx r3 | |
1000610a: bd80 pop {r7, pc} | |
1000610c <$d.244>: | |
1000610c: 9d 7a 00 10 .word 0x10007a9d | |
10006110: 9c 7a 00 10 .word 0x10007a9c | |
10006114 <$t.245>: | |
10006114: c903 ldm r1, {r0, r1} | |
10006116: 68cb ldr r3, [r1, #12] | |
10006118: 4949 ldr r1, [pc, #292] @ 0x10006240 <$d.264+0x7c> | |
1000611a: 220a movs r2, #10 | |
1000611c: 4798 blx r3 | |
1000611e: bd80 pop {r7, pc} | |
10006120 <$d.246>: | |
10006120: 9b 7a 00 10 .word 0x10007a9b | |
10006124 <$t.247>: | |
10006124: c903 ldm r1, {r0, r1} | |
10006126: 68cb ldr r3, [r1, #12] | |
10006128: 4944 ldr r1, [pc, #272] @ 0x1000623c <$d.264+0x78> | |
1000612a: 2204 movs r2, #4 | |
1000612c: 4798 blx r3 | |
1000612e: bd80 pop {r7, pc} | |
10006130 <$d.248>: | |
10006130: 9a 7a 00 10 .word 0x10007a9a | |
10006134: 99 7a 00 10 .word 0x10007a99 | |
10006138 <$t.249>: | |
10006138: c903 ldm r1, {r0, r1} | |
1000613a: 68cb ldr r3, [r1, #12] | |
1000613c: 493e ldr r1, [pc, #248] @ 0x10006238 <$d.264+0x74> | |
1000613e: 2204 movs r2, #4 | |
10006140: 4798 blx r3 | |
10006142: bd80 pop {r7, pc} | |
10006144 <$d.250>: | |
10006144: 98 7a 00 10 .word 0x10007a98 | |
10006148 <$t.251>: | |
10006148: c903 ldm r1, {r0, r1} | |
1000614a: 68cb ldr r3, [r1, #12] | |
1000614c: 4939 ldr r1, [pc, #228] @ 0x10006234 <$d.264+0x70> | |
1000614e: 220a movs r2, #10 | |
10006150: 4798 blx r3 | |
10006152: bd80 pop {r7, pc} | |
10006154 <$d.252>: | |
10006154: 97 7a 00 10 .word 0x10007a97 | |
10006158: 96 7a 00 10 .word 0x10007a96 | |
1000615c <$t.253>: | |
1000615c: c903 ldm r1, {r0, r1} | |
1000615e: 68cb ldr r3, [r1, #12] | |
10006160: 4933 ldr r1, [pc, #204] @ 0x10006230 <$d.264+0x6c> | |
10006162: 2208 movs r2, #8 | |
10006164: 4798 blx r3 | |
10006166: bd80 pop {r7, pc} | |
10006168 <$d.254>: | |
10006168: 5c 75 00 10 .word 0x1000755c | |
1000616c <$t.255>: | |
1000616c: c903 ldm r1, {r0, r1} | |
1000616e: 68cb ldr r3, [r1, #12] | |
10006170: 492e ldr r1, [pc, #184] @ 0x1000622c <$d.264+0x68> | |
10006172: 2207 movs r2, #7 | |
10006174: 4798 blx r3 | |
10006176: bd80 pop {r7, pc} | |
10006178 <$d.256>: | |
10006178: 58 75 00 10 .word 0x10007558 | |
1000617c: 74 75 00 10 .word 0x10007574 | |
10006180 <$t.257>: | |
10006180: c903 ldm r1, {r0, r1} | |
10006182: 68cb ldr r3, [r1, #12] | |
10006184: 4928 ldr r1, [pc, #160] @ 0x10006228 <$d.264+0x64> | |
10006186: 220d movs r2, #13 | |
10006188: 4798 blx r3 | |
1000618a: bd80 pop {r7, pc} | |
1000618c <$d.258>: | |
1000618c: 6c 75 00 10 .word 0x1000756c | |
10006190 <$t.259>: | |
10006190: c903 ldm r1, {r0, r1} | |
10006192: 68cb ldr r3, [r1, #12] | |
10006194: 4923 ldr r1, [pc, #140] @ 0x10006224 <$d.264+0x60> | |
10006196: 220b movs r2, #11 | |
10006198: 4798 blx r3 | |
1000619a: bd80 pop {r7, pc} | |
1000619c <$d.260>: | |
1000619c: 90 7a 00 10 .word 0x10007a90 | |
100061a0: 8d 7a 00 10 .word 0x10007a8d | |
100061a4 <$t.261>: | |
100061a4: c903 ldm r1, {r0, r1} | |
100061a6: 68cb ldr r3, [r1, #12] | |
100061a8: 491d ldr r1, [pc, #116] @ 0x10006220 <$d.264+0x5c> | |
100061aa: 2209 movs r2, #9 | |
100061ac: 4798 blx r3 | |
100061ae: bd80 pop {r7, pc} | |
100061b0 <$d.262>: | |
100061b0: 36 79 00 10 .word 0x10007936 | |
100061b4: 86 7a 00 10 .word 0x10007a86 | |
100061b8 <$t.263>: | |
100061b8: c903 ldm r1, {r0, r1} | |
100061ba: 68cb ldr r3, [r1, #12] | |
100061bc: 4917 ldr r1, [pc, #92] @ 0x1000621c <$d.264+0x58> | |
100061be: 2205 movs r2, #5 | |
100061c0: 4798 blx r3 | |
100061c2: bd80 pop {r7, pc} | |
100061c4 <$d.264>: | |
100061c4: 7f 7a 00 10 .word 0x10007a7f | |
100061c8: 78 7a 00 10 .word 0x10007a78 | |
100061cc: 6f 7a 00 10 .word 0x10007a6f | |
100061d0: 16 79 00 10 .word 0x10007916 | |
100061d4: 6e 7a 00 10 .word 0x10007a6e | |
100061d8: 6d 7a 00 10 .word 0x10007a6d | |
100061dc: 6c 7a 00 10 .word 0x10007a6c | |
100061e0: 6b 7a 00 10 .word 0x10007a6b | |
100061e4: 6a 7a 00 10 .word 0x10007a6a | |
100061e8: 69 7a 00 10 .word 0x10007a69 | |
100061ec: 68 7a 00 10 .word 0x10007a68 | |
100061f0: 67 7a 00 10 .word 0x10007a67 | |
100061f4: 66 7a 00 10 .word 0x10007a66 | |
100061f8: 90 75 00 10 .word 0x10007590 | |
100061fc: b8 75 00 10 .word 0x100075b8 | |
10006200: 60 7a 00 10 .word 0x10007a60 | |
10006204: 59 7a 00 10 .word 0x10007a59 | |
10006208: 52 7a 00 10 .word 0x10007a52 | |
1000620c: 4b 7a 00 10 .word 0x10007a4b | |
10006210: 45 7a 00 10 .word 0x10007a45 | |
10006214: 44 7a 00 10 .word 0x10007a44 | |
10006218: 43 7a 00 10 .word 0x10007a43 | |
1000621c: 6c 79 00 10 .word 0x1000796c | |
10006220: 71 79 00 10 .word 0x10007971 | |
10006224: 7a 79 00 10 .word 0x1000797a | |
10006228: 85 79 00 10 .word 0x10007985 | |
1000622c: 92 79 00 10 .word 0x10007992 | |
10006230: 46 79 00 10 .word 0x10007946 | |
10006234: 99 79 00 10 .word 0x10007999 | |
10006238: 84 75 00 10 .word 0x10007584 | |
1000623c: a4 75 00 10 .word 0x100075a4 | |
10006240: a3 79 00 10 .word 0x100079a3 | |
10006244: 78 75 00 10 .word 0x10007578 | |
10006248: ad 79 00 10 .word 0x100079ad | |
1000624c: b6 79 00 10 .word 0x100079b6 | |
10006250: bf 79 00 10 .word 0x100079bf | |
10006254: c4 79 00 10 .word 0x100079c4 | |
10006258: c9 79 00 10 .word 0x100079c9 | |
1000625c: ce 79 00 10 .word 0x100079ce | |
10006260: 64 75 00 10 .word 0x10007564 | |
10006264: d3 79 00 10 .word 0x100079d3 | |
10006268: df 79 00 10 .word 0x100079df | |
1000626c: e6 79 00 10 .word 0x100079e6 | |
10006270: f0 79 00 10 .word 0x100079f0 | |
10006274: f9 79 00 10 .word 0x100079f9 | |
10006278: 26 79 00 10 .word 0x10007926 | |
1000627c: 50 75 00 10 .word 0x10007550 | |
10006280: 8c 75 00 10 .word 0x1000758c | |
10006284: 02 7a 00 10 .word 0x10007a02 | |
10006288: 2e 79 00 10 .word 0x1000792e | |
1000628c: 9c 75 00 10 .word 0x1000759c | |
10006290: b0 75 00 10 .word 0x100075b0 | |
10006294: 3e 79 00 10 .word 0x1000793e | |
10006298: 08 7a 00 10 .word 0x10007a08 | |
1000629c: 13 7a 00 10 .word 0x10007a13 | |
100062a0: 1a 7a 00 10 .word 0x10007a1a | |
100062a4: 21 7a 00 10 .word 0x10007a21 | |
100062a8: 28 7a 00 10 .word 0x10007a28 | |
100062ac: 2f 7a 00 10 .word 0x10007a2f | |
100062b0: a0 75 00 10 .word 0x100075a0 | |
100062b4: 35 7a 00 10 .word 0x10007a35 | |
100062b8: 06 79 00 10 .word 0x10007906 | |
100062bc: 3e 7a 00 10 .word 0x10007a3e | |
100062c0: 3f 7a 00 10 .word 0x10007a3f | |
100062c4: 40 7a 00 10 .word 0x10007a40 | |
100062c8: 41 7a 00 10 .word 0x10007a41 | |
100062cc: 42 7a 00 10 .word 0x10007a42 | |
100062d0 <rust_begin_unwind>: | |
; fn panic(info: &PanicInfo) -> ! { | |
100062d0: b580 push {r7, lr} | |
100062d2: af00 add r7, sp, #0 | |
; $func($($args),*) | |
100062d4: f000 fb98 bl 0x10006a08 <__cpsid> @ imm = #1840 | |
100062d8: 4805 ldr r0, [pc, #20] @ 0x100062f0 <$d.266> | |
100062da: 7801 ldrb r1, [r0] | |
; if PANICKED.load(Ordering::Relaxed) { | |
100062dc: 2900 cmp r1, #0 | |
100062de: d002 beq 0x100062e6 <rust_begin_unwind+0x16> @ imm = #4 | |
; $func($($args),*) | |
100062e0: f000 fb90 bl 0x10006a04 <__bkpt> @ imm = #1824 | |
; loop { | |
100062e4: e7fc b 0x100062e0 <rust_begin_unwind+0x10> @ imm = #-8 | |
100062e6: 2101 movs r1, #1 | |
100062e8: 7001 strb r1, [r0] | |
; asm::udf(); | |
100062ea: f000 f803 bl 0x100062f4 <cortex_m::asm::udf> @ imm = #6 | |
100062ee: defe trap | |
100062f0 <$d.266>: | |
100062f0: 0c ed 03 20 .word 0x2003ed0c | |
100062f4 <cortex_m::asm::udf>: | |
; pub fn udf() -> ! { | |
100062f4: b580 push {r7, lr} | |
100062f6: af00 add r7, sp, #0 | |
; call_asm!(__udf() -> !) | |
100062f8: f000 fb96 bl 0x10006a28 <__udf> @ imm = #1836 | |
100062fc: defe trap | |
100062fe: d4d4 bmi 0x100062aa <$d.264+0xe6> @ imm = #-88 | |
10006300 <pc_keyboard::scancodes::set2::ScancodeSet2::map_scancode>: | |
; fn map_scancode(code: u8) -> Result<KeyCode, Error> { | |
10006300: b2c2 uxtb r2, r0 | |
10006302: 2001 movs r0, #1 | |
10006304: 2103 movs r1, #3 | |
; match code { | |
10006306: 2aaa cmp r2, #170 | |
10006308: d900 bls 0x1000630c <pc_keyboard::scancodes::set2::ScancodeSet2::map_scancode+0xc> @ imm = #0 | |
1000630a: e1c8 b 0x1000669e <$t.270+0x230> @ imm = #912 | |
1000630c: 0052 lsls r2, r2, #1 | |
1000630e: 46c0 mov r8, r8 | |
10006310: 447a add r2, pc | |
10006312: 8892 ldrh r2, [r2, #4] | |
10006314: 0052 lsls r2, r2, #1 | |
10006316: 4497 add pc, r2 | |
10006318 <$d.269>: | |
10006318: aa 00 ad 00 .word 0x00ad00aa | |
1000631c: c2 01 b0 00 .word 0x00b001c2 | |
10006320: b3 00 b5 00 .word 0x00b500b3 | |
10006324: b8 00 bb 00 .word 0x00bb00b8 | |
10006328: c2 01 be 00 .word 0x00be01c2 | |
1000632c: c1 00 c4 00 .word 0x00c400c1 | |
10006330: c7 00 ca 00 .word 0x00ca00c7 | |
10006334: cd 00 c2 01 .word 0x01c200cd | |
10006338: c2 01 d0 00 .word 0x00d001c2 | |
1000633c: d3 00 d6 00 .word 0x00d600d3 | |
10006340: d9 00 dc 00 .word 0x00dc00d9 | |
10006344: df 00 c2 01 .word 0x01c200df | |
10006348: c2 01 c2 01 .word 0x01c201c2 | |
1000634c: e2 00 e5 00 .word 0x00e500e2 | |
10006350: e8 00 eb 00 .word 0x00eb00e8 | |
10006354: ee 00 c2 01 .word 0x01c200ee | |
10006358: c2 01 f1 00 .word 0x00f101c2 | |
1000635c: f4 00 f7 00 .word 0x00f700f4 | |
10006360: fa 00 fd 00 .word 0x00fd00fa | |
10006364: 00 01 c2 01 .word 0x01c20100 | |
10006368: c2 01 03 01 .word 0x010301c2 | |
1000636c: 06 01 09 01 .word 0x01090106 | |
10006370: 0c 01 0f 01 .word 0x010f010c | |
10006374: 12 01 c2 01 .word 0x01c20112 | |
10006378: c2 01 15 01 .word 0x011501c2 | |
1000637c: 18 01 1b 01 .word 0x011b0118 | |
10006380: 1e 01 21 01 .word 0x0121011e | |
10006384: 24 01 c2 01 .word 0x01c20124 | |
10006388: c2 01 c2 01 .word 0x01c201c2 | |
1000638c: 27 01 2a 01 .word 0x012a0127 | |
10006390: 2d 01 30 01 .word 0x0130012d | |
10006394: 33 01 c2 01 .word 0x01c20133 | |
10006398: c2 01 36 01 .word 0x013601c2 | |
1000639c: 39 01 3c 01 .word 0x013c0139 | |
100063a0: 3f 01 42 01 .word 0x0142013f | |
100063a4: 45 01 c2 01 .word 0x01c20145 | |
100063a8: c2 01 48 01 .word 0x014801c2 | |
100063ac: 4b 01 4e 01 .word 0x014e014b | |
100063b0: 51 01 54 01 .word 0x01540151 | |
100063b4: 57 01 c2 01 .word 0x01c20157 | |
100063b8: c2 01 5a 01 .word 0x015a01c2 | |
100063bc: 5d 01 c2 01 .word 0x01c2015d | |
100063c0: 60 01 63 01 .word 0x01630160 | |
100063c4: c2 01 c2 01 .word 0x01c201c2 | |
100063c8: 66 01 69 01 .word 0x01690166 | |
100063cc: 6c 01 6f 01 .word 0x016f016c | |
100063d0: c2 01 72 01 .word 0x017201c2 | |
100063d4: c2 01 c2 01 .word 0x01c201c2 | |
100063d8: c2 01 75 01 .word 0x017501c2 | |
100063dc: c2 01 c2 01 .word 0x01c201c2 | |
100063e0: 78 01 c2 01 .word 0x01c20178 | |
100063e4: 7b 01 7e 01 .word 0x017e017b | |
100063e8: c2 01 81 01 .word 0x018101c2 | |
100063ec: 84 01 87 01 .word 0x01870184 | |
100063f0: 8a 01 c2 01 .word 0x01c2018a | |
100063f4: c2 01 c2 01 .word 0x01c201c2 | |
100063f8: 8d 01 90 01 .word 0x0190018d | |
100063fc: 93 01 96 01 .word 0x01960193 | |
10006400: 99 01 9c 01 .word 0x019c0199 | |
10006404: 9f 01 a2 01 .word 0x01a2019f | |
10006408: a5 01 a8 01 .word 0x01a801a5 | |
1000640c: ab 01 ae 01 .word 0x01ae01ab | |
10006410: b1 01 b4 01 .word 0x01b401b1 | |
10006414: b7 01 ba 01 .word 0x01ba01b7 | |
10006418: c2 01 c2 01 .word 0x01c201c2 | |
1000641c: c2 01 bd 01 .word 0x01bd01c2 | |
10006420: c2 01 c2 01 .word 0x01c201c2 | |
10006424: c2 01 c2 01 .word 0x01c201c2 | |
10006428: c2 01 c2 01 .word 0x01c201c2 | |
1000642c: c2 01 c2 01 .word 0x01c201c2 | |
10006430: c2 01 c2 01 .word 0x01c201c2 | |
10006434: c2 01 c2 01 .word 0x01c201c2 | |
10006438: c2 01 c2 01 .word 0x01c201c2 | |
1000643c: c2 01 c2 01 .word 0x01c201c2 | |
10006440: c2 01 c2 01 .word 0x01c201c2 | |
10006444: c2 01 c2 01 .word 0x01c201c2 | |
10006448: c2 01 c2 01 .word 0x01c201c2 | |
1000644c: c2 01 c2 01 .word 0x01c201c2 | |
10006450: c2 01 c2 01 .word 0x01c201c2 | |
10006454: c2 01 c2 01 .word 0x01c201c2 | |
10006458: c2 01 c2 01 .word 0x01c201c2 | |
1000645c: c2 01 c2 01 .word 0x01c201c2 | |
10006460: c2 01 c2 01 .word 0x01c201c2 | |
10006464: c2 01 c2 01 .word 0x01c201c2 | |
10006468: c2 01 c2 01 .word 0x01c201c2 | |
1000646c: c0 01 .short 0x01c0 | |
1000646e <$t.270>: | |
1000646e: 2000 movs r0, #0 | |
10006470: 2179 movs r1, #121 | |
; } | |
10006472: 4770 bx lr | |
10006474: 2000 movs r0, #0 | |
10006476: 2109 movs r1, #9 | |
; } | |
10006478: 4770 bx lr | |
1000647a: 2000 movs r0, #0 | |
1000647c: 2105 movs r1, #5 | |
; } | |
1000647e: 4770 bx lr | |
10006480: 2000 movs r0, #0 | |
; } | |
10006482: 4770 bx lr | |
10006484: 2000 movs r0, #0 | |
10006486: 2101 movs r1, #1 | |
; } | |
10006488: 4770 bx lr | |
1000648a: 2000 movs r0, #0 | |
1000648c: 2102 movs r1, #2 | |
; } | |
1000648e: 4770 bx lr | |
10006490: 2000 movs r0, #0 | |
10006492: 210c movs r1, #12 | |
; } | |
10006494: 4770 bx lr | |
10006496: 2000 movs r0, #0 | |
10006498: 210a movs r1, #10 | |
; } | |
1000649a: 4770 bx lr | |
1000649c: 2000 movs r0, #0 | |
1000649e: 2108 movs r1, #8 | |
; } | |
100064a0: 4770 bx lr | |
100064a2: 2000 movs r0, #0 | |
100064a4: 2106 movs r1, #6 | |
; } | |
100064a6: 4770 bx lr | |
100064a8: 2000 movs r0, #0 | |
100064aa: 2104 movs r1, #4 | |
; } | |
100064ac: 4770 bx lr | |
100064ae: 2000 movs r0, #0 | |
100064b0: 2126 movs r1, #38 | |
; } | |
100064b2: 4770 bx lr | |
100064b4: 2000 movs r0, #0 | |
100064b6: 2111 movs r1, #17 | |
; } | |
100064b8: 4770 bx lr | |
100064ba: 2000 movs r0, #0 | |
100064bc: 215f movs r1, #95 | |
; } | |
100064be: 4770 bx lr | |
100064c0: 2000 movs r0, #0 | |
100064c2: 214c movs r1, #76 | |
; } | |
100064c4: 4770 bx lr | |
100064c6: 2000 movs r0, #0 | |
100064c8: 216c movs r1, #108 | |
; } | |
100064ca: 4770 bx lr | |
100064cc: 2000 movs r0, #0 | |
100064ce: 215d movs r1, #93 | |
; } | |
100064d0: 4770 bx lr | |
100064d2: 2000 movs r0, #0 | |
100064d4: 2127 movs r1, #39 | |
; } | |
100064d6: 4770 bx lr | |
100064d8: 2000 movs r0, #0 | |
100064da: 2112 movs r1, #18 | |
; } | |
100064dc: 4770 bx lr | |
100064de: 2000 movs r0, #0 | |
100064e0: 214d movs r1, #77 | |
; } | |
100064e2: 4770 bx lr | |
100064e4: 2000 movs r0, #0 | |
100064e6: 213e movs r1, #62 | |
; } | |
100064e8: 4770 bx lr | |
100064ea: 2000 movs r0, #0 | |
100064ec: 213d movs r1, #61 | |
; } | |
100064ee: 4770 bx lr | |
100064f0: 2000 movs r0, #0 | |
100064f2: 2128 movs r1, #40 | |
; } | |
100064f4: 4770 bx lr | |
100064f6: 2000 movs r0, #0 | |
100064f8: 2113 movs r1, #19 | |
; } | |
100064fa: 4770 bx lr | |
100064fc: 2000 movs r0, #0 | |
100064fe: 214f movs r1, #79 | |
; } | |
10006500: 4770 bx lr | |
10006502: 2000 movs r0, #0 | |
10006504: 214e movs r1, #78 | |
; } | |
10006506: 4770 bx lr | |
10006508: 2000 movs r0, #0 | |
1000650a: 213f movs r1, #63 | |
; } | |
1000650c: 4770 bx lr | |
1000650e: 2000 movs r0, #0 | |
10006510: 2129 movs r1, #41 | |
; } | |
10006512: 4770 bx lr | |
10006514: 2000 movs r0, #0 | |
10006516: 2115 movs r1, #21 | |
; } | |
10006518: 4770 bx lr | |
1000651a: 2000 movs r0, #0 | |
1000651c: 2114 movs r1, #20 | |
; } | |
1000651e: 4770 bx lr | |
10006520: 2000 movs r0, #0 | |
10006522: 2160 movs r1, #96 | |
; } | |
10006524: 4770 bx lr | |
10006526: 2000 movs r0, #0 | |
10006528: 2150 movs r1, #80 | |
; } | |
1000652a: 4770 bx lr | |
1000652c: 2000 movs r0, #0 | |
1000652e: 2140 movs r1, #64 | |
; } | |
10006530: 4770 bx lr | |
10006532: 2000 movs r0, #0 | |
10006534: 212b movs r1, #43 | |
; } | |
10006536: 4770 bx lr | |
10006538: 2000 movs r0, #0 | |
1000653a: 212a movs r1, #42 | |
; } | |
1000653c: 4770 bx lr | |
1000653e: 2000 movs r0, #0 | |
10006540: 2116 movs r1, #22 | |
; } | |
10006542: 4770 bx lr | |
10006544: 2000 movs r0, #0 | |
10006546: 2152 movs r1, #82 | |
; } | |
10006548: 4770 bx lr | |
1000654a: 2000 movs r0, #0 | |
1000654c: 2151 movs r1, #81 | |
; } | |
1000654e: 4770 bx lr | |
10006550: 2000 movs r0, #0 | |
10006552: 2142 movs r1, #66 | |
; } | |
10006554: 4770 bx lr | |
10006556: 2000 movs r0, #0 | |
10006558: 2141 movs r1, #65 | |
; } | |
1000655a: 4770 bx lr | |
1000655c: 2000 movs r0, #0 | |
1000655e: 212c movs r1, #44 | |
; } | |
10006560: 4770 bx lr | |
10006562: 2000 movs r0, #0 | |
10006564: 2117 movs r1, #23 | |
; } | |
10006566: 4770 bx lr | |
10006568: 2000 movs r0, #0 | |
1000656a: 2153 movs r1, #83 | |
; } | |
1000656c: 4770 bx lr | |
1000656e: 2000 movs r0, #0 | |
10006570: 2143 movs r1, #67 | |
; } | |
10006572: 4770 bx lr | |
10006574: 2000 movs r0, #0 | |
10006576: 212d movs r1, #45 | |
; } | |
10006578: 4770 bx lr | |
1000657a: 2000 movs r0, #0 | |
1000657c: 2118 movs r1, #24 | |
; } | |
1000657e: 4770 bx lr | |
10006580: 2000 movs r0, #0 | |
10006582: 2119 movs r1, #25 | |
; } | |
10006584: 4770 bx lr | |
10006586: 2000 movs r0, #0 | |
10006588: 2154 movs r1, #84 | |
; } | |
1000658a: 4770 bx lr | |
1000658c: 2000 movs r0, #0 | |
1000658e: 2144 movs r1, #68 | |
; } | |
10006590: 4770 bx lr | |
10006592: 2000 movs r0, #0 | |
10006594: 212e movs r1, #46 | |
; } | |
10006596: 4770 bx lr | |
10006598: 2000 movs r0, #0 | |
1000659a: 212f movs r1, #47 | |
; } | |
1000659c: 4770 bx lr | |
1000659e: 2000 movs r0, #0 | |
100065a0: 211b movs r1, #27 | |
; } | |
100065a2: 4770 bx lr | |
100065a4: 2000 movs r0, #0 | |
100065a6: 211a movs r1, #26 | |
; } | |
100065a8: 4770 bx lr | |
100065aa: 2000 movs r0, #0 | |
100065ac: 2155 movs r1, #85 | |
; } | |
100065ae: 4770 bx lr | |
100065b0: 2000 movs r0, #0 | |
100065b2: 2156 movs r1, #86 | |
; } | |
100065b4: 4770 bx lr | |
100065b6: 2000 movs r0, #0 | |
100065b8: 2145 movs r1, #69 | |
; } | |
100065ba: 4770 bx lr | |
100065bc: 2000 movs r0, #0 | |
100065be: 2146 movs r1, #70 | |
; } | |
100065c0: 4770 bx lr | |
100065c2: 2000 movs r0, #0 | |
100065c4: 2130 movs r1, #48 | |
; } | |
100065c6: 4770 bx lr | |
100065c8: 2000 movs r0, #0 | |
100065ca: 211c movs r1, #28 | |
; } | |
100065cc: 4770 bx lr | |
100065ce: 2000 movs r0, #0 | |
100065d0: 216d movs r1, #109 | |
; } | |
100065d2: 4770 bx lr | |
100065d4: 2000 movs r0, #0 | |
100065d6: 2147 movs r1, #71 | |
; } | |
100065d8: 4770 bx lr | |
100065da: 2000 movs r0, #0 | |
100065dc: 2131 movs r1, #49 | |
; } | |
100065de: 4770 bx lr | |
100065e0: 2000 movs r0, #0 | |
100065e2: 211d movs r1, #29 | |
; } | |
100065e4: 4770 bx lr | |
100065e6: 2000 movs r0, #0 | |
100065e8: 213c movs r1, #60 | |
; } | |
100065ea: 4770 bx lr | |
100065ec: 2000 movs r0, #0 | |
100065ee: 2157 movs r1, #87 | |
; } | |
100065f0: 4770 bx lr | |
100065f2: 2000 movs r0, #0 | |
100065f4: 2148 movs r1, #72 | |
; } | |
100065f6: 4770 bx lr | |
100065f8: 2000 movs r0, #0 | |
100065fa: 2132 movs r1, #50 | |
; } | |
100065fc: 4770 bx lr | |
100065fe: 2000 movs r0, #0 | |
10006600: 2134 movs r1, #52 | |
; } | |
10006602: 4770 bx lr | |
10006604: 2000 movs r0, #0 | |
10006606: 2133 movs r1, #51 | |
; } | |
10006608: 4770 bx lr | |
1000660a: 2000 movs r0, #0 | |
1000660c: 216b movs r1, #107 | |
; } | |
1000660e: 4770 bx lr | |
10006610: 2000 movs r0, #0 | |
10006612: 211e movs r1, #30 | |
; } | |
10006614: 4770 bx lr | |
10006616: 2000 movs r0, #0 | |
10006618: 216a movs r1, #106 | |
; } | |
1000661a: 4770 bx lr | |
1000661c: 2000 movs r0, #0 | |
1000661e: 2159 movs r1, #89 | |
; } | |
10006620: 4770 bx lr | |
10006622: 2000 movs r0, #0 | |
10006624: 216e movs r1, #110 | |
; } | |
10006626: 4770 bx lr | |
10006628: 2000 movs r0, #0 | |
1000662a: 2149 movs r1, #73 | |
; } | |
1000662c: 4770 bx lr | |
1000662e: 2000 movs r0, #0 | |
10006630: 2138 movs r1, #56 | |
; } | |
10006632: 4770 bx lr | |
10006634: 2000 movs r0, #0 | |
10006636: 2168 movs r1, #104 | |
; } | |
10006638: 4770 bx lr | |
1000663a: 2000 movs r0, #0 | |
1000663c: 2169 movs r1, #105 | |
; } | |
1000663e: 4770 bx lr | |
10006640: 2000 movs r0, #0 | |
10006642: 215a movs r1, #90 | |
; } | |
10006644: 4770 bx lr | |
10006646: 2000 movs r0, #0 | |
10006648: 214a movs r1, #74 | |
; } | |
1000664a: 4770 bx lr | |
1000664c: 2000 movs r0, #0 | |
1000664e: 214b movs r1, #75 | |
; } | |
10006650: 4770 bx lr | |
10006652: 2000 movs r0, #0 | |
10006654: 2139 movs r1, #57 | |
; } | |
10006656: 4770 bx lr | |
10006658: 2100 movs r1, #0 | |
1000665a: 4608 mov r0, r1 | |
; } | |
1000665c: 4770 bx lr | |
1000665e: 2000 movs r0, #0 | |
10006660: 2122 movs r1, #34 | |
; } | |
10006662: 4770 bx lr | |
10006664: 2000 movs r0, #0 | |
10006666: 210b movs r1, #11 | |
; } | |
10006668: 4770 bx lr | |
1000666a: 2000 movs r0, #0 | |
1000666c: 213b movs r1, #59 | |
; } | |
1000666e: 4770 bx lr | |
10006670: 2000 movs r0, #0 | |
10006672: 215b movs r1, #91 | |
; } | |
10006674: 4770 bx lr | |
10006676: 2000 movs r0, #0 | |
10006678: 2125 movs r1, #37 | |
; } | |
1000667a: 4770 bx lr | |
1000667c: 2000 movs r0, #0 | |
1000667e: 2124 movs r1, #36 | |
; } | |
10006680: 4770 bx lr | |
10006682: 2000 movs r0, #0 | |
10006684: 213a movs r1, #58 | |
; } | |
10006686: 4770 bx lr | |
10006688: 2000 movs r0, #0 | |
1000668a: 210f movs r1, #15 | |
; } | |
1000668c: 4770 bx lr | |
1000668e: 2000 movs r0, #0 | |
10006690: 210e movs r1, #14 | |
; } | |
10006692: 4770 bx lr | |
10006694: 2000 movs r0, #0 | |
10006696: 2107 movs r1, #7 | |
; } | |
10006698: 4770 bx lr | |
1000669a: 2000 movs r0, #0 | |
1000669c: 2178 movs r1, #120 | |
; } | |
1000669e: 4770 bx lr | |
100066a0 <pc_keyboard::scancodes::set2::ScancodeSet2::map_extended_scancode>: | |
; match code { | |
100066a0: b2c2 uxtb r2, r0 | |
100066a2: 3a11 subs r2, #17 | |
100066a4: 2001 movs r0, #1 | |
100066a6: 2103 movs r1, #3 | |
; match code { | |
100066a8: 2a6c cmp r2, #108 | |
100066aa: d900 bls 0x100066ae <pc_keyboard::scancodes::set2::ScancodeSet2::map_extended_scancode+0xe> @ imm = #0 | |
100066ac: e0c4 b 0x10006838 <$t.273+0xa6> @ imm = #392 | |
100066ae: 0052 lsls r2, r2, #1 | |
100066b0: 447a add r2, pc | |
100066b2: 8892 ldrh r2, [r2, #4] | |
100066b4: 0052 lsls r2, r2, #1 | |
100066b6: 4497 add pc, r2 | |
100066b8 <$d.272>: | |
100066b8: 6c 00 6f 00 .word 0x006f006c | |
100066bc: bf 00 72 00 .word 0x007200bf | |
100066c0: 75 00 bf 00 .word 0x00bf0075 | |
100066c4: bf 00 bf 00 .word 0x00bf00bf | |
100066c8: bf 00 bf 00 .word 0x00bf00bf | |
100066cc: bf 00 bf 00 .word 0x00bf00bf | |
100066d0: bf 00 bf 00 .word 0x00bf00bf | |
100066d4: 78 00 bf 00 .word 0x00bf0078 | |
100066d8: 7b 00 bf 00 .word 0x00bf007b | |
100066dc: 7e 00 bf 00 .word 0x00bf007e | |
100066e0: bf 00 bf 00 .word 0x00bf00bf | |
100066e4: 81 00 bf 00 .word 0x00bf0081 | |
100066e8: bf 00 bf 00 .word 0x00bf00bf | |
100066ec: 84 00 bf 00 .word 0x00bf0084 | |
100066f0: bf 00 bf 00 .word 0x00bf00bf | |
100066f4: 87 00 bf 00 .word 0x00bf0087 | |
100066f8: bf 00 8a 00 .word 0x008a00bf | |
100066fc: bf 00 8d 00 .word 0x008d00bf | |
10006700: bf 00 bf 00 .word 0x00bf00bf | |
10006704: bf 00 bf 00 .word 0x00bf00bf | |
10006708: bf 00 90 00 .word 0x009000bf | |
1000670c: 93 00 bf 00 .word 0x00bf0093 | |
10006710: bf 00 bf 00 .word 0x00bf00bf | |
10006714: bf 00 bf 00 .word 0x00bf00bf | |
10006718: bf 00 bf 00 .word 0x00bf00bf | |
1000671c: bf 00 bf 00 .word 0x00bf00bf | |
10006720: bf 00 bf 00 .word 0x00bf00bf | |
10006724: bf 00 bf 00 .word 0x00bf00bf | |
10006728: bf 00 96 00 .word 0x009600bf | |
1000672c: bf 00 bf 00 .word 0x00bf00bf | |
10006730: 99 00 bf 00 .word 0x00bf0099 | |
10006734: bf 00 bf 00 .word 0x00bf00bf | |
10006738: bf 00 bf 00 .word 0x00bf00bf | |
1000673c: bf 00 bf 00 .word 0x00bf00bf | |
10006740: bf 00 bf 00 .word 0x00bf00bf | |
10006744: bf 00 bf 00 .word 0x00bf00bf | |
10006748: bf 00 9c 00 .word 0x009c00bf | |
1000674c: bf 00 bf 00 .word 0x00bf00bf | |
10006750: bf 00 bf 00 .word 0x00bf00bf | |
10006754: bf 00 bf 00 .word 0x00bf00bf | |
10006758: bf 00 bf 00 .word 0x00bf00bf | |
1000675c: bf 00 bf 00 .word 0x00bf00bf | |
10006760: bf 00 bf 00 .word 0x00bf00bf | |
10006764: bf 00 bf 00 .word 0x00bf00bf | |
10006768: 9f 00 bf 00 .word 0x00bf009f | |
1000676c: a2 00 a5 00 .word 0x00a500a2 | |
10006770: bf 00 bf 00 .word 0x00bf00bf | |
10006774: bf 00 a8 00 .word 0x00a800bf | |
10006778: ab 00 ae 00 .word 0x00ae00ab | |
1000677c: bf 00 b1 00 .word 0x00b100bf | |
10006780: b4 00 bf 00 .word 0x00bf00b4 | |
10006784: bf 00 bf 00 .word 0x00bf00bf | |
10006788: bf 00 b7 00 .word 0x00b700bf | |
1000678c: bf 00 ba 00 .word 0x00ba00bf | |
10006790: bd 00 .short 0x00bd | |
10006792 <$t.273>: | |
10006792: 2000 movs r0, #0 | |
10006794: 2161 movs r1, #97 | |
; } | |
10006796: 4770 bx lr | |
10006798: 2000 movs r0, #0 | |
1000679a: 217b movs r1, #123 | |
; } | |
1000679c: 4770 bx lr | |
1000679e: 2000 movs r0, #0 | |
100067a0: 2164 movs r1, #100 | |
; } | |
100067a2: 4770 bx lr | |
100067a4: 2000 movs r0, #0 | |
100067a6: 216f movs r1, #111 | |
; } | |
100067a8: 4770 bx lr | |
100067aa: 2000 movs r0, #0 | |
100067ac: 215e movs r1, #94 | |
; } | |
100067ae: 4770 bx lr | |
100067b0: 2000 movs r0, #0 | |
100067b2: 2175 movs r1, #117 | |
; } | |
100067b4: 4770 bx lr | |
100067b6: 2000 movs r0, #0 | |
100067b8: 2171 movs r1, #113 | |
; } | |
100067ba: 4770 bx lr | |
100067bc: 2000 movs r0, #0 | |
100067be: 2162 movs r1, #98 | |
; } | |
100067c0: 4770 bx lr | |
100067c2: 2000 movs r0, #0 | |
100067c4: 2172 movs r1, #114 | |
; } | |
100067c6: 4770 bx lr | |
100067c8: 2000 movs r0, #0 | |
100067ca: 2163 movs r1, #99 | |
; } | |
100067cc: 4770 bx lr | |
100067ce: 2000 movs r0, #0 | |
100067d0: 2176 movs r1, #118 | |
; } | |
100067d2: 4770 bx lr | |
100067d4: 2000 movs r0, #0 | |
100067d6: 2173 movs r1, #115 | |
; } | |
100067d8: 4770 bx lr | |
100067da: 2000 movs r0, #0 | |
100067dc: 2177 movs r1, #119 | |
; } | |
100067de: 4770 bx lr | |
100067e0: 2000 movs r0, #0 | |
100067e2: 2174 movs r1, #116 | |
; } | |
100067e4: 4770 bx lr | |
100067e6: 2000 movs r0, #0 | |
100067e8: 2123 movs r1, #35 | |
; } | |
100067ea: 4770 bx lr | |
100067ec: 2000 movs r0, #0 | |
100067ee: 2170 movs r1, #112 | |
; } | |
100067f0: 4770 bx lr | |
100067f2: 2000 movs r0, #0 | |
100067f4: 215c movs r1, #92 | |
; } | |
100067f6: 4770 bx lr | |
100067f8: 2000 movs r0, #0 | |
100067fa: 2136 movs r1, #54 | |
; } | |
100067fc: 4770 bx lr | |
100067fe: 2000 movs r0, #0 | |
10006800: 2165 movs r1, #101 | |
; } | |
10006802: 4770 bx lr | |
10006804: 2000 movs r0, #0 | |
10006806: 2120 movs r1, #32 | |
; } | |
10006808: 4770 bx lr | |
1000680a: 2000 movs r0, #0 | |
1000680c: 211f movs r1, #31 | |
; } | |
1000680e: 4770 bx lr | |
10006810: 2000 movs r0, #0 | |
10006812: 2135 movs r1, #53 | |
; } | |
10006814: 4770 bx lr | |
10006816: 2000 movs r0, #0 | |
10006818: 2166 movs r1, #102 | |
; } | |
1000681a: 4770 bx lr | |
1000681c: 2000 movs r0, #0 | |
1000681e: 2167 movs r1, #103 | |
; } | |
10006820: 4770 bx lr | |
10006822: 2000 movs r0, #0 | |
10006824: 2158 movs r1, #88 | |
; } | |
10006826: 4770 bx lr | |
10006828: 2000 movs r0, #0 | |
1000682a: 2137 movs r1, #55 | |
; } | |
1000682c: 4770 bx lr | |
1000682e: 2000 movs r0, #0 | |
10006830: 210d movs r1, #13 | |
; } | |
10006832: 4770 bx lr | |
10006834: 2000 movs r0, #0 | |
10006836: 2121 movs r1, #33 | |
; } | |
10006838: 4770 bx lr | |
1000683a: d4d4 bmi 0x100067e6 <$t.273+0x54> @ imm = #-88 | |
1000683c <pio::InstructionOperands::encode>: | |
; pub const fn encode(&self) -> u16 { | |
1000683c: b5b0 push {r4, r5, r7, lr} | |
1000683e: af02 add r7, sp, #8 | |
; match self { | |
10006840: 7802 ldrb r2, [r0] | |
10006842: 0051 lsls r1, r2, #1 | |
10006844: 4b2b ldr r3, [pc, #172] @ 0x100068f4 <$d.277> | |
10006846: 5a59 ldrh r1, [r3, r1] | |
10006848: 447a add r2, pc | |
1000684a: 7912 ldrb r2, [r2, #4] | |
1000684c: 0052 lsls r2, r2, #1 | |
1000684e: 4497 add pc, r2 | |
10006850 <$d.275>: | |
10006850: 04 06 04 18 .word 0x18040604 | |
10006854: 1d 23 2b 31 .word 0x312b231d | |
10006858: 04 00 .short 0x0004 | |
1000685a <$t.276>: | |
1000685a: 7842 ldrb r2, [r0, #1] | |
1000685c: e014 b 0x10006888 <$t.276+0x2e> @ imm = #40 | |
; if *relative && !matches!(*source, WaitSource::IRQ) { | |
1000685e: 78c3 ldrb r3, [r0, #3] | |
10006860: 7904 ldrb r4, [r0, #4] | |
10006862: 2c00 cmp r4, #0 | |
10006864: d001 beq 0x1000686a <$t.276+0x10> @ imm = #2 | |
10006866: 2b02 cmp r3, #2 | |
10006868: d134 bne 0x100068d4 <$t.276+0x7a> @ imm = #104 | |
; if matches!(*source, WaitSource::IRQ) && *index > 7 { | |
1000686a: 7882 ldrb r2, [r0, #2] | |
1000686c: 2b02 cmp r3, #2 | |
1000686e: d101 bne 0x10006874 <$t.276+0x1a> @ imm = #2 | |
10006870: 2a07 cmp r2, #7 | |
10006872: d834 bhi 0x100068de <$t.276+0x84> @ imm = #104 | |
; if *relative && !matches!(*source, WaitSource::IRQ) { | |
10006874: 1e65 subs r5, r4, #1 | |
10006876: 41ac sbcs r4, r5 | |
; *index | (if *relative { 0b10000 } else { 0 }), | |
10006878: 0124 lsls r4, r4, #4 | |
1000687a: 4322 orrs r2, r4 | |
; (*polarity) << 2 | (*source as u8), | |
1000687c: 7840 ldrb r0, [r0, #1] | |
1000687e: 0080 lsls r0, r0, #2 | |
10006880: e021 b 0x100068c6 <$t.276+0x6c> @ imm = #66 | |
; } => (*destination as u8, *bit_count & 0b11111), | |
10006882: 7843 ldrb r3, [r0, #1] | |
10006884: 221f movs r2, #31 | |
10006886: 401a ands r2, r3 | |
10006888: 7880 ldrb r0, [r0, #2] | |
1000688a: e01d b 0x100068c8 <$t.276+0x6e> @ imm = #58 | |
; ((*if_full as u8) << 1 | (*block as u8), 0) | |
1000688c: 7882 ldrb r2, [r0, #2] | |
1000688e: 7840 ldrb r0, [r0, #1] | |
10006890: 0040 lsls r0, r0, #1 | |
10006892: 4310 orrs r0, r2 | |
10006894: 2200 movs r2, #0 | |
10006896: e017 b 0x100068c8 <$t.276+0x6e> @ imm = #46 | |
; (1 << 2 | (*if_empty as u8) << 1 | (*block as u8), 0) | |
10006898: 7882 ldrb r2, [r0, #2] | |
1000689a: 7840 ldrb r0, [r0, #1] | |
1000689c: 0043 lsls r3, r0, #1 | |
1000689e: 4313 orrs r3, r2 | |
100068a0: 2004 movs r0, #4 | |
100068a2: 4318 orrs r0, r3 | |
100068a4: 2200 movs r2, #0 | |
100068a6: e00f b 0x100068c8 <$t.276+0x6e> @ imm = #30 | |
; } => (*destination as u8, (*op as u8) << 3 | (*source as u8)), | |
100068a8: 7883 ldrb r3, [r0, #2] | |
100068aa: 78c2 ldrb r2, [r0, #3] | |
100068ac: 00d2 lsls r2, r2, #3 | |
100068ae: 431a orrs r2, r3 | |
100068b0: 7840 ldrb r0, [r0, #1] | |
100068b2: e009 b 0x100068c8 <$t.276+0x6e> @ imm = #18 | |
; if *index > 7 { | |
100068b4: 7843 ldrb r3, [r0, #1] | |
100068b6: 2b07 cmp r3, #7 | |
100068b8: d816 bhi 0x100068e8 <$t.276+0x8e> @ imm = #44 | |
; *index | (if *relative { 0b10000 } else { 0 }), | |
100068ba: 7902 ldrb r2, [r0, #4] | |
100068bc: 0112 lsls r2, r2, #4 | |
100068be: 431a orrs r2, r3 | |
; (*clear as u8) << 1 | (*wait as u8), | |
100068c0: 78c3 ldrb r3, [r0, #3] | |
100068c2: 7880 ldrb r0, [r0, #2] | |
100068c4: 0040 lsls r0, r0, #1 | |
100068c6: 4318 orrs r0, r3 | |
; data |= (o0 as u16) << 5; | |
100068c8: b2c0 uxtb r0, r0 | |
100068ca: 0143 lsls r3, r0, #5 | |
100068cc: 430b orrs r3, r1 | |
; data |= o1 as u16; | |
100068ce: b2d0 uxtb r0, r2 | |
100068d0: 4318 orrs r0, r3 | |
; } | |
100068d2: bdb0 pop {r4, r5, r7, pc} | |
; panic!("relative flag should only be used with WaitSource::IRQ"); | |
100068d4: 4809 ldr r0, [pc, #36] @ 0x100068fc <$d.277+0x8> | |
100068d6: 2136 movs r1, #54 | |
; panic!("relative flag should only be used with WaitSource::IRQ"); | |
100068d8: f7fe f854 bl 0x10004984 <core::panicking::panic> @ imm = #-8024 | |
100068dc: defe trap | |
; panic!("Index for WaitSource::IRQ should be in range 0..=7"); | |
100068de: 4808 ldr r0, [pc, #32] @ 0x10006900 <$d.277+0xc> | |
100068e0: 2132 movs r1, #50 | |
; panic!("Index for WaitSource::IRQ should be in range 0..=7"); | |
100068e2: f7fe f84f bl 0x10004984 <core::panicking::panic> @ imm = #-8034 | |
100068e6: defe trap | |
; panic!("invalid interrupt flags"); | |
100068e8: 4803 ldr r0, [pc, #12] @ 0x100068f8 <$d.277+0x4> | |
100068ea: 2117 movs r1, #23 | |
; panic!("invalid interrupt flags"); | |
100068ec: f7fe f84a bl 0x10004984 <core::panicking::panic> @ imm = #-8044 | |
100068f0: defe trap | |
100068f2: 46c0 mov r8, r8 | |
100068f4 <$d.277>: | |
100068f4: be 7b 00 10 .word 0x10007bbe | |
100068f8: 36 7b 00 10 .word 0x10007b36 | |
100068fc: 4d 7b 00 10 .word 0x10007b4d | |
10006900: 83 7b 00 10 .word 0x10007b83 | |
10006904 <<rp2040_hal::pio::InstallError as core::fmt::Debug>::fmt>: | |
; #[derive(Debug)] | |
10006904: b580 push {r7, lr} | |
10006906: af00 add r7, sp, #0 | |
10006908: c903 ldm r1, {r0, r1} | |
1000690a: 68cb ldr r3, [r1, #12] | |
1000690c: 4901 ldr r1, [pc, #4] @ 0x10006914 <$d.317> | |
1000690e: 2207 movs r2, #7 | |
10006910: 4798 blx r3 | |
; #[derive(Debug)] | |
10006912: bd80 pop {r7, pc} | |
10006914 <$d.317>: | |
10006914: b6 7b 00 10 .word 0x10007bb6 | |
10006918 <__aeabi_memset8>: | |
; pub unsafe extern $abi fn $name( $($argname: $ty),* ) -> $ret { | |
10006918: b5f0 push {r4, r5, r6, r7, lr} | |
1000691a: af03 add r7, sp, #12 | |
1000691c: b081 sub sp, #4 | |
1000691e: 4615 mov r5, r2 | |
10006920: 460c mov r4, r1 | |
10006922: 4606 mov r6, r0 | |
10006924: 4809 ldr r0, [pc, #36] @ 0x1000694c <$d.329> | |
10006926: 8803 ldrh r3, [r0] | |
; let p: *const u32 = match CACHED_PTR.load(Ordering::Relaxed) { | |
10006928: 2b00 cmp r3, #0 | |
1000692a: d108 bne 0x1000693e <__aeabi_memset8+0x26> @ imm = #16 | |
1000692c: 2018 movs r0, #24 | |
; let rom_table_lookup_ptr: *const u32 = rom_hword_as_ptr(ROM_TABLE_LOOKUP_PTR); | |
1000692e: 8802 ldrh r2, [r0] | |
10006930: 2014 movs r0, #20 | |
; rom_functions! { | |
10006932: 8800 ldrh r0, [r0] | |
10006934: 4906 ldr r1, [pc, #24] @ 0x10006950 <$d.329+0x4> | |
; rom_table_lookup( | |
10006936: 4790 blx r2 | |
10006938: 4603 mov r3, r0 | |
1000693a: 4804 ldr r0, [pc, #16] @ 0x1000694c <$d.329> | |
1000693c: 8003 strh r3, [r0] | |
; $name::ptr()($($argname),*) | |
1000693e: b2e9 uxtb r1, r5 | |
10006940: 4630 mov r0, r6 | |
10006942: 4622 mov r2, r4 | |
10006944: 4798 blx r3 | |
; } | |
10006946: b001 add sp, #4 | |
10006948: bdf0 pop {r4, r5, r6, r7, pc} | |
1000694a: 46c0 mov r8, r8 | |
1000694c <$d.329>: | |
1000694c: 10 ed 03 20 .word 0x2003ed10 | |
10006950: 53 34 00 00 .word 0x00003453 | |
10006954 <__aeabi_memclr>: | |
; pub unsafe extern $abi fn $name( $($argname: $ty),* ) -> $ret { | |
10006954: b5f0 push {r4, r5, r6, r7, lr} | |
10006956: af03 add r7, sp, #12 | |
10006958: b081 sub sp, #4 | |
1000695a: 460c mov r4, r1 | |
1000695c: 4605 mov r5, r0 | |
1000695e: 4e09 ldr r6, [pc, #36] @ 0x10006984 <$d.331> | |
10006960: 8833 ldrh r3, [r6] | |
; let p: *const u32 = match CACHED_PTR.load(Ordering::Relaxed) { | |
10006962: 2b00 cmp r3, #0 | |
10006964: d107 bne 0x10006976 <__aeabi_memclr+0x22> @ imm = #14 | |
10006966: 2018 movs r0, #24 | |
; let rom_table_lookup_ptr: *const u32 = rom_hword_as_ptr(ROM_TABLE_LOOKUP_PTR); | |
10006968: 8802 ldrh r2, [r0] | |
1000696a: 2014 movs r0, #20 | |
; rom_functions! { | |
1000696c: 8800 ldrh r0, [r0] | |
1000696e: 4906 ldr r1, [pc, #24] @ 0x10006988 <$d.331+0x4> | |
; rom_table_lookup( | |
10006970: 4790 blx r2 | |
10006972: 4603 mov r3, r0 | |
10006974: 8030 strh r0, [r6] | |
10006976: 2100 movs r1, #0 | |
; $name::ptr()($($argname),*) | |
10006978: 4628 mov r0, r5 | |
1000697a: 4622 mov r2, r4 | |
1000697c: 4798 blx r3 | |
; } | |
1000697e: b001 add sp, #4 | |
10006980: bdf0 pop {r4, r5, r6, r7, pc} | |
10006982: 46c0 mov r8, r8 | |
10006984 <$d.331>: | |
10006984: 0e ed 03 20 .word 0x2003ed0e | |
10006988: 4d 53 00 00 .word 0x0000534d | |
1000698c <__aeabi_memcpy>: | |
; pub unsafe extern $abi fn $name( $($argname: $ty),* ) -> $ret { | |
1000698c: b5f0 push {r4, r5, r6, r7, lr} | |
1000698e: af03 add r7, sp, #12 | |
10006990: b081 sub sp, #4 | |
10006992: 4614 mov r4, r2 | |
10006994: 460d mov r5, r1 | |
10006996: 4606 mov r6, r0 | |
10006998: 4809 ldr r0, [pc, #36] @ 0x100069c0 <$d.335> | |
1000699a: 8803 ldrh r3, [r0] | |
; let p: *const u32 = match CACHED_PTR.load(Ordering::Relaxed) { | |
1000699c: 2b00 cmp r3, #0 | |
1000699e: d108 bne 0x100069b2 <__aeabi_memcpy+0x26> @ imm = #16 | |
100069a0: 2018 movs r0, #24 | |
; let rom_table_lookup_ptr: *const u32 = rom_hword_as_ptr(ROM_TABLE_LOOKUP_PTR); | |
100069a2: 8802 ldrh r2, [r0] | |
100069a4: 2014 movs r0, #20 | |
; rom_functions! { | |
100069a6: 8800 ldrh r0, [r0] | |
100069a8: 4906 ldr r1, [pc, #24] @ 0x100069c4 <$d.335+0x4> | |
; rom_table_lookup( | |
100069aa: 4790 blx r2 | |
100069ac: 4603 mov r3, r0 | |
100069ae: 4804 ldr r0, [pc, #16] @ 0x100069c0 <$d.335> | |
100069b0: 8003 strh r3, [r0] | |
; $name::ptr()($($argname),*) | |
100069b2: 4630 mov r0, r6 | |
100069b4: 4629 mov r1, r5 | |
100069b6: 4622 mov r2, r4 | |
100069b8: 4798 blx r3 | |
; } | |
100069ba: b001 add sp, #4 | |
100069bc: bdf0 pop {r4, r5, r6, r7, pc} | |
100069be: 46c0 mov r8, r8 | |
100069c0 <$d.335>: | |
100069c0: 12 ed 03 20 .word 0x2003ed12 | |
100069c4: 4d 43 00 00 .word 0x0000434d | |
100069c8 <__aeabi_memcpy8>: | |
; pub unsafe extern $abi fn $name( $($argname: $ty),* ) -> $ret { | |
100069c8: b5f0 push {r4, r5, r6, r7, lr} | |
100069ca: af03 add r7, sp, #12 | |
100069cc: b081 sub sp, #4 | |
100069ce: 4614 mov r4, r2 | |
100069d0: 460d mov r5, r1 | |
100069d2: 4606 mov r6, r0 | |
100069d4: 4809 ldr r0, [pc, #36] @ 0x100069fc <$d.337> | |
100069d6: 8803 ldrh r3, [r0] | |
; let p: *const u32 = match CACHED_PTR.load(Ordering::Relaxed) { | |
100069d8: 2b00 cmp r3, #0 | |
100069da: d108 bne 0x100069ee <__aeabi_memcpy8+0x26> @ imm = #16 | |
100069dc: 2018 movs r0, #24 | |
; let rom_table_lookup_ptr: *const u32 = rom_hword_as_ptr(ROM_TABLE_LOOKUP_PTR); | |
100069de: 8802 ldrh r2, [r0] | |
100069e0: 2014 movs r0, #20 | |
; rom_functions! { | |
100069e2: 8800 ldrh r0, [r0] | |
100069e4: 4906 ldr r1, [pc, #24] @ 0x10006a00 <$d.337+0x4> | |
; rom_table_lookup( | |
100069e6: 4790 blx r2 | |
100069e8: 4603 mov r3, r0 | |
100069ea: 4804 ldr r0, [pc, #16] @ 0x100069fc <$d.337> | |
100069ec: 8003 strh r3, [r0] | |
; $name::ptr()($($argname),*) | |
100069ee: 4630 mov r0, r6 | |
100069f0: 4629 mov r1, r5 | |
100069f2: 4622 mov r2, r4 | |
100069f4: 4798 blx r3 | |
; } | |
100069f6: b001 add sp, #4 | |
100069f8: bdf0 pop {r4, r5, r6, r7, pc} | |
100069fa: 46c0 mov r8, r8 | |
100069fc <$d.337>: | |
100069fc: 14 ed 03 20 .word 0x2003ed14 | |
10006a00: 43 34 00 00 .word 0x00003443 | |
10006a04 <__bkpt>: | |
10006a04: be00 bkpt #0 | |
10006a06: 4770 bx lr | |
10006a08 <__cpsid>: | |
10006a08: b672 cpsid i | |
10006a0a: 4770 bx lr | |
10006a0c <__cpsie>: | |
10006a0c: b662 cpsie i | |
10006a0e: 4770 bx lr | |
10006a10 <__delay>: | |
10006a10: 0840 lsrs r0, r0, #1 | |
10006a12: 1c40 adds r0, r0, #1 | |
10006a14: 3801 subs r0, #1 | |
10006a16: d1fd bne 0x10006a14 <__delay+0x4> @ imm = #-6 | |
10006a18: 4770 bx lr | |
10006a1a <__nop>: | |
10006a1a: bf00 nop | |
10006a1c: 4770 bx lr | |
10006a1e <__primask_r>: | |
10006a1e: f3ef 8010 mrs r0, primask | |
10006a22: 4770 bx lr | |
10006a24 <__sev>: | |
10006a24: bf40 sev | |
10006a26: 4770 bx lr | |
10006a28 <__udf>: | |
10006a28: de00 udf #0 | |
10006a2a: defe trap | |
10006a2c <__wfe>: | |
10006a2c: bf20 wfe | |
10006a2e: 4770 bx lr | |
10006a30 <__aeabi_uldivmod>: | |
10006a30: b510 push {r4, lr} | |
10006a32: b084 sub sp, #16 | |
10006a34: ac02 add r4, sp, #8 | |
10006a36: 9400 str r4, [sp] | |
10006a38: f000 f831 bl 0x10006a9e <__udivmoddi4> @ imm = #98 | |
10006a3c: 9a02 ldr r2, [sp, #8] | |
10006a3e: 9b03 ldr r3, [sp, #12] | |
10006a40: b004 add sp, #16 | |
10006a42: bd10 pop {r4, pc} | |
10006a44: defe trap | |
10006a46 <__aeabi_memmove>: | |
10006a46: b580 push {r7, lr} | |
10006a48: af00 add r7, sp, #0 | |
10006a4a: f000 fa04 bl 0x10006e56 <compiler_builtins::arm::__aeabi_memmove> @ imm = #1032 | |
10006a4e: bd80 pop {r7, pc} | |
10006a50 <__aeabi_lmul>: | |
10006a50: b5f0 push {r4, r5, r6, r7, lr} | |
10006a52: af03 add r7, sp, #12 | |
10006a54: b084 sub sp, #16 | |
10006a56: 9303 str r3, [sp, #12] | |
10006a58: 4616 mov r6, r2 | |
10006a5a: 9102 str r1, [sp, #8] | |
10006a5c: 4603 mov r3, r0 | |
10006a5e: b282 uxth r2, r0 | |
10006a60: 0c30 lsrs r0, r6, #16 | |
10006a62: 9001 str r0, [sp, #4] | |
10006a64: 4614 mov r4, r2 | |
10006a66: 4344 muls r4, r0, r4 | |
10006a68: 0c1d lsrs r5, r3, #16 | |
10006a6a: b2b1 uxth r1, r6 | |
10006a6c: 9100 str r1, [sp] | |
10006a6e: 4628 mov r0, r5 | |
10006a70: 4348 muls r0, r1, r0 | |
10006a72: 2100 movs r1, #0 | |
10006a74: 1900 adds r0, r0, r4 | |
10006a76: 4149 adcs r1, r1 | |
10006a78: 0c04 lsrs r4, r0, #16 | |
10006a7a: 0409 lsls r1, r1, #16 | |
10006a7c: 1909 adds r1, r1, r4 | |
10006a7e: 0400 lsls r0, r0, #16 | |
10006a80: 9c01 ldr r4, [sp, #4] | |
10006a82: 4365 muls r5, r4, r5 | |
10006a84: 9c00 ldr r4, [sp] | |
10006a86: 4362 muls r2, r4, r2 | |
10006a88: 1814 adds r4, r2, r0 | |
10006a8a: 414d adcs r5, r1 | |
10006a8c: 9902 ldr r1, [sp, #8] | |
10006a8e: 4371 muls r1, r6, r1 | |
10006a90: 9803 ldr r0, [sp, #12] | |
10006a92: 4358 muls r0, r3, r0 | |
10006a94: 1840 adds r0, r0, r1 | |
10006a96: 1829 adds r1, r5, r0 | |
10006a98: 4620 mov r0, r4 | |
10006a9a: b004 add sp, #16 | |
10006a9c: bdf0 pop {r4, r5, r6, r7, pc} | |
10006a9e <__udivmoddi4>: | |
10006a9e: b5d0 push {r4, r6, r7, lr} | |
10006aa0: af02 add r7, sp, #8 | |
10006aa2: f000 f805 bl 0x10006ab0 <compiler_builtins::int::specialized_div_rem::u64_div_rem> @ imm = #10 | |
10006aa6: 68bc ldr r4, [r7, #8] | |
10006aa8: 2c00 cmp r4, #0 | |
10006aaa: d000 beq 0x10006aae <__udivmoddi4+0x10> @ imm = #0 | |
10006aac: c40c stm r4!, {r2, r3} | |
10006aae: bdd0 pop {r4, r6, r7, pc} | |
10006ab0 <compiler_builtins::int::specialized_div_rem::u64_div_rem>: | |
10006ab0: b5f0 push {r4, r5, r6, r7, lr} | |
10006ab2: af03 add r7, sp, #12 | |
10006ab4: b089 sub sp, #36 | |
10006ab6: 4615 mov r5, r2 | |
10006ab8: 460c mov r4, r1 | |
10006aba: 4602 mov r2, r0 | |
10006abc: 9306 str r3, [sp, #24] | |
10006abe: 2d00 cmp r5, #0 | |
10006ac0: 9505 str r5, [sp, #20] | |
10006ac2: d002 beq 0x10006aca <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1a> @ imm = #4 | |
10006ac4: 2b00 cmp r3, #0 | |
10006ac6: d100 bne 0x10006aca <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1a> @ imm = #0 | |
10006ac8: e093 b 0x10006bf2 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x142> @ imm = #294 | |
10006aca: 2600 movs r6, #0 | |
10006acc: 2c00 cmp r4, #0 | |
10006ace: d018 beq 0x10006b02 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x52> @ imm = #48 | |
10006ad0: 1b50 subs r0, r2, r5 | |
10006ad2: 4620 mov r0, r4 | |
10006ad4: 9906 ldr r1, [sp, #24] | |
10006ad6: 4188 sbcs r0, r1 | |
10006ad8: d313 blo 0x10006b02 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x52> @ imm = #38 | |
10006ada: 4615 mov r5, r2 | |
10006adc: 0c22 lsrs r2, r4, #16 | |
10006ade: 461e mov r6, r3 | |
10006ae0: 4293 cmp r3, r2 | |
10006ae2: 4620 mov r0, r4 | |
10006ae4: d80f bhi 0x10006b06 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x56> @ imm = #30 | |
10006ae6: 4610 mov r0, r2 | |
10006ae8: 0a01 lsrs r1, r0, #8 | |
10006aea: 428e cmp r6, r1 | |
10006aec: d90e bls 0x10006b0c <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x5c> @ imm = #28 | |
10006aee: 9103 str r1, [sp, #12] | |
10006af0: 0901 lsrs r1, r0, #4 | |
10006af2: 428e cmp r6, r1 | |
10006af4: d80f bhi 0x10006b16 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x66> @ imm = #30 | |
10006af6: 4608 mov r0, r1 | |
10006af8: 9104 str r1, [sp, #16] | |
10006afa: 0881 lsrs r1, r0, #2 | |
10006afc: 428e cmp r6, r1 | |
10006afe: d90e bls 0x10006b1e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x6e> @ imm = #28 | |
10006b00: e00e b 0x10006b20 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x70> @ imm = #28 | |
10006b02: 4633 mov r3, r6 | |
10006b04: e145 b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #650 | |
10006b06: 0a01 lsrs r1, r0, #8 | |
10006b08: 428e cmp r6, r1 | |
10006b0a: d8f0 bhi 0x10006aee <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x3e> @ imm = #-32 | |
10006b0c: 4608 mov r0, r1 | |
10006b0e: 9103 str r1, [sp, #12] | |
10006b10: 0901 lsrs r1, r0, #4 | |
10006b12: 428e cmp r6, r1 | |
10006b14: d9ef bls 0x10006af6 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x46> @ imm = #-34 | |
10006b16: 9104 str r1, [sp, #16] | |
10006b18: 0881 lsrs r1, r0, #2 | |
10006b1a: 428e cmp r6, r1 | |
10006b1c: d800 bhi 0x10006b20 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x70> @ imm = #0 | |
10006b1e: 4608 mov r0, r1 | |
10006b20: 9108 str r1, [sp, #32] | |
10006b22: 0841 lsrs r1, r0, #1 | |
10006b24: 2301 movs r3, #1 | |
10006b26: 2000 movs r0, #0 | |
10006b28: 9007 str r0, [sp, #28] | |
10006b2a: 428e cmp r6, r1 | |
10006b2c: 4618 mov r0, r3 | |
10006b2e: d900 bls 0x10006b32 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x82> @ imm = #0 | |
10006b30: 9807 ldr r0, [sp, #28] | |
10006b32: 9002 str r0, [sp, #8] | |
10006b34: 4296 cmp r6, r2 | |
10006b36: 461a mov r2, r3 | |
10006b38: 4618 mov r0, r3 | |
10006b3a: 9903 ldr r1, [sp, #12] | |
10006b3c: d900 bls 0x10006b40 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x90> @ imm = #0 | |
10006b3e: 9a07 ldr r2, [sp, #28] | |
10006b40: 0113 lsls r3, r2, #4 | |
10006b42: 428e cmp r6, r1 | |
10006b44: 4601 mov r1, r0 | |
10006b46: d900 bls 0x10006b4a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x9a> @ imm = #0 | |
10006b48: 9907 ldr r1, [sp, #28] | |
10006b4a: 00c9 lsls r1, r1, #3 | |
10006b4c: 18c9 adds r1, r1, r3 | |
10006b4e: 9a04 ldr r2, [sp, #16] | |
10006b50: 4296 cmp r6, r2 | |
10006b52: 4602 mov r2, r0 | |
10006b54: d900 bls 0x10006b58 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0xa8> @ imm = #0 | |
10006b56: 9a07 ldr r2, [sp, #28] | |
10006b58: 0092 lsls r2, r2, #2 | |
10006b5a: 1889 adds r1, r1, r2 | |
10006b5c: 9a08 ldr r2, [sp, #32] | |
10006b5e: 4296 cmp r6, r2 | |
10006b60: 4602 mov r2, r0 | |
10006b62: 9008 str r0, [sp, #32] | |
10006b64: d900 bls 0x10006b68 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0xb8> @ imm = #0 | |
10006b66: 9a07 ldr r2, [sp, #28] | |
10006b68: 0052 lsls r2, r2, #1 | |
10006b6a: 1889 adds r1, r1, r2 | |
10006b6c: 9a02 ldr r2, [sp, #8] | |
10006b6e: 188b adds r3, r1, r2 | |
10006b70: 409e lsls r6, r3 | |
10006b72: 221f movs r2, #31 | |
10006b74: 405a eors r2, r3 | |
10006b76: 9805 ldr r0, [sp, #20] | |
10006b78: 0841 lsrs r1, r0, #1 | |
10006b7a: 40d1 lsrs r1, r2 | |
10006b7c: 4331 orrs r1, r6 | |
10006b7e: 4602 mov r2, r0 | |
10006b80: 409a lsls r2, r3 | |
10006b82: 9808 ldr r0, [sp, #32] | |
10006b84: 4098 lsls r0, r3 | |
10006b86: 9008 str r0, [sp, #32] | |
10006b88: e008 b 0x10006b9c <compiler_builtins::int::specialized_div_rem::u64_div_rem+0xec> @ imm = #16 | |
10006b8a: 461d mov r5, r3 | |
10006b8c: 4634 mov r4, r6 | |
10006b8e: 0892 lsrs r2, r2, #2 | |
10006b90: 078b lsls r3, r1, #30 | |
10006b92: 18d2 adds r2, r2, r3 | |
10006b94: 9808 ldr r0, [sp, #32] | |
10006b96: 0880 lsrs r0, r0, #2 | |
10006b98: 9008 str r0, [sp, #32] | |
10006b9a: 0889 lsrs r1, r1, #2 | |
10006b9c: 1aab subs r3, r5, r2 | |
10006b9e: 4626 mov r6, r4 | |
10006ba0: 418e sbcs r6, r1 | |
10006ba2: d40c bmi 0x10006bbe <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x10e> @ imm = #24 | |
10006ba4: 9807 ldr r0, [sp, #28] | |
10006ba6: 9c08 ldr r4, [sp, #32] | |
10006ba8: 4320 orrs r0, r4 | |
10006baa: 9007 str r0, [sp, #28] | |
10006bac: 9805 ldr r0, [sp, #20] | |
10006bae: 1a1c subs r4, r3, r0 | |
10006bb0: 4634 mov r4, r6 | |
10006bb2: 9806 ldr r0, [sp, #24] | |
10006bb4: 4184 sbcs r4, r0 | |
10006bb6: 461d mov r5, r3 | |
10006bb8: 4634 mov r4, r6 | |
10006bba: d202 bhs 0x10006bc2 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x112> @ imm = #4 | |
10006bbc: e015 b 0x10006bea <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x13a> @ imm = #42 | |
10006bbe: 462b mov r3, r5 | |
10006bc0: 4626 mov r6, r4 | |
10006bc2: 0855 lsrs r5, r2, #1 | |
10006bc4: 07cc lsls r4, r1, #31 | |
10006bc6: 192c adds r4, r5, r4 | |
10006bc8: 084d lsrs r5, r1, #1 | |
10006bca: 1b18 subs r0, r3, r4 | |
10006bcc: 4634 mov r4, r6 | |
10006bce: 41ac sbcs r4, r5 | |
10006bd0: d4db bmi 0x10006b8a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0xda> @ imm = #-74 | |
10006bd2: 9b08 ldr r3, [sp, #32] | |
10006bd4: 085b lsrs r3, r3, #1 | |
10006bd6: 9d07 ldr r5, [sp, #28] | |
10006bd8: 431d orrs r5, r3 | |
10006bda: 9507 str r5, [sp, #28] | |
10006bdc: 4605 mov r5, r0 | |
10006bde: 9b05 ldr r3, [sp, #20] | |
10006be0: 1ac3 subs r3, r0, r3 | |
10006be2: 4623 mov r3, r4 | |
10006be4: 9806 ldr r0, [sp, #24] | |
10006be6: 4183 sbcs r3, r0 | |
10006be8: d2d1 bhs 0x10006b8e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0xde> @ imm = #-94 | |
10006bea: 2300 movs r3, #0 | |
10006bec: 462a mov r2, r5 | |
10006bee: 9e07 ldr r6, [sp, #28] | |
10006bf0: e0cf b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #414 | |
10006bf2: 2c00 cmp r4, #0 | |
10006bf4: d011 beq 0x10006c1a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x16a> @ imm = #34 | |
10006bf6: 42ac cmp r4, r5 | |
10006bf8: d219 bhs 0x10006c2e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x17e> @ imm = #50 | |
10006bfa: 9201 str r2, [sp, #4] | |
10006bfc: 0c2a lsrs r2, r5, #16 | |
10006bfe: 4294 cmp r4, r2 | |
10006c00: d823 bhi 0x10006c4a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x19a> @ imm = #70 | |
10006c02: 4615 mov r5, r2 | |
10006c04: 0a2b lsrs r3, r5, #8 | |
10006c06: 429c cmp r4, r3 | |
10006c08: d922 bls 0x10006c50 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1a0> @ imm = #68 | |
10006c0a: 0929 lsrs r1, r5, #4 | |
10006c0c: 428c cmp r4, r1 | |
10006c0e: d823 bhi 0x10006c58 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1a8> @ imm = #70 | |
10006c10: 460d mov r5, r1 | |
10006c12: 08a8 lsrs r0, r5, #2 | |
10006c14: 4284 cmp r4, r0 | |
10006c16: d922 bls 0x10006c5e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1ae> @ imm = #68 | |
10006c18: e022 b 0x10006c60 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1b0> @ imm = #68 | |
10006c1a: 4610 mov r0, r2 | |
10006c1c: 4629 mov r1, r5 | |
10006c1e: 4614 mov r4, r2 | |
10006c20: f7f9 faf2 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27164 | |
10006c24: 4622 mov r2, r4 | |
10006c26: 4606 mov r6, r0 | |
10006c28: 4345 muls r5, r0, r5 | |
10006c2a: 1b62 subs r2, r4, r5 | |
10006c2c: e0af b 0x10006d8e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2de> @ imm = #350 | |
10006c2e: d176 bne 0x10006d1e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x26e> @ imm = #236 | |
10006c30: 4610 mov r0, r2 | |
10006c32: 4621 mov r1, r4 | |
10006c34: 4625 mov r5, r4 | |
10006c36: 4614 mov r4, r2 | |
10006c38: f7f9 fae6 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27188 | |
10006c3c: 4622 mov r2, r4 | |
10006c3e: 4606 mov r6, r0 | |
10006c40: 4345 muls r5, r0, r5 | |
10006c42: 1b62 subs r2, r4, r5 | |
10006c44: 2400 movs r4, #0 | |
10006c46: 2301 movs r3, #1 | |
10006c48: e0a3 b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #326 | |
10006c4a: 0a2b lsrs r3, r5, #8 | |
10006c4c: 429c cmp r4, r3 | |
10006c4e: d8dc bhi 0x10006c0a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x15a> @ imm = #-72 | |
10006c50: 461d mov r5, r3 | |
10006c52: 0929 lsrs r1, r5, #4 | |
10006c54: 428c cmp r4, r1 | |
10006c56: d9db bls 0x10006c10 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x160> @ imm = #-74 | |
10006c58: 08a8 lsrs r0, r5, #2 | |
10006c5a: 4284 cmp r4, r0 | |
10006c5c: d800 bhi 0x10006c60 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1b0> @ imm = #0 | |
10006c5e: 4605 mov r5, r0 | |
10006c60: 9008 str r0, [sp, #32] | |
10006c62: 0868 lsrs r0, r5, #1 | |
10006c64: 2601 movs r6, #1 | |
10006c66: 2500 movs r5, #0 | |
10006c68: 4284 cmp r4, r0 | |
10006c6a: 4630 mov r0, r6 | |
10006c6c: d900 bls 0x10006c70 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1c0> @ imm = #0 | |
10006c6e: 4628 mov r0, r5 | |
10006c70: 9003 str r0, [sp, #12] | |
10006c72: 4294 cmp r4, r2 | |
10006c74: 4632 mov r2, r6 | |
10006c76: d900 bls 0x10006c7a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1ca> @ imm = #0 | |
10006c78: 462a mov r2, r5 | |
10006c7a: 0112 lsls r2, r2, #4 | |
10006c7c: 429c cmp r4, r3 | |
10006c7e: 4633 mov r3, r6 | |
10006c80: 9808 ldr r0, [sp, #32] | |
10006c82: d900 bls 0x10006c86 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1d6> @ imm = #0 | |
10006c84: 462b mov r3, r5 | |
10006c86: 00db lsls r3, r3, #3 | |
10006c88: 189a adds r2, r3, r2 | |
10006c8a: 428c cmp r4, r1 | |
10006c8c: 4631 mov r1, r6 | |
10006c8e: d900 bls 0x10006c92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1e2> @ imm = #0 | |
10006c90: 4629 mov r1, r5 | |
10006c92: 0089 lsls r1, r1, #2 | |
10006c94: 1851 adds r1, r2, r1 | |
10006c96: 4284 cmp r4, r0 | |
10006c98: 9604 str r6, [sp, #16] | |
10006c9a: d900 bls 0x10006c9e <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x1ee> @ imm = #0 | |
10006c9c: 462e mov r6, r5 | |
10006c9e: 9507 str r5, [sp, #28] | |
10006ca0: 0070 lsls r0, r6, #1 | |
10006ca2: 1808 adds r0, r1, r0 | |
10006ca4: 261f movs r6, #31 | |
10006ca6: 9903 ldr r1, [sp, #12] | |
10006ca8: 1840 adds r0, r0, r1 | |
10006caa: 4635 mov r5, r6 | |
10006cac: d001 beq 0x10006cb2 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x202> @ imm = #2 | |
10006cae: 2120 movs r1, #32 | |
10006cb0: 1a0d subs r5, r1, r0 | |
10006cb2: 9805 ldr r0, [sp, #20] | |
10006cb4: 9906 ldr r1, [sp, #24] | |
10006cb6: 462a mov r2, r5 | |
10006cb8: f000 f8b7 bl 0x10006e2a <__aeabi_llsl> @ imm = #366 | |
10006cbc: 402e ands r6, r5 | |
10006cbe: 9a04 ldr r2, [sp, #16] | |
10006cc0: 40b2 lsls r2, r6 | |
10006cc2: 9208 str r2, [sp, #32] | |
10006cc4: 9b01 ldr r3, [sp, #4] | |
10006cc6: e009 b 0x10006cdc <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x22c> @ imm = #18 | |
10006cc8: 462b mov r3, r5 | |
10006cca: 4634 mov r4, r6 | |
10006ccc: 9806 ldr r0, [sp, #24] | |
10006cce: 0880 lsrs r0, r0, #2 | |
10006cd0: 078a lsls r2, r1, #30 | |
10006cd2: 1880 adds r0, r0, r2 | |
10006cd4: 9a08 ldr r2, [sp, #32] | |
10006cd6: 0892 lsrs r2, r2, #2 | |
10006cd8: 9208 str r2, [sp, #32] | |
10006cda: 0889 lsrs r1, r1, #2 | |
10006cdc: 1a1d subs r5, r3, r0 | |
10006cde: 4626 mov r6, r4 | |
10006ce0: 418e sbcs r6, r1 | |
10006ce2: d408 bmi 0x10006cf6 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x246> @ imm = #16 | |
10006ce4: 9a07 ldr r2, [sp, #28] | |
10006ce6: 9b08 ldr r3, [sp, #32] | |
10006ce8: 431a orrs r2, r3 | |
10006cea: 9207 str r2, [sp, #28] | |
10006cec: 9a04 ldr r2, [sp, #16] | |
10006cee: 4296 cmp r6, r2 | |
10006cf0: d340 blo 0x10006d74 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2c4> @ imm = #128 | |
10006cf2: 4634 mov r4, r6 | |
10006cf4: e001 b 0x10006cfa <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x24a> @ imm = #2 | |
10006cf6: 461d mov r5, r3 | |
10006cf8: 4626 mov r6, r4 | |
10006cfa: 9006 str r0, [sp, #24] | |
10006cfc: 0842 lsrs r2, r0, #1 | |
10006cfe: 07cb lsls r3, r1, #31 | |
10006d00: 18d2 adds r2, r2, r3 | |
10006d02: 084b lsrs r3, r1, #1 | |
10006d04: 1aaa subs r2, r5, r2 | |
10006d06: 419c sbcs r4, r3 | |
10006d08: d4de bmi 0x10006cc8 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x218> @ imm = #-68 | |
10006d0a: 9808 ldr r0, [sp, #32] | |
10006d0c: 0840 lsrs r0, r0, #1 | |
10006d0e: 9e07 ldr r6, [sp, #28] | |
10006d10: 4306 orrs r6, r0 | |
10006d12: 9804 ldr r0, [sp, #16] | |
10006d14: 4284 cmp r4, r0 | |
10006d16: d330 blo 0x10006d7a <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2ca> @ imm = #96 | |
10006d18: 9607 str r6, [sp, #28] | |
10006d1a: 4613 mov r3, r2 | |
10006d1c: e7d6 b 0x10006ccc <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x21c> @ imm = #-84 | |
10006d1e: 9308 str r3, [sp, #32] | |
10006d20: 462e mov r6, r5 | |
10006d22: 4615 mov r5, r2 | |
10006d24: 4620 mov r0, r4 | |
10006d26: 4631 mov r1, r6 | |
10006d28: f7f9 fa6e bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27428 | |
10006d2c: 4603 mov r3, r0 | |
10006d2e: 4630 mov r0, r6 | |
10006d30: 4358 muls r0, r3, r0 | |
10006d32: 1a24 subs r4, r4, r0 | |
10006d34: 0c30 lsrs r0, r6, #16 | |
10006d36: d131 bne 0x10006d9c <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2ec> @ imm = #98 | |
10006d38: 9501 str r5, [sp, #4] | |
10006d3a: 0c28 lsrs r0, r5, #16 | |
10006d3c: 0421 lsls r1, r4, #16 | |
10006d3e: 180d adds r5, r1, r0 | |
10006d40: 4628 mov r0, r5 | |
10006d42: 4631 mov r1, r6 | |
10006d44: 9304 str r3, [sp, #16] | |
10006d46: f7f9 fa5f bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27458 | |
10006d4a: 4604 mov r4, r0 | |
10006d4c: 4630 mov r0, r6 | |
10006d4e: 4360 muls r0, r4, r0 | |
10006d50: 1a28 subs r0, r5, r0 | |
10006d52: 0400 lsls r0, r0, #16 | |
10006d54: 9901 ldr r1, [sp, #4] | |
10006d56: b289 uxth r1, r1 | |
10006d58: 1845 adds r5, r0, r1 | |
10006d5a: 4628 mov r0, r5 | |
10006d5c: 4631 mov r1, r6 | |
10006d5e: f7f9 fa53 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27482 | |
10006d62: 9b04 ldr r3, [sp, #16] | |
10006d64: 4346 muls r6, r0, r6 | |
10006d66: 1baa subs r2, r5, r6 | |
10006d68: 0426 lsls r6, r4, #16 | |
10006d6a: 4306 orrs r6, r0 | |
10006d6c: 0c20 lsrs r0, r4, #16 | |
10006d6e: 4303 orrs r3, r0 | |
10006d70: 2400 movs r4, #0 | |
10006d72: e00e b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #28 | |
10006d74: 4628 mov r0, r5 | |
10006d76: 9e07 ldr r6, [sp, #28] | |
10006d78: e000 b 0x10006d7c <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2cc> @ imm = #0 | |
10006d7a: 4610 mov r0, r2 | |
10006d7c: 9d05 ldr r5, [sp, #20] | |
10006d7e: 4629 mov r1, r5 | |
10006d80: 4604 mov r4, r0 | |
10006d82: f7f9 fa41 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27518 | |
10006d86: 4622 mov r2, r4 | |
10006d88: 4306 orrs r6, r0 | |
10006d8a: 4368 muls r0, r5, r0 | |
10006d8c: 1a22 subs r2, r4, r0 | |
10006d8e: 2400 movs r4, #0 | |
10006d90: 4623 mov r3, r4 | |
10006d92: 4630 mov r0, r6 | |
10006d94: 4619 mov r1, r3 | |
10006d96: 4623 mov r3, r4 | |
10006d98: b009 add sp, #36 | |
10006d9a: bdf0 pop {r4, r5, r6, r7, pc} | |
10006d9c: 1ba8 subs r0, r5, r6 | |
10006d9e: 4620 mov r0, r4 | |
10006da0: 9906 ldr r1, [sp, #24] | |
10006da2: 4188 sbcs r0, r1 | |
10006da4: d202 bhs 0x10006dac <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2fc> @ imm = #4 | |
10006da6: 462a mov r2, r5 | |
10006da8: 2600 movs r6, #0 | |
10006daa: e7f2 b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #-28 | |
10006dac: 9304 str r3, [sp, #16] | |
10006dae: 2001 movs r0, #1 | |
10006db0: 9006 str r0, [sp, #24] | |
10006db2: 0871 lsrs r1, r6, #1 | |
10006db4: 9808 ldr r0, [sp, #32] | |
10006db6: 07c2 lsls r2, r0, #31 | |
10006db8: 1851 adds r1, r2, r1 | |
10006dba: 07f3 lsls r3, r6, #31 | |
10006dbc: 9806 ldr r0, [sp, #24] | |
10006dbe: 07c2 lsls r2, r0, #31 | |
10006dc0: 2000 movs r0, #0 | |
10006dc2: 9007 str r0, [sp, #28] | |
10006dc4: e005 b 0x10006dd2 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x322> @ imm = #10 | |
10006dc6: 0898 lsrs r0, r3, #2 | |
10006dc8: 078a lsls r2, r1, #30 | |
10006dca: 1883 adds r3, r0, r2 | |
10006dcc: 9a08 ldr r2, [sp, #32] | |
10006dce: 0892 lsrs r2, r2, #2 | |
10006dd0: 0889 lsrs r1, r1, #2 | |
10006dd2: 1ae8 subs r0, r5, r3 | |
10006dd4: 4626 mov r6, r4 | |
10006dd6: 418e sbcs r6, r1 | |
10006dd8: 9208 str r2, [sp, #32] | |
10006dda: d407 bmi 0x10006dec <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x33c> @ imm = #14 | |
10006ddc: 4605 mov r5, r0 | |
10006dde: 9807 ldr r0, [sp, #28] | |
10006de0: 4310 orrs r0, r2 | |
10006de2: 9007 str r0, [sp, #28] | |
10006de4: 9806 ldr r0, [sp, #24] | |
10006de6: 4286 cmp r6, r0 | |
10006de8: d313 blo 0x10006e12 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x362> @ imm = #38 | |
10006dea: 4634 mov r4, r6 | |
10006dec: 085e lsrs r6, r3, #1 | |
10006dee: 07c8 lsls r0, r1, #31 | |
10006df0: 1830 adds r0, r6, r0 | |
10006df2: 084a lsrs r2, r1, #1 | |
10006df4: 1a28 subs r0, r5, r0 | |
10006df6: 4626 mov r6, r4 | |
10006df8: 4196 sbcs r6, r2 | |
10006dfa: d4e4 bmi 0x10006dc6 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x316> @ imm = #-56 | |
10006dfc: 4605 mov r5, r0 | |
10006dfe: 9808 ldr r0, [sp, #32] | |
10006e00: 0840 lsrs r0, r0, #1 | |
10006e02: 9a07 ldr r2, [sp, #28] | |
10006e04: 4302 orrs r2, r0 | |
10006e06: 9207 str r2, [sp, #28] | |
10006e08: 9806 ldr r0, [sp, #24] | |
10006e0a: 4286 cmp r6, r0 | |
10006e0c: d301 blo 0x10006e12 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x362> @ imm = #2 | |
10006e0e: 4634 mov r4, r6 | |
10006e10: e7d9 b 0x10006dc6 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x316> @ imm = #-78 | |
10006e12: 4628 mov r0, r5 | |
10006e14: 9c05 ldr r4, [sp, #20] | |
10006e16: 4621 mov r1, r4 | |
10006e18: f7f9 f9f6 bl 0x10000208 <_rphal_unsigned_divmod> @ imm = #-27668 | |
10006e1c: 9e07 ldr r6, [sp, #28] | |
10006e1e: 4306 orrs r6, r0 | |
10006e20: 4360 muls r0, r4, r0 | |
10006e22: 1a2a subs r2, r5, r0 | |
10006e24: 2400 movs r4, #0 | |
10006e26: 9b04 ldr r3, [sp, #16] | |
10006e28: e7b3 b 0x10006d92 <compiler_builtins::int::specialized_div_rem::u64_div_rem+0x2e2> @ imm = #-154 | |
10006e2a <__aeabi_llsl>: | |
10006e2a: b5d0 push {r4, r6, r7, lr} | |
10006e2c: af02 add r7, sp, #8 | |
10006e2e: 0693 lsls r3, r2, #26 | |
10006e30: d40b bmi 0x10006e4a <__aeabi_llsl+0x20> @ imm = #22 | |
10006e32: 2a00 cmp r2, #0 | |
10006e34: d008 beq 0x10006e48 <__aeabi_llsl+0x1e> @ imm = #16 | |
10006e36: 231f movs r3, #31 | |
10006e38: 4254 rsbs r4, r2, #0 | |
10006e3a: 401a ands r2, r3 | |
10006e3c: 4091 lsls r1, r2 | |
10006e3e: 401c ands r4, r3 | |
10006e40: 4603 mov r3, r0 | |
10006e42: 40e3 lsrs r3, r4 | |
10006e44: 4319 orrs r1, r3 | |
10006e46: 4090 lsls r0, r2 | |
10006e48: bdd0 pop {r4, r6, r7, pc} | |
10006e4a: 211f movs r1, #31 | |
10006e4c: 400a ands r2, r1 | |
10006e4e: 4601 mov r1, r0 | |
10006e50: 4091 lsls r1, r2 | |
10006e52: 2000 movs r0, #0 | |
10006e54: bdd0 pop {r4, r6, r7, pc} | |
10006e56 <compiler_builtins::arm::__aeabi_memmove>: | |
10006e56: b580 push {r7, lr} | |
10006e58: af00 add r7, sp, #0 | |
10006e5a: f000 f801 bl 0x10006e60 <compiler_builtins::mem::memmove> @ imm = #2 | |
10006e5e: bd80 pop {r7, pc} | |
10006e60 <compiler_builtins::mem::memmove>: | |
10006e60: b5f0 push {r4, r5, r6, r7, lr} | |
10006e62: af03 add r7, sp, #12 | |
10006e64: b08b sub sp, #44 | |
10006e66: 1a43 subs r3, r0, r1 | |
10006e68: 4293 cmp r3, r2 | |
10006e6a: d300 blo 0x10006e6e <compiler_builtins::mem::memmove+0xe> @ imm = #0 | |
10006e6c: e092 b 0x10006f94 <compiler_builtins::mem::memmove+0x134> @ imm = #292 | |
10006e6e: 188c adds r4, r1, r2 | |
10006e70: 1883 adds r3, r0, r2 | |
10006e72: 2a0f cmp r2, #15 | |
10006e74: d800 bhi 0x10006e78 <compiler_builtins::mem::memmove+0x18> @ imm = #0 | |
10006e76: e0f2 b 0x1000705e <compiler_builtins::mem::memmove+0x1fe> @ imm = #484 | |
10006e78: 9405 str r4, [sp, #20] | |
10006e7a: 9209 str r2, [sp, #36] | |
10006e7c: 9006 str r0, [sp, #24] | |
10006e7e: 2003 movs r0, #3 | |
10006e80: 461d mov r5, r3 | |
10006e82: 4385 bics r5, r0 | |
10006e84: 9308 str r3, [sp, #32] | |
10006e86: 9004 str r0, [sp, #16] | |
10006e88: 4003 ands r3, r0 | |
10006e8a: 4258 rsbs r0, r3, #0 | |
10006e8c: 9007 str r0, [sp, #28] | |
10006e8e: 9303 str r3, [sp, #12] | |
10006e90: 2b00 cmp r3, #0 | |
10006e92: 950a str r5, [sp, #40] | |
10006e94: d020 beq 0x10006ed8 <compiler_builtins::mem::memmove+0x78> @ imm = #64 | |
10006e96: 9809 ldr r0, [sp, #36] | |
10006e98: 1e43 subs r3, r0, #1 | |
10006e9a: 9806 ldr r0, [sp, #24] | |
10006e9c: 5cca ldrb r2, [r1, r3] | |
10006e9e: 54c2 strb r2, [r0, r3] | |
10006ea0: 18c6 adds r6, r0, r3 | |
10006ea2: 42b5 cmp r5, r6 | |
10006ea4: d218 bhs 0x10006ed8 <compiler_builtins::mem::memmove+0x78> @ imm = #48 | |
10006ea6: 1e74 subs r4, r6, #1 | |
10006ea8: 18ca adds r2, r1, r3 | |
10006eaa: 1e55 subs r5, r2, #1 | |
10006eac: 782d ldrb r5, [r5] | |
10006eae: 7025 strb r5, [r4] | |
10006eb0: 9d0a ldr r5, [sp, #40] | |
10006eb2: 42a5 cmp r5, r4 | |
10006eb4: d210 bhs 0x10006ed8 <compiler_builtins::mem::memmove+0x78> @ imm = #32 | |
10006eb6: 1eb4 subs r4, r6, #2 | |
10006eb8: 1e95 subs r5, r2, #2 | |
10006eba: 782d ldrb r5, [r5] | |
10006ebc: 7025 strb r5, [r4] | |
10006ebe: 9d0a ldr r5, [sp, #40] | |
10006ec0: 42a5 cmp r5, r4 | |
10006ec2: d209 bhs 0x10006ed8 <compiler_builtins::mem::memmove+0x78> @ imm = #18 | |
10006ec4: 1ef4 subs r4, r6, #3 | |
10006ec6: 1ed2 subs r2, r2, #3 | |
10006ec8: 7812 ldrb r2, [r2] | |
10006eca: 7022 strb r2, [r4] | |
10006ecc: 1f00 subs r0, r0, #4 | |
10006ece: 9a09 ldr r2, [sp, #36] | |
10006ed0: 1882 adds r2, r0, r2 | |
10006ed2: 1f09 subs r1, r1, #4 | |
10006ed4: 4295 cmp r5, r2 | |
10006ed6: d3e1 blo 0x10006e9c <compiler_builtins::mem::memmove+0x3c> @ imm = #-62 | |
10006ed8: 9e05 ldr r6, [sp, #20] | |
10006eda: 9807 ldr r0, [sp, #28] | |
10006edc: 1830 adds r0, r6, r0 | |
10006ede: 9001 str r0, [sp, #4] | |
10006ee0: 9b04 ldr r3, [sp, #16] | |
10006ee2: 4018 ands r0, r3 | |
10006ee4: 9909 ldr r1, [sp, #36] | |
10006ee6: 9a03 ldr r2, [sp, #12] | |
10006ee8: 1a8a subs r2, r1, r2 | |
10006eea: 9202 str r2, [sp, #8] | |
10006eec: 439a bics r2, r3 | |
10006eee: 1aa9 subs r1, r5, r2 | |
10006ef0: 4252 rsbs r2, r2, #0 | |
10006ef2: 2800 cmp r0, #0 | |
10006ef4: 9200 str r2, [sp] | |
10006ef6: d100 bne 0x10006efa <compiler_builtins::mem::memmove+0x9a> @ imm = #0 | |
10006ef8: e0b8 b 0x1000706c <compiler_builtins::mem::memmove+0x20c> @ imm = #368 | |
10006efa: 2a00 cmp r2, #0 | |
10006efc: d400 bmi 0x10006f00 <compiler_builtins::mem::memmove+0xa0> @ imm = #0 | |
10006efe: e0b7 b 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #366 | |
10006f00: 00c0 lsls r0, r0, #3 | |
10006f02: 9009 str r0, [sp, #36] | |
10006f04: 4240 rsbs r0, r0, #0 | |
10006f06: 2218 movs r2, #24 | |
10006f08: 4002 ands r2, r0 | |
10006f0a: 9208 str r2, [sp, #32] | |
10006f0c: 9a01 ldr r2, [sp, #4] | |
10006f0e: 9804 ldr r0, [sp, #16] | |
10006f10: 4382 bics r2, r0 | |
10006f12: 6810 ldr r0, [r2] | |
10006f14: 3a10 subs r2, #16 | |
10006f16: 9205 str r2, [sp, #20] | |
10006f18: 9a0a ldr r2, [sp, #40] | |
10006f1a: 1f12 subs r2, r2, #4 | |
10006f1c: 9203 str r2, [sp, #12] | |
10006f1e: 2300 movs r3, #0 | |
10006f20: 9a08 ldr r2, [sp, #32] | |
10006f22: 4090 lsls r0, r2 | |
10006f24: 9a05 ldr r2, [sp, #20] | |
10006f26: 18d2 adds r2, r2, r3 | |
10006f28: 9207 str r2, [sp, #28] | |
10006f2a: 68d6 ldr r6, [r2, #12] | |
10006f2c: 4632 mov r2, r6 | |
10006f2e: 9d09 ldr r5, [sp, #36] | |
10006f30: 40ea lsrs r2, r5 | |
10006f32: 4302 orrs r2, r0 | |
10006f34: 9803 ldr r0, [sp, #12] | |
10006f36: 50c2 str r2, [r0, r3] | |
10006f38: 18c2 adds r2, r0, r3 | |
10006f3a: 4291 cmp r1, r2 | |
10006f3c: d300 blo 0x10006f40 <compiler_builtins::mem::memmove+0xe0> @ imm = #0 | |
10006f3e: e097 b 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #302 | |
10006f40: 9808 ldr r0, [sp, #32] | |
10006f42: 4086 lsls r6, r0 | |
10006f44: 9807 ldr r0, [sp, #28] | |
10006f46: 6880 ldr r0, [r0, #8] | |
10006f48: 4605 mov r5, r0 | |
10006f4a: 9c09 ldr r4, [sp, #36] | |
10006f4c: 40e5 lsrs r5, r4 | |
10006f4e: 4335 orrs r5, r6 | |
10006f50: 1f16 subs r6, r2, #4 | |
10006f52: 6035 str r5, [r6] | |
10006f54: 42b1 cmp r1, r6 | |
10006f56: d300 blo 0x10006f5a <compiler_builtins::mem::memmove+0xfa> @ imm = #0 | |
10006f58: e08a b 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #276 | |
10006f5a: 9c08 ldr r4, [sp, #32] | |
10006f5c: 40a0 lsls r0, r4 | |
10006f5e: 9c07 ldr r4, [sp, #28] | |
10006f60: 6864 ldr r4, [r4, #4] | |
10006f62: 4625 mov r5, r4 | |
10006f64: 9e09 ldr r6, [sp, #36] | |
10006f66: 40f5 lsrs r5, r6 | |
10006f68: 4305 orrs r5, r0 | |
10006f6a: 4610 mov r0, r2 | |
10006f6c: 3808 subs r0, #8 | |
10006f6e: 6005 str r5, [r0] | |
10006f70: 4281 cmp r1, r0 | |
10006f72: d27d bhs 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #250 | |
10006f74: 9808 ldr r0, [sp, #32] | |
10006f76: 4084 lsls r4, r0 | |
10006f78: 9805 ldr r0, [sp, #20] | |
10006f7a: 58c0 ldr r0, [r0, r3] | |
10006f7c: 4605 mov r5, r0 | |
10006f7e: 9e09 ldr r6, [sp, #36] | |
10006f80: 40f5 lsrs r5, r6 | |
10006f82: 4325 orrs r5, r4 | |
10006f84: 3a0c subs r2, #12 | |
10006f86: 6015 str r5, [r2] | |
10006f88: 3b10 subs r3, #16 | |
10006f8a: 9a0a ldr r2, [sp, #40] | |
10006f8c: 18d2 adds r2, r2, r3 | |
10006f8e: 4291 cmp r1, r2 | |
10006f90: d3c6 blo 0x10006f20 <compiler_builtins::mem::memmove+0xc0> @ imm = #-116 | |
10006f92: e06d b 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #218 | |
10006f94: 2a0f cmp r2, #15 | |
10006f96: d965 bls 0x10007064 <compiler_builtins::mem::memmove+0x204> @ imm = #202 | |
10006f98: 9209 str r2, [sp, #36] | |
10006f9a: 4246 rsbs r6, r0, #0 | |
10006f9c: 2203 movs r2, #3 | |
10006f9e: 9208 str r2, [sp, #32] | |
10006fa0: 4016 ands r6, r2 | |
10006fa2: 1984 adds r4, r0, r6 | |
10006fa4: 2e00 cmp r6, #0 | |
10006fa6: d016 beq 0x10006fd6 <compiler_builtins::mem::memmove+0x176> @ imm = #44 | |
10006fa8: 4602 mov r2, r0 | |
10006faa: 460b mov r3, r1 | |
10006fac: 781d ldrb r5, [r3] | |
10006fae: 7015 strb r5, [r2] | |
10006fb0: 1c52 adds r2, r2, #1 | |
10006fb2: 42a2 cmp r2, r4 | |
10006fb4: d20f bhs 0x10006fd6 <compiler_builtins::mem::memmove+0x176> @ imm = #30 | |
10006fb6: 785d ldrb r5, [r3, #1] | |
10006fb8: 7015 strb r5, [r2] | |
10006fba: 1c52 adds r2, r2, #1 | |
10006fbc: 42a2 cmp r2, r4 | |
10006fbe: d20a bhs 0x10006fd6 <compiler_builtins::mem::memmove+0x176> @ imm = #20 | |
10006fc0: 789d ldrb r5, [r3, #2] | |
10006fc2: 7015 strb r5, [r2] | |
10006fc4: 1c52 adds r2, r2, #1 | |
10006fc6: 42a2 cmp r2, r4 | |
10006fc8: d205 bhs 0x10006fd6 <compiler_builtins::mem::memmove+0x176> @ imm = #10 | |
10006fca: 78dd ldrb r5, [r3, #3] | |
10006fcc: 7015 strb r5, [r2] | |
10006fce: 1c52 adds r2, r2, #1 | |
10006fd0: 1d1b adds r3, r3, #4 | |
10006fd2: 42a2 cmp r2, r4 | |
10006fd4: d3ea blo 0x10006fac <compiler_builtins::mem::memmove+0x14c> @ imm = #-44 | |
10006fd6: 9006 str r0, [sp, #24] | |
10006fd8: 1989 adds r1, r1, r6 | |
10006fda: 9107 str r1, [sp, #28] | |
10006fdc: 9a08 ldr r2, [sp, #32] | |
10006fde: 4011 ands r1, r2 | |
10006fe0: 9809 ldr r0, [sp, #36] | |
10006fe2: 1b80 subs r0, r0, r6 | |
10006fe4: 9009 str r0, [sp, #36] | |
10006fe6: 4390 bics r0, r2 | |
10006fe8: 1825 adds r5, r4, r0 | |
10006fea: 2900 cmp r1, #0 | |
10006fec: 9005 str r0, [sp, #20] | |
10006fee: d05f beq 0x100070b0 <compiler_builtins::mem::memmove+0x250> @ imm = #190 | |
10006ff0: 2801 cmp r0, #1 | |
10006ff2: db71 blt 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #226 | |
10006ff4: 00c8 lsls r0, r1, #3 | |
10006ff6: 900a str r0, [sp, #40] | |
10006ff8: 4240 rsbs r0, r0, #0 | |
10006ffa: 2318 movs r3, #24 | |
10006ffc: 4003 ands r3, r0 | |
10006ffe: 9e07 ldr r6, [sp, #28] | |
10007000: 9808 ldr r0, [sp, #32] | |
10007002: 4386 bics r6, r0 | |
10007004: 6830 ldr r0, [r6] | |
10007006: 3610 adds r6, #16 | |
10007008: 990a ldr r1, [sp, #40] | |
1000700a: 40c8 lsrs r0, r1 | |
1000700c: 4631 mov r1, r6 | |
1000700e: 390c subs r1, #12 | |
10007010: 680a ldr r2, [r1] | |
10007012: 4611 mov r1, r2 | |
10007014: 4099 lsls r1, r3 | |
10007016: 4301 orrs r1, r0 | |
10007018: c402 stm r4!, {r1} | |
1000701a: 42ac cmp r4, r5 | |
1000701c: d25c bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #184 | |
1000701e: 980a ldr r0, [sp, #40] | |
10007020: 40c2 lsrs r2, r0 | |
10007022: 4630 mov r0, r6 | |
10007024: 3808 subs r0, #8 | |
10007026: 6800 ldr r0, [r0] | |
10007028: 4601 mov r1, r0 | |
1000702a: 4099 lsls r1, r3 | |
1000702c: 4311 orrs r1, r2 | |
1000702e: c402 stm r4!, {r1} | |
10007030: 42ac cmp r4, r5 | |
10007032: d251 bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #162 | |
10007034: 990a ldr r1, [sp, #40] | |
10007036: 40c8 lsrs r0, r1 | |
10007038: 1f31 subs r1, r6, #4 | |
1000703a: 6809 ldr r1, [r1] | |
1000703c: 460a mov r2, r1 | |
1000703e: 409a lsls r2, r3 | |
10007040: 4302 orrs r2, r0 | |
10007042: c404 stm r4!, {r2} | |
10007044: 42ac cmp r4, r5 | |
10007046: d247 bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #142 | |
10007048: 980a ldr r0, [sp, #40] | |
1000704a: 40c1 lsrs r1, r0 | |
1000704c: 6830 ldr r0, [r6] | |
1000704e: 4602 mov r2, r0 | |
10007050: 409a lsls r2, r3 | |
10007052: 430a orrs r2, r1 | |
10007054: c404 stm r4!, {r2} | |
10007056: 3610 adds r6, #16 | |
10007058: 42ac cmp r4, r5 | |
1000705a: d3d5 blo 0x10007008 <compiler_builtins::mem::memmove+0x1a8> @ imm = #-86 | |
1000705c: e03c b 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #120 | |
1000705e: 4605 mov r5, r0 | |
10007060: 4619 mov r1, r3 | |
10007062: e00e b 0x10007082 <compiler_builtins::mem::memmove+0x222> @ imm = #28 | |
10007064: 4605 mov r5, r0 | |
10007066: 2a00 cmp r2, #0 | |
10007068: d13f bne 0x100070ea <compiler_builtins::mem::memmove+0x28a> @ imm = #126 | |
1000706a: e054 b 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #168 | |
1000706c: 2a00 cmp r2, #0 | |
1000706e: d454 bmi 0x1000711a <compiler_builtins::mem::memmove+0x2ba> @ imm = #168 | |
10007070: 9804 ldr r0, [sp, #16] | |
10007072: 9b02 ldr r3, [sp, #8] | |
10007074: 4003 ands r3, r0 | |
10007076: 9806 ldr r0, [sp, #24] | |
10007078: d04d beq 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #154 | |
1000707a: 9a01 ldr r2, [sp, #4] | |
1000707c: 9c00 ldr r4, [sp] | |
1000707e: 1914 adds r4, r2, r4 | |
10007080: 1acd subs r5, r1, r3 | |
10007082: 1f22 subs r2, r4, #4 | |
10007084: 78d3 ldrb r3, [r2, #3] | |
10007086: 1e4c subs r4, r1, #1 | |
10007088: 7023 strb r3, [r4] | |
1000708a: 42a5 cmp r5, r4 | |
1000708c: d243 bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #134 | |
1000708e: 7893 ldrb r3, [r2, #2] | |
10007090: 1e8c subs r4, r1, #2 | |
10007092: 7023 strb r3, [r4] | |
10007094: 42a5 cmp r5, r4 | |
10007096: d23e bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #124 | |
10007098: 7853 ldrb r3, [r2, #1] | |
1000709a: 1ecc subs r4, r1, #3 | |
1000709c: 7023 strb r3, [r4] | |
1000709e: 42a5 cmp r5, r4 | |
100070a0: d239 bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #114 | |
100070a2: 7813 ldrb r3, [r2] | |
100070a4: 1f09 subs r1, r1, #4 | |
100070a6: 700b strb r3, [r1] | |
100070a8: 1f12 subs r2, r2, #4 | |
100070aa: 428d cmp r5, r1 | |
100070ac: d3ea blo 0x10007084 <compiler_builtins::mem::memmove+0x224> @ imm = #-44 | |
100070ae: e032 b 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #100 | |
100070b0: 2801 cmp r0, #1 | |
100070b2: db11 blt 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #34 | |
100070b4: 9907 ldr r1, [sp, #28] | |
100070b6: 6808 ldr r0, [r1] | |
100070b8: c401 stm r4!, {r0} | |
100070ba: 42ac cmp r4, r5 | |
100070bc: d20c bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #24 | |
100070be: 6848 ldr r0, [r1, #4] | |
100070c0: c401 stm r4!, {r0} | |
100070c2: 42ac cmp r4, r5 | |
100070c4: d208 bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #16 | |
100070c6: 6888 ldr r0, [r1, #8] | |
100070c8: c401 stm r4!, {r0} | |
100070ca: 42ac cmp r4, r5 | |
100070cc: d204 bhs 0x100070d8 <compiler_builtins::mem::memmove+0x278> @ imm = #8 | |
100070ce: 68c8 ldr r0, [r1, #12] | |
100070d0: c401 stm r4!, {r0} | |
100070d2: 3110 adds r1, #16 | |
100070d4: 42ac cmp r4, r5 | |
100070d6: d3ee blo 0x100070b6 <compiler_builtins::mem::memmove+0x256> @ imm = #-36 | |
100070d8: 9a09 ldr r2, [sp, #36] | |
100070da: 9808 ldr r0, [sp, #32] | |
100070dc: 4002 ands r2, r0 | |
100070de: 9807 ldr r0, [sp, #28] | |
100070e0: 9905 ldr r1, [sp, #20] | |
100070e2: 1841 adds r1, r0, r1 | |
100070e4: 9806 ldr r0, [sp, #24] | |
100070e6: 2a00 cmp r2, #0 | |
100070e8: d015 beq 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #42 | |
100070ea: 18ac adds r4, r5, r2 | |
100070ec: 780a ldrb r2, [r1] | |
100070ee: 702a strb r2, [r5] | |
100070f0: 1c6a adds r2, r5, #1 | |
100070f2: 42a2 cmp r2, r4 | |
100070f4: d20f bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #30 | |
100070f6: 784b ldrb r3, [r1, #1] | |
100070f8: 7013 strb r3, [r2] | |
100070fa: 1c52 adds r2, r2, #1 | |
100070fc: 42a2 cmp r2, r4 | |
100070fe: d20a bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #20 | |
10007100: 788b ldrb r3, [r1, #2] | |
10007102: 7013 strb r3, [r2] | |
10007104: 1c52 adds r2, r2, #1 | |
10007106: 42a2 cmp r2, r4 | |
10007108: d205 bhs 0x10007116 <compiler_builtins::mem::memmove+0x2b6> @ imm = #10 | |
1000710a: 78cb ldrb r3, [r1, #3] | |
1000710c: 7013 strb r3, [r2] | |
1000710e: 1c55 adds r5, r2, #1 | |
10007110: 1d09 adds r1, r1, #4 | |
10007112: 42a5 cmp r5, r4 | |
10007114: d3ea blo 0x100070ec <compiler_builtins::mem::memmove+0x28c> @ imm = #-44 | |
10007116: b00b add sp, #44 | |
10007118: bdf0 pop {r4, r5, r6, r7, pc} | |
1000711a: 9807 ldr r0, [sp, #28] | |
1000711c: 1f00 subs r0, r0, #4 | |
1000711e: 5832 ldr r2, [r6, r0] | |
10007120: 9b08 ldr r3, [sp, #32] | |
10007122: 501a str r2, [r3, r0] | |
10007124: 181a adds r2, r3, r0 | |
10007126: 4291 cmp r1, r2 | |
10007128: d2a2 bhs 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #-188 | |
1000712a: 1f14 subs r4, r2, #4 | |
1000712c: 1833 adds r3, r6, r0 | |
1000712e: 1f1d subs r5, r3, #4 | |
10007130: 682d ldr r5, [r5] | |
10007132: 6025 str r5, [r4] | |
10007134: 42a1 cmp r1, r4 | |
10007136: d29b bhs 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #-202 | |
10007138: 4614 mov r4, r2 | |
1000713a: 3c08 subs r4, #8 | |
1000713c: 461d mov r5, r3 | |
1000713e: 3d08 subs r5, #8 | |
10007140: 682d ldr r5, [r5] | |
10007142: 6025 str r5, [r4] | |
10007144: 42a1 cmp r1, r4 | |
10007146: d293 bhs 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #-218 | |
10007148: 3a0c subs r2, #12 | |
1000714a: 3b0c subs r3, #12 | |
1000714c: 681b ldr r3, [r3] | |
1000714e: 6013 str r3, [r2] | |
10007150: 9a08 ldr r2, [sp, #32] | |
10007152: 3a10 subs r2, #16 | |
10007154: 9208 str r2, [sp, #32] | |
10007156: 9b07 ldr r3, [sp, #28] | |
10007158: 18d2 adds r2, r2, r3 | |
1000715a: 3e10 subs r6, #16 | |
1000715c: 4291 cmp r1, r2 | |
1000715e: d3de blo 0x1000711e <compiler_builtins::mem::memmove+0x2be> @ imm = #-68 | |
10007160: e786 b 0x10007070 <compiler_builtins::mem::memmove+0x210> @ imm = #-244 | |
10007162 <HardFaultTrampoline>: | |
10007162: 4670 mov r0, lr | |
10007164: 2104 movs r1, #4 | |
10007166: 4208 tst r0, r1 | |
10007168: d102 bne 0x10007170 <HardFaultTrampoline+0xe> @ imm = #4 | |
1000716a: f3ef 8008 mrs r0, msp | |
1000716e: e002 b 0x10007176 <HardFault_> @ imm = #4 | |
10007170: f3ef 8009 mrs r0, psp | |
10007174: e7ff b 0x10007176 <HardFault_> @ imm = #-2 | |
10007176 <HardFault_>: | |
; loop {} | |
10007176: e7fe b 0x10007176 <HardFault_> @ imm = #-4 | |
Disassembly of section .data: | |
2003a000 <__sdata>: | |
; unsafe extern "C" fn core1_main() -> u32 { | |
2003a000: b580 push {r7, lr} | |
2003a002: af00 add r7, sp, #0 | |
2003a004: b090 sub sp, #64 | |
2003a006: 4cb6 ldr r4, [pc, #728] @ 0x2003a2e0 <$d.25> | |
2003a008: 2501 movs r5, #1 | |
2003a00a: 7025 strb r5, [r4] | |
; $func($($args),*) | |
2003a00c: f002 fba0 bl 0x2003c750 <__Thumbv6MABSLongThunk___cpsie> @ imm = #10048 | |
2003a010: 9502 str r5, [sp, #8] | |
2003a012: 02e8 lsls r0, r5, #11 | |
2003a014: 49b3 ldr r1, [pc, #716] @ 0x2003a2e4 <$d.25+0x4> | |
2003a016: 6008 str r0, [r1] | |
2003a018: 49b3 ldr r1, [pc, #716] @ 0x2003a2e8 <$d.25+0x8> | |
2003a01a: 6008 str r0, [r1] | |
2003a01c: 48b3 ldr r0, [pc, #716] @ 0x2003a2ec <$d.25+0xc> | |
; RenderEngine { | |
2003a01e: 900e str r0, [sp, #56] | |
2003a020: 48b3 ldr r0, [pc, #716] @ 0x2003a2f0 <$d.25+0x10> | |
2003a022: 900d str r0, [sp, #52] | |
2003a024: 48b3 ldr r0, [pc, #716] @ 0x2003a2f4 <$d.25+0x14> | |
2003a026: 900c str r0, [sp, #48] | |
2003a028: 48b3 ldr r0, [pc, #716] @ 0x2003a2f8 <$d.25+0x18> | |
2003a02a: 900b str r0, [sp, #44] | |
2003a02c: 2000 movs r0, #0 | |
2003a02e: 9005 str r0, [sp, #20] | |
2003a030: 900f str r0, [sp, #60] | |
2003a032: 78a0 ldrb r0, [r4, #2] | |
; if DMA_READY.load(Ordering::Relaxed) { | |
2003a034: 2800 cmp r0, #0 | |
2003a036: d108 bne 0x2003a04a <__sdata+0x4a> @ imm = #16 | |
2003a038: 78a0 ldrb r0, [r4, #2] | |
; if DMA_READY.load(Ordering::Relaxed) { | |
2003a03a: 2800 cmp r0, #0 | |
2003a03c: d105 bne 0x2003a04a <__sdata+0x4a> @ imm = #10 | |
2003a03e: 78a0 ldrb r0, [r4, #2] | |
; if DMA_READY.load(Ordering::Relaxed) { | |
2003a040: 2800 cmp r0, #0 | |
2003a042: d102 bne 0x2003a04a <__sdata+0x4a> @ imm = #4 | |
2003a044: 78a0 ldrb r0, [r4, #2] | |
; if DMA_READY.load(Ordering::Relaxed) { | |
2003a046: 2800 cmp r0, #0 | |
2003a048: d0f3 beq 0x2003a032 <__sdata+0x32> @ imm = #-26 | |
2003a04a: 9805 ldr r0, [sp, #20] | |
2003a04c: 70a0 strb r0, [r4, #2] | |
2003a04e: 8aa6 ldrh r6, [r4, #20] | |
; let font = match unsafe { VIDEO_MODE.format() } { | |
2003a050: 7861 ldrb r1, [r4, #1] | |
2003a052: 2007 movs r0, #7 | |
; match (self.0 >> Self::FORMAT_SHIFT) & 0b111 { | |
2003a054: 4008 ands r0, r1 | |
2003a056: 4aaa ldr r2, [pc, #680] @ 0x2003a300 <$d.25+0x20> | |
; let font = match unsafe { VIDEO_MODE.format() } { | |
2003a058: d002 beq 0x2003a060 <__sdata+0x60> @ imm = #4 | |
2003a05a: 2801 cmp r0, #1 | |
2003a05c: d1e9 bne 0x2003a032 <__sdata+0x32> @ imm = #-46 | |
2003a05e: 4aa9 ldr r2, [pc, #676] @ 0x2003a304 <$d.25+0x24> | |
2003a060: 48a9 ldr r0, [pc, #676] @ 0x2003a308 <$d.25+0x28> | |
2003a062: 6844 ldr r4, [r0, #4] | |
; let text_row = current_line_num as usize / font.height; | |
2003a064: 6891 ldr r1, [r2, #8] | |
2003a066: 6805 ldr r5, [r0] | |
; let text_row = current_line_num as usize / font.height; | |
2003a068: 2900 cmp r1, #0 | |
2003a06a: d100 bne 0x2003a06e <__sdata+0x6e> @ imm = #0 | |
2003a06c: e12b b 0x2003a2c6 <__sdata+0x2c6> @ imm = #598 | |
2003a06e: 920a str r2, [sp, #40] | |
; let text_row = current_line_num as usize / font.height; | |
2003a070: b2b0 uxth r0, r6 | |
2003a072: 9008 str r0, [sp, #32] | |
2003a074: 9109 str r1, [sp, #36] | |
2003a076: f002 fb71 bl 0x2003c75c <__Thumbv6MABSLongThunk___aeabi_uidiv> @ imm = #9954 | |
; if text_row < num_rows { | |
2003a07a: 42a0 cmp r0, r4 | |
2003a07c: 4c98 ldr r4, [pc, #608] @ 0x2003a2e0 <$d.25> | |
2003a07e: d2d8 bhs 0x2003a032 <__sdata+0x32> @ imm = #-80 | |
2003a080: 4601 mov r1, r0 | |
; &GLYPH_ATTR_ARRAY[(text_row * num_cols)..((text_row + 1) * num_cols)] | |
2003a082: 4628 mov r0, r5 | |
2003a084: 4348 muls r0, r1, r0 | |
2003a086: 1c4a adds r2, r1, #1 | |
2003a088: 436a muls r2, r5, r2 | |
2003a08a: 4282 cmp r2, r0 | |
2003a08c: d200 bhs 0x2003a090 <__sdata+0x90> @ imm = #0 | |
2003a08e: e11f b 0x2003a2d0 <__sdata+0x2d0> @ imm = #574 | |
2003a090: 234b movs r3, #75 | |
2003a092: 019b lsls r3, r3, #6 | |
2003a094: 429a cmp r2, r3 | |
2003a096: d900 bls 0x2003a09a <__sdata+0x9a> @ imm = #0 | |
2003a098: e11e b 0x2003a2d8 <__sdata+0x2d8> @ imm = #572 | |
2003a09a: 9a02 ldr r2, [sp, #8] | |
2003a09c: 4016 ands r6, r2 | |
; let scan_line_buffer_ptr = scan_line_buffer.pixels.as_mut_ptr(); | |
2003a09e: d005 beq 0x2003a0ac <__sdata+0xac> @ imm = #10 | |
2003a0a0: 4a9b ldr r2, [pc, #620] @ 0x2003a310 <$d.25+0x30> | |
2003a0a2: 1d12 adds r2, r2, #4 | |
2003a0a4: 9204 str r2, [sp, #16] | |
2003a0a6: 2d00 cmp r5, #0 | |
2003a0a8: d105 bne 0x2003a0b6 <__sdata+0xb6> @ imm = #10 | |
2003a0aa: e7c2 b 0x2003a032 <__sdata+0x32> @ imm = #-124 | |
2003a0ac: 4a97 ldr r2, [pc, #604] @ 0x2003a30c <$d.25+0x2c> | |
2003a0ae: 1d12 adds r2, r2, #4 | |
2003a0b0: 9204 str r2, [sp, #16] | |
2003a0b2: 2d00 cmp r5, #0 | |
2003a0b4: d0bd beq 0x2003a032 <__sdata+0x32> @ imm = #-134 | |
2003a0b6: 9a09 ldr r2, [sp, #36] | |
2003a0b8: 4351 muls r1, r2, r1 | |
2003a0ba: 9a08 ldr r2, [sp, #32] | |
2003a0bc: 1a51 subs r1, r2, r1 | |
2003a0be: 9a0a ldr r2, [sp, #40] | |
2003a0c0: 6812 ldr r2, [r2] | |
2003a0c2: 1851 adds r1, r2, r1 | |
2003a0c4: 9108 str r1, [sp, #32] | |
2003a0c6: 0040 lsls r0, r0, #1 | |
2003a0c8: 4992 ldr r1, [pc, #584] @ 0x2003a314 <$d.25+0x34> | |
2003a0ca: 180e adds r6, r1, r0 | |
2003a0cc: 488b ldr r0, [pc, #556] @ 0x2003a2fc <$d.25+0x1c> | |
2003a0ce: 182a adds r2, r5, r0 | |
2003a0d0: 4002 ands r2, r0 | |
2003a0d2: 1c53 adds r3, r2, #1 | |
2003a0d4: 2103 movs r1, #3 | |
2003a0d6: 4618 mov r0, r3 | |
2003a0d8: 4008 ands r0, r1 | |
2003a0da: 2a03 cmp r2, #3 | |
2003a0dc: 9003 str r0, [sp, #12] | |
2003a0de: d203 bhs 0x2003a0e8 <__sdata+0xe8> @ imm = #6 | |
2003a0e0: 9d05 ldr r5, [sp, #20] | |
2003a0e2: 2800 cmp r0, #0 | |
2003a0e4: d178 bne 0x2003a1d8 <__sdata+0x1d8> @ imm = #240 | |
2003a0e6: e7a4 b 0x2003a032 <__sdata+0x32> @ imm = #-184 | |
2003a0e8: 438b bics r3, r1 | |
2003a0ea: 9804 ldr r0, [sp, #16] | |
2003a0ec: 3020 adds r0, #32 | |
2003a0ee: 2500 movs r5, #0 | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a0f0: 9306 str r3, [sp, #24] | |
2003a0f2: 9507 str r5, [sp, #28] | |
2003a0f4: 960a str r6, [sp, #40] | |
2003a0f6: 7831 ldrb r1, [r6] | |
2003a0f8: 9a09 ldr r2, [sp, #36] | |
2003a0fa: 4351 muls r1, r2, r1 | |
2003a0fc: 4613 mov r3, r2 | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a0fe: 9a08 ldr r2, [sp, #32] | |
2003a100: 5c54 ldrb r4, [r2, r1] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a102: 0925 lsrs r5, r4, #4 | |
2003a104: 210c movs r1, #12 | |
2003a106: 400d ands r5, r1 | |
2003a108: ae0b add r6, sp, #44 | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a10a: 5975 ldr r5, [r6, r5] | |
2003a10c: 4602 mov r2, r0 | |
2003a10e: 3a20 subs r2, #32 | |
2003a110: 6015 str r5, [r2] | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a112: 08a2 lsrs r2, r4, #2 | |
2003a114: 400a ands r2, r1 | |
2003a116: 58b2 ldr r2, [r6, r2] | |
2003a118: 4605 mov r5, r0 | |
2003a11a: 3d1c subs r5, #28 | |
2003a11c: 602a str r2, [r5] | |
; self.lookup[mono_pixels & 3], | |
2003a11e: 07a2 lsls r2, r4, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a120: 400c ands r4, r1 | |
2003a122: 5934 ldr r4, [r6, r4] | |
2003a124: 4605 mov r5, r0 | |
2003a126: 3d18 subs r5, #24 | |
2003a128: 602c str r4, [r5] | |
; self.lookup[mono_pixels & 3], | |
2003a12a: 0f12 lsrs r2, r2, #28 | |
2003a12c: 58b2 ldr r2, [r6, r2] | |
2003a12e: 4604 mov r4, r0 | |
2003a130: 3c14 subs r4, #20 | |
2003a132: 6022 str r2, [r4] | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a134: 9a0a ldr r2, [sp, #40] | |
2003a136: 7892 ldrb r2, [r2, #2] | |
2003a138: 435a muls r2, r3, r2 | |
2003a13a: 9b08 ldr r3, [sp, #32] | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a13c: 5c9c ldrb r4, [r3, r2] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a13e: 0922 lsrs r2, r4, #4 | |
2003a140: 400a ands r2, r1 | |
2003a142: 58b2 ldr r2, [r6, r2] | |
2003a144: 4605 mov r5, r0 | |
2003a146: 3d10 subs r5, #16 | |
2003a148: 602a str r2, [r5] | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a14a: 08a2 lsrs r2, r4, #2 | |
2003a14c: 400a ands r2, r1 | |
2003a14e: 58b2 ldr r2, [r6, r2] | |
2003a150: 4605 mov r5, r0 | |
2003a152: 3d0c subs r5, #12 | |
2003a154: 602a str r2, [r5] | |
; self.lookup[mono_pixels & 3], | |
2003a156: 07a2 lsls r2, r4, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a158: 400c ands r4, r1 | |
2003a15a: 5934 ldr r4, [r6, r4] | |
2003a15c: 4605 mov r5, r0 | |
2003a15e: 3d08 subs r5, #8 | |
2003a160: 602c str r4, [r5] | |
2003a162: 9d07 ldr r5, [sp, #28] | |
; self.lookup[mono_pixels & 3], | |
2003a164: 0f12 lsrs r2, r2, #28 | |
2003a166: 58b2 ldr r2, [r6, r2] | |
2003a168: 1f04 subs r4, r0, #4 | |
2003a16a: 6022 str r2, [r4] | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a16c: 9a0a ldr r2, [sp, #40] | |
2003a16e: 7912 ldrb r2, [r2, #4] | |
2003a170: 9c09 ldr r4, [sp, #36] | |
2003a172: 4362 muls r2, r4, r2 | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a174: 5c9a ldrb r2, [r3, r2] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a176: 0914 lsrs r4, r2, #4 | |
2003a178: 400c ands r4, r1 | |
2003a17a: 5934 ldr r4, [r6, r4] | |
2003a17c: 6004 str r4, [r0] | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a17e: 0894 lsrs r4, r2, #2 | |
2003a180: 400c ands r4, r1 | |
2003a182: 5934 ldr r4, [r6, r4] | |
2003a184: 6044 str r4, [r0, #4] | |
; self.lookup[mono_pixels & 3], | |
2003a186: 0794 lsls r4, r2, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a188: 400a ands r2, r1 | |
2003a18a: 58b2 ldr r2, [r6, r2] | |
2003a18c: 6082 str r2, [r0, #8] | |
; self.lookup[mono_pixels & 3], | |
2003a18e: 0f22 lsrs r2, r4, #28 | |
2003a190: 58b2 ldr r2, [r6, r2] | |
2003a192: 60c2 str r2, [r0, #12] | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a194: 9a0a ldr r2, [sp, #40] | |
2003a196: 7992 ldrb r2, [r2, #6] | |
2003a198: 9b09 ldr r3, [sp, #36] | |
2003a19a: 435a muls r2, r3, r2 | |
2003a19c: 9b06 ldr r3, [sp, #24] | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a19e: 9c08 ldr r4, [sp, #32] | |
2003a1a0: 5ca4 ldrb r4, [r4, r2] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a1a2: 0922 lsrs r2, r4, #4 | |
2003a1a4: 400a ands r2, r1 | |
2003a1a6: 58b2 ldr r2, [r6, r2] | |
2003a1a8: 6102 str r2, [r0, #16] | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a1aa: 08a2 lsrs r2, r4, #2 | |
2003a1ac: 400a ands r2, r1 | |
2003a1ae: 58b2 ldr r2, [r6, r2] | |
2003a1b0: 6142 str r2, [r0, #20] | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a1b2: 4021 ands r1, r4 | |
2003a1b4: 5871 ldr r1, [r6, r1] | |
2003a1b6: 6181 str r1, [r0, #24] | |
; self.lookup[mono_pixels & 3], | |
2003a1b8: 07a1 lsls r1, r4, #30 | |
2003a1ba: 0f09 lsrs r1, r1, #28 | |
2003a1bc: 5871 ldr r1, [r6, r1] | |
2003a1be: 9e0a ldr r6, [sp, #40] | |
2003a1c0: 61c1 str r1, [r0, #28] | |
2003a1c2: 3608 adds r6, #8 | |
2003a1c4: 1f1b subs r3, r3, #4 | |
2003a1c6: 3040 adds r0, #64 | |
; px_idx += 4; | |
2003a1c8: 3510 adds r5, #16 | |
2003a1ca: 2b00 cmp r3, #0 | |
2003a1cc: d190 bne 0x2003a0f0 <__sdata+0xf0> @ imm = #-224 | |
2003a1ce: 4c44 ldr r4, [pc, #272] @ 0x2003a2e0 <$d.25> | |
2003a1d0: 9803 ldr r0, [sp, #12] | |
2003a1d2: 2800 cmp r0, #0 | |
2003a1d4: d100 bne 0x2003a1d8 <__sdata+0x1d8> @ imm = #0 | |
2003a1d6: e72c b 0x2003a032 <__sdata+0x32> @ imm = #-424 | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a1d8: 7831 ldrb r1, [r6] | |
2003a1da: 9809 ldr r0, [sp, #36] | |
2003a1dc: 4341 muls r1, r0, r1 | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a1de: 9808 ldr r0, [sp, #32] | |
2003a1e0: 5c43 ldrb r3, [r0, r1] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a1e2: 091a lsrs r2, r3, #4 | |
2003a1e4: 210c movs r1, #12 | |
2003a1e6: 400a ands r2, r1 | |
2003a1e8: 960a str r6, [sp, #40] | |
2003a1ea: ae0b add r6, sp, #44 | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a1ec: 58b2 ldr r2, [r6, r2] | |
2003a1ee: 00ad lsls r5, r5, #2 | |
2003a1f0: 9804 ldr r0, [sp, #16] | |
2003a1f2: 5142 str r2, [r0, r5] | |
2003a1f4: 2404 movs r4, #4 | |
2003a1f6: 462a mov r2, r5 | |
2003a1f8: 9406 str r4, [sp, #24] | |
2003a1fa: 4322 orrs r2, r4 | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a1fc: 089c lsrs r4, r3, #2 | |
2003a1fe: 400c ands r4, r1 | |
2003a200: 5934 ldr r4, [r6, r4] | |
2003a202: 5084 str r4, [r0, r2] | |
2003a204: 2408 movs r4, #8 | |
2003a206: 462a mov r2, r5 | |
2003a208: 9401 str r4, [sp, #4] | |
2003a20a: 4322 orrs r2, r4 | |
; self.lookup[mono_pixels & 3], | |
2003a20c: 079c lsls r4, r3, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a20e: 400b ands r3, r1 | |
2003a210: 58f3 ldr r3, [r6, r3] | |
2003a212: 5083 str r3, [r0, r2] | |
2003a214: 462a mov r2, r5 | |
2003a216: 430a orrs r2, r1 | |
; self.lookup[mono_pixels & 3], | |
2003a218: 0f23 lsrs r3, r4, #28 | |
2003a21a: 4c31 ldr r4, [pc, #196] @ 0x2003a2e0 <$d.25> | |
; self.lookup[mono_pixels & 3], | |
2003a21c: 58f3 ldr r3, [r6, r3] | |
2003a21e: 9e0a ldr r6, [sp, #40] | |
2003a220: 5083 str r3, [r0, r2] | |
2003a222: 9803 ldr r0, [sp, #12] | |
2003a224: 9b08 ldr r3, [sp, #32] | |
2003a226: 2801 cmp r0, #1 | |
2003a228: d100 bne 0x2003a22c <__sdata+0x22c> @ imm = #0 | |
2003a22a: e702 b 0x2003a032 <__sdata+0x32> @ imm = #-508 | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a22c: 78b2 ldrb r2, [r6, #2] | |
2003a22e: 9809 ldr r0, [sp, #36] | |
2003a230: 4342 muls r2, r0, r2 | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a232: 5c9e ldrb r6, [r3, r2] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a234: 0932 lsrs r2, r6, #4 | |
2003a236: 400a ands r2, r1 | |
2003a238: a80b add r0, sp, #44 | |
2003a23a: 9007 str r0, [sp, #28] | |
2003a23c: 5884 ldr r4, [r0, r2] | |
2003a23e: 462a mov r2, r5 | |
2003a240: 3210 adds r2, #16 | |
2003a242: 9804 ldr r0, [sp, #16] | |
2003a244: 5084 str r4, [r0, r2] | |
2003a246: 4614 mov r4, r2 | |
2003a248: 9b06 ldr r3, [sp, #24] | |
2003a24a: 431c orrs r4, r3 | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a24c: 08b3 lsrs r3, r6, #2 | |
2003a24e: 400b ands r3, r1 | |
2003a250: 9807 ldr r0, [sp, #28] | |
2003a252: 58c3 ldr r3, [r0, r3] | |
2003a254: 9804 ldr r0, [sp, #16] | |
2003a256: 5103 str r3, [r0, r4] | |
2003a258: 4613 mov r3, r2 | |
2003a25a: 9c01 ldr r4, [sp, #4] | |
2003a25c: 4323 orrs r3, r4 | |
; self.lookup[mono_pixels & 3], | |
2003a25e: 07b4 lsls r4, r6, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a260: 400e ands r6, r1 | |
2003a262: 9807 ldr r0, [sp, #28] | |
2003a264: 5986 ldr r6, [r0, r6] | |
2003a266: 9804 ldr r0, [sp, #16] | |
2003a268: 50c6 str r6, [r0, r3] | |
2003a26a: 430a orrs r2, r1 | |
; self.lookup[mono_pixels & 3], | |
2003a26c: 0f23 lsrs r3, r4, #28 | |
2003a26e: 4c1c ldr r4, [pc, #112] @ 0x2003a2e0 <$d.25> | |
2003a270: 9e07 ldr r6, [sp, #28] | |
2003a272: 58f3 ldr r3, [r6, r3] | |
2003a274: 5083 str r3, [r0, r2] | |
2003a276: 9b08 ldr r3, [sp, #32] | |
2003a278: 9803 ldr r0, [sp, #12] | |
2003a27a: 2802 cmp r0, #2 | |
2003a27c: d100 bne 0x2003a280 <__sdata+0x280> @ imm = #0 | |
2003a27e: e6d8 b 0x2003a032 <__sdata+0x32> @ imm = #-592 | |
; let index = (glyphattr.glyph().0 as isize) * font.height as isize; | |
2003a280: 980a ldr r0, [sp, #40] | |
2003a282: 7900 ldrb r0, [r0, #4] | |
2003a284: 9a09 ldr r2, [sp, #36] | |
2003a286: 4350 muls r0, r2, r0 | |
; let mono_pixels = unsafe { *font_ptr.offset(index) } as usize; | |
2003a288: 5c1a ldrb r2, [r3, r0] | |
; self.lookup[(mono_pixels >> 6) & 3], | |
2003a28a: 0913 lsrs r3, r2, #4 | |
2003a28c: 400b ands r3, r1 | |
2003a28e: a80b add r0, sp, #44 | |
2003a290: 900a str r0, [sp, #40] | |
2003a292: 58c3 ldr r3, [r0, r3] | |
2003a294: 3520 adds r5, #32 | |
2003a296: 9804 ldr r0, [sp, #16] | |
2003a298: 5143 str r3, [r0, r5] | |
2003a29a: 9806 ldr r0, [sp, #24] | |
2003a29c: 4328 orrs r0, r5 | |
; self.lookup[(mono_pixels >> 4) & 3], | |
2003a29e: 0893 lsrs r3, r2, #2 | |
2003a2a0: 400b ands r3, r1 | |
2003a2a2: 9e0a ldr r6, [sp, #40] | |
2003a2a4: 58f3 ldr r3, [r6, r3] | |
2003a2a6: 9e04 ldr r6, [sp, #16] | |
2003a2a8: 5033 str r3, [r6, r0] | |
2003a2aa: 9801 ldr r0, [sp, #4] | |
2003a2ac: 4328 orrs r0, r5 | |
; self.lookup[mono_pixels & 3], | |
2003a2ae: 0793 lsls r3, r2, #30 | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a2b0: 9309 str r3, [sp, #36] | |
2003a2b2: 400a ands r2, r1 | |
2003a2b4: 9b0a ldr r3, [sp, #40] | |
; self.lookup[(mono_pixels >> 2) & 3], | |
2003a2b6: 589a ldr r2, [r3, r2] | |
2003a2b8: 5032 str r2, [r6, r0] | |
2003a2ba: 430d orrs r5, r1 | |
; self.lookup[mono_pixels & 3], | |
2003a2bc: 9809 ldr r0, [sp, #36] | |
2003a2be: 0f01 lsrs r1, r0, #28 | |
2003a2c0: 5858 ldr r0, [r3, r1] | |
2003a2c2: 5170 str r0, [r6, r5] | |
2003a2c4: e6b5 b 0x2003a032 <__sdata+0x32> @ imm = #-662 | |
; let text_row = current_line_num as usize / font.height; | |
2003a2c6: 4814 ldr r0, [pc, #80] @ 0x2003a318 <$d.25+0x38> | |
2003a2c8: 2119 movs r1, #25 | |
2003a2ca: f002 fa4d bl 0x2003c768 <__Thumbv6MABSLongThunk_core::panicking::panic> @ imm = #9370 | |
2003a2ce: defe trap | |
2003a2d0: 4611 mov r1, r2 | |
2003a2d2: f002 fa4f bl 0x2003c774 <__Thumbv6MABSLongThunk_core::slice::index::slice_index_order_fail> @ imm = #9374 | |
2003a2d6: defe trap | |
2003a2d8: 4610 mov r0, r2 | |
2003a2da: f002 fa51 bl 0x2003c780 <__Thumbv6MABSLongThunk_core::slice::index::slice_end_index_len_fail> @ imm = #9378 | |
2003a2de: defe trap | |
2003a2e0 <$d.25>: | |
2003a2e0: 18 ed 03 20 .word 0x2003ed18 | |
2003a2e4: 80 e2 00 e0 .word 0xe000e280 | |
2003a2e8: 00 e1 00 e0 .word 0xe000e100 | |
2003a2ec: ff 00 ff 00 .word 0x00ff00ff | |
2003a2f0: ff 00 00 08 .word 0x080000ff | |
2003a2f4: 00 08 ff 00 .word 0x00ff0800 | |
2003a2f8: 00 08 00 08 .word 0x08000800 | |
2003a2fc: ff ff ff 7f .word 0x7fffffff | |
2003a300: 44 72 00 10 .word 0x10007244 | |
2003a304: 50 72 00 10 .word 0x10007250 | |
2003a308: 00 c7 03 20 .word 0x2003c700 | |
2003a30c: e0 c0 03 20 .word 0x2003c0e0 | |
2003a310: d0 bb 03 20 .word 0x2003bbd0 | |
2003a314: 8c c7 03 20 .word 0x2003c78c | |
2003a318: f0 71 00 10 .word 0x100071f0 | |
2003a31c <DMA_IRQ_0>: | |
; #[interrupt] | |
2003a31c: b5f0 push {r4, r5, r6, r7, lr} | |
2003a31e: af03 add r7, sp, #12 | |
2003a320: 4820 ldr r0, [pc, #128] @ 0x2003a3a4 <$d.118> | |
2003a322: 78c1 ldrb r1, [r0, #3] | |
; let dma: &mut super::pac::DMA = match DMA_PERIPH.as_mut() { | |
2003a324: 2901 cmp r1, #1 | |
2003a326: d13c bne 0x2003a3a2 <DMA_IRQ_0+0x86> @ imm = #120 | |
2003a328: 4a1f ldr r2, [pc, #124] @ 0x2003a3a8 <$d.118+0x4> | |
2003a32a: 6811 ldr r1, [r2] | |
2003a32c: 2302 movs r3, #2 | |
; let pixel_dma_chan_irq = (status & (1 << PIXEL_DMA_CHAN)) != 0; | |
2003a32e: 460c mov r4, r1 | |
2003a330: 401c ands r4, r3 | |
; if timing_dma_chan_irq { | |
2003a332: 07c9 lsls r1, r1, #31 | |
2003a334: 4d1d ldr r5, [pc, #116] @ 0x2003a3ac <$d.118+0x8> | |
; if timing_dma_chan_irq { | |
2003a336: d01f beq 0x2003a378 <DMA_IRQ_0+0x5c> @ imm = #62 | |
2003a338: 2101 movs r1, #1 | |
2003a33a: 6011 str r1, [r2] | |
2003a33c: 8a41 ldrh r1, [r0, #18] | |
; let next_timing_line = if old_timing_line == TIMING_BUFFER.back_porch_ends_at { | |
2003a33e: 4d1c ldr r5, [pc, #112] @ 0x2003a3b0 <$d.118+0xc> | |
2003a340: 462e mov r6, r5 | |
2003a342: 3610 adds r6, #16 | |
2003a344: 8ef2 ldrh r2, [r6, #54] | |
2003a346: 4291 cmp r1, r2 | |
2003a348: d001 beq 0x2003a34e <DMA_IRQ_0+0x32> @ imm = #2 | |
2003a34a: 1c49 adds r1, r1, #1 | |
2003a34c: e000 b 0x2003a350 <DMA_IRQ_0+0x34> @ imm = #0 | |
2003a34e: 2100 movs r1, #0 | |
2003a350: 8241 strh r1, [r0, #18] | |
; let next_timing_line = if old_timing_line == TIMING_BUFFER.back_porch_ends_at { | |
2003a352: b289 uxth r1, r1 | |
; let buffer = if next_timing_line <= TIMING_BUFFER.visible_lines_ends_at { | |
2003a354: 8e32 ldrh r2, [r6, #48] | |
2003a356: 4291 cmp r1, r2 | |
2003a358: d90b bls 0x2003a372 <DMA_IRQ_0+0x56> @ imm = #22 | |
2003a35a: 2242 movs r2, #66 | |
; } else if next_timing_line <= TIMING_BUFFER.front_porch_end_at { | |
2003a35c: 5aaa ldrh r2, [r5, r2] | |
2003a35e: 4291 cmp r1, r2 | |
2003a360: d905 bls 0x2003a36e <DMA_IRQ_0+0x52> @ imm = #10 | |
2003a362: 2244 movs r2, #68 | |
; } else if next_timing_line <= TIMING_BUFFER.sync_pulse_ends_at { | |
2003a364: 5aaa ldrh r2, [r5, r2] | |
2003a366: 4291 cmp r1, r2 | |
2003a368: d801 bhi 0x2003a36e <DMA_IRQ_0+0x52> @ imm = #2 | |
2003a36a: 3530 adds r5, #48 | |
2003a36c: e000 b 0x2003a370 <DMA_IRQ_0+0x54> @ imm = #0 | |
2003a36e: 3520 adds r5, #32 | |
2003a370: 462e mov r6, r5 | |
2003a372: 4d0e ldr r5, [pc, #56] @ 0x2003a3ac <$d.118+0x8> | |
2003a374: 602e str r6, [r5] | |
2003a376: 4a0c ldr r2, [pc, #48] @ 0x2003a3a8 <$d.118+0x4> | |
; if pixel_dma_chan_irq { | |
2003a378: 2c00 cmp r4, #0 | |
2003a37a: d012 beq 0x2003a3a2 <DMA_IRQ_0+0x86> @ imm = #36 | |
2003a37c: 6013 str r3, [r2] | |
2003a37e: 8a81 ldrh r1, [r0, #20] | |
2003a380: 2240 movs r2, #64 | |
; if next_display_line > TIMING_BUFFER.visible_lines_ends_at { | |
2003a382: 4b0b ldr r3, [pc, #44] @ 0x2003a3b0 <$d.118+0xc> | |
2003a384: 5a9b ldrh r3, [r3, r2] | |
; let mut next_display_line = CURRENT_DISPLAY_LINE.load(Ordering::Relaxed) + 1; | |
2003a386: 1c4a adds r2, r1, #1 | |
2003a388: b291 uxth r1, r2 | |
; if next_display_line > TIMING_BUFFER.visible_lines_ends_at { | |
2003a38a: 4299 cmp r1, r3 | |
2003a38c: d900 bls 0x2003a390 <DMA_IRQ_0+0x74> @ imm = #0 | |
2003a38e: 2200 movs r2, #0 | |
; if (next_display_line & 1) == 1 { | |
2003a390: 07d1 lsls r1, r2, #31 | |
2003a392: d001 beq 0x2003a398 <DMA_IRQ_0+0x7c> @ imm = #2 | |
2003a394: 4908 ldr r1, [pc, #32] @ 0x2003a3b8 <$d.118+0x14> | |
2003a396: e000 b 0x2003a39a <DMA_IRQ_0+0x7e> @ imm = #0 | |
2003a398: 4906 ldr r1, [pc, #24] @ 0x2003a3b4 <$d.118+0x10> | |
2003a39a: 6429 str r1, [r5, #64] | |
2003a39c: 8282 strh r2, [r0, #20] | |
2003a39e: 2101 movs r1, #1 | |
2003a3a0: 7081 strb r1, [r0, #2] | |
; #[interrupt] | |
2003a3a2: bdf0 pop {r4, r5, r6, r7, pc} | |
2003a3a4 <$d.118>: | |
2003a3a4: 18 ed 03 20 .word 0x2003ed18 | |
2003a3a8: 0c 04 00 50 .word 0x5000040c | |
2003a3ac: 3c 00 00 50 .word 0x5000003c | |
2003a3b0: 00 c7 03 20 .word 0x2003c700 | |
2003a3b4: d0 bb 03 20 .word 0x2003bbd0 | |
2003a3b8: e0 c0 03 20 .word 0x2003c0e0 | |
2003a3bc <neotron_pico_bios::vga::font16::DATA>: | |
2003a3bc: 00 00 00 00 00 00 00 00 ........ | |
2003a3c4: 00 00 00 00 00 00 00 00 ........ | |
2003a3cc: 00 00 7e 81 a5 81 81 bd ..~..... | |
2003a3d4: 99 81 81 7e 00 00 00 00 ...~.... | |
2003a3dc: 00 00 7e ff db ff ff c3 ..~..... | |
2003a3e4: e7 ff ff 7e 00 00 00 00 ...~.... | |
2003a3ec: 00 00 00 00 6c fe fe fe ....l... | |
2003a3f4: fe 7c 38 10 00 00 00 00 .|8..... | |
2003a3fc: 00 00 00 00 10 38 7c fe .....8|. | |
2003a404: 7c 38 10 00 00 00 00 00 |8...... | |
2003a40c: 00 00 00 18 3c 3c e7 e7 ....<<.. | |
2003a414: e7 18 18 3c 00 00 00 00 ...<.... | |
2003a41c: 00 00 00 18 3c 7e ff ff ....<~.. | |
2003a424: 7e 18 18 3c 00 00 00 00 ~..<.... | |
2003a42c: 00 00 00 00 00 00 18 3c .......< | |
2003a434: 3c 18 00 00 00 00 00 00 <....... | |
2003a43c: ff ff ff ff ff ff e7 c3 ........ | |
2003a444: c3 e7 ff ff ff ff ff ff ........ | |
2003a44c: 00 00 00 00 00 3c 66 42 .....<fB | |
2003a454: 42 66 3c 00 00 00 00 00 Bf<..... | |
2003a45c: ff ff ff ff ff c3 99 bd ........ | |
2003a464: bd 99 c3 ff ff ff ff ff ........ | |
2003a46c: 00 00 1e 0e 1a 32 78 cc .....2x. | |
2003a474: cc cc cc 78 00 00 00 00 ...x.... | |
2003a47c: 00 00 3c 66 66 66 66 3c ..<ffff< | |
2003a484: 18 7e 18 18 00 00 00 00 .~...... | |
2003a48c: 00 00 3f 33 3f 30 30 30 ..?3?000 | |
2003a494: 30 70 f0 e0 00 00 00 00 0p...... | |
2003a49c: 00 00 7f 63 7f 63 63 63 ...c.ccc | |
2003a4a4: 63 67 e7 e6 c0 00 00 00 cg...... | |
2003a4ac: 00 00 00 18 18 db 3c e7 ......<. | |
2003a4b4: 3c db 18 18 00 00 00 00 <....... | |
2003a4bc: 00 80 c0 e0 f0 f8 fe f8 ........ | |
2003a4c4: f0 e0 c0 80 00 00 00 00 ........ | |
2003a4cc: 00 02 06 0e 1e 3e fe 3e .....>.> | |
2003a4d4: 1e 0e 06 02 00 00 00 00 ........ | |
2003a4dc: 00 00 18 3c 7e 18 18 18 ...<~... | |
2003a4e4: 7e 3c 18 00 00 00 00 00 ~<...... | |
2003a4ec: 00 00 66 66 66 66 66 66 ..ffffff | |
2003a4f4: 66 00 66 66 00 00 00 00 f.ff.... | |
2003a4fc: 00 00 7f db db db 7b 1b ......{. | |
2003a504: 1b 1b 1b 1b 00 00 00 00 ........ | |
2003a50c: 00 7c c6 60 38 6c c6 c6 .|.`8l.. | |
2003a514: 6c 38 0c c6 7c 00 00 00 l8..|... | |
2003a51c: 00 00 00 00 00 00 00 00 ........ | |
2003a524: fe fe fe fe 00 00 00 00 ........ | |
2003a52c: 00 00 18 3c 7e 18 18 18 ...<~... | |
2003a534: 7e 3c 18 7e 00 00 00 00 ~<.~.... | |
2003a53c: 00 00 18 3c 7e 18 18 18 ...<~... | |
2003a544: 18 18 18 18 00 00 00 00 ........ | |
2003a54c: 00 00 18 18 18 18 18 18 ........ | |
2003a554: 18 7e 3c 18 00 00 00 00 .~<..... | |
2003a55c: 00 00 00 00 00 18 0c fe ........ | |
2003a564: 0c 18 00 00 00 00 00 00 ........ | |
2003a56c: 00 00 00 00 00 30 60 fe .....0`. | |
2003a574: 60 30 00 00 00 00 00 00 `0...... | |
2003a57c: 00 00 00 00 00 00 c0 c0 ........ | |
2003a584: c0 fe 00 00 00 00 00 00 ........ | |
2003a58c: 00 00 00 00 00 28 6c fe .....(l. | |
2003a594: 6c 28 00 00 00 00 00 00 l(...... | |
2003a59c: 00 00 00 00 10 38 38 7c .....88| | |
2003a5a4: 7c fe fe 00 00 00 00 00 |....... | |
2003a5ac: 00 00 00 00 fe fe 7c 7c ......|| | |
2003a5b4: 38 38 10 00 00 00 00 00 88...... | |
2003a5bc: 00 00 00 00 00 00 00 00 ........ | |
2003a5c4: 00 00 00 00 00 00 00 00 ........ | |
2003a5cc: 00 00 18 3c 3c 3c 18 18 ...<<<.. | |
2003a5d4: 18 00 18 18 00 00 00 00 ........ | |
2003a5dc: 00 66 66 66 24 00 00 00 .fff$... | |
2003a5e4: 00 00 00 00 00 00 00 00 ........ | |
2003a5ec: 00 00 00 6c 6c fe 6c 6c ...ll.ll | |
2003a5f4: 6c fe 6c 6c 00 00 00 00 l.ll.... | |
2003a5fc: 18 18 7c c6 c2 c0 7c 06 ..|...|. | |
2003a604: 06 86 c6 7c 18 18 00 00 ...|.... | |
2003a60c: 00 00 00 00 c2 c6 0c 18 ........ | |
2003a614: 30 60 c6 86 00 00 00 00 0`...... | |
2003a61c: 00 00 38 6c 6c 38 76 dc ..8ll8v. | |
2003a624: cc cc cc 76 00 00 00 00 ...v.... | |
2003a62c: 00 30 30 30 60 00 00 00 .000`... | |
2003a634: 00 00 00 00 00 00 00 00 ........ | |
2003a63c: 00 00 0c 18 30 30 30 30 ....0000 | |
2003a644: 30 30 18 0c 00 00 00 00 00...... | |
2003a64c: 00 00 30 18 0c 0c 0c 0c ..0..... | |
2003a654: 0c 0c 18 30 00 00 00 00 ...0.... | |
2003a65c: 00 00 00 00 00 66 3c ff .....f<. | |
2003a664: 3c 66 00 00 00 00 00 00 <f...... | |
2003a66c: 00 00 00 00 00 18 18 7e .......~ | |
2003a674: 18 18 00 00 00 00 00 00 ........ | |
2003a67c: 00 00 00 00 00 00 00 00 ........ | |
2003a684: 00 18 18 18 30 00 00 00 ....0... | |
2003a68c: 00 00 00 00 00 00 00 fe ........ | |
2003a694: 00 00 00 00 00 00 00 00 ........ | |
2003a69c: 00 00 00 00 00 00 00 00 ........ | |
2003a6a4: 00 00 18 18 00 00 00 00 ........ | |
2003a6ac: 00 00 00 00 02 06 0c 18 ........ | |
2003a6b4: 30 60 c0 80 00 00 00 00 0`...... | |
2003a6bc: 00 00 38 6c c6 c6 d6 d6 ..8l.... | |
2003a6c4: c6 c6 6c 38 00 00 00 00 ..l8.... | |
2003a6cc: 00 00 18 38 78 18 18 18 ...8x... | |
2003a6d4: 18 18 18 7e 00 00 00 00 ...~.... | |
2003a6dc: 00 00 7c c6 06 0c 18 30 ..|....0 | |
2003a6e4: 60 c0 c6 fe 00 00 00 00 `....... | |
2003a6ec: 00 00 7c c6 06 06 3c 06 ..|...<. | |
2003a6f4: 06 06 c6 7c 00 00 00 00 ...|.... | |
2003a6fc: 00 00 0c 1c 3c 6c cc fe ....<l.. | |
2003a704: 0c 0c 0c 1e 00 00 00 00 ........ | |
2003a70c: 00 00 fe c0 c0 c0 fc 06 ........ | |
2003a714: 06 06 c6 7c 00 00 00 00 ...|.... | |
2003a71c: 00 00 38 60 c0 c0 fc c6 ..8`.... | |
2003a724: c6 c6 c6 7c 00 00 00 00 ...|.... | |
2003a72c: 00 00 fe c6 06 06 0c 18 ........ | |
2003a734: 30 30 30 30 00 00 00 00 0000.... | |
2003a73c: 00 00 7c c6 c6 c6 7c c6 ..|...|. | |
2003a744: c6 c6 c6 7c 00 00 00 00 ...|.... | |
2003a74c: 00 00 7c c6 c6 c6 7e 06 ..|...~. | |
2003a754: 06 06 0c 78 00 00 00 00 ...x.... | |
2003a75c: 00 00 00 00 18 18 00 00 ........ | |
2003a764: 00 18 18 00 00 00 00 00 ........ | |
2003a76c: 00 00 00 00 18 18 00 00 ........ | |
2003a774: 00 18 18 30 00 00 00 00 ...0.... | |
2003a77c: 00 00 00 06 0c 18 30 60 ......0` | |
2003a784: 30 18 0c 06 00 00 00 00 0....... | |
2003a78c: 00 00 00 00 00 7e 00 00 .....~.. | |
2003a794: 7e 00 00 00 00 00 00 00 ~....... | |
2003a79c: 00 00 00 60 30 18 0c 06 ...`0... | |
2003a7a4: 0c 18 30 60 00 00 00 00 ..0`.... | |
2003a7ac: 00 00 7c c6 c6 0c 18 18 ..|..... | |
2003a7b4: 18 00 18 18 00 00 00 00 ........ | |
2003a7bc: 00 00 00 7c c6 c6 de de ...|.... | |
2003a7c4: de dc c0 7c 00 00 00 00 ...|.... | |
2003a7cc: 00 00 10 38 6c c6 c6 fe ...8l... | |
2003a7d4: c6 c6 c6 c6 00 00 00 00 ........ | |
2003a7dc: 00 00 fc 66 66 66 7c 66 ...fff|f | |
2003a7e4: 66 66 66 fc 00 00 00 00 fff..... | |
2003a7ec: 00 00 3c 66 c2 c0 c0 c0 ..<f.... | |
2003a7f4: c0 c2 66 3c 00 00 00 00 ..f<.... | |
2003a7fc: 00 00 f8 6c 66 66 66 66 ...lffff | |
2003a804: 66 66 6c f8 00 00 00 00 ffl..... | |
2003a80c: 00 00 fe 66 62 68 78 68 ...fbhxh | |
2003a814: 60 62 66 fe 00 00 00 00 `bf..... | |
2003a81c: 00 00 fe 66 62 68 78 68 ...fbhxh | |
2003a824: 60 60 60 f0 00 00 00 00 ```..... | |
2003a82c: 00 00 3c 66 c2 c0 c0 de ..<f.... | |
2003a834: c6 c6 66 3a 00 00 00 00 ..f:.... | |
2003a83c: 00 00 c6 c6 c6 c6 fe c6 ........ | |
2003a844: c6 c6 c6 c6 00 00 00 00 ........ | |
2003a84c: 00 00 3c 18 18 18 18 18 ..<..... | |
2003a854: 18 18 18 3c 00 00 00 00 ...<.... | |
2003a85c: 00 00 1e 0c 0c 0c 0c 0c ........ | |
2003a864: cc cc cc 78 00 00 00 00 ...x.... | |
2003a86c: 00 00 e6 66 66 6c 78 78 ...fflxx | |
2003a874: 6c 66 66 e6 00 00 00 00 lff..... | |
2003a87c: 00 00 f0 60 60 60 60 60 ...````` | |
2003a884: 60 62 66 fe 00 00 00 00 `bf..... | |
2003a88c: 00 00 c6 ee fe fe d6 c6 ........ | |
2003a894: c6 c6 c6 c6 00 00 00 00 ........ | |
2003a89c: 00 00 c6 e6 f6 fe de ce ........ | |
2003a8a4: c6 c6 c6 c6 00 00 00 00 ........ | |
2003a8ac: 00 00 7c c6 c6 c6 c6 c6 ..|..... | |
2003a8b4: c6 c6 c6 7c 00 00 00 00 ...|.... | |
2003a8bc: 00 00 fc 66 66 66 7c 60 ...fff|` | |
2003a8c4: 60 60 60 f0 00 00 00 00 ```..... | |
2003a8cc: 00 00 7c c6 c6 c6 c6 c6 ..|..... | |
2003a8d4: c6 d6 de 7c 0c 0e 00 00 ...|.... | |
2003a8dc: 00 00 fc 66 66 66 7c 6c ...fff|l | |
2003a8e4: 66 66 66 e6 00 00 00 00 fff..... | |
2003a8ec: 00 00 7c c6 c6 60 38 0c ..|..`8. | |
2003a8f4: 06 c6 c6 7c 00 00 00 00 ...|.... | |
2003a8fc: 00 00 7e 7e 5a 18 18 18 ..~~Z... | |
2003a904: 18 18 18 3c 00 00 00 00 ...<.... | |
2003a90c: 00 00 c6 c6 c6 c6 c6 c6 ........ | |
2003a914: c6 c6 c6 7c 00 00 00 00 ...|.... | |
2003a91c: 00 00 c6 c6 c6 c6 c6 c6 ........ | |
2003a924: c6 6c 38 10 00 00 00 00 .l8..... | |
2003a92c: 00 00 c6 c6 c6 c6 d6 d6 ........ | |
2003a934: d6 fe ee 6c 00 00 00 00 ...l.... | |
2003a93c: 00 00 c6 c6 6c 7c 38 38 ....l|88 | |
2003a944: 7c 6c c6 c6 00 00 00 00 |l...... | |
2003a94c: 00 00 66 66 66 66 3c 18 ..ffff<. | |
2003a954: 18 18 18 3c 00 00 00 00 ...<.... | |
2003a95c: 00 00 fe c6 86 0c 18 30 .......0 | |
2003a964: 60 c2 c6 fe 00 00 00 00 `....... | |
2003a96c: 00 00 3c 30 30 30 30 30 ..<00000 | |
2003a974: 30 30 30 3c 00 00 00 00 000<.... | |
2003a97c: 00 00 00 80 c0 e0 70 38 ......p8 | |
2003a984: 1c 0e 06 02 00 00 00 00 ........ | |
2003a98c: 00 00 3c 0c 0c 0c 0c 0c ..<..... | |
2003a994: 0c 0c 0c 3c 00 00 00 00 ...<.... | |
2003a99c: 10 38 6c c6 00 00 00 00 .8l..... | |
2003a9a4: 00 00 00 00 00 00 00 00 ........ | |
2003a9ac: 00 00 00 00 00 00 00 00 ........ | |
2003a9b4: 00 00 00 00 00 ff 00 00 ........ | |
2003a9bc: 00 30 18 0c 00 00 00 00 .0...... | |
2003a9c4: 00 00 00 00 00 00 00 00 ........ | |
2003a9cc: 00 00 00 00 00 78 0c 7c .....x.| | |
2003a9d4: cc cc cc 76 00 00 00 00 ...v.... | |
2003a9dc: 00 00 e0 60 60 78 6c 66 ...``xlf | |
2003a9e4: 66 66 66 7c 00 00 00 00 fff|.... | |
2003a9ec: 00 00 00 00 00 7c c6 c0 .....|.. | |
2003a9f4: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003a9fc: 00 00 1c 0c 0c 3c 6c cc .....<l. | |
2003aa04: cc cc cc 76 00 00 00 00 ...v.... | |
2003aa0c: 00 00 00 00 00 7c c6 fe .....|.. | |
2003aa14: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003aa1c: 00 00 1c 36 32 30 78 30 ...620x0 | |
2003aa24: 30 30 30 78 00 00 00 00 000x.... | |
2003aa2c: 00 00 00 00 00 76 cc cc .....v.. | |
2003aa34: cc cc cc 7c 0c cc 78 00 ...|..x. | |
2003aa3c: 00 00 e0 60 60 6c 76 66 ...``lvf | |
2003aa44: 66 66 66 e6 00 00 00 00 fff..... | |
2003aa4c: 00 00 18 18 00 38 18 18 .....8.. | |
2003aa54: 18 18 18 3c 00 00 00 00 ...<.... | |
2003aa5c: 00 00 06 06 00 0e 06 06 ........ | |
2003aa64: 06 06 06 06 66 66 3c 00 ....ff<. | |
2003aa6c: 00 00 e0 60 60 66 6c 78 ...``flx | |
2003aa74: 78 6c 66 e6 00 00 00 00 xlf..... | |
2003aa7c: 00 00 38 18 18 18 18 18 ..8..... | |
2003aa84: 18 18 18 3c 00 00 00 00 ...<.... | |
2003aa8c: 00 00 00 00 00 ec fe d6 ........ | |
2003aa94: d6 d6 d6 c6 00 00 00 00 ........ | |
2003aa9c: 00 00 00 00 00 dc 66 66 ......ff | |
2003aaa4: 66 66 66 66 00 00 00 00 ffff.... | |
2003aaac: 00 00 00 00 00 7c c6 c6 .....|.. | |
2003aab4: c6 c6 c6 7c 00 00 00 00 ...|.... | |
2003aabc: 00 00 00 00 00 dc 66 66 ......ff | |
2003aac4: 66 66 66 7c 60 60 f0 00 fff|``.. | |
2003aacc: 00 00 00 00 00 76 cc cc .....v.. | |
2003aad4: cc cc cc 7c 0c 0c 1e 00 ...|.... | |
2003aadc: 00 00 00 00 00 dc 76 66 ......vf | |
2003aae4: 60 60 60 f0 00 00 00 00 ```..... | |
2003aaec: 00 00 00 00 00 7c c6 60 .....|.` | |
2003aaf4: 38 0c c6 7c 00 00 00 00 8..|.... | |
2003aafc: 00 00 10 30 30 fc 30 30 ...00.00 | |
2003ab04: 30 30 36 1c 00 00 00 00 006..... | |
2003ab0c: 00 00 00 00 00 cc cc cc ........ | |
2003ab14: cc cc cc 76 00 00 00 00 ...v.... | |
2003ab1c: 00 00 00 00 00 c6 c6 c6 ........ | |
2003ab24: c6 c6 6c 38 00 00 00 00 ..l8.... | |
2003ab2c: 00 00 00 00 00 c6 c6 d6 ........ | |
2003ab34: d6 d6 fe 6c 00 00 00 00 ...l.... | |
2003ab3c: 00 00 00 00 00 c6 6c 38 ......l8 | |
2003ab44: 38 38 6c c6 00 00 00 00 88l..... | |
2003ab4c: 00 00 00 00 00 c6 c6 c6 ........ | |
2003ab54: c6 c6 c6 7e 06 0c f8 00 ...~.... | |
2003ab5c: 00 00 00 00 00 fe cc 18 ........ | |
2003ab64: 30 60 c6 fe 00 00 00 00 0`...... | |
2003ab6c: 00 00 0e 18 18 18 70 18 ......p. | |
2003ab74: 18 18 18 0e 00 00 00 00 ........ | |
2003ab7c: 00 00 18 18 18 18 18 18 ........ | |
2003ab84: 18 18 18 18 00 00 00 00 ........ | |
2003ab8c: 00 00 70 18 18 18 0e 18 ..p..... | |
2003ab94: 18 18 18 70 00 00 00 00 ...p.... | |
2003ab9c: 00 76 dc 00 00 00 00 00 .v...... | |
2003aba4: 00 00 00 00 00 00 00 00 ........ | |
2003abac: 00 00 00 00 10 38 6c c6 .....8l. | |
2003abb4: c6 c6 fe 00 00 00 00 00 ........ | |
2003abbc: 00 00 3c 66 c2 c0 c0 c0 ..<f.... | |
2003abc4: c0 c2 66 3c 18 70 00 00 ..f<.p.. | |
2003abcc: 00 00 cc 00 00 cc cc cc ........ | |
2003abd4: cc cc cc 76 00 00 00 00 ...v.... | |
2003abdc: 00 0c 18 30 00 7c c6 fe ...0.|.. | |
2003abe4: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003abec: 00 10 38 6c 00 78 0c 7c ..8l.x.| | |
2003abf4: cc cc cc 76 00 00 00 00 ...v.... | |
2003abfc: 00 00 cc 00 00 78 0c 7c .....x.| | |
2003ac04: cc cc cc 76 00 00 00 00 ...v.... | |
2003ac0c: 00 60 30 18 00 78 0c 7c .`0..x.| | |
2003ac14: cc cc cc 76 00 00 00 00 ...v.... | |
2003ac1c: 00 38 6c 38 00 78 0c 7c .8l8.x.| | |
2003ac24: cc cc cc 76 00 00 00 00 ...v.... | |
2003ac2c: 00 00 00 00 00 7c c6 c0 .....|.. | |
2003ac34: c0 c0 c6 7c 18 70 00 00 ...|.p.. | |
2003ac3c: 00 10 38 6c 00 7c c6 fe ..8l.|.. | |
2003ac44: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003ac4c: 00 00 c6 00 00 7c c6 fe .....|.. | |
2003ac54: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003ac5c: 00 60 30 18 00 7c c6 fe .`0..|.. | |
2003ac64: c0 c0 c6 7c 00 00 00 00 ...|.... | |
2003ac6c: 00 00 66 00 00 38 18 18 ..f..8.. | |
2003ac74: 18 18 18 3c 00 00 00 00 ...<.... | |
2003ac7c: 00 18 3c 66 00 38 18 18 ..<f.8.. | |
2003ac84: 18 18 18 3c 00 00 00 00 ...<.... | |
2003ac8c: 00 60 30 18 00 38 18 18 .`0..8.. | |
2003ac94: 18 18 18 3c 00 00 00 00 ...<.... | |
2003ac9c: 00 c6 00 10 38 6c c6 c6 ....8l.. | |
2003aca4: fe c6 c6 c6 00 00 00 00 ........ | |
2003acac: 38 6c 38 10 38 6c c6 c6 8l8.8l.. | |
2003acb4: fe c6 c6 c6 00 00 00 00 ........ | |
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2003b7f4: 00 00 7e c0 c0 7e 0c 38 ..~..~.8 | |
2003b7fc: 7c 82 7c c6 fe c0 7c 00 |.|...|. | |
2003b804: c6 00 7c c6 fe c0 7c 00 ..|...|. | |
2003b80c: 30 18 7c c6 fe c0 7c 00 0.|...|. | |
2003b814: 66 00 38 18 18 18 3c 00 f.8...<. | |
2003b81c: 7c 82 38 18 18 18 3c 00 |.8...<. | |
2003b824: 30 18 00 38 18 18 3c 00 0..8..<. | |
2003b82c: c6 38 6c c6 fe c6 c6 00 .8l..... | |
2003b834: 38 6c 7c c6 fe c6 c6 00 8l|..... | |
2003b83c: 18 30 fe c0 f8 c0 fe 00 .0...... | |
2003b844: 00 00 7e 12 fe 90 fe 00 ..~..... | |
2003b84c: 3e 6c cc fe cc cc ce 00 >l...... | |
2003b854: 7c 82 7c c6 c6 c6 7c 00 |.|...|. | |
2003b85c: c6 00 7c c6 c6 c6 7c 00 ..|...|. | |
2003b864: 30 18 7c c6 c6 c6 7c 00 0.|...|. | |
2003b86c: 78 84 00 cc cc cc 76 00 x.....v. | |
2003b874: 60 30 cc cc cc cc 76 00 `0....v. | |
2003b87c: c6 00 c6 c6 c6 7e 06 fc .....~.. | |
2003b884: c6 38 6c c6 c6 6c 38 00 .8l..l8. | |
2003b88c: c6 00 c6 c6 c6 c6 7c 00 ......|. | |
2003b894: 00 02 7c ce d6 e6 7c 80 ..|...|. | |
2003b89c: 38 6c 64 f0 60 66 fc 00 8ld.`f.. | |
2003b8a4: 3a 6c ce d6 e6 6c b8 00 :l...l.. | |
2003b8ac: 00 c6 6c 38 6c c6 00 00 ..l8l... | |
2003b8b4: 0e 1b 18 3c 18 d8 70 00 ...<..p. | |
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2003b8c4: 0c 18 00 38 18 18 3c 00 ...8..<. | |
2003b8cc: 0c 18 7c c6 c6 c6 7c 00 ..|...|. | |
2003b8d4: 18 30 cc cc cc cc 76 00 .0....v. | |
2003b8dc: 76 dc 00 dc 66 66 66 00 v...fff. | |
2003b8e4: 76 dc 00 e6 f6 de ce 00 v....... | |
2003b8ec: 3c 6c 6c 3e 00 7e 00 00 <ll>.~.. | |
2003b8f4: 38 6c 6c 38 00 7c 00 00 8ll8.|.. | |
2003b8fc: 18 00 18 18 30 63 3e 00 ....0c>. | |
2003b904: 7e 81 b9 a5 b9 a5 81 7e ~......~ | |
2003b90c: 00 00 00 fe 06 06 00 00 ........ | |
2003b914: 63 e6 6c 7e 33 66 cc 0f c.l~3f.. | |
2003b91c: 63 e6 6c 7a 36 6a df 06 c.lz6j.. | |
2003b924: 18 00 18 18 3c 3c 18 00 ....<<.. | |
2003b92c: 00 33 66 cc 66 33 00 00 .3f.f3.. | |
2003b934: 00 cc 66 33 66 cc 00 00 ..f3f... | |
2003b93c: 22 88 22 88 22 88 22 88 ".".".". | |
2003b944: 55 aa 55 aa 55 aa 55 aa U.U.U.U. | |
2003b94c: 77 dd 77 dd 77 dd 77 dd w.w.w.w. | |
2003b954: 18 18 18 18 18 18 18 18 ........ | |
2003b95c: 18 18 18 18 f8 18 18 18 ........ | |
2003b964: 30 60 38 6c c6 fe c6 00 0`8l.... | |
2003b96c: 7c 82 38 6c c6 fe c6 00 |.8l.... | |
2003b974: 18 0c 38 6c c6 fe c6 00 ..8l.... | |
2003b97c: 7e 81 9d a1 a1 9d 81 7e ~......~ | |
2003b984: 36 36 f6 06 f6 36 36 36 66...666 | |
2003b98c: 36 36 36 36 36 36 36 36 66666666 | |
2003b994: 00 00 fe 06 f6 36 36 36 .....666 | |
2003b99c: 36 36 f6 06 fe 00 00 00 66...... | |
2003b9a4: 18 18 7e c0 c0 7e 18 18 ..~..~.. | |
2003b9ac: 66 66 3c 7e 18 7e 18 18 ff<~.~.. | |
2003b9b4: 00 00 00 00 f8 18 18 18 ........ | |
2003b9bc: 18 18 18 18 1f 00 00 00 ........ | |
2003b9c4: 18 18 18 18 ff 00 00 00 ........ | |
2003b9cc: 00 00 00 00 ff 18 18 18 ........ | |
2003b9d4: 18 18 18 18 1f 18 18 18 ........ | |
2003b9dc: 00 00 00 00 ff 00 00 00 ........ | |
2003b9e4: 18 18 18 18 ff 18 18 18 ........ | |
2003b9ec: 76 dc 7c 06 7e c6 7e 00 v.|.~.~. | |
2003b9f4: 76 dc 38 6c c6 fe c6 00 v.8l.... | |
2003b9fc: 36 36 37 30 3f 00 00 00 6670?... | |
2003ba04: 00 00 3f 30 37 36 36 36 ..?07666 | |
2003ba0c: 36 36 f7 00 ff 00 00 00 66...... | |
2003ba14: 00 00 ff 00 f7 36 36 36 .....666 | |
2003ba1c: 36 36 37 30 37 36 36 36 66707666 | |
2003ba24: 00 00 ff 00 ff 00 00 00 ........ | |
2003ba2c: 36 36 f7 00 f7 36 36 36 66...666 | |
2003ba34: 00 c6 7c c6 c6 7c c6 00 ..|..|.. | |
2003ba3c: 30 7e 0c 7c cc cc 78 00 0~.|..x. | |
2003ba44: f8 6c 66 f6 66 6c f8 00 .lf.fl.. | |
2003ba4c: 7c 82 fe c0 fc c0 fe 00 |....... | |
2003ba54: c6 00 fe c0 fc c0 fe 00 ........ | |
2003ba5c: 30 18 fe c0 fc c0 fe 00 0....... | |
2003ba64: 00 00 38 18 18 18 3c 00 ..8...<. | |
2003ba6c: 0c 18 3c 18 18 18 3c 00 ..<...<. | |
2003ba74: 3c 42 3c 18 18 18 3c 00 <B<...<. | |
2003ba7c: 66 00 3c 18 18 18 3c 00 f.<...<. | |
2003ba84: 18 18 18 18 f8 00 00 00 ........ | |
2003ba8c: 00 00 00 00 1f 18 18 18 ........ | |
2003ba94: ff ff ff ff ff ff ff ff ........ | |
2003ba9c: 00 00 00 00 ff ff ff ff ........ | |
2003baa4: 18 18 18 00 00 18 18 18 ........ | |
2003baac: 30 18 3c 18 18 18 3c 00 0.<...<. | |
2003bab4: ff ff ff ff 00 00 00 00 ........ | |
2003babc: 30 60 38 6c c6 6c 38 00 0`8l.l8. | |
2003bac4: 78 cc cc d8 cc c6 cc 00 x....... | |
2003bacc: 7c 82 38 6c c6 6c 38 00 |.8l.l8. | |
2003bad4: 0c 06 38 6c c6 6c 38 00 ..8l.l8. | |
2003badc: 76 dc 7c c6 c6 c6 7c 00 v.|...|. | |
2003bae4: 76 dc 38 6c c6 6c 38 00 v.8l.l8. | |
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2003baf4: e0 60 7c 66 66 7c 60 f0 .`|ff|`. | |
2003bafc: f0 60 7c 66 7c 60 f0 00 .`|f|`.. | |
2003bb04: 18 30 c6 c6 c6 c6 7c 00 .0....|. | |
2003bb0c: 7c 82 00 c6 c6 c6 7c 00 |.....|. | |
2003bb14: 60 30 c6 c6 c6 c6 7c 00 `0....|. | |
2003bb1c: 18 30 c6 c6 c6 7e 06 fc .0...~.. | |
2003bb24: 0c 18 66 66 3c 18 3c 00 ..ff<.<. | |
2003bb2c: ff 00 00 00 00 00 00 00 ........ | |
2003bb34: 0c 18 30 00 00 00 00 00 ..0..... | |
2003bb3c: 00 00 00 7e 00 00 00 00 ...~.... | |
2003bb44: 18 18 7e 18 18 00 7e 00 ..~...~. | |
2003bb4c: 00 00 00 00 00 ff 00 ff ........ | |
2003bb54: e1 32 e4 3a f6 2a 5f 86 .2.:.*_. | |
2003bb5c: 7f db db 7b 1b 1b 1b 00 ...{.... | |
2003bb64: 3e 61 3c 66 66 3c 86 7c >a<ff<.| | |
2003bb6c: 00 18 00 7e 00 18 00 00 ...~.... | |
2003bb74: 00 00 00 00 00 18 0c 38 .......8 | |
2003bb7c: 38 6c 6c 38 00 00 00 00 8ll8.... | |
2003bb84: 00 c6 00 00 00 00 00 00 ........ | |
2003bb8c: 00 00 00 18 00 00 00 00 ........ | |
2003bb94: 18 38 18 18 3c 00 00 00 .8..<... | |
2003bb9c: 78 0c 38 0c 78 00 00 00 x.8.x... | |
2003bba4: 78 0c 18 30 7c 00 00 00 x..0|... | |
2003bbac: 00 00 3c 3c 3c 3c 00 00 ..<<<<.. | |
2003bbb4: 00 00 00 00 00 00 00 00 ........ | |
2003bbbc <defmt_rtt::handle::NAME>: | |
2003bbbc: 64 65 66 6d 74 00 d4 d4 defmt... | |
2003bbc4: d4 d4 d4 d4 d4 d4 d4 d4 ........ | |
2003bbcc: d4 d4 d4 d4 .... | |
2003bbd0 <neotron_pico_bios::vga::PIXEL_DATA_BUFFER_EVEN>: | |
2003bbd0: 3f 01 00 00 ff 0f 00 00 ?....... | |
2003bbd8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bbe0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bbe8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bbf0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bbf8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc00: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc08: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc10: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc18: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc20: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc28: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc30: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc38: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc40: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc48: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc50: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc58: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc60: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc68: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc70: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc78: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc80: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc88: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc90: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bc98: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bca0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bca8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcb0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcb8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcc0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcc8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcd0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcd8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bce0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bce8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcf0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bcf8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd00: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd08: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd10: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd18: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd20: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd28: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd30: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd38: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd40: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd48: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd50: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd58: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd60: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd68: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd70: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd78: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd80: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd88: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd90: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bd98: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bda0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bda8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdb0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdb8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdc0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdc8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdd0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdd8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bde0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bde8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdf0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bdf8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be00: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be08: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be10: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be18: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be20: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be28: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be30: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be38: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be40: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be48: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be50: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be58: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be60: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be68: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be70: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be78: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be80: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be88: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be90: ff 0f 00 00 ff 0f 00 00 ........ | |
2003be98: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bea0: ff 0f 00 00 ff 0f 00 00 ........ | |
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2003bef0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bef8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf00: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf08: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf10: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf18: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf20: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf28: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf30: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf38: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf40: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf48: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf50: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf58: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf60: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf68: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf70: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf78: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf80: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf88: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf90: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bf98: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bfa0: ff 0f 00 00 ff 0f 00 00 ........ | |
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2003bfb0: ff 0f 00 00 ff 0f 00 00 ........ | |
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2003bfc0: ff 0f 00 00 ff 0f 00 00 ........ | |
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2003bfd0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bfd8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bfe0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bfe8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bff0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003bff8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c000: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c008: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c010: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c018: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c020: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c028: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c030: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c038: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c040: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c048: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c050: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c058: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c060: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c068: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c070: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c078: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c080: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c088: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c090: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c098: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0a0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0a8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0b0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0b8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0c0: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0c8: ff 0f 00 00 ff 0f 00 00 ........ | |
2003c0d0: ff 0f 00 00 00 00 00 00 ........ | |
2003c0d8: 00 00 00 00 00 00 00 00 ........ | |
2003c0e0 <neotron_pico_bios::vga::PIXEL_DATA_BUFFER_ODD>: | |
2003c0e0: 3f 01 00 00 00 00 ff 0f ?....... | |
2003c0e8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c0f0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c0f8: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c108: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c110: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c118: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c120: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c128: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c130: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c138: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c140: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c148: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c150: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c158: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c160: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c168: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c170: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c178: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c180: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c188: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c190: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c198: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1a0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1a8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1b0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1b8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1c0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1c8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1d0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1d8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1e0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1e8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1f0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c1f8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c200: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c208: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c210: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c218: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c220: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c228: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c230: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c238: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c240: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c248: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c250: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c258: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c260: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c268: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c270: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c278: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c280: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c288: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c290: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c298: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2a0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2a8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2b0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2b8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2c0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2c8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2d0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2d8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2e0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2e8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2f0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c2f8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c300: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c308: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c310: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c318: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c320: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c328: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c330: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c340: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c348: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c360: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c378: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c388: 00 00 ff 0f 00 00 ff 0f ........ | |
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2003c398: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3a0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3a8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3b0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3b8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3c0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3c8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3d0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3d8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3e0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3e8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3f0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c3f8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c400: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c408: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c410: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c418: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c420: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c428: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c430: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c438: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c440: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c448: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c450: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c458: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c460: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c468: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c470: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c478: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c480: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c488: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c490: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c498: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4a0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4a8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4b0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4b8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4c0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4c8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4d0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4d8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4e0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4e8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4f0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c4f8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c500: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c508: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c510: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c518: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c520: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c528: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c530: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c538: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c540: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c548: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c550: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c558: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c560: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c568: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c570: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c578: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c580: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c588: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c590: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c598: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5a0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5a8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5b0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5b8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5c0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5c8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5d0: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5d8: 00 00 ff 0f 00 00 ff 0f ........ | |
2003c5e0: 00 00 ff 0f 00 00 00 00 ........ | |
2003c5e8: 00 00 00 00 00 00 00 00 ........ | |
2003c5f0 <neotron_pico_bios::HARDWARE>: | |
2003c5f0: 00 00 00 00 00 00 00 00 ........ | |
2003c5f8: 00 00 00 00 00 00 00 00 ........ | |
2003c600: 00 00 00 00 00 00 00 00 ........ | |
2003c608: 00 00 00 00 00 00 00 00 ........ | |
2003c610: 00 00 00 00 00 00 00 00 ........ | |
2003c618: 00 00 00 00 00 00 00 00 ........ | |
2003c620: 00 00 00 00 00 00 00 00 ........ | |
2003c628: 00 00 00 00 00 00 00 00 ........ | |
2003c630: 00 00 00 00 00 00 00 00 ........ | |
2003c638: 00 00 00 00 00 00 00 00 ........ | |
2003c640: 00 00 00 00 00 00 00 00 ........ | |
2003c648: 00 00 00 00 00 00 00 00 ........ | |
2003c650: 00 00 00 00 00 00 00 00 ........ | |
2003c658: 00 00 00 00 00 00 00 00 ........ | |
2003c660: 00 00 00 00 00 00 00 00 ........ | |
2003c668: 00 00 00 00 00 00 00 00 ........ | |
2003c670: 00 00 00 00 00 00 00 00 ........ | |
2003c678: 00 00 00 00 00 00 00 00 ........ | |
2003c680: 00 00 00 00 00 00 00 00 ........ | |
2003c688: 00 00 00 00 00 00 00 00 ........ | |
2003c690: 00 00 00 00 00 00 00 00 ........ | |
2003c698: 00 00 00 00 00 00 00 00 ........ | |
2003c6a0: 00 00 00 00 00 00 00 00 ........ | |
2003c6a8: 00 00 00 00 00 00 00 00 ........ | |
2003c6b0: 00 00 00 00 00 00 00 00 ........ | |
2003c6b8: 00 00 00 00 00 00 00 00 ........ | |
2003c6c0: 00 00 00 00 02 00 00 00 ........ | |
2003c6c8: 00 00 00 00 .... | |
2003c6cc <_SEGGER_RTT>: | |
2003c6cc: 53 45 47 47 45 52 20 52 SEGGER R | |
2003c6d4: 54 54 00 00 00 00 00 00 TT...... | |
2003c6dc: 01 00 00 00 00 00 00 00 ........ | |
2003c6e4: bc bb 03 20 30 ed 03 20 ... 0.. | |
2003c6ec: 00 04 00 00 00 00 00 00 ........ | |
2003c6f4: 00 00 00 00 01 00 00 00 ........ | |
2003c6fc: d4 d4 d4 d4 .... | |
2003c700 <neotron_pico_bios::vga::NUM_TEXT_COLS.0>: | |
2003c700: 50 00 00 00 P... | |
2003c704 <neotron_pico_bios::vga::NUM_TEXT_ROWS.0>: | |
2003c704: 19 00 00 00 00 00 00 00 ........ | |
2003c70c: 00 00 00 00 .... | |
2003c710 <neotron_pico_bios::vga::TIMING_BUFFER>: | |
2003c710: 29 01 42 a0 68 07 42 a0 ).B.h.B. | |
2003c718: 95 03 42 a0 fd 31 00 c0 ..B..1.. | |
2003c720: 29 01 42 a0 68 07 42 a0 ).B.h.B. | |
2003c728: a9 03 42 a0 e9 31 42 a0 ..B..1B. | |
2003c730: 2b 01 42 a0 6a 07 42 a0 +.B.j.B. | |
2003c738: ab 03 42 a0 eb 31 42 a0 ..B..1B. | |
2003c740: 8f 01 9b 01 9d 01 c0 01 ........ | |
2003c748: 00 00 00 00 00 00 00 00 ........ | |
2003c750 <__Thumbv6MABSLongThunk___cpsie>: | |
2003c750: b403 push {r0, r1} | |
2003c752: 4801 ldr r0, [pc, #4] @ 0x2003c758 <$d> | |
2003c754: 9001 str r0, [sp, #4] | |
2003c756: bd01 pop {r0, pc} | |
2003c758 <$d>: | |
2003c758: 0d 6a 00 10 .word 0x10006a0d | |
2003c75c <__Thumbv6MABSLongThunk___aeabi_uidiv>: | |
2003c75c: b403 push {r0, r1} | |
2003c75e: 4801 ldr r0, [pc, #4] @ 0x2003c764 <$d> | |
2003c760: 9001 str r0, [sp, #4] | |
2003c762: bd01 pop {r0, pc} | |
2003c764 <$d>: | |
2003c764: 09 02 00 10 .word 0x10000209 | |
2003c768 <__Thumbv6MABSLongThunk_core::panicking::panic>: | |
2003c768: b403 push {r0, r1} | |
2003c76a: 4801 ldr r0, [pc, #4] @ 0x2003c770 <$d> | |
2003c76c: 9001 str r0, [sp, #4] | |
2003c76e: bd01 pop {r0, pc} | |
2003c770 <$d>: | |
2003c770: 85 49 00 10 .word 0x10004985 | |
2003c774 <__Thumbv6MABSLongThunk_core::slice::index::slice_index_order_fail>: | |
2003c774: b403 push {r0, r1} | |
2003c776: 4801 ldr r0, [pc, #4] @ 0x2003c77c <$d> | |
2003c778: 9001 str r0, [sp, #4] | |
2003c77a: bd01 pop {r0, pc} | |
2003c77c <$d>: | |
2003c77c: e5 4a 00 10 .word 0x10004ae5 | |
2003c780 <__Thumbv6MABSLongThunk_core::slice::index::slice_end_index_len_fail>: | |
2003c780: b403 push {r0, r1} | |
2003c782: 4801 ldr r0, [pc, #4] @ 0x2003c788 <$d> | |
2003c784: 9001 str r0, [sp, #4] | |
2003c786: bd01 pop {r0, pc} | |
2003c788 <$d>: | |
2003c788: c1 3d 00 10 .word 0x10003dc1 |
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