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@thibthibaut
Created October 21, 2020 12:38
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/* 32-byte alignment buffer for cache coherency operations. BUFF_SIZE is a 32-bytes multiple. */
uint8_t pBuff[BUFF_SIZE] __attribute__ ((aligned (32)));
/* Write data to main memory with DMA */
fancy_dma_operation(pBuff);
/* Make subsequent CPU reads coherent with DMA writes to main memory */
SCB_InvalidateDCache_by_Addr((uint32_t *)pBuff, BUFF_SIZE);
/* Read/write data with CPU to a cached memory region */
fancy_cpu_operation(pBuff);
/* Make subsequent DMA reads coherent with DMA reads to main memory */
SCB_CleanDCache_by_Addr((uint32_t *)pBuff, BUFF_SIZE);
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