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December 10, 2012 21:20
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INFO-F-102 - Projet: exemple d'exécution
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| $ yes | python simulateur.py prog.txt | |
| PC: 2 | CYCLES: 1 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: LOAD R1, 10 (1) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: LOAD R2, 14 (1) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| Next instruction: " LOAD R3, 15" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 4 | CYCLES: 2 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: LOAD R3, 15 (1) | |
| ID: LOAD R1, 10 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: IADD R1, R2 (1) | |
| ID: LOAD R2, 14 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| Next instruction: " IADD R1, R3" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 3 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R3 (1) | |
| ID: LOAD R3, 15 (1) | |
| EX: LOAD R1, 10 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: LOAD R2, 14 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 4 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: LOAD R3, 15 (1) | |
| MEM: LOAD R1, 10 (2) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: NOP (0) | |
| MEM: LOAD R2, 14 (2) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 5 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: LOAD R3, 15 (1) | |
| MEM: LOAD R1, 10 (1) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: NOP (0) | |
| MEM: LOAD R2, 14 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 6 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: LOAD R3, 15 (2) | |
| WB: LOAD R1, 10 (1) | |
| PIPELINE 1 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: LOAD R2, 14 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 7 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: LOAD R3, 15 (1) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: IADD R1, R2 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 8 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: LOAD R3, 15 (1) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: IADD R1, R2 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 9 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: IADD R1, R2 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 10 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: IADD R1, R3 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 11 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: IADD R1, R3 (1) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 12 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: IADD R1, R3 (1) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 13 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: STORE 17, R1 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 14 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: STORE 17, R1 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 15 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: STORE 17, R1 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 16 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| PIPELINE 1 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) 6 instructions were executed in 16 clock cycles |
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| PC: 1 | CYCLES: 1 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: LOAD R1, 10 (1) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| Next instruction: " LOAD R2, 14" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 2 | CYCLES: 2 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: LOAD R2, 14 (1) | |
| ID: LOAD R1, 10 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| Next instruction: " LOAD R3, 15" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 3 | CYCLES: 3 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: LOAD R3, 15 (1) | |
| ID: LOAD R2, 14 (1) | |
| EX: LOAD R1, 10 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| Next instruction: " IADD R1, R2" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 4 | CYCLES: 4 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R2 (1) | |
| ID: LOAD R3, 15 (1) | |
| EX: LOAD R2, 14 (1) | |
| MEM: LOAD R1, 10 (2) | |
| WB: NOP (0) | |
| Next instruction: " IADD R1, R3" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 4 | CYCLES: 5 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R2 (1) | |
| ID: LOAD R3, 15 (1) | |
| EX: LOAD R2, 14 (1) | |
| MEM: LOAD R1, 10 (1) | |
| WB: NOP (0) | |
| Next instruction: " IADD R1, R3" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 5 | CYCLES: 6 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R3 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: LOAD R3, 15 (1) | |
| MEM: LOAD R2, 14 (2) | |
| WB: LOAD R1, 10 (1) | |
| Next instruction: "STORE 17, R1" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 5 | CYCLES: 7 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R3 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: LOAD R3, 15 (1) | |
| MEM: LOAD R2, 14 (1) | |
| WB: NOP (0) | |
| Next instruction: "STORE 17, R1" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 5 | CYCLES: 8 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: IADD R1, R3 (1) | |
| ID: IADD R1, R2 (1) | |
| EX: NOP (0) | |
| MEM: LOAD R3, 15 (2) | |
| WB: LOAD R2, 14 (1) | |
| Next instruction: "STORE 17, R1" | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 9 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R3 (1) | |
| EX: IADD R1, R2 (1) | |
| MEM: LOAD R3, 15 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 10 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | X | | | | | | | | |
| PIPELINE 0 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: IADD R1, R2 (1) | |
| WB: LOAD R3, 15 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 11 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | X | | | | | | | | | |
| PIPELINE 0 | |
| IF: STORE 17, R1 (1) | |
| ID: IADD R1, R3 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: IADD R1, R2 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 12 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: IADD R1, R3 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 13 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: IADD R1, R3 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 14 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | X | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: STORE 17, R1 (1) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: IADD R1, R3 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 15 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: STORE 17, R1 (1) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 16 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: STORE 17, R1 (1) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 17 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | X | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: STORE 17, R1 (1) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) PC: 6 | CYCLES: 18 | |
| REGISTERS |R0 |R1 |R2 |R3 |R4 |R5 |R6 |R7 |R8 |R9 | | |
| LOCKED | | | | | | | | | | | | |
| PIPELINE 0 | |
| IF: NOP (0) | |
| ID: NOP (0) | |
| EX: NOP (0) | |
| MEM: NOP (0) | |
| WB: NOP (0) | |
| No more instruction in queue | |
| ------------------------------------------------------------ | |
| Continue [Y/N] ? (default: Yes) Without parallelism, this program would use 18 clock cycles |
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